<s> if ( CM == CodeModel :: Default ) CM = CodeModel :: Small ; X -> InitMCCodeGenInfo ( RM , CM ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MRI ) ; return <NUM_LIT> ;


<s> if ( RM == Reloc :: Default ) RM = Reloc :: Static ; if ( CM == CodeModel :: Default ) CM = CodeModel :: Small ; X -> InitMCCodeGenInfo ( RM , CM , OL ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( StringRef TT , StringRef CPU , StringRef FS ) { MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ;


<s> MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ;


<s> Triple TheTriple ( TT ) ; switch ( TheTriple . getOS ( ) ) {


<s> TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , llvm :: create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;


<s> TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , llvm :: create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;

TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;


<s> <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST , const TargetInstrInfo & tii ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , Subtarget ( ST ) , TII ( tii ) {


<s> unsigned StackOffset = MFI -> getStackSize ( ) ; unsigned RegSize = <NUM_LIT> ; <ISA_LIT>FI -> adjustLoadArgsFI ( MFI ) ; <ISA_LIT>FI -> adjustStoreVarArgsFI ( MFI ) ; if ( hasFP ( MF ) ) { MFI -> setObjectOffset ( MFI -> CreateStackObject ( RegSize , RegSize , true ) , StackOffset ) ; <ISA_LIT>FI -> setFPStackOffset ( StackOffset ) ;


<s> void <ISA_LIT>RegisterInfo :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const {


<s> int spOffset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ; DEBUG ( errs ( ) << <STR_LIT> << FrameIndex << <STR_LIT> << <STR_LIT> << spOffset << <STR_LIT> << <STR_LIT> << stackSize << <STR_LIT> ) ; int Offset = ( spOffset < <NUM_LIT> ) ? ( stackSize - spOffset ) : ( spOffset + <NUM_LIT> ) ; Offset += MI . getOperand ( oi ) . getImm ( ) ; DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ; MI . getOperand ( oi ) . ChangeToImmediate ( Offset ) ; MI . getOperand ( i ) . ChangeToRegister ( getFrameRegister ( MF ) , false ) ; return <NUM_LIT> ;


<s> DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; int stackSize = MF . getFrameInfo ( ) -> getStackSize ( ) ; int spOffset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ; DEBUG ( errs ( ) << <STR_LIT> << FrameIndex << <STR_LIT> << <STR_LIT> << spOffset << <STR_LIT> << <STR_LIT> << stackSize << <STR_LIT> ) ; int Offset = ( spOffset < <NUM_LIT> ) ? ( stackSize - spOffset ) : ( spOffset + <NUM_LIT> ) ; Offset += MI . getOperand ( oi ) . getImm ( ) ; DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ; MI . getOperand ( oi ) . ChangeToImmediate ( Offset ) ;

MI . getOperand ( i ) . ChangeToRegister ( getFrameRegister ( MF ) , false ) ;


<s> emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = prior ( MBB . end ( ) ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ;


<s> static const TargetRegisterClass * const CalleeSavedRC [ ] = { & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , <NUM_LIT> } ; return CalleeSavedRC ;


<s> int <ISA_LIT>RegisterInfo :: getDwarfRegNum ( unsigned RegNum , bool isEH ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getEHExceptionRegister ( ) const { llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT> ;


<s> unsigned <ISA_LIT>RegisterInfo :: getEHHandlerRegister ( ) const { llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT> ;


<s> unsigned <ISA_LIT>RegisterInfo :: getRARegister ( ) const {


<s> case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> processFunctionBeforeFrameFinalized ( MachineFunction & MF ) const { MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ;

if ( <ISA_LIT>FI -> needGPSaveRestore ( ) ) MFI -> setObjectOffset ( <ISA_LIT>FI -> getGPFI ( ) , <ISA_LIT>FI -> getGPStackOffset ( ) ) ;


<s> if ( <ISA_LIT>FI -> needGPSaveRestore ( ) ) MFI -> setObjectOffset ( <ISA_LIT>FI -> getGPFI ( ) , <ISA_LIT>FI -> getGPStackOffset ( ) ) ;


<s> Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; MachineInstr * New ; if ( Old -> getOpcode ( ) == <STR_LIT> ) { New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ; } else { assert ( Old -> getOpcode ( ) == <STR_LIT> ) ; New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( Amount ) ; }


<s> unsigned Align = TFI -> getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; MachineInstr * New ; if ( Old -> getOpcode ( ) == <STR_LIT> ) {

New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ;


<s> static const unsigned CalleeSavedRegs [ ] = {


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST , const TargetInstrInfo & tii ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <STR_LIT> ) , Subtarget ( ST ) , TII ( tii ) {


<s> adjust<ISA_LIT>StackFrame ( MF ) ; unsigned StackSize = MFI -> getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI -> hasCalls ( ) ) return ; if ( StackSize < <NUM_LIT> && MFI -> hasCalls ( ) ) StackSize = <NUM_LIT> ; int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - StackSize ) ; if ( MFI -> hasCalls ( ) ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addImm ( RAOffset ) . addReg ( <STR_LIT> ) ; } if ( hasFP ( MF ) ) {

BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addImm ( FPOffset ) . addReg ( <STR_LIT> ) ;


<s> int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - StackSize ) ; if ( MFI -> hasCalls ( ) ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addImm ( RAOffset ) . addReg ( <STR_LIT> ) ; } if ( hasFP ( MF ) ) {


<s> unsigned RegSize = <NUM_LIT> ; <ISA_LIT>FI -> adjustLoadArgsFI ( MFI ) ; <ISA_LIT>FI -> adjustStoreVarArgsFI ( MFI ) ; if ( hasFP ( MF ) ) { MFI -> setObjectOffset ( MFI -> CreateStackObject ( RegSize , RegSize , true ) , StackOffset ) ; <ISA_LIT>FI -> setFPStackOffset ( StackOffset ) ; TopCPUSavedRegOff = StackOffset ; StackOffset += RegSize ; }


<s> StackOffset += RegSize ; } if ( MFI -> adjustsStack ( ) ) { <ISA_LIT>FI -> setRAStackOffset ( <NUM_LIT> ) ; MFI -> setObjectOffset ( MFI -> CreateStackObject ( RegSize , RegSize , true ) , StackOffset ) ; TopCPUSavedRegOff = StackOffset ; StackOffset += RegSize ; }


<s> unsigned i = <NUM_LIT> ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } unsigned oi = i == <NUM_LIT> ? <NUM_LIT> : <NUM_LIT> ; DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ;

int stackSize = MF . getFrameInfo ( ) -> getStackSize ( ) ;


<s> int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; if ( hasFP ( MF ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FPOffset ) . addReg ( <STR_LIT> ) ; } if ( MFI -> adjustsStack ( ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( RAOffset ) . addReg ( <STR_LIT> ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FPOffset ) . addReg ( <STR_LIT> ) ; } if ( MFI -> adjustsStack ( ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( RAOffset ) . addReg ( <STR_LIT> ) ; } int StackSize = ( int ) MFI -> getStackSize ( ) ; if ( StackSize < <NUM_LIT> && MFI -> adjustsStack ( ) ) StackSize = <NUM_LIT> ; if ( StackSize ) {

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( StackSize ) ;


<s> int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - StackSize ) ; if ( MFI -> adjustsStack ( ) ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addImm ( RAOffset ) . addReg ( <STR_LIT> ) ; } if ( hasFP ( MF ) ) {


<s> bool <ISA_LIT>RegisterInfo :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return DisableFramePointerElim ( MF ) || MFI -> hasVarSizedObjects ( ) ;


<s> if ( Old -> getOpcode ( ) == <STR_LIT> ) { New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ; } else { assert ( Old -> getOpcode ( ) == <STR_LIT> ) ;

New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( Amount ) ;


<s> unsigned Align = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; MachineInstr * New ; if ( Old -> getOpcode ( ) == <STR_LIT> ) { New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ; } else { assert ( Old -> getOpcode ( ) == <STR_LIT> ) ; New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( Amount ) ; } MBB . insert ( I , New ) ;


<s> assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } unsigned oi = i == <NUM_LIT> ? <NUM_LIT> : <NUM_LIT> ; DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; int stackSize = MF . getFrameInfo ( ) -> getStackSize ( ) ;

int spOffset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ;


<s> return <ISA_LIT>GenRegisterInfo :: getDwarfRegNumFull ( RegNo , <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameInfo * TFI = MF . getTarget ( ) . getFrameInfo ( ) ; return TFI -> hasFP ( MF ) ? <STR_LIT> : <STR_LIT> ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> int spOffset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ; DEBUG ( errs ( ) << <STR_LIT> << FrameIndex << <STR_LIT> << <STR_LIT> << spOffset << <STR_LIT> << <STR_LIT> << stackSize << <STR_LIT> ) ; int Offset = ( spOffset < <NUM_LIT> ) ? ( stackSize - spOffset ) : ( spOffset + <NUM_LIT> ) ; Offset += MI . getOperand ( oi ) . getImm ( ) ; DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ; MI . getOperand ( oi ) . ChangeToImmediate ( Offset ) ; MI . getOperand ( i ) . ChangeToRegister ( getFrameRegister ( MF ) , false ) ;


<s> getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;


<ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , Subtarget ( ST ) {


<s> <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , Subtarget ( ST ) {


<s> InstrItins . IssueWidth = <NUM_LIT> ;


<s> CriticalPathRCs . clear ( ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; return HasItin && OptLevel >= CodeGenOpt :: Default ;


<s> bool hasItin ( ) const { return HasItin ;


<s> bool hasMul ( ) const { return HasMul ;


<s> bool hasSqrt ( ) const { return HasSqrt ;


<s> RegisterTarget < Triple :: mblaze > X ( The<ISA_LIT>Target , <STR_LIT> , <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) { RegisterTarget < Triple :: mblaze > X ( The<ISA_LIT>Target , <STR_LIT> , <STR_LIT> ) ;


<s> virtual const ScalarTargetTransformInfo * getScalarTargetTransformInfo ( ) const {


<s> virtual const VectorTargetTransformInfo * getVectorTargetTransformInfo ( ) const { return & VTTI ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DataLayout ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , ELFWriterInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DataLayout ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , ELFWriterInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) , STTI ( & TLInfo ) , VTTI ( & TLInfo ) {


<s> PM . add ( create<ISA_LIT>ISelDag ( * this ) ) ;


<s> bool <ISA_LIT>TargetMachine :: addPreEmitPass ( PassManagerBase & PM ) { PM . add ( create<ISA_LIT>DelaySlotFillerPass ( * this ) ) ;


<ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) :


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) :

LLVMTargetMachine ( T , TT , CPU , FS , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DataLayout ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , ELFWriterInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> bool <ISA_LIT>TargetMachine :: addInstSelector ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( create<ISA_LIT>ISelDag ( * this ) ) ; return false ;


<s> PM . add ( create<ISA_LIT>DelaySlotFillerPass ( * this ) ) ; return true ;


<s> bool <ISA_LIT>TargetMachine :: addPreEmitPass ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( create<ISA_LIT>DelaySlotFillerPass ( * this ) ) ;


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , Reloc :: Model RM , CodeModel :: Model CM ) : LLVMTargetMachine ( T , TT , CPU , FS , RM , CM ) , Subtarget ( TT , CPU , FS ) , DataLayout ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , ELFWriterInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> bool <ISA_LIT>TargetMachine :: addPreEmitPass ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( create<ISA_LIT>DelaySlotFillerPass ( * this ) ) ; return true ;


<s> addPreEmitPass ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( create<ISA_LIT>DelaySlotFillerPass ( * this ) ) ;


<s> virtual const InstrItineraryData * getInstrItineraryData ( ) const {


<s> virtual const <ISA_LIT>SelectionDAGInfo * getSelectionDAGInfo ( ) const {


<s> virtual const <ISA_LIT>TargetLowering * getTargetLowering ( ) const { return & TLInfo ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ; RegisterAsmInfo < <ISA_LIT>MCAsmInfo > A ( The<ISA_LIT>Target ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const std :: string & TT , const std :: string & FS ) : LLVMTargetMachine ( T , TT ) , Subtarget ( TT , FS ) , DataLayout ( <STR_LIT> <STR_LIT> ) , InstrInfo ( * this ) , FrameInfo ( TargetFrameInfo :: StackGrowsUp , <NUM_LIT> , <NUM_LIT> ) , TLInfo ( * this ) { if ( getRelocationModel ( ) == Reloc :: Default ) { setRelocationModel ( Reloc :: Static ) ;


<s> PM . add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ; return false ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) {

PM . add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> PM . add ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const std :: string & TT , const std :: string & FS ) : LLVMTargetMachine ( T , TT ) , Subtarget ( TT , FS ) , DataLayout ( <STR_LIT> <STR_LIT> ) , InstrInfo ( * this ) , FrameInfo ( TargetFrameInfo :: StackGrowsUp , <NUM_LIT> , <NUM_LIT> ) , TLInfo ( * this ) , TSInfo ( * this ) {

if ( getRelocationModel ( ) == Reloc :: Default ) {


<s> case Triple :: Darwin : llvm_unreachable ( <STR_LIT> ) ; return NULL ; case Triple :: MinGW32 : case Triple :: MinGW64 : case Triple :: Cygwin : case Triple :: Win32 : llvm_unreachable ( <STR_LIT> ) ; return NULL ; default :

return createELFStreamer ( Ctx , TAB , _OS , _Emitter , RelaxAll ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ;

RegisterAsmInfoFn A ( The<ISA_LIT>Target , createMCAsmInfo ) ;


<s> RegisterAsmInfoFn A ( The<ISA_LIT>Target , createMCAsmInfo ) ; TargetRegistry :: RegisterCodeEmitter ( The<ISA_LIT>Target , llvm :: create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const std :: string & TT , const std :: string & FS ) :

LLVMTargetMachine ( T , TT ) , Subtarget ( TT , FS ) , DataLayout ( <STR_LIT> ) , InstrInfo ( * this ) , FrameInfo ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , ELFWriterInfo ( * this ) {


<s> PM -> add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ; return false ;


<s> bool <ISA_LIT>PassConfig :: addPreEmitPass ( ) { PM -> add ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> PM -> add ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> addPass ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> addPass ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> virtual const TargetFrameInfo * getFrameInfo ( ) const {


<s> virtual const <ISA_LIT>InstrInfo * getInstrInfo ( ) const { return & InstrInfo ;


<s> const TargetIntrinsicInfo * getIntrinsicInfo ( ) const { return & IntrinsicInfo ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const { return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> return & InstrInfo . getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>Subtarget * getSubtargetImpl ( ) const { return & Subtarget ;


<s> virtual const TargetData * getTargetData ( ) const { return & DataLayout ;


<s> return const_cast < <ISA_LIT>TargetLowering * > ( & TLInfo ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC , SectionKind :: getBSS ( ) ) ;


<s> Initialize ( MCContext & Ctx , const TargetMachine & TM ) { TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ;

SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC , SectionKind :: getDataRel ( ) ) ;


<s> bool <ISA_LIT>TargetObjectFile :: IsGlobalInSmallSection ( const GlobalValue * GV , const TargetMachine & TM , SectionKind Kind ) const {

const GlobalVariable * GVA = dyn_cast < GlobalVariable > ( GV ) ;


<s> if ( ! Kind . isBSS ( ) && ! Kind . isDataRel ( ) ) return false ; if ( Kind . isMergeable1ByteCString ( ) ) return false ;

Type * Ty = GV -> getType ( ) -> getElementType ( ) ;


<s> static bool IsInSmallSection ( uint64_t Size ) { return Size > <NUM_LIT> && Size <= <NUM_LIT> ;


<s> if ( Kind . isBSS ( ) && IsGlobalInSmallSection ( GV , TM , Kind ) ) return SmallBSSSection ;

if ( Kind . isDataNoRel ( ) && IsGlobalInSmallSection ( GV , TM , Kind ) ) return SmallDataSection ;


<s> SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , MCSectionELF :: SHT_PROGBITS , MCSectionELF :: SHF_WRITE | MCSectionELF :: SHF_ALLOC , SectionKind :: getDataRel ( ) ) ;

SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , MCSectionELF :: SHT_NOBITS , MCSectionELF :: SHF_WRITE | MCSectionELF :: SHF_ALLOC , SectionKind :: getBSS ( ) ) ;


<s> void <ISA_LIT>TargetObjectFile :: Initialize ( MCContext & Ctx , const TargetMachine & TM ) {

TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ;


<s> if ( Kind . isMergeable1ByteCString ( ) ) return false ; Type * Ty = GV -> getType ( ) -> getElementType ( ) ; return IsInSmallSection ( TM . getTargetData ( ) -> getTypeAllocSize ( Ty ) ) ;