<s> MachineBasicBlock :: iterator MBBI = FirstMBB . begin ( ) ; MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetInstrInfo * TII = MF -> getTarget ( ) . getInstrInfo ( ) ; GlobalBaseReg = RegInfo . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( FirstMBB , MBBI , DebugLoc ( ) , TII -> get ( TargetOpcode :: COPY ) , GlobalBaseReg ) . addReg ( <STR_LIT> ) ; RegInfo . addLiveIn ( <STR_LIT> ) ; <ISA_LIT>FI -> setGlobalBaseReg ( GlobalBaseReg ) ;


<s> InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond , DebugLoc DL ) const { assert ( TBB && <STR_LIT> ) ; assert ( ( Cond . size ( ) == <NUM_LIT> || Cond . size ( ) == <NUM_LIT> ) && <STR_LIT> ) ; unsigned Opc = <STR_LIT> ; if ( ! Cond . empty ( ) ) Opc = ( unsigned ) Cond [ <NUM_LIT> ] . getImm ( ) ; if ( FBB == <NUM_LIT> ) { if ( Cond . empty ( ) ) BuildMI ( & MBB , DL , get ( Opc ) ) . addMBB ( TBB ) ; else BuildMI ( & MBB , DL , get ( Opc ) ) . addReg ( Cond [ <NUM_LIT> ] . getReg ( ) ) . addMBB ( TBB ) ; return <NUM_LIT> ;


<s> if ( ! Cond . empty ( ) ) Opc = ( unsigned ) Cond [ <NUM_LIT> ] . getImm ( ) ; if ( FBB == <NUM_LIT> ) { if ( Cond . empty ( ) ) BuildMI ( & MBB , DL , get ( Opc ) ) . addMBB ( TBB ) ; else BuildMI ( & MBB , DL , get ( Opc ) ) . addReg ( Cond [ <NUM_LIT> ] . getReg ( ) ) . addMBB ( TBB ) ; return <NUM_LIT> ;


<s> insertNoop ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const { DebugLoc DL ;

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) ;


<s> if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ;

return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> isStoreToStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } }


loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const {


<s> MachineBasicBlock :: iterator I = MBB . end ( ) ; if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; while ( I -> isDebugValue ( ) ) { if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; } if ( ! <STR_LIT> ( I -> getOpcode ( ) ) && ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ; I -> eraseFromParent ( ) ;


<s> } if ( ! <STR_LIT> ( I -> getOpcode ( ) ) && ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; if ( ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ;


<s> case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ; case <STR_LIT> : Cond [ <NUM_LIT> ] . setImm ( <STR_LIT> ) ; return false ;


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> llvm :: BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) . addReg ( <STR_LIT> ) ;


<s> const TargetInstrInfo * TII = MF -> getTarget ( ) . getInstrInfo ( ) ; GlobalBaseReg = RegInfo . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( FirstMBB , MBBI , DebugLoc ( ) , TII -> get ( TargetOpcode :: COPY ) , GlobalBaseReg ) . addReg ( <STR_LIT> ) ; RegInfo . addLiveIn ( <STR_LIT> ) ; <ISA_LIT>FI -> setGlobalBaseReg ( GlobalBaseReg ) ; return GlobalBaseReg ;


<s> assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ;

BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const {


<s> storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ;

BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> virtual MachineInstr * foldMemoryOperandImpl ( MachineFunction & MF , MachineInstr * MI , const SmallVectorImpl < unsigned > & Ops , MachineInstr * LoadMI ) const { return <NUM_LIT> ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( <ISA_LIT>TargetMachine & tm ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> ) , TM ( tm ) , RI ( * TM . getSubtargetImpl ( ) , * this ) {


<s> copyRegToReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , unsigned SrcReg , const TargetRegisterClass * DestRC , const TargetRegisterClass * SrcRC ) const { DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; llvm :: BuildMI ( MBB , I , dl , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg ) . addReg ( <STR_LIT> ) ;


<s> DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ;

assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ;


<s> DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ; BuildMI ( & MBB , dl , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return <NUM_LIT> ;


<s> if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) ;


<s> if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ;


<s> loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , int FI , const TargetRegisterClass * RC ) const { DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; BuildMI ( MBB , I , dl , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


copyRegToReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , unsigned SrcReg , const TargetRegisterClass * DestRC , const TargetRegisterClass * SrcRC ) const {


<s> DebugLoc DL ; llvm :: BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg ) . addReg ( <STR_LIT> ) ;


<s> bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } else { unsigned DstReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool isDead = MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ; bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( isDead ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } } break ;


<s> case <STR_LIT> : if ( ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) && ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) ) { if ( Ops [ <NUM_LIT> ] == <NUM_LIT> ) { unsigned SrcReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool isKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } else { unsigned DstReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool isDead = MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ; bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( isDead ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } } break ; }


<s> MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetInstrInfo * TII = MF -> getTarget ( ) . getInstrInfo ( ) ; GlobalBaseReg = RegInfo . createVirtualRegister ( <STR_LIT> ) ;

bool Ok = TII -> copyRegToReg ( FirstMBB , MBBI , GlobalBaseReg , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> virtual const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const { return RI ;


<s> unsigned <ISA_LIT>InstrInfo :: InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond ) const { assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ;

BuildMI ( & MBB , DebugLoc ( ) , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond ) const { assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ; BuildMI ( & MBB , DebugLoc ( ) , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ;


<s> insertNoop ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const { DebugLoc DL ;

if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ;


<s> isLoadFromStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } } return <NUM_LIT> ;


<s> if ( MI . getOperand ( <NUM_LIT> ) . isReg ( ) && MI . getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; SrcReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; return true ; } else if ( MI . getOperand ( <NUM_LIT> ) . isReg ( ) && MI . getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; SrcReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; return true ;


<s> if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } }


<s> static bool isZeroImm ( const MachineOperand & op ) { return op . isImm ( ) && op . getImm ( ) == <NUM_LIT> ;


<s> void <ISA_LIT>InstrInfo :: loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , int FI , const TargetRegisterClass * RC ) const { DebugLoc DL ; BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> case FCOND_OR : return <STR_LIT> ; case FCOND_EQ : case FCOND_NEQ : return <STR_LIT> ; case FCOND_UEQ : case FCOND_OGL : return <STR_LIT> ; case FCOND_OLT : case FCOND_UGE : return <STR_LIT> ; case FCOND_ULT : case FCOND_OGE : return <STR_LIT> ; case FCOND_OLE : case FCOND_UGT : return <STR_LIT> ; case FCOND_ULE : case FCOND_OGT : return <STR_LIT> ;


<s> case FCOND_F : case FCOND_T : return <STR_LIT> ; case FCOND_UN : case FCOND_OR : return <STR_LIT> ; case FCOND_EQ : case FCOND_NEQ : return <STR_LIT> ; case FCOND_UEQ : case FCOND_OGL : return <STR_LIT> ; case FCOND_OLT : case FCOND_UGE : return <STR_LIT> ; case FCOND_ULT : case FCOND_OGE : return <STR_LIT> ; case FCOND_OLE : case FCOND_UGT : return <STR_LIT> ; case FCOND_ULE : case FCOND_OGT : return <STR_LIT> ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( <ISA_LIT>TargetMachine & tm ) : TargetInstrInfoImpl ( <ISA_LIT>Insts , array_lengthof ( <ISA_LIT>Insts ) ) , TM ( tm ) , RI ( * TM . getSubtargetImpl ( ) , * this ) {


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC ) const { DebugLoc DL ; BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; AttributeSet AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> ) IntrID ) ;

return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( ) , IntrID ) , AList ) ) ;


<s> } ; assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; if ( IntrID < <STR_LIT> ) return <NUM_LIT> ; assert ( IntrID < <STR_LIT> && <STR_LIT> ) ; std :: string Result ( names [ IntrID - <STR_LIT> ] ) ; return Result ;


return FunctionType :: get ( ResultTy , ArgTys , IsVarArg ) ;


<s> bool <ISA_LIT>IntrinsicInfo :: isOverloaded ( unsigned IntrID ) const { if ( IntrID == <NUM_LIT> ) return false ; unsigned id = IntrID - <STR_LIT> + <NUM_LIT> ;


<s> if ( IntrID == <NUM_LIT> ) return false ; unsigned id = IntrID - <STR_LIT> + <NUM_LIT> ;


<s> if ( ! StringRef ( Name , Len ) . startswith ( <STR_LIT> ) ) return <NUM_LIT> ; return <NUM_LIT> ;


<s> AttrListPtr AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> ) IntrID ) ;


<s> assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ;

AttrListPtr AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> ) IntrID ) ;


<s> lookupName ( const char * Name , unsigned Len ) const { return <NUM_LIT> ;


<s> return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( ) , IntrID ) , AList ) ) ;


<s> assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; AttrListPtr AList = getAttributes ( ( <STR_LIT> ) IntrID ) ; return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( ) , IntrID ) , AList ) ) ;


<s> Type * ResultTy = NULL ; std :: vector < Type * > ArgTys ;


<s> AttrListPtr AList = getAttributes ( ( <STR_LIT> ) IntrID ) ; return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( ) , IntrID ) , AList ) ) ;


<s> } ; assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; if ( IntrID < <STR_LIT> ) return <NUM_LIT> ; assert ( IntrID < <STR_LIT> && <STR_LIT> ) ; std :: string Result ( names [ IntrID - <STR_LIT> ] ) ;


<s> std :: string <ISA_LIT>IntrinsicInfo :: getName ( unsigned IntrID , const Type * * Tys , unsigned numTys ) const { static const char * const names [ ] = { } ;

assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ;


<s> static const FunctionType * getType ( LLVMContext & Context , unsigned id ) { const Type * ResultTy = NULL ; std :: vector < const Type * > ArgTys ; bool IsVarArg = false ;


<s> std :: vector < const Type * > ArgTys ; bool IsVarArg = false ; return FunctionType :: get ( ResultTy , ArgTys , IsVarArg ) ;


<s> bool <ISA_LIT>IntrinsicInfo :: isOverloaded ( unsigned IntrID ) const { const bool OTable [ ] = {


<s> bool <ISA_LIT>IntrinsicInfo :: isOverloaded ( unsigned IntrID ) const { const bool OTable [ ] = { } ;

if ( IntrID == <NUM_LIT> ) return false ;


<s> lookupGCCName ( const char * Name ) const {


<s> return <STR_LIT> ( <STR_LIT> , Name ) ;


<s> if ( Len < <NUM_LIT> || Name [ <NUM_LIT> ] != '.' || Name [ <NUM_LIT> ] != 'l' || Name [ <NUM_LIT> ] != 'l' || Name [ <NUM_LIT> ] != 'v' || Name [ <NUM_LIT> ] != 'm' ) return <NUM_LIT> ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getGlobalBaseReg ( ) { unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ; return CurDAG -> getRegister ( GlobalBaseReg , TLI . getPointerTy ( ) ) . getNode ( ) ;


<s> return CurDAG -> getRegister ( GlobalBaseReg , TLI . getPointerTy ( ) ) . getNode ( ) ;


<s> return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ;

SDValue Ops [ ] = { Callee , GPReg , Chain } ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: Select ( SDNode * Node ) { unsigned Opcode = Node -> getOpcode ( ) ; DebugLoc dl = Node -> getDebugLoc ( ) ; DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; if ( Node -> isMachineOpcode ( ) ) { DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; return NULL ; } switch ( Opcode ) { default : break ; case <STR_LIT> : return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ;

Chain = SDValue ( ResNode , <NUM_LIT> ) ;


<s> } else { if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) ) return false ; } if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { if ( isUInt < <NUM_LIT> > ( CN -> getZExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; } else { Base = Addr . getOperand ( <NUM_LIT> ) ; } Offset = CurDAG -> getTargetConstant ( CN -> getZExtValue ( ) , <STR_LIT> ) ; return true ; } } } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ;


<s> return true ; } } else if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( N ) ) { uint32_t Imm = CN -> getZExtValue ( ) ; Disp = CurDAG -> getTargetConstant ( Imm , CN -> getValueType ( <NUM_LIT> ) ) ; Base = CurDAG -> getRegister ( <STR_LIT> , CN -> getValueType ( <NUM_LIT> ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; return true ; } Disp = CurDAG -> getTargetConstant ( <NUM_LIT> , TM . getTargetLowering ( ) -> getPointerTy ( ) ) ;

if ( FrameIndexSDNode * FI = dyn_cast < FrameIndexSDNode > ( N ) ) Base = CurDAG -> getTargetFrameIndex ( FI -> getIndex ( ) , N . getValueType ( ) ) ;


<s> unsigned Opcode = Node -> getOpcode ( ) ; DebugLoc dl = Node -> getDebugLoc ( ) ; if ( Node -> isMachineOpcode ( ) ) return NULL ; switch ( Opcode ) { default : break ; case <STR_LIT> : return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) , <NUM_LIT> ) ;


<s> unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ; Chain = SDValue ( ResNode , <NUM_LIT> ) ; InFlag = SDValue ( ResNode , <NUM_LIT> ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , Chain ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , InFlag ) ; return ResNode ; } } } SDNode * ResNode = SelectCode ( Node ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; if ( ResNode == NULL || ResNode == Node ) DEBUG ( Node -> dump ( CurDAG ) ) ; else DEBUG ( ResNode -> dump ( CurDAG ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ;


<s> } if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { if ( Predicate_immSExt16 ( CN ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; } else { Base = Addr . getOperand ( <NUM_LIT> ) ; } Offset = CurDAG -> getTargetConstant ( CN -> getZExtValue ( ) , <STR_LIT> ) ; return true ; } } } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getGlobalBaseReg ( ) { unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ; return CurDAG -> getRegister ( GlobalBaseReg , TLI -> getPointerTy ( ) ) . getNode ( ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getGlobalBaseReg ( ) { unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ;

return CurDAG -> getRegister ( GlobalBaseReg , TLI -> getPointerTy ( ) ) . getNode ( ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) {

return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ;

return CurDAG -> getRegister ( GlobalBaseReg , getTargetLowering ( ) -> getPointerTy ( ) ) . getNode ( ) ;


<s> return CurDAG -> getRegister ( GlobalBaseReg , getTargetLowering ( ) -> getPointerTy ( ) ) . getNode ( ) ;


<s> return CurDAG -> getTargetConstant ( Imm , <STR_LIT> ) ;


<s> inline SDValue getI32Imm ( unsigned Imm ) { return CurDAG -> getTargetConstant ( Imm , <STR_LIT> ) ;


<s> return getTargetMachine ( ) . getInstrInfo ( ) ;


<s> virtual const char * getPassName ( ) const {


<s> const <ISA_LIT>TargetMachine & getTargetMachine ( ) {

return static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> return isIntS32Immediate ( Op . getNode ( ) , Imm ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & tm ) :

SelectionDAGISel ( tm ) , TM ( tm ) , Subtarget ( tm . getSubtarget < <ISA_LIT>Subtarget > ( ) ) {


<s> SelectionDAGISel ( tm ) , TM ( tm ) , Subtarget ( tm . getSubtarget < <ISA_LIT>Subtarget > ( ) ) {


<s> if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ; Chain = SDValue ( ResNode , <NUM_LIT> ) ; InFlag = SDValue ( ResNode , <NUM_LIT> ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , Chain ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , InFlag ) ; return ResNode ; } } } SDNode * ResNode = SelectCode ( Node ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; if ( ResNode == NULL || ResNode == Node ) DEBUG ( Node -> dump ( CurDAG ) ) ; else DEBUG ( ResNode -> dump ( CurDAG ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ;


<s> if ( SelectAddrRegReg ( N , Base , Disp ) ) return false ; if ( N . getOpcode ( ) == <STR_LIT> || N . getOpcode ( ) == <STR_LIT> ) { int32_t imm = <NUM_LIT> ; if ( isIntS32Immediate ( N . getOperand ( <NUM_LIT> ) , imm ) ) { Disp = CurDAG -> getTargetConstant ( imm , <STR_LIT> ) ; if ( FrameIndexSDNode * FI = dyn_cast < FrameIndexSDNode > ( N . getOperand ( <NUM_LIT> ) ) ) { Base = CurDAG -> getTargetFrameIndex ( FI -> getIndex ( ) , N . getValueType ( ) ) ; } else { Base = N . getOperand ( <NUM_LIT> ) ;


<s> if ( N . getOpcode ( ) == <STR_LIT> || N . getOpcode ( ) == <STR_LIT> ) { if ( isIntS32Immediate ( N . getOperand ( <NUM_LIT> ) , imm ) ) return false ; if ( N . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> || N . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return false ; Base = N . getOperand ( <NUM_LIT> ) ; Index = N . getOperand ( <NUM_LIT> ) ;


<s> std :: pair < unsigned , const TargetRegisterClass * > <ISA_LIT>TargetLowering :: getRegForInlineAsmConstraint ( const std :: string & Constraint , EVT VT ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { case 'r' :

return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ;


<s> case 'y' : case 'f' : if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } } return TargetLowering :: getRegForInlineAsmConstraint ( Constraint , VT ) ;


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( EVT VT ) const {


<s> SelectionDAG & DAG = CLI . DAG ; DebugLoc & dl = CLI . DL ; SmallVector < <STR_LIT> , <NUM_LIT> > & Outs = CLI . Outs ; SmallVector < SDValue , <NUM_LIT> > & OutVals = CLI . OutVals ; SmallVector < <STR_LIT> , <NUM_LIT> > & Ins = CLI . Ins ; SDValue Chain = CLI . Chain ; SDValue Callee = CLI . Callee ; bool & isTailCall = CLI . IsTailCall ; CallingConv :: ID CallConv = CLI . CallConv ; bool isVarArg = CLI . IsVarArg ; isTailCall = false ; bool needsRegArgSlots = isVarArg ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering & TFI = * MF . getTarget ( ) . getFrameLowering ( ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallOperands ( Outs , CC_<ISA_LIT> ) ; unsigned NumBytes = CCInfo . getNextStackOffset ( ) ; if ( isVarArg && NumBytes < <NUM_LIT> ) NumBytes = <NUM_LIT> ; Chain = DAG . getCALLSEQ_START ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) ) ; SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; MVT RegVT = VA . getLocVT ( ) ; SDValue Arg = OutVals [ i ] ; switch ( VA . getLocInfo ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case CCValAssign :: Full : break ; case CCValAssign :: SExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: ZExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ;


<s> for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ;


<s> LowerConstantPool ( SDValue Op , SelectionDAG & DAG ) const { SDValue ResNode ; ConstantPoolSDNode * N = cast < ConstantPoolSDNode > ( Op ) ;

const Constant * C = N -> getConstVal ( ) ;


<s> std :: vector < SDValue > OutChains ; unsigned ArgRegEnd = <NUM_LIT> ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; SDValue StackPtr ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( VA . isRegLoc ( ) ) { MVT RegVT = VA . getLocVT ( ) ; ArgRegEnd = VA . getLocReg ( ) ; const TargetRegisterClass * RC ; if ( RegVT == <STR_LIT> ) RC = & <STR_LIT> ; else if ( RegVT == <STR_LIT> ) RC = & <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; unsigned Reg = MF . addLiveIn ( ArgRegEnd , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , Reg , RegVT ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ;

unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ;


<s> LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GA ) ;


<s> JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ;

SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , <NUM_LIT> ) ;


<s> Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; } unsigned Ret = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; unsigned Reg = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; SDValue DReg = DAG . getRegister ( Reg , <STR_LIT> ) ; if ( Flag . getNode ( ) ) return DAG . getNode ( Ret , dl , <STR_LIT> , Chain , DReg , Flag ) ; return DAG . getNode ( Ret , dl , <STR_LIT> , Chain , DReg ) ;


<s> if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) { for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) if ( RVLocs [ i ] . isRegLoc ( ) ) DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ; } SDValue Flag ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; } unsigned Ret = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; unsigned Reg = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ;

SDValue DReg = DAG . getRegister ( Reg , <STR_LIT> ) ;


<s> SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueVal = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; DebugLoc dl = Op . getDebugLoc ( ) ; unsigned Opc ;


<s> const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , dl , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) , false , false , <NUM_LIT> ) ;


<s> const unsigned NumArgRegs = array_lengthof ( ArgRegs ) ; unsigned Reg = State . AllocateReg ( ArgRegs , NumArgRegs ) ; if ( ! Reg ) return false ; unsigned SizeInBytes = ValVT . getSizeInBits ( ) >> <NUM_LIT> ; State . AllocateStack ( SizeInBytes , SizeInBytes ) ;

State . addLoc ( CCValAssign :: getReg ( ValNo , ValVT , Reg , LocVT , LocInfo ) ) ;


<s> MachineBasicBlock * finish = F -> CreateMachineBasicBlock ( LLVM_BB ) ; F -> insert ( It , loop ) ; F -> insert ( It , finish ) ; finish -> splice ( finish -> begin ( ) , MBB , llvm :: next ( MachineBasicBlock :: iterator ( MI ) ) , MBB -> end ( ) ) ; finish -> transferSuccessorsAndUpdatePHIs ( MBB ) ; MBB -> addSuccessor ( loop ) ; MBB -> addSuccessor ( finish ) ; loop -> addSuccessor ( finish ) ; loop -> addSuccessor ( loop ) ; unsigned IAMT = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) , IAMT ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; unsigned IVAL = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) , IVAL ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) ) . addReg ( IAMT ) . addMBB ( finish ) ; unsigned DST = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NDST = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , DST ) . addReg ( IVAL ) . addMBB ( MBB ) . addReg ( NDST ) . addMBB ( loop ) ; unsigned SAMT = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NAMT = R . createVirtualRegister ( <STR_LIT> ) ;

BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , SAMT ) . addReg ( IAMT ) . addMBB ( MBB ) . addReg ( NAMT ) . addMBB ( loop ) ;


<s> std :: pair < unsigned , const TargetRegisterClass * > <ISA_LIT>TargetLowering :: getRegForInlineAsmConstraint ( const std :: string & Constraint , EVT VT ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { case 'r' : return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; case 'd' : case 'y' : case 'f' : if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; }


<s> MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; } } if ( needsRegArgSlots && TFI . hasReservedCallFrame ( MF ) ) MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> , <NUM_LIT> ) ; else if ( ExternalSymbolSDNode * S = dyn_cast < ExternalSymbolSDNode > ( Callee ) ) Callee = DAG . getTargetExternalSymbol ( S -> getSymbol ( ) , getPointerTy ( ) , <NUM_LIT> ) ; SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Ops . push_back ( DAG . getRegister ( RegsToPass [ i ] . first , RegsToPass [ i ] . second . getValueType ( ) ) ) ; }

if ( InFlag . getNode ( ) ) Ops . push_back ( InFlag ) ;


<s> if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; TargetRegisterClass * RC = <STR_LIT> ; unsigned Begin = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned Start = get<ISA_LIT>RegisterNumbering ( ArgRegEnd + <NUM_LIT> ) ; unsigned End = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned StackLoc = Start - Begin + <NUM_LIT> ; for ( ; Start <= End ; ++ Start , ++ StackLoc ) { unsigned Reg = get<ISA_LIT>RegisterFromNumbering ( Start ) ; unsigned LiveReg = MF . addLiveIn ( Reg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , LiveReg , <STR_LIT> ) ; int FI = MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordStoreVarArgsFI ( FI , - ( StackLoc * <NUM_LIT> ) ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; OutChains . push_back ( DAG . getStore ( Chain , dl , ArgValue , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ;

if ( ! <ISA_LIT>FI -> getVarArgsFrameIndex ( ) ) <ISA_LIT>FI -> setVarArgsFrameIndex ( FI ) ;


<s> LowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> SDValue Flag ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; } unsigned Ret = ( CallConv == llvm :: CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ;

unsigned Reg = ( CallConv == llvm :: CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ;


<s> Constant * C = N -> getConstVal ( ) ; SDValue Zero = DAG . getConstant ( <NUM_LIT> , PtrVT ) ; DebugLoc dl = Op . getDebugLoc ( ) ; SDValue CP = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlignment ( ) , N -> getOffset ( ) , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CP ) ;


<s> SDValue CP = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlignment ( ) , N -> getOffset ( ) , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CP ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) { DebugLoc dl = Op . getDebugLoc ( ) ; GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GA ) ;


<s> LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) { DebugLoc dl = Op . getDebugLoc ( ) ; GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GA ) ;


<s> if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; TargetRegisterClass * RC = <STR_LIT> ; unsigned Begin = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned Start = get<ISA_LIT>RegisterNumbering ( ArgRegEnd + <NUM_LIT> ) ; unsigned End = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned StackLoc = Start - Begin + <NUM_LIT> ; for ( ; Start <= End ; ++ Start , ++ StackLoc ) { unsigned Reg = get<ISA_LIT>RegisterFromNumbering ( Start ) ; unsigned LiveReg = MF . addLiveIn ( Reg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , LiveReg , <STR_LIT> ) ;

int FI = MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ;


<s> unsigned StackReg = MF . getTarget ( ) . getRegisterInfo ( ) -> getFrameRegister ( MF ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( <NUM_LIT> ) ; std :: vector < SDValue > OutChains ; unsigned ArgRegEnd = <NUM_LIT> ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; SDValue StackPtr ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( VA . isRegLoc ( ) ) { MVT RegVT = VA . getLocVT ( ) ; ArgRegEnd = VA . getLocReg ( ) ; const TargetRegisterClass * RC ; if ( RegVT == <STR_LIT> ) RC = <STR_LIT> ; else if ( RegVT == <STR_LIT> ) RC = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; unsigned Reg = MF . addLiveIn ( ArgRegEnd , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , Reg , RegVT ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ;

const TargetRegisterClass * RC = <STR_LIT> ;


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; if ( ! Subtarget -> hasMul ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } if ( ! Subtarget -> hasMul ( ) || ! Subtarget -> hasMul64 ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } if ( ! Subtarget -> hasDiv ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> <ISA_LIT>TargetLowering :: ConstraintType <ISA_LIT>TargetLowering :: getConstraintType ( const std :: string & Constraint ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { default : break ; case 'd' : case 'y' : case 'f' : return C_RegisterClass ; break ;


<s> unsigned <ISA_LIT>TargetLowering :: getFunctionAlignment ( const Function * ) const { return <NUM_LIT> ;


<s> return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; case 'f' :

if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ;


<s> return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; case 'f' : if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ;


<s> <STR_LIT> <ISA_LIT>TargetLowering :: getSetCCResultType ( EVT VT ) const {


<s> SDValue <ISA_LIT>TargetLowering :: LowerCall ( SDValue Chain , SDValue Callee , CallingConv :: ID CallConv , bool isVarArg , bool & isTailCall , const SmallVectorImpl < <STR_LIT> > & Outs , const SmallVectorImpl < <STR_LIT> > & Ins , DebugLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) { isTailCall = false ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallOperands ( Outs , CC_<ISA_LIT>2 ) ; unsigned NumBytes = CCInfo . getNextStackOffset ( ) ; Chain = DAG . getCALLSEQ_START ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) ) ; SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; int LastArgStackLoc = <NUM_LIT> ; unsigned FirstStackArgLoc = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; EVT RegVT = VA . getLocVT ( ) ; SDValue Arg = Outs [ i ] . Val ; switch ( VA . getLocInfo ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case CCValAssign :: Full : break ; case CCValAssign :: SExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: ZExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: AExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; } if ( VA . isRegLoc ( ) ) { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; LastArgStackLoc = ( FirstStackArgLoc + VA . getLocMemOffset ( ) ) ; int FI = MFI -> CreateFixedObject ( VA . getValVT ( ) . getSizeInBits ( ) / <NUM_LIT> , LastArgStackLoc , true , false ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , NULL , <NUM_LIT> , false , false , <NUM_LIT> ) ) ;


<s> RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; LastArgStackLoc = ( FirstStackArgLoc + VA . getLocMemOffset ( ) ) ; int FI = MFI -> CreateFixedObject ( VA . getValVT ( ) . getSizeInBits ( ) / <NUM_LIT> , LastArgStackLoc , true , false ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , NULL , <NUM_LIT> , false , false , <NUM_LIT> ) ) ; } } if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } unsigned char OpFlag = <STR_LIT> ; if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , getPointerTy ( ) , <NUM_LIT> , OpFlag ) ; else if ( ExternalSymbolSDNode * S = dyn_cast < ExternalSymbolSDNode > ( Callee ) ) Callee = DAG . getTargetExternalSymbol ( S -> getSymbol ( ) , getPointerTy ( ) , OpFlag ) ; SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Ops . push_back ( DAG . getRegister ( RegsToPass [ i ] . first , RegsToPass [ i ] . second . getValueType ( ) ) ) ; } if ( InFlag . getNode ( ) ) Ops . push_back ( InFlag ) ; Chain = DAG . getNode ( <STR_LIT> , dl , NodeTys , & Ops [ <NUM_LIT> ] , Ops . size ( ) ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; Chain = DAG . getCALLSEQ_END ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) , DAG . getIntPtrConstant ( <NUM_LIT> , true ) , InFlag ) ; if ( ! Ins . empty ( ) ) InFlag = Chain . getValue ( <NUM_LIT> ) ;

return LowerCallResult ( Chain , InFlag , CallConv , isVarArg , Ins , dl , DAG , InVals ) ;


<s> for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ; }


<s> CCState CCInfo ( CallConv , isVarArg , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ;

InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ;


<s> ConstantPoolSDNode * N = cast < ConstantPoolSDNode > ( Op ) ; const Constant * C = N -> getConstVal ( ) ; SDValue Zero = DAG . getConstant ( <NUM_LIT> , PtrVT ) ; DebugLoc dl = Op . getDebugLoc ( ) ; SDValue CP = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlignment ( ) , N -> getOffset ( ) , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CP ) ;


<s> DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ;

SDValue GA = DAG . getTargetGlobalAddress ( GV , <STR_LIT> ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) { llvm_unreachable ( <STR_LIT> ) ;


<s> SDValue HiPart ; DebugLoc dl = Op . getDebugLoc ( ) ; bool IsPIC = getTargetMachine ( ) . getRelocationModel ( ) == Reloc :: PIC_ ; unsigned char OpFlag = IsPIC ? <STR_LIT> : <STR_LIT> ;


<s> case <STR_LIT> : return LowerConstantPool ( Op , DAG ) ; case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return LowerGlobalTLSAddress ( Op , DAG ) ; case <STR_LIT> : return LowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT_CC ( Op , DAG ) ; case <STR_LIT> : return LowerVASTART ( Op , DAG ) ;


<s> SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; DebugLoc dl = Op . getDebugLoc ( ) ; unsigned Opc ; SDValue CompareFlag ; if ( LHS . getValueType ( ) == <STR_LIT> ) { Opc = <STR_LIT> ;

CompareFlag = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , LHS , RHS ) . getValue ( <NUM_LIT> ) ;


<s> SDValue FI = DAG . getFrameIndex ( VarArgsFrameIndex , getPointerTy ( ) ) ;

const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;


<s> return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , dl , FI , Op . getOperand ( <NUM_LIT> ) , SV , <NUM_LIT> , false , false , <NUM_LIT> ) ;


<s> } setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , Promote ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; if ( ! Subtarget -> hasMul ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } if ( ! Subtarget -> hasMul ( ) || ! Subtarget -> hasMul64 ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } if ( ! Subtarget -> hasDiv ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ;


<s> } } if ( needsRegArgSlots && TFI . hasReservedCallFrame ( MF ) ) MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> , <NUM_LIT> ) ; else if ( ExternalSymbolSDNode * S = dyn_cast < ExternalSymbolSDNode > ( Callee ) ) Callee = DAG . getTargetExternalSymbol ( S -> getSymbol ( ) , getPointerTy ( ) , <NUM_LIT> ) ; SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Ops . push_back ( DAG . getRegister ( RegsToPass [ i ] . first , RegsToPass [ i ] . second . getValueType ( ) ) ) ; } if ( InFlag . getNode ( ) ) Ops . push_back ( InFlag ) ; Chain = DAG . getNode ( <STR_LIT> , dl , NodeTys , & Ops [ <NUM_LIT> ] , Ops . size ( ) ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; Chain = DAG . getCALLSEQ_END ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) , DAG . getIntPtrConstant ( <NUM_LIT> , true ) , InFlag , dl ) ; if ( ! Ins . empty ( ) ) InFlag = Chain . getValue ( <NUM_LIT> ) ;


<s> BB -> addSuccessor ( loop ) ; BB -> addSuccessor ( finish ) ; loop -> addSuccessor ( finish ) ; loop -> addSuccessor ( loop ) ; unsigned IAMT = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( BB , dl , TII -> get ( <STR_LIT> ) , IAMT ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; unsigned IVAL = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( BB , dl , TII -> get ( <STR_LIT> ) , IVAL ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( BB , dl , TII -> get ( <STR_LIT> ) ) . addReg ( IAMT ) . addMBB ( finish ) ; unsigned DST = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NDST = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , DST ) . addReg ( IVAL ) . addMBB ( BB ) . addReg ( NDST ) . addMBB ( loop ) ; unsigned SAMT = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NAMT = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , SAMT ) . addReg ( IAMT ) . addMBB ( BB ) . addReg ( NAMT ) . addMBB ( loop ) ; if ( MI -> getOpcode ( ) == <STR_LIT> ) BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , NDST ) . addReg ( DST ) . addReg ( DST ) ; else if ( MI -> getOpcode ( ) == <STR_LIT> ) BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , NDST ) . addReg ( DST ) ; else if ( MI -> getOpcode ( ) == <STR_LIT> ) BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , NDST ) . addReg ( DST ) ; else llvm_unreachable ( <STR_LIT> ) ;

BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , NAMT ) . addReg ( SAMT ) . addImm ( - <NUM_LIT> ) ;


<s> Chain = DAG . getCALLSEQ_START ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) ) ; SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; int LastArgStackLoc = <NUM_LIT> ; unsigned FirstStackArgLoc = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; EVT RegVT = VA . getLocVT ( ) ; SDValue Arg = OutVals [ i ] ; switch ( VA . getLocInfo ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case CCValAssign :: Full : break ; case CCValAssign :: SExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: ZExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: AExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; } if ( VA . isRegLoc ( ) ) { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; LastArgStackLoc = ( FirstStackArgLoc + VA . getLocMemOffset ( ) ) ; int FI = MFI -> CreateFixedObject ( VA . getValVT ( ) . getSizeInBits ( ) / <NUM_LIT> , LastArgStackLoc , true ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , NULL , <NUM_LIT> , false , false , <NUM_LIT> ) ) ; } } if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } unsigned char OpFlag = <STR_LIT> ;

if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> , OpFlag ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerCallResult ( SDValue Chain , SDValue InFlag , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , DebugLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ;

InFlag = Chain . getValue ( <NUM_LIT> ) ;


<s> LowerCallResult ( SDValue Chain , SDValue InFlag , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , DebugLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ;


<s> SDValue CP = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlignment ( ) , N -> getOffset ( ) , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CP ) ;


<s> DebugLoc dl = Op . getDebugLoc ( ) ; bool IsPIC = getTargetMachine ( ) . getRelocationModel ( ) == Reloc :: PIC_ ; unsigned char OpFlag = IsPIC ? <STR_LIT> : <STR_LIT> ; EVT PtrVT = Op . getValueType ( ) ; JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ; SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , OpFlag ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , JTI ) ;


<s> unsigned char OpFlag = IsPIC ? <STR_LIT> : <STR_LIT> ; EVT PtrVT = Op . getValueType ( ) ; JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ; SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , OpFlag ) ;

return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , JTI ) ;


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , RetCC_<ISA_LIT> ) ; if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) { for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) if ( RVLocs [ i ] . isRegLoc ( ) ) DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ; } SDValue Flag ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ;

Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ;


<s> SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueVal = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; DebugLoc dl = Op . getDebugLoc ( ) ; unsigned Opc ; SDValue CompareFlag ; if ( LHS . getValueType ( ) == <STR_LIT> ) {


<s> MachineFunction & MF = DAG . getMachineFunction ( ) ; <ISA_LIT>FunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; DebugLoc dl = Op . getDebugLoc ( ) ;

SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ;


<s> case 'r' : return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; case 'f' :


<s> case 'r' : return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; case 'f' : if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , <STR_LIT> ) ; }


<s> ConstraintWeight weight = CW_Invalid ; Value * CallOperandVal = info . CallOperandVal ; if ( CallOperandVal == NULL ) return CW_Default ; const Type * type = CallOperandVal -> getType ( ) ; switch ( * constraint ) { default : weight = TargetLowering :: getSingleConstraintMatchWeight ( info , constraint ) ; break ; case 'd' : case 'y' : if ( type -> isIntegerTy ( ) ) weight = CW_Register ;


<s> break ; case CCValAssign :: ZExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: AExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; } if ( VA . isRegLoc ( ) ) { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; needsRegArgSlots = false ; unsigned ArgSize = VA . getValVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , StackLoc , true ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; } } if ( needsRegArgSlots && TFI . hasReservedCallFrame ( MF ) ) MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; }

if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> , <NUM_LIT> ) ;


<s> if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; TargetRegisterClass * RC = <STR_LIT> ; unsigned Begin = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ; unsigned Start = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ArgRegEnd + <NUM_LIT> ) ; unsigned End = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ; unsigned StackLoc = Start - Begin + <NUM_LIT> ; for ( ; Start <= End ; ++ Start , ++ StackLoc ) { unsigned Reg = <ISA_LIT>RegisterInfo :: getRegisterFromNumbering ( Start ) ; unsigned LiveReg = MF . addLiveIn ( Reg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , LiveReg , <STR_LIT> ) ; int FI = MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordStoreVarArgsFI ( FI , - ( StackLoc * <NUM_LIT> ) ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; OutChains . push_back ( DAG . getStore ( Chain , dl , ArgValue , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ;

if ( ! <ISA_LIT>FI -> getVarArgsFrameIndex ( ) ) <ISA_LIT>FI -> setVarArgsFrameIndex ( FI ) ;


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } if ( ! Subtarget -> hasDiv ( ) ) { setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; } setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> unsigned SizeInBytes = ValVT . getSizeInBits ( ) >> <NUM_LIT> ; State . AllocateStack ( SizeInBytes , SizeInBytes ) ; State . addLoc ( CCValAssign :: getReg ( ValNo , ValVT , Reg , LocVT , LocInfo ) ) ;


<s> static const uint16_t ArgRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const unsigned NumArgRegs = array_lengthof ( ArgRegs ) ;

unsigned Reg = State . AllocateReg ( ArgRegs , NumArgRegs ) ;


<s> case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; break ; } F -> insert ( It , flsBB ) ; F -> insert ( It , dneBB ) ; dneBB -> splice ( dneBB -> begin ( ) , MBB , llvm :: next ( MachineBasicBlock :: iterator ( MI ) ) , MBB -> end ( ) ) ; dneBB -> transferSuccessorsAndUpdatePHIs ( MBB ) ; MBB -> addSuccessor ( flsBB ) ; MBB -> addSuccessor ( dneBB ) ; flsBB -> addSuccessor ( dneBB ) ;

BuildMI ( MBB , dl , TII -> get ( Opc ) ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addMBB ( dneBB ) ;


<s> case <STR_LIT> : return EmitCustomSelect ( MI , MBB ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return EmitCustomAtomic ( MI , MBB ) ; case <STR_LIT> : MI -> eraseFromParent ( ) ; return MBB ; }


<s> <ISA_LIT>TargetLowering :: ConstraintType <ISA_LIT>TargetLowering :: getConstraintType ( const std :: string & Constraint ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { default : break ; case 'd' : case 'y' : case 'f' : return C_RegisterClass ; } }

return TargetLowering :: getConstraintType ( Constraint ) ;


<s> case 'd' : case 'y' : case 'f' : return C_RegisterClass ; } } return TargetLowering :: getConstraintType ( Constraint ) ;


<s> case LT : return GE ; case GE : return LT ;


<s> case GT : return LE ; case LT : return GE ;


<s> case 'y' : case 'f' : if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } } return TargetLowering :: getRegForInlineAsmConstraint ( Constraint , VT ) ;


<s> std :: pair < unsigned , const TargetRegisterClass * > <ISA_LIT>TargetLowering :: getRegForInlineAsmConstraint ( const std :: string & Constraint , MVT VT ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { case 'r' : return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; case 'd' :


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( LLVMContext & , EVT ) const { return <STR_LIT> ;


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( LLVMContext & , EVT ) const {


<s> TargetLowering :: ConstraintWeight <ISA_LIT>TargetLowering :: getSingleConstraintMatchWeight ( AsmOperandInfo & info , const char * constraint ) const { ConstraintWeight weight = CW_Invalid ; Value * CallOperandVal = info . CallOperandVal ; if ( CallOperandVal == NULL ) return CW_Default ; Type * type = CallOperandVal -> getType ( ) ; switch ( * constraint ) { default : weight = TargetLowering :: getSingleConstraintMatchWeight ( info , constraint ) ; break ; case 'd' : case 'y' : if ( type -> isIntegerTy ( ) ) weight = CW_Register ; break ; case 'f' : if ( type -> isFloatTy ( ) ) weight = CW_Register ; break ; } return weight ;


<s> TargetLowering :: ConstraintWeight <ISA_LIT>TargetLowering :: getSingleConstraintMatchWeight ( AsmOperandInfo & info , const char * constraint ) const { ConstraintWeight weight = CW_Invalid ; Value * CallOperandVal = info . CallOperandVal ; if ( CallOperandVal == NULL ) return CW_Default ; Type * type = CallOperandVal -> getType ( ) ; switch ( * constraint ) { default : weight = TargetLowering :: getSingleConstraintMatchWeight ( info , constraint ) ; break ; case 'd' : case 'y' : if ( type -> isIntegerTy ( ) ) weight = CW_Register ; break ; case 'f' : if ( type -> isFloatTy ( ) ) weight = CW_Register ; break ;


<s> switch ( Opcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


isOffsetFoldingLegal ( const GlobalAddressSDNode * GA ) const {


<s> bool & isTailCall = CLI . IsTailCall ; CallingConv :: ID CallConv = CLI . CallConv ; bool isVarArg = CLI . IsVarArg ; isTailCall = false ; bool needsRegArgSlots = isVarArg ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering & TFI = * MF . getTarget ( ) . getFrameLowering ( ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallOperands ( Outs , CC_<ISA_LIT> ) ; unsigned NumBytes = CCInfo . getNextStackOffset ( ) ; if ( isVarArg && NumBytes < <NUM_LIT> ) NumBytes = <NUM_LIT> ; Chain = DAG . getCALLSEQ_START ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) , dl ) ; SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; MVT RegVT = VA . getLocVT ( ) ; SDValue Arg = OutVals [ i ] ; switch ( VA . getLocInfo ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case CCValAssign :: Full : break ; case CCValAssign :: SExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: ZExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; case CCValAssign :: AExt : Arg = DAG . getNode ( <STR_LIT> , dl , RegVT , Arg ) ; break ; } if ( VA . isRegLoc ( ) ) { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; needsRegArgSlots = false ; unsigned ArgSize = VA . getValVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , StackLoc , true ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ;

MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ;


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ;


<s> LowerConstantPool ( SDValue Op , SelectionDAG & DAG ) const { SDValue ResNode ; ConstantPoolSDNode * N = cast < ConstantPoolSDNode > ( Op ) ; const Constant * C = N -> getConstVal ( ) ; SDLoc dl ( Op ) ; SDValue CP = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlignment ( ) , N -> getOffset ( ) , <NUM_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CP ) ;


<s> ConstantPoolSDNode * N = cast < ConstantPoolSDNode > ( Op ) ; const Constant * C = N -> getConstVal ( ) ;


<s> const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ;

SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> ) ;


<s> SDLoc dl ( Op ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ;


<s> LowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> LowerJumpTable ( SDValue Op , SelectionDAG & DAG ) const { SDValue ResNode ; SDValue HiPart ; SDLoc dl ( Op ) ; EVT PtrVT = Op . getValueType ( ) ; JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ; SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , <NUM_LIT> ) ;


<s> SDValue ResNode ; SDValue HiPart ; SDLoc dl ( Op ) ; EVT PtrVT = Op . getValueType ( ) ; JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ;

SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , <NUM_LIT> ) ;


<s> case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return LowerGlobalTLSAddress ( Op , DAG ) ; case <STR_LIT> : return LowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT_CC ( Op , DAG ) ; case <STR_LIT> : return LowerVASTART ( Op , DAG ) ; } return SDValue ( ) ;


<s> RetOps . push_back ( DAG . getRegister ( Reg , <STR_LIT> ) ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) RetOps . push_back ( Flag ) ; return DAG . getNode ( Ret , dl , <STR_LIT> , & RetOps [ <NUM_LIT> ] , RetOps . size ( ) ) ;


<s> for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ;

RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ;


<s> SDLoc dl ( Op ) ; unsigned Opc ; SDValue CompareFlag ; if ( LHS . getValueType ( ) == <STR_LIT> ) { Opc = <STR_LIT> ; CompareFlag = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , LHS , RHS ) . getValue ( <NUM_LIT> ) ; } else { llvm_unreachable ( <STR_LIT> ) ; } return DAG . getNode ( Opc , dl , TrueVal . getValueType ( ) , TrueVal , FalseVal , CompareFlag ) ;


<s> <ISA_LIT>FunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; SDLoc dl ( Op ) ; SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;

return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , dl , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) , false , false , <NUM_LIT> ) ;


<s> switch ( cc ) { default : llvm_unreachable ( <STR_LIT> ) ; case EQ : return <STR_LIT> ; case NE : return <STR_LIT> ; case GT : return <STR_LIT> ; case LT : return <STR_LIT> ;


<s> for ( unsigned i = <NUM_LIT> , e = FnLoadArgs . size ( ) ; i != e ; ++ i ) MFI -> setObjectOffset ( FnLoadArgs [ i ] . FI , FnLoadArgs [ i ] . SPOffset ) ;


<s> void adjustStoreVarArgsFI ( MachineFrameInfo * MFI ) const { if ( ! hasStoreVarArgs ( ) ) return ;

for ( unsigned i = <NUM_LIT> , e = FnStoreVarArgs . size ( ) ; i != e ; ++ i ) MFI -> setObjectOffset ( FnStoreVarArgs [ i ] . FI , FnStoreVarArgs [ i ] . SPOffset ) ;


<s> int getFPStackOffset ( ) const { return FPStackOffset ;


<s> int getGPStackOffset ( ) const { return GPHolder . SPOffset ;


<s> unsigned getSRetReturnReg ( ) const { return SRetReturnReg ;


<s> unsigned getSRetReturnReg ( ) const {


<s> <ISA_LIT>FIHolder ( int FrameIndex , int StackPointerOffset ) : FI ( FrameIndex ) , SPOffset ( StackPointerOffset ) {


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : FPStackOffset ( <NUM_LIT> ) , RAStackOffset ( <NUM_LIT> ) , CPUTopSavedRegOff ( <NUM_LIT> ) , GPHolder ( - <NUM_LIT> , - <NUM_LIT> ) , HasLoadArgs ( false ) , HasStoreVarArgs ( false ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) {


return GPHolder . SPOffset != - <NUM_LIT> ;


<s> bool needGPSaveRestore ( ) const { return GPHolder . SPOffset != - <NUM_LIT> ;


<s> void recordLoadArgsFI ( int FI , int SPOffset ) { if ( ! HasLoadArgs ) HasLoadArgs = true ; FnLoadArgs . push_back ( <ISA_LIT>FIHolder ( FI , SPOffset ) ) ;


<s> FnLoadArgs . push_back ( <ISA_LIT>FIHolder ( FI , SPOffset ) ) ;


<s> void recordStoreVarArgsFI ( int FI , int SPOffset ) { if ( ! HasStoreVarArgs ) HasStoreVarArgs = true ; FnStoreVarArgs . push_back ( <ISA_LIT>FIHolder ( FI , SPOffset ) ) ;


<s> if ( ! HasStoreVarArgs ) HasStoreVarArgs = true ;

FnStoreVarArgs . push_back ( <ISA_LIT>FIHolder ( FI , SPOffset ) ) ;


<s> void setGPFI ( int FI ) { GPHolder . FI = FI ;


<s> if ( ! hasLoadArgs ( ) ) return ; for ( unsigned i = <NUM_LIT> , e = FnLoadArgs . size ( ) ; i != e ; ++ i ) MFI -> setObjectOffset ( FnLoadArgs [ i ] . FI , FnLoadArgs [ i ] . SPOffset ) ;


<s> const SmallVector < int , <NUM_LIT> > & getLiveIn ( ) const { return LiveInFI ;


<s> return FIReplacements . lookup ( OFI ) ;


<s> int getVarArgsFrameIndex ( ) const { return VarArgsFrameIndex ;


<s> bool hasReplacement ( int OFI ) const {

return FIReplacements . find ( OFI ) != FIReplacements . end ( ) ;


<s> return FIReplacements . find ( OFI ) != FIReplacements . end ( ) ;


<s> for ( unsigned i = <NUM_LIT> , e = LiveInFI . size ( ) ; i < e ; ++ i ) if ( FI == LiveInFI [ i ] ) return true ; return false ;


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : FPStackOffset ( <NUM_LIT> ) , RAStackOffset ( <NUM_LIT> ) , GPHolder ( - <NUM_LIT> , - <NUM_LIT> ) , HasLoadArgs ( false ) , HasStoreVarArgs ( false ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) , LiveInFI ( ) {


<s> void recordReplacement ( int OFI , int NFI ) {

FIReplacements . insert ( std :: make_pair ( OFI , NFI ) ) ;


<s> void setVarArgsFrameIndex ( int Index ) { VarArgsFrameIndex = Index ;


<s> const SmallVectorImpl < int > & getLiveIn ( ) const {


<s> const SmallVectorImpl < int > & getLiveIn ( ) const { return LiveInFI ;


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : FPStackOffset ( <NUM_LIT> ) , RAStackOffset ( <NUM_LIT> ) , CPUTopSavedRegOff ( <NUM_LIT> ) , GPHolder ( - <NUM_LIT> , - <NUM_LIT> ) , HasLoadArgs ( false ) , HasStoreVarArgs ( false ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) {


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : FPStackOffset ( <NUM_LIT> ) , RAStackOffset ( <NUM_LIT> ) , GPHolder ( - <NUM_LIT> , - <NUM_LIT> ) , HasLoadArgs ( false ) , HasStoreVarArgs ( false ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) {


<s> void <ISA_LIT>FunctionInfo :: anchor ( ) {


<s> AlignmentIsInBytes = false ; PrivateGlobalPrefix = <STR_LIT> ; GPRel32Directive = <STR_LIT> ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( ) { SupportsDebugInformation = true ;


<s> AlignmentIsInBytes = false ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <NUM_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; CommentString = <STR_LIT> ;


<s> IsLittleEndian = false ; StackGrowsUp = false ; SupportsDebugInformation = true ; AlignmentIsInBytes = false ; PrivateGlobalPrefix = <STR_LIT> ;


<s> AlignmentIsInBytes = false ; PrivateGlobalPrefix = <STR_LIT> ;


<s> Data64bitsDirective = <NUM_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; CommentString = <STR_LIT> ;


<s> Data64bitsDirective = <NUM_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; CommentString = <STR_LIT> ; ZeroDirective = <STR_LIT> ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , STI , Ctx ) ;


<s> if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; if ( MO . isExpr ( ) ) return <NUM_LIT> ;


<s> static unsigned Get<ISA_LIT>RegNum ( const MCOperand & MO ) { llvm_unreachable ( <STR_LIT> <STR_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : EmitByte ( <NUM_LIT> , CurByte , OS ) ; EmitByte ( <NUM_LIT> , CurByte , OS ) ;

EmitRawByte ( <NUM_LIT> , CurByte , OS ) ;


<s> EmitIMM ( const MCInst & MI , unsigned & CurByte , raw_ostream & OS ) const { switch ( MI . getOpcode ( ) ) {


<s> break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; break ; } ++ MCNumEmitted ; unsigned Value = getBinaryCodeForInstr ( MI ) ;

EmitConstant ( Value , <NUM_LIT> , CurByte , OS ) ;


<s> uint64_t TSFlags = Desc . TSFlags ; unsigned CurByte = <NUM_LIT> ; EmitIMM ( MI , CurByte , OS ) ; switch ( ( TSFlags & <STR_LIT> ) ) { default : break ; case <STR_LIT> : return ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , false , CurByte , OS , Fixups ) ; break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , false , CurByte , OS , Fixups ) ; break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ;


<s> <ISA_LIT>MCCodeEmitter ( TargetMachine & tm , MCContext & ctx ) : TM ( tm ) , TII ( * TM . getInstrInfo ( ) ) , Ctx ( ctx ) {


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCSubtargetInfo & STI , MCContext & Ctx ) {

return new <ISA_LIT>MCCodeEmitter ( MCII , STI , Ctx ) ;


<s> C = ( ( C * <NUM_LIT> ) & <NUM_LIT> ) * <NUM_LIT> >> <NUM_LIT> ;


<s> void EmitByte ( unsigned char C , unsigned & CurByte , raw_ostream & OS ) const { C = ( ( C * <NUM_LIT> ) & <NUM_LIT> ) * <NUM_LIT> >> <NUM_LIT> ; OS << ( char ) C ; ++ CurByte ;


<s> void <ISA_LIT>MCCodeEmitter :: EmitIMM ( const MCInst & MI , unsigned & CurByte , raw_ostream & OS ) const { switch ( MI . getOpcode ( ) ) { default : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : EmitByte ( <NUM_LIT> , CurByte , OS ) ; EmitByte ( <NUM_LIT> , CurByte , OS ) ;


<s> void <ISA_LIT>MCCodeEmitter :: EmitImmediate ( const MCInst & MI , unsigned opNo , bool pcrel , unsigned & CurByte , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups ) const { assert ( MI . getNumOperands ( ) > opNo && <STR_LIT> ) ; MCOperand oper = MI . getOperand ( opNo ) ; if ( oper . isImm ( ) ) { EmitIMM ( oper , CurByte , OS ) ; } else if ( oper . isExpr ( ) ) { MCFixupKind FixupKind ; switch ( MI . getOpcode ( ) ) { default : FixupKind = pcrel ? FK_PCRel_2 : FK_Data_2 ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , oper . getExpr ( ) , FixupKind ) ) ; break ; case <STR_LIT> : case <STR_LIT> :


<s> void EmitRawByte ( unsigned char C , unsigned & CurByte , raw_ostream & OS ) const { OS << ( char ) C ;


<s> unsigned Opcode = MI . getOpcode ( ) ; const MCInstrDesc & Desc = MCII . get ( Opcode ) ; uint64_t TSFlags = Desc . TSFlags ; unsigned CurByte = <NUM_LIT> ; EmitIMM ( MI , CurByte , OS ) ; switch ( ( TSFlags & <STR_LIT> ) ) { default : break ; case <STR_LIT> : return ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , false , CurByte , OS , Fixups ) ; break ; case <STR_LIT> :


<s> case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; break ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; case <STR_LIT> : EmitImmediate ( MI , <NUM_LIT> , true , CurByte , OS , Fixups ) ; break ; } ++ MCNumEmitted ; unsigned Value = getBinaryCodeForInstr ( MI ) ; EmitConstant ( Value , <NUM_LIT> , CurByte , OS ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMachineOpValue ( const MCInst & MI , const MCOperand & MO ) const { if ( MO . isReg ( ) ) return <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ; else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; else if ( MO . isExpr ( ) ) return <NUM_LIT> ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , const MCSubtargetInfo & sti , MCContext & ctx ) : MCII ( mcii ) {


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetBlockAddressSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; }

return Printer . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ;


<s> MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ;


<s> for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; switch ( MO . getType ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = LowerSymbolOperand ( MO , GetJumpTableSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = LowerSymbolOperand ( MO , GetConstantPoolIndexSymbol ( MO ) ) ; break ;

case MachineOperand :: MO_BlockAddress :


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ; } return Ctx . GetOrCreateSymbol ( Name . str ( ) ) ;


<s> GetExternalSymbolSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ; } return Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetExternalSymbolSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ; }

return Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ;


<s> MCContext & Ctx ; Mangler & Mang ; AsmPrinter & Printer ; public : <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ;

MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ;


<s> AsmPrinter & Printer ; public : <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ;


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) {

default : llvm_unreachable ( <STR_LIT> ) ;


<s> OutMI . setOpcode ( MI -> getOpcode ( ) ) ; for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; switch ( MO . getType ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = LowerSymbolOperand ( MO , GetJumpTableSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = LowerSymbolOperand ( MO , GetConstantPoolIndexSymbol ( MO ) ) ; break ; case MachineOperand :: MO_BlockAddress :

MCOp = LowerSymbolOperand ( MO , GetBlockAddressSymbol ( MO ) ) ;


<s> if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;

return MCOperand :: CreateExpr ( Expr ) ;


<s> MCOperand <ISA_LIT>MCInstLower :: LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const { const MCExpr * Expr = MCSymbolRefExpr :: Create ( Sym , Ctx ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCSubtargetInfo & STI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI ) ;


<s> switch ( TheTriple . getOS ( ) ) { default :


<s> Triple TheTriple ( TT ) ; switch ( TheTriple . getOS ( ) ) { default :


<s> return NULL ; } if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; return NULL ; }

return createELFStreamer ( Ctx , MAB , _OS , _Emitter , RelaxAll , NoExecStack ) ;


<s> if ( RM == Reloc :: Default ) RM = Reloc :: Static ; if ( CM == CodeModel :: Default ) CM = CodeModel :: Small ; X -> InitMCCodeGenInfo ( RM , CM ) ;