<s> if ( Count % <NUM_LIT> != <NUM_LIT> ) return false ; uint64_t NumNops = Count / <NUM_LIT> ; for ( uint64_t i = <NUM_LIT> ; i != NumNops ; ++ i ) { OS << <STR_LIT> ; }


<s> unsigned Size = <NUM_LIT> << getFixupKindLog2Size ( Fixup . getKind ( ) ) ; assert ( Fixup . getOffset ( ) + Size <= Data . size ( ) && <STR_LIT> ) ; assert ( isIntN ( Size * <NUM_LIT> + <NUM_LIT> , Value ) && <STR_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != Size ; ++ i ) Data [ Fixup . getOffset ( ) + i ] = uint8_t ( Value >> ( ( Size - i - <NUM_LIT> ) * <NUM_LIT> ) ) ;


<s> assert ( Fixup . getOffset ( ) + Size <= Data . size ( ) && <STR_LIT> ) ; assert ( isIntN ( Size * <NUM_LIT> + <NUM_LIT> , Value ) && <STR_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != Size ; ++ i ) Data [ Fixup . getOffset ( ) + i ] = uint8_t ( Value >> ( ( Size - i - <NUM_LIT> ) * <NUM_LIT> ) ) ;


<s> uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TheTriple . getOS ( ) ) ; return new <ISA_LIT>ELFAsmBackend ( T , OSABI ) ;


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( const Target & T , const MCSubtargetInfo & STI , const MCRegisterInfo & MRI , const MCTargetOptions & Options ) {

const Triple & TheTriple = STI . getTargetTriple ( ) ;


<s> std :: unique_ptr < MCObjectTargetWriter > createObjectTargetWriter ( ) const override {

return create<ISA_LIT>ELFObjectWriter ( OSABI ) ;


<s> bool <ISA_LIT>AsmBackend :: fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCRelaxableFragment * DF , const MCAsmLayout & Layout ) const { if ( ! isInt < <NUM_LIT> > ( Value ) ) { llvm_unreachable ( <STR_LIT> ) ; }

return Value == <NUM_LIT> || ! isInt < <NUM_LIT> > ( Value ) ;


<s> unsigned getMinimumNopSize ( ) const override {


<s> static unsigned getRelaxedOpcode ( const MCInst & Inst ) { unsigned R = getRelaxedOpcodeArith ( Inst ) ;

if ( R != Inst . getOpcode ( ) ) return R ;


<s> unsigned Op = Inst . getOpcode ( ) ;


<s> return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> <ISA_LIT>AsmBackend ( const Target & T ) : MCAsmBackend ( <STR_LIT> ) {


<s> <ISA_LIT>ELFAsmBackend ( const Target & T , uint8_t OSABI ) : <ISA_LIT>AsmBackend ( T ) , OSABI ( OSABI ) {


<s> if ( getRelaxedOpcodeArith ( Inst ) == Inst . getOpcode ( ) ) return false ;

unsigned RelaxableOp = Inst . getNumOperands ( ) - <NUM_LIT> ;


<s> void <ISA_LIT>AsmBackend :: relaxInstruction ( MCInst & Inst , const MCSubtargetInfo & STI ) const { unsigned RelaxedOp = getRelaxedOpcode ( Inst ) ; if ( RelaxedOp == Inst . getOpcode ( ) ) { SmallString < <NUM_LIT> > Tmp ;


<s> uint64_t NumNops = Count / <NUM_LIT> ; for ( uint64_t i = <NUM_LIT> ; i != NumNops ; ++ i ) { OS << <STR_LIT> ; } return true ;


<s> uint64_t NumNops = Count / <NUM_LIT> ;

for ( uint64_t i = <NUM_LIT> ; i != NumNops ; ++ i ) {


<s> assert ( ( N == <NUM_LIT> ) && <STR_LIT> ) ; <ISA_LIT>Operand :: addExpr ( Inst , Expr ) ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( Kind :: Imm , Start , End ) ;


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>Operand :: createImm ( const MCExpr * Expr , SMLoc Start , SMLoc End ) { auto Op = std :: make_unique < <ISA_LIT>Operand > ( Kind :: Imm , Start , End ) ; Op -> Expr = Expr ; return Op ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( Kind :: MemOp , Start , End ) ; Op -> MemOp = MemOp ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( Kind :: Token , Start , End ) ;


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>Operand :: createToken ( StringRef Token , SMLoc Start , SMLoc End ) { auto Op = std :: make_unique < <ISA_LIT>Operand > ( Kind :: Token , Start , End ) ;


<s> bool <ISA_LIT>Operand :: isReg ( ) const { return Kind == Kind :: MemOp && MemOp . Op == <STR_LIT> :: Reg ;


<s> bool <ISA_LIT>Operand :: isReg ( ) const {

return Kind == Kind :: MemOp && MemOp . Op == <STR_LIT> :: Reg ;


<s> bool <ISA_LIT>Operand :: isToken ( ) const {


<s> <ISA_LIT>Operand ( enum Kind Kind , SMLoc Start , SMLoc End ) : Base ( ) , Kind ( Kind ) , Start ( Start ) , End ( End ) {


<s> MemOp . Op = <STR_LIT> :: Addr ; Operands . push_back ( <ISA_LIT>Operand :: createMemOp ( MemOp , Start , getLexer ( ) . getLoc ( ) ) ) ; return MatchOperand_Success ; } else if ( IsPD ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } return MatchOperand_NoMatch ; } Parser . Lex ( ) ; if ( ! HasDisplacement && isExpr ( ) ) { if ( Parser . parseExpression ( MemOp . OuterDisp ) ) { return MatchOperand_ParseFail ; } HasDisplacement = true ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) { MemOp . Op = <STR_LIT> :: Addr ; Operands . push_back ( <ISA_LIT>Operand :: createMemOp ( MemOp , Start , getLexer ( ) . getLoc ( ) ) ) ; return MatchOperand_Success ; } Parser . Lex ( ) ; } Result = parseRegister ( MemOp . OuterReg ) ; if ( Result == MatchOperand_ParseFail ) { return MatchOperand_ParseFail ; } if ( Result != MatchOperand_Success ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } bool HasIndex = false ; if ( Parser . getTok ( ) . is ( AsmToken :: Comma ) ) { Parser . Lex ( ) ; Result = parseRegister ( MemOp . InnerReg ) ; if ( Result == MatchOperand_ParseFail ) { return Result ; } if ( Result == MatchOperand_NoMatch ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } MemOp . Size = <NUM_LIT> ; MemOp . Scale = <NUM_LIT> ; MemOp . InnerDisp = MCConstantExpr :: create ( <NUM_LIT> , Parser . getContext ( ) , true , <NUM_LIT> ) ; HasIndex = true ; } if ( Parser . getTok ( ) . isNot ( AsmToken :: RParen ) ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ;


<s> case 'd' : case 'a' : { if ( isdigit ( RegisterNameLower [ <NUM_LIT> ] ) ) { unsigned IndexOffset = ( RegisterNameLower [ <NUM_LIT> ] == 'a' ) ? <NUM_LIT> : <NUM_LIT> ; unsigned RegIndex = ( unsigned ) ( RegisterNameLower [ <NUM_LIT> ] - '0' ) ; if ( RegIndex < <NUM_LIT> ) { RegNo = RegistersByIndex [ IndexOffset + RegIndex ] ; return true ; } } break ; } case 's' : if ( RegisterNameLower [ <NUM_LIT> ] == 'p' ) { RegNo = <STR_LIT> ; return true ; } else if ( RegisterNameLower [ <NUM_LIT> ] == 'r' ) { RegNo = <STR_LIT> ; return true ; } break ; case 'p' : if ( RegisterNameLower [ <NUM_LIT> ] == 'c' ) { RegNo = <STR_LIT> ; return true ;


<s> case Kind :: Imm : OS << <STR_LIT> << Imm ; break ; case Kind :: MemOp :


<s> switch ( Kind ) { case Kind :: Invalid : OS << <STR_LIT> ; break ; case Kind :: Token : OS << <STR_LIT> << Token << <STR_LIT> ; break ;


<s> void <ISA_LIT>Operand :: addARIDOperands ( MCInst & Inst , unsigned N ) const { <ISA_LIT>Operand :: addExpr ( Inst , MemOp . OuterDisp ) ;

Inst . addOperand ( MCOperand :: createReg ( MemOp . OuterReg ) ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( MemOp . OuterReg ) ) ;


<s> void <ISA_LIT>Operand :: addARIIOperands ( MCInst & Inst , unsigned N ) const { <ISA_LIT>Operand :: addExpr ( Inst , MemOp . OuterDisp ) ; Inst . addOperand ( MCOperand :: createReg ( MemOp . OuterReg ) ) ; Inst . addOperand ( MCOperand :: createReg ( MemOp . InnerReg ) ) ;


<s> void <ISA_LIT>Operand :: addARIPDOperands ( MCInst & Inst , unsigned N ) const {


<s> void <ISA_LIT>Operand :: addARIPIOperands ( MCInst & Inst , unsigned N ) const { Inst . addOperand ( MCOperand :: createReg ( MemOp . OuterReg ) ) ;


<s> if ( auto Const = dyn_cast < MCConstantExpr > ( Expr ) ) { Inst . addOperand ( MCOperand :: createImm ( Const -> getValue ( ) ) ) ; return ; } Inst . addOperand ( MCOperand :: createExpr ( Expr ) ) ;


assert ( ( N == <NUM_LIT> ) && <STR_LIT> ) ;


<s> void <ISA_LIT>Operand :: addMoveMaskOperands ( MCInst & Inst , unsigned N ) const { assert ( isMoveMask ( ) && <STR_LIT> ) ; assert ( ( N == <NUM_LIT> ) && <STR_LIT> ) ; uint16_t MoveMask = MemOp . RegMask ;

if ( MemOp . Op == <STR_LIT> :: Reg ) MoveMask = <NUM_LIT> << getRegisterIndex ( MemOp . OuterReg ) ;


<s> <ISA_LIT>Operand :: addExpr ( Inst , MemOp . OuterDisp ) ;


Inst . addOperand ( MCOperand :: createReg ( MemOp . InnerReg ) ) ;


<s> assert ( ( N == <NUM_LIT> ) && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( getReg ( ) ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return Address ; case <STR_LIT> : return SP ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>Operand :: createImm ( const MCExpr * Expr , SMLoc Start , SMLoc End ) {

auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: Imm , Start , End ) ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: MemOp , Start , End ) ; Op -> MemOp = MemOp ; return Op ;


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>Operand :: createToken ( StringRef Token , SMLoc Start , SMLoc End ) { auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: Token , Start , End ) ; Op -> Token = Token ;


<s> void <ISA_LIT>AsmParser :: eatComma ( ) {

if ( Parser . getTok ( ) . is ( AsmToken :: Comma ) ) {


<s> bool <ISA_LIT>AsmParser :: emit ( MCInst & Inst , SMLoc const & Loc , MCStreamer & Out ) const { Inst . setLoc ( Loc ) ;


<s> assert ( isReg ( ) ) ; return MemOp . OuterReg ;


<s> static unsigned RegistersByIndex [ ] = {


<s> if ( Register >= <STR_LIT> && Register <= <STR_LIT> ) return Register - <STR_LIT> ; if ( Register >= <STR_LIT> && Register <= <STR_LIT> ) return Register - <STR_LIT> + <NUM_LIT> ; switch ( Register ) { case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> SMLoc getStartLoc ( ) const override {


<s> StringRef <ISA_LIT>Operand :: getToken ( ) const { assert ( isToken ( ) ) ; return Token ;


<s> bool <ISA_LIT>AsmParser :: invalidOperand ( SMLoc const & Loc , OperandVector const & Operands , uint64_t const & ErrorInfo ) { SMLoc ErrorLoc = Loc ; char const * Diag = <NUM_LIT> ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) { Diag = <STR_LIT> ; } else { auto const & Op = ( <ISA_LIT>Operand const & ) * Operands [ ErrorInfo ] ; if ( Op . getStartLoc ( ) != SMLoc ( ) ) { ErrorLoc = Op . getStartLoc ( ) ; } } } if ( ! Diag ) { Diag = <STR_LIT> ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: Addr ;


<s> bool isAddr32 ( ) const { return isAddrN < <NUM_LIT> > ( ) ;


<s> bool isAddr8 ( ) const { return isAddrN < <NUM_LIT> > ( ) ;


<s> if ( MemOp . OuterDisp -> evaluateAsAbsolute ( Res ) ) return isInt < N > ( Res ) ; return true ; }


<s> return isReg ( ) && checkRegisterClass ( getReg ( ) , false , true , true ) ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirect && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacement && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> bool <ISA_LIT>Operand :: isARII ( ) const { return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacementIndex && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacementIndex && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegPreDecrement && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegPostIncrement && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> bool <ISA_LIT>Operand :: isARIPI ( ) const {

return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegPostIncrement && <STR_LIT> . contains ( MemOp . OuterReg ) ;


<s> return isReg ( ) && checkRegisterClass ( getReg ( ) , true , false , false ) ;


<s> switch ( Parser . getTok ( ) . getKind ( ) ) { case AsmToken :: Identifier : case AsmToken :: Integer : return true ;


<s> bool isMemOp ( ) const { return Kind == KindTy :: MemOp ;


<s> bool <ISA_LIT>Operand :: isMoveMask ( ) const {


<s> return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacement && MemOp . OuterReg == <STR_LIT> ;


<s> bool <ISA_LIT>Operand :: isPCD ( ) const { return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacement && MemOp . OuterReg == <STR_LIT> ;


<s> bool <ISA_LIT>Operand :: isPCI ( ) const {

return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacementIndex && MemOp . OuterReg == <STR_LIT> ;


<s> bool <ISA_LIT>Operand :: isPCI ( ) const { return isMemOp ( ) && MemOp . Op == <STR_LIT> :: RegIndirectDisplacementIndex && MemOp . OuterReg == <STR_LIT> ;


<s> bool <ISA_LIT>Operand :: isToken ( ) const {


<s> <ISA_LIT>AsmParser ( const MCSubtargetInfo & STI , MCAsmParser & Parser , const MCInstrInfo & MII , const MCTargetOptions & Options ) : MCTargetAsmParser ( Options , STI , MII ) , STI ( STI ) , Parser ( Parser ) {

MCAsmParserExtension :: Initialize ( Parser ) ;


<s> <ISA_LIT>MemOp ( Kind Op ) : Op ( Op ) {


<s> <ISA_LIT>Operand ( KindTy Kind , SMLoc Start , SMLoc End ) : Base ( ) , Kind ( Kind ) , Start ( Start ) , End ( End ) {


<s> return missingFeature ( Loc , ErrorInfo ) ; case Match_InvalidOperand : return invalidOperand ( Loc , Operands , ErrorInfo ) ; case Match_MnemonicFail : return Error ( Loc , <STR_LIT> ) ; default : return true ;


<s> case Match_MissingFeature : return missingFeature ( Loc , ErrorInfo ) ; case Match_InvalidOperand : return invalidOperand ( Loc , Operands , ErrorInfo ) ; case Match_MnemonicFail : return Error ( Loc , <STR_LIT> ) ;


<s> bool <ISA_LIT>AsmParser :: ParseDirective ( AsmToken DirectiveID ) {


<s> SMLoc End ; const MCExpr * Expr ; if ( getParser ( ) . parseExpression ( Expr , End ) ) { return MatchOperand_ParseFail ; } Operands . push_back ( <ISA_LIT>Operand :: createImm ( Expr , Start , End ) ) ; return MatchOperand_Success ;


<s> while ( Parser . getTok ( ) . isNot ( AsmToken :: EndOfStatement ) ) { if ( ! First ) { eatComma ( ) ; } else { First = false ; } auto MatchResult = MatchOperandParserImpl ( Operands , Name ) ; if ( MatchResult == MatchOperand_Success ) { continue ; } SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; }


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { SMLoc Start = getLexer ( ) . getLoc ( ) ; Operands . push_back ( <ISA_LIT>Operand :: createToken ( Name , Start , Start ) ) ; bool First = true ; while ( Parser . getTok ( ) . isNot ( AsmToken :: EndOfStatement ) ) { if ( ! First ) { eatComma ( ) ; } else { First = false ; } auto MatchResult = MatchOperandParserImpl ( Operands , Name ) ;

if ( MatchResult == MatchOperand_Success ) {


<s> if ( getLexer ( ) . isNot ( AsmToken :: LParen ) ) { if ( HasDisplacement ) { MemOp . Op = <STR_LIT> :: Addr ; Operands . push_back ( <ISA_LIT>Operand :: createMemOp ( MemOp , Start , getLexer ( ) . getLoc ( ) ) ) ; return MatchOperand_Success ; } else if ( IsPD ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } return MatchOperand_NoMatch ; } Parser . Lex ( ) ; if ( ! HasDisplacement && isExpr ( ) ) { if ( Parser . parseExpression ( MemOp . OuterDisp ) ) { return MatchOperand_ParseFail ; } HasDisplacement = true ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) { MemOp . Op = <STR_LIT> :: Addr ; Operands . push_back ( <ISA_LIT>Operand :: createMemOp ( MemOp , Start , getLexer ( ) . getLoc ( ) ) ) ; return MatchOperand_Success ; } Parser . Lex ( ) ; } Result = parseRegister ( MemOp . OuterReg ) ; if ( Result == MatchOperand_ParseFail ) { return MatchOperand_ParseFail ; } if ( Result != MatchOperand_Success ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } bool HasIndex = false ; if ( Parser . getTok ( ) . is ( AsmToken :: Comma ) ) { Parser . Lex ( ) ; Result = parseRegister ( MemOp . InnerReg ) ; if ( Result == MatchOperand_ParseFail ) { return Result ; } if ( Result == MatchOperand_NoMatch ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ;


<s> auto Result = tryParseRegister ( RegNo , StartLoc , EndLoc ) ; if ( Result != MatchOperand_Success ) {


<s> bool <ISA_LIT>AsmParser :: ParseRegister ( unsigned & RegNo , SMLoc & StartLoc , SMLoc & EndLoc ) { auto Result = tryParseRegister ( RegNo , StartLoc , EndLoc ) ;


<s> case 's' : if ( RegisterNameLower [ <NUM_LIT> ] == 'p' ) { RegNo = <STR_LIT> ; return true ; } else if ( RegisterNameLower [ <NUM_LIT> ] == 'r' ) { RegNo = <STR_LIT> ; return true ; } break ; case 'p' : if ( RegisterNameLower [ <NUM_LIT> ] == 'c' ) { RegNo = <STR_LIT> ; return true ; } break ;


<s> case 'a' : { if ( isdigit ( RegisterNameLower [ <NUM_LIT> ] ) ) { unsigned IndexOffset = ( RegisterNameLower [ <NUM_LIT> ] == 'a' ) ? <NUM_LIT> : <NUM_LIT> ; unsigned RegIndex = ( unsigned ) ( RegisterNameLower [ <NUM_LIT> ] - '0' ) ; if ( RegIndex < <NUM_LIT> ) { RegNo = getRegisterByIndex ( IndexOffset + RegIndex ) ; return true ; } } break ; } case 's' : if ( RegisterNameLower [ <NUM_LIT> ] == 'p' ) { RegNo = <STR_LIT> ; return true ; } else if ( RegisterNameLower [ <NUM_LIT> ] == 'r' ) { RegNo = <STR_LIT> ; return true ; } break ; case 'p' : if ( RegisterNameLower [ <NUM_LIT> ] == 'c' ) { RegNo = <STR_LIT> ; return true ; } break ;


<s> } } unsigned FirstRegisterIndex = getRegisterIndex ( FirstRegister ) ; unsigned LastRegisterIndex = getRegisterIndex ( LastRegister ) ; uint16_t NumNewBits = LastRegisterIndex - FirstRegisterIndex + <NUM_LIT> ; uint16_t NewMaskBits = ( ( <NUM_LIT> << NumNewBits ) - <NUM_LIT> ) << FirstRegisterIndex ; if ( IsFirstRegister && ( FirstRegister == LastRegister ) ) { MemOp . Op = <STR_LIT> :: Reg ; MemOp . OuterReg = FirstRegister ; } else { if ( MemOp . Op == <STR_LIT> :: Reg ) { MemOp . Op = <STR_LIT> :: RegMask ; MemOp . RegMask = <NUM_LIT> << getRegisterIndex ( MemOp . OuterReg ) ; if ( MemOp . RegMask == <NUM_LIT> ) { Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } }

if ( ( FirstRegisterIndex >= <NUM_LIT> ) || ( LastRegisterIndex >= <NUM_LIT> ) ) {


<s> case KindTy :: Imm : OS << <STR_LIT> << Imm ; break ; case KindTy :: MemOp : MemOp . print ( OS ) ;


<s> StartLoc = getLexer ( ) . getLoc ( ) ; auto Result = parseRegister ( RegNo ) ; EndLoc = getLexer ( ) . getLoc ( ) ; return Result ;


<s> if ( Operand . isReg ( ) && checkRegisterClass ( Operand . getReg ( ) , false , true , true ) ) { return Match_Success ; } break ; case MCK_AR32_NOSP : if ( Operand . isReg ( ) && checkRegisterClass ( Operand . getReg ( ) , false , true , false ) ) { return Match_Success ; } break ; case MCK_DR8 : case MCK_DR16 : case MCK_DR32 : if ( Operand . isReg ( ) && checkRegisterClass ( Operand . getReg ( ) , true , false , false ) ) { return Match_Success ; } break ; case MCK_AR16_TC : if ( Operand . isReg ( ) && ( ( Operand . getReg ( ) == <STR_LIT> ) || ( Operand . getReg ( ) == <STR_LIT> ) ) ) { return Match_Success ; } break ; case MCK_DR16_TC : if ( Operand . isReg ( ) && ( ( Operand . getReg ( ) == <STR_LIT> ) || ( Operand . getReg ( ) == <STR_LIT> ) ) ) { return Match_Success ; } break ; case MCK_XR16_TC : if ( Operand . isReg ( ) && ( ( Operand . getReg ( ) == <STR_LIT> ) || ( Operand . getReg ( ) == <STR_LIT> ) || ( Operand . getReg ( ) == <STR_LIT> ) || ( Operand . getReg ( ) == <STR_LIT> ) ) ) { return Match_Success ; } break ; } return Match_InvalidOperand ;


<s> void <ISA_LIT>AsmPrinter :: emitEndOfAsmFile ( Module & M ) {


<s> void <ISA_LIT>AsmPrinter :: emitFunctionBodyEnd ( ) {


<s> void <ISA_LIT>AsmPrinter :: emitFunctionBodyStart ( ) {


<s> } break ; } case <STR_LIT> : case <STR_LIT> : OutStreamer -> AddComment ( <STR_LIT> ) ; break ; } MCInst TmpInst0 ; MCInstLowering -> Lower ( MI , TmpInst0 ) ; OutStreamer -> emitInstruction ( TmpInst0 , getSubtargetInfo ( ) ) ;


<s> OutStreamer -> emitSyntaxDirective ( ) ;


<s> void <ISA_LIT>AsmPrinter :: emitStartOfAsmFile ( Module & M ) {

OutStreamer -> emitSyntaxDirective ( ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) { Subtarget = static_cast < <ISA_LIT>TargetMachine & > ( TM ) . getSubtargetImpl ( ) ;


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , const char * ExtraCode , raw_ostream & OS ) { if ( ! ExtraCode || ! ExtraCode [ <NUM_LIT> ] ) { printOperand ( MI , OpNo , OS ) ; return false ;


<s> switch ( MO . getType ( ) ) { case MachineOperand :: MO_Register : OS << <STR_LIT> << <ISA_LIT>InstPrinter :: getRegisterName ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : OS << '#' << MO . getImm ( ) ; break ; case MachineOperand :: MO_MachineBasicBlock :

MO . getMBB ( ) -> getSymbol ( ) -> print ( OS , MAI ) ;


<s> case MachineOperand :: MO_GlobalAddress : PrintSymbolOperand ( MO , OS ) ; break ; case MachineOperand :: MO_BlockAddress : GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) -> print ( OS , MAI ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : { const DataLayout & DL = getDataLayout ( ) ; OS << DL . getPrivateGlobalPrefix ( ) << <STR_LIT> << getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; break ; } default : llvm_unreachable ( <STR_LIT> ) ; }


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction & MF ) { MMFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; MCInstLowering = std :: make_unique < <ISA_LIT>MCInstLower > ( MF , * this ) ; AsmPrinter :: runOnMachineFunction ( MF ) ; return true ;


<s> static inline bool hasMultiMIOperands ( unsigned Op , unsigned LogicalOpIdx ) { return <STR_LIT> ( Op , LogicalOpIdx ) > <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; }


<s> inline static bool isGlobalRelativeToPICBase ( unsigned char TargetFlag ) { switch ( TargetFlag ) { default : return false ; case <STR_LIT> : case <STR_LIT> : return true ;


<s> return false ; case <STR_LIT> : case <STR_LIT> :


<s> inline static bool isGlobalStubReference ( unsigned char TargetFlag ) {


<s> switch ( Flag ) { default : return false ; case <STR_LIT> : return true ; }


<s> inline static bool isPCRelBlockReference ( unsigned char Flag ) { switch ( Flag ) { default :


<s> return false ; case <STR_LIT> : case <STR_LIT> : return true ;


<s> return false ; case <STR_LIT> : case <STR_LIT> : return true ; }


<s> <ISA_LIT>CCState CCInfo = static_cast < <ISA_LIT>CCState & > ( State ) ; static const MCPhysReg DataRegList [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const MCPhysReg AddrRegList [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; auto I = CCInfo . F . arg_begin ( ) ; int No = ValNo ; while ( No > <NUM_LIT> ) { No -= I -> getType ( ) -> isIntegerTy ( <NUM_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; I ++ ; }

bool IsPtr = I != CCInfo . F . arg_end ( ) && I -> getType ( ) -> isPointerTy ( ) ;


<s> <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; auto I = CCInfo . F . arg_begin ( ) ; int No = ValNo ; while ( No > <NUM_LIT> ) { No -= I -> getType ( ) -> isIntegerTy ( <NUM_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; I ++ ; }


<s> <ISA_LIT>CCState ( const llvm :: Function & F , CallingConv :: ID CC , bool IsVarArg , MachineFunction & MF , SmallVectorImpl < CCValAssign > & Locs , LLVMContext & C ) : CCState ( CC , IsVarArg , MF , Locs , C ) , F ( F ) {


<s> static const MCPhysReg DataRegList [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const MCPhysReg AddrRegList [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; const auto & ArgTypes = CCInfo . ArgTypeList ; auto I = ArgTypes . begin ( ) , End = ArgTypes . end ( ) ; int No = ValNo ; while ( No > <NUM_LIT> && I != End ) { No -= ( * I ) -> isIntegerTy ( <NUM_LIT> ) ? <NUM_LIT> : <NUM_LIT> ;


<s> <ISA_LIT>CCState ( ArrayRef < Type * > ArgTypes , CallingConv :: ID CC , bool IsVarArg , MachineFunction & MF , SmallVectorImpl < CCValAssign > & Locs , LLVMContext & C ) : CCState ( CC , IsVarArg , MF , Locs , C ) , ArgTypeList ( ArgTypes ) {


<s> MachineFunction & MF = MIRBuilder . getMF ( ) ; Register ExtReg = extendRegister ( ValVReg , VA ) ; auto * MMO = MF . getMachineMemOperand ( MPO , MachineMemOperand :: MOStore , MemTy , inferAlignFromPtrInfo ( MF , MPO ) ) ;

MIRBuilder . buildStore ( ExtReg , Addr , * MMO ) ;


<s> auto * MMO = MF . getMachineMemOperand ( MPO , MachineMemOperand :: MOStore , MemTy , inferAlignFromPtrInfo ( MF , MPO ) ) ; MIRBuilder . buildStore ( ExtReg , Addr , * MMO ) ;


<s> MIB . addDef ( PhysReg , RegState :: Implicit ) ;

MIRBuilder . buildCopy ( ValVReg , PhysReg ) ;


<s> MIB . addDef ( PhysReg , RegState :: Implicit ) ; MIRBuilder . buildCopy ( ValVReg , PhysReg ) ;


<s> CallReturnHandler ( MachineIRBuilder & MIRBuilder , MachineRegisterInfo & MRI , MachineInstrBuilder & MIB ) : <ISA_LIT>IncomingValueHandler ( MIRBuilder , MRI ) , MIB ( MIB ) {


<s> LLT SType = LLT :: scalar ( DL . getPointerSizeInBits ( <NUM_LIT> ) ) ; Register StackReg = STI . getRegisterInfo ( ) -> getStackRegister ( ) ; auto SPReg = MIRBuilder . buildCopy ( p0 , StackReg ) . getReg ( <NUM_LIT> ) ;

auto OffsetReg = MIRBuilder . buildConstant ( SType , Offset ) ;


<s> Register getStackAddress ( uint64_t Size , int64_t Offset , MachinePointerInfo & MPO , <STR_LIT> Flags ) override { LLT p0 = LLT :: pointer ( <NUM_LIT> , DL . getPointerSizeInBits ( <NUM_LIT> ) ) ; LLT SType = LLT :: scalar ( DL . getPointerSizeInBits ( <NUM_LIT> ) ) ; Register StackReg = STI . getRegisterInfo ( ) -> getStackRegister ( ) ;

auto SPReg = MIRBuilder . buildCopy ( p0 , StackReg ) . getReg ( <NUM_LIT> ) ;


<s> if ( ! Info . OrigRet . Ty -> isVoidTy ( ) ) splitToValueTypes ( Info . OrigRet , InArgs , DL , Info . CallConv ) ; unsigned AdjStackDown = TII . getCallFrameSetupOpcode ( ) ; auto CallSeqStart = MIRBuilder . buildInstr ( AdjStackDown ) ; unsigned Opc = TLI . getTargetMachine ( ) . isPositionIndependent ( ) ? <STR_LIT> : Info . Callee . isReg ( ) ? <STR_LIT> : <STR_LIT> ; auto MIB = MIRBuilder . buildInstrNoInsert ( Opc ) . add ( Info . Callee ) . addRegMask ( TRI -> getCallPreservedMask ( MF , Info . CallConv ) ) ; CCAssignFn * AssignFn = TLI . getCCAssignFn ( Info . CallConv , false , Info . IsVarArg ) ; OutgoingValueAssigner Assigner ( AssignFn ) ; <ISA_LIT>OutgoingArgHandler Handler ( MIRBuilder , MRI , MIB ) ; if ( ! determineAndHandleAssignments ( Handler , Assigner , OutArgs , MIRBuilder , Info . CallConv , Info . IsVarArg ) ) return false ; if ( Info . Callee . isReg ( ) ) constrainOperandRegClass ( MF , * TRI , MRI , * STI . getInstrInfo ( ) , * STI . getRegBankInfo ( ) , * MIB , MIB -> getDesc ( ) , Info . Callee , <NUM_LIT> ) ; MIRBuilder . insertInstr ( MIB ) ;

if ( ! Info . OrigRet . Ty -> isVoidTy ( ) ) {


<s> auto & DL = F . getParent ( ) -> getDataLayout ( ) ; const <ISA_LIT>TargetLowering & TLI = * getTLI < <ISA_LIT>TargetLowering > ( ) ; const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const TargetInstrInfo & TII = * STI . getInstrInfo ( ) ; const <ISA_LIT>RegisterInfo * TRI = STI . getRegisterInfo ( ) ; SmallVector < ArgInfo , <NUM_LIT> > OutArgs ; for ( auto & OrigArg : Info . OrigArgs ) splitToValueTypes ( OrigArg , OutArgs , DL , Info . CallConv ) ; SmallVector < ArgInfo , <NUM_LIT> > InArgs ; if ( ! Info . OrigRet . Ty -> isVoidTy ( ) ) splitToValueTypes ( Info . OrigRet , InArgs , DL , Info . CallConv ) ; unsigned AdjStackDown = TII . getCallFrameSetupOpcode ( ) ; auto CallSeqStart = MIRBuilder . buildInstr ( AdjStackDown ) ; unsigned Opc = TLI . getTargetMachine ( ) . isPositionIndependent ( ) ? <STR_LIT> : Info . Callee . isReg ( ) ? <STR_LIT> : <STR_LIT> ; auto MIB = MIRBuilder . buildInstrNoInsert ( Opc ) . add ( Info . Callee ) . addRegMask ( TRI -> getCallPreservedMask ( MF , Info . CallConv ) ) ; CCAssignFn * AssignFn = TLI . getCCAssignFn ( Info . CallConv , false , Info . IsVarArg ) ; OutgoingValueAssigner Assigner ( AssignFn ) ; <ISA_LIT>OutgoingArgHandler Handler ( MIRBuilder , MRI , MIB ) ; if ( ! determineAndHandleAssignments ( Handler , Assigner , OutArgs , MIRBuilder , Info . CallConv , Info . IsVarArg ) ) return false ; if ( Info . Callee . isReg ( ) ) constrainOperandRegClass ( MF , * TRI , MRI , * STI . getInstrInfo ( ) , * STI . getRegBankInfo ( ) , * MIB , MIB -> getDesc ( ) , Info . Callee , <NUM_LIT> ) ; MIRBuilder . insertInstr ( MIB ) ; if ( ! Info . OrigRet . Ty -> isVoidTy ( ) ) { CCAssignFn * RetAssignFn = TLI . getCCAssignFn ( Info . CallConv , true , Info . IsVarArg ) ; OutgoingValueAssigner Assigner ( RetAssignFn , RetAssignFn ) ; CallReturnHandler Handler ( MIRBuilder , MRI , MIB ) ; if ( ! determineAndHandleAssignments ( Handler , Assigner , InArgs , MIRBuilder , Info . CallConv , Info . IsVarArg ) ) return false ; } CallSeqStart . addImm ( Assigner . StackOffset ) . addImm ( <NUM_LIT> ) ; unsigned AdjStackUp = TII . getCallFrameDestroyOpcode ( ) ; MIRBuilder . buildInstr ( AdjStackUp ) . addImm ( Assigner . StackOffset ) . addImm ( <NUM_LIT> ) ;


<s> MachineFunction & MF = MIRBuilder . getMF ( ) ; const Function & F = MF . getFunction ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; const <ISA_LIT>TargetLowering & TLI = * getTLI < <ISA_LIT>TargetLowering > ( ) ; CCAssignFn * AssignFn = TLI . getCCAssignFn ( F . getCallingConv ( ) , true , F . isVarArg ( ) ) ;

auto & DL = F . getParent ( ) -> getDataLayout ( ) ;


<s> MachineFunction & MF = MIRBuilder . getMF ( ) ; const Function & F = MF . getFunction ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; const <ISA_LIT>TargetLowering & TLI = * getTLI < <ISA_LIT>TargetLowering > ( ) ; CCAssignFn * AssignFn = TLI . getCCAssignFn ( F . getCallingConv ( ) , true , F . isVarArg ( ) ) ; auto & DL = F . getParent ( ) -> getDataLayout ( ) ; if ( ! VRegs . empty ( ) ) { SmallVector < ArgInfo , <NUM_LIT> > SplitArgs ; ArgInfo OrigArg { VRegs , Val -> getType ( ) , <NUM_LIT> } ; setArgFlags ( OrigArg , AttributeList :: ReturnIndex , DL , F ) ; splitToValueTypes ( OrigArg , SplitArgs , DL , F . getCallingConv ( ) ) ; OutgoingValueAssigner ArgAssigner ( AssignFn ) ; <ISA_LIT>OutgoingArgHandler ArgHandler ( MIRBuilder , MRI , MIB ) ; Success = determineAndHandleAssignments ( ArgHandler , ArgAssigner , SplitArgs , MIRBuilder , F . getCallingConv ( ) , F . isVarArg ( ) ) ; }


<s> <ISA_LIT>OutgoingArgHandler ( MachineIRBuilder & MIRBuilder , MachineRegisterInfo & MRI , MachineInstrBuilder MIB ) : OutgoingValueHandler ( MIRBuilder , MRI ) , MIB ( MIB ) , DL ( MIRBuilder . getMF ( ) . getDataLayout ( ) ) , STI ( MIRBuilder . getMF ( ) . getSubtarget < <ISA_LIT>Subtarget > ( ) ) {


<s> MIRBuilder . getMRI ( ) -> addLiveIn ( PhysReg ) ; MIRBuilder . getMBB ( ) . addLiveIn ( PhysReg ) ;

IncomingValueHandler :: assignValueToReg ( ValVReg , PhysReg , VA ) ;


<s> void <ISA_LIT>IncomingValueHandler :: assignValueToAddress ( Register ValVReg , Register Addr , LLT MemTy , MachinePointerInfo & MPO , CCValAssign & VA ) { MachineFunction & MF = MIRBuilder . getMF ( ) ; auto * MMO = MF . getMachineMemOperand ( MPO , MachineMemOperand :: MOLoad , MemTy , inferAlignFromPtrInfo ( MF , MPO ) ) ;

MIRBuilder . buildLoad ( ValVReg , Addr , * MMO ) ;


<s> FormalArgHandler ( MachineIRBuilder & MIRBuilder , MachineRegisterInfo & MRI ) : <ISA_LIT>IncomingValueHandler ( MIRBuilder , MRI ) {


<s> llvm :: LLT FramePtr = LLT :: pointer ( <NUM_LIT> , MIRBuilder . getMF ( ) . getDataLayout ( ) . getPointerSizeInBits ( ) ) ; MachineInstrBuilder AddrReg = MIRBuilder . buildFrameIndex ( FramePtr , FI ) ; StackUsed = std :: max ( StackUsed , Size + Offset ) ;


<s> bool <ISA_LIT>CallLowering :: lowerCall ( MachineIRBuilder & MIRBuilder , CallLoweringInfo & Info ) const { return false ;


<s> auto & TLI = * getTLI < <ISA_LIT>TargetLowering > ( ) ; SmallVector < ArgInfo , <NUM_LIT> > SplitArgs ; unsigned I = <NUM_LIT> ; for ( const auto & Arg : F . args ( ) ) { ArgInfo OrigArg { VRegs [ I ] , Arg . getType ( ) , I } ; setArgFlags ( OrigArg , I + AttributeList :: FirstArgIndex , DL , F ) ; splitToValueTypes ( OrigArg , SplitArgs , DL , F . getCallingConv ( ) ) ; ++ I ;


<s> auto MIB = MIRBuilder . buildInstrNoInsert ( <STR_LIT> ) ; bool Success = true ; MachineFunction & MF = MIRBuilder . getMF ( ) ; const Function & F = MF . getFunction ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; const <ISA_LIT>TargetLowering & TLI = * getTLI < <ISA_LIT>TargetLowering > ( ) ; CCAssignFn * AssignFn = TLI . getCCAssignFn ( F . getCallingConv ( ) , true , F . isVarArg ( ) ) ; auto & DL = F . getParent ( ) -> getDataLayout ( ) ; if ( ! VRegs . empty ( ) ) { SmallVector < ArgInfo , <NUM_LIT> > SplitArgs ; ArgInfo OrigArg { VRegs , Val -> getType ( ) , <NUM_LIT> } ;

setArgFlags ( OrigArg , AttributeList :: ReturnIndex , DL , F ) ;


<s> if ( ! VRegs . empty ( ) ) { SmallVector < ArgInfo , <NUM_LIT> > SplitArgs ; ArgInfo OrigArg { VRegs , Val -> getType ( ) , <NUM_LIT> } ; setArgFlags ( OrigArg , AttributeList :: ReturnIndex , DL , F ) ; splitToValueTypes ( OrigArg , SplitArgs , DL , F . getCallingConv ( ) ) ; OutgoingValueAssigner ArgAssigner ( AssignFn ) ;

OutgoingArgHandler ArgHandler ( MIRBuilder , MRI , MIB ) ;


<s> <ISA_LIT>CallLowering :: <ISA_LIT>CallLowering ( const <ISA_LIT>TargetLowering & TLI ) : CallLowering ( & TLI ) {


<s> <ISA_LIT>IncomingValueHandler ( MachineIRBuilder & MIRBuilder , MachineRegisterInfo & MRI ) : CallLowering :: IncomingValueHandler ( MIRBuilder , MRI ) {


<s> OutgoingArgHandler ( MachineIRBuilder & MIRBuilder , MachineRegisterInfo & MRI , MachineInstrBuilder MIB ) : OutgoingValueHandler ( MIRBuilder , MRI ) , MIB ( MIB ) {


<s> case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , false ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , false ) ; break ; } MI = NMI ; } if ( State . hasBase ( ) ) { State . setEnd ( MI ) ; Finish ( MBB , State ) ; } } return Modified ;


<s> assert ( Begin != nullptr ) ; return Begin ;


<s> if ( NewMask > Mask ) { return Ascending ; } else if ( NewMask < Mask ) { return Descending ;


<s> FunctionPass * llvm :: create<ISA_LIT>CollapseMOVEMPass ( ) { return new <ISA_LIT>CollapseMOVEM ( ) ;


<s> MachineBasicBlock :: iterator end ( ) { assert ( End != nullptr ) ;


<s> void Finish ( MachineBasicBlock & MBB , MOVEMState & State ) { auto MI = State . begin ( ) ; auto End = State . end ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; if ( std :: next ( MI ) == End ) { State = MOVEMState ( ) ; return ; }


<s> assert ( Start != INT_MIN && <STR_LIT> ) ;


<s> unsigned getMask ( ) const { return Mask ;


<s> StringRef getPassName ( ) const override {


<s> bool hasBase ( ) const { return Base != <NUM_LIT> ;


<s> bool isLoad ( ) const { return Access == AccessTy :: Load ;


<s> return Access == AccessTy :: Store ;


<s> <ISA_LIT>CollapseMOVEM ( ) : MachineFunctionPass ( ID ) {


<s> MOVEMState ( ) : Begin ( nullptr ) , End ( nullptr ) , Base ( <NUM_LIT> ) , Start ( INT_MIN ) , Stop ( INT_MAX ) , Mask ( <NUM_LIT> ) , Access ( AccessTy :: None ) {


<s> } else if ( Reg == TRI -> getStackRegister ( ) || Reg == TRI -> getBaseRegister ( ) || Reg == TRI -> getFrameRegister ( * MBB . getParent ( ) ) ) { State . setBegin ( MI ) ; State . setBase ( Reg ) ; State . update ( Offset , Mask ) ;

IsStore ? State . setStore ( ) : State . setLoad ( ) ;


<s> bool ProcessMI ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , MOVEMState & State , unsigned Mask , int Offset , unsigned Reg , bool IsStore = false ) { if ( State . hasBase ( ) ) { MOVEMState Temp = State ; if ( State . isStore ( ) == IsStore && State . getBase ( ) == Reg && State . update ( Offset , Mask ) ) {


<s> bool runOnMachineFunction ( MachineFunction & MF ) override { STI = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; TII = STI -> getInstrInfo ( ) ; TRI = STI -> getRegisterInfo ( ) ; MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; FL = STI -> getFrameLowering ( ) ; bool Modified = false ; MOVEMState State ; unsigned Mask = <NUM_LIT> ; unsigned Reg = <NUM_LIT> ; int Offset = <NUM_LIT> ; for ( auto & MBB : MF ) { auto MI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MI != E ) { auto NMI = std :: next ( MI ) ; switch ( MI -> getOpcode ( ) ) { default : if ( State . hasBase ( ) ) { State . setEnd ( MI ) ; Finish ( MBB , State ) ; Modified = true ; } break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> void setBase ( int Value ) { assert ( ! hasBase ( ) ) ; Base = Value ;


<s> UpdateType Type = classifyUpdateByMask ( M ) ; if ( Type == Intermixed ) return false ; if ( Start == INT_MIN ) { Start = Stop = O ; updateMask ( M ) ; return true ; } else if ( Type == Descending && O == Start - <NUM_LIT> ) { Start -= <NUM_LIT> ; updateMask ( M ) ; return true ; } else if ( Type == Ascending && O == Stop + <NUM_LIT> ) { Stop += <NUM_LIT> ; updateMask ( M ) ;


<s> updateMask ( M ) ; return true ; } else if ( Type == Descending && O == Start - <NUM_LIT> ) { Start -= <NUM_LIT> ; updateMask ( M ) ; return true ; } else if ( Type == Ascending && O == Stop + <NUM_LIT> ) {


<s> bool updateMask ( unsigned Value ) { assert ( isUInt < <NUM_LIT> > ( Value ) && <STR_LIT> ) ; assert ( ! ( Value & Mask ) && <STR_LIT> ) ; Mask |= Value ;


<s> return new <ISA_LIT>Disassembler ( STI , Ctx ) ;


<s> return DecodeRegisterClass ( Inst , RegNo | <NUM_LIT> , Address , Decoder ) ;


<s> static DecodeStatus DecodeCCRCRegisterClass ( MCInst & Inst , APInt & Insn , uint64_t Address , const void * Decoder ) {


<s> static DecodeStatus DecodeDR16RegisterClass ( MCInst & Inst , uint64_t RegNo , uint64_t Address , const void * Decoder ) {

return DecodeRegisterClass ( Inst , RegNo , Address , Decoder ) ;


<s> static DecodeStatus DecodeDR8RegisterClass ( MCInst & Inst , uint64_t RegNo , uint64_t Address , const void * Decoder ) { return DecodeRegisterClass ( Inst , RegNo , Address , Decoder ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( RegisterDecode [ RegNo ] ) ) ; return DecodeStatus :: Success ;


<s> static DecodeStatus DecodeRegisterClass ( MCInst & Inst , uint64_t RegNo , uint64_t Address , const void * Decoder ) { if ( RegNo >= <NUM_LIT> ) return DecodeStatus :: Fail ; Inst . addOperand ( MCOperand :: createReg ( RegisterDecode [ RegNo ] ) ) ; return DecodeStatus :: Success ;


<s> return DecodeRegisterClass ( Inst , RegNo , Address , Decoder ) ;


<s> DecodeStatus Result ; auto MakeUp = [ & ] ( APInt & Insn , unsigned InstrBits ) { unsigned Idx = Insn . getBitWidth ( ) >> <NUM_LIT> ; unsigned RoundUp = alignTo ( InstrBits , Align ( <NUM_LIT> ) ) ;

if ( RoundUp > Insn . getBitWidth ( ) ) Insn = Insn . zext ( RoundUp ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>Disassembler ( ) { TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>Disassembler ) ;


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx ) : MCDisassembler ( STI , Ctx ) {


<s> virtual ~ <ISA_LIT>Disassembler ( ) {


<s> BufferType :: const_iterator begin ( ) const { return Buffer . begin ( ) ;


<s> <ISA_LIT>InstructionBuffer MaskBuffer ( Mask . begin ( ) , Mask . begin ( ) + NumWords ) ; <ISA_LIT>InstructionBuffer ValueBuffer ( Value . begin ( ) , Value . begin ( ) + NumWords ) ; <ISA_LIT>InstructionLookup Ret ; Ret . OpCode = OpCode ;


<s> unsigned NumWords = numWords ( ) ; <ISA_LIT>InstructionBuffer MaskBuffer ( Mask . begin ( ) , Mask . begin ( ) + NumWords ) ; <ISA_LIT>InstructionBuffer ValueBuffer ( Value . begin ( ) , Value . begin ( ) + NumWords ) ; <ISA_LIT>InstructionLookup Ret ; Ret . OpCode = OpCode ; Ret . Mask = MaskBuffer ; Ret . Value = ValueBuffer ;


<s> unsigned Op = Bead & <NUM_LIT> ; switch ( Op ) { case <STR_LIT> : assert ( ( Ext == <STR_LIT> ) && <STR_LIT> ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Op != <STR_LIT> ) Builder . skipBits ( <NUM_LIT> ) ; if ( Op != <STR_LIT> && Op != <STR_LIT> ) Builder . skipBits ( <NUM_LIT> ) ; break ; case <STR_LIT> : Builder . skipBits ( <NUM_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : Builder . skipBits ( <NUM_LIT> ) ; break ; case <STR_LIT> : Builder . skipBits ( <NUM_LIT> ) ; break ; case <STR_LIT> : Builder . skipBits ( <NUM_LIT> ) ; break ; default :


<s> for ( const uint8_t * PartPtr = <STR_LIT> ( I ) ; * PartPtr ; ++ PartPtr ) { uint8_t Bead = * PartPtr ; unsigned Ext = Bead >> <NUM_LIT> ; unsigned Op = Bead & <NUM_LIT> ; switch ( Op ) { case <STR_LIT> : assert ( ( Ext == <STR_LIT> ) && <STR_LIT> ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : Builder . addBits ( <NUM_LIT> , Ext ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> static MCDisassembler * create<ISA_LIT>Disassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) {

return new <ISA_LIT>Disassembler ( STI , Ctx , T . createMCInstrInfo ( ) ) ;


<s> LLVM_DEBUG ( errs ( ) << format ( <STR_LIT> , Bead ) ) ; unsigned NumToRead ; switch ( Op ) { case <STR_LIT> : NumToRead = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : NumToRead = <NUM_LIT> ; break ; case <STR_LIT> : NumToRead = <NUM_LIT> ; break ; case <STR_LIT> : NumToRead = <NUM_LIT> ; break ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> if ( Op != <STR_LIT> ) Scratch = ( Scratch & ~ <NUM_LIT> ) | Reader . readBits ( <NUM_LIT> ) ; if ( Op != <STR_LIT> ) { bool DA = ( Op != <STR_LIT> ) && Reader . readBits ( <NUM_LIT> ) ;


<s> unsigned IsClear = ! ( WordValue & Bit ) ; if ( B == <NUM_LIT> ) dbgs ( ) << <STR_LIT> ; char Ch = IsMasked ? '?' : ( IsClear ? '0' : '1' ) ; dbgs ( ) << Ch ; } dbgs ( ) << <STR_LIT> ; }


<s> BufferType :: const_iterator end ( ) const {


<s> uint64_t Hi = Bytes [ Offset ] ; uint64_t Lo = Bytes [ Offset + <NUM_LIT> ] ; uint64_t Word = ( Hi << <NUM_LIT> ) | Lo ; Buffer [ I ] = Word ; LLVM_DEBUG ( errs ( ) << format ( <STR_LIT> , ( unsigned ) Word , Buffer . size ( ) ) ) ;


<s> unsigned Ext = Bead >> <NUM_LIT> ; const MCInstrDesc & Desc = MCII -> get ( Instr . getOpcode ( ) ) ;

auto MIOpIdx = <STR_LIT> ( Instr . getOpcode ( ) , Ext & <NUM_LIT> ) ;


<s> const MCInstrDesc & Desc = MCII -> get ( Instr . getOpcode ( ) ) ; auto MIOpIdx = <STR_LIT> ( Instr . getOpcode ( ) , Ext & <NUM_LIT> ) ; if ( <STR_LIT> ( Instr . getOpcode ( ) , Ext & <NUM_LIT> ) ) { bool IsPCRel = Desc . OpInfo [ MIOpIdx ] . OperandType == MCOI :: OPERAND_PCREL ; if ( IsPCRel ) MIOpIdx += <STR_LIT> ; else if ( Ext & <NUM_LIT> ) MIOpIdx += <STR_LIT> ; else MIOpIdx += <STR_LIT> ; }


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : MIOpIdx = getImmOperandIndex ( Instr , Bead ) ; assert ( ( ( OpType [ MIOpIdx ] == OperandType :: Invalid ) || ( OpType [ MIOpIdx ] == OperandType :: Imm ) ) && <STR_LIT> ) ; OpType [ MIOpIdx ] = OperandType :: Imm ; decodeImm ( Instr , Bead , Reader , Scratch [ MIOpIdx ] ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } } for ( unsigned DstMIOpIdx = <NUM_LIT> ; DstMIOpIdx < NumOperands ; ++ DstMIOpIdx ) { int TiedTo = Desc . getOperandConstraint ( DstMIOpIdx , MCOI :: TIED_TO ) ; if ( TiedTo < <NUM_LIT> ) continue ; unsigned SrcMIOpIdx = TiedTo ; unsigned OpCount = <NUM_LIT> ; for ( unsigned I = <NUM_LIT> ; ; ++ I ) { unsigned Offset = <STR_LIT> ( Instr . getOpcode ( ) , I ) ; assert ( Offset <= SrcMIOpIdx && <STR_LIT> ) ; if ( Offset == SrcMIOpIdx ) { OpCount = <STR_LIT> ( Instr . getOpcode ( ) , I ) ; break ; } } assert ( OpCount != <NUM_LIT> && <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I < OpCount ; ++ I ) { assert ( OpType [ DstMIOpIdx + I ] == OperandType :: Invalid && <STR_LIT> ) ; OpType [ DstMIOpIdx + I ] = OpType [ SrcMIOpIdx + I ] ; Scratch [ DstMIOpIdx + I ] = Scratch [ SrcMIOpIdx + I ] ; } } for ( unsigned O = <NUM_LIT> ; O < NumOperands ; ++ O ) { switch ( OpType [ O ] ) { case OperandType :: Invalid :


<s> unsigned <ISA_LIT>Disassembler :: getRegOperandIndex ( MCInst & Instr , unsigned Bead ) const { unsigned Ext = Bead >> <NUM_LIT> ; const MCInstrDesc & Desc = MCII -> get ( Instr . getOpcode ( ) ) ; auto MIOpIdx = <STR_LIT> ( Instr . getOpcode ( ) , Ext & <NUM_LIT> ) ; if ( <STR_LIT> ( Instr . getOpcode ( ) , Ext & <NUM_LIT> ) ) {

bool IsPCRel = Desc . OpInfo [ MIOpIdx ] . OperandType == MCOI :: OPERAND_PCREL ;


<s> bool <ISA_LIT>InstructionLookupBuilder :: isValid ( ) const {

for ( unsigned I = <NUM_LIT> , E = numWords ( ) ; I < E ; ++ I ) if ( Mask [ I ] ) return true ;


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx , MCInstrInfo * MCII ) : MCDisassembler ( STI , Ctx ) , MCII ( MCII ) { buildBeadTable ( ) ;


<s> <ISA_LIT>InstructionBuffer ( TIt Start , TIt End ) : Buffer ( Start , End ) {


<s> <ISA_LIT>InstructionLookupBuilder ( ) : NumWritten ( <NUM_LIT> ) {


<s> <ISA_LIT>InstructionReader ( <ISA_LIT>InstructionBuffer Buf ) : Buffer ( Buf ) , NumRead ( <NUM_LIT> ) {


<s> bool <ISA_LIT>InstructionLookup :: matches ( const <ISA_LIT>InstructionBuffer & Test ) const { if ( Test . size ( ) < Value . size ( ) ) return false ; for ( unsigned I = <NUM_LIT> , E = Value . size ( ) ; I < E ; ++ I ) { uint16_t Have = Test [ I ] ; uint16_t Need = Value [ I ] ; uint16_t WordMask = Mask [ I ] ; if ( ( Have & WordMask ) != Need ) return false ;


<s> unsigned numWords ( ) const { assert ( ! ( NumWritten & <NUM_LIT> ) && <STR_LIT> ) ;


<s> uint64_t ThisWord = Buffer [ WordIndex ] >> ( NumRead & <NUM_LIT> ) ; uint64_t Mask = ( <NUM_LIT> << ToRead ) - <NUM_LIT> ; Value |= ( ThisWord & Mask ) << BitsRead ; NumRead += ToRead ; BitsRead += ToRead ; } return Value ;


<s> unsigned size ( ) const { return Mask . size ( ) ;


<s> void truncate ( unsigned NewLength ) { assert ( ( NewLength <= Buffer . size ( ) ) && <STR_LIT> ) ; Buffer . resize ( NewLength ) ;


<s> assert ( ( NewLength <= Buffer . size ( ) ) && <STR_LIT> ) ;


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) { return std :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> return std :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { MCSymbolRefExpr :: VariantKind Modifier = Target . getAccessVariant ( ) ; unsigned Kind = Fixup . getKind ( ) ; <ISA_LIT>RelType Type = getType ( Kind , Modifier , IsPCRel ) ; switch ( Modifier ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_None : switch ( Type ) { case RT_32 : return IsPCRel ? ELF :: R_68K_PC32 : ELF :: R_68K_32 ; case RT_16 : return IsPCRel ? ELF :: R_68K_PC16 : ELF :: R_68K_16 ; case RT_8 : return IsPCRel ? ELF :: R_68K_PC8 : ELF :: R_68K_8 ; } llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_GOTPCREL : switch ( Type ) { case RT_32 : return ELF :: R_68K_GOTPCREL32 ; case RT_16 : return ELF :: R_68K_GOTPCREL16 ; case RT_8 : return ELF :: R_68K_GOTPCREL8 ; } llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_GOTOFF : assert ( ! IsPCRel ) ; switch ( Type ) { case RT_32 : return ELF :: R_68K_GOTOFF32 ; case RT_16 : return ELF :: R_68K_GOTOFF16 ; case RT_8 : return ELF :: R_68K_GOTOFF8 ; } llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_PLT : switch ( Type ) { case RT_32 : return ELF :: R_68K_PLT32 ; case RT_16 : return ELF :: R_68K_PLT16 ; case RT_8 : return ELF :: R_68K_PLT8 ; } llvm_unreachable ( <STR_LIT> ) ;


<s> case FK_PCRel_4 : return RT_32 ; case FK_PCRel_2 : case FK_Data_2 : return RT_16 ; case FK_PCRel_1 : case FK_Data_1 : return RT_8 ;


<s> switch ( Kind ) { case FK_Data_4 : case FK_PCRel_4 : return RT_32 ; case FK_PCRel_2 : case FK_Data_2 : return RT_16 ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_68K , true ) {


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> TII = STI -> getInstrInfo ( ) ; TRI = STI -> getRegisterInfo ( ) ;

MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;


<s> return new <ISA_LIT>ExpandPseudo ( ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>ExpandPseudoPass ( ) { return new <ISA_LIT>ExpandPseudo ( ) ;


<s> MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ; Modified |= ExpandMI ( MBB , MBBI ) ; MBBI = NMBBI ; }


<s> bool Modified = false ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ;


<s> AU . addPreservedID ( MachineDominatorsID ) ; MachineFunctionPass :: getAnalysisUsage ( AU ) ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override { AU . setPreservesCFG ( ) ; AU . addPreservedID ( MachineLoopInfoID ) ;

AU . addPreservedID ( MachineDominatorsID ) ;


<s> return MachineFunctionProperties ( ) . set ( MachineFunctionProperties :: Property :: NoVRegs ) ;


<s> <ISA_LIT>ExpandPseudo ( ) : MachineFunctionPass ( ID ) {


<s> MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; FL = STI -> getFrameLowering ( ) ; bool Modified = false ;

for ( MachineBasicBlock & MBB : MF ) Modified |= ExpandMBB ( MBB ) ;


<s> return isPCRel ? FK_PCRel_2 : FK_Data_2 ; case <NUM_LIT> : return isPCRel ? FK_PCRel_4 : FK_Data_4 ; case <NUM_LIT> : return isPCRel ? FK_PCRel_8 : FK_Data_8 ;


<s> case FK_SecRel_1 : case FK_Data_1 : return <NUM_LIT> ; case FK_PCRel_2 : case FK_SecRel_2 : case FK_Data_2 : return <NUM_LIT> ;


<s> bool IsSub = Offset < <NUM_LIT> ; uint64_t AbsOffset = IsSub ? - Offset : Offset ; unsigned Opc = IsSub ? <STR_LIT> : <STR_LIT> ;

MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ;


<s> MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; return MI ;


<s> MBB . erase ( PI ) ; if ( ! MergeWithPrevious ) MBBI = NI ; } else if ( Opc == <STR_LIT> && PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) { assert ( PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) ; Offset -= PI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; MBB . erase ( PI ) ; if ( ! MergeWithPrevious ) MBBI = NI ; }


<s> void <ISA_LIT>FrameLowering :: emitCalleeSavedFrameMoves ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MBBI , const DebugLoc & DL , bool IsProlog ) const { MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; const auto & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . empty ( ) ) return ; for ( const auto & I : CSI ) { int64_t Offset = MFI . getObjectOffset ( I . getFrameIdx ( ) ) ; unsigned Reg = I . getReg ( ) ; unsigned DwarfReg = MRI -> getDwarfRegNum ( Reg , true ) ;

BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfReg , Offset ) ) ;


<s> MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; int SpillSlotOffset = getOffsetOfLocalArea ( ) + <ISA_LIT>FI -> getTCReturnAddrDelta ( ) ; if ( hasFP ( MF ) ) { SpillSlotOffset -= SlotSize ; MFI . CreateFixedSpillStackObject ( SlotSize , SpillSlotOffset ) ; Register FPReg = TRI -> getFrameRegister ( MF ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i < e ; ++ i ) { if ( TRI -> regsOverlap ( CSI [ i ] . getReg ( ) , FPReg ) ) { CSI . erase ( CSI . begin ( ) + i ) ; break ; } } }


<s> DebugLoc DL ; if ( MBBI != MBB . end ( ) ) DL = MBBI -> getDebugLoc ( ) ; Register FramePtr = TRI -> getFrameRegister ( MF ) ; unsigned MachineFramePtr = FramePtr ; uint64_t StackSize = MFI . getStackSize ( ) ; uint64_t MaxAlign = calculateMaxStackAlign ( MF ) ; unsigned CSSize = MMFI -> getCalleeSavedFrameSize ( ) ; uint64_t NumBytes = <NUM_LIT> ; if ( hasFP ( MF ) ) { uint64_t FrameSize = StackSize - SlotSize ; NumBytes = FrameSize - CSSize ; if ( TRI -> hasStackRealignment ( MF ) ) NumBytes = alignTo ( FrameSize , MaxAlign ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , MachineFramePtr ) . setMIFlag ( MachineInstr :: FrameDestroy ) ; } else { NumBytes = StackSize - CSSize ; } while ( MBBI != MBB . begin ( ) ) { MachineBasicBlock :: iterator PI = std :: prev ( MBBI ) ; unsigned Opc = PI -> getOpcode ( ) ; if ( ( Opc != <STR_LIT> || ! PI -> getFlag ( MachineInstr :: FrameDestroy ) ) && Opc != <STR_LIT> && ! PI -> isTerminator ( ) ) break ; -- MBBI ; } MachineBasicBlock :: iterator FirstCSPop = MBBI ; if ( MBBI != MBB . end ( ) ) DL = MBBI -> getDebugLoc ( ) ; if ( NumBytes || MFI . hasVarSizedObjects ( ) ) NumBytes += mergeSPUpdates ( MBB , MBBI , true ) ; if ( ( TRI -> hasStackRealignment ( MF ) || MFI . hasVarSizedObjects ( ) ) ) { if ( TRI -> hasStackRealignment ( MF ) ) MBBI = FirstCSPop ; uint64_t LEAAmount = - CSSize ; if ( LEAAmount != <NUM_LIT> ) { unsigned Opc = <STR_LIT> ; <STR_LIT> ( BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) , FramePtr , false , LEAAmount ) ; -- MBBI ; } else { unsigned Opc = ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( FramePtr ) ; -- MBBI ; } } else if ( NumBytes ) { emitSPUpdate ( MBB , MBBI , NumBytes , true ) ; -- MBBI ; } if ( ! RetOpcode || ! isTailCallOpcode ( * RetOpcode ) ) { int Offset = - <NUM_LIT> * MMFI -> getTCReturnAddrDelta ( ) ; assert ( Offset >= <NUM_LIT> && <STR_LIT> ) ; if ( Offset ) { MBBI = MBB . getFirstTerminator ( ) ; Offset += mergeSPUpdates ( MBB , MBBI , true ) ; emitSPUpdate ( MBB , MBBI , Offset , true ) ; }


<s> uint64_t LEAAmount = - CSSize ; if ( LEAAmount != <NUM_LIT> ) { unsigned Opc = <STR_LIT> ; <STR_LIT> ( BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) , FramePtr , false , LEAAmount ) ; -- MBBI ; } else { unsigned Opc = ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( FramePtr ) ; -- MBBI ; } } else if ( NumBytes ) { emitSPUpdate ( MBB , MBBI , NumBytes , true ) ; -- MBBI ; } if ( ! RetOpcode || ! isTailCallOpcode ( * RetOpcode ) ) { int Offset = - <NUM_LIT> * MMFI -> getTCReturnAddrDelta ( ) ; assert ( Offset >= <NUM_LIT> && <STR_LIT> ) ; if ( Offset ) { MBBI = MBB . getFirstTerminator ( ) ; Offset += mergeSPUpdates ( MBB , MBBI , true ) ; emitSPUpdate ( MBB , MBBI , Offset , true ) ; } }


<s> uint64_t NumBytes = <NUM_LIT> ; int stackGrowth = - SlotSize ; if ( HasFP ) { uint64_t FrameSize = StackSize - SlotSize ; if ( MMFI -> getRestoreBasePointer ( ) ) FrameSize += SlotSize ; NumBytes = FrameSize - MMFI -> getCalleeSavedFrameSize ( ) ; if ( TRI -> hasStackRealignment ( MF ) ) NumBytes = alignTo ( NumBytes , MaxAlign ) ; MFI . setOffsetAdjustment ( - NumBytes ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( MachineFramePtr , RegState :: Kill ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , <NUM_LIT> * stackGrowth ) ) ; int DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; assert ( DwarfFramePtr > <NUM_LIT> ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfFramePtr , <NUM_LIT> * stackGrowth ) ) ; } BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , FramePtr ) . addReg ( StackPtr ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { unsigned DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createDefCfaRegister ( nullptr , DwarfFramePtr ) ) ; } for ( MachineBasicBlock & EveryMBB : MF ) EveryMBB . addLiveIn ( MachineFramePtr ) ; } else { NumBytes = StackSize - MMFI -> getCalleeSavedFrameSize ( ) ; } bool PushedRegs = false ; int StackOffset = <NUM_LIT> * stackGrowth ; while ( MBBI != MBB . end ( ) && MBBI -> getFlag ( MachineInstr :: FrameSetup ) && MBBI -> getOpcode ( ) == <STR_LIT> ) { PushedRegs = true ; ++ MBBI ; if ( ! HasFP && NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , StackOffset ) ) ; StackOffset += stackGrowth ; } } if ( TRI -> hasStackRealignment ( MF ) ) { assert ( HasFP && <STR_LIT> ) ; BuildStackAlignAND ( MBB , MBBI , DL , StackPtr , MaxAlign ) ; } NumBytes -= mergeSPUpdates ( MBB , MBBI , true ) ; emitSPUpdate ( MBB , MBBI , - ( int64_t ) NumBytes , false ) ; unsigned SPOrEstablisher = StackPtr ; if ( TRI -> hasBasePointer ( MF ) ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , BasePtr ) . addReg ( SPOrEstablisher ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( MMFI -> getRestoreBasePointer ( ) ) {


<s> if ( HasFP ) { uint64_t FrameSize = StackSize - SlotSize ; if ( MMFI -> getRestoreBasePointer ( ) ) FrameSize += SlotSize ; NumBytes = FrameSize - MMFI -> getCalleeSavedFrameSize ( ) ; if ( TRI -> hasStackRealignment ( MF ) ) NumBytes = alignTo ( NumBytes , MaxAlign ) ; MFI . setOffsetAdjustment ( - NumBytes ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( MachineFramePtr , RegState :: Kill ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , <NUM_LIT> * stackGrowth ) ) ; int DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; assert ( DwarfFramePtr > <NUM_LIT> ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfFramePtr , <NUM_LIT> * stackGrowth ) ) ; } BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , FramePtr ) . addReg ( StackPtr ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { unsigned DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createDefCfaRegister ( nullptr , DwarfFramePtr ) ) ; } for ( MachineBasicBlock & EveryMBB : MF ) EveryMBB . addLiveIn ( MachineFramePtr ) ; } else { NumBytes = StackSize - MMFI -> getCalleeSavedFrameSize ( ) ; } bool PushedRegs = false ; int StackOffset = <NUM_LIT> * stackGrowth ; while ( MBBI != MBB . end ( ) && MBBI -> getFlag ( MachineInstr :: FrameSetup ) && MBBI -> getOpcode ( ) == <STR_LIT> ) { PushedRegs = true ; ++ MBBI ; if ( ! HasFP && NeedsDwarfCFI ) { assert ( StackSize ) ;

BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , StackOffset ) ) ;


<s> if ( CSI . empty ( ) ) return ; for ( const auto & I : CSI ) { int64_t Offset = MFI . getObjectOffset ( I . getFrameIdx ( ) ) ; Register Reg = I . getReg ( ) ; unsigned DwarfReg = MRI -> getDwarfRegNum ( Reg , true ) ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; const auto & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . empty ( ) ) return ;


<s> case TargetOpcode :: PATCHABLE_RET : case <STR_LIT> : { SmallSet < uint16_t , <NUM_LIT> > Uses ; for ( unsigned i = <NUM_LIT> , e = MBBI -> getNumOperands ( ) ; i != e ; ++ i ) { MachineOperand & MO = MBBI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isDef ( ) ) continue ; Register Reg = MO . getReg ( ) ; if ( ! Reg ) continue ; for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) Uses . insert ( * AI ) ;


<s> switch ( MBBI -> getOpcode ( ) ) { default : return <NUM_LIT> ; case TargetOpcode :: PATCHABLE_RET : case <STR_LIT> : { SmallSet < uint16_t , <NUM_LIT> > Uses ; for ( unsigned i = <NUM_LIT> , e = MBBI -> getNumOperands ( ) ; i != e ; ++ i ) { MachineOperand & MO = MBBI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isDef ( ) ) continue ; Register Reg = MO . getReg ( ) ; if ( ! Reg ) continue ; for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) Uses . insert ( * AI ) ; } for ( auto CS : AvailableRegs ) if ( ! Uses . count ( CS ) ) return CS ; }


<s> unsigned Shift = MRI . getSpillRegisterOrder ( Reg ) ; Mask |= <NUM_LIT> << Shift ; } auto I = <STR_LIT> ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) . addImm ( Mask ) , FI ) . setMIFlag ( MachineInstr :: FrameDestroy ) ; for ( const auto & Info : CSI ) { I . addReg ( Info . getReg ( ) , RegState :: ImplicitDefine ) ;

<STR_LIT> ( I , Info . getFrameIdx ( ) , <NUM_LIT> ) ;


<s> bool <ISA_LIT>FrameLowering :: spillCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , ArrayRef < CalleeSavedInfo > CSI , const TargetRegisterInfo * TRI ) const { auto & MRI = * static_cast < const <ISA_LIT>RegisterInfo * > ( TRI ) ; auto DL = MBB . findDebugLoc ( MI ) ; int FI = <NUM_LIT> ; unsigned Mask = <NUM_LIT> ; for ( const auto & Info : CSI ) { FI = std :: max ( FI , Info . getFrameIdx ( ) ) ; Register Reg = Info . getReg ( ) ; unsigned Shift = MRI . getSpillRegisterOrder ( Reg ) ; Mask |= <NUM_LIT> << Shift ; } auto I = <STR_LIT> ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) , FI ) . addImm ( Mask ) . setMIFlag ( MachineInstr :: FrameSetup ) ;

const MachineFunction & MF = * MBB . getParent ( ) ;


<s> } auto I = <STR_LIT> ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) , FI ) . addImm ( Mask ) . setMIFlag ( MachineInstr :: FrameSetup ) ; const MachineFunction & MF = * MBB . getParent ( ) ; const MachineRegisterInfo & RI = MF . getRegInfo ( ) ; for ( const auto & Info : CSI ) { Register Reg = Info . getReg ( ) ;


<s> MFI . CreateFixedSpillStackObject ( SlotSize , SpillSlotOffset ) ; unsigned FPReg = TRI -> getFrameRegister ( MF ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i < e ; ++ i ) { if ( TRI -> regsOverlap ( CSI [ i ] . getReg ( ) , FPReg ) ) { CSI . erase ( CSI . begin ( ) + i ) ; break ; }


<s> void <ISA_LIT>FrameLowering :: BuildCFI ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MBBI , const DebugLoc & DL , const MCCFIInstruction & CFIInst ) const { MachineFunction & MF = * MBB . getParent ( ) ; unsigned CFIIndex = MF . addFrameInst ( CFIInst ) ; BuildMI ( MBB , MBBI , DL , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ;


<s> bool IsSub = Offset < <NUM_LIT> ; uint64_t AbsOffset = IsSub ? - Offset : Offset ; unsigned Opc = IsSub ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ;


<s> unsigned Opc = IsSub ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ;

MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ;


<s> unsigned AndOp = <STR_LIT> ; unsigned MovOp = <STR_LIT> ; unsigned Tmp = <STR_LIT> ; BuildMI ( MBB , MBBI , DL , TII . get ( MovOp ) , Tmp ) . addReg ( Reg ) . setMIFlag ( MachineInstr :: FrameSetup ) ;

MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( AndOp ) , Tmp ) . addReg ( Tmp ) . addImm ( Val ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( AndOp ) , Tmp ) . addReg ( Tmp ) . addImm ( Val ) . setMIFlag ( MachineInstr :: FrameSetup ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ;

BuildMI ( MBB , MBBI , DL , TII . get ( MovOp ) , Reg ) . addReg ( Tmp ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> if ( MF . getFunction ( ) . hasFnAttribute ( <STR_LIT> ) ) { if ( MFI . hasCalls ( ) ) MaxAlign = ( StackAlign > MaxAlign ) ? StackAlign : MaxAlign ; else if ( MaxAlign < SlotSize ) MaxAlign = SlotSize ; } return MaxAlign ;


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; uint64_t MaxAlign = MFI . getMaxAlign ( ) . value ( ) ; unsigned StackAlign = getStackAlignment ( ) ; if ( MF . getFunction ( ) . hasFnAttribute ( <STR_LIT> ) ) { if ( MFI . hasCalls ( ) ) MaxAlign = ( StackAlign > MaxAlign ) ? StackAlign : MaxAlign ; else if ( MaxAlign < SlotSize ) MaxAlign = SlotSize ; } return MaxAlign ;


<s> bool <ISA_LIT>FrameLowering :: canSimplifyCallFramePseudos ( const MachineFunction & MF ) const { return hasReservedCallFrame ( MF ) || ( hasFP ( MF ) && ! TRI -> hasStackRealignment ( MF ) ) || TRI -> hasBasePointer ( MF ) ;


<s> bool <ISA_LIT>FrameLowering :: canSimplifyCallFramePseudos ( const MachineFunction & MF ) const {

return hasReservedCallFrame ( MF ) || ( hasFP ( MF ) && ! TRI -> hasStackRealignment ( MF ) ) || TRI -> hasBasePointer ( MF ) ;


<s> MFI . CreateFixedObject ( - TailCallReturnAddrDelta , TailCallReturnAddrDelta - SlotSize , true ) ; } if ( TRI -> hasBasePointer ( MF ) ) { SavedRegs . set ( TRI -> getBaseRegister ( ) ) ;


<s> MachineBasicBlock :: iterator <ISA_LIT>FrameLowering :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { bool ReserveCallFrame = hasReservedCallFrame ( MF ) ; unsigned Opcode = I -> getOpcode ( ) ; bool IsDestroy = Opcode == TII . getCallFrameDestroyOpcode ( ) ; DebugLoc DL = I -> getDebugLoc ( ) ; uint64_t Amount = ! ReserveCallFrame ? I -> getOperand ( <NUM_LIT> ) . getImm ( ) : <NUM_LIT> ; uint64_t InternalAmt = ( IsDestroy && Amount ) ? I -> getOperand ( <NUM_LIT> ) . getImm ( ) : <NUM_LIT> ; I = MBB . erase ( I ) ; if ( ! ReserveCallFrame ) { unsigned StackAlign = getStackAlignment ( ) ; Amount = alignTo ( Amount , StackAlign ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const auto & Fn = MF . getFunction ( ) ; bool DwarfCFI = MMI . hasDebugInfo ( ) || Fn . needsUnwindTableEntry ( ) ; bool HasDwarfEHHandlers = ! MF . getLandingPads ( ) . empty ( ) ; if ( HasDwarfEHHandlers && ! IsDestroy && MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getHasPushSequences ( ) ) { BuildCFI ( MBB , I , DL , MCCFIInstruction :: createGnuArgsSize ( nullptr , Amount ) ) ; } if ( Amount == <NUM_LIT> ) return I ; Amount -= InternalAmt ; if ( IsDestroy && InternalAmt && DwarfCFI && ! hasFP ( MF ) ) BuildCFI ( MBB , I , DL , MCCFIInstruction :: createAdjustCfaOffset ( nullptr , - InternalAmt ) ) ; int64_t StackAdjustment = IsDestroy ? Amount : - Amount ; int64_t CfaAdjustment = - StackAdjustment ; if ( StackAdjustment ) { StackAdjustment += mergeSPUpdates ( MBB , I , true ) ; StackAdjustment += mergeSPUpdates ( MBB , I , false ) ; if ( StackAdjustment ) { BuildStackAdjustment ( MBB , I , DL , StackAdjustment , false ) ; } } if ( DwarfCFI && ! hasFP ( MF ) ) { if ( CfaAdjustment ) { BuildCFI ( MBB , I , DL , MCCFIInstruction :: createAdjustCfaOffset ( nullptr , CfaAdjustment ) ) ;


<s> } else { NumBytes = StackSize - CSSize ; } while ( MBBI != MBB . begin ( ) ) { MachineBasicBlock :: iterator PI = std :: prev ( MBBI ) ; unsigned Opc = PI -> getOpcode ( ) ; if ( ( Opc != <STR_LIT> || ! PI -> getFlag ( MachineInstr :: FrameDestroy ) ) && Opc != <STR_LIT> && ! PI -> isTerminator ( ) ) break ; -- MBBI ; } MachineBasicBlock :: iterator FirstCSPop = MBBI ; if ( MBBI != MBB . end ( ) ) DL = MBBI -> getDebugLoc ( ) ; if ( NumBytes || MFI . hasVarSizedObjects ( ) ) NumBytes += mergeSPUpdates ( MBB , MBBI , true ) ; if ( ( TRI -> hasStackRealignment ( MF ) || MFI . hasVarSizedObjects ( ) ) ) { if ( TRI -> hasStackRealignment ( MF ) ) MBBI = FirstCSPop ; uint64_t LEAAmount = - CSSize ; if ( LEAAmount != <NUM_LIT> ) { unsigned Opc = <STR_LIT> ; <STR_LIT> ( BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) , FramePtr , false , LEAAmount ) ; -- MBBI ; } else { unsigned Opc = ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( FramePtr ) ; -- MBBI ; } } else if ( NumBytes ) { emitSPUpdate ( MBB , MBBI , NumBytes , true ) ; -- MBBI ;


<s> if ( NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , <NUM_LIT> * stackGrowth ) ) ; int DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; assert ( DwarfFramePtr > <NUM_LIT> ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfFramePtr , <NUM_LIT> * stackGrowth ) ) ; } BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , FramePtr ) . addReg ( StackPtr ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { unsigned DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createDefCfaRegister ( nullptr , DwarfFramePtr ) ) ; } for ( MachineBasicBlock & EveryMBB : MF ) EveryMBB . addLiveIn ( MachineFramePtr ) ; } else { NumBytes = StackSize - MMFI -> getCalleeSavedFrameSize ( ) ; } bool PushedRegs = false ; int StackOffset = <NUM_LIT> * stackGrowth ; while ( MBBI != MBB . end ( ) && MBBI -> getFlag ( MachineInstr :: FrameSetup ) && MBBI -> getOpcode ( ) == <STR_LIT> ) { PushedRegs = true ; ++ MBBI ; if ( ! HasFP && NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: cfiDefCfaOffset ( nullptr , StackOffset ) ) ;


<s> if ( CSI . empty ( ) ) return ; for ( const auto & I : CSI ) { int64_t Offset = MFI . getObjectOffset ( I . getFrameIdx ( ) ) ; unsigned Reg = I . getReg ( ) ; unsigned DwarfReg = MRI -> getDwarfRegNum ( Reg , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfReg , Offset ) ) ;


<s> MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addReg ( Reg ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; Offset = <NUM_LIT> ; continue ; } } uint64_t ThisVal = std :: min ( Offset , Chunk ) ; MachineInstrBuilder MI = BuildStackAdjustment ( MBB , MBBI , DL , IsSub ? - ThisVal : ThisVal , InEpilogue ) ; if ( IsSub ) MI . setMIFlag ( MachineInstr :: FrameSetup ) ; else MI . setMIFlag ( MachineInstr :: FrameDestroy ) ; Offset -= ThisVal ;


<s> return <NUM_LIT> ; case TargetOpcode :: PATCHABLE_RET : case <STR_LIT> : { SmallSet < uint16_t , <NUM_LIT> > Uses ; for ( unsigned i = <NUM_LIT> , e = MBBI -> getNumOperands ( ) ; i != e ; ++ i ) { MachineOperand & MO = MBBI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isDef ( ) ) continue ; unsigned Reg = MO . getReg ( ) ; if ( ! Reg ) continue ; for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) Uses . insert ( * AI ) ;


<s> uint64_t StackSize = MFI . getStackSize ( ) ; bool HasFP = hasFP ( MF ) ; if ( TRI -> hasBasePointer ( MF ) ) { assert ( HasFP && <STR_LIT> ) ; if ( FI < <NUM_LIT> ) { return StackOffset :: getFixed ( Offset + SlotSize ) ; } assert ( ( - ( Offset + StackSize ) ) % MFI . getObjectAlign ( FI ) . value ( ) == <NUM_LIT> ) ; return StackOffset :: getFixed ( Offset + StackSize ) ; }

if ( TRI -> hasStackRealignment ( MF ) ) {


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetRegisterInfo * TRI = STI . getRegisterInfo ( ) ; return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MFI . hasVarSizedObjects ( ) || MFI . isFrameAddressTaken ( ) || TRI -> hasStackRealignment ( MF ) ;


<s> return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MFI . hasVarSizedObjects ( ) || MFI . isFrameAddressTaken ( ) || TRI -> hasStackRealignment ( MF ) ;


<s> return llvm :: any_of ( MBB . liveins ( ) , [ Reg ] ( MachineBasicBlock :: RegisterMaskPair RegMask ) { return RegMask . PhysReg == Reg ;


<s> return llvm :: any_of ( MBB . liveins ( ) , [ Reg ] ( MachineBasicBlock :: RegisterMaskPair RegMask ) { return RegMask . PhysReg == Reg ; } ) ;


<s> <ISA_LIT>FrameLowering :: <ISA_LIT>FrameLowering ( const <ISA_LIT>Subtarget & STI , Align Alignment ) : TargetFrameLowering ( StackGrowsDown , Alignment , - <NUM_LIT> ) , STI ( STI ) , TII ( * STI . getInstrInfo ( ) ) , TRI ( STI . getRegisterInfo ( ) ) {


<s> MachineBasicBlock :: iterator NI = MergeWithPrevious ? nullptr : std :: next ( MBBI ) ; unsigned Opc = PI -> getOpcode ( ) ; int Offset = <NUM_LIT> ; if ( ! MergeWithPrevious && NI != MBB . end ( ) && NI -> getOpcode ( ) == TargetOpcode :: CFI_INSTRUCTION ) { return Offset ; } if ( Opc == <STR_LIT> && PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) { assert ( PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) ; Offset += PI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; MBB . erase ( PI ) ; if ( ! MergeWithPrevious ) MBBI = NI ; } else if ( Opc == <STR_LIT> && PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) { assert ( PI -> getOperand ( <NUM_LIT> ) . getReg ( ) == StackPtr ) ; Offset -= PI -> getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> } auto I = <STR_LIT> ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) . addImm ( Mask ) , FI ) . setMIFlag ( MachineInstr :: FrameDestroy ) ; for ( const auto & Info : CSI ) { I . addReg ( Info . getReg ( ) , RegState :: ImplicitDefine ) ;


<s> unsigned Reg = Info . getReg ( ) ; unsigned Shift = MRI . getSpillRegisterOrder ( Reg ) ; Mask |= <NUM_LIT> << Shift ; } auto I = <STR_LIT> ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) , FI ) . addImm ( Mask ) . setMIFlag ( MachineInstr :: FrameSetup ) ; const MachineFunction & MF = * MBB . getParent ( ) ; const MachineRegisterInfo & RI = MF . getRegInfo ( ) ; for ( const auto & Info : CSI ) { unsigned Reg = Info . getReg ( ) ; bool IsLiveIn = RI . isLiveIn ( Reg ) ; if ( ! IsLiveIn ) MBB . addLiveIn ( Reg ) ; I . addReg ( Reg , IsLiveIn ? RegState :: Implicit : RegState :: ImplicitKill ) ; <STR_LIT> ( I , Info . getFrameIdx ( ) , <NUM_LIT> ) ; } return true ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> const MCOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . isExpr ( ) ) { MO . getExpr ( ) -> print ( O , & MAI ) ;


<s> void printAL16Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARI32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARI8Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARID32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printARIDMem ( MI , opNum , O ) ;


<s> void printARID8Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printARIDMem ( MI , opNum , O ) ;


<s> void <ISA_LIT>InstPrinter :: printARIDMem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { O << '(' ; printDisp ( MI , opNum + <STR_LIT> , O ) ; O << ',' ;

printOperand ( MI , opNum + <STR_LIT> , O ) ;


<s> printDisp ( MI , opNum + <STR_LIT> , O ) ; O << ',' ; printOperand ( MI , opNum + <STR_LIT> , O ) ;


<s> void printARII16Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARII32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printARIIMem ( MI , opNum , O ) ;


<s> printDisp ( MI , opNum + <STR_LIT> , O ) ; O << ',' ; printOperand ( MI , opNum + <STR_LIT> , O ) ; O << ',' ; printOperand ( MI , opNum + <STR_LIT> , O ) ; O << ')' ;


<s> printOperand ( MI , opNum + <STR_LIT> , O ) ; O << ',' ;


<s> O << '(' ; printOperand ( MI , opNum , O ) ; O << ')' ;


<s> void printARIPD16Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARIPD32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARIPD8Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printARIPI32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printARIPIMem ( MI , opNum , O ) ;


<s> void printAS16Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {


<s> void printAS32Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printAbsMem ( MI , opNum , O ) ;


<s> void printAS8Mem ( const MCInst * MI , unsigned opNum , raw_ostream & O ) { printAbsMem ( MI , opNum , O ) ;


<s> const MCOperand & Op = MI -> getOperand ( opNum ) ; if ( Op . isImm ( ) ) { O << Op . getImm ( ) ;


<s> } assert ( Op . isExpr ( ) && <STR_LIT> ) ; Op . getExpr ( ) -> print ( O , & MAI ) ;


<s> O << '#' ; MO . getExpr ( ) -> print ( O , & MAI ) ; } else llvm_unreachable ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printImmediate ( const MCInst * MI , unsigned opNum , raw_ostream & O ) {

const MCOperand & MO = MI -> getOperand ( opNum ) ;


<s> if ( ! printAliasInstr ( MI , Address , O ) ) printInstruction ( MI , Address , O ) ; printAnnotation ( O , Annot ) ;


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , uint64_t Address , StringRef Annot , const MCSubtargetInfo & STI , raw_ostream & O ) {

if ( ! printAliasInstr ( MI , Address , O ) ) printInstruction ( MI , Address , O ) ;


<s> if ( s != <NUM_LIT> && ( Mask & <NUM_LIT> ) && HalfMask ) O << '/' ; for ( int i = <NUM_LIT> ; HalfMask ; ++ i ) { if ( ( HalfMask >> i ) & <NUM_LIT> ) { HalfMask ^= <NUM_LIT> << i ; Reg = <STR_LIT> ( i + s ) ; printRegName ( O , Reg ) ; int j = i ; while ( ( HalfMask >> ( j + <NUM_LIT> ) ) & <NUM_LIT> ) HalfMask ^= <NUM_LIT> << ++ j ; if ( j != i ) { O << '-' ; Reg = <STR_LIT> ( j + s ) ; printRegName ( O , Reg ) ;


<s> const MCOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) { printRegName ( O , MO . getReg ( ) ) ; return ;


<s> void printPCD8Mem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) {

printPCDMem ( MI , Address , opNum , O ) ;


<s> printDisp ( MI , opNum + <STR_LIT> , O ) ;


<s> void <ISA_LIT>InstPrinter :: printPCDMem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) { O << '(' ; printDisp ( MI , opNum + <STR_LIT> , O ) ; O << <STR_LIT> ;


<s> printPCIMem ( MI , Address , opNum , O ) ;


<s> void printPCI16Mem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) { printPCIMem ( MI , Address , opNum , O ) ;


<s> void printPCI32Mem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) {

printPCIMem ( MI , Address , opNum , O ) ;


<s> void printPCI8Mem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) { printPCIMem ( MI , Address , opNum , O ) ;


<s> void <ISA_LIT>InstPrinter :: printPCIMem ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) { O << '(' ; printDisp ( MI , opNum + <STR_LIT> , O ) ; O << <STR_LIT> ; printOperand ( MI , opNum + <STR_LIT> , O ) ; O << ')' ;


<s> void printPCRelImm ( const MCInst * MI , uint64_t Address , unsigned opNum , raw_ostream & O ) { printAbsMem ( MI , opNum , O ) ;


<s> MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlign ( FI ) ) ;

return MIB . addImm ( Offset ) . addFrameIndex ( FI ) . addMemOperand ( MMO ) ;


<s> auto Flags = MachineMemOperand :: MONone ; if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ; if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlign ( FI ) ) ; return MIB . addMemOperand ( MMO ) ;


<s> MachineInstr * MI = MIB ; MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const MCInstrDesc & MCID = MI -> getDesc ( ) ; auto Flags = MachineMemOperand :: MONone ; if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ;

if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ;


<s> static inline const MachineInstrBuilder & addOffset ( const MachineInstrBuilder & MIB , int Offset ) {


<s> return MIB . addImm ( Offset ) . addReg ( Reg , getKillRegState ( IsKill ) ) ;


<s> unsigned R = Reg ; if ( To == <STR_LIT> ) { R = RI . getSubReg ( Reg , <STR_LIT> ) ; assert ( R && <STR_LIT> ) ; }

BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , R ) . addReg ( R ) ;


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , R ) . addReg ( R ) ; }

if ( To == <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) ;


<s> if ( To == <STR_LIT> ) And = <STR_LIT> ; else And = <STR_LIT> ;

BuildMI ( MBB , I , DL , get ( And ) , Reg ) . addReg ( Reg ) . addImm ( Mask ) ;


<s> if ( Cond . empty ( ) ) { if ( ! iter -> getOperand ( <NUM_LIT> ) . isMBB ( ) ) return true ; MachineBasicBlock * CondBranchTarget = iter -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( UncondBranch . first != MBB . rend ( ) ) { assert ( std :: next ( UncondBranch . first ) == iter && <STR_LIT> ) ; if ( AllowModify && MBB . isLayoutSuccessor ( CondBranchTarget ) ) { BranchCode = GetOppositeBranchCondition ( BranchCode ) ; unsigned BNCC = GetCondBranchFromCond ( BranchCode ) ; BuildMI ( MBB , * UncondBranch . first , MBB . rfindDebugLoc ( iter ) , get ( BNCC ) ) . addMBB ( UncondBranch . second ) ; EraseList . push_back ( * iter ) ; EraseList . push_back ( * UncondBranch . first ) ; TBB = UncondBranch . second ; FBB = nullptr ; Cond . push_back ( MachineOperand :: CreateImm ( BranchCode ) ) ; } else { TBB = CondBranchTarget ; FBB = UncondBranch . second ; Cond . push_back ( MachineOperand :: CreateImm ( BranchCode ) ) ; } UncondBranch = { MBB . rend ( ) , nullptr } ; continue ; } TBB = CondBranchTarget ; FBB = nullptr ; Cond . push_back ( MachineOperand :: CreateImm ( BranchCode ) ) ; continue ; } assert ( Cond . size ( ) == <NUM_LIT> ) ; assert ( TBB ) ; auto OldBranchCode = static_cast < <STR_LIT> > ( Cond [ <NUM_LIT> ] . getImm ( ) ) ; if ( ! iter -> getOperand ( <NUM_LIT> ) . isMBB ( ) ) return true ;

auto NewTBB = iter -> getOperand ( <NUM_LIT> ) . getMBB ( ) ;


<s> void <ISA_LIT>InstrInfo :: anchor ( ) {


<s> CGBR ( ) : MachineFunctionPass ( ID ) {


<s> else if ( <STR_LIT> . contains ( DstReg ) ) Opc = <STR_LIT> ; } else if ( <STR_LIT> . contains ( SrcReg ) && <STR_LIT> . contains ( DstReg ) ) Opc = <STR_LIT> ; if ( Opc ) { BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; return ; } bool FromCCR = SrcReg == <STR_LIT> ; bool FromSR = SrcReg == <STR_LIT> ; bool ToCCR = DstReg == <STR_LIT> ; bool ToSR = DstReg == <STR_LIT> ; if ( FromCCR ) { assert ( <STR_LIT> . contains ( DstReg ) && <STR_LIT> ) ; Opc = <STR_LIT> ; } else if ( ToCCR ) { assert ( <STR_LIT> . contains ( SrcReg ) && <STR_LIT> ) ; Opc = <STR_LIT> ; } else if ( FromSR || ToSR ) llvm_unreachable ( <STR_LIT> ) ; if ( Opc ) { BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; return ;


<s> return std :: make_pair ( TF , <NUM_LIT> ) ;


<s> std :: pair < unsigned , unsigned > <ISA_LIT>InstrInfo :: decomposeMachineOperandsTargetFlags ( unsigned TF ) const { return std :: make_pair ( TF , <NUM_LIT> ) ;


<s> static bool Expand2AddrUndef ( MachineInstrBuilder & MIB , const MCInstrDesc & Desc ) { assert ( Desc . getNumOperands ( ) == <NUM_LIT> && <STR_LIT> ) ; Register Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; MIB -> setDesc ( Desc ) ; MIB . addReg ( Reg , RegState :: Undef ) . addReg ( Reg , RegState :: Undef ) ;

assert ( MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && <STR_LIT> ) ;


<s> else MIB -> setDesc ( get ( <STR_LIT> ) ) ; auto & Opd = MIB -> getOperand ( <NUM_LIT> ) ; Opd . setReg ( getRegisterInfo ( ) . getMatchingSuperReg ( Opd . getReg ( ) , <STR_LIT> , & <STR_LIT> ) ) ; return true ;


<s> bool <ISA_LIT>InstrInfo :: ExpandCCR ( MachineInstrBuilder & MIB , bool IsToCCR ) const { if ( IsToCCR ) MIB -> setDesc ( get ( <STR_LIT> ) ) ; else MIB -> setDesc ( get ( <STR_LIT> ) ) ; auto & Opd = MIB -> getOperand ( <NUM_LIT> ) ; Opd . setReg ( getRegisterInfo ( ) . getMatchingSuperReg ( Opd . getReg ( ) , <STR_LIT> , & <STR_LIT> ) ) ;


<s> Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } else { Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } if ( ! XR32 -> contains ( Reg ) ) { Reg = RI . getMatchingMegaReg ( Reg , XR32 ) ; assert ( Reg && <STR_LIT> ) ; } unsigned Mask = <NUM_LIT> << RI . getSpillRegisterOrder ( Reg ) ;


<s> auto MI = MIB . getInstr ( ) ; auto & MBB = * MIB -> getParent ( ) ; if ( IsRM ) { Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } else { Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } if ( ! XR32 -> contains ( Reg ) ) { Reg = RI . getMatchingMegaReg ( Reg , XR32 ) ; assert ( Reg && <STR_LIT> ) ; } unsigned Mask = <NUM_LIT> << RI . getSpillRegisterOrder ( Reg ) ; if ( IsRM ) { BuildMI ( MBB , MI , DL , Desc ) . addImm ( Mask ) . addImm ( Offset ) . addReg ( Base ) . addReg ( Reg , RegState :: ImplicitDefine ) . copyImplicitOps ( * MIB ) ; } else {

BuildMI ( MBB , MI , DL , Desc ) . addImm ( Offset ) . addReg ( Base ) . addImm ( Mask ) . addReg ( Reg , RegState :: Implicit ) . copyImplicitOps ( * MIB ) ;


<s> MIB -> getOperand ( <NUM_LIT> ) . setReg ( SubDst ) ; MachineBasicBlock :: iterator I = MIB . getInstr ( ) ; I ++ ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( IsSigned ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ; AddSExt ( MBB , I , DL , Dst , MVTSrc , MVTDst ) ; } else {


<s> Register Dst = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register Src = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( Dst != Src && <STR_LIT> ) ; const auto & TRI = getRegisterInfo ( ) ; const auto * RCDst = TRI . getMaximalPhysRegClass ( Dst , MVTDst ) ; const auto * RCSrc = TRI . getMaximalPhysRegClass ( Src , MVTSrc ) ; assert ( RCDst && RCSrc && <STR_LIT> ) ; assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ;

MachineBasicBlock & MBB = * MIB -> getParent ( ) ;


<s> assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( Dst == SSrc ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << '\n' ) ; MIB -> eraseFromParent ( ) ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << <STR_LIT> ) ; MIB -> setDesc ( get ( Move ) ) ; MIB -> getOperand ( <NUM_LIT> ) . setReg ( SSrc ) ; } return true ;


<s> I ++ ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; MachineOperand MO = MIB -> getOperand ( <NUM_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( IsPush ) BuildMI ( MBB , I , DL , Desc ) . addReg ( RI . getStackRegister ( ) ) . add ( MO ) ; else BuildMI ( MBB , I , DL , Desc , MO . getReg ( ) ) . addReg ( RI . getStackRegister ( ) ) ; MIB -> eraseFromParent ( ) ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override {


<s> static inline <STR_LIT> GetCondFromBranchOpc ( unsigned Opcode ) { switch ( Opcode ) { default : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> <ISA_LIT>MachineFunctionInfo * MxFI = MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned GlobalBaseReg = MxFI -> getGlobalBaseReg ( ) ; if ( GlobalBaseReg != <NUM_LIT> ) return GlobalBaseReg ; MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ;

GlobalBaseReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ;


<s> unsigned getLoadRegOpcode ( unsigned DstReg , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI , const <ISA_LIT>Subtarget & STI ) { return getLoadStoreRegOpcode ( DstReg , RC , TRI , STI , true ) ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> StringRef getPassName ( ) const override {


<s> { MO_ABSOLUTE_ADDRESS , <STR_LIT> } , { MO_PC_RELATIVE_ADDRESS , <STR_LIT> } , { MO_GOT , <STR_LIT> } , { MO_GOTOFF , <STR_LIT> } , { MO_GOTPCREL , <STR_LIT> } , { MO_PLT , <STR_LIT> } } ;


<s> bool <ISA_LIT>InstrInfo :: getStackSlotRange ( const TargetRegisterClass * RC , unsigned SubIdx , unsigned & Size , unsigned & Offset , const MachineFunction & MF ) const {


<s> return getLoadStoreRegOpcode ( SrcReg , RC , TRI , STI , false ) ;


<s> BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return <NUM_LIT> ; } bool FallThru = FBB == nullptr ; unsigned Count = <NUM_LIT> ; <STR_LIT> CC = ( <STR_LIT> ) Cond [ <NUM_LIT> ] . getImm ( ) ; unsigned Opc = GetCondBranchFromCond ( CC ) ;

BuildMI ( & MBB , DL , get ( Opc ) ) . addMBB ( TBB ) ;


<s> static inline unsigned IsCMP ( unsigned Op ) { switch ( Op ) { default : return false ; case <STR_LIT> : case <STR_LIT> :


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; }


<s> StringRef InstrName ( & <ISA_LIT>InstrNameData [ NameIndices ] ) ; const unsigned OperandNo = MI -> getOperandNo ( & MO ) ; if ( OperandNo == <NUM_LIT> ) return Regex ( <STR_LIT> ) . match ( InstrName ) ;

if ( OperandNo == MI -> getNumExplicitOperands ( ) - <NUM_LIT> ) return Regex ( <STR_LIT> ) . match ( InstrName ) ;


<s> const unsigned OperandNo = MI -> getOperandNo ( & MO ) ; if ( OperandNo == <NUM_LIT> ) return Regex ( <STR_LIT> ) . match ( InstrName ) ; if ( OperandNo == MI -> getNumExplicitOperands ( ) - <NUM_LIT> ) return Regex ( <STR_LIT> ) . match ( InstrName ) ; return false ;


<s> unsigned Opc = getLoadRegOpcode ( DstReg , RC , TRI , Subtarget ) ; DebugLoc DL = MBB . findDebugLoc ( MI ) ; <STR_LIT> ( BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) , FrameIndex ) ;


<s> assert ( MF . getFrameInfo ( ) . getObjectSize ( FrameIndex ) == <NUM_LIT> && <STR_LIT> ) ; unsigned Opc = getLoadRegOpcode ( DstReg , RC , TRI , Subtarget ) ; DebugLoc DL = MBB . findDebugLoc ( MI ) ;

<STR_LIT> ( BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) , FrameIndex ) ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( const <ISA_LIT>Subtarget & STI ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) , Subtarget ( STI ) , RI ( STI ) {


<s> if ( I -> getOpcode ( ) != <STR_LIT> && getCondFromBranchOpc ( I -> getOpcode ( ) ) == <STR_LIT> ) break ; I -> eraseFromParent ( ) ;


<s> -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( I -> getOpcode ( ) != <STR_LIT> && getCondFromBranchOpc ( I -> getOpcode ( ) ) == <STR_LIT> ) break ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; ++ Count ; }


<s> DebugLoc DL = FirstMBB . findDebugLoc ( MBBI ) ; const <ISA_LIT>InstrInfo * TII = STI . getInstrInfo ( ) ;

BuildMI ( FirstMBB , MBBI , DL , TII -> get ( <STR_LIT> ) , GlobalBaseReg ) . addExternalSymbol ( <STR_LIT> , <STR_LIT> ) ;


<s> unsigned Opc = getStoreRegOpcode ( SrcReg , RC , TRI , Subtarget ) ; DebugLoc DL = MBB . findDebugLoc ( MI ) ; <STR_LIT> ( BuildMI ( MBB , MI , DL , get ( Opc ) ) , FrameIndex ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , Register SrcReg , bool IsKill , int FrameIndex , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { const MachineFunction & MF = * MBB . getParent ( ) ; assert ( MF . getFrameInfo ( ) . getObjectSize ( FrameIndex ) == <NUM_LIT> && <STR_LIT> ) ; unsigned Opc = getStoreRegOpcode ( SrcReg , RC , TRI , Subtarget ) ;

DebugLoc DL = MBB . findDebugLoc ( MI ) ;


<s> MIB -> setDesc ( Desc ) ; MIB . addReg ( Reg , RegState :: Undef ) . addReg ( Reg , RegState :: Undef ) ; assert ( MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && <STR_LIT> ) ; return true ;


<s> unsigned Move ; if ( MVTDst == <STR_LIT> ) Move = <STR_LIT> ; else Move = <STR_LIT> ; unsigned Dst = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Src = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( Dst != Src && <STR_LIT> ) ; const auto & TRI = getRegisterInfo ( ) ; const auto * RCDst = TRI . getMaximalPhysRegClass ( Dst , MVTDst ) ; const auto * RCSrc = TRI . getMaximalPhysRegClass ( Src , MVTSrc ) ; assert ( RCDst && RCSrc && <STR_LIT> ) ; assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( Dst != SSrc ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ; BuildMI ( MBB , MIB . getInstr ( ) , DL , get ( Move ) , Dst ) . addReg ( SSrc ) ; } if ( IsSigned ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ; AddSExt ( MBB , MIB . getInstr ( ) , DL , Dst , MVTSrc , MVTDst ) ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ; AddZExt ( MBB , MIB . getInstr ( ) , DL , Dst , MVTSrc , MVTDst ) ;


<s> unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( Dst == SSrc ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << '\n' ) ; MIB -> eraseFromParent ( ) ; } else {

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << <STR_LIT> ) ;


<s> const auto & TRI = getRegisterInfo ( ) ; const auto * RCDst = TRI . getMaximalPhysRegClass ( Dst , MVTDst ) ; const auto * RCSrc = TRI . getMaximalPhysRegClass ( Src , MVTSrc ) ; assert ( RCDst && RCSrc && <STR_LIT> ) ; assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( Dst == SSrc ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << '\n' ) ; MIB -> eraseFromParent ( ) ;


<s> static inline unsigned IsCMP ( unsigned Op ) { switch ( Op ) { default : return false ; case <STR_LIT> :


<s> bool <ISA_LIT>InstrInfo :: isPCRelRegisterOperandLegal ( const MachineOperand & MO ) const { assert ( MO . isReg ( ) ) ; const auto * MI = MO . getParent ( ) ; const uint8_t * Beads = <STR_LIT> ( MI -> getOpcode ( ) ) ; assert ( * Beads ) ; const uint8_t EncEAk [ <NUM_LIT> ] = { <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } ; for ( const uint8_t Pat : EncEAk ) { uint8_t Bead = * ( Beads ++ ) ; if ( ! Bead ) return false ;


<s> const uint8_t * Beads = <STR_LIT> ( MI -> getOpcode ( ) ) ; assert ( * Beads ) ; const uint8_t EncEAk [ <NUM_LIT> ] = { <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } ; for ( const uint8_t Pat : EncEAk ) {


<s> return new <ISA_LIT>InstructionSelector ( TM , Subtarget , RBI ) ;


<s> InstructionSelector * create<ISA_LIT>InstructionSelector ( const <ISA_LIT>TargetMachine & TM , const <ISA_LIT>Subtarget & Subtarget , const <ISA_LIT>RegisterBankInfo & RBI ) {

return new <ISA_LIT>InstructionSelector ( TM , Subtarget , RBI ) ;


<s> static const char * getName ( ) { return DEBUG_TYPE ;


<s> <ISA_LIT>InstructionSelector :: <ISA_LIT>InstructionSelector ( const <ISA_LIT>TargetMachine & TM , const <ISA_LIT>Subtarget & STI , const <ISA_LIT>RegisterBankInfo & RBI ) : InstructionSelector ( ) , TM ( TM ) , TII ( * STI . getInstrInfo ( ) ) , TRI ( * STI . getRegisterInfo ( ) ) , RBI ( RBI ) , {


<s> if ( ! isPreISelGenericOpcode ( I . getOpcode ( ) ) ) return true ; if ( selectImpl ( I , * CoverageInfo ) ) return true ; return false ;


<s> if ( selectImpl ( I , * CoverageInfo ) ) return true ;


<s> bool <ISA_LIT>DAGToDAGISel :: runOnMachineFunction ( MachineFunction & MF ) {

Subtarget = & MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ;


<s> return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> static bool doesDispFit ( <ISA_LIT>ISelAddressMode & AM , int64_t Val ) { if ( ! AM . isDispAddrType ( ) ) return false ;

return isIntN ( AM . getDispSize ( ) , Val ) ;


<s> return isIntN ( AM . getDispSize ( ) - <NUM_LIT> , AM . Disp ) ;


<s> dbgs ( ) << <STR_LIT> << Disp ; dbgs ( ) << <STR_LIT> ; if ( BaseReg . getNode ( ) ) BaseReg . getNode ( ) -> dump ( ) ; else dbgs ( ) << <STR_LIT> ; dbgs ( ) << <STR_LIT> << BaseFrameIndex ; dbgs ( ) << <STR_LIT> ; if ( IndexReg . getNode ( ) ) { IndexReg . getNode ( ) -> dump ( ) ; } else { dbgs ( ) << <STR_LIT> ;


<s> if ( Offset != <NUM_LIT> && ( AM . ES || AM . MCSym ) ) return false ; int64_t Val = AM . Disp + Offset ;


<s> unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ;


<s> auto & DL = MF -> getDataLayout ( ) ; return CurDAG -> getRegister ( GlobalBaseReg , TLI -> getPointerTy ( DL ) ) . getNode ( ) ;


<s> inline SDValue getI32Imm ( int64_t Imm , const SDLoc & DL ) { return CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ;


<s> inline SDValue getI32Imm ( int64_t Imm , const SDLoc & DL ) {

return CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ;


<s> inline SDValue getI8Imm ( int64_t Imm , const SDLoc & DL ) {


<s> return CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const { return Subtarget -> getInstrInfo ( ) ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const {


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> inline bool getSymbolicDisplacement ( <ISA_LIT>ISelAddressMode & AM , const SDLoc & DL , SDValue & Sym ) { if ( AM . GV ) { Sym = CurDAG -> getTargetGlobalAddress ( AM . GV , SDLoc ( ) , <STR_LIT> , AM . Disp , AM . SymbolFlags ) ; return true ; } if ( AM . CP ) { Sym = CurDAG -> getTargetConstantPool ( AM . CP , <STR_LIT> , AM . Alignment , AM . Disp , AM . SymbolFlags ) ; return true ; }


<s> const <ISA_LIT>TargetMachine & getTargetMachine ( ) {

return static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> return static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;