<s> FinalAction < F > finally ( F && f ) noexcept { return FinalAction < F > ( std :: forward < F > ( f ) ) ;


<s> FinalAction < F > finally ( F && f ) noexcept {

return FinalAction < F > ( std :: forward < F > ( f ) ) ;


<s> void applyFixup ( const MCAssembler & Asm , const MCFixup & Fixup , const MCValue & Target , MutableArrayRef < char > Data , uint64_t Value , bool IsResolved , const MCSubtargetInfo * STI ) const override { unsigned Size = <NUM_LIT> << getFixupKindLog2Size ( Fixup . getKind ( ) ) ; assert ( Fixup . getOffset ( ) + Size <= Data . size ( ) && <STR_LIT> ) ;

assert ( isIntN ( Size * <NUM_LIT> + <NUM_LIT> , Value ) && <STR_LIT> ) ;


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( const Target & T , const MCSubtargetInfo & STI , const MCRegisterInfo & MRI , const MCTargetOptions & Options ) {

const Triple & TheTriple = STI . getTargetTriple ( ) ;


<s> return create<ISA_LIT>ELFObjectWriter ( OSABI ) ;


return Value == <NUM_LIT> || int64_t ( Value ) != int64_t ( int8_t ( Value ) ) ;


<s> unsigned getMinimumNopSize ( ) const override {


<s> unsigned getNumFixupKinds ( ) const override { return llvm :: <STR_LIT> ;


<s> unsigned getNumFixupKinds ( ) const override {


<s> if ( R != Inst . getOpcode ( ) ) return R ; return getRelaxedOpcodeBranch ( Inst ) ;


<s> unsigned Op = Inst . getOpcode ( ) ; switch ( Op ) { default : return Op ;


<s> <ISA_LIT>AsmBackend ( const Target & T ) : MCAsmBackend ( <STR_LIT> ) {


<s> <ISA_LIT>ELFAsmBackend ( const Target & T , uint8_t OSABI ) : <ISA_LIT>AsmBackend ( T ) , OSABI ( OSABI ) {


<s> bool <ISA_LIT>AsmBackend :: mayNeedRelaxation ( const MCInst & Inst , const MCSubtargetInfo & STI ) const {

if ( getRelaxedOpcodeBranch ( Inst ) != Inst . getOpcode ( ) ) return true ;


<s> raw_svector_ostream OS ( Tmp ) ; Inst . dump_pretty ( OS ) ; OS << <STR_LIT> ;

report_fatal_error ( <STR_LIT> + OS . str ( ) ) ;


<s> uint64_t NumNops = Count / <NUM_LIT> ; for ( uint64_t i = <NUM_LIT> ; i != NumNops ; ++ i ) { OS << <STR_LIT> ; }


<s> void <ISA_LIT>AsmPrinter :: EmitEndOfAsmFile ( Module & M ) {


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyEnd ( ) {


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyStart ( ) {


<s> void <ISA_LIT>AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { switch ( MI -> getOpcode ( ) ) { default : { if ( MI -> isPseudo ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << MI -> getOpcode ( ) << <STR_LIT> ) ; llvm_unreachable ( <STR_LIT> ) ; } break ; } case <STR_LIT> : case <STR_LIT> : OutStreamer -> AddComment ( <STR_LIT> ) ; break ; } MCInst TmpInst0 ; MCInstLowering -> Lower ( MI , TmpInst0 ) ; OutStreamer -> EmitInstruction ( TmpInst0 , getSubtargetInfo ( ) ) ;


<s> OutStreamer -> EmitSyntaxDirective ( ) ;


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>Target ) ;


<s> Subtarget = static_cast < <ISA_LIT>TargetMachine & > ( TM ) . getSubtargetImpl ( ) ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) {

Subtarget = static_cast < <ISA_LIT>TargetMachine & > ( TM ) . getSubtargetImpl ( ) ;


<s> MCInstLowering = make_unique < <ISA_LIT>MCInstLower > ( MF , * this ) ;

AsmPrinter :: runOnMachineFunction ( MF ) ;


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> case <STR_LIT> : default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return false ; }


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> switch ( Flag ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ;


<s> default : return false ; case <STR_LIT> : case <STR_LIT> : return true ;


<s> switch ( TargetFlag ) { default : return false ; case <STR_LIT> : case <STR_LIT> :


<s> inline static bool isPCRelBlockReference ( unsigned char Flag ) { switch ( Flag ) { default : return false ; case <STR_LIT> : return true ; }


<s> default : return false ; case <STR_LIT> :: MxPCD32 : case <STR_LIT> :: MxPCD16 : case <STR_LIT> :: MxPCD8 : case <STR_LIT> :: MxPCI32 :


<s> bool isPtr = I != CCInfo . F . arg_end ( ) && I -> getType ( ) -> isPointerTy ( ) ; unsigned Reg = isPtr ? State . AllocateReg ( AddrRegList ) : State . AllocateReg ( DataRegList ) ; if ( Reg ) { State . addLoc ( CCValAssign :: getReg ( ValNo , ValVT , Reg , LocVT , LocInfo ) ) ; return true ;


<s> <ISA_LIT>CCState ( const llvm :: Function & F , CallingConv :: ID CC , bool isVarArg , MachineFunction & MF , SmallVectorImpl < CCValAssign > & locs , LLVMContext & C ) : CCState ( CC , isVarArg , MF , locs , C ) , F ( F ) {


<s> assert ( Value ) ; if ( Mask == <NUM_LIT> ) { return Ascending ; } else if ( Mask < Value ) { return Ascending ; } else if ( Mask > Value ) { return Descending ; } return Intermixed ;


<s> if ( Mask == <NUM_LIT> ) { return Ascending ;


<s> return new <ISA_LIT>CollapseMOVEM ( ) ;


<s> assert ( Begin != nullptr ) ; return Begin ;


<s> assert ( End != nullptr ) ; return End ;


<s> int GetFinalOffset ( ) { assert ( Start != INT_MIN ) ;


<s> unsigned GetMask ( ) { return Mask ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> bool IsStore ( ) { return Type == Store ;


<s> <ISA_LIT>CollapseMOVEM ( ) : MachineFunctionPass ( ID ) {


<s> MOVEMState ( ) : Begin ( nullptr ) , End ( nullptr ) , Base ( <NUM_LIT> ) , Start ( INT_MIN ) , Stop ( INT_MAX ) , Mask ( <NUM_LIT> ) , Type ( None ) {


<s> MOVEMState Temp = State ; if ( State . IsStore ( ) == IsStore && State . GetBase ( ) == Reg && State . Update ( Offset , Mask ) ) { return true ; } else { State = Temp ; State . SetEnd ( MI ) ; Finish ( MBB , State ) ; return ProcessMI ( MBB , MI , State , Mask , Offset , Reg , IsStore ) ; } } else if ( Reg == TRI -> getStackRegister ( ) || Reg == TRI -> getBaseRegister ( ) || Reg == TRI -> getFrameRegister ( * MBB . getParent ( ) ) ) { State . SetBegin ( MI ) ; State . SetBase ( Reg ) ; State . Update ( Offset , Mask ) ; IsStore ? State . SetStore ( ) : State . SetLoad ( ) ;


<s> Modified = true ; } break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , false ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , false ) ; break ; } MI = NMI ; }


<s> Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , true ) ; break ; case <STR_LIT> : Mask = MI -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Reg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Offset = <NUM_LIT> ; Modified |= ProcessMI ( MBB , MI , State , Mask , Offset , Reg , false ) ; break ; case <STR_LIT> :


<s> void SetBase ( int Value ) { assert ( ! HasBase ( ) ) ;


<s> assert ( Begin == nullptr ) ; Begin = MI ;


<s> assert ( End == nullptr ) ; End = MI ;


<s> void SetEnd ( MachineBasicBlock :: iterator & MI ) { assert ( End == nullptr ) ;


<s> UpdateType Type = ClassifyUpdateByMask ( M ) ; if ( Type == Intermixed ) return false ; if ( Start == INT_MIN ) { Start = Stop = O ; UpdateMask ( M ) ; return true ; } else if ( Type == Descending && O == Start - <NUM_LIT> ) {


<s> Start = Stop = O ; UpdateMask ( M ) ; return true ; } else if ( Type == Descending && O == Start - <NUM_LIT> ) { Start -= <NUM_LIT> ; UpdateMask ( M ) ; return true ; } else if ( Type == Ascending && O == Stop + <NUM_LIT> ) { Stop += <NUM_LIT> ; UpdateMask ( M ) ; return true ; }


<s> assert ( Value == ( Value & <NUM_LIT> ) && <STR_LIT> ) ; assert ( ! ( Value & Mask ) && <STR_LIT> ) ;


<s> assert ( ! ( Value & Mask ) && <STR_LIT> ) ; Mask |= Value ;


<s> return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) {

return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; case FK_Data_4 : case FK_PCRel_4 : return RT_32 ; case FK_PCRel_2 :


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_68K , true ) {


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> bool <ISA_LIT>ExpandPseudo :: ExpandMBB ( MachineBasicBlock & MBB ) { bool Modified = false ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ; Modified |= ExpandMI ( MBB , MBBI ) ; MBBI = NMBBI ; } return Modified ;


<s> bool Modified = false ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ; Modified |= ExpandMI ( MBB , MBBI ) ; MBBI = NMBBI ; } return Modified ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override { AU . setPreservesCFG ( ) ; AU . addPreservedID ( MachineLoopInfoID ) ;

AU . addPreservedID ( MachineDominatorsID ) ;


<s> MachineFunctionProperties getRequiredProperties ( ) const override { return MachineFunctionProperties ( ) . set ( MachineFunctionProperties :: Property :: NoVRegs ) ;


<s> MachineFunctionProperties getRequiredProperties ( ) const override {

return MachineFunctionProperties ( ) . set ( MachineFunctionProperties :: Property :: NoVRegs ) ;


<s> <ISA_LIT>ExpandPseudo ( ) : MachineFunctionPass ( ID ) {


<s> bool <ISA_LIT>ExpandPseudo :: runOnMachineFunction ( MachineFunction & MF ) { STI = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; TII = STI -> getInstrInfo ( ) ; TRI = STI -> getRegisterInfo ( ) ; MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; FL = STI -> getFrameLowering ( ) ;


<s> bool <ISA_LIT>ExpandPseudo :: runOnMachineFunction ( MachineFunction & MF ) { STI = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; TII = STI -> getInstrInfo ( ) ; TRI = STI -> getRegisterInfo ( ) ; MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; FL = STI -> getFrameLowering ( ) ; bool Modified = false ; for ( MachineBasicBlock & MBB : MF ) Modified |= ExpandMBB ( MBB ) ; return Modified ;


<s> static inline MCFixupKind getFixupForSize ( unsigned Size , bool isPCRel ) { switch ( Size ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> :

return isPCRel ? FK_PCRel_1 : FK_Data_1 ;


<s> case <NUM_LIT> : return isPCRel ? FK_PCRel_1 : FK_Data_1 ; case <NUM_LIT> : return isPCRel ? FK_PCRel_2 : FK_Data_2 ;


<s> case FK_Data_2 : return <NUM_LIT> ; case FK_PCRel_4 : case FK_SecRel_4 : case FK_Data_4 : return <NUM_LIT> ; }


<s> SpillSlotOffset -= SlotSize ; MFI . CreateFixedSpillStackObject ( SlotSize , SpillSlotOffset ) ; unsigned FPReg = TRI -> getFrameRegister ( MF ) ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { if ( TRI -> regsOverlap ( CSI [ i ] . getReg ( ) , FPReg ) ) { CSI . erase ( CSI . begin ( ) + i ) ; break ; } } } return false ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; unsigned CFIIndex = MF . addFrameInst ( CFIInst ) ;

BuildMI ( MBB , MBBI , DL , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ;


<s> unsigned CFIIndex = MF . addFrameInst ( CFIInst ) ; BuildMI ( MBB , MBBI , DL , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ;


<s> MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; return MI ;


<s> MachineInstrBuilder MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addImm ( AbsOffset ) ;

MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ;


<s> BuildMI ( MBB , MBBI , DL , TII . get ( MovOp ) , Tmp ) . addReg ( Reg ) . setMIFlag ( MachineInstr :: FrameSetup ) ;

MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( AndOp ) , Tmp ) . addReg ( Tmp ) . addImm ( Val ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> uint64_t Val = - MaxAlign ; unsigned AndOp = getANDriOpcode ( Val ) ; unsigned MovOp = getMOVrrOpcode ( ) ; unsigned Tmp = <STR_LIT> ; BuildMI ( MBB , MBBI , DL , TII . get ( MovOp ) , Tmp ) . addReg ( Reg ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> if ( MFI . hasCalls ( ) ) MaxAlign = ( StackAlign > MaxAlign ) ? StackAlign : MaxAlign ; else if ( MaxAlign < SlotSize ) MaxAlign = SlotSize ;


<s> if ( MF . getFunction ( ) . hasFnAttribute ( <STR_LIT> ) ) { if ( MFI . hasCalls ( ) ) MaxAlign = ( StackAlign > MaxAlign ) ? StackAlign : MaxAlign ; else if ( MaxAlign < SlotSize ) MaxAlign = SlotSize ;


<s> bool <ISA_LIT>FrameLowering :: canSimplifyCallFramePseudos ( const MachineFunction & MF ) const { return hasReservedCallFrame ( MF ) || ( hasFP ( MF ) && ! TRI -> needsStackRealignment ( MF ) ) || TRI -> hasBasePointer ( MF ) ;


<s> void <ISA_LIT>FrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;

int64_t TailCallReturnAddrDelta = <ISA_LIT>FI -> getTCReturnAddrDelta ( ) ;


<s> TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; int64_t TailCallReturnAddrDelta = <ISA_LIT>FI -> getTCReturnAddrDelta ( ) ; if ( TailCallReturnAddrDelta < <NUM_LIT> ) { MFI . CreateFixedObject ( - TailCallReturnAddrDelta , TailCallReturnAddrDelta - SlotSize , true ) ; }


<s> bool reserveCallFrame = hasReservedCallFrame ( MF ) ; unsigned Opcode = I -> getOpcode ( ) ; bool isDestroy = Opcode == TII . getCallFrameDestroyOpcode ( ) ; DebugLoc DL = I -> getDebugLoc ( ) ; uint64_t Amount = ! reserveCallFrame ? I -> getOperand ( <NUM_LIT> ) . getImm ( ) : <NUM_LIT> ; uint64_t InternalAmt = ( isDestroy && Amount ) ? I -> getOperand ( <NUM_LIT> ) . getImm ( ) : <NUM_LIT> ; I = MBB . erase ( I ) ; if ( ! reserveCallFrame ) { unsigned StackAlign = getStackAlignment ( ) ; Amount = alignTo ( Amount , StackAlign ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const auto & Fn = MF . getFunction ( ) ; bool DwarfCFI = MMI . hasDebugInfo ( ) || Fn . needsUnwindTableEntry ( ) ; bool HasDwarfEHHandlers = ! MF . getLandingPads ( ) . empty ( ) ; if ( HasDwarfEHHandlers && ! isDestroy && MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getHasPushSequences ( ) ) { BuildCFI ( MBB , I , DL , MCCFIInstruction :: createGnuArgsSize ( nullptr , Amount ) ) ; } if ( Amount == <NUM_LIT> ) return I ; Amount -= InternalAmt ; if ( isDestroy && InternalAmt && DwarfCFI && ! hasFP ( MF ) ) BuildCFI ( MBB , I , DL , MCCFIInstruction :: createAdjustCfaOffset ( nullptr , - InternalAmt ) ) ; int64_t StackAdjustment = isDestroy ? Amount : - Amount ; int64_t CfaAdjustment = - StackAdjustment ; if ( StackAdjustment ) { StackAdjustment += mergeSPUpdates ( MBB , I , true ) ; StackAdjustment += mergeSPUpdates ( MBB , I , false ) ; if ( StackAdjustment ) { BuildStackAdjustment ( MBB , I , DL , StackAdjustment , false ) ;


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . empty ( ) ) return ; for ( std :: vector < CalleeSavedInfo > :: const_iterator I = CSI . begin ( ) , E = CSI . end ( ) ; I != E ; ++ I ) { int64_t Offset = MFI . getObjectOffset ( I -> getFrameIdx ( ) ) ; unsigned Reg = I -> getReg ( ) ; unsigned DwarfReg = MRI -> getDwarfRegNum ( Reg , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfReg , Offset ) ) ; }


<s> } else { NumBytes = StackSize - CSSize ; } while ( MBBI != MBB . begin ( ) ) { MachineBasicBlock :: iterator PI = std :: prev ( MBBI ) ; unsigned Opc = PI -> getOpcode ( ) ; if ( ( Opc != <STR_LIT> || ! PI -> getFlag ( MachineInstr :: FrameDestroy ) ) && Opc != <STR_LIT> && ! PI -> isTerminator ( ) ) break ; -- MBBI ; } MachineBasicBlock :: iterator FirstCSPop = MBBI ; if ( MBBI != MBB . end ( ) ) DL = MBBI -> getDebugLoc ( ) ; if ( NumBytes || MFI . hasVarSizedObjects ( ) ) NumBytes += mergeSPUpdates ( MBB , MBBI , true ) ; if ( ( TRI -> needsStackRealignment ( MF ) || MFI . hasVarSizedObjects ( ) ) ) { if ( TRI -> needsStackRealignment ( MF ) ) MBBI = FirstCSPop ; uint64_t LEAAmount = - CSSize ; if ( LEAAmount != <NUM_LIT> ) { unsigned Opc = getLEArOpcode ( ) ; addRegIndirectWithDisp ( BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) , FramePtr , false , LEAAmount ) ; -- MBBI ; } else { unsigned Opc = ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( FramePtr ) ; -- MBBI ; } } else if ( NumBytes ) { emitSPUpdate ( MBB , MBBI , NumBytes , true ) ; -- MBBI ; } if ( ! RetOpcode || ! isTailCallOpcode ( * RetOpcode ) ) { int Offset = - <NUM_LIT> * MMFI -> getTCReturnAddrDelta ( ) ; assert ( Offset >= <NUM_LIT> && <STR_LIT> ) ; if ( Offset ) { MBBI = MBB . getFirstTerminator ( ) ; Offset += mergeSPUpdates ( MBB , MBBI , true ) ; emitSPUpdate ( MBB , MBBI , Offset , true ) ; } }


<s> if ( TailCallReturnAddrDelta < <NUM_LIT> ) { BuildStackAdjustment ( MBB , MBBI , DL , TailCallReturnAddrDelta , false ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } uint64_t NumBytes = <NUM_LIT> ; int stackGrowth = - SlotSize ; if ( HasFP ) { uint64_t FrameSize = StackSize - SlotSize ; if ( MMFI -> getRestoreBasePointer ( ) ) FrameSize += SlotSize ; NumBytes = FrameSize - MMFI -> getCalleeSavedFrameSize ( ) ; if ( TRI -> needsStackRealignment ( MF ) ) NumBytes = alignTo ( NumBytes , MaxAlign ) ; MFI . setOffsetAdjustment ( - NumBytes ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( MachineFramePtr , RegState :: Kill ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { assert ( StackSize ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createDefCfaOffset ( nullptr , <NUM_LIT> * stackGrowth ) ) ; int DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; assert ( DwarfFramePtr > <NUM_LIT> ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createOffset ( nullptr , DwarfFramePtr , <NUM_LIT> * stackGrowth ) ) ; } BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , FramePtr ) . addReg ( StackPtr ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( NeedsDwarfCFI ) { unsigned DwarfFramePtr = TRI -> getDwarfRegNum ( MachineFramePtr , true ) ; BuildCFI ( MBB , MBBI , DL , MCCFIInstruction :: createDefCfaRegister ( nullptr , DwarfFramePtr ) ) ; } for ( MachineBasicBlock & EveryMBB : MF ) EveryMBB . addLiveIn ( MachineFramePtr ) ; } else { NumBytes = StackSize - MMFI -> getCalleeSavedFrameSize ( ) ; } bool PushedRegs = false ; int StackOffset = <NUM_LIT> * stackGrowth ;

while ( MBBI != MBB . end ( ) && MBBI -> getFlag ( MachineInstr :: FrameSetup ) && MBBI -> getOpcode ( ) == <STR_LIT> ) {


<s> bool isSub = NumBytes < <NUM_LIT> ; uint64_t Offset = isSub ? - NumBytes : NumBytes ; uint64_t Chunk = ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ; DebugLoc DL = MBB . findDebugLoc ( MBBI ) ; while ( Offset ) { if ( Offset > Chunk ) { unsigned Reg = <NUM_LIT> ; if ( isSub && ! isRegLiveIn ( MBB , <STR_LIT> ) ) Reg = ( unsigned ) ( <STR_LIT> ) ; else Reg = findDeadCallerSavedReg ( MBB , MBBI , TRI ) ; if ( Reg ) { unsigned Opc = <STR_LIT> ; BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , Reg ) . addImm ( Offset ) ; Opc = isSub ? getSUBrrOpcode ( ) : getADDrrOpcode ( ) ; MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( Opc ) , StackPtr ) . addReg ( StackPtr ) . addReg ( Reg ) ; MI -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; Offset = <NUM_LIT> ;


<s> case TargetOpcode :: PATCHABLE_RET : case <STR_LIT> : { SmallSet < uint16_t , <NUM_LIT> > Uses ; for ( unsigned i = <NUM_LIT> , e = MBBI -> getNumOperands ( ) ; i != e ; ++ i ) { MachineOperand & MO = MBBI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isDef ( ) ) continue ; unsigned Reg = MO . getReg ( ) ; if ( ! Reg ) continue ; for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) Uses . insert ( * AI ) ; } for ( auto CS : AvailableRegs ) if ( ! Uses . count ( CS ) ) return CS ; } } return <NUM_LIT> ;


<s> static unsigned getADDriOpcode ( int64_t Imm ) { return <STR_LIT> ;


<s> static unsigned getADDriOpcode ( int64_t Imm ) {


<s> else FrameReg = TRI -> getFrameRegister ( MF ) ; int Offset = MFI . getObjectOffset ( FI ) - getOffsetOfLocalArea ( ) ; const <ISA_LIT>MachineFunctionInfo * MMFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; uint64_t StackSize = MFI . getStackSize ( ) ; bool HasFP = hasFP ( MF ) ; if ( TRI -> hasBasePointer ( MF ) ) { assert ( HasFP && <STR_LIT> ) ; if ( FI < <NUM_LIT> ) { return Offset + SlotSize ; } else { assert ( ( - ( Offset + StackSize ) ) % MFI . getObjectAlignment ( FI ) == <NUM_LIT> ) ; return Offset + StackSize ; } } else if ( TRI -> needsStackRealignment ( MF ) ) { if ( FI < <NUM_LIT> ) { return Offset + SlotSize ; } else { assert ( ( - ( Offset + StackSize ) ) % MFI . getObjectAlignment ( FI ) == <NUM_LIT> ) ; return Offset + StackSize ; } } else { if ( ! HasFP ) return Offset + StackSize ; Offset += SlotSize ; int TailCallReturnAddrDelta = MMFI -> getTCReturnAddrDelta ( ) ; if ( TailCallReturnAddrDelta < <NUM_LIT> ) Offset -= TailCallReturnAddrDelta ; }


<s> static unsigned getMOVrrOpcode ( ) {


<s> static unsigned getSUBriOpcode ( int64_t Imm ) { return <STR_LIT> ;


<s> static unsigned getSUBrrOpcode ( ) { return <STR_LIT> ;


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;

const TargetRegisterInfo * TRI = STI . getRegisterInfo ( ) ;


<s> return ! MF . getFrameInfo ( ) . hasVarSizedObjects ( ) && ! MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getHasPushSequences ( ) ;


<s> for ( MachineBasicBlock :: RegisterMaskPair RegMask : MBB . liveins ( ) ) { if ( RegMask . PhysReg == Reg ) return true ; } return false ;


<s> <ISA_LIT>FrameLowering :: <ISA_LIT>FrameLowering ( const <ISA_LIT>Subtarget & STI , unsigned Alignment ) : TargetFrameLowering ( StackGrowsDown , Alignment , - <NUM_LIT> ) , STI ( STI ) , TII ( * STI . getInstrInfo ( ) ) , TRI ( STI . getRegisterInfo ( ) ) {


<s> return MF . getFrameInfo ( ) . hasStackObjects ( ) || MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getHasPushSequences ( ) ;


<s> FI = std :: max ( FI , CSI [ i ] . getFrameIdx ( ) ) ; unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned Shift = MRI . getSpillRegisterOrder ( Reg ) ; Mask |= <NUM_LIT> << Shift ; }

auto I = addFrameReference ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) . addImm ( Mask ) , FI ) . setMIFlag ( MachineInstr :: FrameDestroy ) ;


<s> auto I = addFrameReference ( BuildMI ( MBB , MI , DL , TII . get ( <STR_LIT> ) ) . addImm ( Mask ) , FI ) . setMIFlag ( MachineInstr :: FrameDestroy ) ; for ( size_t i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { I . addReg ( CSI [ i ] . getReg ( ) , RegState :: ImplicitDefine ) ; addMemOperand ( I , CSI [ i ] . getFrameIdx ( ) , <NUM_LIT> ) ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> void printAL16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printAL32Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printARI16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printARID16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printARIDMem ( MI , opNum , O ) ;


<s> void printARID8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printARIIMem ( const MCInst * MI , int opNum , raw_ostream & O ) { O << '(' ; printDisp ( MI , opNum + <STR_LIT> , O ) ; O << ',' ; printOperand ( MI , opNum + <STR_LIT> , O ) ;


<s> void <ISA_LIT>InstPrinter :: printARIMem ( const MCInst * MI , int opNum , raw_ostream & O ) { O << '(' ; printOperand ( MI , opNum , O ) ; O << ')' ;


<s> void printARIPD16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printARIPDMem ( MI , opNum , O ) ;


<s> void printARIPD8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printARIPDMem ( MI , opNum , O ) ;


<s> void printARIPD8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> O << <STR_LIT> ; printOperand ( MI , opNum , O ) ; O << <STR_LIT> ;


<s> void printARIPI16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printARIPIMem ( MI , opNum , O ) ;


<s> void printARIPI32Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printARIPI8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> printOperand ( MI , opNum , O ) ; O << <STR_LIT> ;


<s> void printAS16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printAbsMem ( MI , opNum , O ) ;


<s> void printAS8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printAbsMem ( MI , opNum , O ) ;


<s> } assert ( Op . isExpr ( ) && <STR_LIT> ) ;

Op . getExpr ( ) -> print ( O , & MAI ) ;


<s> } else if ( MO . isExpr ( ) ) { O << '#' ; MO . getExpr ( ) -> print ( O , & MAI ) ; } else {


MO . getExpr ( ) -> print ( O , & MAI ) ;


<s> if ( HalfMask && s != <NUM_LIT> ) { O << ',' ; } for ( int i = <NUM_LIT> ; HalfMask ; ++ i ) { if ( ( HalfMask >> i ) & <NUM_LIT> ) { HalfMask ^= <NUM_LIT> << i ; Reg = <STR_LIT> ( i + s ) ; printRegName ( O , Reg ) ;


<s> const MCOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) { printRegName ( O , MO . getReg ( ) ) ;


<s> } if ( MO . isImm ( ) ) { printImmediate ( MI , OpNo , O ) ; return ; } assert ( MO . isExpr ( ) && <STR_LIT> ) ; MO . getExpr ( ) -> print ( O , & MAI ) ;


<s> void printPCD8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> printDisp ( MI , opNum + <STR_LIT> , O ) ; O << <STR_LIT> ;


<s> void printPCI16Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printPCI32Mem ( const MCInst * MI , int opNum , raw_ostream & O ) {


<s> void printPCI8Mem ( const MCInst * MI , int opNum , raw_ostream & O ) { printPCIMem ( MI , opNum , O ) ;


printOperand ( MI , opNum + <STR_LIT> , O ) ;


<s> OS << <STR_LIT> << StringRef ( getRegisterName ( RegNo ) ) ;


<s> auto Flags = MachineMemOperand :: MONone ; if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ; if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlignment ( FI ) ) ; return MIB . addImm ( Offset ) . addFrameIndex ( FI ) . addMemOperand ( MMO ) ;


<s> static inline const MachineInstrBuilder & addFrameReference ( const MachineInstrBuilder & MIB , int FI , int Offset = <NUM_LIT> ) { MachineInstr * MI = MIB ; MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const MCInstrDesc & MCID = MI -> getDesc ( ) ; auto Flags = MachineMemOperand :: MONone ; if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ; if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlignment ( FI ) ) ; return MIB . addImm ( Offset ) . addFrameIndex ( FI ) . addMemOperand ( MMO ) ;


<s> if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ; if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ;

MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlignment ( FI ) ) ;


<s> static inline const MachineInstrBuilder & addMemOperand ( const MachineInstrBuilder & MIB , int FI , int Offset = <NUM_LIT> ) { MachineInstr * MI = MIB ; MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const MCInstrDesc & MCID = MI -> getDesc ( ) ; auto Flags = MachineMemOperand :: MONone ; if ( MCID . mayLoad ( ) ) Flags |= MachineMemOperand :: MOLoad ;

if ( MCID . mayStore ( ) ) Flags |= MachineMemOperand :: MOStore ;


<s> static inline const MachineInstrBuilder & addOffset ( const MachineInstrBuilder & MIB , int Offset ) { return MIB . addImm ( Offset ) ;


<s> void <ISA_LIT>InstrInfo :: AddZExt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , DebugLoc DL , unsigned Reg , MVT From , MVT To ) const { unsigned Mask , And ; if ( From == <STR_LIT> ) { Mask = <NUM_LIT> ; } else { Mask = <NUM_LIT> ; } if ( To == <STR_LIT> ) { And = <STR_LIT> ; } else {


<s> return AnalyzeBranchImpl ( MBB , TBB , FBB , Cond , AllowModify ) ;


<s> } ) ; for ( auto iter = MBB . rbegin ( ) ; iter != MBB . rend ( ) ; iter = std :: next ( iter ) ) { auto Opcode = iter -> getOpcode ( ) ; if ( iter -> isDebugInstr ( ) ) { continue ; } if ( ! isUnpredicatedTerminator ( * iter ) ) { break ; } if ( ! iter -> isBranch ( ) ) { return true ; } if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) { UncondBranch = { iter , iter -> getOperand ( <NUM_LIT> ) . getMBB ( ) } ; TBB = UncondBranch . second ; if ( ! AllowModify ) { continue ; } EraseList . insert ( EraseList . begin ( ) , MBB . rbegin ( ) , iter ) ; Cond . clear ( ) ; FBB = nullptr ; if ( MBB . isLayoutSuccessor ( UncondBranch . second ) ) { TBB = nullptr ; EraseList . push_back ( * iter ) ; UncondBranch = { MBB . rend ( ) , nullptr } ; } continue ; } auto BranchCode = <STR_LIT> ( Opcode ) ; if ( BranchCode == <STR_LIT> ) { return true ; } if ( Cond . empty ( ) ) { MachineBasicBlock * CondBranchTarget = iter -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( UncondBranch . first != MBB . rend ( ) ) { assert ( std :: next ( UncondBranch . first ) == iter && <STR_LIT> ) ; if ( AllowModify && MBB . isLayoutSuccessor ( CondBranchTarget ) ) { BranchCode = GetOppositeBranchCondition ( BranchCode ) ; unsigned BNCC = GetCondBranchFromCond ( BranchCode ) ; BuildMI ( MBB , * UncondBranch . first , MBB . findDebugLoc ( iter ) , get ( BNCC ) ) . addMBB ( UncondBranch . second ) ; EraseList . push_back ( * iter ) ; EraseList . push_back ( * UncondBranch . first ) ; TBB = UncondBranch . second ; FBB = nullptr ; Cond . push_back ( MachineOperand :: CreateImm ( BranchCode ) ) ; } else { TBB = CondBranchTarget ; FBB = UncondBranch . second ; Cond . push_back ( MachineOperand :: CreateImm ( BranchCode ) ) ; } UncondBranch = { MBB . rend ( ) , nullptr } ; continue ; } TBB = CondBranchTarget ;


<s> void <ISA_LIT>InstrInfo :: anchor ( ) {


<s> CGBR ( ) : MachineFunctionPass ( ID ) {


<s> if ( <STR_LIT> . contains ( DstReg ) ) { Opc = <STR_LIT> ; } } if ( Opc ) { BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; return ; } bool FromCCR = SrcReg == <STR_LIT> ; bool FromSR = SrcReg == <STR_LIT> ; bool ToCCR = DstReg == <STR_LIT> ; bool ToSR = DstReg == <STR_LIT> ; if ( FromCCR ) { assert ( <STR_LIT> . contains ( DstReg ) && <STR_LIT> ) ; Opc = <STR_LIT> ; } else if ( ToCCR ) { assert ( <STR_LIT> . contains ( SrcReg ) && <STR_LIT> ) ; Opc = <STR_LIT> ; } else if ( FromSR || ToSR ) { llvm_unreachable ( <STR_LIT> ) ; } if ( Opc ) { BuildMI ( MBB , MI , DL , get ( Opc ) , DstReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; return ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << RI . getName ( SrcReg ) << <STR_LIT> << RI . getName ( DstReg ) << '\n' ) ;


<s> std :: pair < unsigned , unsigned > <ISA_LIT>InstrInfo :: decomposeMachineOperandsTargetFlags ( unsigned TF ) const { return std :: make_pair ( TF , <NUM_LIT> ) ;


<s> MIB . addReg ( Reg , RegState :: Undef ) . addReg ( Reg , RegState :: Undef ) ; assert ( MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) == Reg && <STR_LIT> ) ;


<s> static bool Expand2AddrUndef ( MachineInstrBuilder & MIB , const MCInstrDesc & Desc ) { assert ( Desc . getNumOperands ( ) == <NUM_LIT> && <STR_LIT> ) ;

unsigned Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> MIB -> setDesc ( get ( <STR_LIT> ) ) ; } else { MIB -> setDesc ( get ( <STR_LIT> ) ) ; } auto & Opd = MIB -> getOperand ( <NUM_LIT> ) ;

Opd . setReg ( getRegisterInfo ( ) . getMatchingSuperReg ( Opd . getReg ( ) , <STR_LIT> , & <STR_LIT> ) ) ;


<s> Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } else { Offset = MIB -> getOperand ( <NUM_LIT> ) . getImm ( ) ; Base = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Reg = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } if ( ! XR32 -> contains ( Reg ) ) { Reg = RI . getMatchingMegaReg ( Reg , XR32 ) ; assert ( Reg && <STR_LIT> ) ; } unsigned Mask = <NUM_LIT> << RI . getSpillRegisterOrder ( Reg ) ; if ( isRM ) { BuildMI ( MBB , MI , DL , Desc ) . addImm ( Mask ) . addImm ( Offset ) . addReg ( Base ) . addReg ( Reg , RegState :: ImplicitDefine ) . copyImplicitOps ( * MIB ) ; } else {

BuildMI ( MBB , MI , DL , Desc ) . addImm ( Offset ) . addReg ( Base ) . addImm ( Mask ) . addReg ( Reg , RegState :: Implicit ) . copyImplicitOps ( * MIB ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << <STR_LIT> ) ; unsigned Dst = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SubDst = RI . getSubReg ( Dst , MVTSrc == <STR_LIT> ? <STR_LIT> : <STR_LIT> ) ; assert ( SubDst && <STR_LIT> ) ; MIB -> setDesc ( Desc ) ; MIB -> getOperand ( <NUM_LIT> ) . setReg ( SubDst ) ; MachineBasicBlock :: iterator I = MIB . getInstr ( ) ; I ++ ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( isSigned ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ; AddSExt ( MBB , I , DL , Dst , MVTSrc , MVTDst ) ;


<s> MIB -> setDesc ( Desc ) ; MIB -> getOperand ( <NUM_LIT> ) . setReg ( SubDst ) ; MachineBasicBlock :: iterator I = MIB . getInstr ( ) ; I ++ ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( isSigned ) {

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << '\n' ) ;


<s> Move = <STR_LIT> ; } else { Move = <STR_LIT> ; } unsigned Dst = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Src = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( Dst != Src && <STR_LIT> ) ; auto TRI = getRegisterInfo ( ) ; auto RCDst = TRI . getMaximalPhysRegClass ( Dst , MVTDst ) ; auto RCSrc = TRI . getMaximalPhysRegClass ( Src , MVTSrc ) ; assert ( RCDst && RCSrc && <STR_LIT> ) ; assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ;


<s> assert ( RCDst && RCSrc && <STR_LIT> ) ; assert ( RCDst != RCSrc && <STR_LIT> ) ; unsigned SSrc = RI . getMatchingMegaReg ( Src , RCDst ) ; assert ( SSrc && <STR_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( Dst == SSrc ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << '\n' ) ; MIB -> eraseFromParent ( ) ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * MIB . getInstr ( ) << <STR_LIT> ) ; MIB -> setDesc ( get ( Move ) ) ; MIB -> getOperand ( <NUM_LIT> ) . setReg ( SSrc ) ; }


<s> SubIdx = <STR_LIT> ; } unsigned Dst = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Src = MIB -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( Dst != Src && <STR_LIT> ) ; auto TRI = getRegisterInfo ( ) ; auto RCDst = TRI . getMaximalPhysRegClass ( Dst , MVTDst ) ; auto RCSrc = TRI . getMaximalPhysRegClass ( Src , MVTSrc ) ; assert ( RCDst && RCSrc && <STR_LIT> ) ;

assert ( RCDst != RCSrc && <STR_LIT> ) ;


<s> case <STR_LIT> : return ExpandPUSH_POP ( MIB , get ( <STR_LIT> ) , false ) ; case <STR_LIT> : return ExpandPUSH_POP ( MIB , get ( <STR_LIT> ) , false ) ; case <STR_LIT> : return ExpandPUSH_POP ( MIB , get ( <STR_LIT> ) , false ) ; case <STR_LIT> : return Expand2AddrUndef ( MIB , get ( <STR_LIT> ) ) ; case <STR_LIT> : return Expand2AddrUndef ( MIB , get ( <STR_LIT> ) ) ; case <STR_LIT> : return Expand2AddrUndef ( MIB , get ( <STR_LIT> ) ) ; }


<s> I ++ ; MachineBasicBlock & MBB = * MIB -> getParent ( ) ; MachineOperand MO = MIB -> getOperand ( <NUM_LIT> ) ; DebugLoc DL = MIB -> getDebugLoc ( ) ; if ( isPush ) {

BuildMI ( MBB , I , DL , Desc ) . addReg ( RI . getStackRegister ( ) ) . add ( MO ) ;


<s> MachineFunctionPass :: getAnalysisUsage ( AU ) ;


<s> static inline unsigned GetCondBranchFromCond ( <STR_LIT> CC ) { switch ( CC ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> unsigned getLoadRegOpcode ( unsigned DstReg , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI , const <ISA_LIT>Subtarget & STI ) {

return getLoadStoreRegOpcode ( DstReg , RC , TRI , STI , true ) ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> { MO_ABSOLUTE_ADDRESS , <STR_LIT> } , { MO_PC_RELATIVE_ADDRESS , <STR_LIT> } , { MO_GOT , <STR_LIT> } , { MO_GOTOFF , <STR_LIT> } , { MO_GOTPCREL , <STR_LIT> } , { MO_PLT , <STR_LIT> } } ;


<s> bool <ISA_LIT>InstrInfo :: getStackSlotRange ( const TargetRegisterClass * RC , unsigned SubIdx , unsigned & Size , unsigned & Offset , const MachineFunction & MF ) const { Size = <NUM_LIT> ; Offset = <NUM_LIT> ;


<s> unsigned getStoreRegOpcode ( unsigned SrcReg , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI , const <ISA_LIT>Subtarget & STI ) { return getLoadStoreRegOpcode ( SrcReg , RC , TRI , STI , false ) ;


<s> assert ( ! FBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return <NUM_LIT> ; } bool FallThru = FBB == nullptr ; unsigned Count = <NUM_LIT> ; <STR_LIT> CC = ( <STR_LIT> ) Cond [ <NUM_LIT> ] . getImm ( ) ; unsigned Opc = GetCondBranchFromCond ( CC ) ; BuildMI ( & MBB , DL , get ( Opc ) ) . addMBB ( TBB ) ; ++ Count ; if ( ! FallThru ) { BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( FBB ) ;


<s> default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> switch ( SETCC ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( const <ISA_LIT>Subtarget & STI ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) , Subtarget ( STI ) , RI ( STI ) {


<s> while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( I -> getOpcode ( ) != <STR_LIT> && getCondFromBranchOpc ( I -> getOpcode ( ) ) == <STR_LIT> ) break ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ;


<s> unsigned GlobalBaseReg = MxFI -> getGlobalBaseReg ( ) ; if ( GlobalBaseReg == <NUM_LIT> ) return false ; MachineBasicBlock & FirstMBB = MF . front ( ) ; MachineBasicBlock :: iterator MBBI = FirstMBB . begin ( ) ; DebugLoc DL = FirstMBB . findDebugLoc ( MBBI ) ; const <ISA_LIT>InstrInfo * TII = STI . getInstrInfo ( ) ; BuildMI ( FirstMBB , MBBI , DL , TII -> get ( <STR_LIT> ) , GlobalBaseReg ) . addExternalSymbol ( <STR_LIT> , <STR_LIT> ) ; return true ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , unsigned SrcReg , bool isKill , int FrameIndex , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { const MachineFunction & MF = * MBB . getParent ( ) ; assert ( MF . getFrameInfo ( ) . getObjectSize ( FrameIndex ) == <NUM_LIT> && <STR_LIT> ) ; unsigned Opc = getStoreRegOpcode ( SrcReg , RC , TRI , Subtarget ) ; DebugLoc DL = MBB . findDebugLoc ( MI ) ; addFrameReference ( BuildMI ( MBB , MI , DL , get ( Opc ) ) , FrameIndex ) . addReg ( SrcReg , getKillRegState ( isKill ) ) ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , unsigned SrcReg , bool isKill , int FrameIndex , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { const MachineFunction & MF = * MBB . getParent ( ) ; assert ( MF . getFrameInfo ( ) . getObjectSize ( FrameIndex ) == <NUM_LIT> && <STR_LIT> ) ; unsigned Opc = getStoreRegOpcode ( SrcReg , RC , TRI , Subtarget ) ; DebugLoc DL = MBB . findDebugLoc ( MI ) ;

addFrameReference ( BuildMI ( MBB , MI , DL , get ( Opc ) ) , FrameIndex ) . addReg ( SrcReg , getKillRegState ( isKill ) ) ;


<s> return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> static bool doesDispFit ( <ISA_LIT>ISelAddressMode & AM , int64_t Val ) { if ( ! AM . isDispAddrType ( ) ) return false ;

return isInt ( AM . getDispSize ( ) , Val ) ;


<s> if ( ! AM . isDispAddrType ( ) ) return false ; return isInt ( AM . getDispSize ( ) - <NUM_LIT> , AM . Disp ) ;


<s> dbgs ( ) << <STR_LIT> << this ; dbgs ( ) << <STR_LIT> << Disp ; dbgs ( ) << <STR_LIT> ; if ( BaseReg . getNode ( ) ) BaseReg . getNode ( ) -> dump ( ) ; else dbgs ( ) << <STR_LIT> ; dbgs ( ) << <STR_LIT> << BaseFrameIndex ; dbgs ( ) << <STR_LIT> ; if ( IndexReg . getNode ( ) ) { IndexReg . getNode ( ) -> dump ( ) ; } else {


<s> int64_t Val = AM . Disp + Offset ; if ( doesDispFit ( AM , Val ) ) { AM . Disp = Val ; return true ; } return false ;


<s> return <NUM_LIT> ; case ARII : case PCI : return <NUM_LIT> ; case ARID : case PCD : return <NUM_LIT> ; case AL : return <NUM_LIT> ;


<s> Disp = getI32Imm ( AM . Disp , DL ) ; Base = CurDAG -> getTargetFrameIndex ( AM . BaseFrameIndex , TLI -> getPointerTy ( CurDAG -> getDataLayout ( ) ) ) ;


<s> Base = CurDAG -> getTargetFrameIndex ( AM . BaseFrameIndex , TLI -> getPointerTy ( CurDAG -> getDataLayout ( ) ) ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getGlobalBaseReg ( ) { unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ; auto & DL = MF -> getDataLayout ( ) ;

return CurDAG -> getRegister ( GlobalBaseReg , TLI -> getPointerTy ( DL ) ) . getNode ( ) ;


<s> auto & DL = MF -> getDataLayout ( ) ;


<s> return CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ;


<s> return Subtarget -> getInstrInfo ( ) ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> Sym = CurDAG -> getTargetGlobalAddress ( AM . GV , SDLoc ( ) , <STR_LIT> , AM . Disp , AM . SymbolFlags ) ; return true ; } else if ( AM . CP ) { Sym = CurDAG -> getTargetConstantPool ( AM . CP , <STR_LIT> , AM . Align , AM . Disp , AM . SymbolFlags ) ; return true ; } else if ( AM . ES ) { assert ( ! AM . Disp && <STR_LIT> ) ; Sym = CurDAG -> getTargetExternalSymbol ( AM . ES , <STR_LIT> , AM . SymbolFlags ) ; return true ; } else if ( AM . MCSym ) { assert ( ! AM . Disp && <STR_LIT> ) ;

assert ( AM . SymbolFlags == <NUM_LIT> && <STR_LIT> ) ;


<s> const <ISA_LIT>TargetMachine & getTargetMachine ( ) {

return static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> return static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> bool hasBase ( ) const { return BaseType == FrameIndexBase || BaseReg . getNode ( ) != nullptr ;


<s> bool hasDisp ( ) const { return getDispSize ( ) != <NUM_LIT> ;


<s> bool hasIndexReg ( ) const { return BaseType == RegBase && IndexReg . getNode ( ) != nullptr ;


<s> bool hasSymbolicDisplacement ( ) const { return GV != nullptr || CP != nullptr || ES != nullptr || MCSym != nullptr || JT != - <NUM_LIT> || BlockAddr != nullptr ;


<s> if ( Op == <STR_LIT> || Op == <STR_LIT> || Op == <STR_LIT> ) { return true ; } if ( Op == <STR_LIT> || Op == <STR_LIT> ) { for ( unsigned i = <NUM_LIT> ; i < N . getNumOperands ( ) ; ++ i ) {

if ( isAddressBase ( N . getOperand ( i ) ) ) {


<s> } if ( Op == <STR_LIT> || Op == <STR_LIT> ) {

for ( unsigned i = <NUM_LIT> ; i < N . getNumOperands ( ) ; ++ i ) {


<s> bool isDisp16 ( ) const { return getDispSize ( ) == <NUM_LIT> ;


<s> bool isDisp32 ( ) const { return getDispSize ( ) == <NUM_LIT> ;


<s> bool isDisp8 ( ) const { return getDispSize ( ) == <NUM_LIT> ;


<s> return AM == ARII || AM == PCI || AM == ARID || AM == PCD || AM == AL ;


<s> bool isPCRelative ( ) const { if ( BaseType != RegBase ) return false ; if ( RegisterSDNode * RegNode = dyn_cast_or_null < RegisterSDNode > ( BaseReg . getNode ( ) ) ) return RegNode -> getReg ( ) == <STR_LIT> ; return false ;


<s> if ( RegisterSDNode * RegNode = dyn_cast_or_null < RegisterSDNode > ( BaseReg . getNode ( ) ) ) return RegNode -> getReg ( ) == <STR_LIT> ; return false ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) , Subtarget ( nullptr ) {


<s> <ISA_LIT>ISelAddressMode ( AddrType AT ) : AM ( AT ) , BaseType ( RegBase ) , Disp ( <NUM_LIT> ) , BaseFrameIndex ( <NUM_LIT> ) , IndexReg ( ) , Scale ( <NUM_LIT> ) , GV ( nullptr ) , CP ( nullptr ) , BlockAddr ( nullptr ) , ES ( nullptr ) , MCSym ( nullptr ) , JT ( - <NUM_LIT> ) , Align ( <NUM_LIT> ) , SymbolFlags ( <STR_LIT> ) {


<s> } AM = Backup ; if ( matchAddressRecursively ( Handle . getValue ( ) . getOperand ( <NUM_LIT> ) , AM , Depth + <NUM_LIT> ) && matchAddressRecursively ( Handle . getValue ( ) . getOperand ( <NUM_LIT> ) , AM , Depth + <NUM_LIT> ) ) { return true ; } AM = Backup ; if ( ! AM . hasBase ( ) && ! AM . hasIndexReg ( ) ) { N = Handle . getValue ( ) ; AM . BaseReg = N . getOperand ( <NUM_LIT> ) ;

AM . IndexReg = N . getOperand ( <NUM_LIT> ) ;


<s> return true ; } AM = Backup ; if ( matchAddressRecursively ( Handle . getValue ( ) . getOperand ( <NUM_LIT> ) , AM , Depth + <NUM_LIT> ) && matchAddressRecursively ( Handle . getValue ( ) . getOperand ( <NUM_LIT> ) , AM , Depth + <NUM_LIT> ) ) { return true ; } AM = Backup ; if ( ! AM . hasBase ( ) && ! AM . hasIndexReg ( ) ) { N = Handle . getValue ( ) ; AM . BaseReg = N . getOperand ( <NUM_LIT> ) ; AM . IndexReg = N . getOperand ( <NUM_LIT> ) ; AM . Scale = <NUM_LIT> ;


<s> if ( AM . hasBase ( ) ) { if ( ! AM . hasIndexReg ( ) ) { AM . IndexReg = N ; AM . Scale = <NUM_LIT> ; return true ; } return false ; } AM . BaseType = <ISA_LIT>ISelAddressMode :: RegBase ;


<s> if ( AM . hasBase ( ) ) { if ( ! AM . hasIndexReg ( ) ) {


<s> case <STR_LIT> : case <STR_LIT> : if ( matchWrapper ( N , AM ) ) return true ; break ; case <STR_LIT> : if ( matchLoadInAddress ( cast < LoadSDNode > ( N ) , AM ) ) return true ; break ; case <STR_LIT> : if ( CurDAG -> haveNoCommonBitsSet ( N . getOperand ( <NUM_LIT> ) , N . getOperand ( <NUM_LIT> ) ) && matchADD ( N , AM , Depth ) ) return true ; break ; case <STR_LIT> : if ( matchADD ( N , AM , Depth ) ) return true ; break ; case <STR_LIT> :

if ( AM . isDispAddrType ( ) && AM . BaseType == <ISA_LIT>ISelAddressMode :: RegBase && AM . BaseReg . getNode ( ) == nullptr && doesDispFitFI ( AM ) ) {


<s> bool <ISA_LIT>DAGToDAGISel :: matchLoadInAddress ( LoadSDNode * N , <ISA_LIT>ISelAddressMode & AM ) { return false ;


<s> AM . SymbolFlags = BA -> getTargetFlags ( ) ; if ( ! foldOffsetIntoAddress ( BA -> getOffset ( ) , AM ) ) { AM = Backup ; return false ; } } else llvm_unreachable ( <STR_LIT> ) ; AM . setBaseReg ( CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ) ; return true ; } if ( ! AM . isDisp32 ( ) ) { return false ; } if ( N . getOpcode ( ) == <STR_LIT> ) { if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( N0 ) ) { AM . GV = G -> getGlobal ( ) ; AM . Disp += G -> getOffset ( ) ; AM . SymbolFlags = G -> getTargetFlags ( ) ; } else if ( ConstantPoolSDNode * CP = dyn_cast < ConstantPoolSDNode > ( N0 ) ) { AM . CP = CP -> getConstVal ( ) ; AM . Align = CP -> getAlignment ( ) ; AM . Disp += CP -> getOffset ( ) ; AM . SymbolFlags = CP -> getTargetFlags ( ) ; } else if ( ExternalSymbolSDNode * S = dyn_cast < ExternalSymbolSDNode > ( N0 ) ) { AM . ES = S -> getSymbol ( ) ; AM . SymbolFlags = S -> getTargetFlags ( ) ; } else if ( auto * S = dyn_cast < MCSymbolSDNode > ( N0 ) ) { AM . MCSym = S -> getMCSymbol ( ) ;

} else if ( JumpTableSDNode * J = dyn_cast < JumpTableSDNode > ( N0 ) ) {


<s> Subtarget = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ;

return SelectionDAGISel :: runOnMachineFunction ( MF ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; dbgs ( ) << '\n' ) ; if ( Node -> isMachineOpcode ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; dbgs ( ) << '\n' ) ; Node -> setNodeId ( - <NUM_LIT> ) ; return ; } switch ( Opcode ) { default : break ; case <STR_LIT> : ReplaceNode ( Node , getGlobalBaseReg ( ) ) ; return ;


<s> return false ; } if ( AM . isPCRelative ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( AM . hasBase ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( AM . hasIndexReg ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( getSymbolicDisplacement ( AM , SDLoc ( N ) , Sym ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return true ; } if ( AM . Disp ) { Sym = getI32Imm ( AM . Disp , SDLoc ( N ) ) ;


<s> } if ( ! AM . hasBaseReg ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( getSymbolicDisplacement ( AM , SDLoc ( N ) , Disp ) ) { assert ( ! AM . Disp && <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return true ; } if ( AM . Disp == <NUM_LIT> ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } Base = AM . BaseReg ; Disp = getI16Imm ( AM . Disp , SDLoc ( N ) ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectARIPD ( SDNode * Parent , SDValue N , SDValue & Base ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectARIPI ( SDNode * Parent , SDValue N , SDValue & Base ) {


<s> bool <ISA_LIT>DAGToDAGISel :: SelectPCD ( SDNode * Parent , SDValue N , SDValue & Disp ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; <ISA_LIT>ISelAddressMode AM ( <ISA_LIT>ISelAddressMode :: PCD ) ; if ( ! matchAddress ( N , AM ) ) return false ; if ( ! AM . isPCRelative ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; <ISA_LIT>ISelAddressMode AM ( <ISA_LIT>ISelAddressMode :: PCD ) ; if ( ! matchAddress ( N , AM ) ) return false ; if ( ! AM . isPCRelative ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( AM . hasIndexReg ( ) ) {


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } if ( ! AM . hasIndexReg ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } Index = AM . IndexReg ; if ( getSymbolicDisplacement ( AM , SDLoc ( N ) , Disp ) ) { assert ( ! AM . Disp && <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return true ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; <ISA_LIT>ISelAddressMode AM ( <ISA_LIT>ISelAddressMode :: PCI ) ; if ( ! matchAddress ( N , AM ) ) return false ; if ( ! AM . isPCRelative ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; }


<s> if ( Ins . empty ( ) ) return NotStructReturn ; const <STR_LIT> & Flags = Ins [ <NUM_LIT> ] . Flags ; if ( ! Flags . isSRet ( ) ) return NotStructReturn ; if ( Flags . isInReg ( ) ) return RegStructReturn ;


<s> if ( ! Flags . isSRet ( ) ) return NotStructReturn ; if ( Flags . isInReg ( ) ) return RegStructReturn ;


<s> if ( Outs . empty ( ) ) return NotStructReturn ; const <STR_LIT> & Flags = Outs [ <NUM_LIT> ] . Flags ; if ( ! Flags . isSRet ( ) ) return NotStructReturn ;

if ( Flags . isInReg ( ) ) return RegStructReturn ;


<s> static bool canGuaranteeTCO ( CallingConv :: ID CC ) { return false ;


<s> const MachineInstr & mi = * miI ; if ( mi . readsRegister ( <STR_LIT> ) ) return false ; if ( mi . definesRegister ( <STR_LIT> ) ) break ; } if ( miI == BB -> end ( ) ) { for ( MachineBasicBlock :: succ_iterator sItr = BB -> succ_begin ( ) , sEnd = BB -> succ_end ( ) ; sItr != sEnd ; ++ sItr ) { MachineBasicBlock * succ = * sItr ; if ( succ -> isLiveIn ( <STR_LIT> ) ) return false ; } }

SelectItr -> addRegisterKilled ( <STR_LIT> , TRI ) ;


<s> static SDValue checkBoolTestSetCCCombine ( SDValue Cmp , <STR_LIT> & CC ) { return SDValue ( ) ;


<s> SDVTList VTs = DAG . getVTList ( VT , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , SDLoc ( N ) , VTs , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , Flags ) ;


<s> SDValue Carry = CCR . getOperand ( <NUM_LIT> ) ; while ( Carry . getOpcode ( ) == <STR_LIT> || Carry . getOpcode ( ) == <STR_LIT> || Carry . getOpcode ( ) == <STR_LIT> || Carry . getOpcode ( ) == <STR_LIT> || ( Carry . getOpcode ( ) == <STR_LIT> && isOneConstant ( Carry . getOperand ( <NUM_LIT> ) ) ) ) Carry = Carry . getOperand ( <NUM_LIT> ) ; if ( Carry . getOpcode ( ) == <STR_LIT> || Carry . getOpcode ( ) == <STR_LIT> ) {

if ( Carry . getConstantOperandVal ( <NUM_LIT> ) == <STR_LIT> ) return Carry . getOperand ( <NUM_LIT> ) ;


<s> SDLoc DL ( N ) ; <STR_LIT> CC = <STR_LIT> ( N -> getConstantOperandVal ( <NUM_LIT> ) ) ; SDValue CCR = N -> getOperand ( <NUM_LIT> ) ; if ( SDValue Flags = combineSetCCCCR ( CCR , CC , DAG , Subtarget ) ) { SDValue Cond = DAG . getConstant ( CC , DL , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , N -> getVTList ( ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , Cond , Flags ) ; } return SDValue ( ) ;


<s> SDValue CCR = N -> getOperand ( <NUM_LIT> ) ; if ( SDValue Flags = combineSetCCCCR ( CCR , CC , DAG , Subtarget ) ) {

SDValue Cond = DAG . getConstant ( CC , DL , <STR_LIT> ) ;


<s> static SDValue combineSetCCCCR ( SDValue CCR , <STR_LIT> & CC , SelectionDAG & DAG , const <ISA_LIT>Subtarget & Subtarget ) { if ( CC == <STR_LIT> ) if ( SDValue Flags = combineCarryThroughADD ( CCR ) ) return Flags ;

if ( SDValue R = checkBoolTestSetCCCombine ( CCR , CC ) ) return R ;


<s> if ( CC == <STR_LIT> ) if ( SDValue Flags = combineCarryThroughADD ( CCR ) ) return Flags ;


<s> SDVTList VTs = DAG . getVTList ( VT , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , SDLoc ( N ) , VTs , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , Flags ) ; }


<s> SDValue SizeNode = DAG . getConstant ( Flags . getByValSize ( ) , DL , <STR_LIT> ) ;

return DAG . getMemcpy ( Chain , DL , Dst , Src , SizeNode , Flags . getByValAlign ( ) , false , true , false , MachinePointerInfo ( ) , MachinePointerInfo ( ) ) ;


<s> SDValue SizeNode = DAG . getConstant ( Flags . getByValSize ( ) , DL , <STR_LIT> ) ; return DAG . getMemcpy ( Chain , DL , Dst , Src , SizeNode , Flags . getByValAlign ( ) , false , true , false , MachinePointerInfo ( ) , MachinePointerInfo ( ) ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> case <STR_LIT> : return EmitLoweredSelect ( MI , BB ) ; case <STR_LIT> :

return EmitLoweredSegAlloca ( MI , BB ) ;


<s> MachineBasicBlock * <ISA_LIT>TargetLowering :: EmitLoweredSegAlloca ( MachineInstr & MI , MachineBasicBlock * BB ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> BB -> addSuccessor ( jcc1MBB ) ; jcc1MBB -> addSuccessor ( copy0MBB ) ; jcc1MBB -> addSuccessor ( sinkMBB ) ; } else { BB -> addSuccessor ( copy0MBB ) ; } BB -> addSuccessor ( sinkMBB ) ; unsigned Opc = <STR_LIT> ( CC ) ; BuildMI ( BB , DL , TII -> get ( Opc ) ) . addMBB ( sinkMBB ) ; if ( CascadedCMOV ) { unsigned Opc2 = <STR_LIT> ( ( <STR_LIT> ) CascadedCMOV -> getOperand ( <NUM_LIT> ) . getImm ( ) ) ; BuildMI ( jcc1MBB , DL , TII -> get ( Opc2 ) ) . addMBB ( sinkMBB ) ; } copy0MBB -> addSuccessor ( sinkMBB ) ; MachineBasicBlock :: iterator MIItBegin = MachineBasicBlock :: iterator ( MI ) ; MachineBasicBlock :: iterator MIItEnd = std :: next ( MachineBasicBlock :: iterator ( LastCMOV ) ) ; MachineBasicBlock :: iterator SinkInsertionPoint = sinkMBB -> begin ( ) ; DenseMap < unsigned , std :: pair < unsigned , unsigned >> RegRewriteTable ; MachineInstrBuilder MIB ; for ( MachineBasicBlock :: iterator MIIt = MIItBegin ; MIIt != MIItEnd ; ++ MIIt ) { unsigned DestReg = MIIt -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Op1Reg = MIIt -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Op2Reg = MIIt -> getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( MIIt -> getOperand ( <NUM_LIT> ) . getImm ( ) == OppCC ) std :: swap ( Op1Reg , Op2Reg ) ; if ( RegRewriteTable . find ( Op1Reg ) != RegRewriteTable . end ( ) ) Op1Reg = RegRewriteTable [ Op1Reg ] . first ; if ( RegRewriteTable . find ( Op2Reg ) != RegRewriteTable . end ( ) ) Op2Reg = RegRewriteTable [ Op2Reg ] . second ; MIB = BuildMI ( * sinkMBB , SinkInsertionPoint , DL , TII -> get ( <STR_LIT> ) , DestReg ) . addReg ( Op1Reg ) . addMBB ( copy0MBB ) . addReg ( Op2Reg ) . addMBB ( thisMBB ) ; RegRewriteTable [ DestReg ] = std :: make_pair ( Op1Reg , Op2Reg ) ; } if ( CascadedCMOV ) { MIB . addReg ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addMBB ( jcc1MBB ) ; BuildMI ( * sinkMBB , std :: next ( MachineBasicBlock :: iterator ( MIB . getInstr ( ) ) ) , DL , TII -> get ( TargetOpcode :: COPY ) , CascadedCMOV -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; CascadedCMOV -> eraseFromParent ( ) ; }

for ( MachineBasicBlock :: iterator MIIt = MIItBegin ; MIIt != MIItEnd ; ) ( MIIt ++ ) -> eraseFromParent ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: EmitTailCallLoadRetAddr ( SelectionDAG & DAG , SDValue & OutRetAddr , SDValue Chain , bool IsTailCall , int FPDiff , const SDLoc & DL ) const { EVT VT = getPointerTy ( DAG . getDataLayout ( ) ) ; OutRetAddr = getReturnAddressFrameIndex ( DAG ) ; OutRetAddr = DAG . getLoad ( VT , DL , Chain , OutRetAddr , MachinePointerInfo ( ) ) ; return SDValue ( OutRetAddr . getNode ( ) , <NUM_LIT> ) ;


<s> SDValue NewFI = DAG . getFrameIndex ( NewFO , PtrVT ) ; Chain = DAG . getStore ( Chain , DL , RetFI , NewFI , MachinePointerInfo :: getFixedStack ( DAG . getMachineFunction ( ) , NewFO ) ) ; return Chain ;


<s> int64_t Offset = StackSize ; unsigned SlotSize = Subtarget . getSlotSize ( ) ; if ( ( Offset & AlignMask ) <= ( StackAlignment - SlotSize ) ) { Offset += ( ( StackAlignment - SlotSize ) - ( Offset & AlignMask ) ) ; } else { Offset = ( ( ~ AlignMask ) & Offset ) + StackAlignment + ( StackAlignment - SlotSize ) ; } return Offset ;


<s> int64_t Offset = StackSize ; unsigned SlotSize = Subtarget . getSlotSize ( ) ; if ( ( Offset & AlignMask ) <= ( StackAlignment - SlotSize ) ) {

Offset += ( ( StackAlignment - SlotSize ) - ( Offset & AlignMask ) ) ;


<s> static SDValue getBitTestCondition ( SDValue Src , SDValue BitNo , <STR_LIT> CC , const SDLoc & DL , SelectionDAG & DAG ) { if ( Src . getValueType ( ) == <STR_LIT> || Src . getValueType ( ) == <STR_LIT> ) Src = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Src ) ; if ( Src . getValueType ( ) != BitNo . getValueType ( ) ) BitNo = DAG . getNode ( <STR_LIT> , DL , Src . getValueType ( ) , BitNo ) ;

SDValue BT = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Src , BitNo ) ;


<s> static SDValue getBitTestCondition ( SDValue Src , SDValue BitNo , <STR_LIT> CC , const SDLoc & DL , SelectionDAG & DAG ) {

if ( Src . getValueType ( ) == <STR_LIT> || Src . getValueType ( ) == <STR_LIT> ) Src = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Src ) ;


<s> unsigned <ISA_LIT>TargetLowering :: getJumpTableEncoding ( ) const { return Subtarget . getJumpTableEncoding ( ) ;


<s> unsigned <ISA_LIT>TargetLowering :: getJumpTableEncoding ( ) const {

return Subtarget . getJumpTableEncoding ( ) ;


<s> if ( getJumpTableEncoding ( ) == MachineJumpTableInfo :: EK_Custom32 ) return DAG . getNode ( <STR_LIT> , SDLoc ( ) , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


<s> return MCSymbolRefExpr :: create ( MF -> getJTISymbol ( JTI , Ctx ) , Ctx ) ;


<s> if ( ReturnAddrIndex == <NUM_LIT> ) { unsigned SlotSize = Subtarget . getSlotSize ( ) ; ReturnAddrIndex = MF . getFrameInfo ( ) . CreateFixedObject ( SlotSize , - ( int64_t ) SlotSize , false ) ; FuncInfo -> setRAIndex ( ReturnAddrIndex ) ; }

return DAG . getFrameIndex ( ReturnAddrIndex , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


<s> if ( Ty . isSimple ( ) ) { return Ty . getSimpleVT ( ) ; } return <STR_LIT> ( <NUM_LIT> * DL . getPointerSize ( <NUM_LIT> ) ) ;


<s> MVT <ISA_LIT>TargetLowering :: getScalarShiftAmountTy ( const DataLayout & DL , EVT Ty ) const { if ( Ty . isSimple ( ) ) { return Ty . getSimpleVT ( ) ;


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( const DataLayout & DL , LLVMContext & Context , EVT VT ) const {


<s> unsigned UOpNo = UI . getOperandNo ( ) ; if ( User -> getOpcode ( ) == <STR_LIT> && User -> hasOneUse ( ) ) { UOpNo = User -> use_begin ( ) . getOperandNo ( ) ;


<s> for ( SDNode :: use_iterator UI = Op -> use_begin ( ) , UE = Op -> use_end ( ) ; UI != UE ; ++ UI ) { SDNode * User = * UI ; unsigned UOpNo = UI . getOperandNo ( ) ; if ( User -> getOpcode ( ) == <STR_LIT> && User -> hasOneUse ( ) ) { UOpNo = User -> use_begin ( ) . getOperandNo ( ) ; User = * User -> use_begin ( ) ;


<s> static bool isAndOrOfSetCCs ( SDValue Op , unsigned & Opc ) { Opc = Op . getOpcode ( ) ; if ( Opc != <STR_LIT> && Opc != <STR_LIT> ) return false ; return ( <STR_LIT> ( Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) ) && Op . getOperand ( <NUM_LIT> ) . hasOneUse ( ) && <STR_LIT> ( Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) ) && Op . getOperand ( <NUM_LIT> ) . hasOneUse ( ) ) ;


<s> static bool isAndOrOfSetCCs ( SDValue Op , unsigned & Opc ) { Opc = Op . getOpcode ( ) ; if ( Opc != <STR_LIT> && Opc != <STR_LIT> ) return false ;

return ( <STR_LIT> ( Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) ) && Op . getOperand ( <NUM_LIT> ) . hasOneUse ( ) && <STR_LIT> ( Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) ) && Op . getOperand ( <NUM_LIT> ) . hasOneUse ( ) ) ;


<s> bool <STR_LIT> ( CallingConv :: ID CallingConv , bool IsVarArg , bool GuaranteeTCO ) {


<s> static bool isCMOVPseudo ( MachineInstr & MI ) { switch ( MI . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; default : return false ;


<s> unsigned Opc = Op . getNode ( ) -> getOpcode ( ) ; if ( Opc == <STR_LIT> ) return true ; if ( Op . getResNo ( ) == <NUM_LIT> && ( Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> ) ) return true ; if ( Op . getResNo ( ) == <NUM_LIT> && Opc == <STR_LIT> ) return true ;


<s> SDValue VOp0 = V . getOperand ( <NUM_LIT> ) ; unsigned InBits = VOp0 . getValueSizeInBits ( ) ;

unsigned Bits = V . getValueSizeInBits ( ) ;


<s> if ( Op . getOpcode ( ) != <STR_LIT> ) return false ; if ( isOneConstant ( Op . getOperand ( <NUM_LIT> ) ) ) return Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> && Op . getOperand ( <NUM_LIT> ) . hasOneUse ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerADDC_ADDE_SUBC_SUBE ( SDValue Op , SelectionDAG & DAG ) const { MVT VT = Op . getNode ( ) -> getSimpleValueType ( <NUM_LIT> ) ; if ( ! DAG . getTargetLoweringInfo ( ) . isTypeLegal ( VT ) ) return SDValue ( ) ; SDVTList VTs = DAG . getVTList ( VT , <STR_LIT> ) ; unsigned Opc ; bool ExtraOp = false ; switch ( Op . getOpcode ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; ExtraOp = true ; break ; case <STR_LIT> : Opc = <STR_LIT> ; break ; case <STR_LIT> : Opc = <STR_LIT> ; ExtraOp = true ; break ; }

if ( ! ExtraOp ) return DAG . getNode ( Opc , SDLoc ( Op ) , VTs , Op . getOperand ( <NUM_LIT> ) , Op . getOperand ( <NUM_LIT> ) ) ;


<s> } LHS = Op1 ; RHS = Op0 . getOperand ( <NUM_LIT> ) ; } } else if ( Op1 . getOpcode ( ) == <STR_LIT> ) { ConstantSDNode * AndRHS = cast < ConstantSDNode > ( Op1 ) ; uint64_t AndRHSVal = AndRHS -> getZExtValue ( ) ; SDValue AndLHS = Op0 ; if ( AndRHSVal == <NUM_LIT> && AndLHS . getOpcode ( ) == <STR_LIT> ) { LHS = AndLHS . getOperand ( <NUM_LIT> ) ; RHS = AndLHS . getOperand ( <NUM_LIT> ) ; } if ( ! isUInt < <NUM_LIT> > ( AndRHSVal ) && isPowerOf2_64 ( AndRHSVal ) ) { LHS = AndLHS ;

RHS = DAG . getConstant ( Log2_64_Ceil ( AndRHSVal ) , DL , LHS . getValueType ( ) ) ;


<s> SDLoc DL ( Op ) ; auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetBlockAddress ( BA , PtrVT , Offset , OpFlags ) ; if ( <STR_LIT> ( OpFlags ) ) { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , Result ) ; } else { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , Result ) ;


<s> SDValue RHS = Cond . getOperand ( <NUM_LIT> ) ; unsigned MxOpcode ; unsigned MxCond ; SDVTList VTs ; switch ( CondOpcode ) { case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; case <STR_LIT> : MxOpcode = <STR_LIT> ; MxCond = <STR_LIT> ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } if ( Inverted ) MxCond = <STR_LIT> ( ( <STR_LIT> ) MxCond ) ; if ( CondOpcode == <STR_LIT> ) VTs = DAG . getVTList ( LHS . getValueType ( ) , LHS . getValueType ( ) , <STR_LIT> ) ; else VTs = DAG . getVTList ( LHS . getValueType ( ) , <STR_LIT> ) ; SDValue MxOp = DAG . getNode ( MxOpcode , DL , VTs , LHS , RHS ) ; if ( CondOpcode == <STR_LIT> ) Cond = MxOp . getValue ( <NUM_LIT> ) ; else Cond = MxOp . getValue ( <NUM_LIT> ) ; CC = DAG . getConstant ( MxCond , DL , <STR_LIT> ) ; addTest = false ; } else { unsigned CondOpc ; if ( Cond . hasOneUse ( ) && isAndOrOfSetCCs ( Cond , CondOpc ) ) { SDValue Cmp = Cond . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; if ( CondOpc == <STR_LIT> ) { if ( Cmp == Cond . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) && is<ISA_LIT>LogicalCmp ( Cmp ) ) { CC = Cond . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; Chain = DAG . getNode ( <STR_LIT> , DL , Op . getValueType ( ) , Chain , Dest , CC , Cmp ) ; CC = Cond . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; Cond = Cmp ; addTest = false ; } } else { if ( Cmp == Cond . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) && is<ISA_LIT>LogicalCmp ( Cmp ) && Op . getNode ( ) -> hasOneUse ( ) ) { <STR_LIT> CCode = ( <STR_LIT> ) Cond . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) ; CCode = <STR_LIT> ( CCode ) ; CC = DAG . getConstant ( CCode , DL , <STR_LIT> ) ; SDNode * User = * Op . getNode ( ) -> use_begin ( ) ; if ( User -> getOpcode ( ) == <STR_LIT> ) { SDValue FalseBB = User -> getOperand ( <NUM_LIT> ) ; SDNode * NewBR = DAG . UpdateNodeOperands ( User , User -> getOperand ( <NUM_LIT> ) , Dest ) ; assert ( NewBR == User ) ; ( void ) NewBR ; Dest = FalseBB ;


<s> CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; EVT CopyVT = VA . getLocVT ( ) ; Chain = DAG . getCopyFromReg ( Chain , DL , VA . getLocReg ( ) , CopyVT , InFlag ) . getValue ( <NUM_LIT> ) ; SDValue Val = Chain . getValue ( <NUM_LIT> ) ; if ( VA . isExtInLoc ( ) && VA . getValVT ( ) . getScalarType ( ) == <STR_LIT> ) Val = DAG . getNode ( <STR_LIT> , DL , VA . getValVT ( ) , Val ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Val ) ; }


<s> EVT CopyVT = VA . getLocVT ( ) ; Chain = DAG . getCopyFromReg ( Chain , DL , VA . getLocReg ( ) , CopyVT , InFlag ) . getValue ( <NUM_LIT> ) ; SDValue Val = Chain . getValue ( <NUM_LIT> ) ; if ( VA . isExtInLoc ( ) && VA . getValVT ( ) . getScalarType ( ) == <STR_LIT> ) Val = DAG . getNode ( <STR_LIT> , DL , VA . getValVT ( ) , Val ) ;

InFlag = Chain . getValue ( <NUM_LIT> ) ;


<s> ConstantPoolSDNode * CP = cast < ConstantPoolSDNode > ( Op ) ; unsigned char OpFlag = Subtarget . classifyLocalReference ( nullptr ) ; unsigned WrapperKind = <STR_LIT> ; if ( <STR_LIT> ( OpFlag ) ) { WrapperKind = <STR_LIT> ; } auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetConstantPool ( CP -> getConstVal ( ) , PtrVT , CP -> getAlignment ( ) , CP -> getOffset ( ) , OpFlag ) ; SDLoc DL ( CP ) ;

Result = DAG . getNode ( WrapperKind , DL , PtrVT , Result ) ;


<s> const MCExpr * <ISA_LIT>TargetLowering :: LowerCustomJumpTableEntry ( const MachineJumpTableInfo * MJTI , const MachineBasicBlock * MBB , unsigned uid , MCContext & Ctx ) const {

return MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , MCSymbolRefExpr :: VK_GOTOFF , Ctx ) ;


<s> return MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , MCSymbolRefExpr :: VK_GOTOFF , Ctx ) ;


<s> SDValue Size = Op . getOperand ( <NUM_LIT> ) ; unsigned Align = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; Chain = DAG . getCALLSEQ_START ( Chain , <NUM_LIT> , <NUM_LIT> , DL ) ; SDValue Result ; if ( SplitStack ) { auto & MRI = MF . getRegInfo ( ) ; auto SPTy = getPointerTy ( DAG . getDataLayout ( ) ) ; auto * ARClass = getRegClassFor ( SPTy ) ; unsigned Vreg = MRI . createVirtualRegister ( ARClass ) ; Chain = DAG . getCopyToReg ( Chain , DL , Vreg , Size ) ; Result = DAG . getNode ( <STR_LIT> , DL , SPTy , Chain , DAG . getRegister ( Vreg , SPTy ) ) ; } else { auto & TLI = DAG . getTargetLoweringInfo ( ) ; unsigned SPReg = TLI . getStackPointerRegisterToSaveRestore ( ) ; assert ( SPReg && <STR_LIT> <STR_LIT> ) ; SDValue SP = DAG . getCopyFromReg ( Chain , DL , SPReg , VT ) ; Chain = SP . getValue ( <NUM_LIT> ) ; const TargetFrameLowering & TFI = * Subtarget . getFrameLowering ( ) ; unsigned StackAlign = TFI . getStackAlignment ( ) ; Result = DAG . getNode ( <STR_LIT> , DL , VT , SP , Size ) ; if ( Align > StackAlign ) Result = DAG . getNode ( <STR_LIT> , DL , VT , Result , DAG . getConstant ( - ( uint64_t ) Align , DL , VT ) ) ; Chain = DAG . getCopyToReg ( Chain , DL , SPReg , Result ) ; } Chain = DAG . getCALLSEQ_END ( Chain , DAG . getIntPtrConstant ( <NUM_LIT> , DL , true ) , DAG . getIntPtrConstant ( <NUM_LIT> , DL , true ) , SDValue ( ) , DL ) ; SDValue Ops [ <NUM_LIT> ] = { Result , Chain } ;

return DAG . getMergeValues ( Ops , DL ) ;


<s> unsigned WrapperKind = <STR_LIT> ; if ( <STR_LIT> ( OpFlag ) ) { WrapperKind = <STR_LIT> ; } auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetExternalSymbol ( Sym , PtrVT , OpFlag ) ; SDLoc DL ( Op ) ; Result = DAG . getNode ( WrapperKind , DL , PtrVT , Result ) ; if ( <STR_LIT> ( OpFlag ) ) { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , DAG . getNode ( <STR_LIT> , SDLoc ( ) , PtrVT ) , Result ) ; } if ( <STR_LIT> ( OpFlag ) ) {

Result = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Result , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ;


<s> } auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetExternalSymbol ( Sym , PtrVT , OpFlag ) ; SDLoc DL ( Op ) ; Result = DAG . getNode ( WrapperKind , DL , PtrVT , Result ) ; if ( <STR_LIT> ( OpFlag ) ) { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , DAG . getNode ( <STR_LIT> , SDLoc ( ) , PtrVT ) , Result ) ; } if ( <STR_LIT> ( OpFlag ) ) { Result = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Result , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ; } return Result ;


<s> if ( Ins [ i ] . Flags . isSRet ( ) ) { unsigned Reg = MMFI -> getSRetReturnReg ( ) ; if ( ! Reg ) { MVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) ; Reg = MF . getRegInfo ( ) . createVirtualRegister ( getRegClassFor ( PtrTy ) ) ; MMFI -> setSRetReturnReg ( Reg ) ; } SDValue Copy = DAG . getCopyToReg ( DAG . getEntryNode ( ) , DL , Reg , InVals [ i ] ) ; Chain = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Copy , Chain ) ; break ; } } unsigned StackSize = CCInfo . getNextStackOffset ( ) ; if ( shouldGuaranteeTCO ( CCID , MF . getTarget ( ) . Options . GuaranteedTailCallOpt ) ) StackSize = GetAlignedArgumentStackSize ( StackSize , DAG ) ; if ( MFI . hasVAStart ( ) ) { MMFI -> setVarArgsFrameIndex ( MFI . CreateFixedObject ( <NUM_LIT> , StackSize , true ) ) ; } if ( isVarArg && MFI . hasMustTailInVarArgFunc ( ) ) { SmallVector < MVT , <NUM_LIT> > RegParmTypes ; MVT IntVT = <STR_LIT> ; RegParmTypes . push_back ( IntVT ) ; SmallVectorImpl < ForwardedRegister > & Forwards = MMFI -> getForwardedMustTailRegParms ( ) ; CCInfo . analyzeMustTailForwardedRegisters ( Forwards , RegParmTypes , CC_<ISA_LIT> ) ; for ( ForwardedRegister & F : Forwards ) { SDValue RegVal = DAG . getCopyFromReg ( Chain , DL , F . VReg , F . VT ) ; F . VReg = MF . getRegInfo ( ) . createVirtualRegister ( getRegClassFor ( F . VT ) ) ; Chain = DAG . getCopyToReg ( Chain , DL , F . VReg , RegVal ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const {

const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ;


<s> int64_t Offset = cast < GlobalAddressSDNode > ( Op ) -> getOffset ( ) ; return LowerGlobalAddress ( GV , SDLoc ( Op ) , Offset , DAG ) ;


<s> } auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , OpFlag ) ; SDLoc DL ( JT ) ; Result = DAG . getNode ( WrapperKind , DL , PtrVT , Result ) ; if ( <STR_LIT> ( OpFlag ) ) { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , DAG . getNode ( <STR_LIT> , SDLoc ( ) , PtrVT ) , Result ) ;


<s> auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PtrVT , OpFlag ) ; SDLoc DL ( JT ) ; Result = DAG . getNode ( WrapperKind , DL , PtrVT , Result ) ; if ( <STR_LIT> ( OpFlag ) ) { Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , DAG . getNode ( <STR_LIT> , SDLoc ( ) , PtrVT ) , Result ) ; }


<s> bool isImmutable = ! AlwaysUseMutable && ! Flags . isByVal ( ) ; if ( Flags . isByVal ( ) ) { unsigned Bytes = Flags . getByValSize ( ) ; if ( Bytes == <NUM_LIT> ) Bytes = <NUM_LIT> ; int FI = MFI . CreateFixedObject ( Bytes , Offset , isImmutable ) ; return DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ; } else { int FI = MFI . CreateFixedObject ( ValVT . getSizeInBits ( ) / <NUM_LIT> , Offset , isImmutable ) ; if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) { MFI . setObjectZExt ( FI , true ) ; } else if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) {


<s> if ( Flags . isByVal ( ) ) return CreateCopyOfByValArgument ( Arg , PtrOff , Chain , Flags , DAG , DL ) ;

return DAG . getStore ( Chain , DL , Arg , PtrOff , MachinePointerInfo :: getStack ( DAG . getMachineFunction ( ) , LocMemOffset ) ) ;


<s> PtrOff = DAG . getNode ( <STR_LIT> , DL , getPointerTy ( DAG . getDataLayout ( ) ) , StackPtr , PtrOff ) ; if ( Flags . isByVal ( ) ) return CreateCopyOfByValArgument ( Arg , PtrOff , Chain , Flags , DAG , DL ) ;


<s> if ( C && isPowerOf2_64 ( C -> getZExtValue ( ) ) ) { uint64_t MulAmt = C -> getZExtValue ( ) ; if ( isPowerOf2_64 ( MulAmt ) ) return DAG . getNode ( <STR_LIT> , DL , VT , N -> getOperand ( <NUM_LIT> ) , DAG . getConstant ( Log2_64 ( MulAmt ) , DL , <STR_LIT> ) ) ; if ( isPowerOf2_64 ( MulAmt - <NUM_LIT> ) ) { return DAG . getNode ( <STR_LIT> , DL , VT , N -> getOperand ( <NUM_LIT> ) , DAG . getNode ( <STR_LIT> , DL , VT , N -> getOperand ( <NUM_LIT> ) , DAG . getConstant ( Log2_64 ( MulAmt - <NUM_LIT> ) , DL , <STR_LIT> ) ) ) ; } if ( isPowerOf2_64 ( MulAmt + <NUM_LIT> ) ) { return DAG . getNode ( <STR_LIT> , DL , VT , DAG . getNode ( <STR_LIT> , DL , VT , N -> getOperand ( <NUM_LIT> ) , DAG . getConstant ( Log2_64 ( MulAmt + <NUM_LIT> ) , DL , <STR_LIT> ) ) , N -> getOperand ( <NUM_LIT> ) ) ; } } if ( ! Subtarget . isM68020 ( ) ) {

SDValue LHS = N -> getOperand ( <NUM_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : return LowerXALUO ( Op , DAG ) ; case <STR_LIT> : return LowerSETCC ( Op , DAG ) ; case <STR_LIT> : return LowerSETCCCARRY ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT ( Op , DAG ) ; case <STR_LIT> : return LowerBRCOND ( Op , DAG ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return LowerADDC_ADDE_SUBC_SUBE ( Op , DAG ) ;


<s> RetOps . push_back ( DAG . getTargetConstant ( MFI -> getBytesToPopOnReturn ( ) , DL , <STR_LIT> ) ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; SDValue ValToCopy = OutVals [ i ] ; EVT ValVT = ValToCopy . getValueType ( ) ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) ValToCopy = DAG . getNode ( <STR_LIT> , DL , VA . getLocVT ( ) , ValToCopy ) ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) ValToCopy = DAG . getNode ( <STR_LIT> , DL , VA . getLocVT ( ) , ValToCopy ) ; else if ( VA . getLocInfo ( ) == CCValAssign :: AExt ) { if ( ValVT . isVector ( ) && ValVT . getVectorElementType ( ) == <STR_LIT> ) ValToCopy = DAG . getNode ( <STR_LIT> , DL , VA . getLocVT ( ) , ValToCopy ) ; else ValToCopy = DAG . getNode ( <STR_LIT> , DL , VA . getLocVT ( ) , ValToCopy ) ; } else if ( VA . getLocInfo ( ) == CCValAssign :: BCvt ) ValToCopy = DAG . getBitcast ( VA . getLocVT ( ) , ValToCopy ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , ValToCopy , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( unsigned SRetReg = MFI -> getSRetReturnReg ( ) ) { SDValue Val = DAG . getCopyFromReg ( RetOps [ <NUM_LIT> ] , DL , SRetReg , getPointerTy ( MF . getDataLayout ( ) ) ) ; unsigned RetValReg = <STR_LIT> ; Chain = DAG . getCopyToReg ( Chain , DL , RetValReg , Val , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( RetValReg , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) RetOps . push_back ( Flag ) ;

return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , RetOps ) ;


<s> MVT VT = Op . getSimpleValueType ( ) ; assert ( VT == <STR_LIT> && <STR_LIT> ) ; SDValue Op0 = Op . getOperand ( <NUM_LIT> ) ; SDValue Op1 = Op . getOperand ( <NUM_LIT> ) ; SDLoc DL ( Op ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; if ( Op0 . hasOneUse ( ) && isNullConstant ( Op1 ) && ( CC == <STR_LIT> || CC == <STR_LIT> ) ) { if ( SDValue NewSetCC = LowerToBT ( Op0 , CC , DL , DAG ) ) { if ( VT == <STR_LIT> ) return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , NewSetCC ) ; return NewSetCC ; } } if ( ( isOneConstant ( Op1 ) || isNullConstant ( Op1 ) ) && ( CC == <STR_LIT> || CC == <STR_LIT> ) ) { if ( Op0 . getOpcode ( ) == <STR_LIT> ) { <STR_LIT> CCode = ( <STR_LIT> ) Op0 . getConstantOperandVal ( <NUM_LIT> ) ; bool Invert = ( CC == <STR_LIT> ) ^ isNullConstant ( Op1 ) ; if ( ! Invert ) return Op0 ; CCode = <STR_LIT> ( CCode ) ; SDValue SetCC = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getConstant ( CCode , DL , <STR_LIT> ) , Op0 . getOperand ( <NUM_LIT> ) ) ; if ( VT == <STR_LIT> ) return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , SetCC ) ; return SetCC ; } } if ( Op0 . getValueType ( ) == <STR_LIT> && ( CC == <STR_LIT> || CC == <STR_LIT> ) ) { if ( isOneConstant ( Op1 ) ) { <STR_LIT> NewCC = <STR_LIT> ( CC , true ) ; return DAG . getSetCC ( DL , VT , Op0 , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , NewCC ) ; } if ( ! isNullConstant ( Op1 ) ) { SDValue Xor = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Op0 , Op1 ) ; return DAG . getSetCC ( DL , VT , Xor , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , CC ) ; } } bool isFP = Op1 . getSimpleValueType ( ) . isFloatingPoint ( ) ;

unsigned <ISA_LIT>CC = Translate<ISA_LIT>CC ( CC , DL , isFP , Op0 , Op1 , DAG ) ;


<s> assert ( LHS . getSimpleValueType ( ) . isInteger ( ) && <STR_LIT> ) ; <STR_LIT> CC = TranslateInteger<ISA_LIT>CC ( cast < CondCodeSDNode > ( Cond ) -> get ( ) ) ; EVT CarryVT = Carry . getValueType ( ) ; APInt NegOne = APInt :: getAllOnesValue ( CarryVT . getScalarSizeInBits ( ) ) ;

Carry = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( CarryVT , <STR_LIT> ) , Carry , DAG . getConstant ( NegOne , DL , CarryVT ) ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerToBT ( SDValue Op , <STR_LIT> CC , const SDLoc & DL , SelectionDAG & DAG ) const {

if ( Op . getOpcode ( ) == <STR_LIT> ) return LowerAndToBT ( Op , CC , DL , DAG ) ;


<s> assert ( Op . getOpcode ( ) == <STR_LIT> && Op . getValueType ( ) == <STR_LIT> && <STR_LIT> ) ;

if ( Op . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ;


<s> static SDValue LowerTruncateToBT ( SDValue Op , <STR_LIT> CC , const SDLoc & DL , SelectionDAG & DAG ) { assert ( Op . getOpcode ( ) == <STR_LIT> && Op . getValueType ( ) == <STR_LIT> && <STR_LIT> ) ;


<s> <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;


<s> case <STR_LIT> : BaseOp = <STR_LIT> ; Cond = <STR_LIT> ; break ; } SDVTList VTs = DAG . getVTList ( N -> getValueType ( <NUM_LIT> ) , <STR_LIT> ) ; SDValue Sum = DAG . getNode ( BaseOp , DL , VTs , LHS , RHS ) ; SDValue SetCC = DAG . getNode ( <STR_LIT> , DL , N -> getValueType ( <NUM_LIT> ) , DAG . getConstant ( Cond , DL , <STR_LIT> ) , SDValue ( Sum . getNode ( ) , <NUM_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , DL , N -> getVTList ( ) , Sum , SetCC ) ;


<s> continue ; } if ( Op == <STR_LIT> ) { const SDValue & TruncInput = Arg . getOperand ( <NUM_LIT> ) ; if ( TruncInput . getOpcode ( ) == <STR_LIT> && cast < VTSDNode > ( TruncInput . getOperand ( <NUM_LIT> ) ) -> getVT ( ) == Arg . getValueType ( ) ) { Arg = TruncInput . getOperand ( <NUM_LIT> ) ; continue ; } } break ; } int FI = INT_MAX ; if ( Arg . getOpcode ( ) == <STR_LIT> ) { unsigned VR = cast < RegisterSDNode > ( Arg . getOperand ( <NUM_LIT> ) ) -> getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( VR ) ) return false ; MachineInstr * Def = MRI -> getVRegDef ( VR ) ; if ( ! Def ) return false ; if ( ! Flags . isByVal ( ) ) { if ( ! TII -> isLoadFromStackSlot ( * Def , FI ) ) return false ; } else { unsigned Opcode = Def -> getOpcode ( ) ; if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && Def -> getOperand ( <NUM_LIT> ) . isFI ( ) ) { FI = Def -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; Bytes = Flags . getByValSize ( ) ; } else return false ; } } else if ( LoadSDNode * Ld = dyn_cast < LoadSDNode > ( Arg ) ) { if ( Flags . isByVal ( ) ) return false ; SDValue Ptr = Ld -> getBasePtr ( ) ; FrameIndexSDNode * FINode = dyn_cast < FrameIndexSDNode > ( Ptr ) ; if ( ! FINode ) return false ; FI = FINode -> getIndex ( ) ; } else if ( Arg . getOpcode ( ) == <STR_LIT> && Flags . isByVal ( ) ) { FrameIndexSDNode * FINode = cast < FrameIndexSDNode > ( Arg ) ; FI = FINode -> getIndex ( ) ; Bytes = Flags . getByValSize ( ) ; } else return false ; assert ( FI != INT_MAX ) ; if ( ! MFI . isFixedObjectIndex ( FI ) ) return false ; if ( Offset != MFI . getObjectOffset ( FI ) ) return false ; if ( VA . getLocVT ( ) . getSizeInBits ( ) > Arg . getValueType ( ) . getSizeInBits ( ) ) { if ( Flags . isZExt ( ) != MFI . isObjectZExt ( FI ) || Flags . isSExt ( ) != MFI . isObjectSExt ( FI ) ) { return false ; }


<s> static bool mayTailCallThisCC ( CallingConv :: ID CC ) { switch ( CC ) { case CallingConv :: C : return true ;


<s> case <STR_LIT> : return combineSUBX ( N , DAG ) ; case <STR_LIT> : return combineADDX ( N , DAG , DCI ) ; case <STR_LIT> : return combine<ISA_LIT>SetCC ( N , DAG , Subtarget ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> void <ISA_LIT>MachineFunctionInfo :: anchor ( ) {


<s> unsigned getArgumentStackSize ( ) const {


<s> unsigned getBytesToPopOnReturn ( ) const { return BytesToPopOnReturn ;


<s> unsigned getCalleeSavedFrameSize ( ) const { return CalleeSavedFrameSize ;


<s> unsigned getGlobalBaseReg ( ) const {


<s> unsigned getGlobalBaseReg ( ) const { return GlobalBaseReg ;


<s> bool getHasPushSequences ( ) const { return HasPushSequences ;


<s> bool getRestoreBasePointer ( ) const { return RestoreBasePointerOffset != <NUM_LIT> ;


<s> int getRestoreBasePointerOffset ( ) const { return RestoreBasePointerOffset ;


<s> int getRestoreBasePointerOffset ( ) const {


<s> unsigned getSRetReturnReg ( ) const { return SRetReturnReg ;


<s> int getTCReturnAddrDelta ( ) const {


<s> int getVarArgsFrameIndex ( ) const { return VarArgsFrameIndex ;


<s> explicit <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) {


<s> void setArgumentStackSize ( unsigned size ) {


<s> void setBytesToPopOnReturn ( unsigned bytes ) { BytesToPopOnReturn = bytes ;


<s> void setCalleeSavedFrameSize ( unsigned bytes ) { CalleeSavedFrameSize = bytes ;


<s> void setGlobalBaseReg ( unsigned Reg ) { GlobalBaseReg = Reg ;


<s> void setGlobalBaseReg ( unsigned Reg ) {


<s> void setHasPushSequences ( bool HasPush ) { HasPushSequences = HasPush ;


<s> void <ISA_LIT>ELFMCAsmInfo :: anchor ( ) {


<s> IsLittleEndian = false ; TextAlignFillValue = <NUM_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: DwarfCFI ;


<s> TextAlignFillValue = <NUM_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: DwarfCFI ; UseIntegratedAssembler = true ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) {

return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx ) ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx ) ;


<s> assert ( Size + Offset <= <NUM_LIT> && <STR_LIT> ) ; assert ( uintDoesFit ( Size , Val ) ) ; Size += Pad ; Buffer |= Val << Offset ;


<s> Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Addendum , Ctx ) , Ctx ) ; } Fixups . push_back ( MCFixup :: create ( FixOffset , Expr , getFixupForSize ( Size , isPCRel ) , MI . getLoc ( ) ) ) ; return EmitConstant ( <NUM_LIT> , Size , Pad , Buffer , Offset ) ; } } else { MCO = MI . getOperand ( MIO . MINo ) ; if ( MCO . isExpr ( ) ) { assert ( ! NoExpr && <STR_LIT> ) ; const MCExpr * Expr = MCO . getExpr ( ) ; if ( Addendum != <NUM_LIT> ) { Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Addendum , Ctx ) , Ctx ) ; } Fixups . push_back ( MCFixup :: create ( FixOffset , Expr , getFixupForSize ( Size , isPCRel ) , MI . getLoc ( ) ) ) ; return EmitConstant ( <NUM_LIT> , Size , Pad , Buffer , Offset ) ; } } int64_t I = MCO . getImm ( ) ; if ( Type == <STR_LIT> && Alt ) { assert ( I && <STR_LIT> ) ; I %= <NUM_LIT> ; } else { assert ( intDoesFit ( Size , I ) ) ; } uint64_t Imm = I ; if ( Size == <NUM_LIT> ) { Offset += EmitConstant ( ( Imm >> <NUM_LIT> ) & <NUM_LIT> , <NUM_LIT> , Pad , Buffer , Offset ) ; EmitConstant ( Imm & <NUM_LIT> , <NUM_LIT> , Pad , Buffer , Offset ) ;


<s> } uint64_t Buffer = <NUM_LIT> ; unsigned Offset = <NUM_LIT> ; unsigned ThisByte = <NUM_LIT> ; while ( * Beads ) { uint8_t Bead = * Beads ; Beads ++ ; if ( ! ( Bead & <NUM_LIT> ) ) { switch ( Bead >> <NUM_LIT> ) { case <STR_LIT> : continue ; } } switch ( Bead & <NUM_LIT> ) { default : llvm_unreachable ( <STR_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeBits ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeReg ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeImm ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; } while ( Offset / <NUM_LIT> ) { OS . write ( ( char ) ( ( Buffer >> <NUM_LIT> ) & <NUM_LIT> ) ) ; OS . write ( ( char ) ( ( Buffer >> <NUM_LIT> ) & <NUM_LIT> ) ) ; Buffer >>= <NUM_LIT> ; Offset -= <NUM_LIT> ;


<s> llvm_unreachable ( <STR_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeBits ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeReg ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Offset += EncodeImm ( ThisByte , Bead , MI , Desc , Buffer , Offset , Fixups , STI ) ; break ; } while ( Offset / <NUM_LIT> ) { OS . write ( ( char ) ( ( Buffer >> <NUM_LIT> ) & <NUM_LIT> ) ) ; OS . write ( ( char ) ( ( Buffer >> <NUM_LIT> ) & <NUM_LIT> ) ) ; Buffer >>= <NUM_LIT> ; Offset -= <NUM_LIT> ; ThisByte += <NUM_LIT> ; } } assert ( Offset == <NUM_LIT> && <STR_LIT> ) ;

assert ( ( ThisByte && ! ( ThisByte % <NUM_LIT> ) ) && <STR_LIT> ) ;


<s> bool Alt = ( Bead & <NUM_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << <STR_LIT> << Op << <STR_LIT> << DA << <STR_LIT> << Reg << <STR_LIT> << Alt << <STR_LIT> ) ; assert ( Op < Desc . NumMIOperands ) ; MIOperandInfo MIO = Desc . MIOpInfo [ Op ] ; bool isPCRel = <STR_LIT> ( MIO . Type ) ; MCOperand MCO ; if ( MIO . isTargetType ( ) && MIO . OpsNum > <NUM_LIT> ) { if ( isPCRel ) { assert ( Alt && <STR_LIT> ) ; MCO = MI . getOperand ( MIO . MINo + <STR_LIT> ) ; } else { MCO = MI . getOperand ( MIO . MINo + ( Alt ? <STR_LIT> : <STR_LIT> ) ) ; } } else { assert ( ! Alt && <STR_LIT> ) ; MCO = MI . getOperand ( MIO . MINo ) ; }


<s> if ( MIO . isTargetType ( ) && MIO . OpsNum > <NUM_LIT> ) { if ( isPCRel ) { assert ( Alt && <STR_LIT> ) ; MCO = MI . getOperand ( MIO . MINo + <STR_LIT> ) ; } else { MCO = MI . getOperand ( MIO . MINo + ( Alt ? <STR_LIT> : <STR_LIT> ) ) ; } } else { assert ( ! Alt && <STR_LIT> ) ; MCO = MI . getOperand ( MIO . MINo ) ; } unsigned RegNum = MCO . getReg ( ) ; auto RI = Ctx . getRegisterInfo ( ) ; unsigned Written = <NUM_LIT> ; if ( Reg ) { uint32_t Val = RI -> getEncodingValue ( RegNum ) ; Buffer |= Val << Offset ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , MCContext & ctx ) : MCII ( mcii ) , Ctx ( ctx ) {


<s> constexpr static inline bool uintDoesFit ( unsigned N , uint64_t x ) {

return N >= <NUM_LIT> || x <= ( UINT64_MAX >> ( <NUM_LIT> - N ) ) ;


<s> ~ <ISA_LIT>MCCodeEmitter ( ) override {


<s> const GlobalValue * GV = MO . getGlobal ( ) ; AsmPrinter . getNameWithPrefix ( Name , GV ) ; } else if ( MO . isSymbol ( ) ) { Mangler :: getNameWithPrefix ( Name , MO . getSymbolName ( ) , DL ) ; } else if ( MO . isMBB ( ) ) { assert ( Suffix . empty ( ) ) ; Sym = MO . getMBB ( ) -> getSymbol ( ) ; } Name += Suffix ; if ( ! Sym ) Sym = Ctx . getOrCreateSymbol ( Name ) ; return Sym ;


<s> if ( MCOp . hasValue ( ) && MCOp . getValue ( ) . isValid ( ) ) OutMI . addOperand ( MCOp . getValue ( ) ) ; } switch ( OutMI . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : { unsigned Opcode ; switch ( OutMI . getOpcode ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> :


<s> case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_ExternalSymbol : return LowerSymbolOperand ( MO , GetSymbolFromOperand ( MO ) ) ; case MachineOperand :: MO_MCSymbol : return LowerSymbolOperand ( MO , MO . getMCSymbol ( ) ) ; case MachineOperand :: MO_JumpTableIndex : return LowerSymbolOperand ( MO , AsmPrinter . GetJTISymbol ( MO . getIndex ( ) ) ) ; case MachineOperand :: MO_ConstantPoolIndex : return LowerSymbolOperand ( MO , AsmPrinter . GetCPISymbol ( MO . getIndex ( ) ) ) ; case MachineOperand :: MO_BlockAddress : return LowerSymbolOperand ( MO , AsmPrinter . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; case MachineOperand :: MO_RegisterMask : return None ;


<s> } if ( ! Expr ) { Expr = MCSymbolRefExpr :: create ( Sym , RefKind , Ctx ) ; } if ( ! MO . isJTI ( ) && ! MO . isMBB ( ) && MO . getOffset ( ) ) { Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( MachineFunction & MF , <ISA_LIT>AsmPrinter & AP ) : Ctx ( MF . getContext ( ) ) , MF ( MF ) , TM ( MF . getTarget ( ) ) , MAI ( * TM . getMCAsmInfo ( ) ) , AsmPrinter ( AP ) {


<s> MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , MRI . getDwarfRegNum ( llvm :: <STR_LIT> , true ) , - stackGrowth ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> int stackGrowth = - <NUM_LIT> ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , MRI . getDwarfRegNum ( llvm :: <STR_LIT> , true ) , - stackGrowth ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ; return X ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , llvm :: <STR_LIT> , <NUM_LIT> , <NUM_LIT> , llvm :: <STR_LIT> ) ;


<s> return llvm :: createMCRelocationInfo ( TheTriple , Ctx ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; else ArchFS = FS ; } return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , ArchFS ) ;


<s> std :: string ArchFS = Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; else ArchFS = FS ; }

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , ArchFS ) ;


<s> Target & T = The<ISA_LIT>Target ; RegisterMCAsmInfoFn X ( T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( T , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( T , create<ISA_LIT>MCSubtargetInfo ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( T , create<ISA_LIT>MCRegisterInfo ) ;


<s> static StringRef Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { std :: string FS = <STR_LIT> ;


<s> void <ISA_LIT>RegisterInfo :: anchor ( ) {


<s> const MachineRegisterInfo * MRI = & MF . getRegInfo ( ) ; if ( ! MRI -> canReserveReg ( FramePtr ) ) return false ; if ( CantUseSP ( MFI ) ) return MRI -> canReserveReg ( BasePtr ) ; return true ;


<s> return MFI . hasVarSizedObjects ( ) || MFI . hasOpaqueSPAdjustment ( ) ;


<s> static bool CantUseSP ( const MachineFrameInfo & MFI ) {

return MFI . hasVarSizedObjects ( ) || MFI . hasOpaqueSPAdjustment ( ) ;


<s> void <ISA_LIT>RegisterInfo :: eliminateFrameIndex ( MachineBasicBlock :: iterator II , int SPAdj , unsigned FIOperandNum , RegScavenger * RS ) const { MachineInstr & MI = * II ; MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const <ISA_LIT>FrameLowering * TFI = getFrameLowering ( MF ) ; MachineOperand & Disp = MI . getOperand ( FIOperandNum - <NUM_LIT> ) ; MachineOperand & Base = MI . getOperand ( FIOperandNum ) ; int Imm = ( int ) ( Disp . getImm ( ) ) ; int FIndex = ( int ) ( Base . getIndex ( ) ) ; bool AfterFPPop = false ; unsigned BasePtr ; if ( hasBasePointer ( MF ) ) BasePtr = ( FIndex < <NUM_LIT> ? FramePtr : getBaseRegister ( ) ) ; else if ( needsStackRealignment ( MF ) ) BasePtr = ( FIndex < <NUM_LIT> ? FramePtr : StackPtr ) ; else if ( AfterFPPop ) BasePtr = StackPtr ; else BasePtr = ( TFI -> hasFP ( MF ) ? FramePtr : StackPtr ) ; Base . ChangeToRegister ( BasePtr , false ) ; int FIOffset ; unsigned IgnoredFrameReg ; if ( AfterFPPop ) {

const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


<s> unsigned getBaseRegister ( ) const {


<s> return TFI -> hasFP ( MF ) ? FramePtr : StackPtr ;