<s> void <ISA_LIT>AsmBackend :: applyFixup ( const MCAssembler & Asm , const MCFixup & Fixup , const MCValue & Target , MutableArrayRef < char > Data , uint64_t Value , bool IsResolved , const MCSubtargetInfo * STI ) const { return ;


<s> const Triple & TT = STI . getTargetTriple ( ) ;

uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ;


<s> const Triple & TT = STI . getTargetTriple ( ) ; uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; return new <ISA_LIT>AsmBackend ( STI , OSABI , TT . isArch64Bit ( ) ) ;


<s> unsigned getNumFixupKinds ( ) const override {


<s> unsigned getNumFixupKinds ( ) const override { return <NUM_LIT> ;


<s> <ISA_LIT>AsmBackend ( const MCSubtargetInfo & STI , uint8_t OSABI , bool Is64Bit ) : MCAsmBackend ( <STR_LIT> ) , OSABI ( OSABI ) , Is64Bit ( Is64Bit ) {


<s> void relaxInstruction ( MCInst & Inst , const MCSubtargetInfo & STI ) const override {


<s> bool <ISA_LIT>AsmBackend :: shouldForceRelocation ( const MCAssembler & Asm , const MCFixup & Fixup , const MCValue & Target ) {


<s> bool <ISA_LIT>AsmBackend :: writeNopData ( raw_ostream & OS , uint64_t Count , const MCSubtargetInfo * STI ) const { if ( Count % <NUM_LIT> != <NUM_LIT> ) return false ; for ( ; Count >= <NUM_LIT> ; Count -= <NUM_LIT> ) <STR_LIT> :: write < uint32_t > ( OS , <NUM_LIT> , <STR_LIT> ) ; return true ;


<s> bool <ISA_LIT>AsmBackend :: writeNopData ( raw_ostream & OS , uint64_t Count , const MCSubtargetInfo * STI ) const {

if ( Count % <NUM_LIT> != <NUM_LIT> ) return false ;


<s> ~ <ISA_LIT>AsmBackend ( ) override {


<s> unsigned Opc = Inst . getOpcode ( ) ; const signed Msb = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ? Inst . getOperand ( <NUM_LIT> ) . getImm ( ) : Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; const signed Lsb = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ? Inst . getOperand ( <NUM_LIT> ) . getImm ( ) : Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; if ( Msb < Lsb ) return Match_RequiresMsbNotLessThanLsb ; return Match_Success ; } }


<s> assert ( Reg >= <STR_LIT> && Reg <= <STR_LIT> && <STR_LIT> ) ;


<s> return Error ( ErrorLoc , <STR_LIT> ) ; } } if ( Result > FIRST_TARGET_MATCH_RESULT_TY ) { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> && ErrorInfo >= Operands . size ( ) ) return Error ( ErrorLoc , <STR_LIT> ) ; } switch ( Result ) { default : break ; case Match_RequiresMsbNotLessThanLsb : { SMLoc ErrorStart = Operands [ <NUM_LIT> ] -> getStartLoc ( ) ; return Error ( ErrorStart , <STR_LIT> , SMRange ( ErrorStart , Operands [ <NUM_LIT> ] -> getEndLoc ( ) ) ) ; } case Match_RequiresOpnd2NotR0R1 : return Error ( Operands [ <NUM_LIT> ] -> getStartLoc ( ) , <STR_LIT> ) ; case Match_InvalidUImm2 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm2plus1 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) ) ; case Match_InvalidUImm3 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm5 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm6 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm12 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm15 :


<s> assert ( ! ( RegNo >= <STR_LIT> && RegNo <= <STR_LIT> ) ) ; static_assert ( <STR_LIT> < <STR_LIT> , <STR_LIT> ) ; if ( RegNo == <STR_LIT> ) RegNo = MatchRegisterAltName ( Name ) ; return RegNo == <STR_LIT> ;


<s> if ( ! Op . isReg ( ) ) return Match_InvalidOperand ; MCRegister Reg = Op . getReg ( ) ; if ( <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) && Kind == MCK_FPR64 ) { Op . setReg ( convertFPR32ToFPR64 ( Reg ) ) ; return Match_Success ; } return Match_InvalidOperand ;


<s> void addImmOperands ( MCInst & Inst , unsigned N ) const {

assert ( N == <NUM_LIT> && <STR_LIT> ) ;


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ;


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( getReg ( ) ) ) ;


<s> void addRegOperands ( MCInst & Inst , unsigned N ) const { assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( getReg ( ) ) ) ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: Immediate ) ; Op -> Imm . Val = Val ; Op -> StartLoc = S ;


<s> Op -> Imm . Val = Val ; Op -> StartLoc = S ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: Register ) ; Op -> Reg . RegNum = RegNo ; Op -> StartLoc = S ; Op -> EndLoc = E ; return Op ;


<s> auto Op = std :: make_unique < <ISA_LIT>Operand > ( KindTy :: Register ) ; Op -> Reg . RegNum = RegNo ; Op -> StartLoc = S ; Op -> EndLoc = E ;


<s> Op -> StartLoc = S ; Op -> EndLoc = S ; return Op ;


<s> bool <ISA_LIT>AsmParser :: generateImmOutOfRangeError ( OperandVector & Operands , uint64_t ErrorInfo , int64_t Lower , int64_t Upper , Twine Msg = <STR_LIT> ) { SMLoc ErrorLoc = ( ( <ISA_LIT>Operand & ) * Operands [ ErrorInfo ] ) . getStartLoc ( ) ; return Error ( ErrorLoc , Msg + <STR_LIT> + Twine ( Lower ) + <STR_LIT> + Twine ( Upper ) + <STR_LIT> ) ;


<s> bool <ISA_LIT>AsmParser :: generateImmOutOfRangeError ( OperandVector & Operands , uint64_t ErrorInfo , int64_t Lower , int64_t Upper , Twine Msg = <STR_LIT> ) {

SMLoc ErrorLoc = ( ( <ISA_LIT>Operand & ) * Operands [ ErrorInfo ] ) . getStartLoc ( ) ;


<s> SMLoc getEndLoc ( ) const override { return EndLoc ;


<s> const MCExpr * getImm ( ) const { assert ( Kind == KindTy :: Immediate && <STR_LIT> ) ; return Imm . Val ;


<s> assert ( Kind == KindTy :: Register && <STR_LIT> ) ; return Reg . RegNum . id ( ) ;


<s> SMLoc getStartLoc ( ) const override {


<s> assert ( Kind == KindTy :: Token && <STR_LIT> ) ;


<s> return Kind == KindTy :: Immediate ;


<s> bool isMem ( ) const override { return false ;


<s> bool isReg ( ) const override { return Kind == KindTy :: Register ;


<s> if ( ! isImm ( ) ) return false ; int64_t Imm ; bool IsConstantImm = evaluateConstantImm ( getImm ( ) , Imm ) ; return IsConstantImm && isShiftedInt < N , S > ( Imm ) ;


bool IsConstantImm = evaluateConstantImm ( getImm ( ) , Imm ) ;


<s> return isSImm < <NUM_LIT> , <NUM_LIT> > ( ) ;


<s> bool isSImm16 ( ) const { return isSImm < <NUM_LIT> > ( ) ;


<s> bool isSImm26lsl2 ( ) const { return isSImm < <NUM_LIT> , <NUM_LIT> > ( ) ;


<s> bool isToken ( ) const override { return Kind == KindTy :: Token ;


<s> bool isUImm ( ) const { if ( ! isImm ( ) ) return false ;


<s> bool isUImm2 ( ) const { return isUImm < <NUM_LIT> > ( ) ;


<s> return isUImm < <NUM_LIT> , <NUM_LIT> > ( ) ;


<s> bool isUImm5 ( ) const { return isUImm < <NUM_LIT> > ( ) ;


<s> Parser . addAliasForDirective ( <STR_LIT> , <STR_LIT> ) ; Parser . addAliasForDirective ( <STR_LIT> , <STR_LIT> ) ;


setAvailableFeatures ( ComputeAvailableFeatures ( STI . getFeatureBits ( ) ) ) ;


<s> <ISA_LIT>Operand ( KindTy K ) : MCParsedAsmOperand ( ) , Kind ( K ) {


<s> bool FirstFeature = true ; std :: string Msg = <STR_LIT> ; for ( unsigned i = <NUM_LIT> , e = MissingFeatures . size ( ) ; i != e ; ++ i ) { if ( MissingFeatures [ i ] ) { Msg += FirstFeature ? <STR_LIT> : <STR_LIT> ; Msg += getSubtargetFeatureName ( i ) ; FirstFeature = false ; } } return Error ( IDLoc , Msg ) ; } case Match_MnemonicFail : { FeatureBitset FBS = ComputeAvailableFeatures ( getSTI ( ) . getFeatureBits ( ) ) ; std :: string Suggestion = <ISA_LIT>MnemonicSpellCheck ( ( ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ) . getToken ( ) , FBS , <NUM_LIT> ) ; return Error ( IDLoc , <STR_LIT> + Suggestion ) ; } case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) return Error ( ErrorLoc , <STR_LIT> ) ; ErrorLoc = ( ( <ISA_LIT>Operand & ) * Operands [ ErrorInfo ] ) . getStartLoc ( ) ; if ( ErrorLoc == SMLoc ( ) ) ErrorLoc = IDLoc ; } return Error ( ErrorLoc , <STR_LIT> ) ; } } if ( Result > FIRST_TARGET_MATCH_RESULT_TY ) { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> && ErrorInfo >= Operands . size ( ) ) return Error ( ErrorLoc , <STR_LIT> ) ; } switch ( Result ) { default : break ; case Match_InvalidUImm2 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm2plus1 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) ) ; case Match_InvalidUImm3 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm5 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm6 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm12 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidUImm15 : return generateImmOutOfRangeError ( Operands , ErrorInfo , <NUM_LIT> , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidSImm12 : return generateImmOutOfRangeError ( Operands , ErrorInfo , - ( <NUM_LIT> << <NUM_LIT> ) , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidSImm14lsl2 : return generateImmOutOfRangeError ( Operands , ErrorInfo , - ( <NUM_LIT> << <NUM_LIT> ) , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> , <STR_LIT> ) ; case Match_InvalidSImm16 : return generateImmOutOfRangeError ( Operands , ErrorInfo , - ( <NUM_LIT> << <NUM_LIT> ) , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; case Match_InvalidSImm16lsl2 :


<s> static bool matchRegisterNameHelper ( MCRegister & RegNo , StringRef Name ) { RegNo = MatchRegisterName ( Name ) ; if ( RegNo == <STR_LIT> ) RegNo = MatchRegisterAltName ( Name ) ; return RegNo == <STR_LIT> ;


<s> bool ParseDirective ( AsmToken DirectiveID ) override {


<s> SMLoc S = getLoc ( ) ; SMLoc E ; const MCExpr * Res ; if ( getParser ( ) . parseExpression ( Res , E ) ) return MatchOperand_ParseFail ; Operands . push_back ( <STR_LIT> ( Res , S , E ) ) ;


<s> if ( getParser ( ) . parseExpression ( Res , E ) ) return MatchOperand_ParseFail ;

Operands . push_back ( <STR_LIT> ( Res , S , E ) ) ;


<s> if ( parseOperand ( Operands , Name ) ) return true ; while ( parseOptionalToken ( AsmToken :: Comma ) ) if ( parseOperand ( Operands , Name ) ) return true ;

if ( parseOptionalToken ( AsmToken :: EndOfStatement ) ) return false ;


<s> if ( parseRegister ( Operands ) == MatchOperand_Success || parseImmediate ( Operands ) == MatchOperand_Success ) return false ; Error ( getLoc ( ) , <STR_LIT> ) ;


<s> if ( getLexer ( ) . getKind ( ) != AsmToken :: Identifier ) return MatchOperand_NoMatch ; StringRef Name = getLexer ( ) . getTok ( ) . getIdentifier ( ) ; MCRegister RegNo ; matchRegisterNameHelper ( RegNo , Name ) ; if ( RegNo == <STR_LIT> ) return MatchOperand_NoMatch ;


<s> matchRegisterNameHelper ( RegNo , Name ) ; if ( RegNo == <STR_LIT> ) return MatchOperand_NoMatch ; SMLoc S = getLoc ( ) ; SMLoc E = SMLoc :: getFromPointer ( S . getPointer ( ) + Name . size ( ) ) ;


<s> Out . emitInstruction ( Inst , getSTI ( ) ) ; return false ;


<s> OperandMatchResultTy <ISA_LIT>AsmParser :: tryParseRegister ( unsigned & RegNo , SMLoc & StartLoc , SMLoc & EndLoc ) { llvm_unreachable ( <STR_LIT> ) ;


<s> void <ISA_LIT>AsmPrinter :: emitInstruction ( const MachineInstr * MI ) { if ( emitPseudoExpansionLowering ( * OutStreamer , MI ) ) return ; MCInst TmpInst ; if ( ! lower<ISA_LIT>MachineInstrToMCInst ( MI , TmpInst , * this ) ) EmitToStreamer ( * OutStreamer , TmpInst ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>AsmPrinter ( ) {

RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>32Target ( ) ) ;


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>32Target ( ) ) ;

RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( getThe<ISA_LIT>64Target ( ) ) ;


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction & MF ) { AsmPrinter :: runOnMachineFunction ( MF ) ;


<s> MCRegister getBPReg ( ) { return <STR_LIT> ;


<s> ABI getTargetABI ( StringRef ABIName ) { auto TargetABI = StringSwitch < ABI > ( ABIName ) . Case ( <STR_LIT> , ABI_ILP32S ) . Case ( <STR_LIT> , ABI_ILP32F ) . Case ( <STR_LIT> , ABI_ILP32D ) . Case ( <STR_LIT> , ABI_LP64S ) . Case ( <STR_LIT> , ABI_LP64F ) . Case ( <STR_LIT> , ABI_LP64D ) . Default ( ABI_Unknown ) ;


<s> if ( RegNo >= <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> + RegNo ) ) ; return MCDisassembler :: Success ;


<s> static DecodeStatus DecodeCFRRegisterClass ( MCInst & Inst , uint64_t RegNo , uint64_t Address , const MCDisassembler * Decoder ) {

if ( RegNo >= <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> if ( RegNo >= <NUM_LIT> ) return MCDisassembler :: Fail ;

Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> + RegNo ) ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> + RegNo ) ) ; return MCDisassembler :: Success ;


<s> static DecodeStatus DecodeFPR64RegisterClass ( MCInst & Inst , uint64_t RegNo , uint64_t Address , const MCDisassembler * Decoder ) { if ( RegNo >= <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> static MCDisassembler * create<ISA_LIT>Disassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>Disassembler ( STI , Ctx ) ;


<s> static DecodeStatus decodeSImmOperand ( MCInst & Inst , uint64_t Imm , int64_t Address , const MCDisassembler * Decoder ) { assert ( isUInt < N > ( Imm ) && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( SignExtend64 < N > ( Imm ) << S ) ) ;


<s> static DecodeStatus decodeSImmOperand ( MCInst & Inst , uint64_t Imm , int64_t Address , const MCDisassembler * Decoder ) { assert ( isUInt < N > ( Imm ) && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( SignExtend64 < N > ( Imm ) << S ) ) ; return MCDisassembler :: Success ;


<s> static DecodeStatus decodeUImmOperand ( MCInst & Inst , uint64_t Imm , int64_t Address , const MCDisassembler * Decoder ) { assert ( isUInt < N > ( Imm ) && <STR_LIT> ) ;

Inst . addOperand ( MCOperand :: createImm ( Imm + P ) ) ;


<s> TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>32Target ( ) , create<ISA_LIT>Disassembler ) ; TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>64Target ( ) , create<ISA_LIT>Disassembler ) ;


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx ) : MCDisassembler ( STI , Ctx ) {


<s> return std :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI , Is64Bit ) ;


<s> unsigned Kind = Fixup . getTargetKind ( ) ; if ( Kind >= FirstLiteralRelocationKind ) return Kind - FirstLiteralRelocationKind ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI , bool Is64Bit ) : MCELFObjectTargetWriter ( Is64Bit , OSABI , ELF :: EM_LOONGARCH , true ) {


<s> bool needsRelocateWithSymbol ( const MCSymbol & Sym , unsigned Type ) const override { return true ;


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> void <ISA_LIT>FrameLowering :: emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const {


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF , MachineBasicBlock & MBB ) const {


<s> return MFI . hasVarSizedObjects ( ) && TRI -> hasStackRealignment ( MF ) ;


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { const TargetRegisterInfo * RegInfo = MF . getSubtarget ( ) . getRegisterInfo ( ) ; const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || RegInfo -> hasStackRealignment ( MF ) || MFI . hasVarSizedObjects ( ) || MFI . isFrameAddressTaken ( ) ;


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;

return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || RegInfo -> hasStackRealignment ( MF ) || MFI . hasVarSizedObjects ( ) || MFI . isFrameAddressTaken ( ) ;


<s> explicit <ISA_LIT>FrameLowering ( const <ISA_LIT>Subtarget & STI ) : TargetFrameLowering ( StackGrowsDown , Align ( <NUM_LIT> ) , <NUM_LIT> ) , STI ( STI ) {


<s> return getRegisterName ( RegNo , <STR_LIT> ) ;


<s> const char * <ISA_LIT>InstPrinter :: getRegisterName ( unsigned RegNo ) { return getRegisterName ( RegNo , <STR_LIT> ) ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> printRegName ( O , MO . getReg ( ) ) ; return ; } if ( MO . isImm ( ) ) { O << MO . getImm ( ) ; return ; }

assert ( MO . isExpr ( ) && <STR_LIT> ) ;


<s> const MCOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) { printRegName ( O , MO . getReg ( ) ) ; return ; } if ( MO . isImm ( ) ) { O << MO . getImm ( ) ; return ; } assert ( MO . isExpr ( ) && <STR_LIT> ) ; MO . getExpr ( ) -> print ( O , & MAI ) ;


<s> BuildMI ( MBB , MBBI , DL , get ( <STR_LIT> ) , DstReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) . addReg ( <STR_LIT> ) ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( <ISA_LIT>Subtarget & STI ) : <ISA_LIT>GenInstrInfo ( ) {


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) { return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) {


<s> if ( Node -> isMachineOpcode ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; dbgs ( ) << <STR_LIT> ) ;


<s> } unsigned Opcode = Node -> getOpcode ( ) ; SDLoc DL ( Node ) ; switch ( Opcode ) { default : break ;


<s> MVT ArgVT = Outs [ i ] . VT ; if ( Fn ( i , ArgVT , CCValAssign :: Full , CCInfo ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << i << <STR_LIT> << EVT ( ArgVT ) . getEVTString ( ) << <STR_LIT> ) ; llvm_unreachable ( <STR_LIT> ) ;


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const {


<s> static bool CC_<ISA_LIT> ( unsigned ValNo , MVT ValVT , CCValAssign :: LocInfo LocInfo , CCState & State ) {

Register Reg = State . AllocateReg ( ArgGPRs ) ;


<s> static bool CC_<ISA_LIT> ( unsigned ValNo , MVT ValVT , CCValAssign :: LocInfo LocInfo , CCState & State ) { Register Reg = State . AllocateReg ( ArgGPRs ) ;


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( ( <STR_LIT> ) Opcode ) { case <STR_LIT> : break ; case <STR_LIT> : \ return <STR_LIT> # node ;


<s> switch ( ( <STR_LIT> ) Opcode ) { case <STR_LIT> : break ;

case <STR_LIT> : \ return <STR_LIT> # node ;


<s> break ; } SmallVector < CCValAssign > ArgLocs ; CCState CCInfo ( CallConv , IsVarArg , MF , ArgLocs , * DAG . getContext ( ) ) ; analyzeInputArgs ( CCInfo , Ins , CC_<ISA_LIT> ) ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) InVals . push_back ( unpackFromRegLoc ( DAG , Chain , ArgLocs [ i ] , DL , * this ) ) ; return Chain ;


<s> SDValue Glue ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i < e ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Glue ) ; Glue = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Glue . getNode ( ) ) RetOps . push_back ( Glue ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , RetOps ) ;


<s> MachineRegisterInfo & RegInfo = MF . getRegInfo ( ) ; EVT LocVT = VA . getLocVT ( ) ; const TargetRegisterClass * RC = TLI . getRegClassFor ( LocVT . getSimpleVT ( ) ) ; Register VReg = RegInfo . createVirtualRegister ( RC ) ;

RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ;


<s> <ISA_LIT>TargetLowering :: <ISA_LIT>TargetLowering ( const TargetMachine & TM , const <ISA_LIT>Subtarget & STI ) : TargetLowering ( TM ) , Subtarget ( STI ) { MVT GRLenVT = Subtarget . getGRLenVT ( ) ; addRegisterClass ( GRLenVT , & <STR_LIT> ) ;

computeRegisterProperties ( STI . getRegisterInfo ( ) ) ;


<s> <ISA_LIT>MachineFunctionInfo ( const MachineFunction & MF ) {


<s> void setCalleeSavedStackSize ( unsigned Size ) { CalleeSavedStackSize = Size ;


<s> void setVarArgsSaveSize ( int Size ) { VarArgsSaveSize = Size ;


<s> else if ( SignExtend32 < <NUM_LIT> > ( Lo12 >> <NUM_LIT> ) == SignExtend32 < <NUM_LIT> > ( Hi20 ) ) Insts . push_back ( Inst ( <STR_LIT> , SignExtend64 < <NUM_LIT> > ( Lo12 ) ) ) ; else { Insts . push_back ( Inst ( <STR_LIT> , SignExtend64 < <NUM_LIT> > ( Hi20 ) ) ) ; if ( Lo12 != <NUM_LIT> ) Insts . push_back ( Inst ( <STR_LIT> , Lo12 ) ) ; } if ( SignExtend32 < <NUM_LIT> > ( Hi20 >> <NUM_LIT> ) != SignExtend32 < <NUM_LIT> > ( Higher20 ) ) Insts . push_back ( Inst ( <STR_LIT> , SignExtend64 < <NUM_LIT> > ( Higher20 ) ) ) ; if ( SignExtend32 < <NUM_LIT> > ( Higher20 >> <NUM_LIT> ) != SignExtend32 < <NUM_LIT> > ( Highest12 ) ) Insts . push_back ( Inst ( <STR_LIT> , SignExtend64 < <NUM_LIT> > ( Highest12 ) ) ) ;


<s> Inst ( unsigned Opc , int64_t Imm ) : Opc ( Opc ) , Imm ( Imm ) {


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & TT ) { CodePointerSize = CalleeSaveStackSlotSize = TT . isArch64Bit ( ) ? <NUM_LIT> : <NUM_LIT> ; AlignmentIsInBytes = false ; Data8bitsDirective = <STR_LIT> ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <STR_LIT> ; ZeroDirective = <STR_LIT> ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ; DwarfRegNumForCFI = true ;

ExceptionsType = ExceptionHandling :: DwarfCFI ;


<s> return new <ISA_LIT>MCCodeEmitter ( Ctx , MCII ) ;


<s> const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; unsigned Size = Desc . getSize ( ) ; switch ( Size ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : {

uint32_t Bits = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


<s> assert ( ( Res & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; return Res >> <NUM_LIT> ;


<s> unsigned Res = MI . getOperand ( OpNo ) . getImm ( ) ; assert ( ( Res & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getImmOpValueSub1 ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

return MI . getOperand ( OpNo ) . getImm ( ) - <NUM_LIT> ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

if ( MO . isReg ( ) ) return Ctx . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> <ISA_LIT>MCCodeEmitter ( MCContext & ctx , MCInstrInfo const & MCII ) : Ctx ( ctx ) , MCII ( MCII ) {


<s> ~ <ISA_LIT>MCCodeEmitter ( ) override {


<s> bool llvm :: lower<ISA_LIT>MachineInstrToMCInst ( const MachineInstr * MI , MCInst & OutMI , AsmPrinter & AP ) {

OutMI . setOpcode ( MI -> getOpcode ( ) ) ;


<s> case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress :

case MachineOperand :: MO_ExternalSymbol :


<s> MCCFIInstruction Inst = MCCFIInstruction :: cfiDefCfa ( nullptr , SP , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>InstrAnalysis ( const MCInstrInfo * Info ) {

return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>InstrAnalysis ( const MCInstrInfo * Info ) { return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; MCRegister SP = MRI . getDwarfRegNum ( <STR_LIT> , true ) ;

MCCFIInstruction Inst = MCCFIInstruction :: cfiDefCfa ( nullptr , SP , <NUM_LIT> ) ;


<s> MCRegister SP = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MCCFIInstruction Inst = MCCFIInstruction :: cfiDefCfa ( nullptr , SP , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ; return X ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { if ( CPU . empty ( ) ) CPU = TT . isArch64Bit ( ) ? <STR_LIT> : <STR_LIT> ;

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , CPU , FS ) ;


<s> unsigned NumOps = Inst . getNumOperands ( ) ; if ( isBranch ( Inst ) || Inst . getOpcode ( ) == <STR_LIT> ) { Target = Addr + Inst . getOperand ( NumOps - <NUM_LIT> ) . getImm ( ) ;


<s> TargetRegistry :: RegisterMCSubtargetInfo ( * T , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCAsmInfo ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ;


<s> explicit <ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) : MCInstrAnalysis ( Info ) {


<s> switch ( Subtarget . getTargetABI ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : case <STR_LIT> : return CSR_ILP32S_LP64S_RegMask ; case <STR_LIT> : case <STR_LIT> : return CSR_ILP32F_LP64F_RegMask ; case <STR_LIT> : case <STR_LIT> : return CSR_ILP32D_LP64D_RegMask ; }


<s> return TFI -> hasFP ( MF ) ? <STR_LIT> : <STR_LIT> ;


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getNoPreservedMask ( ) const { return CSR_NoRegs_RegMask ;


<s> const TargetRegisterClass * getPointerRegClass ( const MachineFunction & MF , unsigned Kind = <NUM_LIT> ) const override { return & <STR_LIT> ;


<s> bool <ISA_LIT>RegisterInfo :: isConstantPhysReg ( MCRegister PhysReg ) const {


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( unsigned HwMode ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , HwMode ) {


<s> void <ISA_LIT>Subtarget :: anchor ( ) {


<s> unsigned getGRLen ( ) const { return GRLen ;


<s> MVT getGRLenVT ( ) const { return GRLenVT ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override {


<s> <STR_LIT> getTargetABI ( ) const { return TargetABI ;


<s> const <ISA_LIT>TargetLowering * getTargetLowering ( ) const override { return & TLInfo ;


<s> bool hasExtLBT ( ) const { return HasExtLBT ;


<s> ParseSubtargetFeatures ( CPU , TuneCPU , FS ) ; if ( Is64Bit ) { GRLenVT = <STR_LIT> ; GRLen = <NUM_LIT> ; }


<s> bool Is64Bit = TT . isArch64Bit ( ) ; if ( CPU . empty ( ) ) CPU = Is64Bit ? <STR_LIT> : <STR_LIT> ; if ( TuneCPU . empty ( ) ) TuneCPU = CPU ; ParseSubtargetFeatures ( CPU , TuneCPU , FS ) ; if ( Is64Bit ) { GRLenVT = <STR_LIT> ; GRLen = <NUM_LIT> ; }


<s> bool is64Bit ( ) const { return HasLA64 ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , StringRef CPU , StringRef TuneCPU , StringRef FS , StringRef ABIName , const TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , TuneCPU , FS ) , FrameLowering ( initializeSubtargetDependencies ( TT , CPU , TuneCPU , FS , ABIName ) ) , InstrInfo ( * this ) , RegInfo ( getHwMode ( ) ) , TLInfo ( TM , * this ) {


<s> static Target The<ISA_LIT>32Target ; return The<ISA_LIT>32Target ;


<s> Target & llvm :: getThe<ISA_LIT>32Target ( ) { static Target The<ISA_LIT>32Target ; return The<ISA_LIT>32Target ;


<s> RegisterTarget < Triple :: loongarch32 , false > X ( getThe<ISA_LIT>32Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; RegisterTarget < Triple :: loongarch64 , false > Y ( getThe<ISA_LIT>64Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>TargetInfo ( ) { RegisterTarget < Triple :: loongarch32 , false > X ( getThe<ISA_LIT>32Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;

RegisterTarget < Triple :: loongarch64 , false > Y ( getThe<ISA_LIT>64Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> static std :: string computeDataLayout ( const Triple & TT ) { if ( TT . isArch64Bit ( ) ) return <STR_LIT> ; assert ( TT . isArch32Bit ( ) && <STR_LIT> ) ;


<s> static std :: string computeDataLayout ( const Triple & TT ) { if ( TT . isArch64Bit ( ) ) return <STR_LIT> ;

assert ( TT . isArch32Bit ( ) && <STR_LIT> ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) {

addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> static std :: string computeDataLayout ( const Triple & TT ) { std :: string Ret ;


<s> std :: string Ret ; Ret += <STR_LIT> ; return Ret ;


<s> return new <ISA_LIT>PassConfig ( * this , PM ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( const Triple & TT , Optional < Reloc :: Model > RM ) {

if ( ! RM . hasValue ( ) ) return Reloc :: Static ;


<s> return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const { return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override { return TLOF . get ( ) ;


<s> std :: string FS = FSAttr . isValid ( ) ? FSAttr . getValueAsString ( ) . str ( ) : TargetFS ; std :: string Key = CPU + TuneCPU + FS ; auto & I = SubtargetMap [ Key ] ; if ( ! I ) { resetTargetOptions ( F ) ; auto ABIName = Options . MCOptions . getABIName ( ) ; if ( const MDString * ModuleTargetABI = dyn_cast_or_null < MDString > ( F . getParent ( ) -> getModuleFlag ( <STR_LIT> ) ) ) { auto TargetABI = <STR_LIT> ( ABIName ) ; if ( TargetABI != <STR_LIT> && ModuleTargetABI -> getString ( ) != ABIName ) { report_fatal_error ( <STR_LIT> ) ; } ABIName = ModuleTargetABI -> getString ( ) ; }

I = std :: make_unique < <ISA_LIT>Subtarget > ( TargetTriple , CPU , TuneCPU , FS , ABIName , * this ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>Target ( ) {

RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>32Target ( ) ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > Y ( getThe<ISA_LIT>64Target ( ) ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine & TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : LLVMTargetMachine ( T , computeDataLayout ( TT ) , TT , CPU , FS , Options , getEffectiveRelocModel ( TT , RM ) , getEffectiveCodeModel ( CM , CodeModel :: Small ) , OL ) , TLOF ( std :: make_unique < TargetLoweringObjectFileELF > ( ) ) { initAsmInfo ( ) ;