<s> if ( isPost ) { PostPtrReg = MI . getOperand ( <NUM_LIT> + ( isPost && ! isStore ) ) . getReg ( ) ; PostPtrDead = MI . getOperand ( <NUM_LIT> + ( isPost && ! isStore ) ) . isDead ( ) ; } MachineInstr * New = nullptr ; bool isPostOpc ; unsigned opcode = getOpcodeforLDST ( isStore , isPostInc , isPostDec , InPtrReg , PostPtrDead , isPostOpc ) ; unsigned OpValueReg = ( InPtrReg == <STR_LIT> && ! isPostOpc ) ? ValueReg : <STR_LIT> ; if ( isStore && OpValueReg != ValueReg ) BuildMI ( * MI . getParent ( ) , MI , DebugLoc ( ) , TII -> get ( <STR_LIT> ) , OpValueReg ) . addReg ( ValueReg ) ; auto Builder = BuildMI ( * MI . getParent ( ) , MI , DebugLoc ( ) , TII -> get ( opcode ) ) ; if ( isPostOpc && ! isStore ) Builder . addReg ( OpValueReg , RegState :: Define ) . addReg ( PostPtrReg , RegState :: Define | getDeadRegState ( PostPtrDead ) ) ; else { if ( isPostOpc ) Builder . addReg ( PostPtrReg , RegState :: Define | getDeadRegState ( PostPtrDead ) ) ; Builder . addReg ( OpValueReg , getDefRegState ( ! isStore ) ) ; } Builder . addReg ( InPtrReg , getKillRegState ( InPtrKill && ! ( isPost && ! isPostOpc && ! PostPtrDead ) ) ) ; Builder . cloneMemRefs ( MI ) ; New = Builder ; if ( ! isStore && OpValueReg != ValueReg ) { BuildMI ( * MI . getParent ( ) , MI , DebugLoc ( ) , TII -> get ( <STR_LIT> ) , ValueReg ) . addReg ( OpValueReg , getKillRegState ( true ) ) ; } if ( isPost && ! isPostOpc && ! PostPtrDead ) { opcode = isPostInc ? <STR_LIT> : <STR_LIT> ;

Builder = BuildMI ( * MI . getParent ( ) , MI , DebugLoc ( ) , TII -> get ( opcode ) ) . addReg ( PostPtrReg , RegState :: Define ) . addReg ( InPtrReg , getKillRegState ( InPtrKill ) ) ;


<s> if ( New ) { MII -> eraseFromParent ( ) ; MII = New -> getIterator ( ) ; Modified = true ; } ++ MII ; }


<s> <ISA_LIT>Z80PostRA ( ) : MachineFunctionPass ( ID ) {

initialize<ISA_LIT>Z80PostRAPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> if ( isStore ) { if ( PtrReg == <STR_LIT> && ! PostPtrDead && ( isPostInc || isPostDec ) ) { IsPostOpc = true ; return isPostInc ? <STR_LIT> : <STR_LIT> ; }


<s> TII = STI . getInstrInfo ( ) ; MRI = & MF . getRegInfo ( ) ; Modified |= expandPostRAPseudos ( ) ; return Modified ;


<s> FunctionPass * create<ISA_LIT>Z80PreEmitPass ( ) { return new <ISA_LIT>Z80PreEmit ( ) ;


<s> <ISA_LIT>Z80PreEmit ( ) : MachineFunctionPass ( ID ) {

initialize<ISA_LIT>Z80PreEmitPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> const <ISA_LIT>Z80Subtarget & STI = MF . getSubtarget < <ISA_LIT>Z80Subtarget > ( ) ;


<s> unsigned opc ; if ( MemMI . mayLoad ( ) ) opc = IncMI -> getOpcode ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; else opc = IncMI -> getOpcode ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; auto Builder = BuildMI ( * MBBI , MemMI , DebugLoc ( ) , TII -> get ( opc ) ) ; if ( MemMI . mayLoad ( ) ) Builder . addReg ( MemMI . getOperand ( <NUM_LIT> ) . getReg ( ) , RegState :: Define ) . addReg ( IncDef , RegState :: Define ) ; else Builder . addReg ( IncDef , RegState :: Define ) . addReg ( MemMI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; Builder . addReg ( PtrReg ) ; Builder . cloneMemRefs ( MemMI ) ; MemMI . eraseFromParent ( ) ; IncMI -> eraseFromBundle ( ) ; MII = MBBI -> begin ( ) ; Modified = true ;


<s> FunctionPass * create<ISA_LIT>Z80PreRAPass ( ) {


<s> if ( UI . isPHI ( ) && DT -> dominates ( & UI , & MI ) ) continue ; if ( ! DT -> dominates ( & MI , & UI ) ) return false ; }


<s> <ISA_LIT>Z80PreRA ( ) : MachineFunctionPass ( ID ) { initialize<ISA_LIT>Z80PreRAPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override {


MachineFunctionPass :: getAnalysisUsage ( AU ) ;


<s> TRI = STI . getRegisterInfo ( ) ; TII = STI . getInstrInfo ( ) ; MRI = & MF . getRegInfo ( ) ;

DT = & getAnalysis < MachineDominatorTree > ( ) ;


<s> DT = & getAnalysis < MachineDominatorTree > ( ) ; Modified |= combinePostIncMemAccs ( ) ; if ( WidenRegClasses ) Modified |= widenConstrainedRegClasses ( ) ;


<s> bool SafeToReassignDef = MII -> isCopy ( ) || TII -> getRegClass ( MII -> getDesc ( ) , <NUM_LIT> , TRI , * MF ) == NewRC ; unsigned NewReg = MRI -> createVirtualRegister ( NewRC ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; if ( SafeToReassignDef ) dbgs ( ) << <STR_LIT> << TRI -> virtReg2Index ( NewReg ) << <STR_LIT> ; dbgs ( ) << <STR_LIT> ; ) ; if ( SafeToReassignDef ) MII -> getOperand ( <NUM_LIT> ) . setReg ( NewReg ) ; else { do { ++ MII ; } while ( MII -> isPHI ( ) ) ; MII = BuildMI ( MBB , MII , DebugLoc ( ) , TII -> get ( <STR_LIT> ) , NewReg ) . addReg ( DefReg ) ; } for ( auto & MOU : MRI -> use_operands ( DefReg ) ) { MachineInstr * MOI = MOU . getParent ( ) ;


<s> <ISA_LIT>Z80RegisterInfo :: <ISA_LIT>Z80RegisterInfo ( <ISA_LIT>Z80TargetMachine & tm , const TargetInstrInfo & tii ) : <ISA_LIT>Z80GenRegisterInfo ( <STR_LIT> ) , TM ( tm ) , TII ( tii ) {


<s> const uint16_t * <ISA_LIT>Z80RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { static const uint16_t CalleeSavedRegs [ ] = { <STR_LIT> , <STR_LIT> , <NUM_LIT> } ;


<s> const uint32_t * <ISA_LIT>Z80RegisterInfo :: getCallPreservedMask ( CallingConv :: ID CallConv ) const { return CSR_16_RegMask ;


<s> BitVector <ISA_LIT>Z80RegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( getFrameRegister ( MF ) ) ; return Reserved ;


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering * TFI = TM . getSubtargetImpl ( ) -> getFrameLowering ( ) ; int FrameIndex = MI . getOperand ( FIOperandNum ) . getIndex ( ) ; int Offset = MFI . getObjectOffset ( FrameIndex ) ; Offset += MFI . getStackSize ( ) - TFI -> getOffsetOfLocalArea ( ) ; assert ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ; MI . getOperand ( FIOperandNum ) . ChangeToImmediate ( Offset ) ;


<s> const MachineFunction & MF = * MBB . getParent ( ) ; const <ISA_LIT>Z80TargetMachine & TM = ( const <ISA_LIT>Z80TargetMachine & ) MF . getTarget ( ) ; const TargetInstrInfo & TII = * TM . getSubtargetImpl ( ) -> getInstrInfo ( ) ; const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering * TFI = TM . getSubtargetImpl ( ) -> getFrameLowering ( ) ; int FrameIndex = MI . getOperand ( FIOperandNum ) . getIndex ( ) ; int Offset = MFI . getObjectOffset ( FrameIndex ) ; Offset += MFI . getStackSize ( ) - TFI -> getOffsetOfLocalArea ( ) ; assert ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ;

MI . getOperand ( FIOperandNum ) . ChangeToImmediate ( Offset ) ;


<s> <ISA_LIT>Z80RegisterInfo :: <ISA_LIT>Z80RegisterInfo ( ) : <ISA_LIT>Z80GenRegisterInfo ( <NUM_LIT> ) {


<s> const uint16_t * <ISA_LIT>Z80RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { if ( MF -> getFunction ( ) . getFunctionType ( ) -> getNumParams ( ) <= <NUM_LIT> ) return CSR_0_1_SaveList ;


<s> const uint32_t * <ISA_LIT>Z80RegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID CC ) const { if ( MF . getFunction ( ) . getFunctionType ( ) -> getNumParams ( ) <= <NUM_LIT> ) return CSR_0_1_RegMask ;


<s> const TargetRegisterClass * <ISA_LIT>Z80RegisterInfo :: getCrossCopyRegClass ( const TargetRegisterClass * RC ) const { if ( RC == & <STR_LIT> ) return & <STR_LIT> ;

else if ( RC == & <STR_LIT> || RC == & <STR_LIT> ) return & <STR_LIT> ;


<s> if ( RC == & <STR_LIT> ) return & <STR_LIT> ; else if ( RC == & <STR_LIT> || RC == & <STR_LIT> ) return & <STR_LIT> ;


<s> unsigned <ISA_LIT>Z80RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { return <STR_LIT> ;


<s> } if ( RC == & <STR_LIT> || RC == & <STR_LIT> || RC == & <STR_LIT> ) { return & <STR_LIT> ; } return RC ;


<s> const TargetRegisterClass * <ISA_LIT>Z80RegisterInfo :: getPointerRegClass ( const MachineFunction & MF , unsigned Kind ) const { return & <STR_LIT> ;


<s> const TargetRegisterClass * <ISA_LIT>Z80RegisterInfo :: getPointerRegClass ( const MachineFunction & MF , unsigned Kind ) const {


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; return Reserved ;


<s> bool <ISA_LIT>Z80RegisterInfo :: shouldCoalesce ( MachineInstr * MI , const TargetRegisterClass * SrcRC , unsigned SubReg , const TargetRegisterClass * DstRC , unsigned DstSubReg , const TargetRegisterClass * NewRC , LiveIntervals & LIS ) const { return true ;


<s> void <ISA_LIT>Z80RegisterInfo :: splitReg ( unsigned Reg , unsigned & LoReg , unsigned & HiReg ) const { assert ( <STR_LIT> . contains ( Reg ) && <STR_LIT> ) ; LoReg = getSubReg ( Reg , <STR_LIT> ) ; HiReg = getSubReg ( Reg , <STR_LIT> ) ;


<s> void <ISA_LIT>Z80RegisterInfo :: splitReg ( unsigned Reg , unsigned & LoReg , unsigned & HiReg ) const { assert ( <STR_LIT> . contains ( Reg ) && <STR_LIT> ) ; LoReg = getSubReg ( Reg , <STR_LIT> ) ;


<s> bool trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const override { return true ;


<s> <ISA_LIT>Z80SelectionDAGInfo :: <ISA_LIT>Z80SelectionDAGInfo ( const <ISA_LIT>Z80TargetMachine & tm ) : TargetSelectionDAGInfo ( tm . getDataLayout ( ) ) {


<s> <ISA_LIT>Z80SelectionDAGInfo :: ~ <ISA_LIT>Z80SelectionDAGInfo ( ) {


<s> bool enableSubRegLiveness ( ) const override {


<s> <ISA_LIT>Z80Subtarget :: <ISA_LIT>Z80Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , <ISA_LIT>Z80TargetMachine & TM ) : <ISA_LIT>Z80GenSubtargetInfo ( TT , CPU , FS ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM ) , TSInfo ( ) , m_MBC1 ( false ) , m_MBC2 ( false ) , m_MBC3 ( false ) , m_RAM ( false ) , m_Battery ( false ) , m_RTC ( false ) {


<s> const TargetFrameLowering * getFrameLowering ( ) const override { return & FrameLowering ;


<s> const TargetFrameLowering * getFrameLowering ( ) const override {


<s> const <ISA_LIT>Z80RegisterInfo * getRegisterInfo ( ) const override {

return & InstrInfo . getRegisterInfo ( ) ;


<s> const <ISA_LIT>Z80SelectionDAGInfo * getSelectionDAGInfo ( ) const override { return & TSInfo ;


<s> bool hasMBC1 ( ) const { return m_MBC1 ;


<s> bool hasRAM ( ) const { return m_RAM ;


<s> bool hasRTC ( ) const { return m_RTC ;


<s> Target & getThe<ISA_LIT>Z80Target ( ) { static Target The<ISA_LIT>Z80Target ;


<s> return new <ISA_LIT>Z80PassConfig ( this , PM ) ;


<s> <ISA_LIT>Z80PassConfig ( <ISA_LIT>Z80TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>Z80TargetMachine :: <ISA_LIT>Z80TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , DL ( <STR_LIT> ) , FrameLowering ( * this ) , InstrInfo ( * this ) , TSInfo ( * this ) , TLInfo ( * this ) {


<s> return getTM < <ISA_LIT>Z80TargetMachine > ( ) ;


<s> virtual const <ISA_LIT>Z80InstrInfo * getInstrInfo ( ) const {


<s> return & getInstrInfo ( ) -> getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>Z80RegisterInfo * getRegisterInfo ( ) const { return & getInstrInfo ( ) -> getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>Z80SelectionDAGInfo * getSelectionDAGInfo ( ) const {


<s> void LLVMInitialize<ISA_LIT>Z80Target ( ) { RegisterTargetMachine < <ISA_LIT>Z80TargetMachine > X ( The<ISA_LIT>Z80Target ) ;


<s> addPass ( create<ISA_LIT>Z80PostISelPass ( ) ) ; return false ;


<s> addPass ( create<ISA_LIT>Z80PostRAPass ( ) ) ;


<s> addPass ( create<ISA_LIT>Z80PreEmitPass ( ) ) ;


<s> void <ISA_LIT>Z80PassConfig :: addPreSched2 ( ) { addPass ( create<ISA_LIT>Z80PostPEIPass ( ) ) ;


<s> return new <ISA_LIT>Z80PassConfig ( * this , PM ) ;


<s> TargetPassConfig * <ISA_LIT>Z80TargetMachine :: createPassConfig ( PassManagerBase & PM ) {

return new <ISA_LIT>Z80PassConfig ( * this , PM ) ;


<s> <ISA_LIT>Z80PassConfig ( <ISA_LIT>Z80TargetMachine & TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> if ( CPU . empty ( ) || CPU == <STR_LIT> ) { return <STR_LIT> ; }


<s> static CodeModel :: Model getEffectiveCodeModel ( Optional < CodeModel :: Model > CM , bool JIT ) {

return CM . hasValue ( ) ? * CM : CodeModel :: Small ;


<s> static CodeModel :: Model getEffectiveCodeModel ( Optional < CodeModel :: Model > CM , bool JIT ) { return CM . hasValue ( ) ? * CM : CodeModel :: Small ;


<s> static Reloc :: Model getEffectiveRelocModel ( const Triple & TT , Optional < Reloc :: Model > RM ) {

return RM . hasValue ( ) ? * RM : Reloc :: Static ;


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override { return this -> TLOF . get ( ) ;


<s> const <ISA_LIT>Z80Subtarget * <ISA_LIT>Z80TargetMachine :: getSubtargetImpl ( const Function & ) const {


<s> const <ISA_LIT>Z80Subtarget * <ISA_LIT>Z80TargetMachine :: getSubtargetImpl ( const Function & ) const { return & SubTarget ;


<s> initialize<ISA_LIT>Z80PreRAPass ( PR ) ; initialize<ISA_LIT>Z80PostRAPass ( PR ) ; initialize<ISA_LIT>Z80PostPEIPass ( PR ) ;

initialize<ISA_LIT>Z80PreEmitPass ( PR ) ;


<s> initialize<ISA_LIT>Z80PostISelPass ( PR ) ; initialize<ISA_LIT>Z80PreRAPass ( PR ) ; initialize<ISA_LIT>Z80PostRAPass ( PR ) ; initialize<ISA_LIT>Z80PostPEIPass ( PR ) ;


<s> return S -> getVariant ( ) == SV_<ISA_LIT>Z80 ;


<s> static bool classof ( const MCSection * S ) {

return S -> getVariant ( ) == SV_<ISA_LIT>Z80 ;


<s> <ISA_LIT>Z80SectionData ( StringRef N , <ISA_LIT>SectionType T = ST_NONE , uint16_t A = <NUM_LIT> , unsigned B = ~ <NUM_LIT> , unsigned Align = <NUM_LIT> , const GlobalObject * O = nullptr ) : SectionName ( N ) , Type ( T ) , Address ( A ) , Bank ( B ) , Alignment ( Align ) , Object ( O ) { assert ( ( ! N . empty ( ) || Object ) && <STR_LIT> ) ;


<s> Data . Type = ST_NONE ; Data . Address = <NUM_LIT> ; Data . Bank = ~ <NUM_LIT> ;


<s> unsigned getAlignment ( ) const { return Alignment ;


<s> switch ( Type ) { case ST_ROM0 : O << <STR_LIT> ; break ; case ST_ROMX : O << <STR_LIT> ; break ; case ST_VRAM : O << <STR_LIT> ; break ; case ST_SRAM : O << <STR_LIT> ; break ; case ST_WRAM0 : O << <STR_LIT> ; break ; case ST_WRAMX : O << <STR_LIT> ; break ;


<s> MCSection * <ISA_LIT>Z80TargetObjectFile :: getExplicitSectionGlobal ( const GlobalObject * GO , SectionKind Kind , const TargetMachine & TM ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> <ISA_LIT>Z80SectionData Data ( N , T , A , B , Align , GO ) ; if ( Sections . count ( Data ) ) return Sections [ Data ] ;

MCSection<ISA_LIT>Z80 * Section = new MCSection<ISA_LIT>Z80 ( Kind , Data , nullptr ) ;


<s> return getSection ( Kind , StringRef ( ) , ST_ROM0 , <NUM_LIT> , ~ <NUM_LIT> , Align , nullptr ) ;


<s> <ISA_LIT>SectionType getType ( ) const {


<s> <ISA_LIT>SectionType getType ( ) const { return Type ;


<s> bool hasAlignment ( ) const { return Alignment > <NUM_LIT> ;


<s> TextSection = getSection ( SectionKind :: getText ( ) , StringRef ( <STR_LIT> ) , <STR_LIT> , <NUM_LIT> , ~ <NUM_LIT> , <NUM_LIT> , nullptr ) ; DataSection = getSection ( SectionKind :: getText ( ) , StringRef ( <STR_LIT> ) , <STR_LIT> , <NUM_LIT> , ~ <NUM_LIT> , <NUM_LIT> , nullptr ) ; BSSSection = getSection ( SectionKind :: getText ( ) , StringRef ( <STR_LIT> ) , <STR_LIT> , <NUM_LIT> , ~ <NUM_LIT> , <NUM_LIT> , nullptr ) ; ReadOnlySection = getSection ( SectionKind :: getText ( ) , StringRef ( <STR_LIT> ) , <STR_LIT> , <NUM_LIT> , ~ <NUM_LIT> , <NUM_LIT> , nullptr ) ;


<s> void <ISA_LIT>Z80TargetObjectFile :: Initialize ( MCContext & Ctx , const TargetMachine & TM ) { Base :: Initialize ( Ctx , TM ) ;

TextSection = getSection ( SectionKind :: getText ( ) , StringRef ( <STR_LIT> ) , <STR_LIT> , <NUM_LIT> , ~ <NUM_LIT> , <NUM_LIT> , nullptr ) ;


<s> bool MCSection<ISA_LIT>Z80 :: isVirtualSection ( ) const {


<s> MCSection<ISA_LIT>Z80 ( SectionKind K , <ISA_LIT>Z80SectionData D , MCSymbol * Begin ) : MCSection ( SV_<ISA_LIT>Z80 , K , Begin ) , Data ( D ) {


<s> Data . getAsString ( SecStr ) ; OS << SecStr << '\n' ;


<s> if ( Kind . isText ( ) || Kind . isReadOnly ( ) ) { Type = ST_ROM0 ; } else if ( Kind . isBSS ( ) || Kind . isData ( ) ) { Type = ST_WRAM0 ;


<s> void setAlignment ( unsigned Align ) { Alignment = Align ;


<s> void <ISA_LIT>Z80TargetStreamer :: finish ( ) {


<s> <ISA_LIT>Z80TargetAsmStreamer :: <ISA_LIT>Z80TargetAsmStreamer ( MCStreamer & S ) : <ISA_LIT>Z80TargetStreamer ( S ) {


<s> <ISA_LIT>Z80TargetStreamer :: <ISA_LIT>Z80TargetStreamer ( MCStreamer & S ) : MCTargetStreamer ( S ) {