<s> Op -> StartLoc = S ; Op -> EndLoc = S ;


return static_cast < const MCConstantExpr * > ( Val ) -> getValue ( ) ;


<s> return static_cast < const MCConstantExpr * > ( Val ) -> getValue ( ) ;


<s> SMLoc getEndLoc ( ) const override { return EndLoc ;


<s> SMLoc getEndLoc ( ) const override {


<s> assert ( Kind == Immediate && <STR_LIT> ) ; return Imm . Val ;


<s> const MCExpr * getImm ( ) const { assert ( Kind == Immediate && <STR_LIT> ) ; return Imm . Val ;


<s> assert ( Kind == Register && <STR_LIT> ) ; return Reg . RegNum ;


<s> SMLoc getStartLoc ( ) const override { return StartLoc ;


<s> assert ( Kind == Token && <STR_LIT> ) ; return Tok ;


<s> return isImm ( ) && isa < MCConstantExpr > ( getImm ( ) ) ;


<s> bool isImm ( ) const override { return Kind == Immediate ;


<s> bool isMem ( ) const override { return false ;


<s> bool isSImm12 ( ) const { return ( isConstantImm ( ) && isInt < <NUM_LIT> > ( getConstantImm ( ) ) ) ;


return ( isConstantImm ( ) && isInt < <NUM_LIT> > ( getConstantImm ( ) ) ) ;


<s> bool isToken ( ) const override { return Kind == Token ;


<s> static bool isValidIdAtStart ( StringRef Name ) {

return StringSwitch < bool > ( Name . lower ( ) ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Case ( <STR_LIT> , true ) . Default ( false ) ;


<s> void LLVMInitialize<ISA_LIT>AsmParser ( ) { RegisterMCAsmParser < <ISA_LIT>AsmParser > X ( getThe<ISA_LIT>Target ( ) ) ; RegisterMCAsmParser < <ISA_LIT>AsmParser > Y ( getThe<ISA_LIT>leTarget ( ) ) ; RegisterMCAsmParser < <ISA_LIT>AsmParser > Z ( getThe<ISA_LIT>beTarget ( ) ) ;


<s> RegisterMCAsmParser < <ISA_LIT>AsmParser > X ( getThe<ISA_LIT>Target ( ) ) ; RegisterMCAsmParser < <ISA_LIT>AsmParser > Y ( getThe<ISA_LIT>leTarget ( ) ) ; RegisterMCAsmParser < <ISA_LIT>AsmParser > Z ( getThe<ISA_LIT>beTarget ( ) ) ;


<s> bool <ISA_LIT>AsmParser :: MatchAndEmitInstruction ( SMLoc IDLoc , unsigned & Opcode , OperandVector & Operands , MCStreamer & Out , uint64_t & ErrorInfo , bool MatchingInlineAsm ) { MCInst Inst ; SMLoc ErrorLoc ; if ( PreMatchCheck ( Operands ) ) return Error ( IDLoc , <STR_LIT> ) ; switch ( MatchInstructionImpl ( Operands , Inst , ErrorInfo , MatchingInlineAsm ) ) { default : break ; case Match_Success : Inst . setLoc ( IDLoc ) ; Out . EmitInstruction ( Inst , getSTI ( ) ) ; return false ; case Match_MissingFeature : return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail :


<s> case AsmToken :: Plus : case AsmToken :: Integer : case AsmToken :: String : case AsmToken :: Identifier : break ; } const MCExpr * IdVal ; SMLoc S = getLoc ( ) ; if ( getParser ( ) . parseExpression ( IdVal ) ) return MatchOperand_ParseFail ; SMLoc E = SMLoc :: getFromPointer ( S . getPointer ( ) - <NUM_LIT> ) ; Operands . push_back ( <STR_LIT> ( IdVal , S , E ) ) ;


<s> break ; } const MCExpr * IdVal ; SMLoc S = getLoc ( ) ; if ( getParser ( ) . parseExpression ( IdVal ) ) return MatchOperand_ParseFail ; SMLoc E = SMLoc :: getFromPointer ( S . getPointer ( ) - <NUM_LIT> ) ; Operands . push_back ( <STR_LIT> ( IdVal , S , E ) ) ; return MatchOperand_Success ;


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { unsigned RegNo = MatchRegisterName ( Name ) ; if ( RegNo != <NUM_LIT> ) { SMLoc E = SMLoc :: getFromPointer ( NameLoc . getPointer ( ) - <NUM_LIT> ) ; Operands . push_back ( <STR_LIT> ( RegNo , NameLoc , E ) ) ; } else if ( <STR_LIT> ( Name ) ) Operands . push_back ( <STR_LIT> ( Name , NameLoc ) ) ; else return Error ( NameLoc , <STR_LIT> ) ; while ( ! getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) {

if ( parseOperandAsOperator ( Operands ) == MatchOperand_Success ) continue ;


<s> LLVM_FALLTHROUGH ; } case AsmToken :: Equal : case AsmToken :: Greater : case AsmToken :: Less : case AsmToken :: Pipe : case AsmToken :: Star : case AsmToken :: LParen : case AsmToken :: RParen : case AsmToken :: LBrac : case AsmToken :: RBrac : case AsmToken :: Slash : case AsmToken :: Amp : case AsmToken :: Percent : case AsmToken :: Caret : { StringRef Name = getLexer ( ) . getTok ( ) . getString ( ) ; getLexer ( ) . Lex ( ) ; Operands . push_back ( <STR_LIT> ( Name , S ) ) ; return MatchOperand_Success ; } case AsmToken :: EqualEqual : case AsmToken :: ExclaimEqual : case AsmToken :: GreaterEqual :


<s> if ( Operands . size ( ) == <NUM_LIT> ) { <ISA_LIT>Operand & Op0 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; <ISA_LIT>Operand & Op1 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; <ISA_LIT>Operand & Op2 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; <ISA_LIT>Operand & Op3 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; if ( Op0 . isReg ( ) && Op1 . isToken ( ) && Op2 . isToken ( ) && Op3 . isReg ( ) && Op1 . getToken ( ) == <STR_LIT> && ( Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> ) && Op0 . getReg ( ) != Op3 . getReg ( ) ) return true ; } return false ;


<s> <ISA_LIT>Operand & Op2 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; <ISA_LIT>Operand & Op3 = ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ; if ( Op0 . isReg ( ) && Op1 . isToken ( ) && Op2 . isToken ( ) && Op3 . isReg ( ) && Op1 . getToken ( ) == <STR_LIT> && ( Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> || Op2 . getToken ( ) == <STR_LIT> ) && Op0 . getReg ( ) != Op3 . getReg ( ) ) return true ; } return false ;


<s> void print ( raw_ostream & OS ) const override { switch ( Kind ) { case Immediate : OS << * getImm ( ) ;


<s> bool starIsStartOfStatement ( ) override {


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) {


<s> MCInstLowering . Lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ;


<s> MCInstLowering . Lower ( MI , TmpInst ) ;

EmitToStreamer ( * OutStreamer , TmpInst ) ;


<s> const char * getPassName ( ) const override { return <STR_LIT> ;


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>leTarget ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( The<ISA_LIT>beTarget ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Z ( The<ISA_LIT>Target ) ;


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( The<ISA_LIT>beTarget ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Z ( The<ISA_LIT>Target ) ;


<s> case MachineOperand :: MO_Register : O << <ISA_LIT>InstPrinter :: getRegisterName ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : O << MO . getImm ( ) ; break ; case MachineOperand :: MO_MachineBasicBlock : O << * MO . getMBB ( ) -> getSymbol ( ) ; break ;

case MachineOperand :: MO_GlobalAddress :


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmMemoryOperand ( const MachineInstr * MI , unsigned OpNum , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { assert ( OpNum + <NUM_LIT> < MI -> getNumOperands ( ) && <STR_LIT> ) ; const MachineOperand & BaseMO = MI -> getOperand ( OpNum ) ; const MachineOperand & OffsetMO = MI -> getOperand ( OpNum + <NUM_LIT> ) ; assert ( BaseMO . isReg ( ) && <STR_LIT> ) ;

assert ( OffsetMO . isImm ( ) && <STR_LIT> ) ;


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , unsigned , const char * ExtraCode , raw_ostream & O ) { if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) return true ; printOperand ( MI , OpNo , O ) ;


<s> void <ISA_LIT>AsmPrinter :: printOperand ( const MachineInstr * MI , int OpNum , raw_ostream & O ) { const MachineOperand & MO = MI -> getOperand ( OpNum ) ; switch ( MO . getType ( ) ) { case MachineOperand :: MO_Register : O << <ISA_LIT>InstPrinter :: getRegisterName ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : O << MO . getImm ( ) ; break ; case MachineOperand :: MO_MachineBasicBlock : O << * MO . getMBB ( ) -> getSymbol ( ) ; break ; case MachineOperand :: MO_GlobalAddress : O << * getSymbol ( MO . getGlobal ( ) ) ; break ; case MachineOperand :: MO_BlockAddress : { MCSymbol * BA = GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ; O << BA -> getName ( ) ; break ; } case MachineOperand :: MO_ExternalSymbol : O << * GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; break ;

case MachineOperand :: MO_JumpTableIndex :


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) , BTF ( nullptr ) {


<s> bool <ISA_LIT>AsmPrinter :: doInitialization ( Module & M ) { AsmPrinter :: doInitialization ( M ) ; if ( MAI -> doesSupportDebugInformation ( ) && ! M . debug_compile_units ( ) . empty ( ) ) { BTF = new BTFDebug ( this ) ; Handlers . push_back ( HandlerInfo ( std :: unique_ptr < BTFDebug > ( BTF ) , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ) ; } return false ;


<s> if ( MAI -> doesSupportDebugInformation ( ) && ! M . debug_compile_units ( ) . empty ( ) ) { BTF = new BTFDebug ( this ) ; Handlers . push_back ( HandlerInfo ( std :: unique_ptr < BTFDebug > ( BTF ) , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ) ;


<s> if ( ! BTF || ! BTF -> InstLower ( MI , TmpInst ) ) { <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ;

MCInstLowering . Lower ( MI , TmpInst ) ;


<s> <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ;


<s> int Offset = OffsetMO . getImm ( ) ; if ( ExtraCode ) return true ; if ( Offset < <NUM_LIT> ) O << <STR_LIT> << <ISA_LIT>InstPrinter :: getRegisterName ( BaseMO . getReg ( ) ) << <STR_LIT> << - Offset << <STR_LIT> ; else O << <STR_LIT> << <ISA_LIT>InstPrinter :: getRegisterName ( BaseMO . getReg ( ) ) << <STR_LIT> << Offset << <STR_LIT> ; return false ;


<s> if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) return AsmPrinter :: PrintAsmOperand ( MI , OpNo , ExtraCode , O ) ; printOperand ( MI , OpNo , O ) ; return false ;


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , const char * ExtraCode , raw_ostream & O ) { if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) return AsmPrinter :: PrintAsmOperand ( MI , OpNo , ExtraCode , O ) ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( TM , Streamer ) {


<s> void <ISA_LIT>AsmPrinter :: customEmitInstruction ( const MachineInstr * MI ) {

<ISA_LIT>MCInstLower MCInstLowering ( OutContext , * Mang , * this ) ;


<s> MCInst TmpInst ; MCInstLowering . Lower ( MI , TmpInst ) ; OutStreamer . EmitInstruction ( TmpInst ) ;


<s> MachineBasicBlock :: const_instr_iterator I = MI ; MachineBasicBlock :: const_instr_iterator E = MI -> getParent ( ) -> instr_end ( ) ; do {


<s> void <ISA_LIT>AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { MachineBasicBlock :: const_instr_iterator I = MI ; MachineBasicBlock :: const_instr_iterator E = MI -> getParent ( ) -> instr_end ( ) ;


<s> virtual const char * getPassName ( ) const { return <STR_LIT> ;


<s> switch ( MO . getType ( ) ) { case MachineOperand :: MO_Register : O << <ISA_LIT>InstPrinter :: getRegisterName ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : O << MO . getImm ( ) ; break ; case MachineOperand :: MO_MachineBasicBlock : O << * MO . getMBB ( ) -> getSymbol ( ) ; break ; case MachineOperand :: MO_GlobalAddress : O << * getSymbol ( MO . getGlobal ( ) ) ; O << * Mang -> getSymbol ( MO . getGlobal ( ) ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> void <ISA_LIT>AsmPrinter :: emitInstruction ( const MachineInstr * MI ) { MCInst TmpInst ; if ( ! BTF || ! BTF -> InstLower ( MI , TmpInst ) ) { <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ; MCInstLowering . Lower ( MI , TmpInst ) ; } EmitToStreamer ( * OutStreamer , TmpInst ) ;


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>leTarget ( ) ) ;

RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( getThe<ISA_LIT>beTarget ( ) ) ;


<s> StringRef getPassName ( ) const override {


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>leTarget ( ) ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( getThe<ISA_LIT>beTarget ( ) ) ;

RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Z ( getThe<ISA_LIT>Target ( ) ) ;


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>leTarget ( ) ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( getThe<ISA_LIT>beTarget ( ) ) ;


<s> Handlers . emplace_back ( llvm :: make_unique < BTFDebug > ( this ) , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> AsmPrinter :: doInitialization ( M ) ;

if ( MAI -> doesSupportDebugInformation ( ) && ! empty ( M . debug_compile_units ( ) ) ) {


<s> bool <ISA_LIT>AsmPrinter :: doInitialization ( Module & M ) { AsmPrinter :: doInitialization ( M ) ; if ( MAI -> doesSupportDebugInformation ( ) ) { Handlers . push_back ( HandlerInfo ( new BTFDebug ( this ) , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ) ; } return false ;


<s> Handlers . push_back ( HandlerInfo ( new BTFDebug ( this ) , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ) ; }


<s> MCInstLowering . Lower ( MI , TmpInst ) ;

EmitToStreamer ( OutStreamer , TmpInst ) ;


<s> void <ISA_LIT>AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ; MCInst TmpInst ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> bool Changed = removePassThroughBuiltin ( M ) ; Changed = removeCompareBuiltin ( M ) || Changed ; return Changed ;


<s> bool <ISA_LIT>CheckAndAdjustIR :: adjustIR ( Module & M ) { bool Changed = removePassThroughBuiltin ( M ) ; Changed = removeCompareBuiltin ( M ) || Changed ;


<s> } auto * Call = dyn_cast < CallInst > ( & I ) ; if ( ! Call ) continue ; auto * GV = dyn_cast < GlobalValue > ( Call -> getCalledOperand ( ) ) ; if ( ! GV ) continue ; if ( ! GV -> getName ( ) . startswith ( <STR_LIT> ) ) continue ; Changed = true ; Value * Arg0 = Call -> getArgOperand ( <NUM_LIT> ) ;

Value * Arg1 = Call -> getArgOperand ( <NUM_LIT> ) ;


<s> return removePassThroughBuiltin ( M ) ;


<s> bool <ISA_LIT>CheckAndAdjustIR :: adjustIR ( Module & M ) { return removePassThroughBuiltin ( M ) ;


<s> <ISA_LIT>CheckAndAdjustIR ( ) : ModulePass ( ID ) {


<s> for ( Function & F : M ) for ( auto & BB : F ) for ( auto & I : BB ) { PHINode * PN = dyn_cast < PHINode > ( & I ) ; if ( ! PN || PN -> use_empty ( ) ) continue ; for ( int i = <NUM_LIT> , e = PN -> getNumIncomingValues ( ) ; i < e ; ++ i ) {

auto * GV = dyn_cast < GlobalVariable > ( PN -> getIncomingValue ( i ) ) ;


<s> return new <ISA_LIT>CheckAndAdjustIR ( ) ;


<s> for ( Function & F : M ) for ( auto & BB : F ) for ( auto & I : BB ) { if ( ToBeDeleted ) { ToBeDeleted -> eraseFromParent ( ) ; ToBeDeleted = nullptr ; } auto * Call = dyn_cast < CallInst > ( & I ) ; if ( ! Call ) continue ; auto * GV = dyn_cast < GlobalValue > ( Call -> getCalledOperand ( ) ) ;


<s> bool <ISA_LIT>CheckAndAdjustIR :: runOnModule ( Module & M ) {


<s> DecodeStatus Result ; Result = readInstruction64 ( Bytes , Address , Size , Insn , IsLittleEndian ) ; if ( Result == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; uint8_t InstClass = getInstClass ( Insn ) ; uint8_t InstMode = getInstMode ( Insn ) ; if ( ( InstClass == <ISA_LIT>_LDX || InstClass == <ISA_LIT>_STX ) && getInstSize ( Insn ) != <ISA_LIT>_DW && ( InstMode == <ISA_LIT>_MEM || InstMode == <ISA_LIT>_XADD ) && STI . getFeatureBits ( ) [ <STR_LIT> ] ) Result = decodeInstruction ( DecoderTable<ISA_LIT>ALU3264 , Instr , Insn , Address , this , STI ) ; else Result = decodeInstruction ( DecoderTable<ISA_LIT>64 , Instr , Insn , Address , this , STI ) ; if ( Result == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; switch ( Instr . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ;


<s> TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>leTarget ( ) , create<ISA_LIT>Disassembler ) ;

TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>beTarget ( ) , create<ISA_LIT>Disassembler ) ;


<s> TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>Disassembler ) ; TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>leTarget ( ) , create<ISA_LIT>Disassembler ) ;


<s> if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; uint64_t Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { auto Op = Instr . getOperand ( <NUM_LIT> ) ; Instr . clear ( ) ; Instr . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; Instr . addOperand ( Op ) ; break ;


<s> return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; Lo = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ;


<s> Size = <NUM_LIT> ; Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; Lo = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ;


<s> static DecodeStatus decodeMemoryOpValue ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { unsigned Register = ( Insn >> <NUM_LIT> ) & <NUM_LIT> ; if ( Register > <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ; unsigned Offset = ( Insn & <NUM_LIT> ) ;

Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Offset ) ) ) ;


<s> if ( Register > <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ; unsigned Offset = ( Insn & <NUM_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Offset ) ) ) ;


<s> uint8_t InstMode = getInstMode ( Insn ) ; if ( ( InstClass == <ISA_LIT>_LDX || InstClass == <ISA_LIT>_STX ) && getInstSize ( Insn ) != <ISA_LIT>_DW && ( InstMode == <ISA_LIT>_MEM || InstMode == <ISA_LIT>_ATOMIC ) && STI . getFeatureBits ( ) [ <STR_LIT> ] ) Result = decodeInstruction ( DecoderTable<ISA_LIT>ALU3264 , Instr , Insn , Address , this , STI ) ; else Result = decodeInstruction ( DecoderTable<ISA_LIT>64 , Instr , Insn , Address , this , STI ) ; if ( Result == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; switch ( Instr . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { auto Op = Instr . getOperand ( <NUM_LIT> ) ; Instr . clear ( ) ;

Instr . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ;


<s> switch ( Instr . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> if ( Result == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; Result = decodeInstruction ( DecoderTable<ISA_LIT>64 , Instr , Insn , Address , this , STI ) ; if ( Result == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; switch ( Instr . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ;

auto & Op = Instr . getOperand ( <NUM_LIT> ) ;


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ;

unsigned Reg = GPR32DecoderTable [ RegNo ] ;


<s> Inst . addOperand ( MCOperand :: createReg ( Reg ) ) ; return MCDisassembler :: Success ;


<s> unsigned Reg = GPRDecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Reg ) ) ;


<s> if ( Register > <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ;

unsigned Offset = ( Insn & <NUM_LIT> ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ; unsigned Offset = ( Insn & <NUM_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Offset ) ) ) ; return MCDisassembler :: Success ;


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx ) : MCDisassembler ( STI , Ctx ) {


<s> static MCDisassembler * create<ISA_LIT>Disassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>Disassembler ( STI , Ctx ) ;


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ; unsigned Reg = GPR32DecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Reg ) ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( Reg ) ) ;


unsigned Reg = GPRDecoderTable [ RegNo ] ;


<s> static DecodeStatus decodeMemoryOpValue ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { unsigned Register = ( Insn >> <NUM_LIT> ) & <NUM_LIT> ; Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ; unsigned Offset = ( Insn & <NUM_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Offset ) ) ) ; return MCDisassembler :: Success ;


<s> unsigned Register = ( Insn >> <NUM_LIT> ) & <NUM_LIT> ;

Inst . addOperand ( MCOperand :: createReg ( GPRDecoderTable [ Register ] ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> case <STR_LIT> : { if ( Bytes . size ( ) < <NUM_LIT> ) { Size = <NUM_LIT> ; return MCDisassembler :: Fail ; } Size = <NUM_LIT> ; if ( IsLittleEndian ) Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; else Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; auto & Op = Instr . getOperand ( <NUM_LIT> ) ; Op . setImm ( Make_64 ( Hi , Op . getImm ( ) ) ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>Disassembler ) ;

TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>leTarget ( ) , create<ISA_LIT>Disassembler ) ;


<s> Lo = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; } else { Hi = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( ( Bytes [ <NUM_LIT> ] & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Bytes [ <NUM_LIT> ] & <NUM_LIT> ) << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( true , OSABI , ELF :: EM_<ISA_LIT> , false ) {


<s> switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : return ELF :: R_<ISA_LIT>_64_32 ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( true , OSABI , ELF :: EM_NONE , false ) {


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ; return createELFObjectWriter ( MOTW , OS , IsLittleEndian ) ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: GetRelocType ( const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_X86_64_64 ; case FK_SecRel_4 : return ELF :: R_X86_64_PC32 ;


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_PCRel_4 : case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) { if ( A -> getSymbol ( ) . isTemporary ( ) ) { MCSection & Section = A -> getSymbol ( ) . getSection ( ) ; const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ; assert ( SectionELF && <STR_LIT> ) ; unsigned Flags = SectionELF -> getFlags ( ) ;

if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_EXECINSTR ) ) return ELF :: R_<ISA_LIT>_NONE ;


<s> case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) { if ( A -> getSymbol ( ) . isTemporary ( ) ) { MCSection & Section = A -> getSymbol ( ) . getSection ( ) ; const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ; assert ( SectionELF && <STR_LIT> ) ; unsigned Flags = SectionELF -> getFlags ( ) ;


<s> switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_X86_64_64 ; case FK_SecRel_4 : return ELF :: R_X86_64_PC32 ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_X86_64_64 ; case FK_SecRel_4 :


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) {

return std :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) { const MCSymbol & Sym = A -> getSymbol ( ) ; if ( Sym . isDefined ( ) ) { MCSection & Section = Sym . getSection ( ) ; const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ; assert ( SectionELF && <STR_LIT> ) ; unsigned Flags = SectionELF -> getFlags ( ) ; if ( Sym . isTemporary ( ) ) { if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_EXECINSTR ) ) return ELF :: R_<ISA_LIT>_64_NODYLD32 ; } else { if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_WRITE ) ) return ELF :: R_<ISA_LIT>_64_NODYLD32 ; } } }


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ; return createELFObjectWriter ( MOTW , OS , true ) ;


<s> MCObjectWriter * llvm :: create<ISA_LIT>ELFObjectWriter ( raw_ostream & OS , uint8_t OSABI ) {

MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ;


<s> return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) {

if ( A -> getSymbol ( ) . isTemporary ( ) ) return ELF :: R_<ISA_LIT>_NONE ;


<s> case FK_SecRel_8 : return ELF :: R_X86_64_64 ; case FK_SecRel_4 : return ELF :: R_X86_64_PC32 ; case FK_Data_8 : return IsPCRel ? ELF :: R_X86_64_PC64 : ELF :: R_X86_64_64 ; case FK_Data_4 :

return IsPCRel ? ELF :: R_X86_64_PC32 : ELF :: R_X86_64_32 ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 :


<s> return createELFObjectWriter ( MOTW , OS , true ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ;

return createELFObjectWriter ( MOTW , OS , true ) ;


<s> const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ; assert ( SectionELF && <STR_LIT> ) ; unsigned Flags = SectionELF -> getFlags ( ) ; if ( Sym . isTemporary ( ) ) { if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_EXECINSTR ) ) return ELF :: R_<ISA_LIT>_NONE ;


<s> case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) { const MCSymbol & Sym = A -> getSymbol ( ) ; if ( Sym . isDefined ( ) ) { MCSection & Section = Sym . getSection ( ) ;

const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ;


<s> case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_Data_4 : if ( const MCSymbolRefExpr * A = Target . getSymA ( ) ) { const MCSymbol & Sym = A -> getSymbol ( ) ; if ( Sym . isDefined ( ) ) { MCSection & Section = Sym . getSection ( ) ; const MCSectionELF * SectionELF = dyn_cast < MCSectionELF > ( & Section ) ; assert ( SectionELF && <STR_LIT> ) ; unsigned Flags = SectionELF -> getFlags ( ) ; if ( Sym . isTemporary ( ) ) { if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_EXECINSTR ) ) return ELF :: R_<ISA_LIT>_NONE ; } else { if ( ( Flags & ELF :: SHF_ALLOC ) && ( Flags & ELF :: SHF_WRITE ) ) return ELF :: R_<ISA_LIT>_NONE ; } } } return ELF :: R_<ISA_LIT>_64_32 ;


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) { return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> case FK_SecRel_8 : return ELF :: R_<ISA_LIT>_64_64 ; case FK_PCRel_4 : case FK_SecRel_4 : return ELF :: R_<ISA_LIT>_64_32 ; case FK_Data_8 :


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_SecRel_8 : return ELF :: R_<ISA_LIT>_64_64 ;


<s> explicit <ISA_LIT>FrameLowering ( const <ISA_LIT>Subtarget & sti ) : TargetFrameLowering ( TargetFrameLowering :: StackGrowsDown , <NUM_LIT> , <NUM_LIT> ) {


<s> void eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const {


<s> explicit <ISA_LIT>FrameLowering ( const <ISA_LIT>Subtarget & sti ) : TargetFrameLowering ( TargetFrameLowering :: StackGrowsDown , Align ( <NUM_LIT> ) , <NUM_LIT> ) {


<s> void eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const override {


<s> MRI . setPhysRegUnused ( <STR_LIT> ) ; MRI . setPhysRegUnused ( <STR_LIT> ) ; MRI . setPhysRegUnused ( <STR_LIT> ) ; MRI . setPhysRegUnused ( <STR_LIT> ) ;


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF ) const {


<s> void <ISA_LIT>FrameLowering :: emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const {


<s> MRI . setPhysRegUnused ( <STR_LIT> ) ; MRI . setPhysRegUnused ( <STR_LIT> ) ;


<s> TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; SavedRegs . reset ( <STR_LIT> ) ; SavedRegs . reset ( <STR_LIT> ) ; SavedRegs . reset ( <STR_LIT> ) ; SavedRegs . reset ( <STR_LIT> ) ;


<s> void <ISA_LIT>FrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; SavedRegs . reset ( <STR_LIT> ) ; SavedRegs . reset ( <STR_LIT> ) ; SavedRegs . reset ( <STR_LIT> ) ;


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF , MachineBasicBlock & MBB ) const {


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const {


<s> if ( Op . isImm ( ) ) { int16_t Imm = Op . getImm ( ) ; O << ( ( Imm >= <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << formatImm ( Imm ) ; } else if ( Op . isExpr ( ) ) { printExpr ( Op . getExpr ( ) , O ) ; } else { O << Op ; }


<s> void <ISA_LIT>InstPrinter :: printBrTargetOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNo ) ;


<s> const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isImm ( ) ) O << formatImm ( Op . getImm ( ) ) ;

else if ( Op . isExpr ( ) ) printExpr ( Op . getExpr ( ) , O ) ;


<s> const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isImm ( ) ) O << formatImm ( Op . getImm ( ) ) ; else if ( Op . isExpr ( ) ) printExpr ( Op . getExpr ( ) , O ) ; else O << Op ;


<s> O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm ( ) ) { O << formatImm ( ( int32_t ) Op . getImm ( ) ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; printExpr ( Op . getExpr ( ) , O ) ; }


<s> printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ;


<s> int16_t Imm = Op . getImm ( ) ; O << ( ( Imm >= <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << Imm ; } else if ( Op . isExpr ( ) ) { printExpr ( Op . getExpr ( ) , O ) ; } else { O << Op ;


<s> void <ISA_LIT>InstPrinter :: printImm64Operand ( const MCInst * MI , unsigned OpNo , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNo ) ;

if ( Op . isImm ( ) ) O << ( uint64_t ) Op . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O , const char * Modifier ) { assert ( ( Modifier == nullptr || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ; const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm ( ) ) { O << formatImm ( ( int32_t ) Op . getImm ( ) ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ;


<s> if ( Op . isReg ( ) ) { O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm ( ) ) { O << formatImm ( ( int32_t ) Op . getImm ( ) ) ;


<s> O << getRegisterName ( RegOp . getReg ( ) ) ; if ( OffsetOp . isImm ( ) ) { auto Imm = OffsetOp . getImm ( ) ; if ( Imm >= <NUM_LIT> ) O << <STR_LIT> << formatDec ( Imm ) ; else O << <STR_LIT> << formatDec ( - Imm ) ; } else { assert ( <NUM_LIT> && <STR_LIT> ) ; }


<s> O << OffsetOp . getImm ( ) ; } else { assert ( <NUM_LIT> && <STR_LIT> ) ; } assert ( RegOp . isReg ( ) && <STR_LIT> ) ; O << <STR_LIT> << getRegisterName ( RegOp . getReg ( ) ) << <STR_LIT> ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; else SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ; assert ( SRE && <STR_LIT> ) ; MCSymbolRefExpr :: VariantKind Kind = SRE -> getKind ( ) ; assert ( Kind == MCSymbolRefExpr :: VK_None ) ;


<s> static void printExpr ( const MCExpr * Expr , raw_ostream & O ) { const MCSymbolRefExpr * SRE ; if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; else SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ; assert ( SRE && <STR_LIT> ) ;

MCSymbolRefExpr :: VariantKind Kind = SRE -> getKind ( ) ;


<s> void <ISA_LIT>InstPrinter :: printImm64Operand ( const MCInst * MI , unsigned OpNo , raw_ostream & O ) {

const MCOperand & Op = MI -> getOperand ( OpNo ) ;


<s> if ( Op . isImm ( ) ) O << ( uint64_t ) Op . getImm ( ) ; else O << Op ;


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot , const MCSubtargetInfo & STI ) { printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ;


<s> if ( OffsetOp . isImm ( ) ) O << formatDec ( OffsetOp . getImm ( ) ) ; else assert ( <NUM_LIT> && <STR_LIT> ) ;

assert ( RegOp . isReg ( ) && <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O , const char * Modifier ) { assert ( ( Modifier == <NUM_LIT> || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ; const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm ( ) ) { O << ( int32_t ) Op . getImm ( ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; printExpr ( Op . getExpr ( ) , O ) ;


<s> assert ( ( Modifier == <NUM_LIT> || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ; const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm ( ) ) {


<s> bool <ISA_LIT>InstrInfo :: analyzeBranch ( MachineBasicBlock & MBB , MachineBasicBlock * & TBB , MachineBasicBlock * & FBB , SmallVectorImpl < MachineOperand > & Cond , bool AllowModify ) const { MachineBasicBlock :: iterator I = MBB . end ( ) ; while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( ! isUnpredicatedTerminator ( * I ) ) break ; if ( ! I -> isBranch ( ) ) return true ; if ( I -> getOpcode ( ) == <STR_LIT> ) { if ( ! AllowModify ) { TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } while ( std :: next ( I ) != MBB . end ( ) ) std :: next ( I ) -> eraseFromParent ( ) ; Cond . clear ( ) ; FBB = nullptr ;

if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) {


<s> continue ; } while ( std :: next ( I ) != MBB . end ( ) ) std :: next ( I ) -> eraseFromParent ( ) ; Cond . clear ( ) ; FBB = nullptr ; if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) { TBB = nullptr ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; continue ; }

TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ;


<s> assert ( TBB && <STR_LIT> ) ; if ( Cond . empty ( ) ) { assert ( ! FBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> unsigned <ISA_LIT>InstrInfo :: removeBranch ( MachineBasicBlock & MBB , int * BytesRemoved ) const { assert ( ! BytesRemoved && <STR_LIT> ) ; MachineBasicBlock :: iterator I = MBB . end ( ) ; unsigned Count = <NUM_LIT> ; while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( I -> getOpcode ( ) != <STR_LIT> ) break ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; ++ Count ; } return Count ;


<s> -- I ; if ( I -> isDebugInstr ( ) ) continue ; if ( ! isUnpredicatedTerminator ( * I ) ) break ; if ( ! I -> isBranch ( ) ) return true ; if ( I -> getOpcode ( ) == <STR_LIT> ) { if ( ! AllowModify ) { TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } while ( std :: next ( I ) != MBB . end ( ) ) std :: next ( I ) -> eraseFromParent ( ) ; Cond . clear ( ) ; FBB = nullptr ; if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) { TBB = nullptr ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; continue ; } TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } return true ;


<s> if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;

else if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else llvm_unreachable ( <STR_LIT> ) ;


<s> if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ; if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;

else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; else if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; else llvm_unreachable ( <STR_LIT> ) ;


<s> bool Hanging2Byte = BytesLeft & <NUM_LIT> ; bool Hanging1Byte = BytesLeft & <NUM_LIT> ; if ( Hanging4Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging2Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging1Byte ) {


<s> expandMEMCPY ( MI ) ; return true ; } return false ;


<s> bool <ISA_LIT>InstrInfo :: expandPostRAPseudo ( MachineInstr & MI ) const { if ( MI . getOpcode ( ) == <STR_LIT> ) { expandMEMCPY ( MI ) ; return true ; } return false ;


<s> if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ; if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else llvm_unreachable ( <STR_LIT> ) ;


<s> else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else llvm_unreachable ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , Register SrcReg , bool IsKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ; if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; else if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> Cond . clear ( ) ; FBB = <NUM_LIT> ; if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) { TBB = <NUM_LIT> ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; continue ; } TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } return true ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> ) , RI ( * this ) {


<s> unsigned <ISA_LIT>InstrInfo :: InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond , DebugLoc DL ) const { assert ( TBB && <STR_LIT> ) ; if ( Cond . empty ( ) ) { assert ( ! FBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ;

if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> switch ( Alignment ) { case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } unsigned IterationNum = CopyLen >> Log2_64 ( Alignment ) ; for ( unsigned I = <NUM_LIT> ; I < IterationNum ; ++ I ) { BuildMI ( * BB , MI , dl , get ( LdOpc ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( I * Alignment ) ; BuildMI ( * BB , MI , dl , get ( StOpc ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( I * Alignment ) ; } unsigned BytesLeft = CopyLen & ( Alignment - <NUM_LIT> ) ; unsigned Offset = IterationNum * Alignment ; bool Hanging4Byte = BytesLeft & <NUM_LIT> ; bool Hanging2Byte = BytesLeft & <NUM_LIT> ; bool Hanging1Byte = BytesLeft & <NUM_LIT> ; if ( Hanging4Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging2Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging1Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ;


<s> break ; case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; case <NUM_LIT> : LdOpc = <STR_LIT> ; StOpc = <STR_LIT> ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } unsigned IterationNum = CopyLen >> Log2_64 ( Alignment ) ; for ( unsigned I = <NUM_LIT> ; I < IterationNum ; ++ I ) { BuildMI ( * BB , MI , dl , get ( LdOpc ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( I * Alignment ) ; BuildMI ( * BB , MI , dl , get ( StOpc ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( I * Alignment ) ; } unsigned BytesLeft = CopyLen & ( Alignment - <NUM_LIT> ) ; unsigned Offset = IterationNum * Alignment ; bool Hanging4Byte = BytesLeft & <NUM_LIT> ; bool Hanging2Byte = BytesLeft & <NUM_LIT> ; bool Hanging1Byte = BytesLeft & <NUM_LIT> ; if ( Hanging4Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging2Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; Offset += <NUM_LIT> ; } if ( Hanging1Byte ) { BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addReg ( SrcReg ) . addImm ( Offset ) ; BuildMI ( * BB , MI , dl , get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Kill ) . addReg ( DstReg ) . addImm ( Offset ) ; } BB -> erase ( MI ) ;


<s> TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } while ( std :: next ( I ) != MBB . end ( ) ) std :: next ( I ) -> eraseFromParent ( ) ; Cond . clear ( ) ; FBB = <NUM_LIT> ; if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) { TBB = <NUM_LIT> ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; continue ; } TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } return true ; }


<s> if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; else llvm_unreachable ( <STR_LIT> ) ;


<s> assert ( ! FBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return <NUM_LIT> ; } llvm_unreachable ( <STR_LIT> ) ;


<s> if ( ! AllowModify ) { TBB = I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; continue ; } while ( std :: next ( I ) != MBB . end ( ) ) std :: next ( I ) -> eraseFromParent ( ) ; Cond . clear ( ) ; FBB = <NUM_LIT> ; if ( MBB . isLayoutSuccessor ( I -> getOperand ( <NUM_LIT> ) . getMBB ( ) ) ) {


<s> if ( <STR_LIT> . contains ( DestReg , SrcReg ) ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const { return RI ;


<s> const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const {


<s> unsigned <ISA_LIT>InstrInfo :: InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , ArrayRef < MachineOperand > Cond , const DebugLoc & DL ) const { assert ( TBB && <STR_LIT> ) ; if ( Cond . empty ( ) ) { assert ( ! FBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return <NUM_LIT> ; } llvm_unreachable ( <STR_LIT> ) ;


<s> unsigned <ISA_LIT>InstrInfo :: RemoveBranch ( MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator I = MBB . end ( ) ; unsigned Count = <NUM_LIT> ; while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( I -> getOpcode ( ) != <STR_LIT> ) break ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; ++ Count ; }


<s> unsigned Count = <NUM_LIT> ; while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( I -> getOpcode ( ) != <STR_LIT> ) break ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; ++ Count ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool IsKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ; if ( RC == & <STR_LIT> ) BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( IsKill ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ;


<s> <ISA_LIT>IRPeephole ( ) : FunctionPass ( ID ) {


<s> } continue ; } if ( auto * LD = dyn_cast < LoadInst > ( & I ) ) { if ( ! LD -> hasOneUser ( ) ) continue ; auto * Call = dyn_cast < CallInst > ( * LD -> user_begin ( ) ) ; if ( ! Call ) continue ; auto * GV = dyn_cast < GlobalValue > ( Call -> getCalledOperand ( ) ) ; if ( ! GV ) continue ; if ( ! GV -> getName ( ) . equals ( <STR_LIT> ) ) continue ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; I . dump ( ) ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Call -> dump ( ) ; dbgs ( ) << '\n' ) ; Changed = true ; Call -> eraseFromParent ( ) ; ToErase = & I ; } }


<s> PreservedAnalyses <ISA_LIT>IRPeepholePass :: run ( Function & F , FunctionAnalysisManager & AM ) {

return <ISA_LIT>IRPeepholeImpl ( F ) ? PreservedAnalyses :: none ( ) : PreservedAnalyses :: all ( ) ;


<s> return <ISA_LIT>IRPeepholeImpl ( F ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) , Subtarget ( nullptr ) {


<s> uint64_t Size = DL . getTypeAllocSize ( CV -> getType ( ) ) ; if ( isa < ConstantAggregateZero > ( CV ) || isa < UndefValue > ( CV ) ) return true ; if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint64_t val = CI -> getZExtValue ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << Offset << <STR_LIT> << val << '\n' ) ; if ( Size > <NUM_LIT> || ( Size & ( Size - <NUM_LIT> ) ) ) return false ; for ( uint64_t i = <NUM_LIT> ; i < Size ; ++ i ) { Vals [ Offset + i ] = DL . isLittleEndian ( ) ? ( ( val >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) : ( ( val >> ( ( Size - i - <NUM_LIT> ) * <NUM_LIT> ) ) & <NUM_LIT> ) ; } return true ; }

if ( const ConstantDataArray * CDA = dyn_cast < ConstantDataArray > ( CV ) ) return fillConstantDataArray ( DL , CDA , Vals , Offset ) ;


<s> if ( Size > <NUM_LIT> || ( Size & ( Size - <NUM_LIT> ) ) ) return false ; for ( uint64_t i = <NUM_LIT> ; i < Size ; ++ i ) { Vals [ Offset + i ] = DL . isLittleEndian ( ) ? ( ( val >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) : ( ( val >> ( ( Size - i - <NUM_LIT> ) * <NUM_LIT> ) ) & <NUM_LIT> ) ; }


<s> const Constant * Init = V -> getInitializer ( ) ; const DataLayout & DL = CurDAG -> getDataLayout ( ) ; val_vec_type TmpVal ; auto it = cs_vals_ . find ( static_cast < const void * > ( Init ) ) ; if ( it != cs_vals_ . end ( ) ) { TmpVal = it -> second ; } else { uint64_t total_size = <NUM_LIT> ; if ( const ConstantStruct * CS = dyn_cast < ConstantStruct > ( Init ) ) total_size = DL . getStructLayout ( cast < StructType > ( CS -> getType ( ) ) ) -> getSizeInBytes ( ) ; else if ( const ConstantArray * CA = dyn_cast < ConstantArray > ( Init ) ) total_size = DL . getTypeAllocSize ( CA -> getType ( ) -> getElementType ( ) ) * CA -> getNumOperands ( ) ; else return false ; val_vec_type Vals ( total_size , <NUM_LIT> ) ; if ( fillGenericConstant ( DL , Init , Vals , <NUM_LIT> ) == false ) return false ;

cs_vals_ [ static_cast < const void * > ( Init ) ] = Vals ;


<s> else if ( const ConstantArray * CA = dyn_cast < ConstantArray > ( Init ) ) total_size = DL . getTypeAllocSize ( CA -> getType ( ) -> getElementType ( ) ) * CA -> getNumOperands ( ) ; else return false ; val_vec_type Vals ( total_size , <NUM_LIT> ) ; if ( fillGenericConstant ( DL , Init , Vals , <NUM_LIT> ) == false ) return false ; cs_vals_ [ static_cast < const void * > ( Init ) ] = Vals ; TmpVal = std :: move ( Vals ) ; } union { uint8_t c [ <NUM_LIT> ] ; uint16_t s ; } test_buf ; uint16_t test_val = <NUM_LIT> ; if ( DL . isLittleEndian ( ) ) <STR_LIT> :: write16le ( test_buf . c , test_val ) ;

else <STR_LIT> :: write16be ( test_buf . c , test_val ) ;


<s> I != E ; ) { SDNode * Node = & * I ++ ; unsigned Opcode = Node -> getOpcode ( ) ; if ( Opcode == <STR_LIT> ) PreprocessLoad ( Node , I ) ; else if ( Opcode == <STR_LIT> ) PreprocessTrunc ( Node , I ) ; }


<s> const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ; if ( GADN && CDN ) to_replace = getConstantFieldValue ( GADN , CDN -> getZExtValue ( ) , size , new_val . c ) ; } else if ( LDAddrNode -> getOpcode ( ) > <STR_LIT> && LDAddrNode -> getNumOperands ( ) > <NUM_LIT> ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ; uint64_t val ; if ( size == <NUM_LIT> ) val = new_val . c [ <NUM_LIT> ] ; else if ( size == <NUM_LIT> ) val = new_val . s ; else if ( size == <NUM_LIT> ) val = new_val . i ; else { val = new_val . d ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << size << <STR_LIT> << val << '\n' ) ; SDValue NVal = CurDAG -> getConstant ( val , DL , LD -> getValueType ( <NUM_LIT> ) ) ; I -- ; SDValue From [ ] = { SDValue ( Node , <NUM_LIT> ) , SDValue ( Node , <NUM_LIT> ) } ; SDValue To [ ] = { NVal , NVal } ; CurDAG -> ReplaceAllUsesOfValuesWith ( From , To , <NUM_LIT> ) ;


<s> void <ISA_LIT>DAGToDAGISel :: PreprocessTrunc ( SDNode * Node , SelectionDAG :: allnodes_iterator & I ) { ConstantSDNode * MaskN = dyn_cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) ; if ( ! MaskN ) return ; SDValue BaseV = Node -> getOperand ( <NUM_LIT> ) ; if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned IntNo = cast < ConstantSDNode > ( BaseV -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; uint64_t MaskV = MaskN -> getZExtValue ( ) ; if ( ! ( ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) ) ) return ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ; CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ;


<s> void <ISA_LIT>DAGToDAGISel :: PreprocessTrunc ( SDNode * Node , SelectionDAG :: allnodes_iterator & I ) { ConstantSDNode * MaskN = dyn_cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) ; if ( ! MaskN ) return ; SDValue BaseV = Node -> getOperand ( <NUM_LIT> ) ; if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned IntNo = cast < ConstantSDNode > ( BaseV -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; uint64_t MaskV = MaskN -> getZExtValue ( ) ; if ( ! ( ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) ) ) return ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ;


<s> Subtarget = & MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; return SelectionDAGISel :: runOnMachineFunction ( MF ) ;


<s> DebugLoc Empty ; const DebugLoc & DL = Node -> getDebugLoc ( ) ; if ( DL != Empty ) errs ( ) << <STR_LIT> << DL . getLine ( ) << <STR_LIT> ; else errs ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> ; Node -> print ( errs ( ) , CurDAG ) ; errs ( ) << <STR_LIT> ; break ; } case <STR_LIT> : { unsigned IntNo = cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ;

EVT VT = Node -> getValueType ( <NUM_LIT> ) ;


<s> if ( Node -> isMachineOpcode ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; dbgs ( ) << '\n' ) ; return ; } switch ( Opcode ) { default : break ; case <STR_LIT> : { DebugLoc Empty ; const DebugLoc & DL = Node -> getDebugLoc ( ) ; if ( DL != Empty ) errs ( ) << <STR_LIT> << DL . getLine ( ) << <STR_LIT> ; else errs ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> ; Node -> print ( errs ( ) , CurDAG ) ; errs ( ) << <STR_LIT> ; break ; } case <STR_LIT> : { unsigned IntNo = cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ;


<s> SDLoc DL ( Addr ) ; if ( ! CurDAG -> isBaseWithConstantOffset ( Addr ) ) return false ; auto * CN = cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ;

if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) {


<s> bool to_replace = false ; SDLoc DL ( Node ) ; const LoadSDNode * LD = cast < LoadSDNode > ( Node ) ; uint64_t size = LD -> getMemOperand ( ) -> getSize ( ) ; if ( ! size || size > <NUM_LIT> || ( size & ( size - <NUM_LIT> ) ) ) return ; SDNode * LDAddrNode = LD -> getOperand ( <NUM_LIT> ) . getNode ( ) ; unsigned opcode = LDAddrNode -> getOpcode ( ) ; if ( opcode == <STR_LIT> ) { SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDValue OP2 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDNode * OP1N = OP1 . getNode ( ) ; if ( OP1N -> getOpcode ( ) <= <STR_LIT> || OP1N -> getNumOperands ( ) == <NUM_LIT> ) return ; DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ;

const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ;


<s> uint64_t MaskV = MaskN -> getZExtValue ( ) ; if ( ! ( ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) ) ) return ; DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ; CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ; return ; } if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! TargetRegisterInfo :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; unsigned Reg = MOP . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ;


<s> return ; } if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! TargetRegisterInfo :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; unsigned Reg = MOP . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) {

const MachineOperand & MOP = MII -> getOperand ( i ) ;


<s> case <STR_LIT> : { unsigned IntNo = cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) { CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI ) ; return ; } ReplaceNode ( Node , CurDAG -> getMachineNode ( Opc , SDLoc ( Node ) , VT , TFI ) ) ; return ; }


<s> Node -> print ( errs ( ) , CurDAG ) ; errs ( ) << <STR_LIT> ; break ; } case <STR_LIT> : { unsigned IntNo = cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ;


<s> SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) { CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI ) ; return ; } ReplaceNode ( Node , CurDAG -> getMachineNode ( Opc , SDLoc ( Node ) , VT , TFI ) ) ;


<s> Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) return false ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) {

ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ;


<s> if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) return false ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) {

if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ;


<s> if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; else return false ; Offset = CurDAG -> getTargetConstant ( CN -> getSExtValue ( ) , DL , <STR_LIT> ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ; if ( GADN && CDN ) to_replace = getConstantFieldValue ( GADN , CDN -> getZExtValue ( ) , size , new_val . c ) ; } else if ( LDAddrNode -> getOpcode ( ) > <STR_LIT> && LDAddrNode -> getNumOperands ( ) > <NUM_LIT> ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ; uint64_t val ; if ( size == <NUM_LIT> ) val = new_val . c [ <NUM_LIT> ] ; else if ( size == <NUM_LIT> ) val = new_val . s ; else if ( size == <NUM_LIT> ) val = new_val . i ; else { val = new_val . d ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << size << <STR_LIT> << val << '\n' ) ; SDValue NVal = CurDAG -> getConstant ( val , DL , <STR_LIT> ) ; I -- ; SDValue From [ ] = { SDValue ( Node , <NUM_LIT> ) , SDValue ( Node , <NUM_LIT> ) } ; SDValue To [ ] = { NVal , NVal } ; CurDAG -> ReplaceAllUsesOfValuesWith ( From , To , <NUM_LIT> ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ;


<s> if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned IntNo = cast < ConstantSDNode > ( BaseV -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; uint64_t MaskV = MaskN -> getZExtValue ( ) ; if ( ! ( ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) ) ) return ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ;

CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ;


<s> if ( ! MaskN ) return ; SDValue BaseV = Node -> getOperand ( <NUM_LIT> ) ; if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned IntNo = cast < ConstantSDNode > ( BaseV -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ;

uint64_t MaskV = MaskN -> getZExtValue ( ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) {


<s> auto it = load_to_vreg_ . find ( DefReg ) ;

if ( it == load_to_vreg_ . end ( ) ) return false ;


<s> auto it = load_to_vreg_ . find ( DefReg ) ; if ( it == load_to_vreg_ . end ( ) ) return false ; return it -> second == match_load_op ;


<s> default : return ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; } DEBUG ( dbgs ( ) << <STR_LIT> << TargetRegisterInfo :: virtReg2Index ( RegN -> getReg ( ) ) << '\n' ) ;

load_to_vreg_ [ RegN -> getReg ( ) ] = mem_load_op ;


<s> I != E ; ) { SDNode * Node = & * I ++ ; unsigned Opcode = Node -> getOpcode ( ) ; if ( Opcode == <STR_LIT> ) PreprocessLoad ( Node , I ) ;

else if ( Opcode == <STR_LIT> ) PreprocessCopyToReg ( Node ) ;


<s> uint64_t size = LD -> getMemOperand ( ) -> getSize ( ) ; if ( ! size || size > <NUM_LIT> || ( size & ( size - <NUM_LIT> ) ) ) return ; SDNode * LDAddrNode = LD -> getOperand ( <NUM_LIT> ) . getNode ( ) ; unsigned opcode = LDAddrNode -> getOpcode ( ) ; if ( opcode == <STR_LIT> ) { SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDValue OP2 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDNode * OP1N = OP1 . getNode ( ) ; if ( OP1N -> getOpcode ( ) <= <STR_LIT> || OP1N -> getNumOperands ( ) == <NUM_LIT> ) return ; DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ; if ( GADN && CDN ) to_replace = getConstantFieldValue ( GADN , CDN -> getZExtValue ( ) , size , new_val . c ) ; } else if ( LDAddrNode -> getOpcode ( ) > <STR_LIT> && LDAddrNode -> getNumOperands ( ) > <NUM_LIT> ) { DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ;


<s> SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ; uint64_t val ; if ( size == <NUM_LIT> ) val = new_val . c [ <NUM_LIT> ] ; else if ( size == <NUM_LIT> ) val = new_val . s ; else if ( size == <NUM_LIT> ) val = new_val . i ; else { val = new_val . d ; } DEBUG ( dbgs ( ) << <STR_LIT> << size << <STR_LIT> << val << '\n' ) ; SDValue NVal = CurDAG -> getConstant ( val , DL , <STR_LIT> ) ; I -- ;

SDValue From [ ] = { SDValue ( Node , <NUM_LIT> ) , SDValue ( Node , <NUM_LIT> ) } ;


<s> CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ; return ; } if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! TargetRegisterInfo :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; unsigned Reg = MOP . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MII -> getOperand ( i ) ; if ( MOP . isReg ( ) ) { if ( MOP . isDef ( ) ) continue ; PrevReg = MOP . getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( PrevReg ) ) return ; if ( ! checkLoadDef ( PrevReg , match_load_op ) ) return ; } }


<s> SDLoc DL ( Op ) ; SDValue AluOp = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; ; OutOps . push_back ( Op0 ) ; OutOps . push_back ( Op1 ) ; OutOps . push_back ( AluOp ) ;


<s> case InlineAsm :: Constraint_m : if ( ! SelectAddr ( Op , Op0 , Op1 ) ) return true ; break ; } SDLoc DL ( Op ) ; SDValue AluOp = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; ; OutOps . push_back ( Op0 ) ;


<s> void <ISA_LIT>DAGToDAGISel :: PreprocessLoad ( SDNode * Node , SelectionDAG :: allnodes_iterator & I ) { union { uint8_t c [ <NUM_LIT> ] ; uint16_t s ; uint32_t i ; uint64_t d ; } new_val ; bool to_replace = false ; SDLoc DL ( Node ) ; const LoadSDNode * LD = cast < LoadSDNode > ( Node ) ; uint64_t size = LD -> getMemOperand ( ) -> getSize ( ) ; if ( ! size || size > <NUM_LIT> || ( size & ( size - <NUM_LIT> ) ) ) return ; SDNode * LDAddrNode = LD -> getOperand ( <NUM_LIT> ) . getNode ( ) ; unsigned opcode = LDAddrNode -> getOpcode ( ) ; if ( opcode == <STR_LIT> ) { SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDValue OP2 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDNode * OP1N = OP1 . getNode ( ) ; if ( OP1N -> getOpcode ( ) <= <STR_LIT> || OP1N -> getNumOperands ( ) == <NUM_LIT> ) return ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ; if ( GADN && CDN ) to_replace = getConstantFieldValue ( GADN , CDN -> getZExtValue ( ) , size , new_val . c ) ; } else if ( LDAddrNode -> getOpcode ( ) > <STR_LIT> && LDAddrNode -> getNumOperands ( ) > <NUM_LIT> ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ; uint64_t val ; if ( size == <NUM_LIT> ) val = new_val . c [ <NUM_LIT> ] ; else if ( size == <NUM_LIT> ) val = new_val . s ; else if ( size == <NUM_LIT> ) val = new_val . i ; else { val = new_val . d ; }

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << size << <STR_LIT> << val << '\n' ) ;


<s> const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ; if ( GADN && CDN ) to_replace = getConstantFieldValue ( GADN , CDN -> getZExtValue ( ) , size , new_val . c ) ; } else if ( LDAddrNode -> getOpcode ( ) > <STR_LIT> && LDAddrNode -> getNumOperands ( ) > <NUM_LIT> ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; if ( const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1 . getNode ( ) ) ) to_replace = getConstantFieldValue ( GADN , <NUM_LIT> , size , new_val . c ) ; } if ( ! to_replace ) return ; uint64_t val ; if ( size == <NUM_LIT> ) val = new_val . c [ <NUM_LIT> ] ; else if ( size == <NUM_LIT> ) val = new_val . s ; else if ( size == <NUM_LIT> ) val = new_val . i ; else { val = new_val . d ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << size << <STR_LIT> << val << '\n' ) ; SDValue NVal = CurDAG -> getConstant ( val , DL , LD -> getValueType ( <NUM_LIT> ) ) ; I -- ; SDValue From [ ] = { SDValue ( Node , <NUM_LIT> ) , SDValue ( Node , <NUM_LIT> ) } ; SDValue To [ ] = { NVal , NVal } ; CurDAG -> ReplaceAllUsesOfValuesWith ( From , To , <NUM_LIT> ) ; I ++ ;


<s> I != E ; ) { SDNode * Node = & * I ++ ; unsigned Opcode = Node -> getOpcode ( ) ; if ( Opcode == <STR_LIT> ) PreprocessLoad ( Node , I ) ; else if ( Opcode == <STR_LIT> ) PreprocessCopyToReg ( Node ) ;

else if ( Opcode == <STR_LIT> ) PreprocessTrunc ( Node , I ) ;


<s> unsigned Opcode = Node -> getOpcode ( ) ; if ( Opcode == <STR_LIT> ) PreprocessLoad ( Node , I ) ; else if ( Opcode == <STR_LIT> ) PreprocessCopyToReg ( Node ) ; else if ( Opcode == <STR_LIT> ) PreprocessTrunc ( Node , I ) ; }


<s> void <ISA_LIT>DAGToDAGISel :: PreprocessTrunc ( SDNode * Node , SelectionDAG :: allnodes_iterator & I ) { ConstantSDNode * MaskN = dyn_cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) ; if ( ! MaskN ) return ; SDValue BaseV = Node -> getOperand ( <NUM_LIT> ) ; if ( BaseV . getOpcode ( ) == <STR_LIT> ) { unsigned IntNo = cast < ConstantSDNode > ( BaseV -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; uint64_t MaskV = MaskN -> getZExtValue ( ) ; if ( ! ( ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) || ( IntNo == <STR_LIT> && MaskV == <NUM_LIT> ) ) ) return ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ; CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ; return ; } if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! Register :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ;

if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ;


<s> unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! Register :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; Register Reg = MOP . getReg ( ) ; if ( Register :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MII -> getOperand ( i ) ; if ( MOP . isReg ( ) ) { if ( MOP . isDef ( ) ) continue ; PrevReg = MOP . getReg ( ) ; if ( ! Register :: isVirtualRegister ( PrevReg ) ) return ;

if ( ! checkLoadDef ( PrevReg , match_load_op ) ) return ;


<s> const char * getPassName ( ) const override {


<s> Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ; break ; } case <STR_LIT> : { unsigned IntNo = cast < ConstantSDNode > ( Node -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ;


<s> if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) return false ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; else Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = CurDAG -> getTargetConstant ( CN -> getSExtValue ( ) , DL , <STR_LIT> ) ;


<s> } } break ; } case <STR_LIT> : { int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI ) ; return CurDAG -> getMachineNode ( Opc , SDLoc ( Node ) , VT , TFI ) ; } } SDNode * ResNode = SelectCode ( Node ) ; DEBUG ( dbgs ( ) << <STR_LIT> ; if ( ResNode == nullptr || ResNode == Node ) Node -> dump ( CurDAG ) ; else ResNode -> dump ( CurDAG ) ; dbgs ( ) << '\n' ) ; return ResNode ;


<s> switch ( IntNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : {

int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ;


<s> SelectionDAGISel ( tm ) , TM ( tm ) , Subtarget ( tm . getSubtarget < <ISA_LIT>Subtarget > ( ) ) {


<s> inline SDValue getI32Imm ( unsigned Imm ) {

return CurDAG -> getTargetConstant ( Imm , <STR_LIT> ) ;


<s> return CurDAG -> getTargetConstant ( Imm , <STR_LIT> ) ;


<s> virtual const char * getPassName ( ) const {


<s> DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; if ( Node -> isMachineOpcode ( ) ) { DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; return NULL ; } switch ( Opcode ) { default : break ; case <STR_LIT> : { int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ;


<s> if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; else Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = CurDAG -> getTargetConstant ( CN -> getSExtValue ( ) , <STR_LIT> ) ; return true ; } } if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) {


<s> case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } SDValue BaseV = Node -> getOperand ( <NUM_LIT> ) ; if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! TargetRegisterInfo :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; unsigned Reg = MOP . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MII -> getOperand ( i ) ; if ( MOP . isReg ( ) ) {


<s> } else { DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MII -> getOperand ( i ) ; if ( MOP . isReg ( ) ) { if ( MOP . isDef ( ) ) continue ; PrevReg = MOP . getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( PrevReg ) ) return ; if ( ! checkLoadDef ( PrevReg , match_load_op ) ) return ; } } } DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ; CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ;


<s> unsigned mem_load_op = <NUM_LIT> ; switch ( LD -> getMemOperand ( ) -> getSize ( ) ) { default : return ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; case <NUM_LIT> : mem_load_op = <STR_LIT> ; break ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << TargetRegisterInfo :: virtReg2Index ( RegN -> getReg ( ) ) << '\n' ) ; load_to_vreg_ [ RegN -> getReg ( ) ] = mem_load_op ;


<s> CurDAG -> DeleteNode ( Node ) ; return ; } if ( BaseV . getOpcode ( ) != <STR_LIT> ) return ; unsigned match_load_op = <NUM_LIT> ; switch ( MaskN -> getZExtValue ( ) ) { default : return ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; case <NUM_LIT> : match_load_op = <STR_LIT> ; break ; } const RegisterSDNode * RegN = dyn_cast < RegisterSDNode > ( BaseV . getNode ( ) -> getOperand ( <NUM_LIT> ) ) ; if ( ! RegN || ! TargetRegisterInfo :: isVirtualRegister ( RegN -> getReg ( ) ) ) return ; unsigned AndOpReg = RegN -> getReg ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( AndOpReg ) << '\n' ) ; MachineBasicBlock * MBB = FuncInfo -> MBB ; MachineInstr * MII = nullptr ; for ( auto & MI : * MBB ) { for ( unsigned i = <NUM_LIT> ; i < MI . getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MI . getOperand ( i ) ; if ( ! MOP . isReg ( ) || ! MOP . isDef ( ) ) continue ; unsigned Reg = MOP . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) && Reg == AndOpReg ) { MII = & MI ; break ; } } } if ( MII == nullptr ) { if ( ! checkLoadDef ( AndOpReg , match_load_op ) ) return ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; MII -> dump ( ) ; dbgs ( ) << '\n' ) ; unsigned PrevReg = - <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < MII -> getNumOperands ( ) ; ++ i ) { const MachineOperand & MOP = MII -> getOperand ( i ) ; if ( MOP . isReg ( ) ) { if ( MOP . isDef ( ) ) continue ; PrevReg = MOP . getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( PrevReg ) ) return ; if ( ! checkLoadDef ( PrevReg , match_load_op ) ) return ; } } } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; Node -> dump ( ) ; dbgs ( ) << '\n' ) ; I -- ; CurDAG -> ReplaceAllUsesWith ( SDValue ( Node , <NUM_LIT> ) , BaseV ) ; I ++ ; CurDAG -> DeleteNode ( Node ) ;


<s> case <STR_LIT> : { SDLoc DL ( Node ) ; SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue N1 = Node -> getOperand ( <NUM_LIT> ) ; SDValue Skb = Node -> getOperand ( <NUM_LIT> ) ; SDValue N3 = Node -> getOperand ( <NUM_LIT> ) ; SDValue R6Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , DL , R6Reg , Skb , SDValue ( ) ) ; Node = CurDAG -> UpdateNodeOperands ( Node , Chain , N1 , R6Reg , N3 ) ; break ; } } break ; } case <STR_LIT> : { int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI ) ; return CurDAG -> getMachineNode ( Opc , SDLoc ( Node ) , VT , TFI ) ; } } SDNode * ResNode = SelectCode ( Node ) ;


<s> ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ;

else Base = Addr . getOperand ( <NUM_LIT> ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) {


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) {

return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> if ( fillGenericConstant ( DL , CA -> getOperand ( i ) , Vals , Offset ) == false ) return false ; Offset += DL . getTypeAllocSize ( CA -> getOperand ( i ) -> getType ( ) ) ;


<s> if ( fillGenericConstant ( DL , CA -> getOperand ( i ) , Vals , Offset ) == false ) return false ; Offset += DL . getTypeAllocSize ( CA -> getOperand ( i ) -> getType ( ) ) ; } return true ;


<s> if ( fillGenericConstant ( DL , CDA -> getElementAsConstant ( i ) , Vals , Offset ) == false ) return false ; Offset += DL . getTypeAllocSize ( CDA -> getElementAsConstant ( i ) -> getType ( ) ) ; } return true ;


<s> for ( unsigned i = <NUM_LIT> , e = CDA -> getNumElements ( ) ; i != e ; ++ i ) {

if ( fillGenericConstant ( DL , CDA -> getElementAsConstant ( i ) , Vals , Offset ) == false ) return false ;


<s> const StructLayout * Layout = DL . getStructLayout ( CS -> getType ( ) ) ; for ( unsigned i = <NUM_LIT> , e = CS -> getNumOperands ( ) ; i != e ; ++ i ) { const Constant * Field = CS -> getOperand ( i ) ; uint64_t SizeSoFar = Layout -> getElementOffset ( i ) ; if ( fillGenericConstant ( DL , Field , Vals , Offset + SizeSoFar ) == false ) return false ; } return true ;


<s> bool <ISA_LIT>DAGToDAGISel :: fillGenericConstant ( const DataLayout & DL , const Constant * CV , val_vec_type & Vals , uint64_t Offset ) { uint64_t Size = DL . getTypeAllocSize ( CV -> getType ( ) ) ; if ( isa < ConstantAggregateZero > ( CV ) || isa < UndefValue > ( CV ) ) return true ; if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint64_t val = CI -> getZExtValue ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << Offset << <STR_LIT> << val << '\n' ) ; if ( Size > <NUM_LIT> || ( Size & ( Size - <NUM_LIT> ) ) ) return false ; for ( uint64_t i = <NUM_LIT> ; i < Size ; ++ i ) { Vals [ Offset + i ] = DL . isLittleEndian ( ) ? ( ( val >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) : ( ( val >> ( ( Size - i - <NUM_LIT> ) * <NUM_LIT> ) ) & <NUM_LIT> ) ; } return true ;


<s> } else { uint64_t total_size = <NUM_LIT> ; if ( const ConstantStruct * CS = dyn_cast < ConstantStruct > ( Init ) ) total_size = DL . getStructLayout ( cast < StructType > ( CS -> getType ( ) ) ) -> getSizeInBytes ( ) ; else if ( const ConstantArray * CA = dyn_cast < ConstantArray > ( Init ) ) total_size = DL . getTypeAllocSize ( CA -> getType ( ) -> getElementType ( ) ) * CA -> getNumOperands ( ) ; else return false ; val_vec_type Vals ( total_size , <NUM_LIT> ) ; if ( fillGenericConstant ( DL , Init , Vals , <NUM_LIT> ) == false ) return false ; cs_vals_ [ static_cast < const void * > ( Init ) ] = Vals ; TmpVal = std :: move ( Vals ) ; } union { uint8_t c [ <NUM_LIT> ] ; uint16_t s ; } test_buf ; uint16_t test_val = <NUM_LIT> ; if ( DL . isLittleEndian ( ) ) <STR_LIT> :: write16le ( test_buf . c , test_val ) ;

else <STR_LIT> :: write16be ( test_buf . c , test_val ) ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> const LoadSDNode * LD = cast < LoadSDNode > ( Node ) ; uint64_t size = LD -> getMemOperand ( ) -> getSize ( ) ; if ( ! size || size > <NUM_LIT> || ( size & ( size - <NUM_LIT> ) ) ) continue ; SDNode * LDAddrNode = LD -> getOperand ( <NUM_LIT> ) . getNode ( ) ; unsigned opcode = LDAddrNode -> getOpcode ( ) ; if ( opcode == <STR_LIT> ) { SDValue OP1 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDValue OP2 = LDAddrNode -> getOperand ( <NUM_LIT> ) ; SDNode * OP1N = OP1 . getNode ( ) ; if ( OP1N -> getOpcode ( ) <= <STR_LIT> || OP1N -> getNumOperands ( ) == <NUM_LIT> ) continue ; DEBUG ( dbgs ( ) << <STR_LIT> ; LD -> dump ( ) ; dbgs ( ) << '\n' ) ; const GlobalAddressSDNode * GADN = dyn_cast < GlobalAddressSDNode > ( OP1N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ;

const ConstantSDNode * CDN = dyn_cast < ConstantSDNode > ( OP2 . getNode ( ) ) ;