<s> assert ( Offset > <NUM_LIT> && <STR_LIT> ) ; unsigned Opcode ; unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( DstReg != <STR_LIT> && <STR_LIT> ) ; foldFrameOffset ( * std :: next ( II ) , Offset , DstReg ) ; switch ( DstReg ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { if ( isUInt < <NUM_LIT> > ( Offset ) ) { Opcode = <STR_LIT> ; break ; } } default : { Opcode = <STR_LIT> ; Offset = - Offset ; break ; } } MachineInstr * New = BuildMI ( MBB , std :: next ( II ) , dl , TII . get ( Opcode ) , DstReg ) . addReg ( DstReg , RegState :: Kill ) . addImm ( Offset ) ; New -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; return ; } if ( Offset >= <NUM_LIT> ) { unsigned AddOpc = <STR_LIT> , SubOpc = <STR_LIT> ; int AddOffset = Offset - <NUM_LIT> + <NUM_LIT> ; if ( ( Offset - <NUM_LIT> + <NUM_LIT> ) > <NUM_LIT> ) { AddOpc = <STR_LIT> ; SubOpc = <STR_LIT> ; AddOffset = - AddOffset ; } BuildMI ( MBB , II , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( <NUM_LIT> ) ; MachineInstr * New = BuildMI ( MBB , II , dl , TII . get ( AddOpc ) , <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) . addImm ( AddOffset ) ; New -> getOperand ( <NUM_LIT> ) . setIsDead ( ) ; BuildMI ( MBB , std :: next ( II ) , dl , TII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; New = BuildMI ( MBB , std :: next ( II ) , dl , TII . get ( SubOpc ) , <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) . addImm ( Offset - <NUM_LIT> + <NUM_LIT> ) ; Offset = <NUM_LIT> ;


<s> int Opcode = MI . getOpcode ( ) ; if ( ( Opcode != <STR_LIT> ) && ( Opcode != <STR_LIT> ) ) { return ; } if ( DstReg != MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) { return ; } switch ( Opcode ) { case <STR_LIT> : Offset += - MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; break ; case <STR_LIT> :

Offset += MI . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> CallingConv :: ID CC = MF -> getFunction ( ) -> getCallingConv ( ) ; return ( ( CC == CallingConv :: <ISA_LIT>_INTR || CC == CallingConv :: <ISA_LIT>_SIGNAL ) ? CSR_Interrupts_SaveList : CSR_Normal_SaveList ) ;


<s> const uint16_t * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const {

CallingConv :: ID CC = MF -> getFunction ( ) -> getCallingConv ( ) ;


<s> return ( ( CC == CallingConv :: <ISA_LIT>_INTR || CC == CallingConv :: <ISA_LIT>_SIGNAL ) ? CSR_Interrupts_RegMask : CSR_Normal_RegMask ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; if ( TFI -> hasFP ( MF ) ) {


<s> if ( RC -> hasType ( <STR_LIT> ) ) { return & <STR_LIT> ; } if ( RC -> hasType ( <STR_LIT> ) ) { return & <STR_LIT> ;


<s> if ( RC -> hasType ( <STR_LIT> ) ) { return & <STR_LIT> ; } llvm_unreachable ( <STR_LIT> ) ;


<s> const TargetRegisterClass * <ISA_LIT>RegisterInfo :: getPointerRegClass ( const MachineFunction & MF , unsigned Kind ) const {


<s> BitVector Reserved ( getNumRegs ( ) ) ; const <ISA_LIT>TargetMachine & TM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; const TargetFrameLowering * TFI = TM . getSubtargetImpl ( ) -> getFrameLowering ( ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) { Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;


<s> bool <ISA_LIT>RelaxMem :: runOnInstruction ( Block & MBB , BlockIt MBBI ) { MachineInstr & MI = * MBBI ; int Opcode = MBBI -> getOpcode ( ) ;

case Op : \ return relax < Op > ( MBB , MI ) switch ( Opcode ) {


<s> bool <ISA_LIT>RelaxMem :: runOnInstruction ( Block & MBB , BlockIt MBBI ) { MachineInstr & MI = * MBBI ; int Opcode = MBBI -> getOpcode ( ) ; case Op : \ return relax < Op > ( MBB , MI ) switch ( Opcode ) { RELAX ( <STR_LIT> ) ; } return false ;


<s> <ISA_LIT>RelaxMem ( ) : MachineFunctionPass ( ID ) {

initialize<ISA_LIT>RelaxMemPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> FunctionPass * create<ISA_LIT>RelaxMemPass ( ) { return new <ISA_LIT>RelaxMem ( ) ;


<s> StringRef getPassName ( ) const override {


<s> StringRef getPassName ( ) const override { return <ISA_LIT>_RELAX_MEM_OPS_NAME ;


<s> bool <ISA_LIT>RelaxMem :: runOnBasicBlock ( Block & MBB ) { bool Modified = false ; BlockIt MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { BlockIt NMBBI = std :: next ( MBBI ) ; Modified |= runOnInstruction ( MBB , MBBI ) ;


<s> MachineInstr & MI = * MBBI ; int Opcode = MBBI -> getOpcode ( ) ; case Op : \ return relax < Op > ( MBB , MI ) switch ( Opcode ) { RELAX ( <STR_LIT> ) ; }


<s> bool <ISA_LIT>RelaxMem :: runOnMachineFunction ( MachineFunction & MF ) { bool Modified = false ; const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ;


<s> <ISA_LIT>ShiftExpand ( ) : FunctionPass ( ID ) {


<s> return new <ISA_LIT>ShiftExpand ( ) ;


<s> case Instruction :: Shl : ValueShifted = Builder . CreateShl ( ValuePHI , ConstantInt :: get ( Int32Ty , <NUM_LIT> ) ) ; break ; case Instruction :: LShr : ValueShifted = Builder . CreateLShr ( ValuePHI , ConstantInt :: get ( Int32Ty , <NUM_LIT> ) ) ; break ; case Instruction :: AShr : ValueShifted = Builder . CreateAShr ( ValuePHI , ConstantInt :: get ( Int32Ty , <NUM_LIT> ) ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } ValuePHI -> addIncoming ( ValueShifted , LoopBB ) ; Value * Cmp2 = Builder . CreateICmpEQ ( ShiftAmountSub , Int8Zero ) ; Builder . CreateCondBr ( Cmp2 , EndBB , LoopBB ) ; Builder . SetInsertPoint ( BI ) ; PHINode * Result = Builder . CreatePHI ( Int32Ty , <NUM_LIT> ) ;

Result -> addIncoming ( BI -> getOperand ( <NUM_LIT> ) , BB ) ;


<s> auto & Ctx = F . getContext ( ) ; for ( Instruction & I : instructions ( F ) ) { if ( ! I . isShift ( ) ) continue ; if ( I . getType ( ) != Type :: getInt32Ty ( Ctx ) ) continue ; if ( isa < ConstantInt > ( I . getOperand ( <NUM_LIT> ) ) ) continue ; ShiftInsts . push_back ( cast < BinaryOperator > ( & I ) ) ; } for ( auto * I : ShiftInsts ) { expand ( I ) ; } return ShiftInsts . size ( ) > <NUM_LIT> ;


<s> if ( ! I . isShift ( ) ) continue ; if ( I . getType ( ) != Type :: getInt32Ty ( Ctx ) ) continue ; if ( isa < ConstantInt > ( I . getOperand ( <NUM_LIT> ) ) ) continue ; ShiftInsts . push_back ( cast < BinaryOperator > ( & I ) ) ; } for ( auto * I : ShiftInsts ) { expand ( I ) ; }

return ShiftInsts . size ( ) > <NUM_LIT> ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM , initializeSubtargetDependencies ( CPU , FS , TM ) ) , TSInfo ( ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , ELFArch ( false ) , m_FeatureSetDummy ( false ) {


<s> ParseSubtargetFeatures ( CPU , FS ) ; return * this ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , CPU , FS ) , ELFArch ( <NUM_LIT> ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , m_hasMemMappedGPR ( false ) , m_FeatureSetDummy ( false ) , TLInfo ( TM , initializeSubtargetDependencies ( CPU , FS , TM ) ) {

ParseSubtargetFeatures ( CPU , CPU , FS ) ;


<s> int getIORegEIND ( void ) const { return hasEIJMPCALL ( ) ? <NUM_LIT> : - <NUM_LIT> ;


return hasSmallStack ( ) ? - <NUM_LIT> : <NUM_LIT> ;


<s> return hasSmallStack ( ) ? - <NUM_LIT> : <NUM_LIT> ;


<s> return hasTinyEncoding ( ) ? <NUM_LIT> : <NUM_LIT> ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , ELFArch ( <NUM_LIT> ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , m_hasMemMappedGPR ( false ) , m_FeatureSetDummy ( false ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM , initializeSubtargetDependencies ( CPU , FS , TM ) ) , TSInfo ( ) { ParseSubtargetFeatures ( CPU , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM ) , TSInfo ( ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , ELFArch ( false ) , m_FeatureSetDummy ( false ) { ParseSubtargetFeatures ( CPU , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , ELFArch ( <NUM_LIT> ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , m_FeatureSetDummy ( false ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM , initializeSubtargetDependencies ( CPU , FS , TM ) ) , TSInfo ( ) { ParseSubtargetFeatures ( CPU , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , CPU , FS ) , ELFArch ( <NUM_LIT> ) , m_hasSRAM ( false ) , m_hasJMPCALL ( false ) , m_hasIJMPCALL ( false ) , m_hasEIJMPCALL ( false ) , m_hasADDSUBIW ( false ) , m_hasSmallStack ( false ) , m_hasMOVW ( false ) , m_hasLPM ( false ) , m_hasLPMX ( false ) , m_hasELPM ( false ) , m_hasELPMX ( false ) , m_hasSPM ( false ) , m_hasSPMX ( false ) , m_hasDES ( false ) , m_supportsRMW ( false ) , m_supportsMultiplication ( false ) , m_hasBREAK ( false ) , m_hasTinyEncoding ( false ) , m_hasMemMappedGPR ( false ) , m_FeatureSetDummy ( false ) , InstrInfo ( ) , FrameLowering ( ) , TLInfo ( TM , initializeSubtargetDependencies ( CPU , FS , TM ) ) , TSInfo ( ) {


<s> const TargetFrameLowering * getFrameLowering ( ) const override {


<s> return hasMemMappedGPR ( ) ? <NUM_LIT> : <NUM_LIT> ;


<s> const <ISA_LIT>RegisterInfo * getRegisterInfo ( ) const override { return & InstrInfo . getRegisterInfo ( ) ;


<s> const <ISA_LIT>SelectionDAGInfo * getSelectionDAGInfo ( ) const override {


<s> bool hasDES ( ) const { return m_hasDES ;


<s> bool hasEIJMPCALL ( ) const { return m_hasEIJMPCALL ;


<s> bool hasIJMPCALL ( ) const { return m_hasIJMPCALL ;


<s> bool hasJMPCALL ( ) const { return m_hasJMPCALL ;


<s> bool hasMemMappedGPR ( ) const { return m_hasMemMappedGPR ;


<s> bool hasSmallStack ( ) const { return m_hasSmallStack ;


<s> bool hasSPM ( ) const { return m_hasSPM ;


<s> bool hasSRAM ( ) const { return m_hasSRAM ;


<s> ParseSubtargetFeatures ( CPU , CPU , FS ) ; return * this ;


<s> bool supportsMultiplication ( ) const {


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) { llvm :: RegisterTarget < llvm :: Triple :: avr > X ( llvm :: The<ISA_LIT>Target , <STR_LIT> , <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) {


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) {

llvm :: RegisterTarget < llvm :: Triple :: avr > X ( llvm :: getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> llvm :: RegisterTarget < llvm :: Triple :: avr > X ( llvm :: getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : LLVMTargetMachine ( T , <ISA_LIT>DataLayout , TT , getCPU ( CPU ) , FS , Options , getEffectiveRelocModel ( RM ) , getEffectiveCodeModel ( CM , CodeModel :: Small ) , OL ) , SubTarget ( TT , std :: string ( getCPU ( CPU ) ) , std :: string ( FS ) , * this ) {

this -> TLOF = std :: make_unique < <ISA_LIT>TargetObjectFile > ( ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < Reloc :: Model > RM ) {

return RM . getValueOr ( Reloc :: Static ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < Reloc :: Model > RM ) { return RM . getValueOr ( Reloc :: Static ) ;


<s> auto & PR = * PassRegistry :: getPassRegistry ( ) ; initialize<ISA_LIT>ExpandPseudoPass ( PR ) ;

initialize<ISA_LIT>RelaxMemPass ( PR ) ;


<s> addPass ( create<ISA_LIT>ShiftExpandPass ( ) ) ; TargetPassConfig :: addIRPasses ( ) ;


<s> TargetPassConfig :: addIRPasses ( ) ;


<s> void <ISA_LIT>PassConfig :: addPreSched2 ( ) { addPass ( create<ISA_LIT>ExpandPseudoPass ( ) ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;

auto & PR = * PassRegistry :: getPassRegistry ( ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ; auto & PR = * PassRegistry :: getPassRegistry ( ) ; initialize<ISA_LIT>ExpandPseudoPass ( PR ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , <ISA_LIT>DataLayout , TT , getCPU ( CPU ) , FS , Options , getEffectiveRelocModel ( RM ) , CM , OL ) , SubTarget ( TT , getCPU ( CPU ) , FS , * this ) { this -> TLOF = make_unique < <ISA_LIT>TargetObjectFile > ( ) ; initAsmInfo ( ) ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) { addPass ( new TestMFP ( ) ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PM ) {

return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> for ( MachineInstr & mi : mbb ) { dbgs ( ) << <STR_LIT> << TII -> getName ( mi . getOpcode ( ) ) << <STR_LIT> ;


<s> TestMFP ( ) : MachineFunctionPass ( ID ) {


<s> void LLVMInitialize<ISA_LIT>Target ( ) {


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) {


<s> void <ISA_LIT>PassConfig :: addPreRegAlloc ( ) {


<s> void <ISA_LIT>PassConfig :: addPreSched2 ( ) {


RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ;


<s> void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ;


<s> addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ; addPass ( create<ISA_LIT>FrameAnalyzerPass ( ) ) ; return false ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;

addPass ( create<ISA_LIT>FrameAnalyzerPass ( ) ) ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) { addPass ( & BranchRelaxationPassID ) ;


addPass ( create<ISA_LIT>DynAllocaSRPass ( ) ) ;


<s> addPass ( create<ISA_LIT>RelaxMemPass ( ) ) ;

addPass ( create<ISA_LIT>ExpandPseudoPass ( ) ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine & TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


return new <ISA_LIT>PassConfig ( * this , PM ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const { return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const {

return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> if ( CPU . empty ( ) || CPU == <STR_LIT> ) { return <STR_LIT> ; }


<s> static StringRef getCPU ( StringRef CPU ) { if ( CPU . empty ( ) || CPU == <STR_LIT> ) {


<s> static CodeModel :: Model getEffectiveCodeModel ( Optional < CodeModel :: Model > CM ) { if ( CM ) return * CM ; return CodeModel :: Small ;


<s> return RM . hasValue ( ) ? * RM : Reloc :: Static ;


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < Reloc :: Model > RM ) { return RM . hasValue ( ) ? * RM : Reloc :: Static ;


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override { return this -> TLOF . get ( ) ;


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override {


<s> const <ISA_LIT>Subtarget * <ISA_LIT>TargetMachine :: getSubtargetImpl ( const Function & ) const { return & SubTarget ;


<s> bool isMachineVerifierClean ( ) const override { return false ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ; auto & PR = * PassRegistry :: getPassRegistry ( ) ;

initialize<ISA_LIT>ExpandPseudoPass ( PR ) ;


<s> Progmem1DataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ; Progmem2DataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ; Progmem3DataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ; Progmem4DataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ;

Progmem5DataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ;


<s> return Base :: SelectSectionForGlobal ( GO , Kind , TM ) ; } if ( ! <ISA_LIT>TM . getSubtargetImpl ( ) -> hasELPM ( ) && <STR_LIT> ( GO ) != <STR_LIT> ) { getContext ( ) . reportError ( SMLoc ( ) , <STR_LIT> <STR_LIT> ) ; return ProgmemDataSection ; } switch ( <STR_LIT> ( GO ) ) { case <STR_LIT> : return ProgmemDataSection ; case <STR_LIT> : return Progmem1DataSection ; case <STR_LIT> : return Progmem2DataSection ; case <STR_LIT> : return Progmem3DataSection ; case <STR_LIT> : return Progmem4DataSection ; case <STR_LIT> : return Progmem5DataSection ; default : llvm_unreachable ( <STR_LIT> ) ; } }


<s> if ( ! <ISA_LIT>TM . getSubtargetImpl ( ) -> hasLPM ( ) ) { getContext ( ) . reportError ( SMLoc ( ) , <STR_LIT> ) ; return Base :: SelectSectionForGlobal ( GO , Kind , TM ) ; } if ( ! <ISA_LIT>TM . getSubtargetImpl ( ) -> hasELPM ( ) && <STR_LIT> ( GO ) != <STR_LIT> ) { getContext ( ) . reportError ( SMLoc ( ) , <STR_LIT> <STR_LIT> ) ; return ProgmemDataSection ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalObject * GO , SectionKind Kind , const TargetMachine & TM ) const {

if ( <STR_LIT> ( GO ) && ! GO -> hasSection ( ) && Kind . isReadOnly ( ) ) return ProgmemDataSection ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler & Mang , const TargetMachine & TM ) const { if ( <STR_LIT> ( GV ) && ! GV -> hasSection ( ) ) return ProgmemDataSection ;

return Base :: SelectSectionForGlobal ( GV , Kind , Mang , TM ) ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler & Mang , const TargetMachine & TM ) const {

if ( <STR_LIT> ( GV ) && ! GV -> hasSection ( ) ) return ProgmemDataSection ;


<s> ProgmemDataSection = Ctx . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC ) ;


<s> if ( <STR_LIT> ( GO ) && ! GO -> hasSection ( ) ) return ProgmemDataSection ; return Base :: SelectSectionForGlobal ( GO , Kind , TM ) ;


<s> MCSymbol * DoCopyData = Context . getOrCreateSymbol ( <STR_LIT> ) ; MCSymbol * DoClearBss = Context . getOrCreateSymbol ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ;

OS . EmitSymbolAttribute ( DoCopyData , MCSA_Global ) ;


<s> OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . EmitSymbolAttribute ( DoCopyData , MCSA_Global ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ;

OS . EmitSymbolAttribute ( DoClearBss , MCSA_Global ) ;


<s> MCSymbol * DoClearBss = Context . getOrCreateSymbol ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ;

OS . emitSymbolAttribute ( DoCopyData , MCSA_Global ) ;


<s> MCStreamer & OS = getStreamer ( ) ; MCContext & Context = OS . getContext ( ) ; MCSymbol * DoCopyData = Context . getOrCreateSymbol ( <STR_LIT> ) ; MCSymbol * DoClearBss = Context . getOrCreateSymbol ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitSymbolAttribute ( DoCopyData , MCSA_Global ) ; OS . emitRawComment ( <STR_LIT> ) ; OS . emitRawComment ( <STR_LIT> ) ;

OS . emitSymbolAttribute ( DoClearBss , MCSA_Global ) ;


<s> <ISA_LIT>TargetAsmStreamer :: <ISA_LIT>TargetAsmStreamer ( MCStreamer & S ) : <ISA_LIT>TargetStreamer ( S ) {


<s> <ISA_LIT>TargetStreamer :: <ISA_LIT>TargetStreamer ( MCStreamer & S ) : MCTargetStreamer ( S ) {


<s> AddressSpace getAddressSpace ( T * V ) { auto * PT = cast < PointerType > ( V -> getType ( ) ) ; assert ( PT != nullptr && <STR_LIT> ) ; unsigned AS = PT -> getAddressSpace ( ) ; if ( AS < NumAddrSpaces ) return static_cast < AddressSpace > ( AS ) ; return NumAddrSpaces ;


<s> unsigned AS = PT -> getAddressSpace ( ) ; if ( AS < NumAddrSpaces ) return static_cast < AddressSpace > ( AS ) ;


<s> inline int getProgramMemoryBank ( MemSDNode const * N ) { auto * V = N -> getMemOperand ( ) -> getValue ( ) ;

if ( V == nullptr || ! isProgramMemoryAddress ( V ) ) return - <NUM_LIT> ;


<s> assert ( PT != nullptr && <STR_LIT> ) ; return PT -> getAddressSpace ( ) == ProgramMemory || PT -> getAddressSpace ( ) == ProgramMemory1 || PT -> getAddressSpace ( ) == ProgramMemory2 || PT -> getAddressSpace ( ) == ProgramMemory3 || PT -> getAddressSpace ( ) == ProgramMemory4 || PT -> getAddressSpace ( ) == ProgramMemory5 ;