<s> if ( PairedPhys && is_contained ( Order , PairedPhys ) ) Hints . push_back ( PairedPhys ) ; for ( MCPhysReg Reg : Order ) { if ( Reg == PairedPhys || ( getEncodingValue ( Reg ) & <NUM_LIT> ) != Odd ) continue ; MCPhysReg Paired = getPairedGPR ( Reg , ! Odd , this ) ; if ( ! Paired || MRI . isReserved ( Paired ) ) continue ; Hints . push_back ( Reg ) ; }


<s> if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII , this ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; Register PredReg = ( PIdx == - <NUM_LIT> ) ? Register ( ) : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; const MCInstrDesc & MCID = MI . getDesc ( ) ; const TargetRegisterClass * RegClass = TII . getRegClass ( MCID , FIOperandNum , this , * MI . getParent ( ) -> getParent ( ) ) ; if ( Offset == <NUM_LIT> && ( Register :: isVirtualRegister ( FrameReg ) || RegClass -> contains ( FrameReg ) ) ) MI . getOperand ( FIOperandNum ) . ChangeToRegister ( FrameReg , false , false , false ) ; else { ScratchReg = MF . getRegInfo ( ) . createVirtualRegister ( RegClass ) ; if ( ! AFI -> isThumbFunction ( ) ) emit<ISA_LIT>RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; emitT2RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ;


<s> unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) . add ( predOps ( Pred , PredReg ) ) . setMIFlags ( MIFlags ) ;


<s> bool enableMultipleCopyHints ( ) const override {


<s> default : TargetRegisterInfo :: getRegAllocationHints ( VirtReg , Order , Hints , MF , VRM ) ; return false ; } unsigned Paired = Hint . second ; if ( Paired == <NUM_LIT> ) return false ; unsigned PairedPhys = <NUM_LIT> ; if ( Register :: isPhysicalRegister ( Paired ) ) { PairedPhys = Paired ; } else if ( VRM && VRM -> hasPhys ( Paired ) ) { PairedPhys = getPairedGPR ( VRM -> getPhys ( Paired ) , Odd , this ) ; } if ( PairedPhys && is_contained ( Order , PairedPhys ) ) Hints . push_back ( PairedPhys ) ; for ( unsigned Reg : Order ) { if ( Reg == PairedPhys || ( getEncodingValue ( Reg ) & <NUM_LIT> ) != Odd ) continue ;

unsigned Paired = getPairedGPR ( Reg , ! Odd , this ) ;


<s> unsigned Odd ; switch ( Hint . first ) { case <STR_LIT> : Odd = <NUM_LIT> ; break ; case <STR_LIT> : Odd = <NUM_LIT> ; break ; default : TargetRegisterInfo :: getRegAllocationHints ( VirtReg , Order , Hints , MF , VRM ) ; return false ; } unsigned Paired = Hint . second ; if ( Paired == <NUM_LIT> ) return false ; unsigned PairedPhys = <NUM_LIT> ; if ( Register :: isPhysicalRegister ( Paired ) ) { PairedPhys = Paired ; } else if ( VRM && VRM -> hasPhys ( Paired ) ) { PairedPhys = getPairedGPR ( VRM -> getPhys ( Paired ) , Odd , this ) ; } if ( PairedPhys && is_contained ( Order , PairedPhys ) ) Hints . push_back ( PairedPhys ) ; for ( unsigned Reg : Order ) { if ( Reg == PairedPhys || ( getEncodingValue ( Reg ) & <NUM_LIT> ) != Odd ) continue ; unsigned Paired = getPairedGPR ( Reg , ! Odd , this ) ; if ( ! Paired || MRI . isReserved ( Paired ) ) continue ; Hints . push_back ( Reg ) ; }


<s> markSuperRegs ( Reserved , <STR_LIT> ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) || STI . isTargetDarwin ( ) ) markSuperRegs ( Reserved , getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) markSuperRegs ( Reserved , BasePtr ) ; if ( STI . isR9Reserved ( ) ) markSuperRegs ( Reserved , <STR_LIT> ) ; if ( ! STI . hasD32 ( ) ) { static_assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> , <STR_LIT> ) ; for ( unsigned R = <NUM_LIT> ; R < <NUM_LIT> ; ++ R ) markSuperRegs ( Reserved , <STR_LIT> + R ) ; } const TargetRegisterClass & RC = <STR_LIT> ; for ( unsigned Reg : RC ) for ( MCSubRegIterator SI ( Reg , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) markSuperRegs ( Reserved , Reg ) ; markSuperRegs ( Reserved , <STR_LIT> ) ;

assert ( checkAllSuperRegsMarked ( Reserved ) ) ;


<s> for ( ; ! MI -> getOperand ( i ) . isFI ( ) ; ++ i ) assert ( i + <NUM_LIT> < MI -> getNumOperands ( ) && <STR_LIT> ) ; if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) return Offset == <NUM_LIT> ; unsigned NumBits = <NUM_LIT> ; unsigned Scale = <NUM_LIT> ; bool isSigned = true ; switch ( AddrMode ) { case <STR_LIT> : case <STR_LIT> : Scale = <NUM_LIT> ; if ( Offset < <NUM_LIT> ) { NumBits = <NUM_LIT> ; Offset = - Offset ; } else { NumBits = <NUM_LIT> ; } break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = ( BaseReg == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } Offset += getFrameIndexInstrOffset ( MI , i ) ;

if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ;


<s> break ; case <STR_LIT> : NumBits = ( BaseReg == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } Offset += getFrameIndexInstrOffset ( MI , i ) ; if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ; if ( isSigned && Offset < <NUM_LIT> ) Offset = - Offset ; unsigned Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ;

if ( ( unsigned ) Offset <= Mask * Scale ) return true ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; const <ISA_LIT>BaseInstrInfo & TII = * static_cast < const <ISA_LIT>BaseInstrInfo * > ( MF . getSubtarget ( ) . getInstrInfo ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int Off = Offset ; unsigned i = <NUM_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ;

assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ;


<s> const <ISA_LIT>BaseInstrInfo & TII = * static_cast < const <ISA_LIT>BaseInstrInfo * > ( MF . getSubtarget ( ) . getInstrInfo ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int Off = Offset ; unsigned i = <NUM_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , BaseReg , Off , TII ) ; else {

assert ( AFI -> isThumb2Function ( ) ) ;


<s> std :: pair < unsigned , unsigned > Hint = MRI -> getRegAllocationHint ( Reg ) ; if ( ( Hint . first == ( unsigned ) <STR_LIT> || Hint . first == ( unsigned ) <STR_LIT> ) && Register :: isVirtualRegister ( Hint . second ) ) {


<s> <ISA_LIT>BaseRegisterInfo :: <ISA_LIT>BaseRegisterInfo ( const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) , STI ( sti ) , FramePtr ( ( STI . isTargetDarwin ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) , BasePtr ( <STR_LIT> ) {


<s> if ( MF ) { const Function * F = MF -> getFunction ( ) ; ghcCall = ( F ? F -> getCallingConv ( ) == CallingConv :: GHC : false ) ; } if ( ghcCall ) return CSR_NoRegs_SaveList ;

else return ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_SaveList : CSR_AAPCS_SaveList ;


<s> unsigned <ISA_LIT>BaseRegisterInfo :: getEHExceptionRegister ( ) const {


<s> if ( CC == CallingConv :: GHC ) return NULL ;

return ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_ThisReturn_RegMask : CSR_AAPCS_ThisReturn_RegMask ;


<s> if ( CC == CallingConv :: GHC ) return NULL ; return ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_ThisReturn_RegMask : CSR_AAPCS_ThisReturn_RegMask ;


<s> const <ISA_LIT>BaseInstrInfo & TII = * static_cast < const <ISA_LIT>BaseInstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int Off = Offset ; unsigned i = <NUM_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , BaseReg , Off , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , BaseReg , Off , TII ) ; } assert ( Done && <STR_LIT> ) ; ( void ) Done ;


<s> <ISA_LIT>BaseRegisterInfo :: <ISA_LIT>BaseRegisterInfo ( const <ISA_LIT>BaseInstrInfo & tii , const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , TII ( tii ) , STI ( sti ) , FramePtr ( ( STI . isTargetDarwin ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) , BasePtr ( <STR_LIT> ) {


<s> } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) {


<s> cannotEliminateFrame ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; if ( DisableFramePointerElim ( MF ) && MFI -> adjustsStack ( ) ) return true ;

return MFI -> hasVarSizedObjects ( ) || MFI -> isFrameAddressTaken ( ) || needsStackRealignment ( MF ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: cannotEliminateFrame ( const MachineFunction & MF ) const {

const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return ( RealignStack && ( ! MFI -> hasVarSizedObjects ( ) || EnableBasePointer ) ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: canRealignStack ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return ( RealignStack && ( ! MFI -> hasVarSizedObjects ( ) || EnableBasePointer ) ) ;


<s> Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; bool is<ISA_LIT> = ! AFI -> isThumbFunction ( ) ; unsigned Opc = Old -> getOpcode ( ) ; int PIdx = Old -> findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) Old -> getOperand ( PIdx ) . getImm ( ) ; if ( Opc == <STR_LIT> || Opc == <STR_LIT> ) { unsigned PredReg = Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ; emitSPUpdate ( is<ISA_LIT> , MBB , I , dl , TII , - Amount , Pred , PredReg ) ;


<s> Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; bool is<ISA_LIT> = ! AFI -> isThumbFunction ( ) ; unsigned Opc = Old -> getOpcode ( ) ; int PIdx = Old -> findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) Old -> getOperand ( PIdx ) . getImm ( ) ; if ( Opc == <STR_LIT> || Opc == <STR_LIT> ) { unsigned PredReg = Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ; emitSPUpdate ( is<ISA_LIT> , MBB , I , dl , TII , - Amount , Pred , PredReg ) ; } else { unsigned PredReg = Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ;

assert ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ;


<s> void <ISA_LIT>BaseRegisterInfo :: eliminateFrameIndex ( MachineBasicBlock :: iterator II , int SPAdj , RegScavenger * RS ) const { unsigned i = <NUM_LIT> ; MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; const <ISA_LIT>FrameLowering * TFI = static_cast < const <ISA_LIT>FrameLowering * > ( MF . getTarget ( ) . getFrameLowering ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned FrameReg ; int Offset = TFI -> ResolveFrameIndexReference ( MF , FrameIndex , FrameReg , SPAdj ) ; if ( MI . isDebugValue ( ) ) { MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ; return ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; if ( Offset == <NUM_LIT> ) MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false , false , false ) ;


<s> const Constant * C = ConstantInt :: get ( Type :: getInt32Ty ( MF . getFunction ( ) -> getContext ( ) ) , Val ) ; unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) . setMIFlags ( MIFlags ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) . setMIFlags ( MIFlags ) ;


return STI . isTargetDarwin ( ) ? DarwinCalleeSavedRegs : CalleeSavedRegs ;


<s> const TargetRegisterClass * <ISA_LIT>BaseRegisterInfo :: getCrossCopyRegClass ( const TargetRegisterClass * RC ) const { if ( RC == & <STR_LIT> ) return <NUM_LIT> ;


<s> llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT> ;


<s> unsigned <ISA_LIT>BaseRegisterInfo :: getEHHandlerRegister ( ) const {


<s> InstrOffs = <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) ; if ( <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ; break ; } case <STR_LIT> : { ImmIdx = Idx + <NUM_LIT> ; InstrOffs = <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) ; if ( <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ; break ; } case <STR_LIT> : {


<s> case <STR_LIT> : InstrOffs = MI -> getOperand ( Idx + <NUM_LIT> ) . getImm ( ) ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : { const MachineOperand & OffOp = MI -> getOperand ( Idx + <NUM_LIT> ) ; InstrOffs = <STR_LIT> ( OffOp . getImm ( ) ) ; if ( <STR_LIT> ( OffOp . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ; Scale = <NUM_LIT> ; break ; } case <STR_LIT> : { ImmIdx = Idx + <NUM_LIT> ; InstrOffs = <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) ; if ( <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ;


<s> unsigned <ISA_LIT>BaseRegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; if ( TFI -> hasFP ( MF ) ) return FramePtr ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { if ( A -> getSize ( ) == <NUM_LIT> ) { if ( B == & <STR_LIT> ) return & <STR_LIT> ; assert ( B == & <STR_LIT> && <STR_LIT> ) ; if ( A == & <STR_LIT> ) return A ; return & <STR_LIT> ; } if ( A -> getSize ( ) == <NUM_LIT> ) { if ( B == & <STR_LIT> ) return & <STR_LIT> ; return & <STR_LIT> ; } if ( A -> getSize ( ) == <NUM_LIT> ) { if ( B == & <STR_LIT> ) return <NUM_LIT> ; return & <STR_LIT> ; } assert ( A -> getSize ( ) == <NUM_LIT> && <STR_LIT> ) ; return <NUM_LIT> ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { if ( A -> getSize ( ) == <NUM_LIT> ) { if ( B == & <STR_LIT> ) return & <STR_LIT> ; if ( B == & <STR_LIT> ) return <NUM_LIT> ; return A ; } if ( A -> getSize ( ) == <NUM_LIT> ) { if ( B == & <STR_LIT> ) return & <STR_LIT> ; if ( B == & <STR_LIT> ) return <NUM_LIT> ; return A ; } assert ( A -> getSize ( ) == <NUM_LIT> && <STR_LIT> ) ; if ( B != & <STR_LIT> ) return <NUM_LIT> ; return A ; }


<s> const TargetRegisterClass * <ISA_LIT>BaseRegisterInfo :: getPointerRegClass ( unsigned Kind ) const {


<s> <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd5 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPREven6 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd6 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; if ( RC != <STR_LIT> && RC != <STR_LIT> ) return RC -> getRawAllocationOrder ( MF ) ; if ( HintType == <STR_LIT> ) { if ( isPhysicalRegister ( HintReg ) && getRegisterPairEven ( HintReg , MF ) == <NUM_LIT> ) return RC -> getRawAllocationOrder ( MF ) ; if ( ! TFI -> hasFP ( MF ) ) { if ( ! STI . isR9Reserved ( ) ) return makeArrayRef ( GPREven1 ) ; else return makeArrayRef ( GPREven4 ) ; } else if ( FramePtr == <STR_LIT> ) { if ( ! STI . isR9Reserved ( ) ) return makeArrayRef ( GPREven2 ) ; else return makeArrayRef ( GPREven5 ) ; } else { if ( ! STI . isR9Reserved ( ) ) return makeArrayRef ( GPREven3 ) ; else return makeArrayRef ( GPREven6 ) ; } } else if ( HintType == <STR_LIT> ) { if ( isPhysicalRegister ( HintReg ) && getRegisterPairOdd ( HintReg , MF ) == <NUM_LIT> ) return RC -> getRawAllocationOrder ( MF ) ; if ( ! TFI -> hasFP ( MF ) ) { if ( ! STI . isR9Reserved ( ) ) return makeArrayRef ( GPROdd1 ) ; else return makeArrayRef ( GPROdd4 ) ;


<s> return ( isReservedReg ( MF , <STR_LIT> ) || isReservedReg ( MF , <STR_LIT> ) ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return ( isReservedReg ( MF , <STR_LIT> ) || isReservedReg ( MF , <STR_LIT> ) ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) Reserved . set ( <STR_LIT> + i ) ; }


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( FramePtr ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ;

if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) {


<s> Scale = <NUM_LIT> ; if ( Offset < <NUM_LIT> ) { NumBits = <NUM_LIT> ; Offset = - Offset ; } else { NumBits = <NUM_LIT> ; } break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : return true ; case <STR_LIT> : if ( hasBasePointer ( MF ) ) return true ; break ; case <STR_LIT> : case <STR_LIT> : if ( FramePtr == Reg && TFI -> hasFP ( MF ) ) return true ;


<s> default : break ; case <STR_LIT> : case <STR_LIT> : return true ; case <STR_LIT> : if ( hasBasePointer ( MF ) ) return true ; break ; case <STR_LIT> : case <STR_LIT> : if ( FramePtr == Reg && TFI -> hasFP ( MF ) ) return true ; break ; case <STR_LIT> : return STI . isR9Reserved ( ) ;


<s> MachineRegisterInfo & MRI = MBB -> getParent ( ) -> getRegInfo ( ) ; MRI . constrainRegClass ( BaseReg , TII . getRegClass ( MCID , <NUM_LIT> , this ) ) ; MachineInstrBuilder MIB = AddDefaultPred ( BuildMI ( * MBB , Ins , DL , MCID , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ) ; if ( ! AFI -> isThumb1OnlyFunction ( ) ) AddDefaultCC ( MIB ) ;


<s> materializeFrameBaseRegister ( MachineBasicBlock * MBB , unsigned BaseReg , int FrameIdx , int64_t Offset ) const { <ISA_LIT>FunctionInfo * AFI = MBB -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned ADDriOpc = ! AFI -> isThumbFunction ( ) ? <STR_LIT> : ( AFI -> isThumb1OnlyFunction ( ) ? <STR_LIT> : <STR_LIT> ) ; MachineBasicBlock :: iterator Ins = MBB -> begin ( ) ; DebugLoc DL ; if ( Ins != MBB -> end ( ) ) DL = Ins -> getDebugLoc ( ) ; const MCInstrDesc & MCID = TII . get ( ADDriOpc ) ; MachineRegisterInfo & MRI = MBB -> getParent ( ) -> getRegInfo ( ) ; MRI . constrainRegClass ( BaseReg , TII . getRegClass ( MCID , <NUM_LIT> , this ) ) ;

MachineInstrBuilder MIB = AddDefaultPred ( BuildMI ( * MBB , Ins , DL , MCID , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ) ;


<s> if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset = - Offset ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ; unsigned StackAlign = TFI -> getStackAlignment ( ) ; if ( TFI -> hasFP ( MF ) && ! ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) && canRealignStack ( MF ) ) ) { if ( isFrameOffsetLegal ( MI , FPOffset ) ) return false ; } if ( ! MFI -> hasVarSizedObjects ( ) && isFrameOffsetLegal ( MI , Offset ) ) return false ; return true ;


<s> const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getTarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) || F -> hasFnAttr ( Attribute :: StackAlignment ) ) ;

return requiresRealignment && canRealignStack ( MF ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: needsStackRealignment ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getTarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) || F -> hasFnAttr ( Attribute :: StackAlignment ) ) ;


<s> ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , BaseReg , Off , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , BaseReg , Off , TII ) ; } assert ( Done && <STR_LIT> ) ; ( void ) Done ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int Off = Offset ; unsigned i = <NUM_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } bool Done = false ;

if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , BaseReg , Off , TII ) ;


<s> else if ( Type == ( unsigned ) <STR_LIT> ) return getRegisterPairOdd ( Reg , MF ) ;

else if ( Type == ( unsigned ) <STR_LIT> ) return getRegisterPairEven ( Reg , MF ) ;


<s> void <ISA_LIT>BaseRegisterInfo :: UpdateRegAllocHint ( unsigned Reg , unsigned NewReg , MachineFunction & MF ) const { MachineRegisterInfo * MRI = & MF . getRegInfo ( ) ; std :: pair < unsigned , unsigned > Hint = MRI -> getRegAllocationHint ( Reg ) ;

if ( ( Hint . first == ( unsigned ) <STR_LIT> || Hint . first == ( unsigned ) <STR_LIT> ) && TargetRegisterInfo :: isVirtualRegister ( Hint . second ) ) {


<s> if ( NoFramePointerElim && MFI -> hasCalls ( ) ) return true ;

return MFI -> hasVarSizedObjects ( ) || MFI -> isFrameAddressTaken ( ) ;


<s> if ( NoFramePointerElim && MFI -> hasCalls ( ) ) return true ; return MFI -> hasVarSizedObjects ( ) || MFI -> isFrameAddressTaken ( ) ;


<s> <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; bool is<ISA_LIT> = ! AFI -> isThumbFunction ( ) ; unsigned Opc = Old -> getOpcode ( ) ; <STR_LIT> Pred = ( <STR_LIT> ) Old -> getOperand ( <NUM_LIT> ) . getImm ( ) ; if ( Opc == <STR_LIT> || Opc == <STR_LIT> ) { unsigned PredReg = Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ; emitSPUpdate ( is<ISA_LIT> , MBB , I , dl , TII , - Amount , Pred , PredReg ) ; } else { unsigned PredReg = Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ;

emitSPUpdate ( is<ISA_LIT> , MBB , I , dl , TII , Amount , Pred , PredReg ) ;


<s> unsigned FrameReg = <STR_LIT> ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) + MFI -> getStackSize ( ) + SPAdj ; if ( AFI -> isGPRCalleeSavedArea1Frame ( FrameIndex ) ) Offset -= AFI -> getGPRCalleeSavedArea1Offset ( ) ; else if ( AFI -> isGPRCalleeSavedArea2Frame ( FrameIndex ) ) Offset -= AFI -> getGPRCalleeSavedArea2Offset ( ) ; else if ( AFI -> isDPRCalleeSavedAreaFrame ( FrameIndex ) ) Offset -= AFI -> getDPRCalleeSavedAreaOffset ( ) ; else if ( hasFP ( MF ) && AFI -> hasStackFrame ( ) ) { assert ( SPAdj == <NUM_LIT> && <STR_LIT> ) ; FrameReg = getFrameRegister ( MF ) ; Offset -= AFI -> getFramePtrSpillOffset ( ) ; } if ( ! AFI -> isThumbFunction ( ) ) Offset = rewrite<ISA_LIT>FrameIndex ( MI , i , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Offset = rewriteT2FrameIndex ( MI , i , FrameReg , Offset , TII ) ; } if ( Offset == <NUM_LIT> ) return ; assert ( Offset && <STR_LIT> ) ; unsigned ScratchReg = findScratchRegister ( RS , & <STR_LIT> , AFI ) ;

if ( ScratchReg == <NUM_LIT> ) ScratchReg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ;


<s> if ( HasFP || AFI -> getGPRCalleeSavedArea2Size ( ) || AFI -> getDPRCalleeSavedAreaSize ( ) || AFI -> getDPRCalleeSavedAreaOffset ( ) ) { if ( NumBytes ) { if ( is<ISA_LIT> ) emit<ISA_LIT>RegPlusImmediate ( MBB , MBBI , dl , <STR_LIT> , FramePtr , - NumBytes , <STR_LIT> , <NUM_LIT> , TII ) ; else emitT2RegPlusImmediate ( MBB , MBBI , dl , <STR_LIT> , FramePtr , - NumBytes , <STR_LIT> , <NUM_LIT> , TII ) ; } else { if ( is<ISA_LIT> ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) ; } } } else if ( NumBytes ) emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , NumBytes ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , AFI -> getDPRCalleeSavedAreaSize ( ) ) ;

movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ;


<s> } else { const unsigned * CSRegs = getCalleeSavedRegs ( ) ; if ( MBBI != MBB . begin ( ) ) { do -- MBBI ; while ( MBBI != MBB . begin ( ) && isCSRestore ( MBBI , TII , CSRegs ) ) ; if ( ! isCSRestore ( MBBI , TII , CSRegs ) ) ++ MBBI ; } NumBytes -= ( AFI -> getGPRCalleeSavedArea1Size ( ) + AFI -> getGPRCalleeSavedArea2Size ( ) + AFI -> getDPRCalleeSavedAreaSize ( ) ) ; bool HasFP = hasFP ( MF ) ; if ( ( STI . isTargetDarwin ( ) && NumBytes ) || HasFP ) { NumBytes = AFI -> getFramePtrSpillOffset ( ) - NumBytes ; if ( HasFP || AFI -> getGPRCalleeSavedArea2Size ( ) || AFI -> getDPRCalleeSavedAreaSize ( ) || AFI -> getDPRCalleeSavedAreaOffset ( ) ) { if ( NumBytes ) { if ( is<ISA_LIT> ) emit<ISA_LIT>RegPlusImmediate ( MBB , MBBI , dl , <STR_LIT> , FramePtr , - NumBytes , <STR_LIT> , <NUM_LIT> , TII ) ; else emitT2RegPlusImmediate ( MBB , MBBI , dl , <STR_LIT> , FramePtr , - NumBytes , <STR_LIT> , <NUM_LIT> , TII ) ; } else { if ( is<ISA_LIT> ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) ; } } } else if ( NumBytes ) emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , NumBytes ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , AFI -> getDPRCalleeSavedAreaSize ( ) ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , AFI -> getGPRCalleeSavedArea2Size ( ) ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , AFI -> getGPRCalleeSavedArea1Size ( ) ) ; }

if ( VARegSaveSize ) emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , VARegSaveSize ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addReg ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) ;


<s> unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addReg ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) ;


<s> movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) { unsigned ADDriOpc = ! AFI -> isThumbFunction ( ) ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , dl , TII . get ( ADDriOpc ) , FramePtr ) . addFrameIndex ( FramePtrSpillFI ) . addImm ( <NUM_LIT> ) ; AddDefaultCC ( AddDefaultPred ( MIB ) ) ; } emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - GPRCS2Size ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - DPRCSSize ) ; unsigned DPRCSOffset = NumBytes - ( GPRCS1Size + GPRCS2Size + DPRCSSize ) ; unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize ; unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size ; AFI -> setFramePtrSpillOffset ( MFI -> getObjectOffset ( FramePtrSpillFI ) + NumBytes ) ; AFI -> setGPRCalleeSavedArea1Offset ( GPRCS1Offset ) ; AFI -> setGPRCalleeSavedArea2Offset ( GPRCS2Offset ) ; AFI -> setDPRCalleeSavedAreaOffset ( DPRCSOffset ) ; NumBytes = DPRCSOffset ; if ( NumBytes ) { movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - NumBytes ) ; } if ( STI . isTargetELF ( ) && hasFP ( MF ) ) { MFI -> setOffsetAdjustment ( MFI -> getOffsetAdjustment ( ) - AFI -> getFramePtrSpillOffset ( ) ) ; }

AFI -> setGPRCalleeSavedArea1Size ( GPRCS1Size ) ;


<s> if ( ! I -> getOperand ( i ) . isFI ( ) ) continue ; const TargetInstrDesc & Desc = TII . get ( I -> getOpcode ( ) ) ; unsigned AddrMode = ( Desc . TSFlags & <STR_LIT> ) ; if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) return ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ;

if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) Limit = std :: min ( Limit , ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) * <NUM_LIT> ) ;


<s> const TargetInstrDesc & Desc = TII . get ( I -> getOpcode ( ) ) ; unsigned AddrMode = ( Desc . TSFlags & <STR_LIT> ) ; if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) return ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ; if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) Limit = std :: min ( Limit , ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) * <NUM_LIT> ) ; if ( AddrMode == <STR_LIT> && hasFP ( MF ) ) return ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ;


<s> const MachineFrameInfo * FFI = MF . getFrameInfo ( ) ; int Offset = <NUM_LIT> ; for ( int i = FFI -> getObjectIndexBegin ( ) ; i != <NUM_LIT> ; ++ i ) { int FixedOff = - FFI -> getObjectOffset ( i ) ; if ( FixedOff > Offset ) Offset = FixedOff ;


<s> if ( FFI -> isDeadObjectIndex ( i ) ) continue ; Offset += FFI -> getObjectSize ( i ) ; unsigned Align = FFI -> getObjectAlignment ( i ) ; Offset = ( Offset + Align - <NUM_LIT> ) / Align * Align ; } return ( unsigned ) Offset ;


<s> static unsigned findScratchRegister ( RegScavenger * RS , const TargetRegisterClass * RC , <ISA_LIT>FunctionInfo * AFI ) { unsigned Reg = RS ? RS -> FindUnusedReg ( RC ) : ( unsigned ) <STR_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) ) ;


<s> unsigned <ISA_LIT>BaseRegisterInfo :: getFrameRegister ( MachineFunction & MF ) const { if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) return FramePtr ;


<s> const TargetRegisterClass * <ISA_LIT>BaseRegisterInfo :: getPointerRegClass ( unsigned Kind ) const { return & <STR_LIT> ;


<s> case R8 : case D8 : case Q8 : return <NUM_LIT> ; case R9 : case D9 : case Q9 : return <NUM_LIT> ; case R10 : case D10 : case Q10 : return <NUM_LIT> ; case R11 : case D11 : case Q11 : return <NUM_LIT> ; case R12 : case D12 : case Q12 : return <NUM_LIT> ; case SP : case D13 : case Q13 : return <NUM_LIT> ; case LR : case D14 : case Q14 : return <NUM_LIT> ; case PC : case D15 : case Q15 : return <NUM_LIT> ; case D16 : return <NUM_LIT> ; case D17 : return <NUM_LIT> ; case D18 : return <NUM_LIT> ; case D19 : return <NUM_LIT> ; case D20 : return <NUM_LIT> ; case D21 : return <NUM_LIT> ; case D22 : return <NUM_LIT> ; case D23 : return <NUM_LIT> ; case D24 : return <NUM_LIT> ; case D25 : return <NUM_LIT> ; case D26 : return <NUM_LIT> ; case D27 : return <NUM_LIT> ; case D28 : return <NUM_LIT> ; case D29 : return <NUM_LIT> ; case D30 : return <NUM_LIT> ; case D31 : return <NUM_LIT> ; case S0 : case S1 : case S2 : case S3 : case S4 : case S5 : case S6 : case S7 : case S8 : case S9 : case S10 : case S11 : case S12 : case S13 : case S14 : case S15 : case S16 : case S17 : case S18 : case S19 : case S20 : case S21 : case S22 : case S23 : case S24 : case S25 : case S26 : case S27 : case S28 : case S29 : case S30 : case S31 : { if ( isSPVFP ) * isSPVFP = true ; switch ( RegEnum ) { default : return <NUM_LIT> ;


<s> BitVector <ISA_LIT>BaseRegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;

if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) Reserved . set ( FramePtr ) ;


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return ( NoFramePointerElim || MFI -> hasVarSizedObjects ( ) || MFI -> isFrameAddressTaken ( ) ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;


<s> static bool isCSRestore ( MachineInstr * MI , const <ISA_LIT>BaseInstrInfo & TII , const unsigned * CSRegs ) { return ( ( MI -> getOpcode ( ) == ( int ) <STR_LIT> || MI -> getOpcode ( ) == ( int ) <STR_LIT> || MI -> getOpcode ( ) == ( int ) <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && isCalleeSavedRegister ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) , CSRegs ) ) ;


<s> if ( AFI -> isThumb1OnlyFunction ( ) ) return false ; if ( ! MRI -> canReserveReg ( FramePtr ) ) return false ; if ( MF . getTarget ( ) . getFrameLowering ( ) -> hasReservedCallFrame ( MF ) ) return true ;

if ( ! EnableBasePointer ) return false ;


<s> int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned FrameReg ; int Offset = TFI -> ResolveFrameIndexReference ( MF , FrameIndex , FrameReg , SPAdj ) ; if ( RS && FrameReg == <STR_LIT> && FrameIndex == RS -> getScavengingFrameIndex ( ) ) { assert ( TFI -> hasReservedCallFrame ( MF ) && <STR_LIT> <STR_LIT> ) ; assert ( ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) && <STR_LIT> <STR_LIT> ) ; } if ( MI . isDebugValue ( ) ) { MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ; return ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; if ( Offset == <NUM_LIT> ) MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false , false , false ) ; else { ScratchReg = MF . getRegInfo ( ) . createVirtualRegister ( & <STR_LIT> ) ;

if ( ! AFI -> isThumbFunction ( ) ) emit<ISA_LIT>RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ;


<s> const <ISA_LIT>FrameLowering * TFI = static_cast < const <ISA_LIT>FrameLowering * > ( MF . getTarget ( ) . getFrameLowering ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned FrameReg ; int Offset = TFI -> ResolveFrameIndexReference ( MF , FrameIndex , FrameReg , SPAdj ) ; if ( RS && FrameReg == <STR_LIT> && FrameIndex == RS -> getScavengingFrameIndex ( ) ) { assert ( TFI -> hasReservedCallFrame ( MF ) && <STR_LIT> <STR_LIT> ) ; assert ( ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) && <STR_LIT> <STR_LIT> ) ; } if ( MI . isDebugValue ( ) ) { MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ; return ; }


<s> ghcCall = ( F ? F -> getCallingConv ( ) == CallingConv :: GHC : false ) ; } if ( ghcCall ) {


<s> ghcCall = ( F ? F -> getCallingConv ( ) == CallingConv :: GHC : false ) ; } if ( ghcCall ) { return CSR_GHC_SaveList ; }


<s> return ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_RegMask : CSR_AAPCS_RegMask ;


<s> const uint32_t * <ISA_LIT>BaseRegisterInfo :: getCallPreservedMask ( CallingConv :: ID ) const { return ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_RegMask : CSR_AAPCS_RegMask ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return ( MRI . isReserved ( <STR_LIT> ) || MRI . isReserved ( <STR_LIT> ) ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return MRI . isReserved ( <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return MRI . isReserved ( <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( FramePtr ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) Reserved . set ( <STR_LIT> + i ) ; } const TargetRegisterClass * RC = & <STR_LIT> ; for ( TargetRegisterClass :: iterator I = RC -> begin ( ) , E = RC -> end ( ) ; I != E ; ++ I ) for ( MCSubRegIterator SI ( * I , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) Reserved . set ( * I ) ;


<s> if ( AFI -> isThumbFunction ( ) && MFI -> hasVarSizedObjects ( ) ) { if ( AFI -> isThumb2Function ( ) && MFI -> getLocalFrameSize ( ) < <NUM_LIT> ) return false ;


<s> bool <ISA_LIT>BaseRegisterInfo :: hasBasePointer ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; if ( ! EnableBasePointer ) return false ; if ( needsStackRealignment ( MF ) && ! TFI -> hasReservedCallFrame ( MF ) ) return true ;

if ( AFI -> isThumbFunction ( ) && MFI -> hasVarSizedObjects ( ) ) {


<s> MachineBasicBlock :: iterator Ins = MBB -> begin ( ) ; DebugLoc DL ; if ( Ins != MBB -> end ( ) ) DL = Ins -> getDebugLoc ( ) ; const MCInstrDesc & MCID = TII . get ( ADDriOpc ) ; MachineRegisterInfo & MRI = MBB -> getParent ( ) -> getRegInfo ( ) ; const MachineFunction & MF = * MBB -> getParent ( ) ; MRI . constrainRegClass ( BaseReg , TII . getRegClass ( MCID , <NUM_LIT> , this , MF ) ) ; MachineInstrBuilder MIB = AddDefaultPred ( BuildMI ( * MBB , Ins , DL , MCID , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ) ; if ( ! AFI -> isThumb1OnlyFunction ( ) ) AddDefaultCC ( MIB ) ;


<s> bool requiresRealignment = ( ( MFI -> getMaxAlignment ( ) > StackAlign ) || F -> getFnAttributes ( ) . hasAttribute ( Attributes :: StackAlignment ) ) ; return requiresRealignment && canRealignStack ( MF ) ;


<s> const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; if ( MF . getFunction ( ) -> hasFnAttribute ( <STR_LIT> ) ) return false ;

if ( AFI -> isThumb1OnlyFunction ( ) ) return false ;


<s> if ( AFI -> isThumb1OnlyFunction ( ) ) return false ; if ( ! MRI -> canReserveReg ( getFramePointerReg ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ) ) ) return false ; if ( MF . getSubtarget ( ) . getFrameLowering ( ) -> hasReservedCallFrame ( MF ) ) return true ; return MRI -> canReserveReg ( BasePtr ) ;


<s> assert ( TFI -> hasReservedCallFrame ( MF ) && <STR_LIT> <STR_LIT> ) ; assert ( ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) && <STR_LIT> <STR_LIT> ) ; } assert ( ! MI . isDebugValue ( ) && <STR_LIT> ) ; bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ;

unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ;


<s> MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; const <ISA_LIT>BaseInstrInfo & TII = * static_cast < const <ISA_LIT>BaseInstrInfo * > ( MF . getSubtarget ( ) . getInstrInfo ( ) ) ; const <ISA_LIT>FrameLowering * TFI = static_cast < const <ISA_LIT>FrameLowering * > ( MF . getSubtarget ( ) . getFrameLowering ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; int FrameIndex = MI . getOperand ( FIOperandNum ) . getIndex ( ) ; unsigned FrameReg ; int Offset = TFI -> ResolveFrameIndexReference ( MF , FrameIndex , FrameReg , SPAdj ) ; if ( RS && FrameReg == <STR_LIT> && RS -> isScavengingFrameIndex ( FrameIndex ) ) { assert ( TFI -> hasReservedCallFrame ( MF ) && <STR_LIT> <STR_LIT> ) ; assert ( ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) && <STR_LIT> <STR_LIT> ) ; } assert ( ! MI . isDebugValue ( ) && <STR_LIT> ) ; bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , FIOperandNum , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ;

<STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ;


<s> const MCPhysReg * <ISA_LIT>BaseRegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( STI . isTargetNaCl ( ) ) return CSR_NaCl_SaveList ; const MCPhysReg * RegList = STI . isTargetDarwin ( ) ? CSR_iOS_SaveList : CSR_AAPCS_SaveList ; const Function * F = MF -> getFunction ( ) ; if ( F -> getCallingConv ( ) == CallingConv :: GHC ) { return CSR_NoRegs_SaveList ; } else if ( F -> hasFnAttribute ( <STR_LIT> ) ) { if ( STI . isMClass ( ) ) { return CSR_AAPCS_SaveList ;

} else if ( F -> getFnAttribute ( <STR_LIT> ) . getValueAsString ( ) == <STR_LIT> ) {


<s> const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( STI . isTargetNaCl ( ) ) return CSR_NaCl_SaveList ; const MCPhysReg * RegList = STI . isTargetDarwin ( ) ? CSR_iOS_SaveList : CSR_AAPCS_SaveList ; const Function * F = MF -> getFunction ( ) ; if ( F -> getCallingConv ( ) == CallingConv :: GHC ) { return CSR_NoRegs_SaveList ; } else if ( F -> hasFnAttribute ( <STR_LIT> ) ) { if ( STI . isMClass ( ) ) { return CSR_AAPCS_SaveList ; } else if ( F -> getFnAttribute ( <STR_LIT> ) . getValueAsString ( ) == <STR_LIT> ) { return CSR_FIQ_SaveList ; } else { return CSR_GenericInt_SaveList ; } } return RegList ;


<s> const uint32_t * <ISA_LIT>BaseRegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID CC ) const { const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( STI . isTargetNaCl ( ) ) return CSR_NaCl_RegMask ; if ( CC == CallingConv :: GHC ) return CSR_NoRegs_RegMask ; return STI . isTargetDarwin ( ) ? CSR_iOS_RegMask : CSR_AAPCS_RegMask ;


<s> if ( STI . isTargetNaCl ( ) ) return CSR_NaCl_RegMask ; if ( CC == CallingConv :: GHC ) return CSR_NoRegs_RegMask ;

return STI . isTargetDarwin ( ) ? CSR_iOS_RegMask : CSR_AAPCS_RegMask ;


<s> const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const TargetFrameLowering * TFI = STI . getFrameLowering ( ) ; if ( TFI -> hasFP ( MF ) ) return getFramePointerReg ( STI ) ; return <STR_LIT> ;


<s> const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const TargetFrameLowering * TFI = STI . getFrameLowering ( ) ; if ( TFI -> hasFP ( MF ) ) return getFramePointerReg ( STI ) ;


<s> } else if ( VRM && VRM -> hasPhys ( Paired ) ) { PairedPhys = getPairedGPR ( VRM -> getPhys ( Paired ) , Odd , this ) ; } if ( PairedPhys && std :: find ( Order . begin ( ) , Order . end ( ) , PairedPhys ) != Order . end ( ) ) Hints . push_back ( PairedPhys ) ; for ( unsigned I = <NUM_LIT> , E = Order . size ( ) ; I != E ; ++ I ) { unsigned Reg = Order [ I ] ; if ( Reg == PairedPhys || ( getEncodingValue ( Reg ) & <NUM_LIT> ) != Odd ) continue ;

unsigned Paired = getPairedGPR ( Reg , ! Odd , this ) ;


<s> return TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; case <STR_LIT> : { unsigned FP = TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; return <NUM_LIT> - FP - ( STI . isR9Reserved ( ) ? <NUM_LIT> : <NUM_LIT> ) ; } case <STR_LIT> : case <STR_LIT> :


<s> const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const TargetFrameLowering * TFI = STI . getFrameLowering ( ) ; switch ( RC -> getID ( ) ) { default : return <NUM_LIT> ; case <STR_LIT> : return TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; case <STR_LIT> : { unsigned FP = TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; return <NUM_LIT> - FP - ( STI . isR9Reserved ( ) ? <NUM_LIT> : <NUM_LIT> ) ;


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) Reserved . set ( <STR_LIT> + i ) ; } const TargetRegisterClass * RC = & <STR_LIT> ; for ( TargetRegisterClass :: iterator I = RC -> begin ( ) , E = RC -> end ( ) ; I != E ; ++ I ) for ( MCSubRegIterator SI ( * I , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) Reserved . set ( * I ) ;


<s> BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) Reserved . set ( <STR_LIT> + i ) ;


<s> const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; if ( needsStackRealignment ( MF ) && ! TFI -> hasReservedCallFrame ( MF ) ) return true ; if ( AFI -> isThumbFunction ( ) && MFI -> hasVarSizedObjects ( ) ) { if ( AFI -> isThumb2Function ( ) && MFI -> getLocalFrameSize ( ) < <NUM_LIT> ) return false ; return true ; }


<s> using namespace <ISA_LIT> ; switch ( Reg ) { case R0 : case R1 : case R2 : case R3 : case R4 : case R5 : case R6 : case R7 :


<s> using namespace <ISA_LIT> ; switch ( Reg ) { case R8 : case R9 : case R10 : case R11 : return isDarwin ; default : return false ;


case D15 : case D14 : case D13 : case D12 :


<s> MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int64_t FPOffset = Offset - <NUM_LIT> ; if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ; unsigned StackAlign = TFI -> getStackAlignment ( ) ; if ( TFI -> hasFP ( MF ) && ! ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) && canRealignStack ( MF ) ) ) { if ( isFrameOffsetLegal ( MI , getFrameRegister ( MF ) , FPOffset ) ) return false ; } if ( ! MFI -> hasVarSizedObjects ( ) && isFrameOffsetLegal ( MI , <STR_LIT> , Offset ) ) return false ; return true ;


<s> const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getSubtarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getMaxAlignment ( ) > StackAlign ) || F -> hasFnAttribute ( Attribute :: StackAlignment ) ) ;

return requiresRealignment && canRealignStack ( MF ) ;


<s> if ( STI . getTargetLowering ( ) -> supportSwiftError ( ) && F . getAttributes ( ) . hasAttrSomewhere ( Attribute :: SwiftError ) ) { if ( STI . isTargetDarwin ( ) ) return CSR_iOS_SwiftError_SaveList ; return UseSplitPush ? CSR_AAPCS_SplitPush_SwiftError_SaveList : CSR_AAPCS_SwiftError_SaveList ; }

if ( STI . isTargetDarwin ( ) && F . getCallingConv ( ) == CallingConv :: CXX_FAST_TLS ) return MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isSplitCSR ( ) ? CSR_iOS_CXX_TLS_PE_SaveList : CSR_iOS_CXX_TLS_SaveList ;


<s> const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( CC == CallingConv :: GHC ) return CSR_NoRegs_RegMask ;

if ( STI . getTargetLowering ( ) -> supportSwiftError ( ) && MF . getFunction ( ) . getAttributes ( ) . hasAttrSomewhere ( Attribute :: SwiftError ) ) return STI . isTargetDarwin ( ) ? CSR_iOS_SwiftError_RegMask : CSR_AAPCS_SwiftError_RegMask ;


<s> } if ( PairedPhys && is_contained ( Order , PairedPhys ) ) Hints . push_back ( PairedPhys ) ; for ( unsigned Reg : Order ) { if ( Reg == PairedPhys || ( getEncodingValue ( Reg ) & <NUM_LIT> ) != Odd ) continue ; unsigned Paired = getPairedGPR ( Reg , ! Odd , this ) ; if ( ! Paired || MRI . isReserved ( Paired ) ) continue ; Hints . push_back ( Reg ) ; }


<s> markSuperRegs ( Reserved , <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) markSuperRegs ( Reserved , getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) markSuperRegs ( Reserved , BasePtr ) ; if ( STI . isR9Reserved ( ) ) markSuperRegs ( Reserved , <STR_LIT> ) ; const Function & F = MF . getFunction ( ) ; if ( F . getCallingConv ( ) == CallingConv :: Mono ) markSuperRegs ( Reserved , <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { static_assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> , <STR_LIT> ) ; for ( unsigned R = <NUM_LIT> ; R < <NUM_LIT> ; ++ R ) markSuperRegs ( Reserved , <STR_LIT> + R ) ; } const TargetRegisterClass & RC = <STR_LIT> ; for ( unsigned Reg : RC ) for ( MCSubRegIterator SI ( Reg , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) markSuperRegs ( Reserved , Reg ) ; assert ( checkAllSuperRegsMarked ( Reserved ) ) ; return Reserved ;


<s> auto SrcRCWeight = MRI . getTargetRegisterInfo ( ) -> getRegClassWeight ( SrcRC ) ; auto DstRCWeight = MRI . getTargetRegisterInfo ( ) -> getRegClassWeight ( DstRC ) ; if ( SrcRCWeight . RegWeight > NewRCWeight . RegWeight ) return true ; if ( DstRCWeight . RegWeight > NewRCWeight . RegWeight ) return true ; auto AFI = MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; auto It = AFI -> getCoalescedWeight ( MBB ) ;

DEBUG ( dbgs ( ) << <STR_LIT> << It -> second << <STR_LIT> ) ;


<s> const Constant * C = ConstantInt :: get ( Type :: getInt32Ty ( MF . getFunction ( ) -> getContext ( ) ) , Val ) ; unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) . setMIFlags ( MIFlags ) ;


<s> if ( AFI -> isThumb1OnlyFunction ( ) ) return false ; if ( ! MRI -> canReserveReg ( FramePtr ) ) return false ;

if ( MF . getTarget ( ) . getFrameLowering ( ) -> hasReservedCallFrame ( MF ) ) return true ;


<s> const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; if ( ! MF . getTarget ( ) . Options . RealignStack ) return false ; if ( AFI -> isThumb1OnlyFunction ( ) ) return false ;

if ( ! MRI -> canReserveReg ( FramePtr ) ) return false ;


<s> Register getBaseRegister ( ) const { return BasePtr ;


<s> const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; bool UseSplitPush = STI . splitFramePushPop ( * MF ) ; const MCPhysReg * RegList = STI . isTargetDarwin ( ) ? CSR_iOS_SaveList : ( UseSplitPush ? CSR_AAPCS_SplitPush_SaveList : CSR_AAPCS_SaveList ) ; const Function * F = MF -> getFunction ( ) ; if ( F -> getCallingConv ( ) == CallingConv :: GHC ) { return CSR_NoRegs_SaveList ; } else if ( F -> hasFnAttribute ( <STR_LIT> ) ) { if ( STI . isMClass ( ) ) { return UseSplitPush ? CSR_AAPCS_SplitPush_SaveList : CSR_AAPCS_SaveList ; } else if ( F -> getFnAttribute ( <STR_LIT> ) . getValueAsString ( ) == <STR_LIT> ) { return CSR_FIQ_SaveList ; } else { return CSR_GenericInt_SaveList ;


<s> if ( F -> getCallingConv ( ) == CallingConv :: GHC ) { return CSR_NoRegs_SaveList ; } else if ( F -> hasFnAttribute ( <STR_LIT> ) ) { if ( STI . isMClass ( ) ) { return UseSplitPush ? CSR_AAPCS_SplitPush_SaveList : CSR_AAPCS_SaveList ; } else if ( F -> getFnAttribute ( <STR_LIT> ) . getValueAsString ( ) == <STR_LIT> ) { return CSR_FIQ_SaveList ; } else { return CSR_GenericInt_SaveList ; } } if ( STI . getTargetLowering ( ) -> supportSwiftError ( ) && F -> getAttributes ( ) . hasAttrSomewhere ( Attribute :: SwiftError ) ) { if ( STI . isTargetDarwin ( ) ) return CSR_iOS_SwiftError_SaveList ; return UseSplitPush ? CSR_AAPCS_SplitPush_SwiftError_SaveList : CSR_AAPCS_SwiftError_SaveList ; }

if ( STI . isTargetDarwin ( ) && F -> getCallingConv ( ) == CallingConv :: CXX_FAST_TLS ) return MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isSplitCSR ( ) ? CSR_iOS_CXX_TLS_PE_SaveList : CSR_iOS_CXX_TLS_SaveList ;


if ( STI . getTargetLowering ( ) -> supportSwiftError ( ) && MF . getFunction ( ) -> getAttributes ( ) . hasAttrSomewhere ( Attribute :: SwiftError ) ) return STI . isTargetDarwin ( ) ? CSR_iOS_SwiftError_RegMask : CSR_AAPCS_SwiftError_RegMask ;


<s> markSuperRegs ( Reserved , <STR_LIT> ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) markSuperRegs ( Reserved , getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) markSuperRegs ( Reserved , BasePtr ) ; if ( STI . isR9Reserved ( ) ) markSuperRegs ( Reserved , <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { static_assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> , <STR_LIT> ) ; for ( unsigned R = <NUM_LIT> ; R < <NUM_LIT> ; ++ R ) markSuperRegs ( Reserved , <STR_LIT> + R ) ; } const TargetRegisterClass & RC = <STR_LIT> ;

for ( unsigned Reg : RC ) for ( MCSubRegIterator SI ( Reg , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) markSuperRegs ( Reserved , Reg ) ;


<s> getReservedRegs ( const MachineFunction & MF ) const { const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const <ISA_LIT>FrameLowering * TFI = getFrameLowering ( MF ) ; BitVector Reserved ( getNumRegs ( ) ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; markSuperRegs ( Reserved , <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) markSuperRegs ( Reserved , getFramePointerReg ( STI ) ) ; if ( hasBasePointer ( MF ) ) markSuperRegs ( Reserved , BasePtr ) ; if ( STI . isR9Reserved ( ) ) markSuperRegs ( Reserved , <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { static_assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> , <STR_LIT> ) ; for ( unsigned R = <NUM_LIT> ; R < <NUM_LIT> ; ++ R ) markSuperRegs ( Reserved , <STR_LIT> + R ) ; } const TargetRegisterClass & RC = <STR_LIT> ; for ( unsigned Reg : RC ) for ( MCSubRegIterator SI ( Reg , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) markSuperRegs ( Reserved , Reg ) ;

assert ( checkAllSuperRegsMarked ( Reserved ) ) ;


<s> <ISA_LIT>BaseRegisterInfo :: <ISA_LIT>BaseRegisterInfo ( const <ISA_LIT>BaseInstrInfo & tii , const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <STR_LIT> ) , TII ( tii ) , STI ( sti ) , FramePtr ( ( STI . isTargetDarwin ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) , BasePtr ( <STR_LIT> ) {


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ;

return ( RealignStack && ! AFI -> isThumb1OnlyFunction ( ) && ( ! MFI -> hasVarSizedObjects ( ) || EnableBasePointer ) ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: canRealignStack ( const MachineFunction & MF ) const {

const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;


<s> return hasReservedCallFrame ( MF ) || MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ;


<s> if ( MI . isDebugValue ( ) ) { MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ; return ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ;

int PIdx = MI . findFirstPredOperandIdx ( ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Reg == FramePtr ) FramePtrSpillFI = FI ; if ( STI . isTargetDarwin ( ) ) { AFI -> addGPRCalleeSavedArea2Frame ( FI ) ; GPRCS2Size += <NUM_LIT> ; } else { AFI -> addGPRCalleeSavedArea1Frame ( FI ) ; GPRCS1Size += <NUM_LIT> ; } break ; default : AFI -> addDPRCalleeSavedAreaFrame ( FI ) ; DPRCSSize += <NUM_LIT> ; } } emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - GPRCS1Size ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; bool HasFP = hasFP ( MF ) ; if ( HasFP ) { unsigned ADDriOpc = ! AFI -> isThumbFunction ( ) ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , dl , TII . get ( ADDriOpc ) , FramePtr ) . addFrameIndex ( FramePtrSpillFI ) . addImm ( <NUM_LIT> ) ; AddDefaultCC ( AddDefaultPred ( MIB ) ) ; } emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - GPRCS2Size ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - DPRCSSize ) ; unsigned DPRCSOffset = NumBytes - ( GPRCS1Size + GPRCS2Size + DPRCSSize ) ; unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize ; unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size ; if ( HasFP ) AFI -> setFramePtrSpillOffset ( MFI -> getObjectOffset ( FramePtrSpillFI ) + NumBytes ) ; AFI -> setGPRCalleeSavedArea1Offset ( GPRCS1Offset ) ; AFI -> setGPRCalleeSavedArea2Offset ( GPRCS2Offset ) ; AFI -> setDPRCalleeSavedAreaOffset ( DPRCSOffset ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , STI ) ; NumBytes = DPRCSOffset ; if ( NumBytes ) { emitSPUpdate ( is<ISA_LIT> , MBB , MBBI , dl , TII , - NumBytes ) ; if ( HasFP ) AFI -> setShouldRestoreSPFromFP ( true ) ; } if ( STI . isTargetELF ( ) && hasFP ( MF ) ) { MFI -> setOffsetAdjustment ( MFI -> getOffsetAdjustment ( ) - AFI -> getFramePtrSpillOffset ( ) ) ; AFI -> setShouldRestoreSPFromFP ( true ) ; } AFI -> setGPRCalleeSavedArea1Size ( GPRCS1Size ) ; AFI -> setGPRCalleeSavedArea2Size ( GPRCS2Size ) ; AFI -> setDPRCalleeSavedAreaSize ( DPRCSSize ) ; if ( needsStackRealignment ( MF ) ) { unsigned MaxAlign = MFI -> getMaxAlignment ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) ) ; if ( ! AFI -> isThumbFunction ( ) ) { AddDefaultCC ( AddDefaultPred ( BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) . addImm ( MaxAlign - <NUM_LIT> ) ) ) ; } else {

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ;


<s> for ( MachineFunction :: iterator BB = MF . begin ( ) , E = MF . end ( ) ; BB != E ; ++ BB ) { for ( MachineBasicBlock :: iterator I = BB -> begin ( ) , E = BB -> end ( ) ; I != E ; ++ I ) { for ( unsigned i = <NUM_LIT> , e = I -> getNumOperands ( ) ; i != e ; ++ i ) { if ( ! I -> getOperand ( i ) . isFI ( ) ) continue ; if ( I -> getOpcode ( ) == <STR_LIT> ) { Limit = std :: min ( Limit , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; break ;


<s> if ( ! I -> getOperand ( i ) . isFI ( ) ) continue ; if ( I -> getOpcode ( ) == <STR_LIT> ) { Limit = std :: min ( Limit , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; break ; } switch ( I -> getDesc ( ) . TSFlags & <STR_LIT> ) { case <STR_LIT> : case <STR_LIT> : Limit = std :: min ( Limit , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : Limit = std :: min ( Limit , ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) * <NUM_LIT> ) ; break ; case <STR_LIT> : if ( hasFP ( MF ) && AFI -> hasStackFrame ( ) ) Limit = std :: min ( Limit , ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) ;


<s> int64_t InstrOffs = <NUM_LIT> ; ; int Scale = <NUM_LIT> ; unsigned ImmIdx = <NUM_LIT> ; switch ( AddrMode ) { case <STR_LIT> : case <STR_LIT> : InstrOffs = MI -> getOperand ( Idx + <NUM_LIT> ) . getImm ( ) ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : { const MachineOperand & OffOp = MI -> getOperand ( Idx + <NUM_LIT> ) ; InstrOffs = <STR_LIT> ( OffOp . getImm ( ) ) ; if ( <STR_LIT> ( OffOp . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ; Scale = <NUM_LIT> ; break ; } case <STR_LIT> : { ImmIdx = Idx + <NUM_LIT> ; InstrOffs = <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) ; if ( <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) == <STR_LIT> ) InstrOffs = - InstrOffs ; break ; } case <STR_LIT> : { ImmIdx = Idx + <NUM_LIT> ; InstrOffs = <STR_LIT> ( MI -> getOperand ( ImmIdx ) . getImm ( ) ) ;


<s> return ResolveFrameIndexReference ( MF , FI , FrameReg , <NUM_LIT> ) ;


<s> if ( hasFP ( MF ) ) return FramePtr ; return <STR_LIT> ;


<s> if ( hasFP ( MF ) ) return FramePtr ;


<s> for ( MachineFunction :: const_iterator MBBI = MF . begin ( ) , E = MF . end ( ) ; MBBI != E ; ++ MBBI ) { const MachineBasicBlock & MBB = * MBBI ; for ( MachineBasicBlock :: const_iterator I = MBB . begin ( ) , E = MBB . end ( ) ; I != E ; ++ I ) FnSize += TII . GetInstSizeInBytes ( I ) ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> return <STR_LIT> ; case <STR_LIT> : return ( isReservedReg ( MF , <STR_LIT> ) || isReservedReg ( MF , <STR_LIT> ) ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return isReservedReg ( MF , <STR_LIT> ) ? <NUM_LIT> : <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> if ( hasFP ( MF ) ) Reserved . set ( FramePtr ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ;

if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: hasFP ( const MachineFunction & MF ) const {

if ( STI . isTargetDarwin ( ) ) return true ;


<s> bool <ISA_LIT>BaseRegisterInfo :: hasFP ( const MachineFunction & MF ) const { if ( STI . isTargetDarwin ( ) ) return true ;


<s> unsigned CFSize = FFI -> getMaxCallFrameSize ( ) ; if ( CFSize >= ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) / <NUM_LIT> ) return false ;

return ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ;


<s> unsigned i = <NUM_LIT> ; while ( ! MI -> getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI -> getNumOperands ( ) && <STR_LIT> ) ; } if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) return Offset == <NUM_LIT> ; unsigned NumBits = <NUM_LIT> ; unsigned Scale = <NUM_LIT> ; bool isSigned = true ; switch ( AddrMode ) { case <STR_LIT> : case <STR_LIT> : Scale = <NUM_LIT> ; if ( Offset < <NUM_LIT> ) { NumBits = <NUM_LIT> ; Offset = - Offset ; } else { NumBits = <NUM_LIT> ; } break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; break ; } Offset += getFrameIndexInstrOffset ( MI , i ) ; if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ; if ( isSigned && Offset < <NUM_LIT> ) Offset = - Offset ; unsigned Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ;

if ( ( unsigned ) Offset <= Mask * Scale ) return true ;


<s> unsigned i = <NUM_LIT> ; while ( ! MI -> getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI -> getNumOperands ( ) && <STR_LIT> ) ; } if ( AddrMode == <STR_LIT> || AddrMode == <STR_LIT> ) return Offset == <NUM_LIT> ; unsigned NumBits = <NUM_LIT> ; unsigned Scale = <NUM_LIT> ; bool isSigned = true ; switch ( AddrMode ) { case <STR_LIT> : case <STR_LIT> : Scale = <NUM_LIT> ; if ( Offset < <NUM_LIT> ) { NumBits = <NUM_LIT> ; Offset = - Offset ; } else { NumBits = <NUM_LIT> ; } break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; break ; } Offset += getFrameIndexInstrOffset ( MI , i ) ; if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ; if ( isSigned && Offset < <NUM_LIT> ) Offset = - Offset ;

unsigned Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ;


<s> break ; case <STR_LIT> : case <STR_LIT> : if ( FramePtr == Reg && hasFP ( MF ) ) return true ; break ; case <STR_LIT> : return STI . isR9Reserved ( ) ; }


<s> ( AFI -> isThumb1OnlyFunction ( ) ? <STR_LIT> : <STR_LIT> ) ;

MachineInstrBuilder MIB = BuildMI ( * I -> getParent ( ) , I , I -> getDebugLoc ( ) , TII . get ( ADDriOpc ) , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ;


<s> <ISA_LIT>FunctionInfo * AFI = I -> getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned ADDriOpc = ! AFI -> isThumbFunction ( ) ? <STR_LIT> : ( AFI -> isThumb1OnlyFunction ( ) ? <STR_LIT> : <STR_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ForceAllBaseRegAlloc ) return true ; break ; default : return false ; } MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int64_t FPOffset = Offset - <NUM_LIT> ; if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ;


<s> const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) || F -> hasFnAttr ( Attribute :: StackAlignment ) ) ;

return requiresRealignment && canRealignStack ( MF ) ;


<s> needsStackRealignment ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ;

bool requiresRealignment = ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) || F -> hasFnAttr ( Attribute :: StackAlignment ) ) ;


<s> <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int Off = Offset ; unsigned i = <NUM_LIT> ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; }


<s> } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , BaseReg , Off , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , BaseReg , Off , TII ) ; } assert ( Done && <STR_LIT> ) ;


<s> assert ( hasFP ( MF ) && <STR_LIT> ) ; if ( isFixed ) { FrameReg = getFrameRegister ( MF ) ; Offset = FPOffset ; } else if ( MFI -> hasVarSizedObjects ( ) ) { assert ( hasBasePointer ( MF ) && <STR_LIT> ) ; FrameReg = BasePtr ; } return Offset ; } if ( hasFP ( MF ) && AFI -> hasStackFrame ( ) ) { if ( isFixed || ( MFI -> hasVarSizedObjects ( ) && ! hasBasePointer ( MF ) ) ) { FrameReg = getFrameRegister ( MF ) ; return FPOffset ; } else if ( MFI -> hasVarSizedObjects ( ) ) { assert ( hasBasePointer ( MF ) && <STR_LIT> ) ; FrameReg = BasePtr ; } else if ( AFI -> isThumb2Function ( ) ) { if ( FPOffset >= - <NUM_LIT> && FPOffset < <NUM_LIT> ) { FrameReg = getFrameRegister ( MF ) ; return FPOffset ; } } else if ( Offset > ( FPOffset < <NUM_LIT> ? - FPOffset : FPOffset ) ) { FrameReg = getFrameRegister ( MF ) ; return FPOffset ;


<s> FrameReg = getFrameRegister ( MF ) ; Offset = FPOffset ; } else if ( MFI -> hasVarSizedObjects ( ) ) { assert ( hasBasePointer ( MF ) && <STR_LIT> ) ; FrameReg = BasePtr ; } return Offset ; } if ( hasFP ( MF ) && AFI -> hasStackFrame ( ) ) { if ( isFixed || ( MFI -> hasVarSizedObjects ( ) && ! hasBasePointer ( MF ) ) ) { FrameReg = getFrameRegister ( MF ) ; return FPOffset ; } else if ( MFI -> hasVarSizedObjects ( ) ) { assert ( hasBasePointer ( MF ) && <STR_LIT> ) ; FrameReg = BasePtr ; } else if ( AFI -> isThumb2Function ( ) ) { if ( FPOffset >= - <NUM_LIT> && FPOffset < <NUM_LIT> ) {


<s> BitVector <ISA_LIT>BaseRegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { const <ISA_LIT>Subtarget & STI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const <ISA_LIT>FrameLowering * TFI = getFrameLowering ( MF ) ; BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( getFramePointerReg ( STI ) ) ;

if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ;


<s> <ISA_LIT>BaseRegisterInfo :: <ISA_LIT>BaseRegisterInfo ( const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) , STI ( sti ) , FramePtr ( ( STI . isTargetMachO ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) , BasePtr ( <STR_LIT> ) {


<s> const uint16_t * RegList = ( STI . isTargetIOS ( ) && ! STI . isAAPCS_ABI ( ) ) ? CSR_iOS_SaveList : CSR_AAPCS_SaveList ; if ( ! MF ) return RegList ; const Function * F = MF -> getFunction ( ) ; if ( F -> getCallingConv ( ) == CallingConv :: GHC ) { return CSR_NoRegs_SaveList ; } else if ( F -> hasFnAttribute ( <STR_LIT> ) ) { if ( STI . isMClass ( ) ) { return CSR_AAPCS_SaveList ; } else if ( F -> getFnAttribute ( <STR_LIT> ) . getValueAsString ( ) == <STR_LIT> ) { return CSR_FIQ_SaveList ;


<s> if ( Size == <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } } else if ( NumRegs == <NUM_LIT> ) { if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size == <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> ) NewSubIdx = <STR_LIT> ; return true ; } } else if ( SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { if ( Size >= <NUM_LIT> && SubIndices [ <NUM_LIT> ] == <STR_LIT> ) { NewSubIdx = <STR_LIT> ; return true ; } } }


<s> case LR : case SP : case PC : return true ; case R8 : case R9 : case R10 : case R11 : case R12 : return ! SplitFramePushPop ; default :


<s> case R8 : case R9 : case R10 : case R11 : case R12 : return SplitFramePushPop ;


<s> case D11 : case D10 : case D9 : case D8 : case D7 : case D6 : case D5 : case D4 : case D3 : case D2 : case D1 : case D0 : case D31 : case D30 : case D29 : case D28 : case D27 : case D26 : case D25 : case D24 : case D23 : case D22 : case D21 : case D20 :

case D19 : case D18 : case D17 : case D16 :


<s> case D7 : case D6 : case D5 : case D4 : case D3 : case D2 : case D1 : case D0 : case D31 : case D30 : case D29 : case D28 : case D27 : case D26 : case D25 : case D24 : case D23 : case D22 : case D21 : case D20 : case D19 : case D18 : case D17 : case D16 : return true ; default : return false ;


<s> bool <ISA_LIT>BaseRegisterInfo :: needsStackRealignment ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const Function * F = MF . getFunction ( ) ; unsigned StackAlign = MF . getTarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getMaxAlignment ( ) > StackAlign ) || F -> hasFnAttr ( Attribute :: StackAlignment ) ) ; return requiresRealignment && canRealignStack ( MF ) ;


<s> void <ISA_LIT>BaseRegisterInfo :: eliminateFrameIndex ( MachineBasicBlock :: iterator II , int SPAdj , RegScavenger * RS ) const { unsigned i = <NUM_LIT> ; MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; const <ISA_LIT>FrameInfo * TFI = static_cast < const <ISA_LIT>FrameInfo * > ( MF . getTarget ( ) . getFrameInfo ( ) ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; assert ( ! AFI -> isThumb1OnlyFunction ( ) && <STR_LIT> ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned FrameReg ; int Offset = TFI -> ResolveFrameIndexReference ( MF , FrameIndex , FrameReg , SPAdj ) ; if ( MI . isDebugValue ( ) ) { MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ; return ; } bool Done = false ; if ( ! AFI -> isThumbFunction ( ) ) Done = rewrite<ISA_LIT>FrameIndex ( MI , i , FrameReg , Offset , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; Done = rewriteT2FrameIndex ( MI , i , FrameReg , Offset , TII ) ; } if ( Done ) return ; assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; if ( Offset == <NUM_LIT> ) MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false , false , false ) ; else { ScratchReg = MF . getRegInfo ( ) . createVirtualRegister ( <STR_LIT> ) ; if ( ! AFI -> isThumbFunction ( ) ) emit<ISA_LIT>RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ; else {


<s> assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; if ( Offset == <NUM_LIT> ) MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false , false , false ) ; else { ScratchReg = MF . getRegInfo ( ) . createVirtualRegister ( <STR_LIT> ) ; if ( ! AFI -> isThumbFunction ( ) ) emit<ISA_LIT>RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ; else { assert ( AFI -> isThumb2Function ( ) ) ; emitT2RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ; } MI . getOperand ( i ) . ChangeToRegister ( ScratchReg , false , false , true ) ;

if ( MI . getOpcode ( ) == <STR_LIT> ) MI . setDesc ( TII . get ( <STR_LIT> ) ) ;


<s> void <ISA_LIT>BaseRegisterInfo :: emitLoadConstPool ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , DebugLoc dl , unsigned DestReg , unsigned SubIdx , int Val , <STR_LIT> Pred , unsigned PredReg ) const { MachineFunction & MF = * MBB . getParent ( ) ; MachineConstantPool * ConstantPool = MF . getConstantPool ( ) ; const Constant * C = ConstantInt :: get ( Type :: getInt32Ty ( MF . getFunction ( ) -> getContext ( ) ) , Val ) ; unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( DestReg , getDefRegState ( true ) , SubIdx ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) ;


<s> void <ISA_LIT>BaseRegisterInfo :: emitLoadConstPool ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , DebugLoc dl , unsigned DestReg , unsigned SubIdx , int Val , <STR_LIT> Pred , unsigned PredReg ) const { MachineFunction & MF = * MBB . getParent ( ) ; MachineConstantPool * ConstantPool = MF . getConstantPool ( ) ;

const Constant * C = ConstantInt :: get ( Type :: getInt32Ty ( MF . getFunction ( ) -> getContext ( ) ) , Val ) ;


<s> static const unsigned GPREven3 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd3 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPREven4 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd4 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPREven5 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd5 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPREven6 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; static const unsigned GPROdd6 [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; if ( HintType == <STR_LIT> ) { if ( isPhysicalRegister ( HintReg ) && getRegisterPairEven ( HintReg , MF ) == <NUM_LIT> ) return std :: make_pair ( RC -> allocation_order_begin ( MF ) , RC -> allocation_order_end ( MF ) ) ; if ( ! TFI -> hasFP ( MF ) ) { if ( ! STI . isR9Reserved ( ) ) return std :: make_pair ( GPREven1 , GPREven1 + ( sizeof ( GPREven1 ) / sizeof ( unsigned ) ) ) ; else return std :: make_pair ( GPREven4 , GPREven4 + ( sizeof ( GPREven4 ) / sizeof ( unsigned ) ) ) ; } else if ( FramePtr == <STR_LIT> ) { if ( ! STI . isR9Reserved ( ) ) return std :: make_pair ( GPREven2 , GPREven2 + ( sizeof ( GPREven2 ) / sizeof ( unsigned ) ) ) ; else return std :: make_pair ( GPREven5 , GPREven5 + ( sizeof ( GPREven5 ) / sizeof ( unsigned ) ) ) ; } else { if ( ! STI . isR9Reserved ( ) ) return std :: make_pair ( GPREven3 , GPREven3 + ( sizeof ( GPREven3 ) / sizeof ( unsigned ) ) ) ;

else return std :: make_pair ( GPREven6 , GPREven6 + ( sizeof ( GPREven6 ) / sizeof ( unsigned ) ) ) ;


<s> const TargetFrameInfo * TFI = MF . getTarget ( ) . getFrameInfo ( ) ; if ( TFI -> hasFP ( MF ) ) return FramePtr ;


<s> BitVector <ISA_LIT>BaseRegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { const TargetFrameInfo * TFI = MF . getTarget ( ) . getFrameInfo ( ) ;


<s> case <STR_LIT> : Scale = <NUM_LIT> ; if ( Offset < <NUM_LIT> ) { NumBits = <NUM_LIT> ; Offset = - Offset ; } else { NumBits = <NUM_LIT> ; } break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; break ; } Offset += getFrameIndexInstrOffset ( MI , i ) ; if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ; if ( isSigned && Offset < <NUM_LIT> ) Offset = - Offset ; unsigned Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ;


<s> NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; break ; case <STR_LIT> : NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; isSigned = false ; break ; default : llvm_unreachable ( <STR_LIT> ) ; break ; } Offset += getFrameIndexInstrOffset ( MI , i ) ; if ( ( Offset & ( Scale - <NUM_LIT> ) ) != <NUM_LIT> ) return false ; if ( isSigned && Offset < <NUM_LIT> ) Offset = - Offset ; unsigned Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ;


<s> if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset = - Offset ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ; unsigned StackAlign = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; if ( TFI -> hasFP ( MF ) && ! ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) && canRealignStack ( MF ) ) ) { if ( isFrameOffsetLegal ( MI , FPOffset ) ) return false ; } if ( ! MFI -> hasVarSizedObjects ( ) && isFrameOffsetLegal ( MI , Offset ) ) return false ;


<s> } unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ForceAllBaseRegAlloc ) return true ; break ; default : return false ; } MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; const TargetFrameInfo * TFI = MF . getTarget ( ) . getFrameInfo ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int64_t FPOffset = Offset - <NUM_LIT> ; if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset = - Offset ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ; unsigned StackAlign = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; if ( TFI -> hasFP ( MF ) && ! ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) && canRealignStack ( MF ) ) ) {

if ( isFrameOffsetLegal ( MI , FPOffset ) ) return false ;


<s> if ( ! MRI -> canReserveReg ( FramePtr ) ) return false ; if ( MF . getTarget ( ) . getSubtargetImpl ( ) -> getFrameLowering ( ) -> hasReservedCallFrame ( MF ) ) return true ;

return MRI -> canReserveReg ( BasePtr ) ;


<s> bool <ISA_LIT>BaseRegisterInfo :: canRealignStack ( const MachineFunction & MF ) const { const MachineRegisterInfo * MRI = & MF . getRegInfo ( ) ;

const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ;


<s> unsigned <ISA_LIT>BaseRegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ;

if ( TFI -> hasFP ( MF ) ) return FramePtr ;


<s> const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ;


<s> case <STR_LIT> : return TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; case <STR_LIT> : { unsigned FP = TFI -> hasFP ( MF ) ? <NUM_LIT> : <NUM_LIT> ; return <NUM_LIT> - FP - ( STI . isR9Reserved ( ) ? <NUM_LIT> : <NUM_LIT> ) ; } case <STR_LIT> :


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( FramePtr ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( BasePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; if ( ! STI . hasVFP3 ( ) || STI . hasD16 ( ) ) { assert ( <STR_LIT> == <STR_LIT> + <NUM_LIT> ) ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) Reserved . set ( <STR_LIT> + i ) ; } const TargetRegisterClass * RC = & <STR_LIT> ; for ( TargetRegisterClass :: iterator I = RC -> begin ( ) , E = RC -> end ( ) ; I != E ; ++ I ) for ( MCSubRegIterator SI ( * I , this ) ; SI . isValid ( ) ; ++ SI ) if ( Reserved . test ( * SI ) ) Reserved . set ( * I ) ; return Reserved ;


<s> const MCInstrDesc & MCID = TII . get ( ADDriOpc ) ; MRI . constrainRegClass ( BaseReg , TII . getRegClass ( MCID , <NUM_LIT> , this , MF ) ) ; MachineInstrBuilder MIB = AddDefaultPred ( BuildMI ( * MBB , Ins , DL , MCID , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ) ;

if ( ! AFI -> isThumb1OnlyFunction ( ) ) AddDefaultCC ( MIB ) ;


<s> MachineRegisterInfo & MRI = MBB -> getParent ( ) -> getRegInfo ( ) ; const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; const MCInstrDesc & MCID = TII . get ( ADDriOpc ) ; MRI . constrainRegClass ( BaseReg , TII . getRegClass ( MCID , <NUM_LIT> , this , MF ) ) ;

MachineInstrBuilder MIB = AddDefaultPred ( BuildMI ( * MBB , Ins , DL , MCID , BaseReg ) . addFrameIndex ( FrameIdx ) . addImm ( Offset ) ) ;


<s> <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int64_t FPOffset = Offset - <NUM_LIT> ; if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset = - Offset ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ; unsigned StackAlign = TFI -> getStackAlignment ( ) ; if ( TFI -> hasFP ( MF ) && ! ( ( MFI -> getLocalFrameMaxAlign ( ) > StackAlign ) && canRealignStack ( MF ) ) ) {


<s> for ( unsigned i = <NUM_LIT> ; ! MI -> getOperand ( i ) . isFI ( ) ; ++ i ) { assert ( i < MI -> getNumOperands ( ) && <STR_LIT> ) ; } unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : break ; default : return false ; } MachineFunction & MF = * MI -> getParent ( ) -> getParent ( ) ; const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; int64_t FPOffset = Offset - <NUM_LIT> ; if ( ! AFI -> isThumbFunction ( ) || ! AFI -> isThumb1OnlyFunction ( ) ) FPOffset -= <NUM_LIT> ; Offset = - Offset ; Offset += MFI -> getLocalFrameSize ( ) ; Offset += <NUM_LIT> ;

unsigned StackAlign = TFI -> getStackAlignment ( ) ;


<s> bool requiresRealignment = ( ( MFI -> getMaxAlignment ( ) > StackAlign ) || F -> getAttributes ( ) . hasAttribute ( AttributeSet :: FunctionIndex , Attribute :: StackAlignment ) ) ; return requiresRealignment && canRealignStack ( MF ) ;


<s> unsigned StackAlign = MF . getTarget ( ) . getSubtargetImpl ( ) -> getFrameLowering ( ) -> getStackAlignment ( ) ; bool requiresRealignment = ( ( MFI -> getMaxAlignment ( ) > StackAlign ) || F -> getAttributes ( ) . hasAttribute ( AttributeSet :: FunctionIndex , Attribute :: StackAlignment ) ) ;


<s> <ISA_LIT>BaseRegisterInfo :: <ISA_LIT>BaseRegisterInfo ( const <ISA_LIT>BaseInstrInfo & tii , const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) , TII ( tii ) , STI ( sti ) , FramePtr ( ( STI . isTargetDarwin ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) , BasePtr ( <STR_LIT> ) {


<s> assert ( ( Offset || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> || ( MI . getDesc ( ) . TSFlags & <STR_LIT> ) == <STR_LIT> ) && <STR_LIT> ) ; unsigned ScratchReg = <NUM_LIT> ; int PIdx = MI . findFirstPredOperandIdx ( ) ; <STR_LIT> Pred = ( PIdx == - <NUM_LIT> ) ? <STR_LIT> : ( <STR_LIT> ) MI . getOperand ( PIdx ) . getImm ( ) ; unsigned PredReg = ( PIdx == - <NUM_LIT> ) ? <NUM_LIT> : MI . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; if ( Offset == <NUM_LIT> ) MI . getOperand ( FIOperandNum ) . ChangeToRegister ( FrameReg , false , false , false ) ; else { ScratchReg = MF . getRegInfo ( ) . createVirtualRegister ( & <STR_LIT> ) ; if ( ! AFI -> isThumbFunction ( ) ) emit<ISA_LIT>RegPlusImmediate ( MBB , II , MI . getDebugLoc ( ) , ScratchReg , FrameReg , Offset , Pred , PredReg , TII ) ; else {