<s> case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; }

case MachineOperand :: MO_RegisterMask :


<s> break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Mang -> getSymbol ( MO . getGlobal ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask : return false ; } return true ;


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ;


<s> OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetGlobalAddressSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; }

return Printer . GetGlobalValueSymbol ( MO . getGlobal ( ) ) ;


<s> switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; } return Printer . GetGlobalValueSymbol ( MO . getGlobal ( ) ) ;


<s> MCOperand MCOp ; switch ( MO . getType ( ) ) { default : MI -> dump ( ) ; assert ( <NUM_LIT> && <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( Ctx ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = LowerSymbolOperand ( MO , GetJumpTableSymbol ( MO ) ) ; break ;

case MachineOperand :: MO_ConstantPoolIndex :


<s> MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol :

MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ;


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_PLT , OutContext ) ; break ; }

if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;


<s> MCOperand <ISA_LIT>AsmPrinter :: GetSymbolRef ( const MachineOperand & MO , const MCSymbol * Symbol ) { const MCExpr * Expr ; switch ( MO . getTargetFlags ( ) ) { default : { Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> :


<s> bool <ISA_LIT>AsmPrinter :: lowerOperand ( const MachineOperand & MO , MCOperand & MCOp ) { switch ( MO . getType ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) && MO . getReg ( ) != <STR_LIT> ) return false ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Mang -> getSymbol ( MO . getGlobal ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask : return false ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ;

raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ;


<s> switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; } return Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ;


<s> case <NUM_LIT> : break ; } return Printer . Mang -> getSymbol ( MO . getGlobal ( ) ) ;


<s> SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ;


<s> for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; switch ( MO . getType ( ) ) { default : MI -> dump ( ) ; assert ( <NUM_LIT> && <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ;


<s> MCOperand <ISA_LIT>MCInstLower :: LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const { const MCExpr * Expr = MCSymbolRefExpr :: Create ( Sym , Ctx ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; }

if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; Expr = <ISA_LIT>MCExpr :: CreateLower16 ( Expr , Ctx ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , Ctx ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_PLT , Ctx ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;

return MCOperand :: CreateExpr ( Expr ) ;


<s> MCOp = GetSymbolRef ( MO , AP . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) , AP ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , AP . GetJTISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , AP . GetCPISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , AP . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) , AP ) ; break ; case MachineOperand :: MO_FPImmediate : {

APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ;


<s> OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> emitLabel ( Target ) ;

recordSled ( CurSled , MI , Kind , <NUM_LIT> ) ;


<s> MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , getSymbol ( MO . getGlobal ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : {


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ;


<s> SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) {

default : llvm_unreachable ( <STR_LIT> ) ;


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; }

return Ctx . GetOrCreateTemporarySymbol ( Name . str ( ) ) ;


<s> Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ; break ; } break ; }


<s> EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> EmitLabel ( Target ) ;


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> EmitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> EmitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ;


<s> public : <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { }

void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ;


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ;

if ( AP . lowerOperand ( MO , MCOp ) ) OutMI . addOperand ( MCOp ) ;


<s> break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : { MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; } case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ;


<s> State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; } } if ( State . I < State . SaveCount ) { assert ( State . I < State . MaxSaved && <STR_LIT> ) ; State . Saved [ State . I ++ ] = Inst ; if ( State . I < State . SaveCount ) return true ; } assert ( State . I == State . SaveCount && State . SaveCount > <NUM_LIT> && <STR_LIT> ) ; State . RecursiveCall = true ; switch ( State . Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardReturn ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStore ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStoreTst ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardSpLoad ( State . I , State . Saved , Out ) ; break ;


<s> if ( ( State . I == <NUM_LIT> ) && ( State . SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; } } if ( State . I < State . SaveCount ) { assert ( State . I < State . MaxSaved && <STR_LIT> ) ; State . Saved [ State . I ++ ] = Inst ; if ( State . I < State . SaveCount ) return true ; } assert ( State . I == State . SaveCount && State . SaveCount > <NUM_LIT> && <STR_LIT> ) ; State . RecursiveCall = true ; switch ( State . Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardReturn ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> :

EmitGuardLoadOrStore ( State . I , State . Saved , Out ) ;


<s> BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ;

BICInst . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ;


<s> TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ;

TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ;


<s> switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : llvm_unreachable ( <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; } } if ( State . I < State . SaveCount ) { assert ( State . I < State . MaxSaved && <STR_LIT> ) ; State . Saved [ State . I ++ ] = Inst ; if ( State . I < State . SaveCount ) return true ; } assert ( State . I == State . SaveCount && State . SaveCount > <NUM_LIT> && <STR_LIT> ) ; State . RecursiveCall = true ; switch ( State . Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( STI , State . I , State . Saved , Out ) ; break ; case <STR_LIT> : llvm_unreachable ( <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( STI , State . I , State . Saved , Out ) ;


<s> MCInst BICInst ; const int32_t EncodedMask = <STR_LIT> ( Mask ) ; assert ( EncodedMask != - <NUM_LIT> ) ; BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ;

BICInst . addOperand ( MCOperand :: CreateImm ( EncodedMask ) ) ;


<s> static void EmitBICMask ( const MCSubtargetInfo & STI , MCStreamer & Out , unsigned Addr , int64_t Pred , unsigned Mask ) { MCInst BICInst ; const int32_t EncodedMask = <STR_LIT> ( Mask ) ; assert ( EncodedMask != - <NUM_LIT> ) ; BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( EncodedMask ) ) ;

BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ;


<s> unsigned Addr = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == Addr ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ;

EmitBICMask ( STI , Out , Addr , Pred , <NUM_LIT> ) ;


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ;


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( STI , Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ;


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( STI , Out , Reg ) ;

Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ;


<s> static void EmitGuardLoadOrStoreTst ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( STI , Out , Reg ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ;


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ;

EmitBICMask ( STI , Out , <STR_LIT> , Pred , <NUM_LIT> ) ;


<s> unsigned AddrReg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SpReg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == SpReg ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( STI , Out , AddrReg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ; EmitBICMask ( STI , Out , SpReg , Pred , <NUM_LIT> ) ;


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> static void EmitIndirectGuardCall ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> static void EmitIndirectGuardJmp ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ;

int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ;


<s> TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; Out . EmitInstruction ( TSTInst , STI ) ;


<s> BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ;


<s> BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ;


<s> TSTInst . setOpcode ( <STR_LIT> ) ; TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ;

TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ;


<s> TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; Out . EmitInstruction ( TSTInst , STI ) ;


<s> <ISA_LIT>MCNaClExpander ( const MCContext & Ctx , std :: unique_ptr < MCRegisterInfo > && RI , std :: unique_ptr < MCInstrInfo > && II ) : MCNaClExpander ( Ctx , std :: move ( RI ) , std :: move ( II ) ) {


<s> MCInst Bic ; const int32_t EncodedMask = <STR_LIT> ( Mask ) ; Bic . setOpcode ( <STR_LIT> ) ; Bic . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; Bic . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; Bic . addOperand ( MCOperand :: CreateImm ( EncodedMask ) ) ; Bic . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; Bic . addOperand ( MCOperand :: CreateReg ( PredReg ) ) ; Bic . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; Out . EmitInstruction ( Bic , STI ) ;


<s> static MCInst getAddrInstr ( const MCInst & Inst , const MCInstrInfo & II , int MemIdx , unsigned Target ) { assert ( Inst . getOperand ( MemIdx ) . isReg ( ) ) ; unsigned AM2Opc = Inst . getOperand ( MemIdx + <NUM_LIT> ) . getImm ( ) ; unsigned Offset = <STR_LIT> ( AM2Opc ) ; <STR_LIT> ShOp = <STR_LIT> ( <STR_LIT> ( AM2Opc ) ) ; unsigned PredReg ; <STR_LIT> Pred = getPredicate ( Inst , II , PredReg ) ;


<s> static MCInst getConditionalBranch ( unsigned Reg , const MCInst & Inst , const MCInstrInfo & II ) { unsigned PredReg ; <STR_LIT> Pred = getPredicate ( Inst , II , PredReg ) ;


<s> unsigned Opc = Inst . getOpcode ( ) ; const MCOperandInfo * OpInfo = InstInfo . get ( Opc ) . OpInfo ; for ( int i = <NUM_LIT> , e = Inst . getNumOperands ( ) ; i < e ; i ++ ) { if ( OpInfo [ i ] . OperandType == MCOI :: OPERAND_MEMORY ) {


<s> if ( PIdx == - <NUM_LIT> ) { PredReg = <NUM_LIT> ; return <STR_LIT> ; } PredReg = Inst . getOperand ( PIdx + <NUM_LIT> ) . getReg ( ) ; return static_cast < <STR_LIT> > ( Inst . getOperand ( PIdx ) . getImm ( ) ) ;


<s> static void sandboxBaseDisp ( const MCInst & Inst , const MCInstrInfo & II , unsigned BaseReg , MCStreamer & Out , const MCSubtargetInfo & STI ) { switch ( BaseReg ) {


<s> sandboxBaseDisp ( Inst , II , Inst . getOperand ( MemIdx ) . getReg ( ) , Out , STI ) ; } else { Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( getAddrInstr ( Inst , II , MemIdx , Target ) , STI ) ; emitBicMask ( kSandboxMask , Target , Pred , PredReg , Out , STI ) ; MCInst SandboxedInst ; SandboxedInst . setOpcode ( sandboxOpcode ( Inst . getOpcode ( ) ) ) ;

SandboxedInst . addOperand ( Inst . getOperand ( RegIdx ) ) ;


<s> sandboxBaseDisp ( Inst , II , Inst . getOperand ( MemIdx ) . getReg ( ) , Out , STI ) ; } else { Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( getAddrInstr ( Inst , II , MemIdx , Target ) , STI ) ; emitBicMask ( kSandboxMask , Target , Pred , PredReg , Out , STI ) ; MCInst SandboxedInst ; SandboxedInst . setOpcode ( sandboxOpcode ( Inst . getOpcode ( ) ) ) ; SandboxedInst . addOperand ( Inst . getOperand ( RegIdx ) ) ;

SandboxedInst . addOperand ( MCOperand :: CreateReg ( Target ) ) ;


<s> return Opcode ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> static int I = <NUM_LIT> ; if ( Out . hasRawTextSupport ( ) ) { return false ; } static bool RecurseGuard = false ; if ( RecurseGuard ) return false ; DEBUG ( dbgs ( ) << <STR_LIT> ; Inst . dump ( ) ; dbgs ( ) << <STR_LIT> ) ; if ( ( I == <NUM_LIT> ) && ( SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; } } if ( I < SaveCount ) { assert ( I < MaxSaved && <STR_LIT> ) ; Saved [ I ++ ] = Inst ; if ( I < SaveCount ) return true ; } assert ( I == SaveCount && SaveCount > <NUM_LIT> && <STR_LIT> ) ; RecurseGuard = true ; switch ( Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( I , Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardReturn ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStore ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStoreTst ( I , Saved , Out ) ; break ;


<s> DEBUG ( dbgs ( ) << <STR_LIT> ; Inst . dump ( ) ; dbgs ( ) << <STR_LIT> ) ; if ( ( I == <NUM_LIT> ) && ( SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; } } if ( I < SaveCount ) { assert ( I < MaxSaved && <STR_LIT> ) ; Saved [ I ++ ] = Inst ; if ( I < SaveCount ) return true ; } assert ( I == SaveCount && SaveCount > <NUM_LIT> && <STR_LIT> ) ; RecurseGuard = true ; switch ( Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( I , Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( I , Saved , Out ) ; break ;


<s> if ( FlagSfiZeroMask ) { BICInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; } else { BICInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; } BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; Out . EmitInstruction ( BICInst ) ;


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == Addr ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; EmitBICMask ( Out , Addr , Pred , <NUM_LIT> ) ; Out . EmitBundleUnlock ( ) ;


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == Addr ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; EmitBICMask ( Out , Addr , Pred , <NUM_LIT> ) ;


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; Out . EmitBundleLock ( true ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ;


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ;


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ;

Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ;


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ;


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( Out , Reg ) ;


<s> static void EmitGuardReturn ( int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , <STR_LIT> , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; Out . EmitBundleUnlock ( ) ;


<s> assert ( ( <STR_LIT> == SpReg ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , AddrReg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; EmitBICMask ( Out , SpReg , Pred , <NUM_LIT> ) ; Out . EmitBundleUnlock ( ) ;


<s> Out . EmitBundleLock ( true ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ;


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; Out . EmitBundleUnlock ( ) ;


<s> Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ;


<s> static void EmitTST ( MCStreamer & Out , unsigned Reg ) { const unsigned Mask = <NUM_LIT> ; MCInst TSTInst ; TSTInst . setOpcode ( <STR_LIT> ) ; TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; if ( FlagSfiZeroMask ) { TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; } else { TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ;


<s> TSTInst . setOpcode ( <STR_LIT> ) ; TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; if ( FlagSfiZeroMask ) { TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; } else {

TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ;


<s> return createMachOStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , false , DWARFMustBeAtTheEnd ) ;


<s> else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ;

MAI -> addInitialFrameState ( MCCFIInstruction :: cfiDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ;


<ISA_LIT>_MC :: initLLVMToCVRegMapping ( X ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; }

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , CPU , ArchFS ) ;


<s> if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; }


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {

return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) , T . isAndroid ( ) ) ;


<s> bool evaluateBranch ( const MCInst & Inst , uint64_t Addr , uint64_t Size , uint64_t & Target ) const override { const MCInstrDesc & Desc = Info -> get ( Inst . getOpcode ( ) ) ; for ( unsigned OpNum = <NUM_LIT> ; OpNum < Desc . getNumOperands ( ) ; ++ OpNum ) { if ( Inst . getOperand ( OpNum ) . isImm ( ) && Desc . OpInfo [ OpNum ] . OperandType == MCOI :: OPERAND_PCREL ) { int64_t Imm = Inst . getOperand ( OpNum ) . getImm ( ) ; Target = <ISA_LIT>_MC :: evaluateBranchTarget ( Desc , Addr , Imm ) ; return true ; } } return false ;


<s> const MCInstrDesc & Desc = Info -> get ( Inst . getOpcode ( ) ) ; for ( unsigned OpNum = <NUM_LIT> ; OpNum < Desc . getNumOperands ( ) ; ++ OpNum ) {

if ( Inst . getOperand ( OpNum ) . isImm ( ) && Desc . OpInfo [ OpNum ] . OperandType == MCOI :: OPERAND_PCREL ) {


<s> uint64_t Offset = ( ( InstDesc . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ;

if ( InstDesc . getOpcode ( ) == <STR_LIT> ) Addr &= ~ <NUM_LIT> ;


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || MO2 . getReg ( ) || ! MO3 . isImm ( ) ) return None ; unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> Op = <STR_LIT> ( MO3 . getImm ( ) ) ;

if ( Op == <STR_LIT> ) return Addr - ImmOffs ;


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrMode3 ( const MCInst & Inst , const MCInstrDesc & Desc , unsigned MemOpIndex , uint64_t Addr ) { if ( MemOpIndex + <NUM_LIT> >= Desc . getNumOperands ( ) ) return None ; const MCOperand & MO1 = Inst . getOperand ( MemOpIndex ) ; const MCOperand & MO2 = Inst . getOperand ( MemOpIndex + <NUM_LIT> ) ;

const MCOperand & MO3 = Inst . getOperand ( MemOpIndex + <NUM_LIT> ) ;


<s> if ( MemOpIndex + <NUM_LIT> >= Desc . getNumOperands ( ) ) return None ; const MCOperand & MO1 = Inst . getOperand ( MemOpIndex ) ; const MCOperand & MO2 = Inst . getOperand ( MemOpIndex + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; <STR_LIT> Op = <STR_LIT> ( MO2 . getImm ( ) ) ;

if ( Op == <STR_LIT> ) return Addr - ImmOffs * <NUM_LIT> ;


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrModeT1_s ( const MCInst & Inst , const MCInstrDesc & Desc , unsigned MemOpIndex , uint64_t Addr ) {

return evaluateMemOpAddrForAddrModeT2_pc ( Inst , Desc , MemOpIndex , Addr ) ;


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ;


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ;

int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ;


<s> switch ( Desc . TSFlags & <STR_LIT> ) { default : Addr += <NUM_LIT> ; break ; case <STR_LIT> : Addr += <NUM_LIT> ; break ; case <STR_LIT> : Addr += STI -> getFeatureBits ( ) [ <STR_LIT> ] ? <NUM_LIT> : <NUM_LIT> ; break ; } unsigned AddrMode = ( TSFlags & <STR_LIT> ) ; switch ( AddrMode ) { default : return None ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode_i12 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode3 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode5 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode5FP16 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> :

return evaluateMemOpAddrForAddrModeT2_i8s4 ( Inst , Desc , OpIndex , Addr ) ;


<s> static bool get<ISA_LIT>StoreDeprecationInfo ( MCInst & MI , const MCSubtargetInfo & STI , std :: string & Info ) {

assert ( ! STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && <STR_LIT> ) ;


<s> if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) {


<s> static bool getMRCDeprecationInfo ( MCInst & MI , const MCSubtargetInfo & STI , std :: string & Info ) { if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && ( ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) || ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) ) { Info = <STR_LIT> <STR_LIT> ; return true ; }


<s> if ( MO . isReg ( ) && MO . getReg ( ) == <STR_LIT> && Desc . OpInfo [ I ] . isOptionalDef ( ) ) return true ;


<s> bool <ISA_LIT>_MC :: isCPSRDefined ( const MCInst & MI , const MCInstrInfo * MCII ) { const MCInstrDesc & Desc = MCII -> get ( MI . getOpcode ( ) ) ; for ( unsigned I = <NUM_LIT> ; I < MI . getNumOperands ( ) ; ++ I ) { const MCOperand & MO = MI . getOperand ( I ) ; if ( MO . isReg ( ) && MO . getReg ( ) == <STR_LIT> && Desc . OpInfo [ I ] . isOptionalDef ( ) ) return true ;


<s> return PredOpIdx != - <NUM_LIT> && MI . getOperand ( PredOpIdx ) . getImm ( ) != <STR_LIT> ;


<s> bool <ISA_LIT>_MC :: isPredicated ( const MCInst & MI , const MCInstrInfo * MCII ) {

const MCInstrDesc & Desc = MCII -> get ( MI . getOpcode ( ) ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>TargetMC ( ) { for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>LEAsmBackend ) ; } for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ;

TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>BEAsmBackend ) ;


<s> std :: string <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSWindows ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; }


<s> <ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) : MCInstrAnalysis ( Info ) {


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , MCAsmBackend & MAB , raw_pwrite_stream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) {

return createMachOStreamer ( Ctx , MAB , OS , Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> return createMachOStreamer ( Ctx , MAB , OS , Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ; return MAI ;


<s> RM = TT . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; }

X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { RM = TT . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; } X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) {

if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) { return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) {

return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; return X ;


<s> MCSubtargetInfo * <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = FS ; }

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , ArchFS ) ;


<s> return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , T . getArch ( ) == Triple :: thumb ) ;


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , MCAsmBackend & MAB , raw_pwrite_stream & OS , MCCodeEmitter * Emitter , bool RelaxAll ) { return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , T . getArch ( ) == Triple :: thumb ) ;


<s> int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Imm + <NUM_LIT> ; return true ;


<s> assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; bool ListContainsPC = false , ListContainsLR = false ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) { assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ;

switch ( MI . getOperand ( OI ) . getReg ( ) ) {


<s> assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ;

if ( MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> || MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> ) {


<s> if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) != <NUM_LIT> ) { Info = <STR_LIT> <STR_LIT> ; return true ; }


<s> static bool getITDeprecationInfo ( MCInst & MI , const MCSubtargetInfo & STI , std :: string & Info ) { if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) != <NUM_LIT> ) { Info = <STR_LIT> <STR_LIT> ; return true ; } return false ;


<s> Info = <STR_LIT> ; return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) { Info = <STR_LIT> ; return true ; }


<s> if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return false ; return MCInstrAnalysis :: isConditionalBranch ( Inst ) ;


<s> if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return false ;

return MCInstrAnalysis :: isConditionalBranch ( Inst ) ;


<s> bool isUnconditionalBranch ( const MCInst & Inst ) const override {

if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return true ;


<s> bool isUnconditionalBranch ( const MCInst & Inst ) const override { if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return true ; return MCInstrAnalysis :: isUnconditionalBranch ( Inst ) ;


<s> TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & The<ISA_LIT>LETarget , & TheThumbLETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & The<ISA_LIT>BETarget , & TheThumbBETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ;

TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>LETarget , create<ISA_LIT>LEAsmBackend ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & The<ISA_LIT>LETarget , & TheThumbLETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & The<ISA_LIT>BETarget , & TheThumbBETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>LETarget , create<ISA_LIT>LEAsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>BETarget , create<ISA_LIT>BEAsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( TheThumbLETarget , createThumbLEAsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( TheThumbBETarget , createThumbBEAsmBackend ) ;


<s> if ( ArchID != <STR_LIT> && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; }


<s> unsigned ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) {


<s> Triple TheTriple ( TT ) ; RM = TheTriple . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; } X -> InitMCCodeGenInfo ( RM , CM , OL ) ; return X ;


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { Triple TheTriple ( TT ) ; RM = TheTriple . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; }

X -> InitMCCodeGenInfo ( RM , CM , OL ) ;


<s> MCSubtargetInfo * <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ( StringRef TT , StringRef CPU , StringRef FS ) { std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; else ArchFS = FS ; } MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , ArchFS ) ; return X ;


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool NoExecStack ) { Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) return createMachOStreamer ( Ctx , MAB , OS , Emitter , false ) ; if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; } return createELFStreamer ( Ctx , MAB , OS , Emitter , false , NoExecStack ) ;


<s> if ( TheTriple . isOSDarwin ( ) ) return createMachOStreamer ( Ctx , MAB , OS , Emitter , false ) ; if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; }

return createELFStreamer ( Ctx , MAB , OS , Emitter , false , NoExecStack ) ;


<s> const auto & Op = MI . getOperand ( I ) ; if ( Op . isReg ( ) && Op . getReg ( ) == BaseReg ) return true ;


<s> bool isLDMBaseRegInList ( const Inst & MI ) { auto BaseReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; for ( unsigned I = <NUM_LIT> , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { const auto & Op = MI . getOperand ( I ) ; if ( Op . isReg ( ) && Op . getReg ( ) == BaseReg ) return true ; } return false ;


<s> inline bool isVpred ( uint8_t op ) {

return isVpred ( static_cast < OperandType > ( op ) ) ;


<s> return isVpred ( static_cast < OperandType > ( op ) ) ;


<s> bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) {


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) { return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> return new ThumbMCInstrAnalysis ( Info ) ;


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ OpId ] . OperandType != MCOI :: OPERAND_PCREL ) return false ;

Target = Addr + Inst . getOperand ( OpId ) . getImm ( ) + <NUM_LIT> ;


<s> TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , createThumbMCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>LEAsmBackend ) ; } for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ;

TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>BEAsmBackend ) ;


<s> ThumbMCInstrAnalysis ( const MCInstrInfo * Info ) : <ISA_LIT>MCInstrAnalysis ( Info ) {


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Imm + <NUM_LIT> ; return true ;


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , ( T . getArch ( ) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ;

TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ;


<s> TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , createThumbMCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ;

for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ;


<s> std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) {


<s> std :: string <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; }


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) {

return createMachOStreamer ( Ctx , MAB , OS , Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) { return createMachOStreamer ( Ctx , MAB , OS , Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> else MAI = new <ISA_LIT>ELFMCAsmInfo ( TT ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ;


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( StringRef Triple ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ;


<s> static MCRelocationInfo * create<ISA_LIT>MCRelocationInfo ( StringRef TT , MCContext & Ctx ) { Triple TheTriple ( TT ) ; if ( TheTriple . isOSBinFormatMachO ( ) ) return create<ISA_LIT>MachORelocationInfo ( Ctx ) ;

return llvm :: createMCRelocationInfo ( TT , Ctx ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = FS ; }

MCSubtargetInfo * X = new MCSubtargetInfo ( ) ;


<s> std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = FS ; } MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , ArchFS ) ; return X ;


<s> return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , T . getArch ( ) == Triple :: thumb ) ;


<s> for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) { assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ; switch ( MI . getOperand ( OI ) . getReg ( ) ) {


<s> assert ( ( ~ STI . getFeatureBits ( ) & llvm :: <STR_LIT> ) && <STR_LIT> ) ; assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) { assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ; if ( MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> || MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> ) { Info = <STR_LIT> ;


<s> if ( STI . getFeatureBits ( ) & llvm :: <STR_LIT> && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) != <NUM_LIT> ) { Info = <STR_LIT> <STR_LIT> ; return true ; } return false ;


<s> return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) {


<s> if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7s : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7 : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6t2 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6k : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6m : isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5te : <ISA_LIT>ArchFeature = <STR_LIT> ; break ;


<s> std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) {

if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; }

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , ArchFS ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : OpId = <NUM_LIT> ; break ; case <STR_LIT> : OpId = <NUM_LIT> ; break ; } if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ OpId ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; Target = Addr + Inst . getOperand ( OpId ) . getImm ( ) + <NUM_LIT> ;


<s> for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , createThumbMCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>LEAsmBackend ) ; } for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>BEAsmBackend ) ; }


<s> if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin ( ) ;


if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin ( ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { Triple TheTriple ( TT ) ;

RM = TheTriple . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCSubtargetInfo & STI ) {

if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , STI ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; else ArchFS = FS ; } MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , ArchFS ) ; return X ;


<s> std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ;


<s> Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) return createMachOStreamer ( Ctx , MAB , OS , Emitter , RelaxAll ) ; if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; return NULL ; }

return createELFStreamer ( Ctx , MAB , OS , Emitter , RelaxAll , NoExecStack ) ;


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool NoExecStack ) {


<s> uint64_t evaluateBranch ( const MCInst & Inst , uint64_t Addr , uint64_t Size ) const { if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL ) return - <NUM_LIT> ;

int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> virtual bool isConditionalBranch ( const MCInst & Inst ) const { if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return false ; return MCInstrAnalysis :: isConditionalBranch ( Inst ) ;


<s> virtual bool isUnconditionalBranch ( const MCInst & Inst ) const { if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return true ;

return MCInstrAnalysis :: isUnconditionalBranch ( Inst ) ;


<s> RegisterMCAsmInfoFn A ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbTarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbTarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbTarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbTarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbTarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbTarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCCodeEmitter ( TheThumbTarget , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( TheThumbTarget , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCObjectStreamer ( TheThumbTarget , createMCStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;

TargetRegistry :: RegisterMCInstPrinter ( TheThumbTarget , create<ISA_LIT>MCInstPrinter ) ;


<s> } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) {

if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) {

if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {

return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , OS , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; }


<s> MCAsmInfo * MAI ; if ( TheTriple . isOSDarwin ( ) || TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TheTriple ) ; else if ( TheTriple . isWindowsMSVCEnvironment ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ;

else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TheTriple , const MCTargetOptions & Options ) { MCAsmInfo * MAI ; if ( TheTriple . isOSDarwin ( ) || TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TheTriple ) ; else if ( TheTriple . isWindowsMSVCEnvironment ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ; return MAI ;


<s> MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } break ; default : if ( TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TT ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TT ) ; break ; } unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ;

MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ;


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI , STI ) ; return nullptr ;


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI , STI ) ;


<s> Triple TheTriple ( TT ) ; switch ( TheTriple . getObjectFormat ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case Triple :: MachO : { MCStreamer * S = createMachOStreamer ( Ctx , MAB , OS , Emitter , false ) ; new <ISA_LIT>TargetStreamer ( * S ) ; return S ; } case Triple :: COFF : assert ( TheTriple . isOSWindows ( ) && <STR_LIT> ) ; return create<ISA_LIT>WinCOFFStreamer ( Ctx , MAB , * Emitter , OS ) ; case Triple :: ELF :

return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , NoExecStack , TheTriple . getArch ( ) == Triple :: thumb ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>LETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn Y ( The<ISA_LIT>BETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn A ( TheThumbLETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbBETarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbLETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbBETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbLETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbBETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbLETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbBETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>LETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>BETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbLETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbBETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbLETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbBETarget , create<ISA_LIT>MCInstrAnalysis ) ;

TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>LETarget , create<ISA_LIT>LEMCCodeEmitter ) ;


<s> RegisterMCAsmInfoFn A ( TheThumbLETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbBETarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbLETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbBETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbLETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbBETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbLETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbBETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>LETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>BETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbLETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbBETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbLETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbBETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>LETarget , create<ISA_LIT>LEMCCodeEmitter ) ;

TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>BETarget , create<ISA_LIT>BEMCCodeEmitter ) ;


<s> if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( triple . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ;


<s> if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ;

} else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> if ( TheTriple . isOSNaCl ( ) ) { MAI -> setExceptionsType ( ExceptionHandling :: DwarfCFI ) ; MachineLocation Dst ( MachineLocation :: VirtualFP ) ; MachineLocation Src ( <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( <NUM_LIT> , Dst , Src ) ;


<s> unsigned Idx = <NUM_LIT> ; bool isThumb = false ; if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) Idx = <NUM_LIT> ; else if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) { isThumb = true ; if ( Len >= <NUM_LIT> && TT [ <NUM_LIT> ] == 'v' ) Idx = <NUM_LIT> ; } bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) {


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( const Triple & TT , const MCTargetOptions & Options ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;


<s> OpId = <NUM_LIT> ; break ; } if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ OpId ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; Target = Addr + Inst . getOperand ( OpId ) . getImm ( ) + <NUM_LIT> ; return true ;


<s> case Triple :: <ISA_LIT>SubArch_v6t2 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6k : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6m : isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5te : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v4t : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: NoSubArch : break ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ;


<s> isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5te : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v4t : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: NoSubArch : break ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } return <ISA_LIT>ArchFeature ;


<s> if ( Inst . getOperand ( OpNum ) . isImm ( ) && Desc . OpInfo [ OpNum ] . OperandType == MCOI :: OPERAND_PCREL ) { Imm = Inst . getOperand ( OpNum ) . getImm ( ) ; FoundImm = true ; } } if ( ! FoundImm ) return false ; uint64_t Offset = ( ( Desc . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; Target = Addr + Imm + Offset ;


<s> if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin ( ) ; return new <ISA_LIT>ELFMCAsmInfo ( ) ;


if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin ( ) ;


<s> static MCRelocationInfo * create<ISA_LIT>MCRelocationInfo ( StringRef TT , MCContext & Ctx ) { Triple TheTriple ( TT ) ; if ( TheTriple . isEnvironmentMachO ( ) ) return create<ISA_LIT>MachORelocationInfo ( Ctx ) ;

return llvm :: createMCRelocationInfo ( TT , Ctx ) ;


<s> unsigned Idx = <NUM_LIT> ; bool isThumb = false ; if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) Idx = <NUM_LIT> ; else if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) { isThumb = true ; if ( Len >= <NUM_LIT> && TT [ <NUM_LIT> ] == 'v' ) Idx = <NUM_LIT> ; } bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer == '8' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '7' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ;

} else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) {


<s> return new <ISA_LIT>ALFWriter ( mii , mri ) ;


<s> static ALFWriter * createALFWriter ( const MCInstrInfo * mii , const MCRegisterInfo * mri ) {

return new <ISA_LIT>ALFWriter ( mii , mri ) ;


<s> TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>LETarget ( ) , create<ISA_LIT>LEAsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>BETarget ( ) , create<ISA_LIT>BEAsmBackend ) ;

TargetRegistry :: RegisterMCAsmBackend ( getTheThumbLETarget ( ) , createThumbLEAsmBackend ) ;


<s> TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>LETarget ( ) , create<ISA_LIT>LEAsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>BETarget ( ) , create<ISA_LIT>BEAsmBackend ) ;


<s> else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ;


<s> MCAsmInfo * MAI ; if ( TheTriple . isOSDarwin ( ) || TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TheTriple ) ; else if ( TheTriple . isWindowsItaniumEnvironment ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else if ( TheTriple . isWindowsMSVCEnvironment ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ;

unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { Triple TheTriple ( TT ) ; RM = TheTriple . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; }

X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> assert ( ! STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && <STR_LIT> ) ; assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; bool ListContainsPC = false , ListContainsLR = false ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) {

assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ;


<s> static bool get<ISA_LIT>LoadDeprecationInfo ( MCInst & MI , MCSubtargetInfo & STI , std :: string & Info ) { assert ( ! STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && <STR_LIT> ) ; assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; bool ListContainsPC = false , ListContainsLR = false ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) {


<s> static bool getMCRDeprecationInfo ( MCInst & MI , MCSubtargetInfo & STI , std :: string & Info ) { if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) { if ( ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) { if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) {


<s> Triple triple ( TT ) ; bool isThumb = triple . getArch ( ) == Triple :: thumb || triple . getArch ( ) == Triple :: thumbeb ; bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; switch ( triple . getSubArch ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case Triple :: <ISA_LIT>SubArch_v8 : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v8_1a : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7m : isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7em :


<s> else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v8_1a : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7m : isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7em : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7s : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7 : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6t2 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6k :


<s> TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ;

TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ;