<s> { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , } ; if ( Kind < FirstTargetFixupKind ) return MCCodeEmitter :: getFixupKindInfo ( Kind ) ;

assert ( unsigned ( Kind - FirstTargetFixupKind ) < getNumFixupKinds ( ) && <STR_LIT> ) ;


<s> const MCFixupKindInfo & getFixupKindInfo ( MCFixupKind Kind ) const { const static MCFixupKindInfo Infos [ ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , } ;

if ( Kind < FirstTargetFixupKind ) return MCCodeEmitter :: getFixupKindInfo ( Kind ) ;


<s> unsigned getImmMinusOneOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const {

return MI . getOperand ( Op ) . getImm ( ) - <NUM_LIT> ;


<s> return MI . getOperand ( Op ) . getImm ( ) - <NUM_LIT> ;


<s> switch ( Mode ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> uint32_t getLdStmModeOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { <STR_LIT> Mode = ( <STR_LIT> ) MI . getOperand ( OpIdx ) . getImm ( ) ; switch ( Mode ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; } llvm_unreachable ( <STR_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( const MCSymbolRefExpr * Expr = dyn_cast < MCSymbolRefExpr > ( MO . getExpr ( ) ) ) { MCFixupKind Kind ; switch ( Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case MCSymbolRefExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( <STR_LIT> ) ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_LO16 : Kind = MCFixupKind ( <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; return <NUM_LIT> ; } ; llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT> ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( const MCSymbolRefExpr * Expr = dyn_cast < MCSymbolRefExpr > ( MO . getExpr ( ) ) ) {


<s> unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else {

for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) {


<s> unsigned getRotImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { switch ( MI . getOperand ( Op ) . getImm ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; } return <NUM_LIT> ;


<s> unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ;


<s> MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ;


<s> return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const {

return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLXTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ;


<s> unsigned Bit24 = EncodedValue & <NUM_LIT> ; unsigned Bit28 = Bit24 << <NUM_LIT> ; EncodedValue &= <NUM_LIT> ; EncodedValue |= Bit28 ; EncodedValue |= <NUM_LIT> ; } return EncodedValue ;


<s> if ( Subtarget . isThumb2 ( ) ) { unsigned Bit24 = EncodedValue & <NUM_LIT> ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2DupPostEncoder ( const MCInst & MI , unsigned EncodedValue ) const { const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) {


<s> const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; }


<s> if ( TM . getSubtarget < <ISA_LIT>Subtarget > ( ) . isThumb2 ( ) ) {


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , const MCSubtargetInfo & sti , MCContext & ctx ) : MCII ( mcii ) , STI ( sti ) , CTX ( ctx ) {


<s> bool <ISA_LIT>MCCodeEmitter :: EncodeAddrModeOpValues ( const MCInst & MI , unsigned OpIdx , unsigned & Reg , unsigned & Imm , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; int32_t SImm = MO1 . getImm ( ) ; bool isAdd = true ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Imm = MO1 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isReg = MO . getReg ( ) != <NUM_LIT> ; uint32_t Binary = <STR_LIT> ( Imm ) ; if ( isReg ) { <STR_LIT> ShOp = <STR_LIT> ( Imm ) ; Binary <<= <NUM_LIT> ; Binary |= getShiftOp ( ShOp ) << <NUM_LIT> ; Binary |= CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; } return Binary | ( isAdd << <NUM_LIT> ) | ( isReg << <NUM_LIT> ) ;


<s> getAddrMode2OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const {

const MCOperand & MO = MI . getOperand ( OpIdx ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrMode3OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) { unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ;

return ( Rn << <NUM_LIT> ) | Imm8 | ( isAdd << <NUM_LIT> ) | ( isImm << <NUM_LIT> ) ;


<s> case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align << <NUM_LIT> ) ;


<s> switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align << <NUM_LIT> ) ;


<s> const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; }


<s> const MCOperand & MO = MI . getOperand ( Op ) ;

if ( MO . getReg ( ) == <NUM_LIT> ) return <NUM_LIT> ;


<s> case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align << <NUM_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd = false ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ;

if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ;


<s> Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return Binary ;


<s> unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm5 = MO1 . getImm ( ) ;

return ( ( Imm5 & <NUM_LIT> ) << <NUM_LIT> ) | Rn ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeISOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ;


<s> getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Rm = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ; unsigned ShImm = <STR_LIT> ( MO2 . getImm ( ) ) ;

bool isAdd = <STR_LIT> ( MO2 . getImm ( ) ) == <STR_LIT> ;


<s> unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg ) ; switch ( Reg ) { default : return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ;


<s> bool SPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; bool DPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) {

unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ;


<s> unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; } }


<s> getSORegImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> :


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ;


<s> unsigned Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ;

const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ;


<s> assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ;

} else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ;


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ;

const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ;


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t Val = MO . getImm ( ) ; if ( Val == INT32_MIN ) Val = <NUM_LIT> ; else if ( Val < <NUM_LIT> ) {


<s> int32_t Val = MO . getImm ( ) ; if ( Val == INT32_MIN ) Val = <NUM_LIT> ; else if ( Val < <NUM_LIT> ) { Val *= - <NUM_LIT> ; Val |= <NUM_LIT> ; }


<s> getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const {

int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm ( ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const {


<s> case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT> ) return Binary ;

return Binary | <STR_LIT> ( MO1 . getImm ( ) ) << <NUM_LIT> ;


<s> unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ;

unsigned Rm = CTX . getRegisterInfo ( ) . getEncodingValue ( MO2 . getReg ( ) ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , true ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg = <NUM_LIT> , Imm12 = <NUM_LIT> ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isReg ( ) ) { const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( MO1 . isImm ( ) ) { isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups , STI ) ; } else if ( MO1 . isExpr ( ) ) { assert ( ! isThumb ( STI ) && ! isThumb2 ( STI ) && <STR_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; isAdd = false ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO1 . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; } } else if ( MO . isExpr ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ;


<s> assert ( ! isThumb ( STI ) && ! isThumb2 ( STI ) && <STR_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; isAdd = false ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO1 . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; } } else if ( MO . isExpr ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ;


<s> Fixups . push_back ( llvm :: MCFixup :: create ( <NUM_LIT> , DiffExpr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } assert ( MO . isImm ( ) && BranchMO . isImm ( ) ) ; int Diff = MO . getImm ( ) - BranchMO . getImm ( ) ;

assert ( Diff == <NUM_LIT> || Diff == <NUM_LIT> ) ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; const MCOperand BranchMO = MI . getOperand ( <NUM_LIT> ) ; if ( MO . isExpr ( ) ) { assert ( BranchMO . isExpr ( ) ) ; const MCExpr * DiffExpr = MCBinaryExpr :: createSub ( MO . getExpr ( ) , BranchMO . getExpr ( ) , CTX ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( llvm :: MCFixup :: create ( <NUM_LIT> , DiffExpr , Kind , MI . getLoc ( ) ) ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getBFTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

const MCOperand MO = MI . getOperand ( OpIdx ) ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , fixup , Fixups , STI ) ;

return isNeg ? - ( MO . getImm ( ) >> <NUM_LIT> ) : ( MO . getImm ( ) >> <NUM_LIT> ) ;


<s> getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ;

assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> && <STR_LIT> ) ;


<s> assert ( CondMO . isImm ( ) && <STR_LIT> ) ; if ( CondMO . getImm ( ) & <NUM_LIT> ) { unsigned LowBit = Mask & - Mask ; unsigned BitsAboveLowBit = <NUM_LIT> & ( - LowBit << <NUM_LIT> ) ; Mask ^= BitsAboveLowBit ;


<s> unsigned Mask = MaskMO . getImm ( ) ; assert ( OpIdx > <NUM_LIT> && <STR_LIT> ) ; const MCOperand CondMO = MI . getOperand ( OpIdx - <NUM_LIT> ) ; assert ( CondMO . isImm ( ) && <STR_LIT> ) ; if ( CondMO . getImm ( ) & <NUM_LIT> ) { unsigned LowBit = Mask & - Mask ; unsigned BitsAboveLowBit = <NUM_LIT> & ( - LowBit << <NUM_LIT> ) ; Mask ^= BitsAboveLowBit ; } return Mask ;


<s> return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isDFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( bit_cast < double > ( MO . getDFPImm ( ) ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; }


<s> unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; int32_t Imm = M1 . getImm ( ) ; bool isAdd = Imm >= <NUM_LIT> ; Imm >>= shift ; if ( ! isAdd ) Imm = - ( uint32_t ) Imm ; Imm &= <NUM_LIT> ;


<s> Imm >>= shift ; if ( ! isAdd ) Imm = - ( uint32_t ) Imm ; Imm &= <NUM_LIT> ; if ( isAdd ) Imm |= <NUM_LIT> ; assert ( Qm < <NUM_LIT> && <STR_LIT> ) ;


<s> const MCOperand & M0 = MI . getOperand ( OpIdx ) ; const MCOperand & M1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M1 . getReg ( ) ) ;

assert ( Qm < <NUM_LIT> && <STR_LIT> ) ;


<s> getMveAddrModeRQOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & M0 = MI . getOperand ( OpIdx ) ; const MCOperand & M1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M1 . getReg ( ) ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getMVEPairVectorIndexOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ;

assert ( MO . isImm ( ) && <STR_LIT> ) ;


<s> getPowerTwoOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ;

return countTrailingZeros ( ( uint64_t ) MO . getImm ( ) ) ;


<s> getPowerTwoOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; return countTrailingZeros ( ( uint64_t ) MO . getImm ( ) ) ;


<s> getRegisterListOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg = MI . getOperand ( Op ) . getReg ( ) ; bool SPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; bool DPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) -- NumRegs ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { const MCRegisterInfo & MRI = * CTX . getRegisterInfo ( ) ; assert ( is_sorted ( drop_begin ( MI , Op ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = MRI . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; }


<s> case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> unsigned getShiftOp ( <STR_LIT> ShOpc ) const { switch ( ShOpc ) { case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ;


<s> bool isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm7 , Fixups , STI ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm7s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg , Imm7 ; bool isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm7 , Fixups , STI ) ; uint32_t Binary = ( Imm7 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; assert ( ( ( Imm8 & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> int32_t Imm = MI . getOperand ( OpIdx ) . getImm ( ) ; bool isAdd = Imm >= <NUM_LIT> ; if ( Imm < <NUM_LIT> ) Imm = - ( uint32_t ) Imm ;


<s> Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } unsigned SoImm = MO . getImm ( ) ; unsigned Encoded = <STR_LIT> ( SoImm ) ; assert ( Encoded != ~ <NUM_LIT> && <STR_LIT> ) ; return Encoded ;


<s> unsigned Bit = ( Value >> i ) & <NUM_LIT> ; if ( ( Value & ~ ( ~ <NUM_LIT> << i ) ) == <NUM_LIT> ) { Imm |= ( <NUM_LIT> << i ) ; break ; } if ( Bit != PrevBit ) Imm |= ( <NUM_LIT> << i ) ; PrevBit = Bit ; }


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getVPTMaskOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; int Value = MO . getImm ( ) ; int Imm = <NUM_LIT> ; unsigned PrevBit = <NUM_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; -- i ) { unsigned Bit = ( Value >> i ) & <NUM_LIT> ; if ( ( Value & ~ ( ~ <NUM_LIT> << i ) ) == <NUM_LIT> ) {


<s> unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) -- NumRegs ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { const MCRegisterInfo & MRI = * CTX . getRegisterInfo ( ) ; assert ( std :: is_sorted ( MI . begin ( ) + Op , MI . end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = MRI . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; } } return Binary ;


<s> if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { const MCRegisterInfo & MRI = * CTX . getRegisterInfo ( ) ; assert ( std :: is_sorted ( MI . begin ( ) + Op , MI . end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = MRI . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; }


<s> unsigned getExpandedImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { static_assert ( shift <= <NUM_LIT> , <STR_LIT> ) ; const MCOperand MO = MI . getOperand ( Op ) ;

return ( invert ? ( MO . getImm ( ) ^ <NUM_LIT> ) : MO . getImm ( ) ) >> shift ;


<s> unsigned getExpandedImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

static_assert ( shift <= <NUM_LIT> , <STR_LIT> ) ;


<s> } else { const MCRegisterInfo & MRI = * CTX . getRegisterInfo ( ) ; if ( ! CLRMRegs ) { assert ( std :: is_sorted ( MI . begin ( ) + Op , MI . end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; } for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo ;

if ( CLRMRegs && MI . getOperand ( I ) . getReg ( ) == <STR_LIT> ) {


<s> unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= ( Bits + <NUM_LIT> ) ;

int32_t tmp = ( int32_t ) MO2 . getImm ( ) >> Shift ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , MCContext & ctx ) : MCII ( mcii ) , CTX ( ctx ) {


<s> EmitByte ( Val & <NUM_LIT> , OS ) ; Val >>= <NUM_LIT> ; }


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; int32_t SImm = MO1 . getImm ( ) ; bool isAdd = true ; if ( SImm == INT32_MIN ) { SImm = <NUM_LIT> ; isAdd = false ; }


<s> int Size ; if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize ( ) == <NUM_LIT> ) Size = Desc . getSize ( ) ; else llvm_unreachable ( <STR_LIT> ) ; uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; if ( isThumb ( STI ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> , <NUM_LIT> , OS ) ;

EmitConstant ( Binary & <NUM_LIT> , <NUM_LIT> , OS ) ;


<s> void <ISA_LIT>MCCodeEmitter :: EncodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t TSFlags = Desc . TSFlags ; if ( ( TSFlags & <STR_LIT> ) == <STR_LIT> ) return ; int Size ;

if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize ( ) == <NUM_LIT> ) Size = Desc . getSize ( ) ;


<s> uint32_t S = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t J1 = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t J2 = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; J1 = ( ~ J1 & <NUM_LIT> ) ; J2 = ( ~ J2 & <NUM_LIT> ) ; J1 ^= S ; J2 ^= S ;


<s> switch ( Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCExpr :: SymbolRef : return false ;


<s> getAddrMode2OffsetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Imm = MO1 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isReg = MO . getReg ( ) != <NUM_LIT> ; uint32_t Binary = <STR_LIT> ( Imm ) ; if ( isReg ) { <STR_LIT> ShOp = <STR_LIT> ( Imm ) ; Binary <<= <NUM_LIT> ;

Binary |= getShiftOp ( ShOp ) << <NUM_LIT> ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrMode2OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

const MCOperand & MO = MI . getOperand ( OpIdx ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; uint32_t Binary = getAddrMode2OffsetOpValue ( MI , OpIdx + <NUM_LIT> , Fixups , STI ) ; Binary |= Rn << <NUM_LIT> ; return Binary ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Imm = MO1 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; return Imm8 | ( isAdd << <NUM_LIT> ) | ( isImm << <NUM_LIT> ) ;


<s> Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ;

bool isImm = MO1 . getReg ( ) == <NUM_LIT> ;


<s> Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; isAdd = <STR_LIT> ( Imm8 ) == <STR_LIT> ; } uint32_t Binary = <STR_LIT> ( Imm8 ) ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return Binary ;


<s> getAddrMode6AddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ;

unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ;


<s> getAddrMode6DupAddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ;


<s> getAddrMode6OffsetOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ;

if ( MO . getReg ( ) == <NUM_LIT> ) return <NUM_LIT> ;


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups , STI ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; }


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return ( MO . getImm ( ) >> <NUM_LIT> ) ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; assert ( MI . getOperand ( OpIdx ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ; return MO1 . getImm ( ) & <NUM_LIT> ;


<s> } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } } else { SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ;


<s> if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; } return MO . getImm ( ) >> <NUM_LIT> ;


<s> get<ISA_LIT>BLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

const MCOperand MO = MI . getOperand ( OpIdx ) ;


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return MO . getImm ( ) >> <NUM_LIT> ;


<s> if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; }


<s> getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ;

uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ;


<s> const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ;

assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> && <STR_LIT> ) ;


getBranchTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getBranchTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return get<ISA_LIT>BranchTargetOpValue ( MI , OpIdx , Fixups , STI ) ;


<s> unsigned getCCOutOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return MI . getOperand ( Op ) . getReg ( ) == <STR_LIT> ;


<s> unsigned getCCOutOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

return MI . getOperand ( Op ) . getReg ( ) == <STR_LIT> ;


<s> } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetMachO ( STI ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetMachO ( STI ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ;


<s> switch ( Mode ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> unsigned Rm = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; unsigned ShImm = <STR_LIT> ( MO2 . getImm ( ) ) ; bool isAdd = <STR_LIT> ( MO2 . getImm ( ) ) == <STR_LIT> ; <STR_LIT> ShOp = <STR_LIT> ( MO2 . getImm ( ) ) ;


<s> unsigned Reg = MO . getReg ( ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; switch ( Reg ) { default : return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; }


<s> return <NUM_LIT> - MI . getOperand ( Op ) . getImm ( ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ;

return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) | ( isAdd << <NUM_LIT> ) ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ;


<s> unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ;


<s> getShiftRight16Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

return <NUM_LIT> - MI . getOperand ( Op ) . getImm ( ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getShiftRight32Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> getShiftRight64Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> - MI . getOperand ( Op ) . getImm ( ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getShiftRight8Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> - MI . getOperand ( Op ) . getImm ( ) ;


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned SoImm = MI . getOperand ( Op ) . getImm ( ) ; int SoImmVal = <STR_LIT> ( SoImm ) ; assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ; unsigned Binary = ( <STR_LIT> ( ( unsigned ) SoImmVal ) >> <NUM_LIT> ) << <STR_LIT> ;

Binary |= <STR_LIT> ( ( unsigned ) SoImmVal ) ;


<s> unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> ; return Binary ; } Binary |= SBits << <NUM_LIT> ; unsigned Offset = <STR_LIT> ( MO1 . getImm ( ) ) ; assert ( Offset < <NUM_LIT> && <STR_LIT> ) ; return Binary | ( Offset << <NUM_LIT> ) ;


<s> case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> ; return Binary ; } Binary |= SBits << <NUM_LIT> ; unsigned Offset = <STR_LIT> ( MO1 . getImm ( ) ) ; assert ( Offset < <NUM_LIT> && <STR_LIT> ) ; return Binary | ( Offset << <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; }


<s> getT2AddrModeImm0_1020s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm8 = MO1 . getImm ( ) ;


<s> getT2AddrModeImm12OffsetOpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; unsigned Value = <NUM_LIT> ; int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ;


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; unsigned Value = <NUM_LIT> ; int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ;


<s> int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp & <NUM_LIT> ;


<s> const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp & <NUM_LIT> ; return Value ;


<s> getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ;


<s> assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ;


<s> Value <<= <NUM_LIT> ; Value |= CTX . getRegisterInfo ( ) -> getEncodingValue ( MO2 . getReg ( ) ) ; Value <<= <NUM_LIT> ; Value |= MO3 . getImm ( ) ; return Value ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; int32_t Val = MO . getImm ( ) ; if ( Val == INT32_MIN ) Val = <NUM_LIT> ; else if ( Val < <NUM_LIT> ) { Val *= - <NUM_LIT> ; Val |= <NUM_LIT> ;


<s> int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm ( ) ; bool isAdd = Imm8 >= <NUM_LIT> ; if ( Imm8 < <NUM_LIT> ) Imm8 = - ( uint32_t ) Imm8 ; Imm8 /= <NUM_LIT> ; uint32_t Binary = Imm8 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm ( ) ;


<s> unsigned SoImm = MI . getOperand ( Op ) . getImm ( ) ;

unsigned Encoded = <STR_LIT> ( SoImm ) ;


<s> unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; }


<s> getT2SORegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ;


<s> getThumbAddrModeRegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ;

unsigned Rm = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO2 . getReg ( ) ) ;


getThumbAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return ( MO . getImm ( ) >> <NUM_LIT> ) ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ;

return ( MO . getImm ( ) >> <NUM_LIT> ) ;


<s> getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ;

return encodeThumbBLOffset ( MO . getImm ( ) ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

const MCOperand MO = MI . getOperand ( OpIdx ) ;


<s> getThumbBLXTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ;

if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ;


<s> bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ; bool I = ( Val & <NUM_LIT> ) ; bool J1 = ( Val & <NUM_LIT> ) ; bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ;


<s> for ( int i = <NUM_LIT> ; i < NumOp - <NUM_LIT> ; ++ i ) { const MCOperand & MCOp1 = MI . getOperand ( i ) ; const MCOperand & MCOp2 = MI . getOperand ( i + <NUM_LIT> ) ; if ( MCOp1 . isImm ( ) && MCOp2 . isReg ( ) && ( MCOp2 . getReg ( ) == <NUM_LIT> || MCOp2 . getReg ( ) == <STR_LIT> ) ) { if ( <STR_LIT> ( MCOp1 . getImm ( ) ) != <STR_LIT> ) return true ; } } }


<s> const MCOperand & MCOp2 = MI . getOperand ( i + <NUM_LIT> ) ; if ( MCOp1 . isImm ( ) && MCOp2 . isReg ( ) && ( MCOp2 . getReg ( ) == <NUM_LIT> || MCOp2 . getReg ( ) == <STR_LIT> ) ) { if ( <STR_LIT> ( MCOp1 . getImm ( ) ) != <STR_LIT> ) return true ;


<s> bool isTargetMachO ( const MCSubtargetInfo & STI ) const { Triple TT ( STI . getTargetTriple ( ) ) ; return TT . isOSBinFormatMachO ( ) ;


<s> bool isThumb ( const MCSubtargetInfo & STI ) const {

return ( STI . getFeatureBits ( ) & <STR_LIT> ) != <NUM_LIT> ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2DataIPostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) { unsigned Bit24 = EncodedValue & <NUM_LIT> ; unsigned Bit28 = Bit24 << <NUM_LIT> ; EncodedValue &= <NUM_LIT> ; EncodedValue |= Bit28 ; EncodedValue |= <NUM_LIT> ; } return EncodedValue ;


<s> if ( isThumb2 ( STI ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return EncodedValue ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2LoadStorePostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const {


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2LoadStorePostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ;


<s> if ( isThumb2 ( STI ) ) { EncodedValue |= <NUM_LIT> ; }


<s> VFPThumb2PostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; }


<s> VFPThumb2PostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return EncodedValue ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , false ) ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>LEMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , true ) ;


<s> if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE -> getValue ( ) ; if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 :

Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ;


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ;


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ;

Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ;


<s> if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; }


<s> const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; }


<s> const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } return MO . getImm ( ) ;


<s> unsigned getModImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & ST ) const { const MCOperand & MO = MI . getOperand ( Op ) ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , STI , Ctx ) ;


<s> case MCExpr :: SymbolRef : return false ;


<s> static bool EvaluateAsPCRel ( const MCExpr * Expr ) { switch ( Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case MCExpr :: SymbolRef : return false ; case MCExpr :: Binary : return true ; }


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; }


<s> switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 :


<s> MCFixupKind Kind ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ;


<s> bool DPRRegs = llvm :: <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; } }


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> ; return Binary ; } Binary |= SBits << <NUM_LIT> ; unsigned Offset = <STR_LIT> ( MO1 . getImm ( ) ) ; assert ( Offset && <STR_LIT> ) ; if ( Offset == <NUM_LIT> ) Offset = <NUM_LIT> ;

return Binary | ( Offset << <NUM_LIT> ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getHiLo16ImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; MCFixupKind Kind ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } ; llvm_unreachable ( <STR_LIT> ) ;


<s> return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; }


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getHiLo16ImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; MCFixupKind Kind ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE -> getValue ( ) ; if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; MCFixupKind Kind ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) {

const int64_t Value = MCE -> getValue ( ) ;


<s> EncodeAddrModeOpValues ( const MCInst & MI , unsigned OpIdx , unsigned & Reg , unsigned & Imm , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> if ( isReg ) { <STR_LIT> ShOp = <STR_LIT> ( Imm ) ; Binary <<= <NUM_LIT> ; Binary |= getShiftOp ( ShOp ) << <NUM_LIT> ; Binary |= CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; } return Binary | ( isAdd << <NUM_LIT> ) | ( isReg << <NUM_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;

uint32_t Binary = getAddrMode2OffsetOpValue ( MI , OpIdx + <NUM_LIT> , Fixups ) ;


<s> uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;

return Imm8 | ( isAdd << <NUM_LIT> ) | ( isImm << <NUM_LIT> ) ;


<s> bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ;

if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) { unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ;


<s> const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; return ( Rn << <NUM_LIT> ) | Imm8 | ( isAdd << <NUM_LIT> ) | ( isImm << <NUM_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ; isAdd = <STR_LIT> ( Imm8 ) == <STR_LIT> ; } uint32_t Binary = <STR_LIT> ( Imm8 ) ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return Binary ;


<s> unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; }


<s> unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> :


getAddrMode6OffsetOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const {


<s> getAddrMode6OneLane32AddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; }


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ;


<s> getAddrModeISOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm5 = MO1 . getImm ( ) ; return ( ( Imm5 & <NUM_LIT> ) << <NUM_LIT> ) | Rn ;


<s> int SoImmVal ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ; SoImmVal = <NUM_LIT> ; } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; }


<s> uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> && <STR_LIT> ) ; return lsb | ( msb << <NUM_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ;


<s> bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ; return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) | ( isAdd << <NUM_LIT> ) ;


<s> getPostIdxRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ; return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) | ( isAdd << <NUM_LIT> ) ;


<s> else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ;


<s> getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ;

unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm0_1020s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ;

unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ;


<s> unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm8 = MO1 . getImm ( ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp & <NUM_LIT> ; return Value ;


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm8 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ;

const MCExpr * Expr = MO . getExpr ( ) ;


<s> const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ;


<s> const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ;


<s> <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits << <NUM_LIT> ;

if ( SOpc == <STR_LIT> ) return Binary ;


<s> getThumbAddrModeRegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & ) const { const MCOperand & MO1 = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; unsigned Rm = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO2 . getReg ( ) ) ; return ( Rm << <NUM_LIT> ) | Rn ;


<s> unsigned Rm = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO2 . getReg ( ) ) ; return ( Rm << <NUM_LIT> ) | Rn ;


<s> if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ;


<s> if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ;


<s> unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ;


<s> getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd = false ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getHiLo16ImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ;


<s> bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ;

MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ;


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int64_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; int SoImmVal ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ; SoImmVal = <NUM_LIT> ; } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } } else { SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } }

assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) Val = :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ;


<s> bool isTargetDarwin ( ) const { Triple TT ( STI . getTargetTriple ( ) ) ; return TT . isOSDarwin ( ) ;


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return MO . getImm ( ) >> <NUM_LIT> ;


<s> uint32_t <ISA_LIT>MCCodeEmitter :: get<ISA_LIT>BLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const {

const MCOperand MO = MI . getOperand ( OpIdx ) ;


<s> return new ( Ctx ) <ISA_LIT>MCExpr ( Kind , Expr ) ;


<s> switch ( Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case VK_<ISA_LIT>_HI16 : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_LO16 : OS << <STR_LIT> ; break ;


<s> void <ISA_LIT>MCExpr :: AddValueSymbols ( MCAssembler * Asm ) const {

AddValueSymbols_ ( getSubExpr ( ) , Asm ) ;


<s> break ; case MCExpr :: Binary : { const MCBinaryExpr * BE = cast < MCBinaryExpr > ( Value ) ; AddValueSymbols_ ( BE -> getLHS ( ) , Asm ) ;

AddValueSymbols_ ( BE -> getRHS ( ) , Asm ) ;


<s> AddValueSymbols_ ( BE -> getRHS ( ) , Asm ) ; break ; } case MCExpr :: SymbolRef : Asm -> getOrCreateSymbolData ( cast < MCSymbolRefExpr > ( Value ) -> getSymbol ( ) ) ; break ;


<s> return getSubExpr ( ) -> FindAssociatedSection ( ) ;


<s> } const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ; Expr -> print ( OS ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << ')' ;


<s> const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ;


<s> case VK_<ISA_LIT>_HI16 : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_LO16 : OS << <STR_LIT> ; break ; } const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ;


<s> explicit <ISA_LIT>MCExpr ( VariantKind Kind , const MCExpr * Expr ) : Kind ( Kind ) , Expr ( Expr ) {


<s> static const <ISA_LIT>MCExpr * createLower16 ( const MCExpr * Expr , MCContext & Ctx ) { return create ( VK_<ISA_LIT>_LO16 , Expr , Ctx ) ;


<s> static const <ISA_LIT>MCExpr * createLower16 ( const MCExpr * Expr , MCContext & Ctx ) {

return create ( VK_<ISA_LIT>_LO16 , Expr , Ctx ) ;


<s> return create ( VK_<ISA_LIT>_HI16 , Expr , Ctx ) ;


<s> bool evaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout , const MCFixup * Fixup ) const override {


<s> return getSubExpr ( ) -> findAssociatedSection ( ) ;


<s> MCFragment * findAssociatedFragment ( ) const override { return getSubExpr ( ) -> findAssociatedFragment ( ) ;


<s> explicit <ISA_LIT>MCExpr ( VariantKind _Kind , const MCExpr * _Expr ) : Kind ( _Kind ) , Expr ( _Expr ) {


<s> static bool classof ( const MCExpr * E ) { return E -> getKind ( ) == MCExpr :: Target ;


<s> const <ISA_LIT>MCExpr * <ISA_LIT>MCExpr :: Create ( VariantKind Kind , const MCExpr * Expr , MCContext & Ctx ) { return new ( Ctx ) <ISA_LIT>MCExpr ( Kind , Expr ) ;


<s> return Create ( VK_<ISA_LIT>_LO16 , Expr , Ctx ) ;


<s> static const <ISA_LIT>MCExpr * CreateUpper16 ( const MCExpr * Expr , MCContext & Ctx ) {

return Create ( VK_<ISA_LIT>_HI16 , Expr , Ctx ) ;


<s> bool <ISA_LIT>MCExpr :: EvaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout ) const { return false ;


<s> const MCSection * FindAssociatedSection ( ) const override { return getSubExpr ( ) -> FindAssociatedSection ( ) ;


<s> void fixELFSymbolsInTLSFixups ( MCAssembler & Asm ) const override {


<s> default : llvm_unreachable ( <STR_LIT> ) ; case VK_<ISA_LIT>_HI16 : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_LO16 : OS << <STR_LIT> ; break ; } const MCExpr * Expr = getSubExpr ( ) ;

if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ;


<s> MCInst Noop ; Subtarget -> getInstrInfo ( ) -> getNoop ( Noop ) ; for ( int8_t I = <NUM_LIT> ; I < NoopsInSledCount ; I ++ ) OutStreamer -> EmitInstruction ( Noop , getSubtargetInfo ( ) ) ; OutStreamer -> EmitLabel ( Target ) ;


<s> auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> EmitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ;


<s> const MCExpr * Expr = MCSymbolRefExpr :: create ( Symbol , SymbolVariant , OutContext ) ; switch ( MO . getTargetFlags ( ) & <STR_LIT> ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , SymbolVariant , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , SymbolVariant , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : EncodeImms = true ; break ; } for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; if ( AP . lowerOperand ( MO , MCOp ) ) { if ( MCOp . isImm ( ) && EncodeImms ) { int32_t Enc = <STR_LIT> ( MCOp . getImm ( ) ) ; if ( Enc != - <NUM_LIT> ) MCOp . setImm ( Enc ) ;


<s> MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : if ( Subtarget -> genExecuteOnly ( ) ) llvm_unreachable ( <STR_LIT> ) ; MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble ( ) , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: createFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask :


<s> EmitSled ( MI , SledKind :: FUNCTION_ENTER ) ;


<s> EmitSled ( MI , SledKind :: TAIL_CALL ) ;


<s> void <ISA_LIT>AsmPrinter :: LowerPATCHABLE_TAIL_CALL ( const MachineInstr & MI ) {

EmitSled ( MI , SledKind :: TAIL_CALL ) ;


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_PLT , OutContext ) ; break ; }

if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;


<s> switch ( Option ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ;


<s> auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; MCInst Noop ; Subtarget -> getInstrInfo ( ) -> getNoopForElfTarget ( Noop ) ; for ( int8_t I = <NUM_LIT> ; I < NoopsInSledCount ; I ++ ) { OutStreamer -> EmitInstruction ( Noop , getSubtargetInfo ( ) ) ; } OutStreamer -> EmitLabel ( Target ) ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;

return MCOperand :: createExpr ( Expr ) ;


<s> switch ( MO . getTargetFlags ( ) & <STR_LIT> ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ;


<s> assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : { MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; } case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : if ( Subtarget -> genExecuteOnly ( ) ) llvm_unreachable ( <STR_LIT> ) ; MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble ( ) , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: createFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask : return false ; } return true ;


<s> switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_LO16 , Ctx ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_HI16 , Ctx ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_PLT , Ctx ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx ) , Ctx ) ; return MCOperand :: CreateExpr ( Expr ) ;


<s> MCOp = GetSymbolRef ( MO , AP . Mang -> getSymbol ( MO . getGlobal ( ) ) , AP ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , AP . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) , AP ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , AP . GetJTISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , AP . GetCPISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , AP . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) , AP ) ; break ; case MachineOperand :: MO_FPImmediate : APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; }


<s> auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> emitLabel ( Target ) ; recordSled ( CurSled , MI , Kind , <NUM_LIT> ) ;


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ;

auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : EncodeImms = true ; break ; }

for ( const MachineOperand & MO : MI -> operands ( ) ) {


<s> switch ( MO . getType ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) return false ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex :

if ( Subtarget -> genExecuteOnly ( ) ) llvm_unreachable ( <STR_LIT> ) ;


<s> <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ;

MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ;


<s> Mangler & Mang ; AsmPrinter & Printer ; public : <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ;


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_PLT , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;

return MCOperand :: CreateExpr ( Expr ) ;


<s> const MCExpr * AdjExpr = MCConstantExpr :: Create ( PCAdjustment , Ctx ) ; PCRelExpr = MCBinaryExpr :: CreateAdd ( PCRelExpr , AdjExpr , Ctx ) ; } const MachineOperand & MOImm = MI -> getOperand ( ImmIndex ) ; MCOperand SymOp ; bool DidLower = AP . lowerOperand ( MOImm , SymOp ) ; assert ( DidLower && <STR_LIT> ) ; const MCExpr * Expr = SymOp . getExpr ( ) ; <ISA_LIT>MCExpr :: VariantKind TargetKind = <ISA_LIT>MCExpr :: VK_<ISA_LIT>_None ; if ( Expr -> getKind ( ) == MCExpr :: Target ) {

const <ISA_LIT>MCExpr * TargetExpr = cast < <ISA_LIT>MCExpr > ( Expr ) ;