<s> if ( LoadSDNode * LD = dyn_cast < LoadSDNode > ( N ) ) { VT = LD -> getMemoryVT ( ) ; Ptr = LD -> getBasePtr ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; isNonExt = LD -> getExtensionType ( ) == <STR_LIT> ; } else if ( StoreSDNode * ST = dyn_cast < StoreSDNode > ( N ) ) { VT = ST -> getMemoryVT ( ) ; Ptr = ST -> getBasePtr ( ) ; Alignment = ST -> getAlign ( ) ; isNonExt = ! ST -> isTruncatingStore ( ) ; } else if ( MaskedLoadSDNode * LD = dyn_cast < MaskedLoadSDNode > ( N ) ) { VT = LD -> getMemoryVT ( ) ; Ptr = LD -> getBasePtr ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; isNonExt = LD -> getExtensionType ( ) == <STR_LIT> ; IsMasked = true ; } else if ( MaskedStoreSDNode * ST = dyn_cast < MaskedStoreSDNode > ( N ) ) { VT = ST -> getMemoryVT ( ) ; Ptr = ST -> getBasePtr ( ) ; Alignment = ST -> getAlign ( ) ; isNonExt = ! ST -> isTruncatingStore ( ) ; IsMasked = true ; } else return false ; if ( Subtarget -> isThumb1Only ( ) ) { assert ( Op -> getValueType ( <NUM_LIT> ) == <STR_LIT> && <STR_LIT> ) ; if ( Op -> getOpcode ( ) != <STR_LIT> || ! isNonExt ) return false ; auto * RHS = dyn_cast < ConstantSDNode > ( Op -> getOperand ( <NUM_LIT> ) ) ; if ( ! RHS || RHS -> getZExtValue ( ) != <NUM_LIT> ) return false ; if ( Alignment < Align ( <NUM_LIT> ) ) return false ; Offset = Op -> getOperand ( <NUM_LIT> ) ; Base = Op -> getOperand ( <NUM_LIT> ) ; AM = <STR_LIT> ; return true ; } bool isInc ; bool isLegal = false ; if ( VT . isVector ( ) ) isLegal = Subtarget -> hasMVEIntegerOps ( ) && getMVEIndexedAddressParts ( Op , VT , Alignment , isSEXTLoad , IsMasked , Subtarget -> isLittle ( ) , Base , Offset , isInc , DAG ) ; else { if ( Subtarget -> isThumb2 ( ) ) isLegal = getT2IndexedAddressParts ( Op , VT , isSEXTLoad , Base , Offset , isInc , DAG ) ; else isLegal = get<ISA_LIT>IndexedAddressParts ( Op , VT , isSEXTLoad , Base , Offset , isInc , DAG ) ; } if ( ! isLegal ) return false ; if ( Ptr != Base ) { if ( Ptr == Offset && Op -> getOpcode ( ) == <STR_LIT> && ! Subtarget -> isThumb2 ( ) ) std :: swap ( Base , Offset ) ; if ( Ptr != Base ) return false ; } AM = isInc ? <STR_LIT> : <STR_LIT> ; return true ;


<s> bool IsMasked = false ; if ( LoadSDNode * LD = dyn_cast < LoadSDNode > ( N ) ) { Ptr = LD -> getBasePtr ( ) ; VT = LD -> getMemoryVT ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; } else if ( StoreSDNode * ST = dyn_cast < StoreSDNode > ( N ) ) { Ptr = ST -> getBasePtr ( ) ; VT = ST -> getMemoryVT ( ) ; Alignment = ST -> getAlign ( ) ; } else if ( MaskedLoadSDNode * LD = dyn_cast < MaskedLoadSDNode > ( N ) ) { Ptr = LD -> getBasePtr ( ) ; VT = LD -> getMemoryVT ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; IsMasked = true ; } else if ( MaskedStoreSDNode * ST = dyn_cast < MaskedStoreSDNode > ( N ) ) { Ptr = ST -> getBasePtr ( ) ; VT = ST -> getMemoryVT ( ) ; Alignment = ST -> getAlign ( ) ; IsMasked = true ; } else return false ; bool isInc ; bool isLegal = false ; if ( VT . isVector ( ) ) isLegal = Subtarget -> hasMVEIntegerOps ( ) && getMVEIndexedAddressParts ( Ptr . getNode ( ) , VT , Alignment , isSEXTLoad , IsMasked , Subtarget -> isLittle ( ) , Base , Offset , isInc , DAG ) ; else { if ( Subtarget -> isThumb2 ( ) ) isLegal = getT2IndexedAddressParts ( Ptr . getNode ( ) , VT , isSEXTLoad , Base , Offset , isInc , DAG ) ; else isLegal = get<ISA_LIT>IndexedAddressParts ( Ptr . getNode ( ) , VT , isSEXTLoad , Base , Offset , isInc , DAG ) ; } if ( ! isLegal ) return false ; AM = isInc ? <STR_LIT> : <STR_LIT> ;


<s> VT = LD -> getMemoryVT ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; } else if ( StoreSDNode * ST = dyn_cast < StoreSDNode > ( N ) ) { Ptr = ST -> getBasePtr ( ) ; VT = ST -> getMemoryVT ( ) ; Alignment = ST -> getAlign ( ) ; } else if ( MaskedLoadSDNode * LD = dyn_cast < MaskedLoadSDNode > ( N ) ) { Ptr = LD -> getBasePtr ( ) ; VT = LD -> getMemoryVT ( ) ; Alignment = LD -> getAlign ( ) ; isSEXTLoad = LD -> getExtensionType ( ) == <STR_LIT> ; IsMasked = true ; } else if ( MaskedStoreSDNode * ST = dyn_cast < MaskedStoreSDNode > ( N ) ) { Ptr = ST -> getBasePtr ( ) ; VT = ST -> getMemoryVT ( ) ; Alignment = ST -> getAlign ( ) ; IsMasked = true ; } else return false ; bool isInc ; bool isLegal = false ; if ( VT . isVector ( ) ) isLegal = Subtarget -> hasMVEIntegerOps ( ) && getMVEIndexedAddressParts ( Ptr . getNode ( ) , VT , Alignment , isSEXTLoad , IsMasked , Subtarget -> isLittle ( ) , Base , Offset , isInc , DAG ) ; else {

if ( Subtarget -> isThumb2 ( ) ) isLegal = getT2IndexedAddressParts ( Ptr . getNode ( ) , VT , isSEXTLoad , Base , Offset , isInc , DAG ) ;


<s> if ( Subtarget -> hasNEON ( ) ) { if ( VT == <STR_LIT> ) return & <STR_LIT> ; if ( VT == <STR_LIT> ) return & <STR_LIT> ; } if ( Subtarget -> hasMVEIntegerOps ( ) ) { if ( VT == <STR_LIT> ) return & <STR_LIT> ; if ( VT == <STR_LIT> ) return & <STR_LIT> ; } return TargetLowering :: getRegClassFor ( VT ) ;


<s> if ( Subtarget -> hasFPAO ( ) ) return AM . Scale < <NUM_LIT> ? <NUM_LIT> : <NUM_LIT> ; return <NUM_LIT> ; }


<s> Value * <ISA_LIT>TargetLowering :: getSDagStackGuard ( const Module & M ) const { if ( Subtarget -> getTargetTriple ( ) . isWindowsMSVCEnvironment ( ) ) return M . getGlobalVariable ( <STR_LIT> ) ;

return TargetLowering :: getSDagStackGuard ( M ) ;


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( const DataLayout & DL , LLVMContext & , EVT VT ) const {

if ( ! VT . isVector ( ) ) return getPointerTy ( DL ) ;


<s> Function * <ISA_LIT>TargetLowering :: getSSPStackGuardCheck ( const Module & M ) const { if ( Subtarget -> getTargetTriple ( ) . isWindowsMSVCEnvironment ( ) ) return M . getFunction ( <STR_LIT> ) ; return TargetLowering :: getSSPStackGuardCheck ( M ) ;


<s> if ( N -> getOpcode ( ) == <STR_LIT> ) return ( <STR_LIT> ) N -> getConstantOperandVal ( <NUM_LIT> ) ; else if ( N -> getOpcode ( ) == <STR_LIT> ) return ( <STR_LIT> ) N -> getConstantOperandVal ( <NUM_LIT> ) ;


<s> switch ( VT . getSimpleVT ( ) . SimpleTy ) { case <STR_LIT> : return <STR_LIT> ;


<s> static EVT getVectorTyFromPredicateVector ( EVT VT ) {

switch ( VT . getSimpleVT ( ) . SimpleTy ) {


<s> assert ( Subtarget -> hasFP64 ( ) || RHS . getValueType ( ) != <STR_LIT> ) ; SDValue Cmp ; if ( ! isFloatingPointZero ( RHS ) ) Cmp = DAG . getNode ( Signaling ? <STR_LIT> : <STR_LIT> , dl , <STR_LIT> , LHS , RHS ) ; else Cmp = DAG . getNode ( Signaling ? <STR_LIT> : <STR_LIT> , dl , <STR_LIT> , LHS ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Cmp ) ;


<s> while ( Op . getOpcode ( ) == <STR_LIT> ) Op = Op . getOperand ( <NUM_LIT> ) ; BuildVectorSDNode * BVN = dyn_cast < BuildVectorSDNode > ( Op . getNode ( ) ) ;


<s> EVT VmovVT = VT . is128BitVector ( ) ? <STR_LIT> : <STR_LIT> ; SDValue Vmov = DAG . getNode ( <STR_LIT> , dl , VmovVT , EncodedVal ) ; return DAG . getNode ( <STR_LIT> , dl , VT , Vmov ) ;


<s> void <ISA_LIT>TargetLowering :: initializeSplitCSR ( MachineBasicBlock * Entry ) const { <ISA_LIT>FunctionInfo * AFI = Entry -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) ;


<s> const <ISA_LIT>BaseRegisterInfo * TRI = Subtarget -> getRegisterInfo ( ) ; const MCPhysReg * IStart = TRI -> getCalleeSavedRegsViaCopy ( Entry -> getParent ( ) ) ; if ( ! IStart ) return ; const TargetInstrInfo * TII = Subtarget -> getInstrInfo ( ) ; MachineRegisterInfo * MRI = & Entry -> getParent ( ) -> getRegInfo ( ) ; MachineBasicBlock :: iterator MBBI = Entry -> begin ( ) ; for ( const MCPhysReg * I = IStart ; * I ; ++ I ) { const TargetRegisterClass * RC = nullptr ; if ( <STR_LIT> . contains ( * I ) ) RC = & <STR_LIT> ; else if ( <STR_LIT> . contains ( * I ) ) RC = & <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; Register NewVR = MRI -> createVirtualRegister ( RC ) ;

assert ( Entry -> getParent ( ) -> getFunction ( ) . hasFnAttribute ( Attribute :: NoUnwind ) && <STR_LIT> ) ;


<s> M . getOrInsertGlobal ( <STR_LIT> , Type :: getInt8PtrTy ( M . getContext ( ) ) ) ; FunctionCallee SecurityCheckCookie = M . getOrInsertFunction ( <STR_LIT> , Type :: getVoidTy ( M . getContext ( ) ) , Type :: getInt8PtrTy ( M . getContext ( ) ) ) ; if ( Function * F = dyn_cast < Function > ( SecurityCheckCookie . getCallee ( ) ) ) F -> addParamAttr ( <NUM_LIT> , Attribute :: AttrKind :: InReg ) ;


<s> void <ISA_LIT>TargetLowering :: insertSSPDeclarations ( Module & M ) const { if ( ! Subtarget -> getTargetTriple ( ) . isWindowsMSVCEnvironment ( ) ) return TargetLowering :: insertSSPDeclarations ( M ) ; M . getOrInsertGlobal ( <STR_LIT> , Type :: getInt8PtrTy ( M . getContext ( ) ) ) ; FunctionCallee SecurityCheckCookie = M . getOrInsertFunction ( <STR_LIT> , Type :: getVoidTy ( M . getContext ( ) ) , Type :: getInt8PtrTy ( M . getContext ( ) ) ) ;

if ( Function * F = dyn_cast < Function > ( SecurityCheckCookie . getCallee ( ) ) ) F -> addParamAttr ( <NUM_LIT> , Attribute :: AttrKind :: InReg ) ;


<s> if ( Level == BeforeLegalizeTypes ) return true ; if ( N -> getOpcode ( ) != <STR_LIT> ) return true ; if ( Subtarget -> isThumb1Only ( ) ) { if ( N -> getOpcode ( ) != <STR_LIT> ) return true ; SDValue N1 = N -> getOperand ( <NUM_LIT> ) ; if ( N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> ) return true ; if ( auto * Const = dyn_cast < ConstantSDNode > ( N1 -> getOperand ( <NUM_LIT> ) ) ) { if ( Const -> getAPIntValue ( ) . ult ( <NUM_LIT> ) ) return false ;

if ( N1 -> getOpcode ( ) == <STR_LIT> && Const -> getAPIntValue ( ) . slt ( <NUM_LIT> ) && Const -> getAPIntValue ( ) . sgt ( - <NUM_LIT> ) ) return false ;


<s> if ( N -> getOpcode ( ) != <STR_LIT> ) return true ; SDValue N1 = N -> getOperand ( <NUM_LIT> ) ; if ( N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> && N1 -> getOpcode ( ) != <STR_LIT> ) return true ; if ( auto * Const = dyn_cast < ConstantSDNode > ( N1 -> getOperand ( <NUM_LIT> ) ) ) {

if ( Const -> getAPIntValue ( ) . ult ( <NUM_LIT> ) ) return false ;


<s> if ( CallerF . hasFnAttribute ( <STR_LIT> ) ) return false ; if ( canGuaranteeTCO ( CalleeCC , getTargetMachine ( ) . Options . GuaranteedTailCallOpt ) ) return CalleeCC == CallerCC ; if ( isCalleeStructRet || isCallerStructRet ) return false ; if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) { const GlobalValue * GV = G -> getGlobal ( ) ; const Triple & TT = getTargetMachine ( ) . getTargetTriple ( ) ; if ( GV -> hasExternalWeakLinkage ( ) && ( ! TT . isOSWindows ( ) || TT . isOSBinFormatELF ( ) || TT . isOSBinFormatMachO ( ) ) ) return false ; } LLVMContext & C = * DAG . getContext ( ) ; if ( ! CCState :: resultsCompatible ( getEffectiveCallingConv ( CalleeCC , isVarArg ) , getEffectiveCallingConv ( CallerCC , CallerF . isVarArg ( ) ) , MF , C , Ins , CCAssignFnForReturn ( CalleeCC , isVarArg ) , CCAssignFnForReturn ( CallerCC , CallerF . isVarArg ( ) ) ) ) return false ; const <ISA_LIT>BaseRegisterInfo * TRI = Subtarget -> getRegisterInfo ( ) ; const uint32_t * CallerPreserved = TRI -> getCallPreservedMask ( MF , CallerCC ) ; if ( CalleeCC != CallerCC ) { const uint32_t * CalleePreserved = TRI -> getCallPreservedMask ( MF , CalleeCC ) ;

if ( ! TRI -> regmaskSubsetEqual ( CallerPreserved , CalleePreserved ) ) return false ;


<s> if ( BVN -> getValueType ( <NUM_LIT> ) != <STR_LIT> || BVN -> getOpcode ( ) != <STR_LIT> ) return false ; unsigned LoElt = DAG . getDataLayout ( ) . isBigEndian ( ) ? <NUM_LIT> : <NUM_LIT> ; unsigned HiElt = <NUM_LIT> - LoElt ; ConstantSDNode * Lo0 = dyn_cast < ConstantSDNode > ( BVN -> getOperand ( LoElt ) ) ; ConstantSDNode * Hi0 = dyn_cast < ConstantSDNode > ( BVN -> getOperand ( HiElt ) ) ; ConstantSDNode * Lo1 = dyn_cast < ConstantSDNode > ( BVN -> getOperand ( LoElt + <NUM_LIT> ) ) ; ConstantSDNode * Hi1 = dyn_cast < ConstantSDNode > ( BVN -> getOperand ( HiElt + <NUM_LIT> ) ) ; if ( ! Lo0 || ! Hi0 || ! Lo1 || ! Hi1 ) return false ; if ( isSigned ) { if ( Hi0 -> getSExtValue ( ) == Lo0 -> getSExtValue ( ) >> <NUM_LIT> && Hi1 -> getSExtValue ( ) == Lo1 -> getSExtValue ( ) >> <NUM_LIT> ) return true ; } else { if ( Hi0 -> isZero ( ) && Hi1 -> isZero ( ) ) return true ; } return false ; } if ( N -> getOpcode ( ) != <STR_LIT> ) return false ; for ( unsigned i = <NUM_LIT> , e = N -> getNumOperands ( ) ; i != e ; ++ i ) { SDNode * Elt = N -> getOperand ( i ) . getNode ( ) ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Elt ) ) { unsigned EltSize = VT . getScalarSizeInBits ( ) ;

unsigned HalfSize = EltSize / <NUM_LIT> ;


<s> if ( ! isOperationLegalOrCustom ( <STR_LIT> , ResVT ) ) return false ;

return ( Index == <NUM_LIT> || Index == ResVT . getVectorNumElements ( ) ) ;


<s> if ( ! VT . isSimple ( ) ) return false ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { case <STR_LIT> : case <STR_LIT> : return Subtarget -> hasMVEFloatOps ( ) ; case <STR_LIT> : return Subtarget -> useFPVFMx16 ( ) ; case <STR_LIT> : return Subtarget -> useFPVFMx ( ) ; case <STR_LIT> : return Subtarget -> useFPVFMx64 ( ) ; default : break ; }


<s> bool <ISA_LIT>TargetLowering :: isFNegFree ( EVT VT ) const { if ( ! VT . isSimple ( ) ) return false ;


<s> bool <ISA_LIT>TargetLowering :: isFPImmLegal ( const APFloat & Imm , EVT VT , bool ForCodeSize ) const { if ( ! Subtarget -> hasVFP3Base ( ) ) return false ; if ( VT == <STR_LIT> && Subtarget -> hasFullFP16 ( ) ) return <STR_LIT> ( Imm ) != - <NUM_LIT> ; if ( VT == <STR_LIT> && Subtarget -> hasFullFP16 ( ) && <STR_LIT> ( Imm ) != - <NUM_LIT> ) return true ;

if ( VT == <STR_LIT> ) return <STR_LIT> ( Imm ) != - <NUM_LIT> ;


<s> if ( VT == <STR_LIT> && Subtarget -> hasFullFP16 ( ) ) return <STR_LIT> ( Imm ) != - <NUM_LIT> ; if ( VT == <STR_LIT> && Subtarget -> hasFullFP16 ( ) && <STR_LIT> ( Imm ) != - <NUM_LIT> ) return true ; if ( VT == <STR_LIT> ) return <STR_LIT> ( Imm ) != - <NUM_LIT> ; if ( VT == <STR_LIT> && Subtarget -> hasFP64 ( ) ) return <STR_LIT> ( Imm ) != - <NUM_LIT> ;


<s> if ( ! isHomogeneousAggregate ( ST -> getElementType ( i ) , Base , SubMembers ) ) return false ; Members += SubMembers ; } } else if ( auto * AT = dyn_cast < ArrayType > ( Ty ) ) { uint64_t SubMembers = <NUM_LIT> ; if ( ! isHomogeneousAggregate ( AT -> getElementType ( ) , Base , SubMembers ) ) return false ; Members += SubMembers * AT -> getNumElements ( ) ; } else if ( Ty -> isFloatTy ( ) ) { if ( Base != HA_UNKNOWN && Base != HA_FLOAT ) return false ; Members = <NUM_LIT> ; Base = HA_FLOAT ; } else if ( Ty -> isDoubleTy ( ) ) { if ( Base != HA_UNKNOWN && Base != HA_DOUBLE ) return false ;


<s> case <STR_LIT> : return isUInt < <NUM_LIT> > ( V ) ; case <STR_LIT> : return isUInt < <NUM_LIT> > ( V ) ; case <STR_LIT> : case <STR_LIT> : if ( ! Subtarget -> hasVFP2Base ( ) ) return false ; return isShiftedUInt < <NUM_LIT> , <NUM_LIT> > ( V ) ;


<s> case <NUM_LIT> : break ; default : if ( AM . BaseOffs ) return false ; if ( ! VT . isSimple ( ) ) return false ; if ( Subtarget -> isThumb1Only ( ) ) return isLegalT1ScaledAddressingMode ( AM , VT ) ; if ( Subtarget -> isThumb2 ( ) ) return isLegalT2ScaledAddressingMode ( AM , VT ) ; int Scale = AM . Scale ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Scale < <NUM_LIT> ) Scale = - Scale ; if ( Scale == <NUM_LIT> ) return true ; return isPowerOf2_32 ( Scale & ~ <NUM_LIT> ) ;


<s> int Scale = AM . Scale ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Scale < <NUM_LIT> ) Scale = - Scale ; if ( Scale == <NUM_LIT> ) return true ; return isPowerOf2_32 ( Scale & ~ <NUM_LIT> ) ; case <STR_LIT> : case <STR_LIT> : if ( Scale == <NUM_LIT> || ( AM . HasBaseReg && Scale == - <NUM_LIT> ) ) return true ; if ( ! AM . HasBaseReg && Scale == <NUM_LIT> ) return true ; return false ; case <STR_LIT> :


<s> bool <ISA_LIT>TargetLowering :: isLegalICmpImmediate ( int64_t Imm ) const { if ( ! Subtarget -> isThumb ( ) ) return <STR_LIT> ( ( uint32_t ) Imm ) != - <NUM_LIT> || <STR_LIT> ( - ( uint32_t ) Imm ) != - <NUM_LIT> ; if ( Subtarget -> isThumb2 ( ) ) return <STR_LIT> ( ( uint32_t ) Imm ) != - <NUM_LIT> || <STR_LIT> ( - ( uint32_t ) Imm ) != - <NUM_LIT> ; return Imm >= <NUM_LIT> && Imm <= <NUM_LIT> ;


<s> if ( VecTy -> getNumElements ( ) < <NUM_LIT> ) return false ; if ( ElSize != <NUM_LIT> && ElSize != <NUM_LIT> && ElSize != <NUM_LIT> ) return false ; if ( Subtarget -> hasMVEIntegerOps ( ) && Alignment < ElSize / <NUM_LIT> ) return false ; if ( Subtarget -> hasNEON ( ) && VecSize == <NUM_LIT> ) return true ;

return VecSize % <NUM_LIT> == <NUM_LIT> ;


<s> bool <ISA_LIT>TargetLowering :: isLegalInterleavedAccessType ( unsigned Factor , FixedVectorType * VecTy , Align Alignment , const DataLayout & DL ) const { unsigned VecSize = DL . getTypeSizeInBits ( VecTy ) ; unsigned ElSize = DL . getTypeSizeInBits ( VecTy -> getElementType ( ) ) ; if ( ! Subtarget -> hasNEON ( ) && ! Subtarget -> hasMVEIntegerOps ( ) ) return false ; if ( Subtarget -> hasNEON ( ) && VecTy -> getElementType ( ) -> isHalfTy ( ) ) return false ;

if ( Subtarget -> hasMVEIntegerOps ( ) && Factor == <NUM_LIT> ) return false ;


<s> case OP_VDUP1 : case OP_VDUP2 : case OP_VDUP3 : return true ; } return false ;


<s> unsigned Scale = <NUM_LIT> ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : Scale = <NUM_LIT> ; break ; default : Scale = <NUM_LIT> ;


<s> if ( Scale < <NUM_LIT> ) return false ; return ( Scale == <NUM_LIT> ) || ( ! AM . HasBaseReg && Scale == <NUM_LIT> ) ;


<s> Scale = Scale & ~ <NUM_LIT> ; return Scale == <NUM_LIT> || Scale == <NUM_LIT> || Scale == <NUM_LIT> ; case <STR_LIT> : if ( Scale == <NUM_LIT> ) return true ; if ( ! AM . HasBaseReg && Scale == <NUM_LIT> ) return true ; return false ; case <STR_LIT> :


<s> static bool isLowerSaturate ( const SDValue LHS , const SDValue RHS , const SDValue TrueVal , const SDValue FalseVal , const <STR_LIT> CC , const SDValue K ) {

return ( isGTorGE ( CC ) && ( ( K == LHS && K == TrueVal ) || ( K == RHS && K == FalseVal ) ) ) || ( isLTorLE ( CC ) && ( ( K == RHS && K == TrueVal ) || ( K == LHS && K == FalseVal ) ) ) ;


<s> static bool isLowerSaturate ( const SDValue LHS , const SDValue RHS , const SDValue TrueVal , const SDValue FalseVal , const <STR_LIT> CC , const SDValue K ) { return ( isGTorGE ( CC ) && ( ( K == LHS && K == TrueVal ) || ( K == RHS && K == FalseVal ) ) ) || ( isLTorLE ( CC ) && ( ( K == RHS && K == TrueVal ) || ( K == LHS && K == FalseVal ) ) ) ;


<s> SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue TrueVal = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; SDValue * K = isa < ConstantSDNode > ( LHS ) ? & LHS : isa < ConstantSDNode > ( RHS ) ? & RHS : nullptr ; if ( ! K ) return false ; SDValue KTmp = isa < ConstantSDNode > ( TrueVal ) ? TrueVal : FalseVal ; V = ( KTmp == TrueVal ) ? FalseVal : TrueVal ; SDValue VTmp = ( K && * K == LHS ) ? RHS : LHS ; if ( * K != KTmp || V != VTmp ) return false ; if ( isLowerSaturate ( LHS , RHS , TrueVal , FalseVal , CC , * K ) ) { SatK = * K ;


<s> static bool isLowerSaturatingConditional ( const SDValue & Op , SDValue & V , SDValue & SatK ) { SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue TrueVal = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; SDValue * K = isa < ConstantSDNode > ( LHS ) ? & LHS : isa < ConstantSDNode > ( RHS ) ? & RHS : nullptr ; if ( ! K ) return false ; SDValue KTmp = isa < ConstantSDNode > ( TrueVal ) ? TrueVal : FalseVal ; V = ( KTmp == TrueVal ) ? FalseVal : TrueVal ; SDValue VTmp = ( K && * K == LHS ) ? RHS : LHS ; if ( * K != KTmp || V != VTmp ) return false ; if ( isLowerSaturate ( LHS , RHS , TrueVal , FalseVal , CC , * K ) ) { SatK = * K ; return true ; } return false ;


<s> static bool isLTorLE ( <STR_LIT> CC ) { return CC == <STR_LIT> || CC == <STR_LIT> ;


<s> bool <ISA_LIT>TargetLowering :: isMulAddWithConstProfitable ( const SDValue & AddNode , const SDValue & ConstNode ) const { const EVT VT = AddNode . getValueType ( ) ; if ( VT . isVector ( ) || VT . getScalarSizeInBits ( ) > <NUM_LIT> ) return true ; const ConstantSDNode * C0Node = cast < ConstantSDNode > ( AddNode . getOperand ( <NUM_LIT> ) ) ; const ConstantSDNode * C1Node = cast < ConstantSDNode > ( ConstNode ) ; const int64_t C0 = C0Node -> getSExtValue ( ) ; APInt CA = C0Node -> getAPIntValue ( ) * C1Node -> getAPIntValue ( ) ; if ( ! isLegalAddImmediate ( C0 ) || isLegalAddImmediate ( CA . getSExtValue ( ) ) ) return true ;

if ( ConstantMaterializationCost ( ( unsigned ) CA . getZExtValue ( ) , Subtarget ) > <NUM_LIT> ) return false ;


<s> const APInt * CV = & C -> getAPIntValue ( ) ;

return CV -> isPowerOf2 ( ) ? CV : nullptr ;


<s> bool <ISA_LIT>TargetLowering :: isReadOnly ( const GlobalValue * GV ) const { if ( const GlobalAlias * GA = dyn_cast < GlobalAlias > ( GV ) ) if ( ! ( GV = GA -> getAliaseeObject ( ) ) ) return false ;

if ( const auto * V = dyn_cast < GlobalVariable > ( GV ) ) return V -> isConstant ( ) ;


<s> if ( isSRA16 ( Op ) ) return isSHL16 ( Op . getOperand ( <NUM_LIT> ) ) ;

return DAG . ComputeNumSignBits ( Op ) == <NUM_LIT> ;


<s> static bool isS16 ( const SDValue & Op , SelectionDAG & DAG ) { if ( isSRA16 ( Op ) ) return isSHL16 ( Op . getOperand ( <NUM_LIT> ) ) ; return DAG . ComputeNumSignBits ( Op ) == <NUM_LIT> ;


<s> if ( auto Const = dyn_cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) ) return Const -> getZExtValue ( ) == <NUM_LIT> ;


<s> if ( VT . getVectorNumElements ( ) == <NUM_LIT> && ( VT . is128BitVector ( ) || VT . is64BitVector ( ) ) ) { unsigned PFIndexes [ <NUM_LIT> ] ; for ( unsigned i = <NUM_LIT> ; i != <NUM_LIT> ; ++ i ) { if ( M [ i ] < <NUM_LIT> ) PFIndexes [ i ] = <NUM_LIT> ; else PFIndexes [ i ] = M [ i ] ; } unsigned PFTableIndex = PFIndexes [ <NUM_LIT> ] * <NUM_LIT> * <NUM_LIT> * <NUM_LIT> + PFIndexes [ <NUM_LIT> ] * <NUM_LIT> * <NUM_LIT> + PFIndexes [ <NUM_LIT> ] * <NUM_LIT> + PFIndexes [ <NUM_LIT> ] ; unsigned PFEntry = PerfectShuffleTable [ PFTableIndex ] ; unsigned Cost = ( PFEntry >> <NUM_LIT> ) ; if ( Cost <= <NUM_LIT> && ( Subtarget -> hasNEON ( ) || isLegalMVEShuffleOp ( PFEntry ) ) ) return true ; } bool ReverseVEXT , isV_UNDEF ; unsigned Imm , WhichResult ;

unsigned EltSize = VT . getScalarSizeInBits ( ) ;


<s> unsigned PFEntry = PerfectShuffleTable [ PFTableIndex ] ; unsigned Cost = ( PFEntry >> <NUM_LIT> ) ; if ( Cost <= <NUM_LIT> && ( Subtarget -> hasNEON ( ) || isLegalMVEShuffleOp ( PFEntry ) ) ) return true ; } bool ReverseVEXT , isV_UNDEF ; unsigned Imm , WhichResult ; unsigned EltSize = VT . getScalarSizeInBits ( ) ; if ( EltSize >= <NUM_LIT> || ShuffleVectorSDNode :: isSplatMask ( & M [ <NUM_LIT> ] , VT ) || ShuffleVectorInst :: isIdentityMask ( M ) || isVREVMask ( M , VT , <NUM_LIT> ) || isVREVMask ( M , VT , <NUM_LIT> ) || isVREVMask ( M , VT , <NUM_LIT> ) ) return true ; else if ( Subtarget -> hasNEON ( ) && ( isVEXTMask ( M , VT , ReverseVEXT , Imm ) || isVTBLMask ( M , VT ) || isNEONTwoResultShuffleMask ( M , VT , WhichResult , isV_UNDEF ) ) ) return true ; else if ( ( VT == <STR_LIT> || VT == <STR_LIT> || VT == <STR_LIT> ) && isReverseMask ( M , VT ) ) return true ; else if ( Subtarget -> hasMVEIntegerOps ( ) && ( isVMOVNMask ( M , VT , true , false ) || isVMOVNMask ( M , VT , false , false ) || isVMOVNMask ( M , VT , true , true ) ) ) return true ;


<s> static SDValue IsSingleInstrConstant ( SDValue N , SelectionDAG & DAG , const <ISA_LIT>Subtarget * ST , const SDLoc & dl ) { uint64_t Val ; if ( ! isa < ConstantSDNode > ( N ) ) return SDValue ( ) ; Val = cast < ConstantSDNode > ( N ) -> getZExtValue ( ) ; if ( ST -> isThumb1Only ( ) ) { if ( Val <= <NUM_LIT> || ~ Val <= <NUM_LIT> ) return DAG . getConstant ( Val , dl , <STR_LIT> ) ; } else { if ( <STR_LIT> ( Val ) != - <NUM_LIT> || <STR_LIT> ( ~ Val ) != - <NUM_LIT> ) return DAG . getConstant ( Val , dl , <STR_LIT> ) ;


<s> uint64_t Val ; if ( ! isa < ConstantSDNode > ( N ) ) return SDValue ( ) ; Val = cast < ConstantSDNode > ( N ) -> getZExtValue ( ) ; if ( ST -> isThumb1Only ( ) ) {

if ( Val <= <NUM_LIT> || ~ Val <= <NUM_LIT> ) return DAG . getConstant ( Val , dl , <STR_LIT> ) ;


<s> static bool isSRA16 ( const SDValue & Op ) { if ( Op . getOpcode ( ) != <STR_LIT> ) return false ; if ( auto Const = dyn_cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) ) return Const -> getZExtValue ( ) == <NUM_LIT> ; return false ;


<s> static bool isSRL16 ( const SDValue & Op ) { if ( Op . getOpcode ( ) != <STR_LIT> ) return false ;

if ( auto Const = dyn_cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) ) return Const -> getZExtValue ( ) == <NUM_LIT> ;


<s> if ( VT == <STR_LIT> ) return ! Subtarget -> hasFP64 ( ) ;

if ( VT == <STR_LIT> ) return ! Subtarget -> hasFullFP16 ( ) ;


<s> if ( VT == <STR_LIT> ) return ! Subtarget -> hasFP64 ( ) ; if ( VT == <STR_LIT> ) return ! Subtarget -> hasFullFP16 ( ) ;


<s> Worklist . push_back ( N ) ; Worklist . push_back ( User ) ; if ( SDNode :: hasPredecessorHelper ( N , Visited , Worklist ) || SDNode :: hasPredecessorHelper ( User , Visited , Worklist ) ) return false ; return true ;


<s> if ( SDNode :: hasPredecessorHelper ( N , Visited , Worklist ) || SDNode :: hasPredecessorHelper ( User , Visited , Worklist ) ) return false ; return true ;


<s> SDNode * U = * ExtVal -> use_begin ( ) ; if ( ( U -> getOpcode ( ) == <STR_LIT> || U -> getOpcode ( ) == <STR_LIT> || U -> getOpcode ( ) == <STR_LIT> || U -> getOpcode ( ) == <STR_LIT> ) ) return false ; return true ;


<s> if ( ( SplatBits & ~ <NUM_LIT> ) == <NUM_LIT> && ( ( SplatBits | SplatUndef ) & <NUM_LIT> ) == <NUM_LIT> ) { OpCmode = <NUM_LIT> ; Imm = SplatBits >> <NUM_LIT> ; break ; } if ( type == MVEVMVNModImm ) return SDValue ( ) ; if ( ( SplatBits & ~ <NUM_LIT> ) == <NUM_LIT> && ( ( SplatBits | SplatUndef ) & <NUM_LIT> ) == <NUM_LIT> ) { OpCmode = <NUM_LIT> ; Imm = SplatBits >> <NUM_LIT> ; break ; } return SDValue ( ) ; case <NUM_LIT> : { if ( type != VMOVModImm ) return SDValue ( ) ; uint64_t BitMask = <NUM_LIT> ; unsigned ImmMask = <NUM_LIT> ; Imm = <NUM_LIT> ; for ( int ByteNum = <NUM_LIT> ; ByteNum < <NUM_LIT> ; ++ ByteNum ) { if ( ( ( SplatBits | SplatUndef ) & BitMask ) == BitMask ) { Imm |= ImmMask ; } else if ( ( SplatBits & BitMask ) != <NUM_LIT> ) { return SDValue ( ) ; } BitMask <<= <NUM_LIT> ; ImmMask <<= <NUM_LIT> ; } if ( DAG . getDataLayout ( ) . isBigEndian ( ) ) { unsigned BytesPerElem = VectorVT . getScalarSizeInBits ( ) / <NUM_LIT> ; unsigned Mask = ( <NUM_LIT> << BytesPerElem ) - <NUM_LIT> ; unsigned NumElems = <NUM_LIT> / BytesPerElem ; unsigned NewImm = <NUM_LIT> ; for ( unsigned ElemNum = <NUM_LIT> ; ElemNum < NumElems ; ++ ElemNum ) { unsigned Elem = ( ( Imm >> ElemNum * BytesPerElem ) & Mask ) ; NewImm |= Elem << ( NumElems - ElemNum - <NUM_LIT> ) * BytesPerElem ; } Imm = NewImm ; } OpCmode = <NUM_LIT> ; VT = is128Bits ? <STR_LIT> : <STR_LIT> ;


<s> unsigned Offset = Top ? <NUM_LIT> : <NUM_LIT> ; unsigned N = SingleSource ? <NUM_LIT> : NumElts ; for ( unsigned i = <NUM_LIT> ; i < NumElts ; i += <NUM_LIT> ) {

if ( M [ i ] >= <NUM_LIT> && M [ i ] != ( int ) i ) return false ;


<s> for ( unsigned i = <NUM_LIT> ; i < NumElts ; i += <NUM_LIT> ) { if ( M [ i ] >= <NUM_LIT> && M [ i ] != ( int ) i ) return false ;

if ( M [ i + <NUM_LIT> ] >= <NUM_LIT> && M [ i + <NUM_LIT> ] != ( int ) ( N + i + Offset ) ) return false ;


<s> unsigned Off1 = rev ? <NUM_LIT> : NumElts / <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumElts ; i += <NUM_LIT> ) { if ( M [ i ] >= <NUM_LIT> && M [ i ] != ( int ) ( Off0 + i / <NUM_LIT> ) ) return false ; if ( M [ i + <NUM_LIT> ] >= <NUM_LIT> && M [ i + <NUM_LIT> ] != ( int ) ( Off1 + i / <NUM_LIT> ) ) return false ; } return true ;


<s> if ( ! getVShiftImm ( Op , ElementBits , Cnt ) ) return false ; return ( Cnt >= <NUM_LIT> && ( isLong ? Cnt - <NUM_LIT> : Cnt ) < ElementBits ) ;


<s> static bool isVShiftRImm ( SDValue Op , EVT VT , bool isNarrow , bool isIntrinsic , int64_t & Cnt ) { assert ( VT . isVector ( ) && <STR_LIT> ) ; int64_t ElementBits = VT . getScalarSizeInBits ( ) ; if ( ! getVShiftImm ( Op , ElementBits , Cnt ) ) return false ; if ( ! isIntrinsic ) return ( Cnt >= <NUM_LIT> && Cnt <= ( isNarrow ? ElementBits / <NUM_LIT> : ElementBits ) ) ; if ( Cnt >= - ( isNarrow ? ElementBits / <NUM_LIT> : ElementBits ) && Cnt <= - <NUM_LIT> ) {


<s> if ( ( M [ i + j ] >= <NUM_LIT> && ( unsigned ) M [ i + j ] != j + WhichResult ) || ( M [ i + j + <NUM_LIT> ] >= <NUM_LIT> && ( unsigned ) M [ i + j + <NUM_LIT> ] != j + NumElts + WhichResult ) ) return false ; } } if ( M . size ( ) == NumElts * <NUM_LIT> ) WhichResult = <NUM_LIT> ;


<s> unsigned EltSz = VT . getScalarSizeInBits ( ) ; if ( EltSz == <NUM_LIT> ) return false ; unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ;

for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) {


<s> unsigned EltSz = VT . getScalarSizeInBits ( ) ; if ( EltSz == <NUM_LIT> ) return false ; unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ; for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) { WhichResult = SelectPairHalf ( NumElts , M , i ) ; for ( unsigned j = <NUM_LIT> ; j < NumElts ; ++ j ) { if ( M [ i + j ] >= <NUM_LIT> && ( unsigned ) M [ i + j ] != <NUM_LIT> * j + WhichResult ) return false ; } } if ( M . size ( ) == NumElts * <NUM_LIT> ) WhichResult = <NUM_LIT> ; if ( VT . is64BitVector ( ) && EltSz == <NUM_LIT> ) return false ;


<s> if ( N -> getOpcode ( ) == <STR_LIT> ) return true ; if ( N -> getOpcode ( ) == <STR_LIT> && N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) return true ;


<s> static bool IsVUZPShuffleNode ( SDNode * N ) {

if ( N -> getOpcode ( ) == <STR_LIT> ) return true ;


<s> static bool isVUZP_v_undef_Mask ( ArrayRef < int > M , EVT VT , unsigned & WhichResult ) { unsigned EltSz = VT . getScalarSizeInBits ( ) ; if ( EltSz == <NUM_LIT> ) return false ; unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ; unsigned Half = NumElts / <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) { WhichResult = SelectPairHalf ( NumElts , M , i ) ; for ( unsigned j = <NUM_LIT> ; j < NumElts ; j += Half ) { unsigned Idx = WhichResult ; for ( unsigned k = <NUM_LIT> ; k < Half ; ++ k ) { int MIdx = M [ i + j + k ] ;

if ( MIdx >= <NUM_LIT> && ( unsigned ) MIdx != Idx ) return false ;


<s> unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ; unsigned Half = NumElts / <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) { WhichResult = SelectPairHalf ( NumElts , M , i ) ; for ( unsigned j = <NUM_LIT> ; j < NumElts ; j += Half ) { unsigned Idx = WhichResult ; for ( unsigned k = <NUM_LIT> ; k < Half ; ++ k ) { int MIdx = M [ i + j + k ] ; if ( MIdx >= <NUM_LIT> && ( unsigned ) MIdx != Idx ) return false ; Idx += <NUM_LIT> ; }


<s> unsigned EltSz = VT . getScalarSizeInBits ( ) ; if ( EltSz == <NUM_LIT> ) return false ; unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ; for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) { WhichResult = SelectPairHalf ( NumElts , M , i ) ;

unsigned Idx = WhichResult * NumElts / <NUM_LIT> ;


<s> if ( EltSz == <NUM_LIT> ) return false ; unsigned NumElts = VT . getVectorNumElements ( ) ; if ( M . size ( ) != NumElts && M . size ( ) != NumElts * <NUM_LIT> ) return false ; for ( unsigned i = <NUM_LIT> ; i < M . size ( ) ; i += NumElts ) { WhichResult = SelectPairHalf ( NumElts , M , i ) ; unsigned Idx = WhichResult * NumElts / <NUM_LIT> ; for ( unsigned j = <NUM_LIT> ; j < NumElts ; j += <NUM_LIT> ) { if ( ( M [ i + j ] >= <NUM_LIT> && ( unsigned ) M [ i + j ] != Idx ) || ( M [ i + j + <NUM_LIT> ] >= <NUM_LIT> && ( unsigned ) M [ i + j + <NUM_LIT> ] != Idx ) ) return false ; Idx += <NUM_LIT> ; }


<s> static bool isZeroExtended ( SDNode * N , SelectionDAG & DAG ) { if ( N -> getOpcode ( ) == <STR_LIT> || N -> getOpcode ( ) == <STR_LIT> || <STR_LIT> ( N ) ) return true ; if ( isExtendedBUILD_VECTOR ( N , DAG , false ) ) return true ; return false ;


<s> static bool isZeroVector ( SDValue N ) { return ( <STR_LIT> ( N . getNode ( ) ) || ( N -> getOpcode ( ) == <STR_LIT> && isNullConstant ( N -> getOperand ( <NUM_LIT> ) ) ) ) ;


<s> SDValue Val = Parts [ <NUM_LIT> ] ; Val = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> ( PartBits ) , Val ) ; Val = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> ( ValueBits ) , Val ) ;

Val = DAG . getNode ( <STR_LIT> , DL , ValueVT , Val ) ;


<s> MVT HalfT = <STR_LIT> ; SDLoc dl ( N ) ; SDValue Hi , Lo , Tmp ; if ( ! isOperationLegalOrCustom ( <STR_LIT> , HalfT ) || ! isOperationLegalOrCustom ( <STR_LIT> , HalfT ) ) return ; unsigned OpTypeBits = HalfT . getScalarSizeInBits ( ) ; SDVTList VTList = DAG . getVTList ( HalfT , <STR_LIT> ) ; Lo = DAG . getNode ( <STR_LIT> , dl , HalfT , N -> getOperand ( <NUM_LIT> ) , DAG . getConstant ( <NUM_LIT> , dl , HalfT ) ) ; Hi = DAG . getNode ( <STR_LIT> , dl , HalfT , N -> getOperand ( <NUM_LIT> ) , DAG . getConstant ( <NUM_LIT> , dl , HalfT ) ) ; Tmp = DAG . getNode ( <STR_LIT> , dl , HalfT , Hi , DAG . getConstant ( OpTypeBits - <NUM_LIT> , dl , getShiftAmountTy ( HalfT , DAG . getDataLayout ( ) ) ) ) ; Lo = DAG . getNode ( <STR_LIT> , dl , VTList , Tmp , Lo ) ;

Hi = DAG . getNode ( <STR_LIT> , dl , VTList , Tmp , Hi , SDValue ( Lo . getNode ( ) , <NUM_LIT> ) ) ;


<s> SDValue Result ; if ( Op . getOpcode ( ) == <STR_LIT> ) { Carry = ConvertBooleanCarryToCarryFlag ( Carry , DAG ) ; Result = DAG . getNode ( <STR_LIT> , DL , VTs , Op . getOperand ( <NUM_LIT> ) , Op . getOperand ( <NUM_LIT> ) , Carry ) ; Carry = ConvertCarryFlagToBooleanCarry ( Result . getValue ( <NUM_LIT> ) , VT , DAG ) ; } else { Carry = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , Carry ) ; Carry = ConvertBooleanCarryToCarryFlag ( Carry , DAG ) ; Result = DAG . getNode ( <STR_LIT> , DL , VTs , Op . getOperand ( <NUM_LIT> ) , Op . getOperand ( <NUM_LIT> ) , Carry ) ; Carry = ConvertCarryFlagToBooleanCarry ( Result . getValue ( <NUM_LIT> ) , VT , DAG ) ; Carry = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , Carry ) ;


<s> Carry = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , Carry ) ; Carry = ConvertBooleanCarryToCarryFlag ( Carry , DAG ) ; Result = DAG . getNode ( <STR_LIT> , DL , VTs , Op . getOperand ( <NUM_LIT> ) , Op . getOperand ( <NUM_LIT> ) , Carry ) ; Carry = ConvertCarryFlagToBooleanCarry ( Result . getValue ( <NUM_LIT> ) , VT , DAG ) ; Carry = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) , Carry ) ; }

return DAG . getNode ( <STR_LIT> , DL , N -> getVTList ( ) , Result , Carry ) ;


<s> if ( ! Subtarget -> hasV6Ops ( ) || ! Subtarget -> hasDSP ( ) ) return SDValue ( ) ; if ( ! VT . isSimple ( ) ) return SDValue ( ) ; unsigned NewOpcode ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { default : return SDValue ( ) ; case <STR_LIT> : switch ( Op -> getOpcode ( ) ) { case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; } break ; case <STR_LIT> : switch ( Op -> getOpcode ( ) ) { case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; case <STR_LIT> : NewOpcode = <STR_LIT> ; break ; } break ; } SDLoc dl ( Op ) ; SDValue Add = DAG . getNode ( NewOpcode , dl , <STR_LIT> , DAG . getSExtOrTrunc ( Op -> getOperand ( <NUM_LIT> ) , dl , <STR_LIT> ) , DAG . getSExtOrTrunc ( Op -> getOperand ( <NUM_LIT> ) , dl , <STR_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , dl , VT , Add ) ;


<s> ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ; if ( ! C ) return ; int64_t CVal64 = C -> getSExtValue ( ) ; int CVal = ( int ) CVal64 ; if ( CVal != CVal64 ) return ; switch ( ConstraintLetter ) { case 'j' : if ( Subtarget -> hasV6T2Ops ( ) || ( Subtarget -> hasV8MBaselineOps ( ) ) ) if ( CVal >= <NUM_LIT> && CVal <= <NUM_LIT> ) break ; return ; case 'I' : if ( Subtarget -> isThumb1Only ( ) ) { if ( CVal >= <NUM_LIT> && CVal <= <NUM_LIT> ) break ; } else if ( Subtarget -> isThumb2 ( ) ) { if ( <STR_LIT> ( CVal ) != - <NUM_LIT> ) break ; } else { if ( <STR_LIT> ( CVal ) != - <NUM_LIT> ) break ; } return ; case 'J' : if ( Subtarget -> isThumb1Only ( ) ) { if ( CVal >= - <NUM_LIT> && CVal <= - <NUM_LIT> ) break ; } else { if ( CVal >= - <NUM_LIT> && CVal <= <NUM_LIT> ) break ; } return ; case 'K' : if ( Subtarget -> isThumb1Only ( ) ) { if ( CVal != <NUM_LIT> && <STR_LIT> ( CVal ) ) break ; } else if ( Subtarget -> isThumb2 ( ) ) { if ( <STR_LIT> ( ~ CVal ) != - <NUM_LIT> ) break ; } else { if ( <STR_LIT> ( ~ CVal ) != - <NUM_LIT> ) break ; } return ; case 'L' : if ( Subtarget -> isThumb1Only ( ) ) { if ( CVal >= - <NUM_LIT> && CVal < <NUM_LIT> ) break ; } else if ( Subtarget -> isThumb2 ( ) ) { if ( <STR_LIT> ( - CVal ) != - <NUM_LIT> ) break ; } else { if ( <STR_LIT> ( - CVal ) != - <NUM_LIT> ) break ; } return ; case 'M' : if ( Subtarget -> isThumb1Only ( ) ) { if ( ( CVal >= <NUM_LIT> && CVal <= <NUM_LIT> ) && ( ( CVal & <NUM_LIT> ) == <NUM_LIT> ) ) break ; } else { if ( ( CVal >= <NUM_LIT> && CVal <= <NUM_LIT> ) || ( ( CVal & ( CVal - <NUM_LIT> ) ) == <NUM_LIT> ) ) break ;


<s> static SDValue LowerAtomicLoadStore ( SDValue Op , SelectionDAG & DAG ) {

if ( isStrongerThanMonotonic ( cast < AtomicSDNode > ( Op ) -> getSuccessOrdering ( ) ) ) return SDValue ( ) ;


<s> static SDValue LowerAtomicLoadStore ( SDValue Op , SelectionDAG & DAG ) { if ( isStrongerThanMonotonic ( cast < AtomicSDNode > ( Op ) -> getSuccessOrdering ( ) ) ) return SDValue ( ) ;


<s> auto SSID = static_cast < SyncScope :: ID > ( SSIDNode -> getZExtValue ( ) ) ; if ( SSID == SyncScope :: SingleThread ) return Op ; if ( ! Subtarget -> hasDataBarrier ( ) ) { assert ( Subtarget -> hasV6Ops ( ) && ! Subtarget -> isThumb ( ) && <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Op . getOperand ( <NUM_LIT> ) , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; } ConstantSDNode * OrdN = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) ; AtomicOrdering Ord = static_cast < AtomicOrdering > ( OrdN -> getZExtValue ( ) ) ;


<s> bool IsPositionIndependent = isPositionIndependent ( ) || Subtarget -> isROPI ( ) ; if ( ! IsPositionIndependent ) { CPAddr = DAG . getTargetConstantPool ( BA , PtrVT , Align ( <NUM_LIT> ) ) ; } else { unsigned PCAdj = Subtarget -> isThumb ( ) ? <NUM_LIT> : <NUM_LIT> ; <ISA_LIT>PCLabelIndex = AFI -> createPICLabelUId ( ) ; <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( BA , <ISA_LIT>PCLabelIndex , <STR_LIT> , PCAdj ) ;

CPAddr = DAG . getTargetConstantPool ( CPV , PtrVT , Align ( <NUM_LIT> ) ) ;


<s> SDValue Cond = Op . getOperand ( <NUM_LIT> ) ; SDValue Dest = Op . getOperand ( <NUM_LIT> ) ; SDLoc dl ( Op ) ; unsigned Opc = Cond . getOpcode ( ) ; bool OptimizeMul = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && ! Subtarget -> isThumb1Only ( ) ; if ( Cond . getResNo ( ) == <NUM_LIT> && ( Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || OptimizeMul ) ) {

if ( ! DAG . getTargetLoweringInfo ( ) . isTypeLegal ( Cond -> getValueType ( <NUM_LIT> ) ) ) return SDValue ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerBR_CC ( SDValue Op , SelectionDAG & DAG ) const { SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue Dest = Op . getOperand ( <NUM_LIT> ) ; SDLoc dl ( Op ) ; if ( isUnsupportedFloatingType ( LHS . getValueType ( ) ) ) { DAG . getTargetLoweringInfo ( ) . softenSetCCOperands ( DAG , LHS . getValueType ( ) , LHS , RHS , CC , dl , LHS , RHS ) ; if ( ! RHS . getNode ( ) ) { RHS = DAG . getConstant ( <NUM_LIT> , dl , LHS . getValueType ( ) ) ; CC = <STR_LIT> ; } } unsigned Opc = LHS . getOpcode ( ) ; bool OptimizeMul = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && ! Subtarget -> isThumb1Only ( ) ;

if ( LHS . getResNo ( ) == <NUM_LIT> && ( isOneConstant ( RHS ) || isNullConstant ( RHS ) ) && ( Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || OptimizeMul ) && ( CC == <STR_LIT> || CC == <STR_LIT> ) ) {


<s> SDValue <ISA_LIT>TargetLowering :: LowerBR_CC ( SDValue Op , SelectionDAG & DAG ) const { SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue Dest = Op . getOperand ( <NUM_LIT> ) ; SDLoc dl ( Op ) ; if ( isUnsupportedFloatingType ( LHS . getValueType ( ) ) ) { DAG . getTargetLoweringInfo ( ) . softenSetCCOperands ( DAG , LHS . getValueType ( ) , LHS , RHS , CC , dl , LHS , RHS ) ; if ( ! RHS . getNode ( ) ) { RHS = DAG . getConstant ( <NUM_LIT> , dl , LHS . getValueType ( ) ) ; CC = <STR_LIT> ; } } unsigned Opc = LHS . getOpcode ( ) ; bool OptimizeMul = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && ! Subtarget -> isThumb1Only ( ) ; if ( LHS . getResNo ( ) == <NUM_LIT> && ( isOneConstant ( RHS ) || isNullConstant ( RHS ) ) && ( Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || Opc == <STR_LIT> || OptimizeMul ) && ( CC == <STR_LIT> || CC == <STR_LIT> ) ) { if ( ! DAG . getTargetLoweringInfo ( ) . isTypeLegal ( LHS -> getValueType ( <NUM_LIT> ) ) ) return SDValue ( ) ; SDValue Value , OverflowCmp ; SDValue <ISA_LIT>cc ; std :: tie ( Value , OverflowCmp ) = get<ISA_LIT>XALUOOp ( LHS . getValue ( <NUM_LIT> ) , DAG , <ISA_LIT>cc ) ; if ( ( CC == <STR_LIT> ) != isOneConstant ( RHS ) ) { <STR_LIT> CondCode = ( <STR_LIT> ) cast < const ConstantSDNode > ( <ISA_LIT>cc ) -> getZExtValue ( ) ; CondCode = <STR_LIT> ( CondCode ) ; <ISA_LIT>cc = DAG . getConstant ( CondCode , SDLoc ( <ISA_LIT>cc ) , <STR_LIT> ) ; } SDValue CCR = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , Dest , <ISA_LIT>cc , CCR , OverflowCmp ) ;


<s> if ( Subtarget -> isThumb2 ( ) || ( Subtarget -> hasV8MBaselineOps ( ) && Subtarget -> isThumb ( ) ) ) { return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , Addr , Op . getOperand ( <NUM_LIT> ) , JTI ) ; } if ( isPositionIndependent ( ) || Subtarget -> isROPI ( ) ) { Addr = DAG . getLoad ( ( EVT ) <STR_LIT> , dl , Chain , Addr , MachinePointerInfo :: getJumpTable ( DAG . getMachineFunction ( ) ) ) ; Chain = Addr . getValue ( <NUM_LIT> ) ;

Addr = DAG . getNode ( <STR_LIT> , dl , PTy , Table , Addr ) ;


<s> SDValue Index = Op . getOperand ( <NUM_LIT> ) ; SDLoc dl ( Op ) ; EVT PTy = getPointerTy ( DAG . getDataLayout ( ) ) ; JumpTableSDNode * JT = cast < JumpTableSDNode > ( Table ) ; SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( ) , PTy ) ; Table = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , JTI ) ; Index = DAG . getNode ( <STR_LIT> , dl , PTy , Index , DAG . getConstant ( <NUM_LIT> , dl , PTy ) ) ; SDValue Addr = DAG . getNode ( <STR_LIT> , dl , PTy , Table , Index ) ; if ( Subtarget -> isThumb2 ( ) || ( Subtarget -> hasV8MBaselineOps ( ) && Subtarget -> isThumb ( ) ) ) { return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , Addr , Op . getOperand ( <NUM_LIT> ) , JTI ) ; } if ( isPositionIndependent ( ) || Subtarget -> isROPI ( ) ) { Addr = DAG . getLoad ( ( EVT ) <STR_LIT> , dl , Chain , Addr , MachinePointerInfo :: getJumpTable ( DAG . getMachineFunction ( ) ) ) ; Chain = Addr . getValue ( <NUM_LIT> ) ;


<s> if ( BV . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ; SDValue Op0 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; int Offset = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) ; if ( Op0 . getValueType ( ) != <STR_LIT> || ( Offset != <NUM_LIT> && Offset != <NUM_LIT> ) ) return SDValue ( ) ; for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) { auto Check = [ ] ( SDValue Trunc , SDValue Op , unsigned Idx ) { return Trunc . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) == Op && Trunc . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) == Idx ; } ; if ( ! Check ( BV . getOperand ( i ) , Op0 , <NUM_LIT> * i + Offset ) ) return SDValue ( ) ; } return DAG . getNode ( <STR_LIT> , dl , VT , Op0 , DAG . getConstant ( Offset , dl , <STR_LIT> ) ) ;


<s> if ( VT != <STR_LIT> ) return SDValue ( ) ; if ( BV . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ; SDValue Op0 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; int Offset = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) ; if ( Op0 . getValueType ( ) != <STR_LIT> || ( Offset != <NUM_LIT> && Offset != <NUM_LIT> ) ) return SDValue ( ) ; for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) { auto Check = [ ] ( SDValue Trunc , SDValue Op , unsigned Idx ) { return Trunc . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) == Op && Trunc . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) == Idx ;


<s> if ( BV . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) != <NUM_LIT> ) return SDValue ( ) ; SDValue Op0 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; SDValue Op1 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; if ( Op0 . getValueType ( ) != <STR_LIT> || Op1 . getValueType ( ) != <STR_LIT> ) return SDValue ( ) ; for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) { auto Check = [ ] ( SDValue Trunc , SDValue Op , unsigned Idx ) { return Trunc . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> && Trunc . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) == Op && Trunc . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) == Idx ; } ; if ( ! Check ( BV . getOperand ( i * <NUM_LIT> + <NUM_LIT> ) , Op0 , i ) ) return SDValue ( ) ; if ( ! Check ( BV . getOperand ( i * <NUM_LIT> + <NUM_LIT> ) , Op1 , i ) ) return SDValue ( ) ; } SDValue N1 = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getUNDEF ( VT ) , Op0 , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , dl , VT , N1 , Op1 , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ;


<s> if ( ! ST -> hasMVEFloatOps ( ) ) return SDValue ( ) ; SDLoc dl ( BV ) ; EVT VT = BV . getValueType ( ) ; if ( VT != <STR_LIT> ) return SDValue ( ) ; if ( BV . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) != <NUM_LIT> ) return SDValue ( ) ; if ( BV . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getConstantOperandVal ( <NUM_LIT> ) != <NUM_LIT> ) return SDValue ( ) ; SDValue Op0 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; SDValue Op1 = BV . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ; if ( Op0 . getValueType ( ) != <STR_LIT> || Op1 . getValueType ( ) != <STR_LIT> ) return SDValue ( ) ;

for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) {


<s> if ( OpI . getOpcode ( ) != <STR_LIT> || OpI . getOperand ( <NUM_LIT> ) != Op0 || ! isa < ConstantSDNode > ( OpI . getOperand ( <NUM_LIT> ) ) || OpI . getConstantOperandVal ( <NUM_LIT> ) != I * N ) return SDValue ( ) ; } SDLoc DL ( Op ) ;

return DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( VT , <STR_LIT> ) , Op0 , DAG . getConstant ( N , DL , <STR_LIT> ) ) ;


<s> for ( unsigned I = <NUM_LIT> ; I < NumElts ; I ++ ) { SDValue OpI = Op . getOperand ( I ) ; if ( OpI . getOpcode ( ) != <STR_LIT> || OpI . getOperand ( <NUM_LIT> ) != Op0 || ! isa < ConstantSDNode > ( OpI . getOperand ( <NUM_LIT> ) ) || OpI . getConstantOperandVal ( <NUM_LIT> ) != I * N ) return SDValue ( ) ; } SDLoc DL ( Op ) ;


<s> SDValue V = Op . getOperand ( i ) ; if ( ! isa < ConstantSDNode > ( V ) && ! V . isUndef ( ) ) continue ; bool BitSet = V . isUndef ( ) ? false : cast < ConstantSDNode > ( V ) -> getZExtValue ( ) ; if ( BitSet ) Bits32 |= BoolMask << ( i * BitsPerBool ) ; } SDValue Base = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getConstant ( Bits32 , dl , <STR_LIT> ) ) ; for ( unsigned i = <NUM_LIT> ; i < NumElts ; ++ i ) { SDValue V = Op . getOperand ( i ) ; if ( isa < ConstantSDNode > ( V ) || V . isUndef ( ) ) continue ; Base = DAG . getNode ( <STR_LIT> , dl , VT , Base , V , DAG . getConstant ( i , dl , <STR_LIT> ) ) ;


<s> BitsPerBool = <NUM_LIT> ; BoolMask = <NUM_LIT> ; } else if ( NumElts == <NUM_LIT> ) { BitsPerBool = <NUM_LIT> ; BoolMask = <NUM_LIT> ; } else if ( NumElts == <NUM_LIT> ) { BitsPerBool = <NUM_LIT> ; BoolMask = <NUM_LIT> ; } else return SDValue ( ) ; SDValue FirstOp = Op . getOperand ( <NUM_LIT> ) ; if ( ! isa < ConstantSDNode > ( FirstOp ) && std :: all_of ( std :: next ( Op -> op_begin ( ) ) , Op -> op_end ( ) , [ & FirstOp ] ( SDUse & U ) { return U . get ( ) . isUndef ( ) || U . get ( ) == FirstOp ; } ) ) { SDValue Ext = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , FirstOp , DAG . getValueType ( <STR_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , dl , Op . getValueType ( ) , Ext ) ;


<s> SDValue Op1 = Op . getOperand ( <NUM_LIT> ) ; if ( ! Op0 . isUndef ( ) ) Val = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Val , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Op0 ) , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ;

if ( ! Op1 . isUndef ( ) ) Val = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Val , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Op1 ) , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ;


<s> assert ( ST -> hasMVEIntegerOps ( ) && <STR_LIT> ) ; auto ConcatPair = [ & ] ( SDValue V1 , SDValue V2 ) { EVT Op1VT = V1 . getValueType ( ) ; EVT Op2VT = V2 . getValueType ( ) ; assert ( Op1VT == Op2VT && <STR_LIT> ) ; EVT VT = Op1VT . getDoubleNumVectorElementsVT ( * DAG . getContext ( ) ) ; SDValue NewV1 = PromoteMVEPredVector ( dl , V1 , Op1VT , DAG ) ; SDValue NewV2 = PromoteMVEPredVector ( dl , V2 , Op2VT , DAG ) ; MVT ElType = getVectorTyFromPredicateVector ( VT ) . getScalarType ( ) . getSimpleVT ( ) ; unsigned NumElts = <NUM_LIT> * Op1VT . getVectorNumElements ( ) ; EVT ConcatVT = <STR_LIT> ( ElType , NumElts ) ; SDValue ConVec = DAG . getNode ( <STR_LIT> , dl , ConcatVT ) ; auto ExtractInto = [ & DAG , & dl ] ( SDValue NewV , SDValue ConVec , unsigned & j ) { EVT NewVT = NewV . getValueType ( ) ; EVT ConcatVT = ConVec . getValueType ( ) ; for ( unsigned i = <NUM_LIT> , e = NewVT . getVectorNumElements ( ) ; i < e ; i ++ , j ++ ) { SDValue Elt = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , NewV , DAG . getIntPtrConstant ( i , dl ) ) ; ConVec = DAG . getNode ( <STR_LIT> , dl , ConcatVT , ConVec , Elt , DAG . getConstant ( j , dl , <STR_LIT> ) ) ; } return ConVec ; } ; unsigned j = <NUM_LIT> ; ConVec = ExtractInto ( NewV1 , ConVec , j ) ; ConVec = ExtractInto ( NewV2 , ConVec , j ) ; return DAG . getNode ( <STR_LIT> , dl , VT , ConVec , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) ) ; } ; SmallVector < SDValue > ConcatOps ( Op -> op_begin ( ) , Op -> op_end ( ) ) ; while ( ConcatOps . size ( ) > <NUM_LIT> ) { for ( unsigned I = <NUM_LIT> , E = ConcatOps . size ( ) ; I != E ; I += <NUM_LIT> ) { SDValue V1 = ConcatOps [ I ] ; SDValue V2 = ConcatOps [ I + <NUM_LIT> ] ; ConcatOps [ I / <NUM_LIT> ] = ConcatPair ( V1 , V2 ) ; }

ConcatOps . resize ( ConcatOps . size ( ) / <NUM_LIT> ) ;


<s> SDLoc DL ( Op ) ; SDValue NewVal = DAG . getTargetConstant ( ImmVal , DL , <STR_LIT> ) ; SDValue VecConstant = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , NewVal ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , VecConstant , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) ; } if ( ! ST -> hasNEON ( ) || ( ! IsDouble && ! ST -> useNEONForSinglePrecisionFP ( ) ) ) return SDValue ( ) ; EVT VMovVT ; uint64_t iVal = FPVal . bitcastToAPInt ( ) . getZExtValue ( ) ; if ( IsDouble && ( iVal & <NUM_LIT> ) != ( iVal >> <NUM_LIT> ) ) return SDValue ( ) ; SDValue NewVal = isVMOVModifiedImm ( iVal & <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , DAG , SDLoc ( Op ) , VMovVT , VT , VMOVModImm ) ; if ( NewVal != SDValue ( ) ) { SDLoc DL ( Op ) ; SDValue VecConstant = DAG . getNode ( <STR_LIT> , DL , VMovVT , NewVal ) ; if ( IsDouble ) return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , VecConstant ) ; SDValue VecFConstant = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , VecConstant ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , VecFConstant , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) ; } NewVal = isVMOVModifiedImm ( ~ iVal & <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , DAG , SDLoc ( Op ) , VMovVT , VT , VMVNModImm ) ;


<s> auto M = const_cast < Module * > ( DAG . getMachineFunction ( ) . getFunction ( ) . getParent ( ) ) ; auto GV = new GlobalVariable ( * M , T , true , GlobalVariable :: InternalLinkage , C , Twine ( DAG . getDataLayout ( ) . getPrivateGlobalPrefix ( ) ) + <STR_LIT> + Twine ( DAG . getMachineFunction ( ) . getFunctionNumber ( ) ) + <STR_LIT> + Twine ( AFI -> createPICLabelUId ( ) ) ) ; SDValue GA = DAG . getTargetGlobalAddress ( dyn_cast < GlobalValue > ( GV ) , dl , PtrVT ) ; return LowerGlobalAddress ( GA , DAG ) ; } if ( CP -> isMachineConstantPoolEntry ( ) ) Res = DAG . getTargetConstantPool ( CP -> getMachineCPVal ( ) , PtrVT , CP -> getAlign ( ) ) ; else Res = DAG . getTargetConstantPool ( CP -> getConstVal ( ) , PtrVT , CP -> getAlign ( ) ) ;

return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Res ) ;


<s> SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( DAG . getConstant ( <STR_LIT> , DL , TLI . getPointerTy ( DAG . getDataLayout ( ) ) ) ) ; Ops . push_back ( Res ) ; EltSize *= <NUM_LIT> ; NumElts /= <NUM_LIT> ; MVT WidenVT = <STR_LIT> ( <STR_LIT> ( EltSize ) , NumElts ) ; Res = DAG . getNode ( <STR_LIT> , DL , WidenVT , Ops ) ; } return Res ;


<s> unsigned NumElts = VT . is64BitVector ( ) ? <NUM_LIT> : <NUM_LIT> ; while ( EltSize != VT . getScalarSizeInBits ( ) ) { SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( DAG . getConstant ( <STR_LIT> , DL , TLI . getPointerTy ( DAG . getDataLayout ( ) ) ) ) ; Ops . push_back ( Res ) ; EltSize *= <NUM_LIT> ; NumElts /= <NUM_LIT> ; MVT WidenVT = <STR_LIT> ( <STR_LIT> ( EltSize ) , NumElts ) ; Res = DAG . getNode ( <STR_LIT> , DL , WidenVT , Ops ) ; }


<s> if ( VT . isVector ( ) && ST -> hasNEON ( ) ) { SDValue X = N -> getOperand ( <NUM_LIT> ) ; SDValue NX = DAG . getNode ( <STR_LIT> , dl , VT , getZeroVector ( VT , DAG , dl ) , X ) ; SDValue LSB = DAG . getNode ( <STR_LIT> , dl , VT , X , NX ) ; EVT ElemTy = VT . getVectorElementType ( ) ; if ( ElemTy == <STR_LIT> ) { SDValue One = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( <NUM_LIT> , dl , ElemTy ) ) ; SDValue Bits = DAG . getNode ( <STR_LIT> , dl , VT , LSB , One ) ; return DAG . getNode ( <STR_LIT> , dl , VT , Bits ) ; } if ( ( ElemTy == <STR_LIT> || ElemTy == <STR_LIT> ) && ( N -> getOpcode ( ) == <STR_LIT> ) ) { unsigned NumBits = ElemTy . getSizeInBits ( ) ; SDValue WidthMinus1 = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( NumBits - <NUM_LIT> , dl , ElemTy ) ) ;

SDValue CTLZ = DAG . getNode ( <STR_LIT> , dl , VT , LSB ) ;


<s> SDValue LSB = DAG . getNode ( <STR_LIT> , dl , VT , X , NX ) ; EVT ElemTy = VT . getVectorElementType ( ) ; if ( ElemTy == <STR_LIT> ) { SDValue One = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( <NUM_LIT> , dl , ElemTy ) ) ; SDValue Bits = DAG . getNode ( <STR_LIT> , dl , VT , LSB , One ) ; return DAG . getNode ( <STR_LIT> , dl , VT , Bits ) ; } if ( ( ElemTy == <STR_LIT> || ElemTy == <STR_LIT> ) && ( N -> getOpcode ( ) == <STR_LIT> ) ) { unsigned NumBits = ElemTy . getSizeInBits ( ) ; SDValue WidthMinus1 = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( NumBits - <NUM_LIT> , dl , ElemTy ) ) ; SDValue CTLZ = DAG . getNode ( <STR_LIT> , dl , VT , LSB ) ; return DAG . getNode ( <STR_LIT> , dl , VT , WidthMinus1 , CTLZ ) ; } SDValue Bits ; if ( ElemTy == <STR_LIT> ) { SDValue FF = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; Bits = DAG . getNode ( <STR_LIT> , dl , VT , LSB , FF ) ; } else { SDValue One = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( <NUM_LIT> , dl , ElemTy ) ) ; Bits = DAG . getNode ( <STR_LIT> , dl , VT , LSB , One ) ;


<s> assert ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && <STR_LIT> ) ; bool isSigned = ( Opcode == <STR_LIT> ) ; EVT VT = Op -> getValueType ( <NUM_LIT> ) ; Type * Ty = VT . getTypeForEVT ( * DAG . getContext ( ) ) ; SDLoc dl ( Op ) ; bool hasDivide = Subtarget -> isThumb ( ) ? Subtarget -> hasDivideInThumbMode ( ) : Subtarget -> hasDivideIn<ISA_LIT>Mode ( ) ; if ( hasDivide && Op -> getValueType ( <NUM_LIT> ) . isSimple ( ) && Op -> getSimpleValueType ( <NUM_LIT> ) == <STR_LIT> ) { unsigned DivOpcode = isSigned ? <STR_LIT> : <STR_LIT> ; const SDValue Dividend = Op -> getOperand ( <NUM_LIT> ) ; const SDValue Divisor = Op -> getOperand ( <NUM_LIT> ) ; SDValue Div = DAG . getNode ( DivOpcode , dl , VT , Dividend , Divisor ) ; SDValue Mul = DAG . getNode ( <STR_LIT> , dl , VT , Div , Divisor ) ; SDValue Rem = DAG . getNode ( <STR_LIT> , dl , VT , Dividend , Mul ) ; SDValue Values [ <NUM_LIT> ] = { Div , Rem } ; return DAG . getNode ( <STR_LIT> , dl , DAG . getVTList ( VT , VT ) , Values ) ;


<s> Chain = DAG . getCopyToReg ( Chain , DL , <STR_LIT> , SP ) ; SDValue Ops [ <NUM_LIT> ] = { SP , Chain } ; return DAG . getMergeValues ( Ops , DL ) ; } SDValue Words = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Size , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) ; SDValue Flag ; Chain = DAG . getCopyToReg ( Chain , DL , <STR_LIT> , Words , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; Chain = DAG . getNode ( <STR_LIT> , DL , NodeTys , Chain , Flag ) ; SDValue NewSP = DAG . getCopyFromReg ( Chain , DL , <STR_LIT> , <STR_LIT> ) ; Chain = NewSP . getValue ( <NUM_LIT> ) ;

SDValue Ops [ <NUM_LIT> ] = { NewSP , Chain } ;


<s> SDValue NewV1 = PromoteMVEPredVector ( dl , V1 , Op1VT , DAG ) ; MVT ElType = getVectorTyFromPredicateVector ( VT ) . getScalarType ( ) . getSimpleVT ( ) ; EVT SubVT = <STR_LIT> ( ElType , NumElts ) ; SDValue SubVec = DAG . getNode ( <STR_LIT> , dl , SubVT ) ; for ( unsigned i = Index , j = <NUM_LIT> ; i < ( Index + NumElts ) ; i ++ , j ++ ) { SDValue Elt = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , NewV1 , DAG . getIntPtrConstant ( i , dl ) ) ;

SubVec = DAG . getNode ( <STR_LIT> , dl , SubVT , SubVec , Elt , DAG . getConstant ( j , dl , <STR_LIT> ) ) ;


<s> if ( ST -> hasMVEIntegerOps ( ) && VT . getScalarSizeInBits ( ) == <NUM_LIT> ) return LowerEXTRACT_VECTOR_ELT_i1 ( Op , DAG , ST ) ; if ( Op . getValueType ( ) == <STR_LIT> && Vec . getScalarValueSizeInBits ( ) < <NUM_LIT> ) { SDLoc dl ( Op ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Vec , Lane ) ; } return Op ;


<s> if ( ! isa < ConstantSDNode > ( Lane ) ) return SDValue ( ) ; SDValue Vec = Op . getOperand ( <NUM_LIT> ) ; EVT VT = Vec . getValueType ( ) ; if ( ST -> hasMVEIntegerOps ( ) && VT . getScalarSizeInBits ( ) == <NUM_LIT> ) return LowerEXTRACT_VECTOR_ELT_i1 ( Op , DAG , ST ) ; if ( Op . getValueType ( ) == <STR_LIT> && Vec . getScalarValueSizeInBits ( ) < <NUM_LIT> ) { SDLoc dl ( Op ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Vec , Lane ) ; }


<s> EVT VecVT = Op . getOperand ( <NUM_LIT> ) . getValueType ( ) ; SDLoc dl ( Op ) ; assert ( ST -> hasMVEIntegerOps ( ) && <STR_LIT> ) ; SDValue Conv = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Op -> getOperand ( <NUM_LIT> ) ) ;

unsigned Lane = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ;


<s> unsigned LaneWidth = getVectorTyFromPredicateVector ( VecVT ) . getScalarSizeInBits ( ) / <NUM_LIT> ; SDValue Shift = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Conv , DAG . getConstant ( Lane * LaneWidth , dl , <STR_LIT> ) ) ;


<s> if ( VT == <STR_LIT> ) Tmp1 = DAG . getNode ( <STR_LIT> , dl , OpVT , DAG . getNode ( <STR_LIT> , dl , OpVT , Tmp1 ) , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; } else if ( VT == <STR_LIT> ) Tmp1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp1 ) , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; Tmp0 = DAG . getNode ( <STR_LIT> , dl , OpVT , Tmp0 ) ; Tmp1 = DAG . getNode ( <STR_LIT> , dl , OpVT , Tmp1 ) ; SDValue AllOnes = DAG . getTargetConstant ( <STR_LIT> ( <NUM_LIT> , <NUM_LIT> ) , dl , <STR_LIT> ) ; AllOnes = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , AllOnes ) ; SDValue MaskNot = DAG . getNode ( <STR_LIT> , dl , OpVT , Mask , DAG . getNode ( <STR_LIT> , dl , OpVT , AllOnes ) ) ; SDValue Res = DAG . getNode ( <STR_LIT> , dl , OpVT , DAG . getNode ( <STR_LIT> , dl , OpVT , Tmp1 , Mask ) , DAG . getNode ( <STR_LIT> , dl , OpVT , Tmp0 , MaskNot ) ) ; if ( VT == <STR_LIT> ) { Res = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Res ) ; Res = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Res , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; } else { Res = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Res ) ; } return Res ; } if ( SrcVT == <STR_LIT> ) Tmp1 = DAG . getNode ( <STR_LIT> , dl , DAG . getVTList ( <STR_LIT> , <STR_LIT> ) , Tmp1 ) . getValue ( <NUM_LIT> ) ; Tmp1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp1 ) ; SDValue Mask1 = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDValue Mask2 = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; Tmp1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp1 , Mask1 ) ; if ( VT == <STR_LIT> ) { Tmp0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp0 ) , Mask2 ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp0 , Tmp1 ) ) ; } Tmp0 = DAG . getNode ( <STR_LIT> , dl , DAG . getVTList ( <STR_LIT> , <STR_LIT> ) , Tmp0 ) ; SDValue Lo = Tmp0 . getValue ( <NUM_LIT> ) ; SDValue Hi = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Tmp0 . getValue ( <NUM_LIT> ) , Mask2 ) ;

Hi = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Hi , Tmp1 ) ;


<s> SDLoc dl ( Op ) ; SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; SDValue Ops [ ] = { Chain , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) } ; SDValue FPSCR = DAG . getNode ( <STR_LIT> , dl , { <STR_LIT> , <STR_LIT> } , Ops ) ; Chain = FPSCR . getValue ( <NUM_LIT> ) ;

SDValue FltRounds = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , FPSCR , DAG . getConstant ( <NUM_LIT> << <NUM_LIT> , dl , <STR_LIT> ) ) ;


<s> SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; SDValue Ops [ ] = { Chain , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) } ; SDValue FPSCR = DAG . getNode ( <STR_LIT> , dl , { <STR_LIT> , <STR_LIT> } , Ops ) ; Chain = FPSCR . getValue ( <NUM_LIT> ) ; SDValue FltRounds = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , FPSCR , DAG . getConstant ( <NUM_LIT> << <NUM_LIT> , dl , <STR_LIT> ) ) ; SDValue RMODE = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , FltRounds , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; SDValue And = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , RMODE , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; return DAG . getMergeValues ( { And , Chain } , dl ) ;


<s> } return Op ; } SDLoc Loc ( Op ) ; RTLIB :: Libcall LC ; MakeLibCallOptions CallOptions ; SDValue Chain = IsStrict ? Op . getOperand ( <NUM_LIT> ) : SDValue ( ) ; for ( unsigned Sz = SrcSz ; Sz <= <NUM_LIT> && Sz < DstSz ; Sz *= <NUM_LIT> ) { bool Supported = ( Sz == <NUM_LIT> ? Subtarget -> hasFP16 ( ) : Subtarget -> hasFP64 ( ) ) ; MVT SrcVT = ( Sz == <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) ; MVT DstVT = ( Sz == <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) ; if ( Supported ) { if ( IsStrict ) { SrcVal = DAG . getNode ( <STR_LIT> , Loc , { DstVT , <STR_LIT> } , { Chain , SrcVal } ) ; Chain = SrcVal . getValue ( <NUM_LIT> ) ; } else { SrcVal = DAG . getNode ( <STR_LIT> , Loc , DstVT , SrcVal ) ; } } else { LC = RTLIB :: getFPEXT ( SrcVT , DstVT ) ; assert ( LC != RTLIB :: UNKNOWN_LIBCALL && <STR_LIT> ) ; std :: tie ( SrcVal , Chain ) = makeLibCall ( DAG , LC , DstVT , SrcVal , CallOptions , Loc , Chain ) ; } } return IsStrict ? DAG . getMergeValues ( { SrcVal , Chain } , Loc ) : SrcVal ;


<s> const unsigned SrcSz = SrcVal . getValueType ( ) . getSizeInBits ( ) ; assert ( DstSz > SrcSz && DstSz <= <NUM_LIT> && SrcSz >= <NUM_LIT> && <STR_LIT> ) ; assert ( ( ! Subtarget -> hasFP64 ( ) || ! Subtarget -> hasFP<ISA_LIT>v8Base ( ) ) && <STR_LIT> ) ; assert ( ! ( DstSz == <NUM_LIT> && Subtarget -> hasFP16 ( ) ) && <STR_LIT> ) ; if ( SrcSz == <NUM_LIT> && DstSz == <NUM_LIT> && Subtarget -> hasFP64 ( ) ) { if ( IsStrict ) { SDLoc Loc ( Op ) ; SDValue Result = DAG . getNode ( <STR_LIT> , Loc , Op . getValueType ( ) , SrcVal ) ; return DAG . getMergeValues ( { Result , Op . getOperand ( <NUM_LIT> ) } , Loc ) ; } return Op ; } SDLoc Loc ( Op ) ; RTLIB :: Libcall LC ; MakeLibCallOptions CallOptions ; SDValue Chain = IsStrict ? Op . getOperand ( <NUM_LIT> ) : SDValue ( ) ; for ( unsigned Sz = SrcSz ; Sz <= <NUM_LIT> && Sz < DstSz ; Sz *= <NUM_LIT> ) { bool Supported = ( Sz == <NUM_LIT> ? Subtarget -> hasFP16 ( ) : Subtarget -> hasFP64 ( ) ) ;

MVT SrcVT = ( Sz == <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) ;


<s> const unsigned SrcSz = SrcVT . getSizeInBits ( ) ; ( void ) DstSz ; assert ( DstSz < SrcSz && SrcSz <= <NUM_LIT> && DstSz >= <NUM_LIT> && <STR_LIT> ) ; assert ( ( ! Subtarget -> hasFP64 ( ) || ! Subtarget -> hasFP<ISA_LIT>v8Base ( ) ) && <STR_LIT> ) ; SDLoc Loc ( Op ) ; if ( SrcSz == <NUM_LIT> && Subtarget -> hasFP16 ( ) ) return Op ; RTLIB :: Libcall LC = RTLIB :: getFPROUND ( SrcVT , DstVT ) ;

assert ( LC != RTLIB :: UNKNOWN_LIBCALL && <STR_LIT> ) ;


<s> if ( VT . isVector ( ) ) return LowerVectorFP_TO_INT ( Op , DAG ) ; bool IsStrict = Op -> isStrictFPOpcode ( ) ; SDValue SrcVal = Op . getOperand ( IsStrict ? <NUM_LIT> : <NUM_LIT> ) ; if ( isUnsupportedFloatingType ( SrcVal . getValueType ( ) ) ) { RTLIB :: Libcall LC ; if ( Op . getOpcode ( ) == <STR_LIT> || Op . getOpcode ( ) == <STR_LIT> ) LC = RTLIB :: getFPTOSINT ( SrcVal . getValueType ( ) , Op . getValueType ( ) ) ; else LC = RTLIB :: getFPTOUINT ( SrcVal . getValueType ( ) , Op . getValueType ( ) ) ; SDLoc Loc ( Op ) ; MakeLibCallOptions CallOptions ; SDValue Chain = IsStrict ? Op . getOperand ( <NUM_LIT> ) : SDValue ( ) ;


<s> SDValue SrcVal = Op . getOperand ( IsStrict ? <NUM_LIT> : <NUM_LIT> ) ; if ( isUnsupportedFloatingType ( SrcVal . getValueType ( ) ) ) { RTLIB :: Libcall LC ; if ( Op . getOpcode ( ) == <STR_LIT> || Op . getOpcode ( ) == <STR_LIT> ) LC = RTLIB :: getFPTOSINT ( SrcVal . getValueType ( ) , Op . getValueType ( ) ) ; else LC = RTLIB :: getFPTOUINT ( SrcVal . getValueType ( ) , Op . getValueType ( ) ) ; SDLoc Loc ( Op ) ; MakeLibCallOptions CallOptions ; SDValue Chain = IsStrict ? Op . getOperand ( <NUM_LIT> ) : SDValue ( ) ; SDValue Result ; std :: tie ( Result , Chain ) = makeLibCall ( DAG , LC , Op . getValueType ( ) , SrcVal , CallOptions , Loc , Chain ) ; return IsStrict ? DAG . getMergeValues ( { Result , Chain } , Loc ) : Result ; } if ( IsStrict ) { SDLoc Loc ( Op ) ; SDValue Result = DAG . getNode ( Op . getOpcode ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> , Loc , Op . getValueType ( ) , SrcVal ) ; return DAG . getMergeValues ( { Result , Op . getOperand ( <NUM_LIT> ) } , Loc ) ; }


<s> if ( VT == <STR_LIT> && ToVT == <STR_LIT> && FromVT == <STR_LIT> && Subtarget -> hasMVEFloatOps ( ) ) return Op ; if ( VT == <STR_LIT> && ToVT == <STR_LIT> && FromVT == <STR_LIT> && Subtarget -> hasMVEFloatOps ( ) ) return Op ; if ( FromVT != <STR_LIT> && FromVT != <STR_LIT> ) return SDValue ( ) ; SDLoc DL ( Op ) ; bool IsSigned = Op . getOpcode ( ) == <STR_LIT> ; unsigned BW = ToVT . getScalarSizeInBits ( ) - IsSigned ; SDValue CVT = DAG . getNode ( Op . getOpcode ( ) , DL , VT , Op . getOperand ( <NUM_LIT> ) , DAG . getValueType ( VT . getScalarType ( ) ) ) ; SDValue Max = DAG . getNode ( IsSigned ? <STR_LIT> : <STR_LIT> , DL , VT , CVT , DAG . getConstant ( ( <NUM_LIT> << BW ) - <NUM_LIT> , DL , VT ) ) ; if ( IsSigned ) Max = DAG . getNode ( <STR_LIT> , DL , VT , Max , DAG . getConstant ( - ( <NUM_LIT> << BW ) , DL , VT ) ) ;


<s> SDLoc dl ( Op ) ; unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; Register FrameReg = ARI . getFrameRegister ( MF ) ; SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , dl , FrameReg , VT ) ;

while ( Depth -- ) FrameAddr = DAG . getLoad ( VT , dl , DAG . getEntryNode ( ) , FrameAddr , MachinePointerInfo ( ) ) ;


<s> SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , dl , FrameReg , VT ) ; while ( Depth -- ) FrameAddr = DAG . getLoad ( VT , dl , DAG . getEntryNode ( ) , FrameAddr , MachinePointerInfo ( ) ) ;


<s> SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; bool IsSignaling = Op . getOpcode ( ) == <STR_LIT> ; if ( isUnsupportedFloatingType ( LHS . getValueType ( ) ) ) { DAG . getTargetLoweringInfo ( ) . softenSetCCOperands ( DAG , LHS . getValueType ( ) , LHS , RHS , CC , dl , LHS , RHS , Chain , IsSignaling ) ; if ( ! RHS . getNode ( ) ) { RHS = DAG . getConstant ( <NUM_LIT> , dl , LHS . getValueType ( ) ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerFSINCOS ( SDValue Op , SelectionDAG & DAG ) const { assert ( Subtarget -> isTargetDarwin ( ) ) ; SDLoc dl ( Op ) ; SDValue Arg = Op . getOperand ( <NUM_LIT> ) ; EVT ArgVT = Arg . getValueType ( ) ; Type * ArgTy = ArgVT . getTypeForEVT ( * DAG . getContext ( ) ) ; auto PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; MachineFrameInfo & MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ; const TargetLowering & TLI = DAG . getTargetLoweringInfo ( ) ; Type * RetTy = StructType :: get ( ArgTy , ArgTy ) ; auto & DL = DAG . getDataLayout ( ) ; ArgListTy Args ; bool ShouldUseSRet = Subtarget -> isAPCS_ABI ( ) ; SDValue SRet ; if ( ShouldUseSRet ) { const uint64_t ByteSize = DL . getTypeAllocSize ( RetTy ) ; const Align StackAlign = DL . getPrefTypeAlign ( RetTy ) ; int FrameIdx = MFI . CreateStackObject ( ByteSize , StackAlign , false ) ; SRet = DAG . getFrameIndex ( FrameIdx , TLI . getPointerTy ( DL ) ) ; ArgListEntry Entry ; Entry . Node = SRet ; Entry . Ty = RetTy -> getPointerTo ( ) ; Entry . IsSExt = false ;


<s> Entry . Ty = RetTy -> getPointerTo ( ) ; Entry . IsSExt = false ; Entry . IsZExt = false ; Entry . IsSRet = true ; Args . push_back ( Entry ) ; RetTy = Type :: getVoidTy ( * DAG . getContext ( ) ) ; } ArgListEntry Entry ; Entry . Node = Arg ; Entry . Ty = ArgTy ; Entry . IsSExt = false ; Entry . IsZExt = false ; Args . push_back ( Entry ) ; RTLIB :: Libcall LC = ( ArgVT == <STR_LIT> ) ? RTLIB :: SINCOS_STRET_F64 : RTLIB :: SINCOS_STRET_F32 ; const char * LibcallName = getLibcallName ( LC ) ; CallingConv :: ID CC = getLibcallCallingConv ( LC ) ; SDValue Callee = DAG . getExternalSymbol ( LibcallName , getPointerTy ( DL ) ) ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ; CLI . setDebugLoc ( dl ) . setChain ( DAG . getEntryNode ( ) ) . setCallee ( CC , RetTy , Callee , std :: move ( Args ) ) . setDiscardResult ( ShouldUseSRet ) ; std :: pair < SDValue , SDValue > CallResult = LowerCallTo ( CLI ) ; if ( ! ShouldUseSRet ) return CallResult . first ; SDValue LoadSin = DAG . getLoad ( ArgVT , dl , CallResult . second , SRet , MachinePointerInfo ( ) ) ; SDValue Add = DAG . getNode ( <STR_LIT> , dl , PtrVT , SRet , DAG . getIntPtrConstant ( ArgVT . getStoreSize ( ) , dl ) ) ; SDValue LoadCos = DAG . getLoad ( ArgVT , dl , LoadSin . getValue ( <NUM_LIT> ) , Add , MachinePointerInfo ( ) ) ; SDVTList Tys = DAG . getVTList ( ArgVT , ArgVT ) ;

return DAG . getNode ( <STR_LIT> , dl , Tys , LoadSin . getValue ( <NUM_LIT> ) , LoadCos . getValue ( <NUM_LIT> ) ) ;


<s> case Triple :: COFF : return LowerGlobalAddressWindows ( Op , DAG ) ; case Triple :: ELF :

return LowerGlobalAddressELF ( Op , DAG ) ;


<s> const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; if ( Subtarget -> useMovt ( ) ) ++ NumMovwMovt ; unsigned Wrapper = isPositionIndependent ( ) ? <STR_LIT> : <STR_LIT> ; SDValue G = DAG . getTargetGlobalAddress ( GV , dl , PtrVT , <NUM_LIT> , <STR_LIT> ) ; SDValue Result = DAG . getNode ( Wrapper , dl , PtrVT , G ) ; if ( Subtarget -> isGVIndirectSymbol ( GV ) ) Result = DAG . getLoad ( PtrVT , dl , DAG . getEntryNode ( ) , Result , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ;


<s> RelAddr = DAG . getNode ( <STR_LIT> , dl , PtrVT , G ) ; } else { <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GV , <STR_LIT> ) ; SDValue CPAddr = DAG . getTargetConstantPool ( CPV , PtrVT , Align ( <NUM_LIT> ) ) ; CPAddr = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CPAddr ) ; RelAddr = DAG . getLoad ( PtrVT , dl , DAG . getEntryNode ( ) , CPAddr , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ; } SDValue SB = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , dl , <STR_LIT> , PtrVT ) ; SDValue Result = DAG . getNode ( <STR_LIT> , dl , PtrVT , SB , RelAddr ) ; return Result ; } if ( Subtarget -> useMovt ( ) ) { ++ NumMovwMovt ; return DAG . getNode ( <STR_LIT> , dl , PtrVT , DAG . getTargetGlobalAddress ( GV , dl , PtrVT ) ) ; } else { SDValue CPAddr = DAG . getTargetConstantPool ( GV , PtrVT , Align ( <NUM_LIT> ) ) ; CPAddr = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , CPAddr ) ; return DAG . getLoad ( PtrVT , dl , DAG . getEntryNode ( ) , CPAddr , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ; }


<s> const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; const TargetMachine & TM = getTargetMachine ( ) ; bool IsRO = isReadOnly ( GV ) ; if ( TM . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) && ! Subtarget -> genExecuteOnly ( ) ) if ( SDValue V = promoteToConstantPool ( this , GV , DAG , PtrVT , dl ) ) return V ; if ( isPositionIndependent ( ) ) { bool UseGOT_PREL = ! TM . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) ; SDValue G = DAG . getTargetGlobalAddress ( GV , dl , PtrVT , <NUM_LIT> , UseGOT_PREL ? <STR_LIT> : <NUM_LIT> ) ; SDValue Result = DAG . getNode ( <STR_LIT> , dl , PtrVT , G ) ; if ( UseGOT_PREL ) Result = DAG . getLoad ( PtrVT , dl , DAG . getEntryNode ( ) , Result , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ; return Result ; } else if ( Subtarget -> isROPI ( ) && IsRO ) { SDValue G = DAG . getTargetGlobalAddress ( GV , dl , PtrVT ) ; SDValue Result = DAG . getNode ( <STR_LIT> , dl , PtrVT , G ) ; return Result ; } else if ( Subtarget -> isRWPI ( ) && ! IsRO ) { SDValue RelAddr ; if ( Subtarget -> useMovt ( ) ) { ++ NumMovwMovt ; SDValue G = DAG . getTargetGlobalAddress ( GV , dl , PtrVT , <NUM_LIT> , <STR_LIT> ) ; RelAddr = DAG . getNode ( <STR_LIT> , dl , PtrVT , G ) ;


<s> else if ( ! TM . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) ) TargetFlags = <STR_LIT> ; EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue Result ; SDLoc DL ( Op ) ; ++ NumMovwMovt ; Result = DAG . getNode ( <STR_LIT> , DL , PtrVT , DAG . getTargetGlobalAddress ( GV , DL , PtrVT , <NUM_LIT> , TargetFlags ) ) ; if ( TargetFlags & ( <STR_LIT> | <STR_LIT> ) ) Result = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , Result , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ; return Result ;


<s> if ( Subtarget -> isTargetWindows ( ) ) return LowerGlobalTLSAddressWindows ( Op , DAG ) ; assert ( Subtarget -> isTargetELF ( ) && <STR_LIT> ) ; TLSModel :: Model model = getTargetMachine ( ) . getTLSModel ( GA -> getGlobal ( ) ) ; switch ( model ) {


<s> SDValue DescAddr = LowerGlobalAddressDarwin ( Op , DAG ) ; SDValue Chain = DAG . getEntryNode ( ) ; SDValue FuncTLVGet = DAG . getLoad ( <STR_LIT> , DL , Chain , DescAddr , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) , Align ( <NUM_LIT> ) , MachineMemOperand :: MONonTemporal | MachineMemOperand :: MODereferenceable | MachineMemOperand :: MOInvariant ) ; Chain = FuncTLVGet . getValue ( <NUM_LIT> ) ; MachineFunction & F = DAG . getMachineFunction ( ) ; MachineFrameInfo & MFI = F . getFrameInfo ( ) ; MFI . setAdjustsStack ( true ) ; auto TRI = getTargetMachine ( ) . getSubtargetImpl ( F . getFunction ( ) ) -> getRegisterInfo ( ) ; auto ARI = static_cast < const <ISA_LIT>RegisterInfo * > ( TRI ) ; const uint32_t * Mask = ARI -> getTLSCallPreservedMask ( DAG . getMachineFunction ( ) ) ; Chain = DAG . getCopyToReg ( Chain , DL , <STR_LIT> , DescAddr , SDValue ( ) ) ; Chain = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( <STR_LIT> , <STR_LIT> ) , Chain , FuncTLVGet , DAG . getRegister ( <STR_LIT> , <STR_LIT> ) , DAG . getRegisterMask ( Mask ) , Chain . getValue ( <NUM_LIT> ) ) ;

return DAG . getCopyFromReg ( Chain , DL , <STR_LIT> , <STR_LIT> , Chain . getValue ( <NUM_LIT> ) ) ;


<s> SDLoc DL ( Op ) ; SDValue Ops [ ] = { Chain , DAG . getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , DAG . getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , DAG . getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , DAG . getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , DAG . getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , DAG . getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) } ; SDValue CurrentTEB = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( <STR_LIT> , <STR_LIT> ) , Ops ) ; SDValue TEB = CurrentTEB . getValue ( <NUM_LIT> ) ; Chain = CurrentTEB . getValue ( <NUM_LIT> ) ; SDValue TLSArray = DAG . getNode ( <STR_LIT> , DL , PtrVT , TEB , DAG . getIntPtrConstant ( <NUM_LIT> , DL ) ) ; TLSArray = DAG . getLoad ( PtrVT , DL , Chain , TLSArray , MachinePointerInfo ( ) ) ; SDValue TLSIndex = DAG . getTargetExternalSymbol ( <STR_LIT> , PtrVT , <STR_LIT> ) ; TLSIndex = DAG . getNode ( <STR_LIT> , DL , PtrVT , TLSIndex ) ; TLSIndex = DAG . getLoad ( PtrVT , DL , Chain , TLSIndex , MachinePointerInfo ( ) ) ;

SDValue Slot = DAG . getNode ( <STR_LIT> , DL , PtrVT , TLSIndex , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) ;


<s> TLSIndex = DAG . getNode ( <STR_LIT> , DL , PtrVT , TLSIndex ) ; TLSIndex = DAG . getLoad ( PtrVT , DL , Chain , TLSIndex , MachinePointerInfo ( ) ) ; SDValue Slot = DAG . getNode ( <STR_LIT> , DL , PtrVT , TLSIndex , DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) ; SDValue TLS = DAG . getLoad ( PtrVT , DL , Chain , DAG . getNode ( <STR_LIT> , DL , PtrVT , TLSArray , Slot ) , MachinePointerInfo ( ) ) ; const auto * GA = cast < GlobalAddressSDNode > ( Op ) ; auto * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GA -> getGlobal ( ) , <STR_LIT> ) ;

SDValue Offset = DAG . getLoad ( PtrVT , DL , Chain , DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getTargetConstantPool ( CPV , PtrVT , Align ( <NUM_LIT> ) ) ) , MachinePointerInfo :: getConstantPool ( DAG . getMachineFunction ( ) ) ) ;


<s> EVT EltVT = Elt . getValueType ( ) ; if ( Subtarget -> hasMVEIntegerOps ( ) && Op . getValueType ( ) . getScalarSizeInBits ( ) == <NUM_LIT> ) return LowerINSERT_VECTOR_ELT_i1 ( Op , DAG , Subtarget ) ; if ( getTypeAction ( * DAG . getContext ( ) , EltVT ) == TargetLowering :: TypePromoteFloat ) { SDLoc dl ( Op ) ; EVT IEltVT = <STR_LIT> ( EltVT . getScalarSizeInBits ( ) ) ; assert ( getTypeAction ( * DAG . getContext ( ) , IEltVT ) != TargetLowering :: TypePromoteFloat ) ; SDValue VecIn = Op . getOperand ( <NUM_LIT> ) ; EVT VecVT = VecIn . getValueType ( ) ; EVT IVecVT = EVT :: getVectorVT ( * DAG . getContext ( ) , IEltVT , VecVT . getVectorNumElements ( ) ) ; SDValue IElt = DAG . getNode ( <STR_LIT> , dl , IEltVT , Elt ) ; SDValue IVecIn = DAG . getNode ( <STR_LIT> , dl , IVecVT , VecIn ) ; SDValue IVecOut = DAG . getNode ( <STR_LIT> , dl , IVecVT , IVecIn , IElt , Lane ) ;

return DAG . getNode ( <STR_LIT> , dl , VecVT , IVecOut ) ;


<s> if ( NumLoads > <NUM_LIT> ) { VecTy = FixedVectorType :: get ( VecTy -> getElementType ( ) , VecTy -> getNumElements ( ) / NumLoads ) ; BaseAddr = Builder . CreateBitCast ( BaseAddr , VecTy -> getElementType ( ) -> getPointerTo ( LI -> getPointerAddressSpace ( ) ) ) ; } assert ( isTypeLegal ( EVT :: getEVT ( VecTy ) ) && <STR_LIT> ) ; auto createLoadIntrinsic = [ & ] ( Value * BaseAddr ) { if ( Subtarget -> hasNEON ( ) ) { Type * Int8Ptr = Builder . getInt8PtrTy ( LI -> getPointerAddressSpace ( ) ) ; Type * Tys [ ] = { VecTy , Int8Ptr } ; static const <STR_LIT> LoadInts [ <NUM_LIT> ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> } ; Function * VldnFunc = <STR_LIT> ( LI -> getModule ( ) , LoadInts [ Factor - <NUM_LIT> ] , Tys ) ; SmallVector < Value * , <NUM_LIT> > Ops ; Ops . push_back ( Builder . CreateBitCast ( BaseAddr , Int8Ptr ) ) ; Ops . push_back ( Builder . getInt32 ( LI -> getAlignment ( ) ) ) ; return Builder . CreateCall ( VldnFunc , Ops , <STR_LIT> ) ; } else { assert ( ( Factor == <NUM_LIT> || Factor == <NUM_LIT> ) && <STR_LIT> ) ; <STR_LIT> LoadInts = Factor == <NUM_LIT> ? <STR_LIT> : <STR_LIT> ; Type * VecEltTy = VecTy -> getElementType ( ) -> getPointerTo ( LI -> getPointerAddressSpace ( ) ) ; Type * Tys [ ] = { VecTy , VecEltTy } ; Function * VldnFunc = <STR_LIT> ( LI -> getModule ( ) , LoadInts , Tys ) ; SmallVector < Value * , <NUM_LIT> > Ops ;

Ops . push_back ( Builder . CreateBitCast ( BaseAddr , VecEltTy ) ) ;


<s> Value * BaseAddr = LI -> getPointerOperand ( ) ; if ( NumLoads > <NUM_LIT> ) { VecTy = FixedVectorType :: get ( VecTy -> getElementType ( ) , VecTy -> getNumElements ( ) / NumLoads ) ; BaseAddr = Builder . CreateBitCast ( BaseAddr , VecTy -> getElementType ( ) -> getPointerTo ( LI -> getPointerAddressSpace ( ) ) ) ; } assert ( isTypeLegal ( EVT :: getEVT ( VecTy ) ) && <STR_LIT> ) ; auto createLoadIntrinsic = [ & ] ( Value * BaseAddr ) { if ( Subtarget -> hasNEON ( ) ) { Type * Int8Ptr = Builder . getInt8PtrTy ( LI -> getPointerAddressSpace ( ) ) ; Type * Tys [ ] = { VecTy , Int8Ptr } ; static const <STR_LIT> LoadInts [ <NUM_LIT> ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> } ; Function * VldnFunc = <STR_LIT> ( LI -> getModule ( ) , LoadInts [ Factor - <NUM_LIT> ] , Tys ) ; SmallVector < Value * , <NUM_LIT> > Ops ; Ops . push_back ( Builder . CreateBitCast ( BaseAddr , Int8Ptr ) ) ; Ops . push_back ( Builder . getInt32 ( LI -> getAlignment ( ) ) ) ; return Builder . CreateCall ( VldnFunc , Ops , <STR_LIT> ) ; } else { assert ( ( Factor == <NUM_LIT> || Factor == <NUM_LIT> ) && <STR_LIT> ) ; <STR_LIT> LoadInts = Factor == <NUM_LIT> ? <STR_LIT> : <STR_LIT> ; Type * VecEltTy = VecTy -> getElementType ( ) -> getPointerTo ( LI -> getPointerAddressSpace ( ) ) ; Type * Tys [ ] = { VecTy , VecEltTy } ; Function * VldnFunc = <STR_LIT> ( LI -> getModule ( ) , LoadInts , Tys ) ; SmallVector < Value * , <NUM_LIT> > Ops ; Ops . push_back ( Builder . CreateBitCast ( BaseAddr , VecEltTy ) ) ; return Builder . CreateCall ( VldnFunc , Ops , <STR_LIT> ) ; } } ; DenseMap < ShuffleVectorInst * , SmallVector < Value * , <NUM_LIT> >> SubVecs ; for ( unsigned LoadCount = <NUM_LIT> ; LoadCount < NumLoads ; ++ LoadCount ) { if ( LoadCount > <NUM_LIT> ) BaseAddr = Builder . CreateConstGEP1_32 ( VecTy -> getElementType ( ) , BaseAddr , VecTy -> getNumElements ( ) * Factor ) ; CallInst * VldN = createLoadIntrinsic ( BaseAddr ) ; for ( unsigned i = <NUM_LIT> ; i < Shuffles . size ( ) ; i ++ ) { ShuffleVectorInst * SV = Shuffles [ i ] ; unsigned Index = Indices [ i ] ;

Value * SubVec = Builder . CreateExtractValue ( VldN , Index ) ;


<s> else if ( IntKind == <STR_LIT> || IntKind == <STR_LIT> ) LROffset = <NUM_LIT> ; else report_fatal_error ( <STR_LIT> <STR_LIT> ) ;

RetOps . insert ( RetOps . begin ( ) + <NUM_LIT> , DAG . getConstant ( LROffset , DL , <STR_LIT> , false ) ) ;


<s> EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; SDLoc dl ( Op ) ; SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; const <ISA_LIT>BaseRegisterInfo * ARI = Subtarget -> getRegisterInfo ( ) ; const uint32_t * Mask = ARI -> getCallPreservedMask ( DAG . getMachineFunction ( ) , CallingConv :: C ) ; assert ( Mask && <STR_LIT> ) ; unsigned Reg = MF . addLiveIn ( <STR_LIT> , getRegClassFor ( <STR_LIT> ) ) ; SDValue ReturnAddress = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , dl , Reg , PtrVT ) ; constexpr EVT ResultTys [ ] = { <STR_LIT> , <STR_LIT> } ;

SDValue Callee = DAG . getTargetExternalSymbol ( <STR_LIT> , PtrVT , <NUM_LIT> ) ;


<s> EVT VT = Op . getValueType ( ) ; if ( VT . isVector ( ) ) return LowerVectorINT_TO_FP ( Op , DAG ) ; if ( isUnsupportedFloatingType ( VT ) ) { RTLIB :: Libcall LC ; if ( Op . getOpcode ( ) == <STR_LIT> ) LC = RTLIB :: getSINTTOFP ( Op . getOperand ( <NUM_LIT> ) . getValueType ( ) , Op . getValueType ( ) ) ; else LC = RTLIB :: getUINTTOFP ( Op . getOperand ( <NUM_LIT> ) . getValueType ( ) , Op . getValueType ( ) ) ; MakeLibCallOptions CallOptions ; return makeLibCall ( DAG , LC , Op . getValueType ( ) , Op . getOperand ( <NUM_LIT> ) , CallOptions , SDLoc ( Op ) ) . first ; }


<s> if ( VT . isVector ( ) ) return LowerVectorINT_TO_FP ( Op , DAG ) ; if ( isUnsupportedFloatingType ( VT ) ) { RTLIB :: Libcall LC ; if ( Op . getOpcode ( ) == <STR_LIT> ) LC = RTLIB :: getSINTTOFP ( Op . getOperand ( <NUM_LIT> ) . getValueType ( ) , Op . getValueType ( ) ) ; else LC = RTLIB :: getUINTTOFP ( Op . getOperand ( <NUM_LIT> ) . getValueType ( ) , Op . getValueType ( ) ) ; MakeLibCallOptions CallOptions ;

return makeLibCall ( DAG , LC , Op . getValueType ( ) , Op . getOperand ( <NUM_LIT> ) , CallOptions , SDLoc ( Op ) ) . first ;


<s> assert ( LD -> isUnindexed ( ) && <STR_LIT> ) ; if ( MemVT == <STR_LIT> && Subtarget -> hasV5TEOps ( ) && ! Subtarget -> isThumb1Only ( ) && LD -> isVolatile ( ) ) { SDLoc dl ( N ) ; SDValue Result = DAG . getMemIntrinsicNode ( <STR_LIT> , dl , DAG . getVTList ( { <STR_LIT> , <STR_LIT> , <STR_LIT> } ) , { LD -> getChain ( ) , LD -> getBasePtr ( ) } , MemVT , LD -> getMemOperand ( ) ) ; SDValue Lo = Result . getValue ( DAG . getDataLayout ( ) . isLittleEndian ( ) ? <NUM_LIT> : <NUM_LIT> ) ; SDValue Hi = Result . getValue ( DAG . getDataLayout ( ) . isLittleEndian ( ) ? <NUM_LIT> : <NUM_LIT> ) ; SDValue Pair = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Lo , Hi ) ; Results . append ( { Pair , Result . getValue ( <NUM_LIT> ) } ) ; }


<s> SDValue Lo = Result . getValue ( DAG . getDataLayout ( ) . isLittleEndian ( ) ? <NUM_LIT> : <NUM_LIT> ) ; SDValue Hi = Result . getValue ( DAG . getDataLayout ( ) . isLittleEndian ( ) ? <NUM_LIT> : <NUM_LIT> ) ; SDValue Pair = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Lo , Hi ) ; Results . append ( { Pair , Result . getValue ( <NUM_LIT> ) } ) ;


<s> static SDValue LowerMLOAD ( SDValue Op , SelectionDAG & DAG ) { MaskedLoadSDNode * N = cast < MaskedLoadSDNode > ( Op . getNode ( ) ) ; MVT VT = Op . getSimpleValueType ( ) ; SDValue Mask = N -> getMask ( ) ; SDValue PassThru = N -> getPassThru ( ) ; SDLoc dl ( Op ) ; if ( isZeroVector ( PassThru ) ) return Op ; SDValue ZeroVec = DAG . getNode ( <STR_LIT> , dl , VT , DAG . getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; SDValue NewLoad = DAG . getMaskedLoad ( VT , dl , N -> getChain ( ) , N -> getBasePtr ( ) , N -> getOffset ( ) , Mask , ZeroVec , N -> getMemoryVT ( ) , N -> getMemOperand ( ) , N -> getAddressingMode ( ) , N -> getExtensionType ( ) , N -> isExpandingLoad ( ) ) ; SDValue Combo = NewLoad ; bool PassThruIsCastZero = ( PassThru . getOpcode ( ) == <STR_LIT> || PassThru . getOpcode ( ) == <STR_LIT> ) && isZeroVector ( PassThru -> getOperand ( <NUM_LIT> ) ) ; if ( ! PassThru . isUndef ( ) && ! PassThruIsCastZero ) Combo = DAG . getNode ( <STR_LIT> , dl , VT , Mask , NewLoad , PassThru ) ; return DAG . getMergeValues ( { Combo , NewLoad . getValue ( <NUM_LIT> ) } , dl ) ;


<s> assert ( LD -> isUnindexed ( ) && <STR_LIT> ) ; SDLoc dl ( Op ) ; SDValue Load = DAG . getExtLoad ( <STR_LIT> , dl , <STR_LIT> , LD -> getChain ( ) , LD -> getBasePtr ( ) , EVT :: getIntegerVT ( * DAG . getContext ( ) , MemVT . getSizeInBits ( ) ) , LD -> getMemOperand ( ) ) ; SDValue Val = Load ; if ( DAG . getDataLayout ( ) . isBigEndian ( ) ) Val = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Load ) , DAG . getConstant ( <NUM_LIT> - MemVT . getSizeInBits ( ) , dl , <STR_LIT> ) ) ; SDValue Pred = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Val ) ; if ( MemVT != <STR_LIT> ) Pred = DAG . getNode ( <STR_LIT> , dl , MemVT , Pred , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ;

return DAG . getMergeValues ( { Pred , Load . getValue ( <NUM_LIT> ) } , dl ) ;


<s> LoadSDNode * LD = cast < LoadSDNode > ( Op . getNode ( ) ) ; EVT MemVT = LD -> getMemoryVT ( ) ; assert ( ( MemVT == <STR_LIT> || MemVT == <STR_LIT> || MemVT == <STR_LIT> ) && <STR_LIT> ) ; assert ( MemVT == Op . getValueType ( ) ) ; assert ( LD -> getExtensionType ( ) == <STR_LIT> && <STR_LIT> ) ; assert ( LD -> isUnindexed ( ) && <STR_LIT> ) ; SDLoc dl ( Op ) ; SDValue Load = DAG . getExtLoad ( <STR_LIT> , dl , <STR_LIT> , LD -> getChain ( ) , LD -> getBasePtr ( ) , EVT :: getIntegerVT ( * DAG . getContext ( ) , MemVT . getSizeInBits ( ) ) , LD -> getMemOperand ( ) ) ; SDValue Val = Load ; if ( DAG . getDataLayout ( ) . isBigEndian ( ) ) Val = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Load ) , DAG . getConstant ( <NUM_LIT> - MemVT . getSizeInBits ( ) , dl , <STR_LIT> ) ) ; SDValue Pred = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Val ) ;

if ( MemVT != <STR_LIT> ) Pred = DAG . getNode ( <STR_LIT> , dl , MemVT , Pred , DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ;


<s> case <STR_LIT> : RetTyElement = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; break ; case <STR_LIT> : RetTyElement = Type :: getInt64Ty ( * DAG . getContext ( ) ) ; break ; } RetTyParams . push_back ( RetTyElement ) ; RetTyParams . push_back ( RetTyElement ) ; ArrayRef < Type * > ret = ArrayRef < Type * > ( RetTyParams ) ; Type * RetTy = StructType :: get ( * DAG . getContext ( ) , ret ) ; RTLIB :: Libcall LC = getDivRemLibcall ( N , N -> getValueType ( <NUM_LIT> ) . getSimpleVT ( ) . SimpleTy ) ; SDValue InChain = DAG . getEntryNode ( ) ; TargetLowering :: ArgListTy Args = getDivRemArgList ( N , DAG . getContext ( ) , Subtarget ) ; bool isSigned = N -> getOpcode ( ) == <STR_LIT> ; SDValue Callee = DAG . getExternalSymbol ( getLibcallName ( LC ) , getPointerTy ( DAG . getDataLayout ( ) ) ) ; if ( Subtarget -> isTargetWindows ( ) ) InChain = WinDBZCheckDenominator ( DAG , N , InChain ) ; CallLoweringInfo CLI ( DAG ) ; CLI . setChain ( InChain ) . setCallee ( CallingConv :: <ISA_LIT>_AAPCS , RetTy , Callee , std :: move ( Args ) ) . setSExtResult ( isSigned ) . setZExtResult ( ! isSigned ) . setDebugLoc ( SDLoc ( N ) ) ; std :: pair < SDValue , SDValue > CallResult = LowerCallTo ( CLI ) ; SDNode * ResNode = CallResult . first . getNode ( ) ; assert ( ResNode -> getNumOperands ( ) == <NUM_LIT> && <STR_LIT> ) ; return ResNode -> getOperand ( <NUM_LIT> ) ;


<s> unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( Depth ) { SDValue FrameAddr = LowerFRAMEADDR ( Op , DAG ) ; SDValue Offset = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ;

return DAG . getLoad ( VT , dl , DAG . getEntryNode ( ) , DAG . getNode ( <STR_LIT> , dl , VT , FrameAddr , Offset ) , MachinePointerInfo ( ) ) ;


<s> MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MFI . setReturnAddressIsTaken ( true ) ; if ( verifyReturnAddressArgumentIsConstant ( Op , DAG ) ) return SDValue ( ) ; EVT VT = Op . getValueType ( ) ; SDLoc dl ( Op ) ; unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( Depth ) { SDValue FrameAddr = LowerFRAMEADDR ( Op , DAG ) ; SDValue Offset = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; return DAG . getLoad ( VT , dl , DAG . getEntryNode ( ) , DAG . getNode ( <STR_LIT> , dl , VT , FrameAddr , Offset ) , MachinePointerInfo ( ) ) ; }

unsigned Reg = MF . addLiveIn ( <STR_LIT> , getRegClassFor ( <STR_LIT> ) ) ;


<s> std :: vector < int > NewMask ; for ( unsigned i = <NUM_LIT> ; i < VT . getVectorNumElements ( ) / <NUM_LIT> ; i ++ ) NewMask . push_back ( VT . getVectorNumElements ( ) / <NUM_LIT> + i ) ;

for ( unsigned i = <NUM_LIT> ; i < VT . getVectorNumElements ( ) / <NUM_LIT> ; i ++ ) NewMask . push_back ( i ) ;


<s> <STR_LIT> CC1 = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; const SDValue Op2 = isa < ConstantSDNode > ( TrueVal1 ) ? FalseVal1 : TrueVal1 ; if ( Op2 . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ; SDValue V2 = Op2 . getOperand ( <NUM_LIT> ) ; SDValue K2 = Op2 . getOperand ( <NUM_LIT> ) ; SDValue TrueVal2 = Op2 . getOperand ( <NUM_LIT> ) ; SDValue FalseVal2 = Op2 . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC2 = cast < CondCodeSDNode > ( Op2 . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue V1Tmp = V1 ; SDValue V2Tmp = V2 ;

if ( V1Tmp != TrueVal1 || V2Tmp != TrueVal2 || K1 != FalseVal1 || K2 != FalseVal2 || ! ( ( isGTorGE ( CC1 ) && isLTorLE ( CC2 ) ) || ( isLTorLE ( CC1 ) && isGTorGE ( CC2 ) ) ) ) return SDValue ( ) ;


<s> if ( ! isa < ConstantSDNode > ( K1 ) || ! isa < ConstantSDNode > ( K2 ) ) return SDValue ( ) ; int64_t Val1 = cast < ConstantSDNode > ( K1 ) -> getSExtValue ( ) ; int64_t Val2 = cast < ConstantSDNode > ( K2 ) -> getSExtValue ( ) ; int64_t PosVal = std :: max ( Val1 , Val2 ) ; int64_t NegVal = std :: min ( Val1 , Val2 ) ; if ( ! ( ( Val1 > Val2 && isLTorLE ( CC1 ) ) || ( Val1 < Val2 && isLTorLE ( CC2 ) ) ) || ! isPowerOf2_64 ( PosVal + <NUM_LIT> ) ) return SDValue ( ) ; uint64_t K = PosVal ; SDLoc dl ( Op ) ; if ( Val1 == ~ Val2 ) return DAG . getNode ( <STR_LIT> , dl , VT , V2Tmp , DAG . getConstant ( countTrailingOnes ( K ) , dl , VT ) ) ;

if ( NegVal == <NUM_LIT> ) return DAG . getNode ( <STR_LIT> , dl , VT , V2Tmp , DAG . getConstant ( countTrailingOnes ( K ) , dl , VT ) ) ;


<s> assert ( ( VT == <STR_LIT> || VT == <STR_LIT> ) && <STR_LIT> ) ; SDLoc dl ( Op ) ; SDValue N0 = Op . getOperand ( <NUM_LIT> ) ; SDValue N1 = Op . getOperand ( <NUM_LIT> ) ; SDValue N2 , N3 ; if ( VT == <STR_LIT> ) { N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ; N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 ) ; N2 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N3 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N0 = LowerSDIV_v4i8 ( N0 , N1 , dl , DAG ) ; N2 = LowerSDIV_v4i8 ( N2 , N3 , dl , DAG ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , N2 ) ; N0 = LowerCONCAT_VECTORS ( N0 , DAG , ST ) ;


<s> N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 ) ; N2 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N3 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 , DAG . getIntPtrConstant ( <NUM_LIT> , dl ) ) ; N0 = LowerSDIV_v4i8 ( N0 , N1 , dl , DAG ) ; N2 = LowerSDIV_v4i8 ( N2 , N3 , dl , DAG ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , N2 ) ; N0 = LowerCONCAT_VECTORS ( N0 , DAG , ST ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ; return N0 ; }

return LowerSDIV_v4i16 ( N0 , N1 , dl , DAG ) ;


<s> N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ; N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 ) ; N2 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) , N1 ) ; N1 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) , N1 , N2 ) ; N2 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N1 , N2 ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , N2 ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ; N1 = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 , N1 ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ; N0 = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , N0 ) ;


<s> Y = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , DAG . getConstant ( <STR_LIT> , dl , <STR_LIT> ) , Y ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X , Y ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X ) ; Y = DAG . getConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X , Y ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X ) ; X = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , X ) ;