<s> ++ OpIdx ; } assert ( ( OpIdx + <NUM_LIT> ) < NumOps && OpInfo [ OpIdx ] . RegClass == <STR_LIT> && OpInfo [ OpIdx + <NUM_LIT> ] . RegClass < <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Rn ) ) ) ; MI . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; OpIdx += <NUM_LIT> ; if ( WB ) { MI . addOperand ( MCOperand :: CreateReg ( RmEnum ) ) ; ++ OpIdx ; } assert ( OpIdx < NumOps && ( OpInfo [ OpIdx ] . RegClass == <STR_LIT> || OpInfo [ OpIdx ] . RegClass == <STR_LIT> ) && <STR_LIT> ) ; RegClass = OpInfo [ OpIdx ] . RegClass ; while ( OpIdx < NumOps && ( unsigned ) OpInfo [ OpIdx ] . RegClass == RegClass ) { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , Rd ) ) ) ; Rd += Inc ; ++ OpIdx ; } if ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass < <NUM_LIT> && ! OpInfo [ OpIdx ] . isPredicate ( ) && ! OpInfo [ OpIdx ] . isOptionalDef ( ) ) { MI . addOperand ( MCOperand :: CreateImm ( decodeLaneIndex ( insn ) ) ) ; ++ OpIdx ; } } else { RegClass = OpInfo [ <NUM_LIT> ] . RegClass ; while ( OpIdx < NumOps && ( unsigned ) OpInfo [ OpIdx ] . RegClass == RegClass ) { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , Rd ) ) ) ; Rd += Inc ; ++ OpIdx ; } if ( WB ) { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Rn ) ) ) ; ++ OpIdx ; } assert ( ( OpIdx + <NUM_LIT> ) < NumOps && OpInfo [ OpIdx ] . RegClass == <STR_LIT> && OpInfo [ OpIdx + <NUM_LIT> ] . RegClass < <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Rn ) ) ) ; MI . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; OpIdx += <NUM_LIT> ; if ( WB ) { MI . addOperand ( MCOperand :: CreateReg ( RmEnum ) ) ; ++ OpIdx ;


<s> assert ( TID . getNumDefs ( ) == <NUM_LIT> && NumOps >= <NUM_LIT> && OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> && OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> && TID . getOperandConstraint ( <NUM_LIT> , TOI :: TIED_TO ) != - <NUM_LIT> && OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> && OpInfo [ <NUM_LIT> ] . RegClass < <NUM_LIT> && <STR_LIT> ) ; ElemSize esize = Opcode == <STR_LIT> ? ESize8 : ( Opcode == <STR_LIT> ? ESize16 : ESize32 ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeNEONRn ( insn ) ) ) ) ; MI . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRd ( insn ) ) ) ) ; MI . addOperand ( MCOperand :: CreateImm ( decodeNVLaneOpIndex ( insn , esize ) ) ) ; NumOpsAdded = <NUM_LIT> ; return true ;


<s> static bool DisassembleNVCVTFrm ( MCInst & MI , unsigned Opc , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) {

return DisassembleNVdVmOptImm ( MI , Opc , insn , NumOps , NumOpsAdded , N2V_VectorConvert_Between_Float_Fixed , B ) ;


<s> static bool DisassembleNVCVTFrm ( MCInst & MI , unsigned Opc , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) { return DisassembleNVdVmOptImm ( MI , Opc , insn , NumOps , NumOpsAdded , N2V_VectorConvert_Between_Float_Fixed , B ) ;


<s> ++ OpIdx ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) { MI . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; ++ OpIdx ; } MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , OpInfo [ OpIdx ] . RegClass , decodeNEONRm ( insn ) ) ) ) ; ++ OpIdx ; int Idx ; while ( OpIdx < NumOps && ( Idx = TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) ) != - <NUM_LIT> ) { MI . addOperand ( MI . getOperand ( Idx ) ) ; ++ OpIdx ; } if ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass < <NUM_LIT> && ! OpInfo [ OpIdx ] . isPredicate ( ) && ! OpInfo [ OpIdx ] . isOptionalDef ( ) ) { unsigned imm = <NUM_LIT> ; if ( Flag == N2V_VectorDupLane ) imm = decodeNVLaneDupIndex ( insn , esize ) ; if ( Flag == N2V_VectorConvert_Between_Float_Fixed ) imm = decodeVCVTFractionBits ( insn ) ; assert ( imm != <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateImm ( imm ) ) ; ++ OpIdx ; } return true ;


<s> const TargetInstrDesc & TID = <ISA_LIT>Insts [ Opc ] ; const TargetOperandInfo * OpInfo = TID . OpInfo ; assert ( NumOps >= <NUM_LIT> && ( OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> || OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> ) && ( OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> || OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> ) && <STR_LIT> ) ; unsigned & OpIdx = NumOpsAdded ; OpIdx = <NUM_LIT> ; ElemSize esize = ESizeNA ; if ( Flag == N2V_VectorDupLane ) { assert ( Opc >= <STR_LIT> && Opc <= <STR_LIT> && <STR_LIT> ) ; esize = ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ? ESize8 : ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ? ESize16 : ESize32 ) ; } MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , OpInfo [ OpIdx ] . RegClass , decodeNEONRd ( insn ) ) ) ) ; ++ OpIdx ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) { MI . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; ++ OpIdx ; } MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , OpInfo [ OpIdx ] . RegClass , decodeNEONRm ( insn ) ) ) ) ; ++ OpIdx ; int Idx ; while ( OpIdx < NumOps && ( Idx = TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) ) != - <NUM_LIT> ) { MI . addOperand ( MI . getOperand ( Idx ) ) ; ++ OpIdx ; } if ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass < <NUM_LIT> && ! OpInfo [ OpIdx ] . isPredicate ( ) && ! OpInfo [ OpIdx ] . isOptionalDef ( ) ) { unsigned imm = <NUM_LIT> ;

if ( Flag == N2V_VectorDupLane ) imm = decodeNVLaneDupIndex ( insn , esize ) ;


<s> static bool DisassembleNVecDupLnFrm ( MCInst & MI , unsigned Opc , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) { return DisassembleNVdVmOptImm ( MI , Opc , insn , NumOps , NumOpsAdded , N2V_VectorDupLane , B ) ;


<s> return DisassembleNVdVnVmOptImm ( MI , Opcode , insn , NumOps , NumOpsAdded , N3V_VectorExtract , B ) ;


<s> return DisassembleNVdVnVmOptImm ( MI , Opcode , insn , NumOps , NumOpsAdded , N3V_Multiply_By_Scalar , B ) ;


<s> assert ( NumOps >= <NUM_LIT> && ( OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> || OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> ) && ( OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> || OpInfo [ <NUM_LIT> ] . RegClass == <STR_LIT> ) && <STR_LIT> ) ; unsigned & OpIdx = NumOpsAdded ; OpIdx = <NUM_LIT> ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , OpInfo [ OpIdx ] . RegClass , decodeNEONRd ( insn ) ) ) ) ; ++ OpIdx ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) { MI . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; ++ OpIdx ; } assert ( ( OpInfo [ OpIdx ] . RegClass == <STR_LIT> || OpInfo [ OpIdx ] . RegClass == <STR_LIT> ) && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , OpInfo [ OpIdx ] . RegClass , decodeNEONRm ( insn ) ) ) ) ;


<s> OpIdx = <NUM_LIT> ; unsigned Rn = decodeNEONRn ( insn ) ; unsigned Len = slice ( insn , <NUM_LIT> , <NUM_LIT> ) + <NUM_LIT> ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeNEONRd ( insn ) ) ) ) ; ++ OpIdx ; int Idx ; if ( ( Idx = TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) ) != - <NUM_LIT> ) { MI . addOperand ( MI . getOperand ( Idx ) ) ; ++ OpIdx ; } for ( unsigned i = <NUM_LIT> ; i < Len ; ++ i ) { assert ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass == <STR_LIT> && <STR_LIT> ) ;

MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Rn + i ) ) ) ;


<s> NumOpsAdded = <NUM_LIT> ; } else { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRm ( insn ) ) ) ) ; <STR_LIT> AddrOpcode = getUBit ( insn ) ? <STR_LIT> : <STR_LIT> ; <STR_LIT> ShOp = getShiftOpcForBits ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) ) ; unsigned ShImm = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; getImmShiftSE ( ShOp , ShImm ) ; MI . addOperand ( MCOperand :: CreateImm ( <STR_LIT> ( AddrOpcode , ShImm , ShOp ) ) ) ; NumOpsAdded = <NUM_LIT> ; } return true ;


<s> NumOpsAdded = <NUM_LIT> ; } else { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRm ( insn ) ) ) ) ; <STR_LIT> AddrOpcode = getUBit ( insn ) ? <STR_LIT> : <STR_LIT> ; <STR_LIT> ShOp = getShiftOpcForBits ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) ) ; unsigned ShImm = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; getImmShiftSE ( ShOp , ShImm ) ;

MI . addOperand ( MCOperand :: CreateImm ( <STR_LIT> ( AddrOpcode , ShImm , ShOp ) ) ) ;


<s> static bool DisassemblePseudo ( MCInst & MI , unsigned Opcode , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO ) {


<s> unsigned Pos = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) Pos += <NUM_LIT> ; MI . addOperand ( MCOperand :: CreateImm ( Pos ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRm ( insn ) ) ) ) ; if ( NumOpsAdded == <NUM_LIT> ) { <STR_LIT> Opc = ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) != <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) ; unsigned ShAmt = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; if ( ShAmt == <NUM_LIT> ) { if ( Opc == <STR_LIT> ) ShAmt = <NUM_LIT> ; else Opc = <STR_LIT> ; } MI . addOperand ( MCOperand :: CreateImm ( <STR_LIT> ( Opc , ShAmt ) ) ) ; }


<s> static bool DisassembleStFrm ( MCInst & MI , unsigned Opcode , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) {

return DisassembleLdStFrm ( MI , Opcode , insn , NumOps , NumOpsAdded , true , B ) ;


<s> return DisassembleLdStMiscFrm ( MI , Opcode , insn , NumOps , NumOpsAdded , true , B ) ;


<s> assert ( ( RegClass == <STR_LIT> || RegClass == <STR_LIT> ) && <STR_LIT> ) ; bool isSP = ( RegClass == <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , decodeVFPRd ( insn , isSP ) ) ) ) ; ++ OpIdx ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) { assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( <NUM_LIT> ) ) ; ++ OpIdx ; } MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , decodeVFPRn ( insn , isSP ) ) ) ) ;


<s> if ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ) { d = decodeVFPRd ( insn , true ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , d ) ) ) ; m = decodeVFPRm ( insn , SP ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , m ) ) ) ; } else { d = decodeVFPRd ( insn , SP ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , d ) ) ) ; m = decodeVFPRm ( insn , true ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , m ) ) ) ; }


<s> assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ; const TargetInstrDesc & TID = <ISA_LIT>Insts [ Opcode ] ; const TargetOperandInfo * OpInfo = TID . OpInfo ; if ( ! OpInfo ) return false ; bool SP = slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ; bool fixed_point = slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ; unsigned RegClassID = SP ? <STR_LIT> : <STR_LIT> ; if ( fixed_point ) { assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ; int size = slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ? <NUM_LIT> : <NUM_LIT> ; int fbits = size - ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> | slice ( insn , <NUM_LIT> , <NUM_LIT> ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , decodeVFPRd ( insn , SP ) ) ) ) ; assert ( TID . getOperandConstraint ( <NUM_LIT> , TOI :: TIED_TO ) != - <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MI . getOperand ( <NUM_LIT> ) ) ; assert ( OpInfo [ <NUM_LIT> ] . RegClass < <NUM_LIT> && ! OpInfo [ <NUM_LIT> ] . isPredicate ( ) && ! OpInfo [ <NUM_LIT> ] . isOptionalDef ( ) && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateImm ( fbits ) ) ; NumOpsAdded = <NUM_LIT> ; } else { unsigned d , m ; if ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ) { d = decodeVFPRd ( insn , true ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , d ) ) ) ; m = decodeVFPRm ( insn , SP ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , m ) ) ) ; } else { d = decodeVFPRd ( insn , SP ) ;

MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , d ) ) ) ;


<s> MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRn ( insn , true ) ) ) ) ; NumOpsAdded = <NUM_LIT> ;


<s> static bool DisassembleVFPConv2Frm ( MCInst & MI , unsigned Opcode , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) { assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRd ( insn ) ) ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRn ( insn , true ) ) ) ) ;


<s> unsigned Sm = decodeVFPRm ( insn , true ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Sm ) ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Sm + <NUM_LIT> ) ) ) ; OpIdx += <NUM_LIT> ; } else { MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRm ( insn , false ) ) ) ) ; ++ OpIdx ; }


<s> static bool DisassembleVFPConv4Frm ( MCInst & MI , unsigned Opcode , uint32_t insn , unsigned short NumOps , unsigned & NumOpsAdded , BO B ) { assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRn ( insn , true ) ) ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeRd ( insn ) ) ) ) ; NumOpsAdded = <NUM_LIT> ;


<s> assert ( NumOps >= <NUM_LIT> && <STR_LIT> ) ;

MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRn ( insn , true ) ) ) ) ;


<s> OpIdx = <NUM_LIT> ; if ( OpInfo [ OpIdx ] . RegClass == <STR_LIT> ) { unsigned Sm = decodeVFPRm ( insn , true ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Sm ) ) ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , Sm + <NUM_LIT> ) ) ) ; OpIdx += <NUM_LIT> ; } else {

MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , <STR_LIT> , decodeVFPRm ( insn , false ) ) ) ) ;


<s> unsigned RegD = decodeVFPRd ( insn , isSPVFP ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClassID , RegD ) ) ) ; unsigned Base = getRegisterEnum ( B , <STR_LIT> , decodeRn ( insn ) ) ; MI . addOperand ( MCOperand :: CreateReg ( Base ) ) ;

<STR_LIT> AddrOpcode = getUBit ( insn ) ? <STR_LIT> : <STR_LIT> ;


<s> MI . addOperand ( MCOperand :: CreateImm ( <STR_LIT> ( SubMode ) ) ) ; int64_t CondVal = insn >> <STR_LIT> ; MI . addOperand ( MCOperand :: CreateImm ( CondVal == <NUM_LIT> ? <NUM_LIT> : CondVal ) ) ; MI . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ; OpIdx += <NUM_LIT> ; bool isSPVFP = ( Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ; unsigned RegClassID = isSPVFP ? <STR_LIT> : <STR_LIT> ; unsigned RegD = decodeVFPRd ( insn , isSPVFP ) ; unsigned char Imm8 = insn & <NUM_LIT> ;

unsigned Regs = isSPVFP ? Imm8 : Imm8 / <NUM_LIT> ;


<s> if ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass < <NUM_LIT> && ! OpInfo [ OpIdx ] . isPredicate ( ) && ! OpInfo [ OpIdx ] . isOptionalDef ( ) ) { APInt immRaw = VFPExpandImm ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> | slice ( insn , <NUM_LIT> , <NUM_LIT> ) , Opcode == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) ; APFloat immFP = APFloat ( immRaw , true ) ; double imm = Opcode == <STR_LIT> ? immFP . convertToDouble ( ) :


<s> RegEnum = getRegisterEnum ( B , <STR_LIT> , decodeVFPRd ( insn , false ) ) ; break ; case <STR_LIT> : RegEnum = getRegisterEnum ( B , <STR_LIT> , decodeVFPRd ( insn , true ) ) ; break ; case <STR_LIT> : RegEnum = getRegisterEnum ( B , <STR_LIT> , decodeRd ( insn ) ) ; break ; default : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; } MI . addOperand ( MCOperand :: CreateReg ( RegEnum ) ) ; ++ OpIdx ; if ( OpIdx < NumOps && OpInfo [ OpIdx ] . RegClass < <NUM_LIT> && ! OpInfo [ OpIdx ] . isPredicate ( ) && ! OpInfo [ OpIdx ] . isOptionalDef ( ) ) {

APInt immRaw = VFPExpandImm ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> | slice ( insn , <NUM_LIT> , <NUM_LIT> ) , Opcode == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) ;


<s> unsigned & OpIdx = NumOpsAdded ; OpIdx = <NUM_LIT> ; unsigned RegClass = OpInfo [ OpIdx ] . RegClass ; assert ( ( RegClass == <STR_LIT> || RegClass == <STR_LIT> ) && <STR_LIT> ) ; bool isSP = ( RegClass == <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , decodeVFPRd ( insn , isSP ) ) ) ) ; ++ OpIdx ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ) return true ;


<s> bool isSP = ( RegClass == <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , decodeVFPRd ( insn , isSP ) ) ) ) ; ++ OpIdx ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ) return true ; RegClass = OpInfo [ OpIdx ] . RegClass ; assert ( ( RegClass == <STR_LIT> || RegClass == <STR_LIT> ) && <STR_LIT> ) ; isSP = ( RegClass == <STR_LIT> ) ; MI . addOperand ( MCOperand :: CreateReg ( getRegisterEnum ( B , RegClass , decodeVFPRm ( insn , isSP ) ) ) ) ; ++ OpIdx ;


<s> assert ( NumOpsRemaining > <NUM_LIT> && <STR_LIT> ) ; const TargetOperandInfo * OpInfo = <ISA_LIT>Insts [ Opcode ] . OpInfo ; unsigned Idx = MI . getNumOperands ( ) ; if ( NumOpsRemaining >= <NUM_LIT> && OpInfo [ Idx ] . isPredicate ( ) && OpInfo [ Idx + <NUM_LIT> ] . isPredicate ( ) && OpInfo [ Idx ] . RegClass < <NUM_LIT> && OpInfo [ Idx + <NUM_LIT> ] . RegClass == <STR_LIT> ) { if ( InITBlock ( ) ) MI . addOperand ( MCOperand :: CreateImm ( GetITCond ( ) ) ) ; else MI . addOperand ( MCOperand :: CreateImm ( <STR_LIT> ) ) ; MI . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ; return true ;


<s> static inline unsigned getAddrMode ( unsigned TSFlags ) {


<s> static inline unsigned getAM3IBit ( uint32_t insn ) {

return ( insn >> <STR_LIT> ) & <NUM_LIT> ;


<s> static inline unsigned getAM3IBit ( uint32_t insn ) { return ( insn >> <STR_LIT> ) & <NUM_LIT> ;


<s> default : assert ( <NUM_LIT> && <STR_LIT> ) ; return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> uint32_t Val = <NUM_LIT> ; if ( msb < lsb ) { DEBUG ( errs ( ) << <STR_LIT> ) ; return false ; } for ( uint32_t i = lsb ; i <= msb ; ++ i ) Val |= ( <NUM_LIT> << i ) ; mask = ~ Val ; return true ;


<s> static inline bool getBFCInvMask ( uint32_t insn , uint32_t & mask ) { uint32_t lsb = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; uint32_t msb = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; uint32_t Val = <NUM_LIT> ; if ( msb < lsb ) {


<s> return CDP ? slice ( insn , <NUM_LIT> , <NUM_LIT> ) : slice ( insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> static inline unsigned GetCopOpc1 ( uint32_t insn , bool CDP ) {

return CDP ? slice ( insn , <NUM_LIT> , <NUM_LIT> ) : slice ( insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> static inline unsigned GetCopOpc2 ( uint32_t insn ) {

return slice ( insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> return slice ( insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> return ( insn >> <STR_LIT> ) & <NUM_LIT> ;


<s> if ( ShImm != <NUM_LIT> ) return ; switch ( ShOp ) { case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : ShOp = <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : ShImm = <NUM_LIT> ; break ; case <STR_LIT> : ShOp = <STR_LIT> ; break ; }


<s> static inline unsigned getIndexMode ( unsigned TSFlags ) { return ( TSFlags & <STR_LIT> ) >> <STR_LIT> ;


<s> assert ( SP ) ; return slice ( SP -> ITState , <NUM_LIT> , <NUM_LIT> ) ;


<s> static inline unsigned getMBit ( uint32_t insn ) {


<s> static inline unsigned getNBit ( uint32_t insn ) {


<s> static inline unsigned getPBit ( uint32_t insn ) {


<s> static inline <STR_LIT> getShiftOpcForBits ( unsigned bits ) { switch ( bits ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> default : assert ( <NUM_LIT> && <STR_LIT> ) ; return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; }


<s> static inline unsigned getUBit ( uint32_t insn ) { return ( insn >> <STR_LIT> ) & <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ;


<s> bool InITBlock ( ) { if ( SP ) return SP -> ITCounter > <NUM_LIT> ;


<s> if ( SP ) return SP -> ITCounter > <NUM_LIT> ; return false ;


<s> static inline bool isUnaryDP ( unsigned TSFlags ) { return ( TSFlags & <STR_LIT> ) ;


<s> static bool LdStCopOpcode ( unsigned Opcode ) { if ( ( Opcode >= <STR_LIT> && Opcode <= <STR_LIT> ) || ( Opcode >= <STR_LIT> && Opcode <= <STR_LIT> ) ) return true ;


<s> static bool LdStCopOpcode ( unsigned Opcode ) { if ( ( Opcode >= <STR_LIT> && Opcode <= <STR_LIT> ) || ( Opcode >= <STR_LIT> && Opcode <= <STR_LIT> ) ) return true ; return false ;


<s> if ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> && ( op7_4 >= <NUM_LIT> && op7_4 <= <NUM_LIT> ) ) return true ;


<s> unsigned op7_4 = slice ( insn , <NUM_LIT> , <NUM_LIT> ) ; if ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> && ( op7_4 >= <NUM_LIT> && op7_4 <= <NUM_LIT> ) ) return true ; return false ;


<s> return <ISA_LIT>Insts [ Opcode ] . Name ;


<s> switch ( Opcode ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; default :


<s> bool <ISA_LIT>BasicMCBuilder :: RunBuildAfterHook ( bool Status , MCInst & MI , uint32_t insn ) { if ( ! SP ) return Status ;

if ( Opcode == <STR_LIT> ) Status = SP -> InitIT ( slice ( insn , <NUM_LIT> , <NUM_LIT> ) ) ? Status : false ;


<s> uint32_t Mask = ( ( <NUM_LIT> << ( From - To + <NUM_LIT> ) ) - <NUM_LIT> ) ; Bits &= ~ ( Mask << To ) ;


<s> static inline unsigned slice ( uint32_t Bits , unsigned From , unsigned To ) { assert ( From < <NUM_LIT> && To < <NUM_LIT> && From >= To ) ; return ( Bits >> To ) & ( ( <NUM_LIT> << ( From - To + <NUM_LIT> ) ) - <NUM_LIT> ) ;


<s> return ( Bits >> To ) & ( ( <NUM_LIT> << ( From - To + <NUM_LIT> ) ) - <NUM_LIT> ) ;


<s> } else { Result = ( uint64_t ) slice ( byte , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> | ( uint64_t ) slice ( byte , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; if ( bit6 ) Result |= <NUM_LIT> << <NUM_LIT> ; else Result |= <NUM_LIT> << <NUM_LIT> ; }


<s> Result = ( uint64_t ) slice ( byte , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> | ( uint64_t ) slice ( byte , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; if ( bit6 ) Result |= <NUM_LIT> << <NUM_LIT> ; else Result |= <NUM_LIT> << <NUM_LIT> ; }


<s> virtual ~ <ISA_LIT>BasicMCBuilder ( ) {


<s> MCInst :: iterator I = MI . begin ( ) ; for ( unsigned i = <NUM_LIT> ; i < NumOps ; ++ i , ++ I ) { if ( I == MI . end ( ) ) break ; if ( OpInfo [ i ] . isOptionalDef ( ) && OpInfo [ i ] . RegClass == <STR_LIT> ) { if ( i > <NUM_LIT> && OpInfo [ i - <NUM_LIT> ] . isPredicate ( ) ) continue ; MI . insert ( I , MCOperand :: createReg ( InITBlock ? <NUM_LIT> : <STR_LIT> ) ) ; return ; }


<s> if ( ITBlock . instrInITBlock ( ) ) ITBlock . advanceITState ( ) ; const MCOperandInfo * OpInfo = <ISA_LIT>Insts [ MI . getOpcode ( ) ] . OpInfo ; unsigned short NumOps = <ISA_LIT>Insts [ MI . getOpcode ( ) ] . NumOperands ; MCInst :: iterator I = MI . begin ( ) ; for ( unsigned i = <NUM_LIT> ; i < NumOps ; ++ i , ++ I ) { if ( I == MI . end ( ) ) break ; if ( OpInfo [ i ] . isPredicate ( ) ) { I = MI . insert ( I , MCOperand :: createImm ( CC ) ) ; ++ I ; if ( CC == <STR_LIT> ) MI . insert ( I , MCOperand :: createReg ( <NUM_LIT> ) ) ; else MI . insert ( I , MCOperand :: createReg ( <STR_LIT> ) ) ; return S ; } } I = MI . insert ( I , MCOperand :: createImm ( CC ) ) ; ++ I ; if ( CC == <STR_LIT> ) MI . insert ( I , MCOperand :: createReg ( <NUM_LIT> ) ) ;


<s> <ISA_LIT>Disassembler ( ) : MCDisassembler ( ) {


<s> static MCDisassembler * create<ISA_LIT>Disassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) {

return new <ISA_LIT>Disassembler ( STI , Ctx ) ;


<s> static MCDisassembler * createThumbDisassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) {

return new ThumbDisassembler ( STI , Ctx ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ; default : break ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ; default : break ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; <STR_LIT> Op = <STR_LIT> ; if ( ! fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) Op = <STR_LIT> ; bool writeback = ( P == <NUM_LIT> ) || ( W == <NUM_LIT> ) ; unsigned idx_mode = <NUM_LIT> ; if ( P && writeback ) idx_mode = <STR_LIT> ; else if ( ! P && writeback ) idx_mode = <STR_LIT> ; if ( writeback && ( Rn == <NUM_LIT> || Rn == Rt ) ) S = MCDisassembler :: SoftFail ; if ( reg ) { if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; <STR_LIT> Opc = <STR_LIT> ; switch ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) { case <NUM_LIT> : Opc = <STR_LIT> ; break ; case <NUM_LIT> : Opc = <STR_LIT> ; break ; case <NUM_LIT> : Opc = <STR_LIT> ; break ; case <NUM_LIT> : Opc = <STR_LIT> ; break ; default : return MCDisassembler :: Fail ; } unsigned amt = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( Opc == <STR_LIT> && amt == <NUM_LIT> ) Opc = <STR_LIT> ; unsigned imm = <STR_LIT> ( Op , amt , Opc , idx_mode ) ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; } else { Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; unsigned tmp = <STR_LIT> ( Op , imm , <STR_LIT> , idx_mode ) ; Inst . addOperand ( MCOperand :: createImm ( tmp ) ) ; } if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( U ) Inst . addOperand ( MCOperand :: createImm ( <STR_LIT> ( <STR_LIT> , imm ) ) ) ; else Inst . addOperand ( MCOperand :: createImm ( <STR_LIT> ( <STR_LIT> , imm ) ) ) ; return S ;


<s> if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( U ) Inst . addOperand ( MCOperand :: createImm ( <STR_LIT> ( <STR_LIT> , imm ) ) ) ;


<s> if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! align ) Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> ) ) ;

else Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> << align ) ) ;


<s> if ( ! add ) imm *= - <NUM_LIT> ; if ( imm == <NUM_LIT> && ! add ) imm = INT32_MIN ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; if ( Rn == <NUM_LIT> ) tryAddingPcLoadReferenceComment ( Address , Address + imm + <NUM_LIT> , Decoder ) ;


<s> unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rn = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! add ) imm *= - <NUM_LIT> ;

if ( imm == <NUM_LIT> && ! add ) imm = INT32_MIN ;


<s> imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; if ( Inst . getOpcode ( ) == <STR_LIT> ) if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! tryAddingSymbolicOperand ( Address , imm , false , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> static DecodeStatus DecodeBankedReg ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { unsigned R = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned SysM = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ;

if ( ! <STR_LIT> ( ( R << <NUM_LIT> ) | SysM ) ) return MCDisassembler :: Fail ;


<s> unsigned SysM = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ! <STR_LIT> ( ( R << <NUM_LIT> ) | SysM ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return MCDisassembler :: Success ;


<s> static DecodeStatus DecodeBitfieldMaskOperand ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { unsigned msb = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned lsb = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( lsb > msb ) { Check ( S , MCDisassembler :: SoftFail ) ;


<s> static DecodeStatus DecodeBitfieldMaskOperand ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { unsigned msb = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned lsb = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( lsb > msb ) { Check ( S , MCDisassembler :: SoftFail ) ; lsb = msb ; }


<s> static DecodeStatus DecodeBranchImmInstruction ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned pred = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; if ( pred == <NUM_LIT> ) { Inst . setOpcode ( <STR_LIT> ) ; imm |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; if ( ! tryAddingSymbolicOperand ( Address , Address + SignExtend32 < <NUM_LIT> > ( imm ) + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( imm ) ) ) ;


<s> else Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; return MCDisassembler :: Success ;


<s> } const FeatureBitset & featureBits = ( ( const MCDisassembler * ) Decoder ) -> getSubtargetInfo ( ) . getFeatureBits ( ) ; if ( featureBits [ <STR_LIT> ] && ( coproc != <NUM_LIT> ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( coproc ) ) ; Inst . addOperand ( MCOperand :: createImm ( CRd ) ) ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : imm = <STR_LIT> ( U ? <STR_LIT> : <STR_LIT> , imm ) ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : imm |= U << <NUM_LIT> ; LLVM_FALLTHROUGH ; default : Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; break ; } switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ; default : break ;


<s> if ( featureBits [ <STR_LIT> ] && ! ( Val == <NUM_LIT> || Val == <NUM_LIT> ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Val ) ) ;


<s> unsigned imod = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned M = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned iflags = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned mode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) != <NUM_LIT> || fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) != <NUM_LIT> || fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) != <NUM_LIT> ) return MCDisassembler :: Fail ; if ( imod == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( imod && M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imod ) ) ; Inst . addOperand ( MCOperand :: createImm ( iflags ) ) ;

Inst . addOperand ( MCOperand :: createImm ( mode ) ) ;


<s> if ( ! Check ( S , DecodeGPRPairRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> if ( ! Check ( S , DecodeGPRPairRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> static DecodeStatus DecodeDPairRegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const void * Decoder ) {

if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ; unsigned Register = DPairSpacedDecoderTable [ RegNo ] ;

Inst . addOperand ( MCOperand :: createReg ( Register ) ) ;


<s> Inst . addOperand ( MCOperand :: createReg ( Register ) ) ; return MCDisassembler :: Success ;


<s> if ( RegNo > <NUM_LIT> || ( hasD16 && RegNo > <NUM_LIT> ) ) return MCDisassembler :: Fail ; unsigned Register = DPRDecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Register ) ) ; return MCDisassembler :: Success ;


<s> DecodeStatus S = MCDisassembler :: Success ; unsigned Rt = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( featureBits [ <STR_LIT> ] && ! featureBits [ <STR_LIT> ] ) { if ( Rt == <NUM_LIT> || Rt == <NUM_LIT> ) S = MCDisassembler :: SoftFail ; Check ( S , DecodeGPRRegisterClass ( Inst , Rt , Address , Decoder ) ) ;

} else Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt , Address , Decoder ) ) ;


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ; if ( ( RegNo & <NUM_LIT> ) || RegNo == <NUM_LIT> ) S = MCDisassembler :: SoftFail ; unsigned RegisterPair = GPRPairDecoderTable [ RegNo / <NUM_LIT> ] ; Inst . addOperand ( MCOperand :: createReg ( RegisterPair ) ) ; return S ;


<s> if ( ( RegNo & <NUM_LIT> ) || RegNo == <NUM_LIT> ) S = MCDisassembler :: SoftFail ; unsigned RegisterPair = GPRPairDecoderTable [ RegNo / <NUM_LIT> ] ;

Inst . addOperand ( MCOperand :: createReg ( RegisterPair ) ) ;


<s> unsigned Register = GPRDecoderTable [ RegNo ] ;


<s> static DecodeStatus DecodeGPRwithAPSRRegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const void * Decoder ) {

DecodeStatus S = MCDisassembler :: Success ;


<s> unsigned imm8 = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; const MCDisassembler * Dis = static_cast < const MCDisassembler * > ( Decoder ) ; const FeatureBitset & FeatureBits = Dis -> getSubtargetInfo ( ) . getFeatureBits ( ) ; DecodeStatus S = MCDisassembler :: Success ; Inst . addOperand ( MCOperand :: createImm ( imm8 ) ) ; if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( imm8 == <NUM_LIT> && pred != <NUM_LIT> && ( ( FeatureBits [ <STR_LIT> ] ) != <NUM_LIT> ) ) S = MCDisassembler :: SoftFail ;


<s> DecodeStatus S = MCDisassembler :: Success ; Inst . addOperand ( MCOperand :: createImm ( imm8 ) ) ; if ( ! Check ( S , DecodePredicateOperand ( Inst , pred , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> static DecodeStatus DecodeHPRRegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const void * Decoder ) {

return DecodeSPRRegisterClass ( Inst , RegNo , Address , Decoder ) ;


<s> Inst . addOperand ( MCOperand :: createImm ( Val ) ) ;


<s> Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return MCDisassembler :: Success ;


<s> S = MCDisassembler :: SoftFail ; } if ( mask == <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( pred ) ) ; Inst . addOperand ( MCOperand :: createImm ( mask ) ) ; return S ;


<s> break ; default : S = MCDisassembler :: SoftFail ; break ; } if ( Inst . getOpcode ( ) == <STR_LIT> ) { unsigned Mask = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ! ( FeatureBits [ <STR_LIT> ] ) ) { if ( Mask != <NUM_LIT> ) S = MCDisassembler :: SoftFail ; } else { if ( Mask == <NUM_LIT> || ( Mask != <NUM_LIT> && ValLow > <NUM_LIT> ) || ( ! ( FeatureBits [ <STR_LIT> ] ) && ( Mask & <NUM_LIT> ) ) ) S = MCDisassembler :: SoftFail ; } } } else { if ( Val == <NUM_LIT> ) return MCDisassembler :: Fail ; } Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return S ;


<s> if ( ! Check ( S , DestRegDecoder ( Inst , Vd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DestRegDecoder ( Inst , Vd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DestRegDecoder ( Inst , Vn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Vm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned Q = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( Q ) { if ( ! Check ( S , DecodeQPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } else { if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned add = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

Inst . addOperand ( MCOperand :: createImm ( add ) ) ;


<s> static DecodeStatus DecodePredicateOperand ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { if ( Val == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( Inst . getOpcode ( ) == <STR_LIT> && Val == <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; if ( Val == <STR_LIT> ) { Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; } else Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ;


<s> if ( Val == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( Inst . getOpcode ( ) == <STR_LIT> && Val == <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; if ( Val == <STR_LIT> ) { Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; } else Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ;


<s> unsigned Register = QPRDecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Register ) ) ; return MCDisassembler :: Success ;


<s> if ( RegNo > <NUM_LIT> || ( RegNo & <NUM_LIT> ) != <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> if ( Val == <NUM_LIT> ) return MCDisassembler :: Fail ; for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( Val & ( <NUM_LIT> << i ) ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , i , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( NeedDisjointWriteback && WritebackReg == Inst . end ( ) [ - <NUM_LIT> ] . getReg ( ) ) Check ( S , MCDisassembler :: SoftFail ) ; } }


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : NeedDisjointWriteback = true ; WritebackReg = Inst . getOperand ( <NUM_LIT> ) . getReg ( ) ; break ; } if ( Val == <NUM_LIT> ) return MCDisassembler :: Fail ; for ( unsigned i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( Val & ( <NUM_LIT> << i ) ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , i , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( NeedDisjointWriteback && WritebackReg == Inst . end ( ) [ - <NUM_LIT> ] . getReg ( ) ) Check ( S , MCDisassembler :: SoftFail ) ; } }


<s> unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned mode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; switch ( mode ) { case <NUM_LIT> : mode = <STR_LIT> ; break ; case <NUM_LIT> : mode = <STR_LIT> ; break ; case <NUM_LIT> : mode = <STR_LIT> ; break ; case <NUM_LIT> : mode = <STR_LIT> ;


<s> unsigned opc1 = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned cop = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rt = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rt2 = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ( cop & ~ <NUM_LIT> ) == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( Rt == Rt2 ) S = MCDisassembler :: SoftFail ; if ( Inst . getOpcode ( ) == <STR_LIT> ) { if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt2 , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } Inst . addOperand ( MCOperand :: createImm ( cop ) ) ; Inst . addOperand ( MCOperand :: createImm ( opc1 ) ) ; if ( Inst . getOpcode ( ) == <STR_LIT> ) { if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt2 , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } Inst . addOperand ( MCOperand :: createImm ( CRm ) ) ; return S ;


<s> static DecodeStatus DecoderForMRRC2AndMCRR2 ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned CRm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned opc1 = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned cop = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rt = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rt2 = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ( cop & ~ <NUM_LIT> ) == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( Rt == Rt2 ) S = MCDisassembler :: SoftFail ; if ( Inst . getOpcode ( ) == <STR_LIT> ) { if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rt2 , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } Inst . addOperand ( MCOperand :: createImm ( cop ) ) ; Inst . addOperand ( MCOperand :: createImm ( opc1 ) ) ;


<s> if ( ( RegNo == <NUM_LIT> && ! featureBits [ <STR_LIT> ] ) || RegNo == <NUM_LIT> ) S = MCDisassembler :: SoftFail ; Check ( S , DecodeGPRRegisterClass ( Inst , RegNo , Address , Decoder ) ) ; return S ;


<s> DecodeStatus S = MCDisassembler :: Success ; const FeatureBitset & featureBits = ( ( const MCDisassembler * ) Decoder ) -> getSubtargetInfo ( ) . getFeatureBits ( ) ; if ( ( RegNo == <NUM_LIT> && ! featureBits [ <STR_LIT> ] ) || RegNo == <NUM_LIT> ) S = MCDisassembler :: SoftFail ; Check ( S , DecodeGPRRegisterClass ( Inst , RegNo , Address , Decoder ) ) ; return S ;


<s> static DecodeStatus DecodeShiftRight16Imm ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) {

Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> - Val ) ) ;


<s> static DecodeStatus DecodeShiftRight32Imm ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> - Val ) ) ; return MCDisassembler :: Success ;


<s> Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> - Val ) ) ;


<s> switch ( type ) { case <NUM_LIT> : ShOp = <STR_LIT> ; break ; case <NUM_LIT> : ShOp = <STR_LIT> ; break ; case <NUM_LIT> : ShOp = <STR_LIT> ; break ; case <NUM_LIT> : ShOp = <STR_LIT> ; break ; } if ( ShOp == <STR_LIT> && imm == <NUM_LIT> ) ShOp = <STR_LIT> ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; unsigned shift ; if ( U ) shift = <STR_LIT> ( <STR_LIT> , imm , ShOp ) ;

else shift = <STR_LIT> ( <STR_LIT> , imm , ShOp ) ;


<s> unsigned Register = SPRDecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Register ) ) ; return MCDisassembler :: Success ;


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ; unsigned Register = SPRDecoderTable [ RegNo ] ; Inst . addOperand ( MCOperand :: createReg ( Register ) ) ; return MCDisassembler :: Success ;


<s> static DecodeStatus DecodeT2AddrModeImm0_1020s4 ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeGPRnopcRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Rn == <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> static DecodeStatus DecodeT2AddrModeSOReg ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> :


<s> case <STR_LIT> : if ( Rn == <NUM_LIT> ) return MCDisassembler :: Fail ; break ; default : break ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecoderGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> unsigned Val = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Val |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; Val |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ;


<s> unsigned I1 = ! ( J1 ^ S ) ; unsigned I2 = ! ( J2 ^ S ) ; unsigned imm10 = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm11 = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned tmp = ( S << <NUM_LIT> ) | ( I1 << <NUM_LIT> ) | ( I2 << <NUM_LIT> ) | ( imm10 << <NUM_LIT> ) | imm11 ; int imm32 = SignExtend32 < <NUM_LIT> > ( tmp << <NUM_LIT> ) ;

if ( ! tryAddingSymbolicOperand ( Address , Address + imm32 + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( imm32 ) ) ;


<s> static DecodeStatus DecodeT2BROperand ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { if ( ! tryAddingSymbolicOperand ( Address , Address + SignExtend32 < <NUM_LIT> > ( Val ) + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Val ) ) ) ; return MCDisassembler :: Success ;


<s> unsigned iflags = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned mode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( imod == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( imod && M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imod ) ) ; Inst . addOperand ( MCOperand :: createImm ( iflags ) ) ; Inst . addOperand ( MCOperand :: createImm ( mode ) ) ; } else if ( imod && ! M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imod ) ) ; Inst . addOperand ( MCOperand :: createImm ( iflags ) ) ; if ( mode ) S = MCDisassembler :: SoftFail ; } else if ( ! imod && M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( mode ) ) ; if ( iflags ) S = MCDisassembler :: SoftFail ; } else { int imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ;

if ( imm > <NUM_LIT> ) return MCDisassembler :: Fail ;


<s> static DecodeStatus DecodeT2CPSInstruction ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { unsigned imod = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned M = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned iflags = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned mode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( imod == <NUM_LIT> ) return MCDisassembler :: Fail ; if ( imod && M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imod ) ) ; Inst . addOperand ( MCOperand :: createImm ( iflags ) ) ; Inst . addOperand ( MCOperand :: createImm ( mode ) ) ; } else if ( imod && ! M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imod ) ) ; Inst . addOperand ( MCOperand :: createImm ( iflags ) ) ; if ( mode ) S = MCDisassembler :: SoftFail ; } else if ( ! imod && M ) { Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( mode ) ) ; if ( iflags ) S = MCDisassembler :: SoftFail ; } else { int imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( imm > <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> int imm = Val & <NUM_LIT> ; if ( Val == <NUM_LIT> ) imm = INT32_MIN ; else if ( ! ( Val & <NUM_LIT> ) ) imm *= - <NUM_LIT> ;


<s> else if ( ! ( Val & <NUM_LIT> ) ) imm *= - <NUM_LIT> ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> static DecodeStatus DecodeT2Imm8S4 ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { if ( Val == <NUM_LIT> ) Inst . addOperand ( MCOperand :: createImm ( INT32_MIN ) ) ;


<s> Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; default : return MCDisassembler :: Fail ; } return DecodeT2LoadLabel ( Inst , Insn , Address , Decoder ) ; } if ( Rt == <NUM_LIT> ) { switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : return MCDisassembler :: Fail ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> :


<s> case <STR_LIT> : return MCDisassembler :: Fail ; default : break ; } } switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : break ; case <STR_LIT> : if ( ! hasV7Ops ) return MCDisassembler :: Fail ; break ; default : if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! U ) { if ( imm == <NUM_LIT> ) imm = INT32_MIN ;


<s> case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; default : return MCDisassembler :: Fail ; } return DecodeT2LoadLabel ( Inst , Insn , Address , Decoder ) ; } if ( Rt == <NUM_LIT> ) { switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : return MCDisassembler :: Fail ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; case <STR_LIT> : Inst . setOpcode ( <STR_LIT> ) ; break ; default : break ; } } switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : break ; case <STR_LIT> : if ( ! hasV7Ops ) return MCDisassembler :: Fail ; break ; case <STR_LIT> : if ( ! hasV7Ops || ! hasMP ) return MCDisassembler :: Fail ; break ; default : if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rt , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } unsigned addrmode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; addrmode |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ;


<s> unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm = <NUM_LIT> ; imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; imm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; if ( Inst . getOpcode ( ) == <STR_LIT> ) if ( ! Check ( S , DecoderGPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecoderGPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! tryAddingSymbolicOperand ( Address , imm , false , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( imm ) ) ;


<s> DecodeStatus S = MCDisassembler :: Success ;

if ( Val == <NUM_LIT> ) S = MCDisassembler :: Fail ;


<s> if ( Val == <NUM_LIT> ) S = MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Val ) ) ;


<s> case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | imm ) ) ; break ; case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) | imm ) ) ; break ; } } else {

unsigned unrot = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) | <NUM_LIT> ;


<s> case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | imm ) ) ; break ; case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : Inst . addOperand ( MCOperand :: createImm ( ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) | ( imm << <NUM_LIT> ) | imm ) ) ;


<s> DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ; unsigned imm = fieldFromInstruction ( Val , <NUM_LIT> , <NUM_LIT> ) ;

if ( ! Check ( S , DecodetGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned imm = Val << <NUM_LIT> ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; tryAddingPcLoadReferenceComment ( Address , ( Address & ~ <NUM_LIT> ) + imm + <NUM_LIT> , Decoder ) ;


<s> Inst . addOperand ( MCOperand :: createImm ( Val ) ) ;


<s> Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return MCDisassembler :: Success ;


<s> default : return MCDisassembler :: Fail ; case <STR_LIT> : break ; case <STR_LIT> : Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; break ; }


<s> unsigned imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodetGPRRegisterClass ( Inst , dst , Address , Decoder ) ) ) return MCDisassembler :: Fail ; switch ( Inst . getOpcode ( ) ) { default : return MCDisassembler :: Fail ; case <STR_LIT> : break ; case <STR_LIT> : Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; break ;


<s> static DecodeStatus DecodeThumbAddSPImm ( MCInst & Inst , uint16_t Insn , uint64_t Address , const void * Decoder ) { unsigned imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; Inst . addOperand ( MCOperand :: createImm ( imm ) ) ; return MCDisassembler :: Success ;


<s> unsigned Rdm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rdm |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rdm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rdm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } else if ( Inst . getOpcode ( ) == <STR_LIT> ) {

unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> if ( ! tryAddingSymbolicOperand ( Address , Address + SignExtend32 < <NUM_LIT> > ( Val << <NUM_LIT> ) + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Val << <NUM_LIT> ) ) ) ; return MCDisassembler :: Success ;


<s> unsigned J1 = ( Val >> <NUM_LIT> ) & <NUM_LIT> ; unsigned J2 = ( Val >> <NUM_LIT> ) & <NUM_LIT> ; unsigned I1 = ! ( J1 ^ S ) ; unsigned I2 = ! ( J2 ^ S ) ; unsigned tmp = ( Val & ~ <NUM_LIT> ) | ( I1 << <NUM_LIT> ) | ( I2 << <NUM_LIT> ) ; int imm32 = SignExtend32 < <NUM_LIT> > ( tmp << <NUM_LIT> ) ; if ( ! tryAddingSymbolicOperand ( Address , ( Address & ~ <NUM_LIT> ) + imm32 + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( imm32 ) ) ; return MCDisassembler :: Success ;


<s> unsigned I1 = ! ( J1 ^ S ) ; unsigned I2 = ! ( J2 ^ S ) ; unsigned tmp = ( Val & ~ <NUM_LIT> ) | ( I1 << <NUM_LIT> ) | ( I2 << <NUM_LIT> ) ; int imm32 = SignExtend32 < <NUM_LIT> > ( tmp << <NUM_LIT> ) ;

if ( ! tryAddingSymbolicOperand ( Address , ( Address & ~ <NUM_LIT> ) + imm32 + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( imm32 ) ) ;


<s> static DecodeStatus DecodeThumbBROperand ( MCInst & Inst , unsigned Val , uint64_t Address , const void * Decoder ) { if ( ! tryAddingSymbolicOperand ( Address , Address + SignExtend32 < <NUM_LIT> > ( Val << <NUM_LIT> ) + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Val << <NUM_LIT> ) ) ) ;


<s> if ( ! tryAddingSymbolicOperand ( Address , Address + ( Val << <NUM_LIT> ) + <NUM_LIT> , true , <NUM_LIT> , Inst , Decoder ) ) Inst . addOperand ( MCOperand :: createImm ( Val << <NUM_LIT> ) ) ; return MCDisassembler :: Success ;


<s> unsigned imod = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) | <NUM_LIT> ;

unsigned flags = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ;


<s> unsigned flags = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ;

Inst . addOperand ( MCOperand :: createImm ( imod ) ) ;


<s> if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> Inst . setOpcode ( <STR_LIT> ) ; } } if ( cmode == <NUM_LIT> ) { if ( op == <NUM_LIT> ) { Inst . setOpcode ( <STR_LIT> ) ; } else { Inst . setOpcode ( <STR_LIT> ) ; } } } return DecodeNEONModImmInstruction ( Inst , Insn , Address , Decoder ) ; } if ( ! ( imm & <NUM_LIT> ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Vd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Vm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> - imm ) ) ; return S ;


<s> static DecodeStatus DecodeVCVTQ ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { const FeatureBitset & featureBits = ( ( const MCDisassembler * ) Decoder ) -> getSubtargetInfo ( ) . getFeatureBits ( ) ; bool hasFullFP16 = featureBits [ <STR_LIT> ] ; unsigned Vd = ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; Vd |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; unsigned Vm = ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; Vm |= ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ) ; unsigned imm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned cmode = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned op = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; DecodeStatus S = MCDisassembler :: Success ; if ( ! ( imm & <NUM_LIT> ) ) { if ( cmode == <NUM_LIT> ) { if ( op == <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . setOpcode ( <STR_LIT> ) ; } if ( hasFullFP16 ) { if ( cmode == <NUM_LIT> ) { if ( op == <NUM_LIT> ) { Inst . setOpcode ( <STR_LIT> ) ; } else {


<s> unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( size == <NUM_LIT> && align == <NUM_LIT> ) return MCDisassembler :: Fail ; align *= ( <NUM_LIT> << size ) ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ! Check ( S , DecodeDPairRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ; default : if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ;


<s> } if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( align ) ) ;

if ( Rm != <NUM_LIT> && Rm != <NUM_LIT> && ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> case <NUM_LIT> : align = <NUM_LIT> ; break ; default : return MCDisassembler :: Fail ; } break ; } if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( align ) ) ; if ( Rm != <NUM_LIT> ) { if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

} else Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ;


<s> unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; switch ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) { case <NUM_LIT> : align = <NUM_LIT> ; break ; case <NUM_LIT> : align = <NUM_LIT> ; break ; default : return MCDisassembler :: Fail ;


<s> unsigned size = <NUM_LIT> << fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; align *= <NUM_LIT> * size ; switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( ! Check ( S , DecodeDPairRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :

if ( ! Check ( S , DecodeDPairSpacedRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; break ; case <NUM_LIT> : index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> :

if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ;


<s> unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned inc = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) + <NUM_LIT> ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned inc = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) + <NUM_LIT> ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + <NUM_LIT> * inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> ) ) ;

if ( Rm == <NUM_LIT> ) Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ;


<s> static DecodeStatus DecodeVLD3LN ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; } if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd + inc , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd + <NUM_LIT> * inc , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned align = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( size == <NUM_LIT> ) { if ( align == <NUM_LIT> ) return MCDisassembler :: Fail ; align = <NUM_LIT> ; } else { if ( size == <NUM_LIT> ) { align *= <NUM_LIT> ; } else { size = <NUM_LIT> << size ; align *= <NUM_LIT> * size ; } } if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + <NUM_LIT> * inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + <NUM_LIT> * inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , ( Rd + <NUM_LIT> * inc ) % <NUM_LIT> , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( align ) ) ; if ( Rm == <NUM_LIT> ) Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; else if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } return S ;


<s> unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> : switch ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) { case <NUM_LIT> : align = <NUM_LIT> ; break ; case <NUM_LIT> : return MCDisassembler :: Fail ; default : align = <NUM_LIT> << fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ;


<s> Rm |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeQPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> << size ) ) ;


<s> unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( ! Check ( S , DecodeQPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ; if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> << size ) ) ; return S ;


<s> case <NUM_LIT> : align = <NUM_LIT> ; break ; default : return MCDisassembler :: Fail ; } break ; } if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( align ) ) ; if ( Rm != <NUM_LIT> ) { if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } else Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ;


<s> DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; switch ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) { case <NUM_LIT> : align = <NUM_LIT> ; break ; case <NUM_LIT> : align = <NUM_LIT> ; break ; default :


<s> unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; } if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rn , Address , Decoder ) ) ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( align ) ) ; if ( Rm != <NUM_LIT> ) { if ( Rm != <NUM_LIT> ) { if ( ! Check ( S , DecodeGPRRegisterClass ( Inst , Rm , Address , Decoder ) ) ) return MCDisassembler :: Fail ; } else Inst . addOperand ( MCOperand :: createReg ( <NUM_LIT> ) ) ; } if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd , Address , Decoder ) ) ) return MCDisassembler :: Fail ;

if ( ! Check ( S , DecodeDPRRegisterClass ( Inst , Rd + inc , Address , Decoder ) ) ) return MCDisassembler :: Fail ;


<s> unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Fail ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ;


<s> static DecodeStatus DecodeVST4LN ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { DecodeStatus S = MCDisassembler :: Success ; unsigned Rn = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rm = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned Rd = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Rd |= fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) << <NUM_LIT> ; unsigned size = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; unsigned align = <NUM_LIT> ; unsigned index = <NUM_LIT> ; unsigned inc = <NUM_LIT> ; switch ( size ) { default : return MCDisassembler :: Fail ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; break ; case <NUM_LIT> : if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) align = <NUM_LIT> ; index = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) inc = <NUM_LIT> ; break ; case <NUM_LIT> : switch ( fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ) {


<s> } } Result = decodeInstruction ( DecoderTableVFPV832 , MI , Insn32 , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; return Result ; } if ( fieldFromInstruction ( Insn32 , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ) { Result = decodeInstruction ( DecoderTableNEONDup32 , MI , Insn32 , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; Check ( Result , AddThumbPredicate ( MI ) ) ; return Result ; } } if ( fieldFromInstruction ( Insn32 , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ) { uint32_t NEONLdStInsn = Insn32 ; NEONLdStInsn &= <NUM_LIT> ; NEONLdStInsn |= <NUM_LIT> ; Result = decodeInstruction ( DecoderTableNEONLoadStore32 , MI , NEONLdStInsn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; Check ( Result , AddThumbPredicate ( MI ) ) ; return Result ; } } if ( fieldFromInstruction ( Insn32 , <NUM_LIT> , <NUM_LIT> ) == <NUM_LIT> ) { uint32_t NEONDataInsn = Insn32 ; NEONDataInsn &= <NUM_LIT> ; NEONDataInsn |= ( NEONDataInsn & <NUM_LIT> ) >> <NUM_LIT> ; NEONDataInsn |= <NUM_LIT> ; Result = decodeInstruction ( DecoderTableNEONData32 , MI , NEONDataInsn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; Check ( Result , AddThumbPredicate ( MI ) ) ; return Result ; } uint32_t NEONCryptoInsn = Insn32 ; NEONCryptoInsn &= <NUM_LIT> ; NEONCryptoInsn |= ( NEONCryptoInsn & <NUM_LIT> ) >> <NUM_LIT> ; NEONCryptoInsn |= <NUM_LIT> ; Result = decodeInstruction ( DecoderTablev8Crypto32 , MI , NEONCryptoInsn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; return Result ; } uint32_t NEONv8Insn = Insn32 ; NEONv8Insn &= <NUM_LIT> ; Result = decodeInstruction ( DecoderTablev8NEON32 , MI , NEONv8Insn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; return Result ; } } Result = decodeInstruction ( DecoderTableThumb2CoProc32 , MI , Insn32 , Address , this , STI ) ;


<s> TargetRegistry :: RegisterMCDisassembler ( getTheThumbLETarget ( ) , createThumbDisassembler ) ; TargetRegistry :: RegisterMCDisassembler ( getTheThumbBETarget ( ) , createThumbDisassembler ) ;


<s> Session ( ) : ITCounter ( <NUM_LIT> ) , ITState ( <NUM_LIT> ) {


<s> ThumbDisassembler ( ) : MCDisassembler ( ) , SO ( ) {


<s> void ThumbDisassembler :: UpdateThumbVFPPredicate ( MCInst & MI ) const { unsigned CC ; CC = ITBlock . getITCC ( ) ; if ( CC == <NUM_LIT> ) CC = <STR_LIT> ; if ( ITBlock . instrInITBlock ( ) ) ITBlock . advanceITState ( ) ; const MCOperandInfo * OpInfo = <ISA_LIT>Insts [ MI . getOpcode ( ) ] . OpInfo ; MCInst :: iterator I = MI . begin ( ) ; unsigned short NumOps = <ISA_LIT>Insts [ MI . getOpcode ( ) ] . NumOperands ; for ( unsigned i = <NUM_LIT> ; i < NumOps ; ++ i , ++ I ) { if ( OpInfo [ i ] . isPredicate ( ) ) { I -> setImm ( CC ) ; ++ I ; if ( CC == <STR_LIT> ) I -> setReg ( <NUM_LIT> ) ; else I -> setReg ( <STR_LIT> ) ; return ; }


<s> <ISA_LIT>ELFAttributeData ( ) : ELFAttributeData ( <STR_LIT> ) , m_CurrentCPUArch ( - <NUM_LIT> ) , m_DIVUseInitialized ( false ) , m_HardFPUseInitialized ( false ) {


<s> static int calculate_cpu_arch ( int cpu_arch , int secondary_arch ) { if ( ( secondary_arch < <NUM_LIT> ) || ( ( cpu_arch + secondary_arch ) != ( <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V4T + <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V6_M ) ) ) return cpu_arch ;


<s> int y = pConfig . regs ; return ( x * ( y >> <NUM_LIT> ) + ( y >> <NUM_LIT> ) ) ;


<s> if ( ( static_cast < uint8_t > ( data [ <NUM_LIT> ] ) == <ISA_LIT>ELFAttributeData :: Tag_CPU_arch ) && ( ( data [ <NUM_LIT> ] == <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V4T ) || ( data [ <NUM_LIT> ] == <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V6_M ) ) ) return static_cast < uint32_t > ( data [ <NUM_LIT> ] ) ;


<s> if ( value . shouldEmit ( ) && ! ELFAttributeData :: WriteAttribute ( tag , value , buffer ) ) { return <NUM_LIT> ; } } for ( unsigned i = ( Tag_nodefaults + <NUM_LIT> ) ; i <= Tag_Max ; ++ i ) { TagType tag = static_cast < TagType > ( i ) ; const ELFAttributeValue & value = m_Attrs [ tag ] ; if ( value . shouldEmit ( ) && ( i != Tag_conformance ) && ! ELFAttributeData :: WriteAttribute ( tag , value , buffer ) ) { return <NUM_LIT> ; } } for ( UnknownAttrsMap :: const_iterator unknown_attr_it = m_UnknownAttrs . begin ( ) , unknown_attr_end = m_UnknownAttrs . end ( ) ; unknown_attr_it != unknown_attr_end ; ++ unknown_attr_it ) { TagType tag = unknown_attr_it -> first ; const ELFAttributeValue & value = unknown_attr_it -> second ; if ( value . shouldEmit ( ) && ! ELFAttributeData :: WriteAttribute ( tag , value , buffer ) ) { return <NUM_LIT> ;


<s> if ( value . shouldEmit ( ) && ( i != Tag_conformance ) && ! ELFAttributeData :: WriteAttribute ( tag , value , buffer ) ) { return <NUM_LIT> ; } } for ( UnknownAttrsMap :: const_iterator unknown_attr_it = m_UnknownAttrs . begin ( ) , unknown_attr_end = m_UnknownAttrs . end ( ) ; unknown_attr_it != unknown_attr_end ; ++ unknown_attr_it ) { TagType tag = unknown_attr_it -> first ; const ELFAttributeValue & value = unknown_attr_it -> second ; if ( value . shouldEmit ( ) && ! ELFAttributeData :: WriteAttribute ( tag , value , buffer ) ) { return <NUM_LIT> ; } } return ( buffer - pBuf ) ;


<s> char new_value [ ] = { <ISA_LIT>ELFAttributeData :: Tag_CPU_arch , static_cast < char > ( pArch ) , <NUM_LIT> } ; pValue . setStringValue ( std :: string ( new_value , sizeof ( new_value ) ) ) ; }


pValue . setStringValue ( std :: string ( new_value , sizeof ( new_value ) ) ) ;


<s> } } else { UnknownAttrsMap :: const_iterator attr_it = m_UnknownAttrs . find ( pTag ) ; if ( attr_it == m_UnknownAttrs . end ( ) ) { return NULL ; } else {


<s> if ( pTag <= Tag_Max ) { const ELFAttributeValue & attr_value = m_Attrs [ pTag ] ; if ( attr_value . isInitialized ( ) ) { return & attr_value ; } else { return NULL ; } } else { UnknownAttrsMap :: const_iterator attr_it = m_UnknownAttrs . find ( pTag ) ; if ( attr_it == m_UnknownAttrs . end ( ) ) { return NULL ; } else { return & attr_it -> second ; }


<s> case Tag_CPU_name : { return ELFAttributeValue :: String ; } default : { if ( pTag < <NUM_LIT> ) return ELFAttributeValue :: Int ; else return ( ( pTag & <NUM_LIT> ) ? ELFAttributeValue :: String : ELFAttributeValue :: Int ) ;


<s> return ELFAttributeValue :: String ; } default : { if ( pTag < <NUM_LIT> ) return ELFAttributeValue :: Int ; else return ( ( pTag & <NUM_LIT> ) ? ELFAttributeValue :: String : ELFAttributeValue :: Int ) ; } }


<s> ELFAttributeValue * attr_value = NULL ; if ( pTag <= Tag_Max ) { attr_value = & m_Attrs [ pTag ] ; } else { attr_value = & m_UnknownAttrs [ pTag ] ; } assert ( attr_value != NULL ) ; if ( ! attr_value -> isUninitialized ( ) ) { return std :: make_pair ( attr_value , false ) ; } else { attr_value -> setType ( GetAttributeValueType ( pTag ) ) ; return std :: make_pair ( attr_value , true ) ;


<s> if ( ! attr_value -> isUninitialized ( ) ) { return std :: make_pair ( attr_value , false ) ; } else { attr_value -> setType ( GetAttributeValueType ( pTag ) ) ;

return std :: make_pair ( attr_value , true ) ;


<s> static int get_fp_arch_of_config ( const struct fp_config_data & pConfig ) { int hash = calculate_fp_config_hash ( pConfig ) ; assert ( static_cast < size_t > ( hash ) < llvm :: array_lengthof ( fp_config_hash_table ) ) ; return fp_config_hash_table [ hash ] ;


<s> int hash = calculate_fp_config_hash ( pConfig ) ; assert ( static_cast < size_t > ( hash ) < llvm :: array_lengthof ( fp_config_hash_table ) ) ; return fp_config_hash_table [ hash ] ;


<s> assert ( static_cast < size_t > ( cpu_arch ) < ( sizeof ( generic_cpu_name_table ) / sizeof ( generic_cpu_name_table [ <NUM_LIT> ] ) ) ) ;

return generic_cpu_name_table [ cpu_arch ] ;


<s> if ( ( cpu_arch == <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V7 ) && ( ( cpu_arch_profile == 'R' ) || ( cpu_arch_profile == 'M' ) ) ) { return true ; } else { return ( cpu_arch >= <ISA_LIT>ELFAttributeData :: CPU_Arch_<ISA_LIT>_V7E_M ) ; } } case <NUM_LIT> : { return false ;


<s> if ( new_cpu_arch <= CPU ( V6KZ ) ) return new_cpu_arch ; return cpu_compatibility_table [ old_cpu_arch ] [ new_cpu_arch - CPU ( V6T2 ) ] ;


<s> } for ( UnknownAttrsMap :: const_iterator unknown_attr_it = m_UnknownAttrs . begin ( ) , unknown_attr_end = m_UnknownAttrs . end ( ) ; unknown_attr_it != unknown_attr_end ; ++ unknown_attr_it ) { TagType tag = unknown_attr_it -> first ; const ELFAttributeValue & value = unknown_attr_it -> second ; if ( value . shouldEmit ( ) ) { result += leb128 :: size ( static_cast < uint32_t > ( tag ) ) ; result += value . getSize ( ) ; } } return result ;


<s> bool <ISA_LIT>ELFAttributeData :: usingThumb ( ) const { int arch = m_Attrs [ Tag_CPU_arch ] . getIntValue ( ) ;

if ( ( arch == CPU_Arch_<ISA_LIT>_V6_M ) || ( arch == CPU_Arch_<ISA_LIT>_V6S_M ) ) return true ;


<s> if ( ( arch != CPU_Arch_<ISA_LIT>_V7 ) && ( arch != CPU_Arch_<ISA_LIT>_V7E_M ) ) return false ; arch = m_Attrs [ Tag_CPU_arch_profile ] . getIntValue ( ) ; return arch == Arch_Profile_Microcontroller ;


<s> return ( arch == CPU_Arch_<ISA_LIT>_V6T2 ) || ( arch == CPU_Arch_<ISA_LIT>_V7 ) ;


<s> void <ISA_LIT>ELFDynamic :: applyTargetEntries ( const ELFFileFormat & pFormat ) {

if ( pFormat . hasGOT ( ) ) applyOne ( llvm :: ELF :: DT_PLTGOT , pFormat . getGOT ( ) . addr ( ) ) ;


<s> if ( pFormat . hasGOT ( ) ) applyOne ( llvm :: ELF :: DT_PLTGOT , pFormat . getGOT ( ) . addr ( ) ) ;


<s> <ISA_LIT>ELFDynamic :: <ISA_LIT>ELFDynamic ( const GNULDBackend & pParent , const LinkerConfig & pConfig ) : ELFDynamic ( pParent , pConfig ) {


<s> if ( pFormat . hasGOT ( ) ) reserveOne ( llvm :: ELF :: DT_PLTGOT ) ;


<s> <ISA_LIT>ELFDynamic :: ~ <ISA_LIT>ELFDynamic ( ) {


<s> if ( Sec . getKind ( ) . isExecuteOnly ( ) && ! TextSection -> hasInstructions ( ) && ! TextSection -> hasData ( ) ) { TextSection -> setFlags ( TextSection -> getFlags ( ) | ELF :: SHF_<ISA_LIT>_PURECODE ) ; }


<s> if ( Sec . getKind ( ) . isExecuteOnly ( ) && ! TextSection -> hasInstructions ( ) && ! TextSection -> hasData ( ) ) {

TextSection -> setFlags ( TextSection -> getFlags ( ) | ELF :: SHF_<ISA_LIT>_PURECODE ) ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_<ISA_LIT> , false ) {


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) {

return std :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const {

return GetRelocTypeInner ( Target , Fixup , IsPCRel , Ctx ) ;


<s> default : return true ; case ELF :: R_<ISA_LIT>_PREL31 : case ELF :: R_<ISA_LIT>_ABS32 :


<s> switch ( Type ) { default : return true ;


<s> default : return true ; case ELF :: R_<ISA_LIT>_PREL31 :


<s> return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) ;


<s> case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_PREL : return ELF :: R_<ISA_LIT>_GOT_PREL ; case MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 : return ELF :: R_<ISA_LIT>_PREL31 ; } case <STR_LIT> : case <STR_LIT> : switch ( Modifier ) { case MCSymbolRefExpr :: VK_PLT : return ELF :: R_<ISA_LIT>_CALL ; case MCSymbolRefExpr :: VK_TLSCALL : return ELF :: R_<ISA_LIT>_TLS_CALL ; default : return ELF :: R_<ISA_LIT>_CALL ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ELF :: R_<ISA_LIT>_JUMP24 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_JUMP19 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_JUMP24 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_MOVT_PREL ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_MOVW_PREL_NC ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_MOVT_PREL ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_MOVW_PREL_NC ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_JUMP11 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_THM_JUMP8 ; case <STR_LIT> : case <STR_LIT> : switch ( Modifier ) { case MCSymbolRefExpr :: VK_TLSCALL : return ELF :: R_<ISA_LIT>_THM_TLS_CALL ; default : return ELF :: R_<ISA_LIT>_THM_CALL ; } } } switch ( ( unsigned ) Fixup . getKind ( ) ) { default : Ctx . reportFatalError ( Fixup . getLoc ( ) , <STR_LIT> ) ; return ELF :: R_<ISA_LIT>_NONE ; case FK_Data_1 : switch ( Modifier ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_None : return ELF :: R_<ISA_LIT>_ABS8 ; } case FK_Data_2 : switch ( Modifier ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_None : return ELF :: R_<ISA_LIT>_ABS16 ; } case FK_Data_4 : switch ( Modifier ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_<ISA_LIT>_NONE : return ELF :: R_<ISA_LIT>_NONE ; case MCSymbolRefExpr :: VK_GOT : return ELF :: R_<ISA_LIT>_GOT_BREL ; case MCSymbolRefExpr :: VK_TLSGD : return ELF :: R_<ISA_LIT>_TLS_GD32 ; case MCSymbolRefExpr :: VK_TPOFF : return ELF :: R_<ISA_LIT>_TLS_LE32 ; case MCSymbolRefExpr :: VK_GOTTPOFF : return ELF :: R_<ISA_LIT>_TLS_IE32 ; case MCSymbolRefExpr :: VK_None : return ELF :: R_<ISA_LIT>_ABS32 ; case MCSymbolRefExpr :: VK_GOTOFF : return ELF :: R_<ISA_LIT>_GOTOFF32 ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_PREL : return ELF :: R_<ISA_LIT>_GOT_PREL ; case MCSymbolRefExpr :: VK_<ISA_LIT>_TARGET1 : return ELF :: R_<ISA_LIT>_TARGET1 ; case MCSymbolRefExpr :: VK_<ISA_LIT>_TARGET2 : return ELF :: R_<ISA_LIT>_TARGET2 ; case MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 : return ELF :: R_<ISA_LIT>_PREL31 ; case MCSymbolRefExpr :: VK_<ISA_LIT>_SBREL : return ELF :: R_<ISA_LIT>_SBREL32 ; case MCSymbolRefExpr :: VK_<ISA_LIT>_TLSLDO : return ELF :: R_<ISA_LIT>_TLS_LDO32 ; case MCSymbolRefExpr :: VK_TLSCALL : return ELF :: R_<ISA_LIT>_TLS_CALL ;


<s> return createELFObjectWriter ( MOTW , OS , true ) ;


<s> RelocType = GetRelocTypeInner ( Target , Fixup , IsPCRel ) ; DEBUG ( const MCSymbolRefExpr :: VariantKind Kind = Target . getSymA ( ) -> getKind ( ) ; MCSymbolRefExpr :: VariantKind Kind2 ; Kind2 = Target . getSymB ( ) ? Target . getSymB ( ) -> getKind ( ) : MCSymbolRefExpr :: VK_None ; dbgs ( ) << <STR_LIT> << Section . getSectionName ( ) << <STR_LIT> << Symbol . getName ( ) << <STR_LIT> << <STR_LIT> << ( unsigned ) RelocType << <STR_LIT> << ( int ) Kind << <STR_LIT> << ( int ) Kind2 << <STR_LIT> << Symbol . isAbsolute ( ) << <STR_LIT> << Symbol . isDefined ( ) << <STR_LIT> << Symbol . isVariable ( ) << <STR_LIT> << Symbol . isTemporary ( ) << <STR_LIT> << PCRelCount << <STR_LIT> << NonPCRelCount << <STR_LIT> ) ; if ( IsPCRel ) { ++ PCRelCount ; switch ( RelocType ) { default : InNormalSection = StringSwitch < bool > ( Section . getSectionName ( ) ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Default ( true ) ; EmitThisSym = true ; break ; case ELF :: R_<ISA_LIT>_ABS32 : InNormalSection = StringSwitch < bool > ( Section . getSectionName ( ) ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Default ( true ) ; EmitThisSym = false ; break ; } } else { NonPCRelCount ++ ; InNormalSection = StringSwitch < bool > ( Section . getSectionName ( ) ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Default ( true ) ; switch ( RelocType ) { default : EmitThisSym = true ; break ; case ELF :: R_<ISA_LIT>_ABS32 : EmitThisSym = false ; break ; case ELF :: R_<ISA_LIT>_PREL31 : EmitThisSym = false ; break ; } } if ( EmitThisSym ) return & Symbol ; if ( ! Symbol . isTemporary ( ) && InNormalSection ) { return & Symbol ;


<s> break ; case ELF :: R_<ISA_LIT>_ABS32 : InNormalSection = StringSwitch < bool > ( Section . getSectionName ( ) ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Default ( true ) ; EmitThisSym = false ; break ; } } else { NonPCRelCount ++ ; InNormalSection = StringSwitch < bool > ( Section . getSectionName ( ) ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Case ( <STR_LIT> , false ) . Default ( true ) ; switch ( RelocType ) { default : EmitThisSym = true ; break ; case ELF :: R_<ISA_LIT>_ABS32 : EmitThisSym = false ; break ; case ELF :: R_<ISA_LIT>_PREL31 : EmitThisSym = false ; break ; } }


<s> unsigned <ISA_LIT>ELFObjectWriter :: GetRelocType ( const MCValue & Target , const MCFixup & Fixup , bool IsPCRel , bool IsRelocWithSymbol , int64_t Addend ) const {

return GetRelocTypeInner ( Target , Fixup , IsPCRel ) ;


<s> std :: unique_ptr < MCObjectWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( raw_pwrite_stream & OS , uint8_t OSABI , bool IsLittleEndian ) { return createELFObjectWriter ( llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) , OS , IsLittleEndian ) ;


<s> std :: unique_ptr < MCObjectWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( raw_pwrite_stream & OS , uint8_t OSABI , bool IsLittleEndian ) {

return createELFObjectWriter ( llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI ) , OS , IsLittleEndian ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ;

return createELFObjectWriter ( MOTW , OS , IsLittleEndian ) ;


<s> MCObjectWriter * llvm :: create<ISA_LIT>ELFObjectWriter ( raw_pwrite_stream & OS , uint8_t OSABI , bool IsLittleEndian ) { MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ; return createELFObjectWriter ( MOTW , OS , IsLittleEndian ) ;