<s> case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : case <NUM_LIT> : O << <STR_LIT> ; return ; } } if ( ! SpecRegRBit && ( Mask == <NUM_LIT> || Mask == <NUM_LIT> || Mask == <NUM_LIT> ) ) { O << <STR_LIT> ; switch ( Mask ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } if ( SpecRegRBit ) O << <STR_LIT> ; else O << <STR_LIT> ; if ( Mask ) { O << '_' ;


<s> uint64_t Val = <STR_LIT> ( EncodedImm , EltBits ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; O . write_hex ( Val ) ; O << markup ( <STR_LIT> ) ;


<s> O << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> case MCExpr :: Constant : { const MCConstantExpr * Constant = cast < MCConstantExpr > ( Expr ) ; int64_t TargetAddress ; if ( ! Constant -> EvaluateAsAbsolute ( TargetAddress ) ) { O << '#' << * Expr ; } else { O << <STR_LIT> ; O . write_hex ( static_cast < uint32_t > ( TargetAddress ) ) ; } break ;


<s> switch ( Expr -> getKind ( ) ) { case MCExpr :: Binary : O << '#' << * Expr ; break ; case MCExpr :: Constant : { const MCConstantExpr * Constant = cast < MCConstantExpr > ( Expr ) ; int64_t TargetAddress ; if ( ! Constant -> EvaluateAsAbsolute ( TargetAddress ) ) { O << '#' << * Expr ; } else {


<s> void <ISA_LIT>InstPrinter :: printPCLabel ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printPImmediate ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printPKHASRShiftImm ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) Imm = <NUM_LIT> ; assert ( Imm > <NUM_LIT> && Imm <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Imm << markup ( <STR_LIT> ) ;


<s> assert ( Imm > <NUM_LIT> && Imm <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Imm << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) return ; assert ( Imm > <NUM_LIT> && Imm < <NUM_LIT> && <STR_LIT> ) ;

O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Imm << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> const MCOperand & MO = MI -> getOperand ( OpNum ) ; unsigned Imm = MO . getImm ( ) ;

O << markup ( <STR_LIT> ) << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( Imm & <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MO . getImm ( ) ; O << markup ( <STR_LIT> ) << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( ( Imm & <NUM_LIT> ) << <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printPostIdxRegOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;

O << ( MO2 . getImm ( ) ? <STR_LIT> : <STR_LIT> ) ;


<s> O << ( MO2 . getImm ( ) ? <STR_LIT> : <STR_LIT> ) ; printRegName ( O , MO1 . getReg ( ) ) ;


<s> if ( ( unsigned ) CC == <NUM_LIT> ) O << <STR_LIT> ; else if ( CC != <STR_LIT> ) O << <ISA_LIT>CondCodeToString ( CC ) ;


<s> if ( ShOpc != <STR_LIT> ) { O << <STR_LIT> ; if ( UseMarkup ) O << <STR_LIT> ; O << <STR_LIT> << translateShiftImm ( ShImm ) ; if ( UseMarkup ) O << <STR_LIT> ;


<s> assert ( ! ( ShOpc == <STR_LIT> && ! ShImm ) && <STR_LIT> ) ; O << getShiftOpcStr ( ShOpc ) ; if ( ShOpc != <STR_LIT> ) {


<s> void <ISA_LIT>InstPrinter :: printRegisterList ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { if ( i != OpNum ) O << <STR_LIT> ;

printRegName ( O , MI -> getOperand ( i ) . getReg ( ) ) ;


<s> OS << markup ( <STR_LIT> ) << getRegisterName ( RegNo ) << markup ( <STR_LIT> ) ;


<s> switch ( Imm ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ; } O << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printRotImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) return ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> ; switch ( Imm ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ;


<s> assert ( MI -> getOperand ( OpNum ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ; O << 's' ;


<s> void <ISA_LIT>InstPrinter :: printSBitModifierOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { if ( MI -> getOperand ( OpNum ) . getReg ( ) ) { assert ( MI -> getOperand ( OpNum ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ;


<s> if ( Op . getImm ( ) ) O << <STR_LIT> ; else O << <STR_LIT> ;


<s> bool isASR = ( ShiftOp & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ; unsigned Amt = ShiftOp & <NUM_LIT> ; if ( isASR ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << ( Amt == <NUM_LIT> ? <NUM_LIT> : Amt ) << markup ( <STR_LIT> ) ; } else if ( Amt ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Amt << markup ( <STR_LIT> ) ; }


<s> O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << ( Amt == <NUM_LIT> ? <NUM_LIT> : Amt ) << markup ( <STR_LIT> ) ; } else if ( Amt ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Amt << markup ( <STR_LIT> ) ; }


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; printRegName ( O , MO1 . getReg ( ) ) ; printRegImmShift ( O , <STR_LIT> ( MO2 . getImm ( ) ) , <STR_LIT> ( MO2 . getImm ( ) ) , UseMarkup ) ;


<s>
const
MCOperand
&
MO2
=
MI
->
getOperand
(
OpNum
+
<NUM_LIT>
)
;
const
MCOperand
&
MO3
=
MI
->
getOperand
(
OpNum
+
<NUM_LIT>
)
;
printRegName
(
O
,
MO1
.
getReg
(
)
)
;
<STR_LIT>
ShOpc
=
<STR_LIT>
(
MO3
.
getImm
(
)
)
;
O
<<
<STR_LIT>
<<
<STR_LIT>
(
ShOpc
)
;
if
(
ShOpc
==
<STR_LIT>
)
return
;
O
<<
' '
;


<s> printRegName ( O , MO1 . getReg ( ) ) ; if ( MO2 . getImm ( ) ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( MO2 . getImm ( ) * <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; O << <STR_LIT> << markup ( <STR_LIT> ) ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else O << <STR_LIT> << OffImm ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; O << <STR_LIT> << markup ( <STR_LIT> ) ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else O << <STR_LIT> << OffImm ; O << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm8Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << - OffImm << markup ( <STR_LIT> ) ; } else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) {

O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << OffImm << markup ( <STR_LIT> ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ;

O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << - OffImm << markup ( <STR_LIT> ) ;

} else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) {


<s> printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << - OffImm << markup ( <STR_LIT> ) ; } else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) {


<s> printRegName ( O , MO2 . getReg ( ) ) ; unsigned ShAmt = MO3 . getImm ( ) ; if ( ShAmt ) { assert ( ShAmt <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << ShAmt << markup ( <STR_LIT> ) ; } O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printT2SOOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;


<s> printThumbAddrModeImm5SOperand ( MI , Op , O , <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeImm5S4Operand ( const MCInst * MI , unsigned Op , raw_ostream & O ) { printThumbAddrModeImm5SOperand ( MI , Op , O , <NUM_LIT> ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeImm5SOperand ( const MCInst * MI , unsigned Op , raw_ostream & O , unsigned Scale ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = MO2 . getImm ( ) ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( ImmOffs * Scale ) << markup ( <STR_LIT> ) ; }


<s> } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( unsigned RegNum = MO2 . getReg ( ) ) { O << <STR_LIT> ; printRegName ( O , RegNum ) ; }


<s> for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) { bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == CondBit0 ; if ( T ) O << 't' ;


<s> void <ISA_LIT>InstPrinter :: printThumbITMask ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Mask = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned Firstcond = MI -> getOperand ( OpNum - <NUM_LIT> ) . getImm ( ) ; unsigned CondBit0 = Firstcond & <NUM_LIT> ; unsigned NumTZ = countTrailingZeros ( Mask ) ; assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ;

for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) {


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; if ( MO1 . isExpr ( ) ) { O << * MO1 . getExpr ( ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( - OffImm ) << markup ( <STR_LIT> ) ; } else { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( OffImm ) << markup ( <STR_LIT> ) ; } O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( ( Imm == <NUM_LIT> ? <NUM_LIT> : Imm ) ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorIndex ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorIndex ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFour ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListOne ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printVectorListOne ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ;


printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ; printRegName ( O , Reg1 ) ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListTwo ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ; printRegName ( O , Reg1 ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListTwoAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListTwoSpaced ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ; printRegName ( O , Reg1 ) ;


<s> unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ;


<s> if ( imm == <NUM_LIT> ) return <NUM_LIT> ;


<s> static unsigned translateShiftImm ( unsigned imm ) { assert ( ( imm & ~ <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ;

if ( imm == <NUM_LIT> ) return <NUM_LIT> ;


<s> } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getNumOperands ( ) > <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) ; O << <STR_LIT> ; printAnnotation ( O , Annot ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> ) { bool Writeback = true ; unsigned BaseReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; for ( unsigned i = <NUM_LIT> ; i < MI -> getNumOperands ( ) ; ++ i ) { if ( MI -> getOperand ( i ) . getReg ( ) == BaseReg ) Writeback = false ; } O << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegName ( O , BaseReg ) ; if ( Writeback ) O << <STR_LIT> ; O << <STR_LIT> ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ) { const MCRegisterClass & MRC = MRI . getRegClass ( <STR_LIT> ) ; bool isStore = Opcode == <STR_LIT> || Opcode == <STR_LIT> ; unsigned Reg = MI -> getOperand ( isStore ? <NUM_LIT> : <NUM_LIT> ) . getReg ( ) ;


<s> printRegName ( O , Reg ) ; } else if ( Op . isImm ( ) ) { O << markup ( <STR_LIT> ) << '#' << formatImm ( Op . getImm ( ) ) << markup ( <STR_LIT> ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; const MCConstantExpr * BranchTarget = dyn_cast < MCConstantExpr > ( Op . getExpr ( ) ) ; int64_t Address ; if ( BranchTarget && BranchTarget -> EvaluateAsAbsolute ( Address ) ) { O << <STR_LIT> ; O . write_hex ( ( uint32_t ) Address ) ; }


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { unsigned Reg = Op . getReg ( ) ; printRegName ( O , Reg ) ; } else if ( Op . isImm ( ) ) { O << markup ( <STR_LIT> ) << '#' << formatImm ( Op . getImm ( ) ) << markup ( <STR_LIT> ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; const MCConstantExpr * BranchTarget = dyn_cast < MCConstantExpr > ( Op . getExpr ( ) ) ; int64_t Address ; if ( BranchTarget && BranchTarget -> EvaluateAsAbsolute ( Address ) ) {


<s> unsigned IdxMode = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( IdxMode == <STR_LIT> ) { printAM3PostIndexOp ( MI , Op , O ) ; return ; }

printAM3PreOrOffsetIndexOp ( MI , Op , O ) ;


<s> printRegName ( O , MO1 . getReg ( ) ) ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Op = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( ImmOffs || Op == <STR_LIT> ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> << markup ( <STR_LIT> ) ; }


<s> printRegName ( O , MO1 . getReg ( ) ) ; if ( MO2 . getImm ( ) ) { O << <STR_LIT> << ( MO2 . getImm ( ) << <NUM_LIT> ) ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ;


<s> if ( MO2 . getReg ( ) ) { O << <STR_LIT> << getAddrOpcStr ( <STR_LIT> ( MO3 . getImm ( ) ) ) ; printRegName ( O , MO2 . getReg ( ) ) ; O << ']' << markup ( <STR_LIT> ) ; return ; } unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> op = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( ImmOffs || ( op == <STR_LIT> ) ) {

O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <STR_LIT> ( op ) << ImmOffs << markup ( <STR_LIT> ) ;


<s> O << markup ( <STR_LIT> ) << '#' << lsb << markup ( <STR_LIT> ) << <STR_LIT> << markup ( <STR_LIT> ) << '#' << width << markup ( <STR_LIT> ) ;


<s> int32_t width = ( <NUM_LIT> - CountLeadingZeros_32 ( v ) ) - lsb ; assert ( MO . isImm ( ) && <STR_LIT> ) ; O << markup ( <STR_LIT> ) << '#' << lsb << markup ( <STR_LIT> ) << <STR_LIT> << markup ( <STR_LIT> ) << '#' << width << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printImmPlusOneOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> assert ( Op . isExpr ( ) && <STR_LIT> ) ; const MCConstantExpr * BranchTarget = dyn_cast < MCConstantExpr > ( Op . getExpr ( ) ) ; int64_t Address ; if ( BranchTarget && BranchTarget -> EvaluateAsAbsolute ( Address ) ) { O << <STR_LIT> ; O . write_hex ( ( uint32_t ) Address ) ; }


<s> O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << MO2 . getImm ( ) * <NUM_LIT> << markup ( <STR_LIT> ) ; }


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm8Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; if ( OffImm != <NUM_LIT> ) O << <STR_LIT> ; if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm ; if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ;


<s> assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm != <NUM_LIT> ) O << <STR_LIT> ; if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ;

else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ;


<s> int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm != <NUM_LIT> ) O << <STR_LIT> ;

if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm != <NUM_LIT> ) O << <STR_LIT> ;


<s> if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm ; if ( OffImm != <NUM_LIT> && UseMarkup ) O << <STR_LIT> ;


<s> printOperand ( MI , Op , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ;

if ( unsigned ImmOffs = MO2 . getImm ( ) ) {


<s> assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) { bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == CondBit0 ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << markup ( <STR_LIT> ) << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << markup ( <STR_LIT> ) << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; O << markup ( <STR_LIT> ) << <STR_LIT> << ( Imm == <NUM_LIT> ? <NUM_LIT> : Imm ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printMSRMaskOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNum ) ; const FeatureBitset & FeatureBits = STI . getFeatureBits ( ) ; if ( FeatureBits [ <STR_LIT> ] ) { unsigned SYSm = Op . getImm ( ) & <NUM_LIT> ; unsigned Opcode = MI -> getOpcode ( ) ; if ( Opcode == <STR_LIT> && FeatureBits [ <STR_LIT> ] ) { auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg && TheReg -> isInRequiredFeatures ( { <STR_LIT> } ) ) { O << TheReg -> Name ; return ; } } SYSm &= <NUM_LIT> ; if ( Opcode == <STR_LIT> && FeatureBits [ <STR_LIT> ] ) { auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg ) { O << TheReg -> Name ; return ;


<s> O << TheReg -> Name ; return ; } } auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg ) { O << TheReg -> Name ; return ; } llvm_unreachable ( <STR_LIT> ) ; return ; } unsigned SpecRegRBit = Op . getImm ( ) >> <NUM_LIT> ; unsigned Mask = Op . getImm ( ) & <NUM_LIT> ; if ( ! SpecRegRBit && ( Mask == <NUM_LIT> || Mask == <NUM_LIT> || Mask == <NUM_LIT> ) ) { O << <STR_LIT> ; switch ( Mask ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ;


<s> printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> ) { const MCOperand & Dst = MI -> getOperand ( <NUM_LIT> ) ; const MCOperand & MO1 = MI -> getOperand ( <NUM_LIT> ) ; const MCOperand & MO2 = MI -> getOperand ( <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( <NUM_LIT> ) ; O << '\t' << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) ; printSBitModifierOperand ( MI , <NUM_LIT> , O ) ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegName ( O , Dst . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MO2 . getReg ( ) ) ; assert ( <STR_LIT> ( MO3 . getImm ( ) ) == <NUM_LIT> ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> ) { const MCOperand & Dst = MI -> getOperand ( <NUM_LIT> ) ; const MCOperand & MO1 = MI -> getOperand ( <NUM_LIT> ) ; const MCOperand & MO2 = MI -> getOperand ( <NUM_LIT> ) ; O << '\t' << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) ; printSBitModifierOperand ( MI , <NUM_LIT> , O ) ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegName ( O , Dst . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( <STR_LIT> ( MO2 . getImm ( ) ) == <STR_LIT> ) { printAnnotation ( O , Annot ) ; return ; } O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << translateShiftImm ( <STR_LIT> ( MO2 . getImm ( ) ) ) << markup ( <STR_LIT> ) ; printAnnotation ( O , Annot ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getNumOperands ( ) > <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getImm ( ) == - <NUM_LIT> ) { O << '\t' << <STR_LIT> ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . getReg ( ) ) { unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; O << '#' << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs ;


<s> if ( <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> ( MO3 . getImm ( ) ) ; O << <STR_LIT> ; return ; } O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) ;

if ( unsigned ShImm = <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> << ShImm ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( MO1 . getReg ( ) ) { O << ( char ) <STR_LIT> ( MO2 . getImm ( ) ) << getRegisterName ( MO1 . getReg ( ) ) ; return ; }

unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printAddrMode3Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << '[' << getRegisterName ( MO1 . getReg ( ) ) ;


<s> O << '[' << getRegisterName ( MO1 . getReg ( ) ) ; if ( MO2 . getReg ( ) ) { O << <STR_LIT> << ( char ) <STR_LIT> ( MO3 . getImm ( ) ) << getRegisterName ( MO2 . getReg ( ) ) << ']' ; return ; }

if ( unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << ImmOffs ;


<s> if ( Modifier && strcmp ( Modifier , <STR_LIT> ) == <NUM_LIT> ) { O << <STR_LIT> ( Mode ) ; } else if ( Modifier && strcmp ( Modifier , <STR_LIT> ) == <NUM_LIT> ) { <STR_LIT> Mode = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( Mode == <STR_LIT> ) O << <STR_LIT> ; } else {


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; <STR_LIT> Mode = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( Modifier && strcmp ( Modifier , <STR_LIT> ) == <NUM_LIT> ) {


<s> } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ) {

O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> ;


<s> printOperand ( MI , OpNum , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ) { O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> ; }


<s> if ( MO . getReg ( ) == <NUM_LIT> ) O << <STR_LIT> ;

else O << <STR_LIT> << getRegisterName ( MO . getReg ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printAddrMode6Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;

O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ;


<s> O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( MO2 . getImm ( ) ) { O << <STR_LIT> << ( MO2 . getImm ( ) << <NUM_LIT> ) ; }


<s> void <ISA_LIT>InstPrinter :: printAddrModePCOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O , const char * Modifier ) { assert ( <NUM_LIT> && <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printBitfieldInvMaskImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; uint32_t v = ~ MO . getImm ( ) ;

int32_t lsb = CountTrailingZeros_32 ( v ) ;


<s> void <ISA_LIT>InstPrinter :: printCPInstOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O , const char * Modifier ) {


<s> const MCOperand & Op = MI -> getOperand ( OpNum ) ; O << '#' ;

if ( Op . getImm ( ) < <NUM_LIT> ) O << '-' << ( - Op . getImm ( ) - <NUM_LIT> ) ;


<s> uint64_t Val = <STR_LIT> ( EncodedImm , EltBits ) ; O << <STR_LIT> << utohexstr ( Val ) ;


<s> assert ( <NUM_LIT> ) ; } else if ( Modifier && strcmp ( Modifier , <STR_LIT> ) == <NUM_LIT> ) { assert ( <NUM_LIT> ) ; } else { O << getRegisterName ( Reg ) ; } } else if ( Op . isImm ( ) ) { assert ( ( Modifier && ! strcmp ( Modifier , <STR_LIT> ) ) || ( ( Modifier == <NUM_LIT> || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ) ; O << '#' << Op . getImm ( ) ; } else { if ( Modifier && Modifier [ <NUM_LIT> ] != <NUM_LIT> && strcmp ( Modifier , <STR_LIT> ) != <NUM_LIT> ) llvm_unreachable ( <STR_LIT> ) ;

assert ( Op . isExpr ( ) && <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printPCLabel ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printPCLabel ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { abort ( ) ;


<s> void <ISA_LIT>InstPrinter :: printPredicateOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { <STR_LIT> CC = ( <STR_LIT> ) MI -> getOperand ( OpNum ) . getImm ( ) ; if ( CC != <STR_LIT> ) O << <ISA_LIT>CondCodeToString ( CC ) ;


<s> if ( i != OpNum ) O << <STR_LIT> ; O << getRegisterName ( MI -> getOperand ( i ) . getReg ( ) ) ; } O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printRegisterList ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) {


<s>
O
<<
<STR_LIT>
<<
Imm
<<
<STR_LIT>
<<
Rot
;
if
(
VerboseAsm
)
O
<<
' '
<<
MAI
->
getCommentString
(
)
<<
' '
<<
(
int
)
<STR_LIT>
(
Imm
,
Rot
)
;
}
else
{


<s> void <ISA_LIT>InstPrinter :: printSOImm2PartOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { abort ( ) ;


<s> void <ISA_LIT>InstPrinter :: printSOImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ;

printSOImm ( O , MO . getImm ( ) , VerboseAsm , & MAI ) ;


<s>
if
(
MO2
.
getReg
(
)
)
{
O
<<
' '
<<
getRegisterName
(
MO2
.
getReg
(
)
)
;
assert
(
<STR_LIT>
(
MO3
.
getImm
(
)
)
==
<NUM_LIT>
)
;
}
else
if
(
ShOpc
!=
<STR_LIT>
)
{
O
<<
<STR_LIT>
<<
<STR_LIT>
(
MO3
.
getImm
(
)
)
;


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm12Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; unsigned OffImm = MO2 . getImm ( ) ;

if ( OffImm ) O << <STR_LIT> << OffImm ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm8OffsetOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ;

else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ;


<s> if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm * <NUM_LIT> ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm * <NUM_LIT> ;


<s> if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm * <NUM_LIT> ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm * <NUM_LIT> ; O << <STR_LIT> ;


<s> const MCOperand & MO3 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; assert ( MO2 . getReg ( ) && <STR_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO2 . getReg ( ) ) ;


<s> O << getRegisterName ( Reg ) ; assert ( MO2 . isImm ( ) && <STR_LIT> ) ; <STR_LIT> ShOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; O << <STR_LIT> << <STR_LIT> ( ShOpc ) ; if ( ShOpc != <STR_LIT> ) O << <STR_LIT> << <STR_LIT> ( MO2 . getImm ( ) ) ;


<s> if ( MI -> getOpcode ( ) == <STR_LIT> ) O << <STR_LIT> ;


<s> O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) ; if ( MI -> getOpcode ( ) == <STR_LIT> ) O << <STR_LIT> ; O << ']' ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeRI5Operand ( const MCInst * MI , unsigned Op , raw_ostream & O , unsigned Scale ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( MO3 . getReg ( ) ) O << <STR_LIT> << getRegisterName ( MO3 . getReg ( ) ) ; else if ( unsigned ImmOffs = MO2 . getImm ( ) ) O << <STR_LIT> << ImmOffs * Scale ;


<s> O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ;

O << <STR_LIT> << getRegisterName ( MO2 . getReg ( ) ) << <STR_LIT> ;


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ;

const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeS1Operand ( const MCInst * MI , unsigned Op , raw_ostream & O ) { printThumbAddrModeRI5Operand ( MI , Op , O , <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeS2Operand ( const MCInst * MI , unsigned Op , raw_ostream & O ) {

printThumbAddrModeRI5Operand ( MI , Op , O , <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeSPOperand ( const MCInst * MI , unsigned Op , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = MO2 . getImm ( ) ) O << <STR_LIT> << ImmOffs * <NUM_LIT> ; O << <STR_LIT> ;


<s> unsigned CondBit0 = Mask >> <NUM_LIT> & <NUM_LIT> ; unsigned NumTZ = CountTrailingZeros_32 ( Mask ) ; assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) { bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == CondBit0 ; if ( T ) O << 't' ;


<s> O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVFPf32ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << '#' << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printVFPf64ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << '#' << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> uint32_t Banked = MI -> getOperand ( OpNum ) . getImm ( ) ; uint32_t R = ( Banked & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t SysM = Banked & <NUM_LIT> ; if ( R ) { O << <STR_LIT> ; switch ( SysM ) { case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ;


<s> void <ISA_LIT>InstPrinter :: printBankedRegOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { uint32_t Banked = MI -> getOperand ( OpNum ) . getImm ( ) ; uint32_t R = ( Banked & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t SysM = Banked & <NUM_LIT> ; if ( R ) { O << <STR_LIT> ; switch ( SysM ) { case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; default : llvm_unreachable ( <STR_LIT> ) ; } } assert ( ! R && <STR_LIT> ) ; const char * RegNames [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ;


<s> case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } SYSm &= <NUM_LIT> ; if ( Opcode == <STR_LIT> && FeatureBits [ <STR_LIT> ] ) { switch ( SYSm ) { case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } switch ( SYSm ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ;


<s> return getInstructionName ( Opcode ) ;


<s> StringRef <ISA_LIT>InstPrinter :: getOpcodeName ( unsigned Opcode ) const {


<s> O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ) { O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> ; }


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printAddrModeImm12Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) O << <STR_LIT> << - OffImm ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printAddrModeImm12Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , O ) ; return ;


<s> unsigned IFlags = Op . getImm ( ) ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; -- i ) if ( IFlags & ( <NUM_LIT> << i ) ) O << <STR_LIT> ( <NUM_LIT> << i ) ;


<s> const MCOperand & Op = MI -> getOperand ( OpNum ) ; unsigned IFlags = Op . getImm ( ) ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; -- i ) if ( IFlags & ( <NUM_LIT> << i ) ) O << <STR_LIT> ( <NUM_LIT> << i ) ;


<s> if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; return ; } printInstruction ( MI , O ) ;


<s> if ( Op . isReg ( ) ) { unsigned Reg = Op . getReg ( ) ; O << getRegisterName ( Reg ) ; } else if ( Op . isImm ( ) ) { O << '#' << Op . getImm ( ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; O << * Op . getExpr ( ) ; }


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNo ) ;


<s> V = <STR_LIT> ( V ) ; assert ( V != - <NUM_LIT> && <STR_LIT> ) ; unsigned Imm = <STR_LIT> ( V ) ; unsigned Rot = <STR_LIT> ( V ) ; if ( Rot ) { O << <STR_LIT> << Imm << <STR_LIT> << Rot ; if ( CommentStream ) * CommentStream << ( int ) <STR_LIT> ( Imm , Rot ) << <STR_LIT> ; } else {


<s> const MCOperand & MO = MI -> getOperand ( OpNum ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; printSOImm ( O , MO . getImm ( ) , CommentStream , & MAI ) ;


<s> if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = MO2 . getImm ( ) ) O << <STR_LIT> << ImmOffs * Scale ;


<s> const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) {


<s> const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned RegNum = MO2 . getReg ( ) ) O << <STR_LIT> << getRegisterName ( RegNum ) ;


<s> } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( unsigned RegNum = MO2 . getReg ( ) ) O << <STR_LIT> << getRegisterName ( RegNum ) ;


<s> O << '#' ; if ( MO . isFPImm ( ) ) { O << ( float ) MO . getFPImm ( ) ; } else { union { uint32_t I ; float F ; } FPUnion ; FPUnion . I = MO . getImm ( ) ; O << FPUnion . F ; }


<s> union { uint64_t I ; double D ; } FPUnion ; FPUnion . I = MO . getImm ( ) ; O << FPUnion . D ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI ) : MCInstPrinter ( MAI ) {


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , O ) ; return ; } const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; unsigned IdxMode = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( IdxMode == <STR_LIT> ) { printAM2PostIndexOp ( MI , Op , O ) ; return ;


<s> void <ISA_LIT>InstPrinter :: printAddrMode3OffsetOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( MO1 . getReg ( ) ) { O << getAddrOpcStr ( <STR_LIT> ( MO2 . getImm ( ) ) ) << getRegisterName ( MO1 . getReg ( ) ) ;


<s> if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , O ) ; return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Op = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( ImmOffs || Op == <STR_LIT> ) { O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> ; } O << <STR_LIT> ;


<s> unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Op = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( ImmOffs || Op == <STR_LIT> ) { O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs * <NUM_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printAddrModeTBB ( const MCInst * MI , unsigned Op , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ;


<s> const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ;

O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) << <STR_LIT> << getRegisterName ( MO2 . getReg ( ) ) << <STR_LIT> ;


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) << <STR_LIT> << getRegisterName ( MO2 . getReg ( ) ) << <STR_LIT> ;


<s> const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) << <STR_LIT> ; if ( ! MO2 . getReg ( ) ) { unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; O << '#' << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << ImmOffs ;


<s> void <ISA_LIT>InstPrinter :: printAM2PreOrOffsetIndexOp ( const MCInst * MI , unsigned Op , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> ( MO3 . getImm ( ) ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> ( MO3 . getImm ( ) ) ; O << <STR_LIT> ; return ; } O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) ; if ( unsigned ShImm = <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> << ShImm ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printAM3PostIndexOp ( const MCInst * MI , unsigned Op , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) << <STR_LIT> ; if ( MO2 . getReg ( ) ) { O << ( char ) <STR_LIT> ( MO3 . getImm ( ) ) << getRegisterName ( MO2 . getReg ( ) ) ; return ; } unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ;

O << '#' << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << ImmOffs ;


<s> O << <STR_LIT> << getAddrOpcStr ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) << ']' ; return ; } if ( unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << ImmOffs ;


<s> const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << '[' << getRegisterName ( MO1 . getReg ( ) ) ;


<s> O << <STR_LIT> << <NUM_LIT> - MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printFBits32 ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << <NUM_LIT> - MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printImmPlusOneOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; O << <STR_LIT> << Imm + <NUM_LIT> ;


<s> return ; } O << <STR_LIT> << translateShiftImm ( <STR_LIT> ( MO2 . getImm ( ) ) ) ; printAnnotation ( O , Annot ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getNumOperands ( ) > <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getImm ( ) == - <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << <STR_LIT> << getRegisterName ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) << <STR_LIT> ; printAnnotation ( O , Annot ) ; return ; } if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getNumOperands ( ) > <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; if ( Opcode == <STR_LIT> ) O << <STR_LIT> ; O << '\t' ; printRegisterList ( MI , <NUM_LIT> , O ) ; printAnnotation ( O , Annot ) ; return ; } if ( Opcode == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> && MI -> getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { O << '\t' << <STR_LIT> ; printPredicateOperand ( MI , <NUM_LIT> , O ) ; O << <STR_LIT> << getRegisterName ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) << <STR_LIT> ; printAnnotation ( O , Annot ) ; return ; }

if ( ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) {


<s> void <ISA_LIT>InstPrinter :: printNEONModImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned EncodedImm = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> if ( Op . isReg ( ) ) { unsigned Reg = Op . getReg ( ) ; O << getRegisterName ( Reg ) ; } else if ( Op . isImm ( ) ) { O << '#' << Op . getImm ( ) ; } else { assert ( Op . isExpr ( ) && <STR_LIT> ) ; const MCConstantExpr * BranchTarget = dyn_cast < MCConstantExpr > ( Op . getExpr ( ) ) ; int64_t Address ;

if ( BranchTarget && BranchTarget -> EvaluateAsAbsolute ( Address ) ) {


<s> void <ISA_LIT>InstPrinter :: printPKHASRShiftImm ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) Imm = <NUM_LIT> ; assert ( Imm > <NUM_LIT> && Imm <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << Imm ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> unsigned Imm = MO . getImm ( ) ; O << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( Imm & <NUM_LIT> ) ;


<s> const MCOperand & MO = MI -> getOperand ( OpNum ) ; unsigned Imm = MO . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printPostIdxImm8s4Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; unsigned Imm = MO . getImm ( ) ; O << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( ( Imm & <NUM_LIT> ) << <NUM_LIT> ) ;


<s> O << ( MO2 . getImm ( ) ? <STR_LIT> : <STR_LIT> ) << getRegisterName ( MO1 . getReg ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printRegName ( raw_ostream & OS , unsigned RegNo ) const { OS << getRegisterName ( RegNo ) ;


<s> if ( Imm == <NUM_LIT> ) return ; O << <STR_LIT> ; switch ( Imm ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ; case <NUM_LIT> : O << <STR_LIT> ; break ; }


<s> if ( isASR ) O << <STR_LIT> << ( Amt == <NUM_LIT> ? <NUM_LIT> : Amt ) ; else if ( Amt ) O << <STR_LIT> << Amt ;


<s> void <ISA_LIT>InstPrinter :: printSORegImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << getRegisterName ( MO1 . getReg ( ) ) ;

<STR_LIT> ShOpc = <STR_LIT> ( MO2 . getImm ( ) ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << getRegisterName ( MO1 . getReg ( ) ) ; <STR_LIT> ShOpc = <STR_LIT> ( MO3 . getImm ( ) ) ; O << <STR_LIT> << <STR_LIT> ( ShOpc ) ;


<s> O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ;

if ( MO2 . getImm ( ) ) O << <STR_LIT> << MO2 . getImm ( ) * <NUM_LIT> ;


<s> if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ;


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm8Operand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ;

else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ;

int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ;


<s> int32_t OffImm = ( int32_t ) MO1 . getImm ( ) / <NUM_LIT> ; if ( OffImm != <NUM_LIT> ) { O << <STR_LIT> ;

if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm * <NUM_LIT> ;


<s> if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm * <NUM_LIT> ;

else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm * <NUM_LIT> ;


<s> return ; } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) / <NUM_LIT> ;


<s> else if ( MO1 . isImm ( ) ) O << <STR_LIT> << MO1 . getImm ( ) << <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ;


<s> O << getRegisterName ( Reg ) ; assert ( MO2 . isImm ( ) && <STR_LIT> ) ; <STR_LIT> ShOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; O << <STR_LIT> << <STR_LIT> ( ShOpc ) ; if ( ShOpc != <STR_LIT> ) O << <STR_LIT> << translateShiftImm ( <STR_LIT> ( MO2 . getImm ( ) ) ) ;


<s> assert ( MO2 . isImm ( ) && <STR_LIT> ) ; <STR_LIT> ShOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; O << <STR_LIT> << <STR_LIT> ( ShOpc ) ;

if ( ShOpc != <STR_LIT> ) O << <STR_LIT> << translateShiftImm ( <STR_LIT> ( MO2 . getImm ( ) ) ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ;


<s> O << <STR_LIT> << ( Imm == <NUM_LIT> ? <NUM_LIT> : Imm ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFour ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFour ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFourAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printVectorListFourSpaced ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printVectorListFourSpacedAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFourSpacedAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printVectorListOne ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> ;


<s> O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListOneAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {


<s> O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListThree ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListThreeAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListThreeSpaced ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

O << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> << getRegisterName ( MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) << <STR_LIT> ;


<s> unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ;

O << <STR_LIT> << getRegisterName ( Reg0 ) << <STR_LIT> << getRegisterName ( Reg1 ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListTwoAllLanes ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ;


<s> unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ;


<s> unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> << getRegisterName ( Reg0 ) << <STR_LIT> << getRegisterName ( Reg1 ) << <STR_LIT> ;


<s> if ( imm == <NUM_LIT> ) return <NUM_LIT> ;


<s> static unsigned translateShiftImm ( unsigned imm ) { if ( imm == <NUM_LIT> ) return <NUM_LIT> ;


<s> <ISA_LIT>InstPrinter :: <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> } O << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) ; printRegName ( O , MO1 . getReg ( ) ) ;

printRegImmShift ( O , <STR_LIT> ( MO2 . getImm ( ) ) , <STR_LIT> ( MO2 . getImm ( ) ) , UseMarkup ) ;


<s> if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , STI , O ) ; return ; } const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ;

unsigned IdxMode = <STR_LIT> ( MO3 . getImm ( ) ) ;


<s> unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; O << markup ( <STR_LIT> ) << '#' << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs << markup ( <STR_LIT> ) ;


<s> O << getAddrOpcStr ( <STR_LIT> ( MO2 . getImm ( ) ) ) ; printRegName ( O , MO1 . getReg ( ) ) ; return ; } unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ;

O << markup ( <STR_LIT> ) << '#' << <STR_LIT> ( <STR_LIT> ( MO2 . getImm ( ) ) ) << ImmOffs << markup ( <STR_LIT> ) ;


<s> assert ( <STR_LIT> ( MI -> getOperand ( Op + <NUM_LIT> ) . getImm ( ) ) != <STR_LIT> && <STR_LIT> ) ;

printAM3PreOrOffsetIndexOp ( MI , Op , O , AlwaysPrintImm0 ) ;


<s> printOperand ( MI , OpNum , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Op = <STR_LIT> ( MO2 . getImm ( ) ) ;

if ( AlwaysPrintImm0 || ImmOffs || Op == <STR_LIT> ) {


<s> void <ISA_LIT>InstPrinter :: printAddrMode5Operand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; <STR_LIT> Op = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( AlwaysPrintImm0 || ImmOffs || Op == <STR_LIT> ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <STR_LIT> ( Op ) << ImmOffs * <NUM_LIT> << markup ( <STR_LIT> ) ;


<s> if ( MO . getReg ( ) == <NUM_LIT> ) O << <STR_LIT> ; else { O << <STR_LIT> ; printRegName ( O , MO . getReg ( ) ) ;


<s> printRegName ( O , MO1 . getReg ( ) ) ; if ( MO2 . getImm ( ) ) { O << <STR_LIT> << ( MO2 . getImm ( ) << <NUM_LIT> ) ; }

O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printAddrMode7Operand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printAddrMode7Operand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( - OffImm ) << markup ( <STR_LIT> ) ; } else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( OffImm ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printAddrModeTBB ( const MCInst * MI , unsigned Op , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ;

const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ;


<s> O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MO2 . getReg ( ) ) ;


<s> O << <STR_LIT> ; printRegName ( O , MO2 . getReg ( ) ) ;

O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printAdrLabelOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; if ( MO . isExpr ( ) ) { MO . getExpr ( ) -> print ( O , & MAI ) ; return ; } int32_t OffImm = ( int32_t ) MO . getImm ( ) << scale ; O << markup ( <STR_LIT> ) ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else O << <STR_LIT> << OffImm ; O << markup ( <STR_LIT> ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( MO3 . getImm ( ) ) ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> ( MO3 . getImm ( ) ) << markup ( <STR_LIT> ) ; } O << <STR_LIT> << markup ( <STR_LIT> ) ; return ; } O << <STR_LIT> ; O << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) ; printRegName ( O , MO2 . getReg ( ) ) ; printRegImmShift ( O , <STR_LIT> ( MO3 . getImm ( ) ) , <STR_LIT> ( MO3 . getImm ( ) ) , UseMarkup ) ; O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << markup ( <STR_LIT> ) << '[' ; printRegName ( O , MO1 . getReg ( ) ) ; if ( MO2 . getReg ( ) ) { O << <STR_LIT> << getAddrOpcStr ( <STR_LIT> ( MO3 . getImm ( ) ) ) ; printRegName ( O , MO2 . getReg ( ) ) ; O << ']' << markup ( <STR_LIT> ) ; return ; } unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> op = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( AlwaysPrintImm0 || ImmOffs || ( op == <STR_LIT> ) ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <STR_LIT> ( op ) << ImmOffs << markup ( <STR_LIT> ) ; }


<s> auto TheReg = <STR_LIT> ( Banked ) ; assert ( TheReg && <STR_LIT> ) ; std :: string Name = TheReg -> Name ; uint32_t isSPSR = ( Banked & <NUM_LIT> ) >> <NUM_LIT> ; if ( isSPSR ) Name . replace ( <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; O << Name ;


<s> void <ISA_LIT>InstPrinter :: printBitfieldInvMaskImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; uint32_t v = ~ MO . getImm ( ) ; int32_t lsb = countTrailingZeros ( v ) ;

int32_t width = ( <NUM_LIT> - countLeadingZeros ( v ) ) - lsb ;


<s> void <ISA_LIT>InstPrinter :: printCImmediate ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printCImmediate ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> unsigned Val = MI -> getOperand ( OpNo ) . getImm ( ) ;

O << <STR_LIT> << ( Val * Angle ) + Remainder ;


<s> void <ISA_LIT>InstPrinter :: printCoprocOptionImm ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) << <STR_LIT> ;


<s> const MCOperand & Op = MI -> getOperand ( OpNum ) ; unsigned IFlags = Op . getImm ( ) ;

for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; -- i ) if ( IFlags & ( <NUM_LIT> << i ) ) O << <STR_LIT> ( <NUM_LIT> << i ) ;


<s> void <ISA_LIT>InstPrinter :: printFBits16 ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << markup ( <STR_LIT> ) << <STR_LIT> << <NUM_LIT> - MI -> getOperand ( OpNum ) . getImm ( ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printFBits32 ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

O << markup ( <STR_LIT> ) << <STR_LIT> << <NUM_LIT> - MI -> getOperand ( OpNum ) . getImm ( ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printFPImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; O << markup ( <STR_LIT> ) << '#' << <STR_LIT> ( MO . getImm ( ) ) << markup ( <STR_LIT> ) ;


<s> printRegName ( O , MRI . getSubReg ( Reg , <STR_LIT> ) ) ; O << <STR_LIT> ; printRegName ( O , MRI . getSubReg ( Reg , <STR_LIT> ) ) ;


<s> O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( Imm + <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> unsigned val = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printLdStmModeOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { <STR_LIT> Mode = <STR_LIT> ( MI -> getOperand ( OpNum ) . getImm ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printLdStmModeOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

<STR_LIT> Mode = <STR_LIT> ( MI -> getOperand ( OpNum ) . getImm ( ) ) ;


<s> <STR_LIT> CC = ( <STR_LIT> ) MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> unsigned val = MI -> getOperand ( OpNum ) . getImm ( ) ; O << <STR_LIT> ( val , STI . getFeatureBits ( ) [ <STR_LIT> ] ) ;


<s> void <ISA_LIT>InstPrinter :: printMemBOption ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

unsigned val = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printModImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { MCOperand Op = MI -> getOperand ( OpNum ) ; if ( Op . isExpr ( ) ) return printOperand ( MI , OpNum , STI , O ) ; unsigned Bits = Op . getImm ( ) & <NUM_LIT> ; unsigned Rot = ( Op . getImm ( ) & <NUM_LIT> ) >> <NUM_LIT> ;


<s> auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg && TheReg -> isInRequiredFeatures ( { <STR_LIT> } ) ) { O << TheReg -> Name ; return ; } } SYSm &= <NUM_LIT> ; if ( Opcode == <STR_LIT> && FeatureBits [ <STR_LIT> ] ) { auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg ) { O << TheReg -> Name ; return ; } } auto TheReg = <STR_LIT> ( SYSm ) ; if ( TheReg ) { O << TheReg -> Name ; return ; } O << SYSm ; return ; } unsigned SpecRegRBit = Op . getImm ( ) >> <NUM_LIT> ; unsigned Mask = Op . getImm ( ) & <NUM_LIT> ; if ( ! SpecRegRBit && ( Mask == <NUM_LIT> || Mask == <NUM_LIT> || Mask == <NUM_LIT> ) ) { O << <STR_LIT> ; switch ( Mask ) { default :


<s> void <ISA_LIT>InstPrinter :: printNEONModImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { unsigned EncodedImm = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned EltBits ;

uint64_t Val = <STR_LIT> ( EncodedImm , EltBits ) ;


<s> void <ISA_LIT>InstPrinter :: printNoHashImmediate ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {

O << MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> switch ( Expr -> getKind ( ) ) { case MCExpr :: Binary : O << '#' ; Expr -> print ( O , & MAI ) ; break ; case MCExpr :: Constant : { const MCConstantExpr * Constant = cast < MCConstantExpr > ( Expr ) ; int64_t TargetAddress ; if ( ! Constant -> evaluateAsAbsolute ( TargetAddress ) ) { O << '#' ; Expr -> print ( O , & MAI ) ; } else { O << <STR_LIT> ; O . write_hex ( static_cast < uint32_t > ( TargetAddress ) ) ; } break ; } default : Expr -> print ( O , & MAI ) ; break ;


<s> void <ISA_LIT>InstPrinter :: printPCLabel ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {


<s> void <ISA_LIT>InstPrinter :: printPImmediate ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) {


<s> assert ( Imm > <NUM_LIT> && Imm <= <NUM_LIT> && <STR_LIT> ) ;

O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Imm << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printPKHLSLShiftImm ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) return ; assert ( Imm > <NUM_LIT> && Imm < <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << Imm << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MO . getImm ( ) ; O << markup ( <STR_LIT> ) << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( Imm & <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printPostIdxImm8Operand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ;


<s> O << markup ( <STR_LIT> ) << '#' << ( ( Imm & <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ) << ( ( Imm & <NUM_LIT> ) << <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printPostIdxRegOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;

O << ( MO2 . getImm ( ) ? <STR_LIT> : <STR_LIT> ) ;


<s> const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;


<s> if ( ( unsigned ) CC == <NUM_LIT> ) O << <STR_LIT> ; else if ( CC != <STR_LIT> ) O << <ISA_LIT>CondCodeToString ( CC ) ;


<s> O << getShiftOpcStr ( ShOpc ) ; if ( ShOpc != <STR_LIT> ) { O << <STR_LIT> ; if ( UseMarkup ) O << <STR_LIT> ; O << <STR_LIT> << translateShiftImm ( ShImm ) ;


<s> assert ( std :: is_sorted ( MI -> begin ( ) + OpNum , MI -> end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { if ( i != OpNum ) O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( i ) . getReg ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printRegisterList ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { assert ( std :: is_sorted ( MI -> begin ( ) + OpNum , MI -> end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { if ( i != OpNum ) O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( i ) . getReg ( ) ) ; }


<s> void <ISA_LIT>InstPrinter :: printRotImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) return ; assert ( Imm <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << <NUM_LIT> * Imm << markup ( <STR_LIT> ) ;


<s> assert ( MI -> getOperand ( OpNum ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ; O << 's' ;


<s> if ( MI -> getOperand ( OpNum ) . getReg ( ) ) { assert ( MI -> getOperand ( OpNum ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ;


<s> if ( Op . getImm ( ) ) O << <STR_LIT> ; else O << <STR_LIT> ;


<s> unsigned ShiftOp = MI -> getOperand ( OpNum ) . getImm ( ) ; bool isASR = ( ShiftOp & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ; unsigned Amt = ShiftOp & <NUM_LIT> ; if ( isASR ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << ( Amt == <NUM_LIT> ? <NUM_LIT> : Amt ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printSORegRegOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; printRegName ( O , MO1 . getReg ( ) ) ; <STR_LIT> ShOpc = <STR_LIT> ( MO3 . getImm ( ) ) ;


<s>
const
MCOperand
&
MO3
=
MI
->
getOperand
(
OpNum
+
<NUM_LIT>
)
;
printRegName
(
O
,
MO1
.
getReg
(
)
)
;
<STR_LIT>
ShOpc
=
<STR_LIT>
(
MO3
.
getImm
(
)
)
;
O
<<
<STR_LIT>
<<
<STR_LIT>
(
ShOpc
)
;
if
(
ShOpc
==
<STR_LIT>
)
return
;
O
<<
' '
;
printRegName
(
O
,
MO2
.
getReg
(
)
)
;
assert
(
<STR_LIT>
(
MO3
.
getImm
(
)
)
==
<NUM_LIT>
)
;


<s> O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( MO2 . getImm ( ) * <NUM_LIT> ) << markup ( <STR_LIT> ) ; }


<s> void <ISA_LIT>InstPrinter :: printT2AddrModeImm8OffsetOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ;

int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ;


<s> int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << - OffImm << markup ( <STR_LIT> ) ;

} else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) {


<s> if ( isSub ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << - OffImm << markup ( <STR_LIT> ) ; } else if ( AlwaysPrintImm0 || OffImm > <NUM_LIT> ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << OffImm << markup ( <STR_LIT> ) ;


<s> O << <STR_LIT> << markup ( <STR_LIT> ) ; if ( OffImm == INT32_MIN ) O << <STR_LIT> ; else if ( OffImm < <NUM_LIT> ) O << <STR_LIT> << - OffImm ; else O << <STR_LIT> << OffImm ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , OpNum , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ;

if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ;


<s> assert ( MO2 . getReg ( ) && <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MO2 . getReg ( ) ) ; unsigned ShAmt = MO3 . getImm ( ) ; if ( ShAmt ) { assert ( ShAmt <= <NUM_LIT> && <STR_LIT> ) ; O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << ShAmt << markup ( <STR_LIT> ) ; }

O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; unsigned Reg = MO1 . getReg ( ) ; printRegName ( O , Reg ) ; assert ( MO2 . isImm ( ) && <STR_LIT> ) ;

printRegImmShift ( O , <STR_LIT> ( MO2 . getImm ( ) ) , <STR_LIT> ( MO2 . getImm ( ) ) , UseMarkup ) ;


<s> printThumbAddrModeImm5SOperand ( MI , Op , STI , O , <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeImm5S4Operand ( const MCInst * MI , unsigned Op , const MCSubtargetInfo & STI , raw_ostream & O ) { printThumbAddrModeImm5SOperand ( MI , Op , STI , O , <NUM_LIT> ) ;


<s> const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( unsigned ImmOffs = MO2 . getImm ( ) ) { O << <STR_LIT> << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( ImmOffs * Scale ) << markup ( <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeRROperand ( const MCInst * MI , unsigned Op , const MCSubtargetInfo & STI , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) ) { printOperand ( MI , Op , STI , O ) ; return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; if ( unsigned RegNum = MO2 . getReg ( ) ) { O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printThumbAddrModeSPOperand ( const MCInst * MI , unsigned Op , const MCSubtargetInfo & STI , raw_ostream & O ) { printThumbAddrModeImm5SOperand ( MI , Op , STI , O , <NUM_LIT> ) ;


<s> unsigned Mask = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned Firstcond = MI -> getOperand ( OpNum - <NUM_LIT> ) . getImm ( ) ; unsigned CondBit0 = Firstcond & <NUM_LIT> ; unsigned NumTZ = countTrailingZeros ( Mask ) ; assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) {

bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == CondBit0 ;


<s> unsigned Mask = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned Firstcond = MI -> getOperand ( OpNum - <NUM_LIT> ) . getImm ( ) ; unsigned CondBit0 = Firstcond & <NUM_LIT> ; unsigned NumTZ = countTrailingZeros ( Mask ) ; assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ;

for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) {


<s> return ; } O << markup ( <STR_LIT> ) << <STR_LIT> ; int32_t OffImm = ( int32_t ) MO1 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( - OffImm ) << markup ( <STR_LIT> ) ; } else { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( OffImm ) << markup ( <STR_LIT> ) ; }


<s> void <ISA_LIT>InstPrinter :: printThumbS4ImmOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( MI -> getOperand ( OpNum ) . getImm ( ) * <NUM_LIT> ) << markup ( <STR_LIT> ) ;


<s> unsigned Imm = MI -> getOperand ( OpNum ) . getImm ( ) ;

O << markup ( <STR_LIT> ) << <STR_LIT> << formatImm ( ( Imm == <NUM_LIT> ? <NUM_LIT> : Imm ) ) << markup ( <STR_LIT> ) ;


<s> unsigned val = MI -> getOperand ( OpNum ) . getImm ( ) ; O << <STR_LIT> ( val ) ;


<s> void <ISA_LIT>InstPrinter :: printTraceSyncBOption ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { unsigned val = MI -> getOperand ( OpNum ) . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorIndex ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> << MI -> getOperand ( OpNum ) . getImm ( ) << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFourAllLanes ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListFourSpaced ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printVectorListOne ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> ;

printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListThree ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) ) ; O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( OpNum ) . getReg ( ) + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ;


<s> unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ; printRegName ( O , Reg1 ) ;


<s> void <ISA_LIT>InstPrinter :: printVectorListTwoAllLanes ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ; printRegName ( O , Reg1 ) ;


<s> unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Reg0 ) ; O << <STR_LIT> ;


<s> unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; unsigned Reg0 = MRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned Reg1 = MRI . getSubReg ( Reg , <STR_LIT> ) ;


<s> printAdrLabelOperand < scale > ( MI , OpNum , STI , O ) ;


<s> if ( MO2 . getReg ( ) ) { O << <STR_LIT> << getAddrOpcStr ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) << ']' ; return ; } unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> op = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( ImmOffs || ( op == <STR_LIT> ) ) O << <STR_LIT> << <STR_LIT> ( op ) << ImmOffs ;


<s> void <ISA_LIT>InstPrinter :: printAM3PreOrOffsetIndexOp ( const MCInst * MI , unsigned Op , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( Op ) ; const MCOperand & MO2 = MI -> getOperand ( Op + <NUM_LIT> ) ; const MCOperand & MO3 = MI -> getOperand ( Op + <NUM_LIT> ) ; O << '[' << getRegisterName ( MO1 . getReg ( ) ) ; if ( MO2 . getReg ( ) ) { O << <STR_LIT> << getAddrOpcStr ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) << ']' ; return ; } unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> op = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( ImmOffs || ( op == <STR_LIT> ) ) O << <STR_LIT> << <STR_LIT> ( op ) << ImmOffs ;


<s> void printOperand ( const MCInst * MI , uint64_t , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { printOperand ( MI , OpNum , STI , O ) ;


<s> void printThumbLdrLabelOperand ( const MCInst * MI , uint64_t , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { printThumbLdrLabelOperand ( MI , OpNum , STI , O ) ;


<s> printThumbLdrLabelOperand ( MI , OpNum , STI , O ) ;


<s> } O << <STR_LIT> << getRegisterName ( MO1 . getReg ( ) ) ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; bool isSub = OffImm < <NUM_LIT> ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; if ( isSub ) O << <STR_LIT> << - OffImm ; else if ( OffImm > <NUM_LIT> ) O << <STR_LIT> << OffImm ;


<s> O << '#' << ( float ) MI -> getOperand ( OpNum ) . getFPImm ( ) ;


<s> <STR_LIT> CC = ( <STR_LIT> ) MI -> getOperand ( OpNum ) . getImm ( ) ; if ( CC != <STR_LIT> ) O << <ISA_LIT>CondCodeToString ( CC ) ;


<s> <STR_LIT> CC = ( <STR_LIT> ) MI -> getOperand ( OpNum ) . getImm ( ) ;

if ( CC != <STR_LIT> ) O << <ISA_LIT>CondCodeToString ( CC ) ;


<s> return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } switch ( SYSm ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> :


<s> return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } switch ( SYSm ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; } } if ( ! SpecRegRBit && ( Mask == <NUM_LIT> || Mask == <NUM_LIT> || Mask == <NUM_LIT> ) ) { O << <STR_LIT> ; switch ( Mask ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ; return ; case <NUM_LIT> : O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printRegisterList ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) {


<s> DefaultAltIdx = <STR_LIT> ; return true ; } if ( Opt == <STR_LIT> ) { DefaultAltIdx = <STR_LIT> ; return true ; }


<s> void <ISA_LIT>InstPrinter :: printMandatoryInvertedPredicateOperand ( const MCInst * MI , unsigned OpNum , const MCSubtargetInfo & STI , raw_ostream & O ) { <STR_LIT> CC = ( <STR_LIT> ) MI -> getOperand ( OpNum ) . getImm ( ) ; O << <ISA_LIT>CondCodeToString ( <STR_LIT> ( CC ) ) ;


<s> O << markup ( <STR_LIT> ) << <STR_LIT> ; printRegName ( O , MO1 . getReg ( ) ) ; O << <STR_LIT> ;


<s> printRegName ( O , MO2 . getReg ( ) ) ; if ( shift > <NUM_LIT> ) printRegImmShift ( O , <STR_LIT> , shift , UseMarkup ) ; O << <STR_LIT> << markup ( <STR_LIT> ) ;


<s> uint32_t Val = MI -> getOperand ( OpNum ) . getImm ( ) ;

assert ( Val <= <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned Reg = MI -> getOperand ( OpNum ) . getReg ( ) ; const char * Prefix = <STR_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumRegs ; i ++ ) {


<s> } ) ) ; } O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { if ( i != OpNum ) O << <STR_LIT> ; printRegName ( O , MI -> getOperand ( i ) . getReg ( ) ) ; } O << <STR_LIT> ;


<s> assert ( std :: is_sorted ( MI -> begin ( ) + OpNum , MI -> end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; } O << <STR_LIT> ; for ( unsigned i = OpNum , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) {


<s> void <ISA_LIT>InstPrinter :: printRegName ( raw_ostream & OS , unsigned RegNo ) const { OS << markup ( <STR_LIT> ) << getRegisterName ( RegNo , DefaultAltIdx ) << markup ( <STR_LIT> ) ;


<s> OS << markup ( <STR_LIT> ) << getRegisterName ( RegNo , DefaultAltIdx ) << markup ( <STR_LIT> ) ;


<s> unsigned Mask = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned NumTZ = countTrailingZeros ( Mask ) ;

assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned EncodedImm = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned EltBits ; uint64_t Val = <STR_LIT> ( EncodedImm , EltBits ) ;

O << markup ( <STR_LIT> ) << <STR_LIT> ;


<s> assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) {

bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == <NUM_LIT> ;


<s> unsigned Mask = MI -> getOperand ( OpNum ) . getImm ( ) ; unsigned NumTZ = countTrailingZeros ( Mask ) ; assert ( NumTZ <= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned Pos = <NUM_LIT> , e = NumTZ ; Pos > e ; -- Pos ) { bool T = ( ( Mask >> Pos ) & <NUM_LIT> ) == <NUM_LIT> ; if ( T ) O << 't' ; else O << 'e' ; }


<s> <ISA_LIT>InstPrinter ( raw_ostream & O , const MCAsmInfo & MAI , bool verboseAsm ) : MCInstPrinter ( O , MAI ) , VerboseAsm ( verboseAsm ) {


<s> void printHex16ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void printHex32ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void printHex64ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void printHex8ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void printJT2BlockOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printJTBlockOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void PrintSpecial ( const MCInst * MI , const char * Kind ) {


<s> void printT2AddrModeImm12Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printT2AddrModeImm8OffsetOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printT2AddrModeImm8Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printT2AddrModeImm8s4Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printT2AddrModeSoRegOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printT2SOOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printTBAddrMode ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbAddrModeRI5Operand ( const MCInst * MI , unsigned OpNum , unsigned Scale ) {


<s> void printThumbAddrModeRROperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbAddrModeS1Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbAddrModeS2Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbAddrModeS4Operand ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbAddrModeSPOperand ( const MCInst * MI , unsigned OpNum ) {


<s> void printThumbITMask ( const MCInst * MI , unsigned OpNum ) {


<s> void printVFPf32ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void printVFPf64ImmOperand ( const MCInst * MI , int OpNum ) {


<s> void <ISA_LIT>InstPrinter :: printAddrMode2OffsetOperand ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & MO1 = MI -> getOperand ( OpNum ) ; const MCOperand & MO2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ;


<s> if ( MO . isExpr ( ) ) { O << * MO . getExpr ( ) ; return ; } int32_t OffImm = ( int32_t ) MO . getImm ( ) ;

if ( OffImm == INT32_MIN ) O << <STR_LIT> ;


<s> if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( MO3 . getImm ( ) ) ) O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << <STR_LIT> ( MO3 . getImm ( ) ) ; O << <STR_LIT> ; return ; } O << <STR_LIT> << <STR_LIT> ( <STR_LIT> ( MO3 . getImm ( ) ) ) << getRegisterName ( MO2 . getReg ( ) ) ;

printRegImmShift ( O , <STR_LIT> ( MO3 . getImm ( ) ) , <STR_LIT> ( MO3 . getImm ( ) ) ) ;