<s> Binary |= getAddrModeSBit ( MI , TID ) ; unsigned NumDefs = TID . getNumDefs ( ) ; unsigned OpIdx = <NUM_LIT> ; if ( NumDefs ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; else if ( ImplicitRd ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; if ( TID . Opcode == <STR_LIT> ) { unsigned Lo16 = getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) ; Binary |= Lo16 & <NUM_LIT> ; Binary |= ( ( Lo16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( TID . Opcode == <STR_LIT> ) { unsigned Hi16 = ( getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) >> <NUM_LIT> ) ; Binary |= Hi16 & <NUM_LIT> ; Binary |= ( ( Hi16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( TID . Opcode == <STR_LIT> ) || ( TID . Opcode == <STR_LIT> ) ) { uint32_t v = ~ MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; int32_t lsb = CountTrailingZeros_32 ( v ) ; int32_t msb = ( <NUM_LIT> - CountLeadingZeros_32 ( v ) ) - <NUM_LIT> ; Binary |= ( msb & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( TID . Opcode == <STR_LIT> ) || ( TID . Opcode == <STR_LIT> ) ) { Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; uint32_t lsb = MI . getOperand ( OpIdx ++ ) . getImm ( ) ; uint32_t widthm1 = MI . getOperand ( OpIdx ++ ) . getImm ( ) - <NUM_LIT> ; Binary |= ( widthm1 & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; bool isUnary = TID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; ++ OpIdx ; }


<s> Binary |= getAddrModeSBit ( MI , TID ) ; unsigned NumDefs = TID . getNumDefs ( ) ; unsigned OpIdx = <NUM_LIT> ; if ( NumDefs ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; else if ( ImplicitRd ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; if ( TID . Opcode == <STR_LIT> ) { unsigned Lo16 = getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) ; Binary |= Lo16 & <NUM_LIT> ; Binary |= ( ( Lo16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( TID . Opcode == <STR_LIT> ) { unsigned Hi16 = ( getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) >> <NUM_LIT> ) ; Binary |= Hi16 & <NUM_LIT> ; Binary |= ( ( Hi16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( TID . Opcode == <STR_LIT> ) || ( TID . Opcode == <STR_LIT> ) ) { uint32_t v = ~ MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; int32_t lsb = CountTrailingZeros_32 ( v ) ; int32_t msb = ( <NUM_LIT> - CountLeadingZeros_32 ( v ) ) - <NUM_LIT> ; Binary |= ( msb & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ;


<s> case <STR_LIT> : emitLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitSaturateInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : emitVFPConversionInstruction ( MI ) ; break ; case <STR_LIT> :


<s> const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , TID ) ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; Binary |= get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; emitJumpTableAddress ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) , <STR_LIT> ) ;


<s> const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Form = TID . TSFlags & <STR_LIT> ; bool IsPrePost = ( TID . TSFlags & <STR_LIT> ) != <NUM_LIT> ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) { emitWordLE ( Binary ) ; return ; } Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; bool Skipped = false ; if ( IsPrePost && Form == <STR_LIT> ) { ++ OpIdx ; Skipped = true ; } if ( ImplicitRd ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM2Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM2Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( AM2Opc ) ) Binary |= <STR_LIT> ( AM2Opc ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO2 . getReg ( ) ) ) ; Binary |= get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; if ( unsigned ShImm = <STR_LIT> ( AM2Opc ) ) {

Binary |= getShiftOp ( AM2Opc ) << <STR_LIT> ;


<s> for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ; Binary |= <NUM_LIT> << RegNum ; } emitWordLE ( Binary ) ;


<s> Binary |= getMachineOpValue ( MI , MO ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; unsigned ShiftAmt = MI . getOperand ( OpIdx ) . getImm ( ) ; if ( TID . Opcode == <STR_LIT> ) { assert ( ShiftAmt != <NUM_LIT> && <STR_LIT> ) ; if ( ShiftAmt == <NUM_LIT> ) ShiftAmt = <NUM_LIT> ; } assert ( ShiftAmt < <NUM_LIT> && <STR_LIT> ) ;


<s> Binary |= getMachineOpValue ( MI , MO ) ; emitWordLE ( Binary ) ; return ; } Binary |= getMachineOpValue ( MI , MO ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; unsigned ShiftAmt = MI . getOperand ( OpIdx ) . getImm ( ) ; if ( TID . Opcode == <STR_LIT> ) { assert ( ShiftAmt != <NUM_LIT> && <STR_LIT> ) ; if ( ShiftAmt == <NUM_LIT> ) ShiftAmt = <NUM_LIT> ; }

assert ( ShiftAmt < <NUM_LIT> && <STR_LIT> ) ;


<s> if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) { emitDataProcessingInstruction ( MI , <STR_LIT> ) ; unsigned JTIndex = ( TID . Opcode == <STR_LIT> ) ? MI . getOperand ( <NUM_LIT> ) . getIndex ( ) : MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ; emitInlineJumpTable ( JTIndex ) ; return ;

} else if ( TID . Opcode == <STR_LIT> ) {


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; bool Skipped = false ; if ( IsPrePost && Form == <STR_LIT> ) { ++ OpIdx ; Skipped = true ; } Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) ++ OpIdx ; if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ;

if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ;


<s> void <ISA_LIT>CodeEmitter :: emitNEON2RegInstruction ( const MachineInstr & MI ) { const TargetInstrDesc & TID = MI . getDesc ( ) ;

unsigned Binary = getBinaryCodeForInstr ( MI ) ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; unsigned OpIdx = <NUM_LIT> ; Binary |= encodeNEONRd ( MI , OpIdx ++ ) ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ;

Binary |= encodeNEONRn ( MI , OpIdx ++ ) ;


<s> RegT = get<ISA_LIT>RegisterNumbering ( RegT ) ; Binary |= ( RegT << <STR_LIT> ) ; Binary |= encodeNEONRn ( MI , <NUM_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: emitNEONDupInstruction ( const MachineInstr & MI ) { unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= ( IsThumb ? <STR_LIT> : II -> getPredicate ( & MI ) ) << <STR_LIT> ;

unsigned RegT = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> if ( ( Binary & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ) LaneShift = <NUM_LIT> ; else if ( ( Binary & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ) LaneShift = <NUM_LIT> ; else LaneShift = <NUM_LIT> ; unsigned Lane = MI . getOperand ( LnOpIdx ) . getImm ( ) << LaneShift ; unsigned Opc1 = Lane >> <NUM_LIT> ; unsigned Opc2 = Lane & <NUM_LIT> ;

assert ( ( Opc1 & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned LaneShift ; if ( ( Binary & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ) LaneShift = <NUM_LIT> ; else if ( ( Binary & ( <NUM_LIT> << <NUM_LIT> ) ) != <NUM_LIT> ) LaneShift = <NUM_LIT> ; else LaneShift = <NUM_LIT> ; unsigned Lane = MI . getOperand ( LnOpIdx ) . getImm ( ) << LaneShift ; unsigned Opc1 = Lane >> <NUM_LIT> ; unsigned Opc2 = Lane & <NUM_LIT> ; assert ( ( Opc1 & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; Binary |= ( Opc1 << <NUM_LIT> ) ; Binary |= ( Opc2 << <NUM_LIT> ) ;


<s> } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitLoadStoreInstruction ( MI , <NUM_LIT> , <STR_LIT> ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitMiscLoadStoreInstruction ( MI , <STR_LIT> ) ; break ; } case <STR_LIT> : if ( Subtarget -> hasV6T2Ops ( ) ) emitMOVi32immInstruction ( MI ) ; else emitMOVi2piecesInstruction ( MI ) ; break ; case <STR_LIT> : emitLEApcrelJTInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> assert ( ( Pos < <NUM_LIT> || ( Pos < <NUM_LIT> && TID . Opcode != <STR_LIT> && TID . Opcode != <STR_LIT> ) ) && <STR_LIT> ) ; Binary |= Pos << <NUM_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) ; if ( TID . getNumOperands ( ) == <NUM_LIT> ) { unsigned ShiftOp = MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; <STR_LIT> Opc = <STR_LIT> ( ShiftOp ) ;

if ( Opc == <STR_LIT> ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; <STR_LIT> Mode = <STR_LIT> ( MI . getOpcode ( ) ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( Mode ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , OpIdx + <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; ++ NumRegs ; } if ( Binary & <NUM_LIT> ) Binary |= NumRegs * <NUM_LIT> ;


<s> static unsigned encodeNEONRd ( const MachineInstr & MI , unsigned OpIdx ) { unsigned RegD = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; RegD = get<ISA_LIT>RegisterNumbering ( RegD ) ; Binary |= ( RegD & <NUM_LIT> ) << <STR_LIT> ;

Binary |= ( ( RegD >> <NUM_LIT> ) & <NUM_LIT> ) << <STR_LIT> ;


<s> Binary |= ( RegM & <NUM_LIT> ) ; Binary |= ( ( RegM >> <NUM_LIT> ) & <NUM_LIT> ) << <STR_LIT> ;


<s> static unsigned encodeNEONRm ( const MachineInstr & MI , unsigned OpIdx ) { unsigned RegM = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; RegM = get<ISA_LIT>RegisterNumbering ( RegM ) ; Binary |= ( RegM & <NUM_LIT> ) ; Binary |= ( ( RegM >> <NUM_LIT> ) & <NUM_LIT> ) << <STR_LIT> ; return Binary ;


<s> RegN = get<ISA_LIT>RegisterNumbering ( RegN ) ; Binary |= ( RegN & <NUM_LIT> ) << <STR_LIT> ;

Binary |= ( ( RegN >> <NUM_LIT> ) & <NUM_LIT> ) << <STR_LIT> ;


<s> static unsigned encodeNEONRn ( const MachineInstr & MI , unsigned OpIdx ) { unsigned RegN = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; RegN = get<ISA_LIT>RegisterNumbering ( RegN ) ;

Binary |= ( RegN & <NUM_LIT> ) << <STR_LIT> ;


<s> unsigned RegD = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = <STR_LIT> -> contains ( RegD ) ; RegD = get<ISA_LIT>RegisterNumbering ( RegD ) ; if ( ! isSPVFP ) Binary |= RegD << <STR_LIT> ; else { Binary |= ( ( RegD & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( RegD & <NUM_LIT> ) << <STR_LIT> ; }


<s> unsigned RegM = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = <STR_LIT> -> contains ( RegM ) ; RegM = get<ISA_LIT>RegisterNumbering ( RegM ) ; if ( ! isSPVFP ) Binary |= RegM ; else {

Binary |= ( ( RegM & <NUM_LIT> ) >> <NUM_LIT> ) ;


<s> static unsigned encodeVFPRn ( const MachineInstr & MI , unsigned OpIdx ) { unsigned RegN = MI . getOperand ( OpIdx ) . getReg ( ) ;


<s> const MachineOperand & MO = MI . getOperand ( Op ) ; const MachineOperand & MO1 = MI . getOperand ( Op + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) {

emitConstPoolAddress ( MO . getIndex ( ) , <STR_LIT> ) ;


<s> } unsigned Reg = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; int32_t Imm12 = MO1 . getImm ( ) ; uint32_t Binary ; Binary = Imm12 & <NUM_LIT> ; if ( Imm12 >= <NUM_LIT> ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ;


<s> else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true , false ) ; else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Reloc = ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ; else llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT> ;


<s> const MachineOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT> ) return Binary ; if ( Rs ) { assert ( <STR_LIT> ( MO2 . getImm ( ) ) == <NUM_LIT> ) ; return Binary | ( get<ISA_LIT>RegisterNumbering ( Rs ) << <STR_LIT> ) ; } return Binary | <STR_LIT> ( MO2 . getImm ( ) ) << <NUM_LIT> ;


<s> unsigned getMovtImmOpValue ( const MachineInstr & MI , unsigned Op ) const { return <NUM_LIT> ;


<s> unsigned getRotImmOpValue ( const MachineInstr & MI , unsigned Op ) const { return <NUM_LIT> ;


<s> do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ; MBB != E ; ++ MBB ) { MCE . StartMachineBasicBlock ( MBB ) ; for ( MachineBasicBlock :: const_iterator I = MBB -> begin ( ) , E = MBB -> end ( ) ; I != E ; ++ I ) emitInstruction ( * I ) ; } } while ( MCE . finishFunction ( MF ) ) ;


<s> unsigned VFPThumb2PostEncoder ( const MachineInstr & MI , unsigned Val ) const {


<s> void Emitter < CodeEmitter > :: addPCLabel ( unsigned LabelID ) {

DOUT << <STR_LIT> << LabelID << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << '\n' ;


<s> FunctionPass * llvm :: create<ISA_LIT>CodeEmitterPass ( <ISA_LIT>BaseTargetMachine & TM , MachineCodeEmitter & MCE ) {

return new Emitter < MachineCodeEmitter > ( TM , MCE ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>JITCodeEmitterPass ( <ISA_LIT>BaseTargetMachine & TM , JITCodeEmitter & JCE ) {

return new Emitter < JITCodeEmitter > ( TM , JCE ) ;


<s> } unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;

Binary |= getMachineOpValue ( MI , <NUM_LIT> ) ;


<s> void Emitter < CodeEmitter > :: emitConstPoolAddress ( unsigned CPI , unsigned Reloc ) { MCE . addRelocation ( MachineRelocation :: getConstPool ( MCE . getCurrentPCOffset ( ) , Reloc , CPI , <NUM_LIT> , true ) ) ;


<s> void Emitter < CodeEmitter > :: emitConstPoolAddress ( unsigned CPI , unsigned Reloc ) {

MCE . addRelocation ( MachineRelocation :: getConstPool ( MCE . getCurrentPCOffset ( ) , Reloc , CPI , <NUM_LIT> , true ) ) ;


<s> if ( MCPE . isMachineConstantPoolEntry ( ) ) { <ISA_LIT>ConstantPoolValue * ACPV = static_cast < <ISA_LIT>ConstantPoolValue * > ( MCPE . Val . MachineCPVal ) ; DOUT << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> << * ACPV << '\n' ; GlobalValue * GV = ACPV -> getGV ( ) ; if ( GV ) { Reloc :: Model RelocM = TM . getRelocationModel ( ) ; emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , Subtarget -> GVIsIndirectSymbol ( GV , RelocM ) , ( intptr_t ) ACPV ) ; } else { emitExternalSymbolAddress ( ACPV -> getSymbol ( ) , <STR_LIT> ) ; } emitWordLE ( <NUM_LIT> ) ; } else { Constant * CV = MCPE . Val . ConstVal ; DEBUG ( { errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ;

} else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) {


<s> if ( GV ) { Reloc :: Model RelocM = TM . getRelocationModel ( ) ; emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , Subtarget -> GVIsIndirectSymbol ( GV , RelocM ) , ( intptr_t ) ACPV ) ; } else { emitExternalSymbolAddress ( ACPV -> getSymbol ( ) , <STR_LIT> ) ; } emitWordLE ( <NUM_LIT> ) ; } else { Constant * CV = MCPE . Val . ConstVal ; DEBUG ( { errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) == Type :: getFloatTy ( CFP -> getContext ( ) ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else if ( CFP -> getType ( ) == Type :: getDoubleTy ( CFP -> getContext ( ) ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else {


<s> DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << ( unsigned ) Binary << std :: dec << <STR_LIT> ; DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << ( unsigned ) ( Binary >> <NUM_LIT> ) << std :: dec << <STR_LIT> ; MCE . emitDWordLE ( Binary ) ;


<s> } else { Binary |= getMachineOpValue ( MI , MO1 ) ; }

if ( MI . getOperand ( OpIdx ) . isImm ( ) && ! TID . OpInfo [ OpIdx ] . isPredicate ( ) && ! TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) Binary |= ( getMachineOpValue ( MI , OpIdx ) / <NUM_LIT> ) << <STR_LIT> ;


<s> void Emitter < CodeEmitter > :: emitExternalSymbolAddress ( const char * ES , unsigned Reloc ) { MCE . addRelocation ( MachineRelocation :: getExtSym ( MCE . getCurrentPCOffset ( ) , Reloc , ES ) ) ;


<s> const std :: vector < MachineBasicBlock * > & MBBs = ( * MJTEs ) [ JTIndex ] . MBBs ; for ( unsigned i = <NUM_LIT> , e = MBBs . size ( ) ; i != e ; ++ i ) { if ( IsPIC ) emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> , JTBase ) ; else emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> ) ; emitWordLE ( <NUM_LIT> ) ;


<s> const std :: vector < MachineBasicBlock * > & MBBs = ( * MJTEs ) [ JTIndex ] . MBBs ; for ( unsigned i = <NUM_LIT> , e = MBBs . size ( ) ; i != e ; ++ i ) { if ( IsPIC ) emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> , JTBase ) ; else emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> ) ;


<s> case <STR_LIT> : emitLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : emitVFPConversionInstruction ( MI ) ; break ;


<s> void Emitter < CodeEmitter > :: emitJumpTableAddress ( unsigned JTIndex , unsigned Reloc ) { MCE . addRelocation ( MachineRelocation :: getJumpTable ( MCE . getCurrentPCOffset ( ) , Reloc , JTIndex , <NUM_LIT> , true ) ) ;


<s> MCE . addRelocation ( MachineRelocation :: getJumpTable ( MCE . getCurrentPCOffset ( ) , Reloc , JTIndex , <NUM_LIT> , true ) ) ;


<s> void Emitter < CodeEmitter > :: emitLEApcrelJTInstruction ( const MachineInstr & MI ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;

Binary |= getAddrModeSBit ( MI , TID ) ;


<s> Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) {

const MachineOperand & MO = MI . getOperand ( i ) ;


<s> return ; } Binary |= getMachineOpValue ( MI , MO ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; unsigned ShiftAmt = MI . getOperand ( OpIdx ) . getImm ( ) ; assert ( ShiftAmt < <NUM_LIT> && <STR_LIT> ) ; Binary |= ShiftAmt << <STR_LIT> ; emitWordLE ( Binary ) ;


<s> emitInlineJumpTable ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ) ; return ; } unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> ) Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , <NUM_LIT> ) ; emitWordLE ( Binary ) ;


<s> void Emitter < CodeEmitter > :: emitMiscInstruction ( const MachineInstr & MI ) { unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;


<s> ++ OpIdx ; Skipped = true ; } Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) ++ OpIdx ; if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ;


<s> else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO2 . getReg ( ) ) ;


<s> unsigned V2 = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineSoImmOpValue ( V1 ) ; emitWordLE ( Binary ) ; Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineSoImmOpValue ( V2 ) ;


<s> void Emitter < CodeEmitter > :: emitMulFrmInstruction ( const MachineInstr & MI ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , TID ) ; unsigned OpIdx = <NUM_LIT> ; if ( TID . getNumDefs ( ) == <NUM_LIT> ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ;

Binary |= getMachineOpValue ( MI , OpIdx ++ ) ;


<s> unsigned OpIdx = <NUM_LIT> ; if ( TID . getNumDefs ( ) == <NUM_LIT> ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( TID . getNumOperands ( ) > OpIdx && ! TID . OpInfo [ OpIdx ] . isPredicate ( ) && ! TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ;


<s> void Emitter < CodeEmitter > :: emitPseudoInstruction ( const MachineInstr & MI ) { unsigned Opcode = MI . getDesc ( ) . Opcode ; switch ( Opcode ) { default : llvm_unreachable ( <STR_LIT> ) ; case TargetInstrInfo :: INLINEASM : { if ( MI . getOperand ( <NUM_LIT> ) . getSymbolName ( ) [ <NUM_LIT> ] ) { llvm_report_error ( <STR_LIT> ) ; } break ; } case TargetInstrInfo :: DBG_LABEL : case TargetInstrInfo :: EH_LABEL : MCE . emitLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; break ; case TargetInstrInfo :: IMPLICIT_DEF : case TargetInstrInfo :: DECLARE : case <STR_LIT> : break ; case <STR_LIT> :


<s> if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; switch ( Opcode ) { default : break ; case <STR_LIT> : Binary |= <NUM_LIT> << <NUM_LIT> ; break ; case <STR_LIT> : Binary |= ( <NUM_LIT> << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; break ; case <STR_LIT> : Binary |= ( <NUM_LIT> << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; break ;


<s> Emitter ( TargetMachine & tm , CodeEmitter & mce , const <ISA_LIT>InstrInfo & ii , const TargetData & td ) : MachineFunctionPass ( & ID ) , JTI ( <NUM_LIT> ) , II ( & ii ) , TD ( & td ) , TM ( tm ) , MCE ( mce ) , MCPEs ( <NUM_LIT> ) , MJTEs ( <NUM_LIT> ) , IsPIC ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) {


<s> const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; assert ( ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; Binary |= encodeVFPRd ( MI , OpIdx ++ ) ;

if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ;


<s> unsigned OpIdx = <NUM_LIT> ; Binary |= encodeVFPRd ( MI , OpIdx ++ ) ; const MachineOperand & Base = MI . getOperand ( OpIdx ++ ) ; Binary |= getMachineOpValue ( MI , Base ) << <STR_LIT> ; if ( Base . isReg ( ) ) { const MachineOperand & Offset = MI . getOperand ( OpIdx ) ; if ( unsigned ImmOffs = <STR_LIT> ( Offset . getImm ( ) ) ) { if ( <STR_LIT> ( Offset . getImm ( ) ) == <STR_LIT> ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= ImmOffs ;


<s> const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ;

if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ;


<s> const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ;

for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) {


<s> const MachineOperand & MO = MI . getOperand ( i - <NUM_LIT> ) ; if ( MO . isReg ( ) && MO . isDef ( ) && MO . getReg ( ) == <STR_LIT> ) return <NUM_LIT> << <STR_LIT> ;


<s> const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Reloc = ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ; else { cerr << MO ; llvm_unreachable ( <NUM_LIT> ) ; } return <NUM_LIT> ;


<s> unsigned Emitter < CodeEmitter > :: getMachineSoImmOpValue ( unsigned SoImm ) { int SoImmVal = <STR_LIT> ( SoImm ) ; assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ; unsigned Binary = ( <STR_LIT> ( ( unsigned ) SoImmVal ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= <STR_LIT> ( ( unsigned ) SoImmVal ) ;


<s> unsigned Binary = getMachineOpValue ( MI , MO ) ; const MachineOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MachineOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) {


<s> switch ( <STR_LIT> ( Imm ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; }


<s> unsigned Emitter < CodeEmitter > :: getShiftOp ( unsigned Imm ) const { switch ( <STR_LIT> ( Imm ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; }


<s> MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ; MBB != E ; ++ MBB ) { MCE . StartMachineBasicBlock ( MBB ) ; for ( MachineBasicBlock :: const_iterator I = MBB -> begin ( ) , E = MBB -> end ( ) ; I != E ; ++ I ) emitInstruction ( * I ) ; } } while ( MCE . finishFunction ( MF ) ) ; return false ;


<s> <ISA_LIT>CodeEmitter ( TargetMachine & tm , JITCodeEmitter & mce ) : MachineFunctionPass ( ID ) , JTI ( <NUM_LIT> ) , II ( ( const <ISA_LIT>BaseInstrInfo * ) tm . getInstrInfo ( ) ) , TD ( tm . getTargetData ( ) ) , TM ( tm ) , MCE ( mce ) , MCPEs ( <NUM_LIT> ) , MJTEs ( <NUM_LIT> ) , IsPIC ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) , IsThumb ( false ) {


<s> if ( MCID . Opcode == <STR_LIT> ) { llvm_unreachable ( <STR_LIT> ) ; }

unsigned Binary = getBinaryCodeForInstr ( MI ) ;


<s> const MCInstrDesc & MCID = MI . getDesc ( ) ; if ( MCID . Opcode == <STR_LIT> ) { llvm_unreachable ( <STR_LIT> ) ;


<s> } ) ; if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = uint32_t ( * CI -> getValue ( ) . getRawData ( ) ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) -> isFloatTy ( ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ;

else if ( CFP -> getType ( ) -> isDoubleTy ( ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ;


<s> } else { const Constant * CV = MCPE . Val . ConstVal ; DEBUG ( { errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) {

uint32_t Val = uint32_t ( * CI -> getValue ( ) . getRawData ( ) ) ;


<s> unsigned OpIdx = <NUM_LIT> ; if ( NumDefs ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; else if ( ImplicitRd ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; if ( MCID . Opcode == <STR_LIT> ) { unsigned Lo16 = getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) ; Binary |= Lo16 & <NUM_LIT> ; Binary |= ( ( Lo16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( MCID . Opcode == <STR_LIT> ) { unsigned Hi16 = ( getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) >> <NUM_LIT> ) ; Binary |= Hi16 & <NUM_LIT> ; Binary |= ( ( Hi16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { uint32_t v = ~ MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; int32_t lsb = CountTrailingZeros_32 ( v ) ; int32_t msb = ( <NUM_LIT> - CountLeadingZeros_32 ( v ) ) - <NUM_LIT> ; Binary |= ( msb & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; uint32_t lsb = MI . getOperand ( OpIdx ++ ) . getImm ( ) ; uint32_t widthm1 = MI . getOperand ( OpIdx ++ ) . getImm ( ) - <NUM_LIT> ; Binary |= ( widthm1 & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } if ( MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; bool isUnary = MCID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ;


<s> Binary |= ( ( Hi16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { uint32_t v = ~ MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; int32_t lsb = CountTrailingZeros_32 ( v ) ; int32_t msb = ( <NUM_LIT> - CountLeadingZeros_32 ( v ) ) - <NUM_LIT> ; Binary |= ( msb & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; uint32_t lsb = MI . getOperand ( OpIdx ++ ) . getImm ( ) ; uint32_t widthm1 = MI . getOperand ( OpIdx ++ ) . getImm ( ) - <NUM_LIT> ; Binary |= ( widthm1 & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } if ( MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; bool isUnary = MCID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; ++ OpIdx ; } } const MachineOperand & MO = MI . getOperand ( OpIdx ) ; if ( ( MCID . TSFlags & <STR_LIT> ) == <STR_LIT> ) { emitWordLE ( Binary | getMachineSoRegOpValue ( MI , MCID , MO , OpIdx ) ) ; return ; } if ( MO . isReg ( ) ) { emitWordLE ( Binary | get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ) ; return ;


<s> } case <STR_LIT> : if ( MI . getOpcode ( ) == <STR_LIT> ) { emitLEApcrelJTInstruction ( MI ) ; break ; } llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : emitPseudoInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitDataProcessingInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitSaturateInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : emitVFPConversionInstruction ( MI ) ; break ;


<s> void <ISA_LIT>CodeEmitter :: emitLEApcrelJTInstruction ( const MachineInstr & MI ) { const MCInstrDesc & MCID = MI . getDesc ( ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , MCID ) ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; Binary |= get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) << <STR_LIT> ;


<s> void <ISA_LIT>CodeEmitter :: emitLEApcrelJTInstruction ( const MachineInstr & MI ) { const MCInstrDesc & MCID = MI . getDesc ( ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , MCID ) ;

Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ;


<s> if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) { emitWordLE ( Binary ) ; return ; } Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; bool Skipped = false ; if ( IsPrePost && Form == <STR_LIT> ) { ++ OpIdx ; Skipped = true ; } if ( ImplicitRd ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM2Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM2Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( AM2Opc ) ) Binary |= <STR_LIT> ( AM2Opc ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO2 . getReg ( ) ) ) ; Binary |= get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; if ( unsigned ShImm = <STR_LIT> ( AM2Opc ) ) { Binary |= getShiftOp ( AM2Opc ) << <STR_LIT> ; Binary |= ShImm << <STR_LIT> ;


<s> const MCInstrDesc & MCID = MI . getDesc ( ) ; bool IsUpdating = ( MCID . TSFlags & <STR_LIT> ) != <NUM_LIT> ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; <STR_LIT> Mode = <STR_LIT> ( MI . getOpcode ( ) ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( Mode ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ;

unsigned RegNum = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ;


<s> Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; <STR_LIT> Mode = <STR_LIT> ( MI . getOpcode ( ) ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( Mode ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ; Binary |= <NUM_LIT> << RegNum ; } emitWordLE ( Binary ) ;


<s> const MCInstrDesc & MCID = MI . getDesc ( ) ; if ( MCID . Opcode == <STR_LIT> || MCID . Opcode == <STR_LIT> ) { emitDataProcessingInstruction ( MI , <STR_LIT> ) ; unsigned JTIndex = ( MCID . Opcode == <STR_LIT> ) ? MI . getOperand ( <NUM_LIT> ) . getIndex ( ) : MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ; emitInlineJumpTable ( JTIndex ) ; return ; } else if ( MCID . Opcode == <STR_LIT> ) { emitLoadStoreInstruction ( MI , <STR_LIT> ) ; emitInlineJumpTable ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ) ; return ;


<s> if ( ! Skipped && MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; if ( unsigned ImmOffs = <STR_LIT> ( AM3Opc ) ) { Binary |= ( ImmOffs >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( ImmOffs & <NUM_LIT> ) ;


<s> if ( MCID . Opcode == <STR_LIT> || MCID . Opcode == <STR_LIT> ) ++ OpIdx ; if ( ImplicitRn ) Binary |= ( get<ISA_LIT>RegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ;

if ( unsigned ImmOffs = <STR_LIT> ( AM3Opc ) ) {


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; assert ( ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; Binary |= encodeVFPRd ( MI , OpIdx ++ ) ; if ( MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; if ( ( MCID . TSFlags & <STR_LIT> ) == <STR_LIT> ) Binary |= encodeVFPRn ( MI , OpIdx ++ ) ; if ( OpIdx == MCID . getNumOperands ( ) || MCID . OpInfo [ OpIdx ] . isPredicate ( ) || MCID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) {


<s> unsigned getHiLo16ImmOpValue ( const MachineInstr & MI , unsigned Op ) const {


<s> if ( MO . isReg ( ) ) return get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true , false ) ; else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) {

const MCInstrDesc & MCID = MI . getDesc ( ) ;


<s> case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT> ) return Binary ; if ( Rs ) { assert ( <STR_LIT> ( MO2 . getImm ( ) ) == <NUM_LIT> ) ;

return Binary | ( get<ISA_LIT>RegisterNumbering ( Rs ) << <STR_LIT> ) ;


<s> bool <ISA_LIT>CodeEmitter :: runOnMachineFunction ( MachineFunction & MF ) { assert ( ( MF . getTarget ( ) . getRelocationModel ( ) != Reloc :: Default || MF . getTarget ( ) . getRelocationModel ( ) != Reloc :: Static ) && <STR_LIT> ) ; JTI = ( ( <ISA_LIT>BaseTargetMachine & ) MF . getTarget ( ) ) . getJITInfo ( ) ; II = ( const <ISA_LIT>BaseInstrInfo * ) MF . getTarget ( ) . getInstrInfo ( ) ; TD = MF . getTarget ( ) . getTargetData ( ) ; Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; IsThumb = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ;


<s> Skipped = true ; } if ( ImplicitRd ) Binary |= ( II -> getRegisterInfo ( ) . getEncodingValue ( ImplicitRd ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ImplicitRn ) Binary |= ( II -> getRegisterInfo ( ) . getEncodingValue ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM2Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM2Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( ! MO2 . getReg ( ) ) {

if ( <STR_LIT> ( AM2Opc ) ) Binary |= <STR_LIT> ( AM2Opc ) ;


<s> const MCInstrDesc & MCID = MI . getDesc ( ) ; bool IsUpdating = ( MCID . TSFlags & <STR_LIT> ) != <NUM_LIT> ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; <STR_LIT> Mode = <STR_LIT> ( MI . getOpcode ( ) ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( Mode ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = II -> getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: emitLoadStoreMultipleInstruction ( const MachineInstr & MI ) { const MCInstrDesc & MCID = MI . getDesc ( ) ; bool IsUpdating = ( MCID . TSFlags & <STR_LIT> ) != <NUM_LIT> ; unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ;

<STR_LIT> Mode = <STR_LIT> ( MI . getOpcode ( ) ) ;


<s> bool isSPVFP = <STR_LIT> . contains ( RegD ) ; RegD = II -> getRegisterInfo ( ) . getEncodingValue ( RegD ) ;

if ( ! isSPVFP ) Binary |= RegD << <STR_LIT> ;


<s> unsigned <ISA_LIT>CodeEmitter :: encodeVFPRm ( const MachineInstr & MI , unsigned OpIdx ) const { unsigned RegM = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = <STR_LIT> . contains ( RegM ) ;

RegM = II -> getRegisterInfo ( ) . getEncodingValue ( RegM ) ;


<s> unsigned RegN = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = <STR_LIT> . contains ( RegN ) ; RegN = II -> getRegisterInfo ( ) . getEncodingValue ( RegN ) ; if ( ! isSPVFP ) Binary |= RegN << <STR_LIT> ; else { Binary |= ( ( RegN & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( RegN & <NUM_LIT> ) << <STR_LIT> ; }


<s> emitConstPoolAddress ( MO . getIndex ( ) , <STR_LIT> ) ; return <NUM_LIT> ; } unsigned Reg = II -> getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; int32_t Imm12 = MO1 . getImm ( ) ; if ( Imm12 == INT32_MIN ) Imm12 = <NUM_LIT> ; bool isAdd = true ; if ( Imm12 < <NUM_LIT> ) {


<s> if ( ! MO . isReg ( ) ) { emitConstPoolAddress ( MO . getIndex ( ) , <STR_LIT> ) ; return <NUM_LIT> ; } unsigned Reg = II -> getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; int32_t Imm12 = MO1 . getImm ( ) ; if ( Imm12 == INT32_MIN ) Imm12 = <NUM_LIT> ; bool isAdd = true ; if ( Imm12 < <NUM_LIT> ) {


<s> unsigned <ISA_LIT>CodeEmitter :: getMachineOpValue ( const MachineInstr & MI , const MachineOperand & MO ) const { if ( MO . isReg ( ) ) return II -> getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ;

else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true , false ) ;


<s> if ( MO . isReg ( ) ) return II -> getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true , false ) ; else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) { const MCInstrDesc & MCID = MI . getDesc ( ) ; unsigned Reloc = ( ( MCID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ;


<s> JTI = ( ( <ISA_LIT>BaseTargetMachine & ) MF . getTarget ( ) ) . getJITInfo ( ) ; II = ( const <ISA_LIT>BaseInstrInfo * ) MF . getTarget ( ) . getInstrInfo ( ) ; TD = MF . getTarget ( ) . getTargetData ( ) ; Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ;

if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ;


<s> <ISA_LIT>CodeEmitter ( TargetMachine & tm , JITCodeEmitter & mce ) : MachineFunctionPass ( ID ) , JTI ( nullptr ) , II ( ( const <ISA_LIT>BaseInstrInfo * ) tm . getInstrInfo ( ) ) , TD ( tm . getDataLayout ( ) ) , TM ( tm ) , MCE ( mce ) , MCPEs ( nullptr ) , MJTEs ( nullptr ) , IsPIC ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) , IsThumb ( false ) {


<s> return ; } else if ( MCID . Opcode == <STR_LIT> ) { unsigned Hi16 = ( getMovi32Value ( MI , MI . getOperand ( OpIdx ) , <STR_LIT> ) >> <NUM_LIT> ) ; Binary |= Hi16 & <NUM_LIT> ; Binary |= ( ( Hi16 >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { uint32_t v = ~ MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; int32_t lsb = countTrailingZeros ( v ) ; int32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; Binary |= ( msb & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } else if ( ( MCID . Opcode == <STR_LIT> ) || ( MCID . Opcode == <STR_LIT> ) ) { Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; uint32_t lsb = MI . getOperand ( OpIdx ++ ) . getImm ( ) ; uint32_t widthm1 = MI . getOperand ( OpIdx ++ ) . getImm ( ) - <NUM_LIT> ; Binary |= ( widthm1 & <NUM_LIT> ) << <NUM_LIT> ; Binary |= ( lsb & <NUM_LIT> ) << <NUM_LIT> ; emitWordLE ( Binary ) ; return ; } if ( MCID . getOperandConstraint ( OpIdx , MCOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; bool isUnary = MCID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( II -> getRegisterInfo ( ) . getEncodingValue ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; ++ OpIdx ; } } const MachineOperand & MO = MI . getOperand ( OpIdx ) ; if ( ( MCID . TSFlags & <STR_LIT> ) == <STR_LIT> ) {

emitWordLE ( Binary | getMachineSoRegOpValue ( MI , MCID , MO , OpIdx ) ) ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override {

AU . addRequired < MachineModuleInfo > ( ) ;


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override { AU . addRequired < MachineModuleInfo > ( ) ; MachineFunctionPass :: getAnalysisUsage ( AU ) ;


<s> const char * getPassName ( ) const override {


<s> unsigned NEONThumb2V8PostEncoder ( const MachineInstr & MI , unsigned Val ) const { return <NUM_LIT> ;


<s> MJTEs = nullptr ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; IsThumb = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getName ( ) << <STR_LIT> ) ;


<s> II = ( const <ISA_LIT>BaseInstrInfo * ) MF . getTarget ( ) . getInstrInfo ( ) ; TD = MF . getTarget ( ) . getDataLayout ( ) ; Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; IsThumb = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getName ( ) << <STR_LIT> ) ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ; MBB != E ; ++ MBB ) { MCE . StartMachineBasicBlock ( MBB ) ; for ( MachineBasicBlock :: iterator I = MBB -> begin ( ) , E = MBB -> end ( ) ;

I != E ; ++ I ) emitInstruction ( * I ) ;


<s> } ) ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) -> isFloatTy ( ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else if ( CFP -> getType ( ) -> isDoubleTy ( ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else { llvm_unreachable ( <STR_LIT> ) ; } } else { llvm_unreachable ( <STR_LIT> ) ;


<s> MachineRelocation MR = Indirect ? MachineRelocation :: getIndirectSymbol ( MCE . getCurrentPCOffset ( ) , Reloc , GV , ACPV , MayNeedFarStub ) : MachineRelocation :: getGV ( MCE . getCurrentPCOffset ( ) , Reloc , GV , ACPV , MayNeedFarStub ) ;


<s> if ( ImplicitRd ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ;

unsigned AM2Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: emitMOVi2piecesInstruction ( const MachineInstr & MI ) { const MachineOperand & MO0 = MI . getOperand ( <NUM_LIT> ) ; const MachineOperand & MO1 = MI . getOperand ( <NUM_LIT> ) ; assert ( MO1 . isImm ( ) && <STR_LIT> ( MO1 . isImm ( ) ) != - <NUM_LIT> && <STR_LIT> ) ; unsigned V1 = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned V2 = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineSoImmOpValue ( V1 ) ; emitWordLE ( Binary ) ; Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ;


<s> break ; case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitDataProcessingInstruction ( MI , <NUM_LIT> , <STR_LIT> ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitLoadStoreInstruction ( MI , <NUM_LIT> , <STR_LIT> ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitMiscLoadStoreInstruction ( MI , <STR_LIT> ) ; break ; } case <STR_LIT> :


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; switch ( Form ) { default : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; break ; case <STR_LIT> : Binary |= encodeVFPRn ( MI , <NUM_LIT> ) ; break ; case <STR_LIT> : Binary |= encodeVFPRm ( MI , <NUM_LIT> ) ; break ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; ++ NumRegs ;


<s> unsigned <ISA_LIT>CodeEmitter :: getMachineSoRegOpValue ( const MachineInstr & MI , const TargetInstrDesc & TID , const MachineOperand & MO , unsigned OpIdx ) { unsigned Binary = getMachineOpValue ( MI , MO ) ; const MachineOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MachineOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) {


<s> MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; JTI -> Initialize ( MF , IsPIC ) ; MCE . setModuleInfo ( & getAnalysis < MachineModuleInfo > ( ) ) ; do {

DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ;


<s> JTI -> Initialize ( MF , IsPIC ) ; MCE . setModuleInfo ( & getAnalysis < MachineModuleInfo > ( ) ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ; MBB != E ; ++ MBB ) { MCE . StartMachineBasicBlock ( MBB ) ;

for ( MachineBasicBlock :: const_iterator I = MBB -> begin ( ) , E = MBB -> end ( ) ;


<s> TD = ( ( const <ISA_LIT>TargetMachine & ) MF . getTarget ( ) ) . getTargetData ( ) ; Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; IsThumb = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ; MBB != E ; ++ MBB ) { MCE . StartMachineBasicBlock ( MBB ) ; for ( MachineBasicBlock :: iterator I = MBB -> begin ( ) , E = MBB -> end ( ) ; I != E ; ++ I ) emitInstruction ( * I ) ;


<s> Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = <NUM_LIT> ; if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; IsThumb = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: addPCLabel ( unsigned LabelID ) { DOUT << <STR_LIT> << LabelID << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << '\n' ;

JTI -> addPCLabelAddr ( LabelID , MCE . getCurrentPCValue ( ) ) ;


<s> <ISA_LIT>CodeEmitter ( TargetMachine & tm , MachineCodeEmitter & mce , const <ISA_LIT>InstrInfo & ii , const TargetData & td ) : MachineFunctionPass ( & ID ) , JTI ( <NUM_LIT> ) , II ( & ii ) , TD ( & td ) , TM ( tm ) , MCE ( mce ) , MCPEs ( <NUM_LIT> ) , MJTEs ( <NUM_LIT> ) , IsPIC ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) {


<s> return new <ISA_LIT>CodeEmitter ( TM , MCE ) ;


<s> void <ISA_LIT>CodeEmitter :: emitBranchInstruction ( const MachineInstr & MI ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; if ( TID . Opcode == <STR_LIT> ) abort ( ) ;

unsigned Binary = getBinaryCodeForInstr ( MI ) ;


<s> const TargetInstrDesc & TID = MI . getDesc ( ) ; if ( TID . Opcode == <STR_LIT> ) abort ( ) ; unsigned Binary = getBinaryCodeForInstr ( MI ) ;

Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;


<s> else emitGlobalAddress ( GV , <STR_LIT> , ACPV -> isStub ( ) || isa < Function > ( GV ) , ( intptr_t ) ACPV ) ; } else { assert ( ! ACPV -> isNonLazyPointer ( ) && <STR_LIT> ) ; emitExternalSymbolAddress ( ACPV -> getSymbol ( ) , <STR_LIT> ) ; } emitWordLE ( <NUM_LIT> ) ; } else { Constant * CV = MCPE . Val . ConstVal ; DOUT << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) DOUT << F -> getName ( ) ; else DOUT << * CV ; DOUT << '\n' ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) == Type :: FloatTy ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else if ( CFP -> getType ( ) == Type :: DoubleTy ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else { assert ( <NUM_LIT> && <STR_LIT> ) ; abort ( ) ; } } else { assert ( <NUM_LIT> && <STR_LIT> ) ; abort ( ) ; } }


<s> bool isUnary = TID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; ++ OpIdx ; } } const MachineOperand & MO = MI . getOperand ( OpIdx ) ; if ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) { emitWordLE ( Binary | getMachineSoRegOpValue ( MI , TID , MO , OpIdx ) ) ; return ; } if ( MO . isReg ( ) ) { emitWordLE ( Binary | <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ) ; return ;


<s> bool isUnary = TID . TSFlags & <STR_LIT> ; if ( ! isUnary ) { if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else { Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; ++ OpIdx ; } } const MachineOperand & MO = MI . getOperand ( OpIdx ) ; if ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) { emitWordLE ( Binary | getMachineSoRegOpValue ( MI , TID , MO , OpIdx ) ) ; return ; }


<s> DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << ( unsigned ) Binary << std :: dec << <STR_LIT> ; DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << ( unsigned ) ( Binary >> <NUM_LIT> ) << std :: dec << <STR_LIT> ;


<s> JTI -> addJumpTableBaseAddr ( JTIndex , JTBase ) ; DOUT << <STR_LIT> << JTIndex << <STR_LIT> << ( void * ) JTBase << '\n' ; const std :: vector < MachineBasicBlock * > & MBBs = ( * MJTEs ) [ JTIndex ] . MBBs ; for ( unsigned i = <NUM_LIT> , e = MBBs . size ( ) ; i != e ; ++ i ) { if ( IsPIC ) emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> , JTBase ) ;

else emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> ) ;


<s> case <STR_LIT> : case <STR_LIT> : emitLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : emitVFPConversionInstruction ( MI ) ; break ; case <STR_LIT> : emitVFPLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> :

emitVFPLoadStoreMultipleInstruction ( MI ) ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ;

if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ;


<s> const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ;

assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ;


<s> if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) { emitDataProcessingInstruction ( MI , <STR_LIT> ) ; unsigned JTIndex = ( TID . Opcode == <STR_LIT> ) ? MI . getOperand ( <NUM_LIT> ) . getIndex ( ) : MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ; emitInlineJumpTable ( JTIndex ) ; return ; } else if ( TID . Opcode == <STR_LIT> ) { emitLoadStoreInstruction ( MI , <STR_LIT> ) ; emitInlineJumpTable ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ) ; return ; } unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> ) Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , <NUM_LIT> ) ; emitWordLE ( Binary ) ;


<s> } Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO2 . getReg ( ) ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; if ( unsigned ImmOffs = <STR_LIT> ( AM3Opc ) ) { Binary |= ( ImmOffs >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( ImmOffs & <NUM_LIT> ) ; }


<s> void <ISA_LIT>CodeEmitter :: emitMOVi2piecesInstruction ( const MachineInstr & MI ) { const MachineOperand & MO0 = MI . getOperand ( <NUM_LIT> ) ; const MachineOperand & MO1 = MI . getOperand ( <NUM_LIT> ) ; assert ( MO1 . isImm ( ) && <STR_LIT> ) ; unsigned V1 = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned V2 = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO0 ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineSoImmOpValue ( <STR_LIT> ( V1 ) ) ; emitWordLE ( Binary ) ; Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;


<s> abort ( ) ; } break ; } case TargetInstrInfo :: DBG_LABEL : case TargetInstrInfo :: EH_LABEL : MCE . emitLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; break ; case TargetInstrInfo :: IMPLICIT_DEF : case TargetInstrInfo :: DECLARE : case <STR_LIT> : break ; case <STR_LIT> : emitConstPoolInstruction ( MI ) ; break ; case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; emitDataProcessingInstruction ( MI , <NUM_LIT> , <STR_LIT> ) ; break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { addPCLabel ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ;

emitLoadStoreInstruction ( MI , <NUM_LIT> , <STR_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: emitVFPLoadStoreMultipleInstruction ( const MachineInstr & MI ) { unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ;


<s> void <ISA_LIT>CodeEmitter :: emitVFPLoadStoreMultipleInstruction ( const MachineInstr & MI ) { unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; ++ NumRegs ;


<s> void <ISA_LIT>CodeEmitter :: emitWordLE ( unsigned Binary ) { DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << Binary << std :: dec << <STR_LIT> ; MCE . emitWordLE ( Binary ) ;


<s> DOUT << <STR_LIT> << std :: hex << std :: setw ( <NUM_LIT> ) << std :: setfill ( '0' ) << Binary << std :: dec << <STR_LIT> ;


<s> RegD = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegD , isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegD << <STR_LIT> ; else {

Binary |= ( ( RegD & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ;


<s> RegM = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegM , isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegM ; else { Binary |= ( ( RegM & <NUM_LIT> ) >> <NUM_LIT> ) ; Binary |= ( RegM & <NUM_LIT> ) << <STR_LIT> ; }


<s> bool isSPVFP = false ; RegN = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegN , isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegN << <STR_LIT> ; else { Binary |= ( ( RegN & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( RegN & <NUM_LIT> ) << <STR_LIT> ; } return Binary ;


<s> unsigned RegN = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = false ;

RegN = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegN , isSPVFP ) ;


<s> case <STR_LIT> : Binary |= <NUM_LIT> << <STR_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> << <STR_LIT> ; break ;


<s> else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Reloc = ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ;


<s> else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true ) ; else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Reloc = ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ; else { cerr << <STR_LIT> << MO << <STR_LIT> ; abort ( ) ;


<s> unsigned <ISA_LIT>CodeEmitter :: getMachineSoImmOpValue ( unsigned SoImm ) {

unsigned Binary = ( <STR_LIT> ( SoImm ) >> <NUM_LIT> ) << <STR_LIT> ;


<s> unsigned Binary = ( <STR_LIT> ( SoImm ) >> <NUM_LIT> ) << <STR_LIT> ;


<s> switch ( SOpc ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ;


<s> default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> bool <ISA_LIT>CodeEmitter :: runOnMachineFunction ( MachineFunction & MF ) { assert ( ( MF . getTarget ( ) . getRelocationModel ( ) != Reloc :: Default || MF . getTarget ( ) . getRelocationModel ( ) != Reloc :: Static ) && <STR_LIT> ) ; II = ( ( <ISA_LIT>TargetMachine & ) MF . getTarget ( ) ) . getInstrInfo ( ) ; TD = ( ( <ISA_LIT>TargetMachine & ) MF . getTarget ( ) ) . getTargetData ( ) ; JTI = ( ( <ISA_LIT>TargetMachine & ) MF . getTarget ( ) ) . getJITInfo ( ) ; MCPEs = & MF . getConstantPool ( ) -> getConstants ( ) ; MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; JTI -> Initialize ( MF , IsPIC ) ; do { DOUT << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ;


<s> <ISA_LIT>CodeEmitter ( TargetMachine & tm , JITCodeEmitter & mce ) : MachineFunctionPass ( & ID ) , JTI ( <NUM_LIT> ) , II ( ( <ISA_LIT>InstrInfo * ) tm . getInstrInfo ( ) ) , TD ( tm . getTargetData ( ) ) , TM ( tm ) , MCE ( mce ) , MCPEs ( <NUM_LIT> ) , MJTEs ( <NUM_LIT> ) , IsPIC ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) {


<s> void <ISA_LIT>CodeEmitter :: emitConstPoolAddress ( unsigned CPI , unsigned Reloc ) {

MCE . addRelocation ( MachineRelocation :: getConstPool ( MCE . getCurrentPCOffset ( ) , Reloc , CPI , <NUM_LIT> , true ) ) ;


<s> MCE . addRelocation ( MachineRelocation :: getConstPool ( MCE . getCurrentPCOffset ( ) , Reloc , CPI , <NUM_LIT> , true ) ) ;


<s> if ( GV ) { Reloc :: Model RelocM = TM . getRelocationModel ( ) ; emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , Subtarget -> GVIsIndirectSymbol ( GV , RelocM ) , ( intptr_t ) ACPV ) ; } else { emitExternalSymbolAddress ( ACPV -> getSymbol ( ) , <STR_LIT> ) ; } emitWordLE ( <NUM_LIT> ) ; } else { const Constant * CV = MCPE . Val . ConstVal ; DEBUG ( { errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) -> isFloatTy ( ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else if ( CFP -> getType ( ) -> isDoubleTy ( ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else { llvm_unreachable ( <STR_LIT> ) ; } } else { llvm_unreachable ( <STR_LIT> ) ; } }


<s> errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) -> isFloatTy ( ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ;

else if ( CFP -> getType ( ) -> isDoubleTy ( ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , TID ) ; unsigned NumDefs = TID . getNumDefs ( ) ; unsigned OpIdx = <NUM_LIT> ; if ( NumDefs ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; else if ( ImplicitRd ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRd ) << <STR_LIT> ) ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; bool isUnary = TID . TSFlags & <STR_LIT> ; if ( ! isUnary ) {

if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; const MachineOperand & MO1 = MI . getOperand ( OpIdx ++ ) ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; if ( MO2 . isReg ( ) ) { Binary |= getMachineOpValue ( MI , MO1 ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , MO2 ) ; ++ OpIdx ; } else { Binary |= getMachineOpValue ( MI , MO1 ) ; } if ( MI . getOperand ( OpIdx ) . isImm ( ) && ! TID . OpInfo [ OpIdx ] . isPredicate ( ) && ! TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) Binary |= ( getMachineOpValue ( MI , OpIdx ) / <NUM_LIT> ) << <STR_LIT> ;


<s> MCE . addRelocation ( MachineRelocation :: getExtSym ( MCE . getCurrentPCOffset ( ) , Reloc , ES ) ) ;


<s> void <ISA_LIT>CodeEmitter :: emitExternalSymbolAddress ( const char * ES , unsigned Reloc ) {

MCE . addRelocation ( MachineRelocation :: getExtSym ( MCE . getCurrentPCOffset ( ) , Reloc , ES ) ) ;


<s> void <ISA_LIT>CodeEmitter :: emitGlobalAddress ( const GlobalValue * GV , unsigned Reloc , bool MayNeedFarStub , bool Indirect , intptr_t ACPV ) {

MachineRelocation MR = Indirect ? MachineRelocation :: getIndirectSymbol ( MCE . getCurrentPCOffset ( ) , Reloc , const_cast < GlobalValue * > ( GV ) , ACPV , MayNeedFarStub ) : MachineRelocation :: getGV ( MCE . getCurrentPCOffset ( ) , Reloc , const_cast < GlobalValue * > ( GV ) , ACPV , MayNeedFarStub ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; break ; } case <STR_LIT> : emitPseudoInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitDataProcessingInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ;


<s> void <ISA_LIT>CodeEmitter :: emitJumpTableAddress ( unsigned JTIndex , unsigned Reloc ) { MCE . addRelocation ( MachineRelocation :: getJumpTable ( MCE . getCurrentPCOffset ( ) , Reloc , JTIndex , <NUM_LIT> , true ) ) ;


<s> void <ISA_LIT>CodeEmitter :: emitLEApcrelJTInstruction ( const MachineInstr & MI ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , TID ) ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) << <STR_LIT> ;


<s> unsigned Binary = <NUM_LIT> << <NUM_LIT> ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; Binary |= getAddrModeSBit ( MI , TID ) ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) << <STR_LIT> ; Binary |= <NUM_LIT> << <STR_LIT> ; emitJumpTableAddress ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) , <STR_LIT> ) ;


<s> else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM2Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM2Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( ! MO2 . getReg ( ) ) { if ( <STR_LIT> ( AM2Opc ) ) Binary |= <STR_LIT> ( AM2Opc ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO2 . getReg ( ) ) ) ; Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO2 . getReg ( ) ) ; if ( unsigned ShImm = <STR_LIT> ( AM2Opc ) ) { Binary |= getShiftOp ( AM2Opc ) << <STR_LIT> ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( OpIdx ++ ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ; Binary |= <NUM_LIT> << RegNum ; }


<s> void <ISA_LIT>CodeEmitter :: emitMachineBasicBlock ( MachineBasicBlock * BB , unsigned Reloc , intptr_t JTBase ) { MCE . addRelocation ( MachineRelocation :: getBB ( MCE . getCurrentPCOffset ( ) , Reloc , BB , JTBase ) ) ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( OpIdx ++ ) ; if ( OpIdx == TID . getNumOperands ( ) || TID . OpInfo [ OpIdx ] . isPredicate ( ) || TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) { Binary |= getMachineOpValue ( MI , MO ) ; emitWordLE ( Binary ) ; return ; } Binary |= getMachineOpValue ( MI , MO ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ;

unsigned ShiftAmt = MI . getOperand ( OpIdx ) . getImm ( ) ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( OpIdx ++ ) ; if ( OpIdx == TID . getNumOperands ( ) || TID . OpInfo [ OpIdx ] . isPredicate ( ) || TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) { Binary |= getMachineOpValue ( MI , MO ) ;


<s> emitLoadStoreInstruction ( MI , <STR_LIT> ) ; emitInlineJumpTable ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ) ; return ; } unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ;

if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ;


<s> emitInlineJumpTable ( MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ) ; return ; } unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( <STR_LIT> ) ;

else Binary |= getMachineOpValue ( MI , <NUM_LIT> ) ;


<s> unsigned Binary = getBinaryCodeForInstr ( MI ) ; Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; emitWordLE ( Binary ) ;


<s> Skipped = true ; } Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( TID . Opcode == <STR_LIT> || TID . Opcode == <STR_LIT> ) ++ OpIdx ; if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO2 . getReg ( ) ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; if ( unsigned ImmOffs = <STR_LIT> ( AM3Opc ) ) { Binary |= ( ImmOffs >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( ImmOffs & <NUM_LIT> ) ;


<s> if ( ImplicitRn ) Binary |= ( <ISA_LIT>RegisterInfo :: getRegisterNumbering ( ImplicitRn ) << <STR_LIT> ) ; else Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( ! Skipped && TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ; const MachineOperand & MO2 = MI . getOperand ( OpIdx ) ; unsigned AM3Opc = ( ImplicitRn == <STR_LIT> ) ? <NUM_LIT> : MI . getOperand ( OpIdx + <NUM_LIT> ) . getImm ( ) ; Binary |= ( ( <STR_LIT> ( AM3Opc ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ) << <STR_LIT> ) ; if ( MO2 . getReg ( ) ) { Binary |= <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO2 . getReg ( ) ) ; emitWordLE ( Binary ) ; return ; } Binary |= <NUM_LIT> << <STR_LIT> ; if ( unsigned ImmOffs = <STR_LIT> ( AM3Opc ) ) { Binary |= ( ImmOffs >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( ImmOffs & <NUM_LIT> ) ; } emitWordLE ( Binary ) ;


<s> unsigned OpIdx = <NUM_LIT> ; if ( TID . getNumDefs ( ) == <NUM_LIT> ) Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) ;


<s> Binary |= getMachineOpValue ( MI , OpIdx ++ ) ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; if ( TID . getNumOperands ( ) > OpIdx && ! TID . OpInfo [ OpIdx ] . isPredicate ( ) && ! TID . OpInfo [ OpIdx ] . isOptionalDef ( ) ) Binary |= getMachineOpValue ( MI , OpIdx ) << <STR_LIT> ; emitWordLE ( Binary ) ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= getMachineOpValue ( MI , <NUM_LIT> ) << <STR_LIT> ; switch ( Opcode ) {


<s> assert ( ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && ( Binary & <STR_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; Binary |= encodeVFPRd ( MI , OpIdx ++ ) ; if ( TID . getOperandConstraint ( OpIdx , TOI :: TIED_TO ) != - <NUM_LIT> ) ++ OpIdx ;

if ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) Binary |= encodeVFPRn ( MI , OpIdx ++ ) ;


<s> switch ( Form ) { default : break ; case <STR_LIT> : Binary |= encodeVFPRm ( MI , <NUM_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : Binary |= encodeVFPRn ( MI , <NUM_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : Binary |= encodeVFPRd ( MI , <NUM_LIT> ) ; break ; } if ( Form == <STR_LIT> ) Binary |= encodeVFPRn ( MI , <NUM_LIT> ) ; else if ( Form == <STR_LIT> ) Binary |= encodeVFPRm ( MI , <NUM_LIT> ) ; emitWordLE ( Binary ) ;


<s> Binary |= II -> getPredicate ( & MI ) << <STR_LIT> ; unsigned OpIdx = <NUM_LIT> ; if ( IsUpdating ) ++ OpIdx ; Binary |= getMachineOpValue ( MI , OpIdx ++ ) << <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( OpIdx ++ ) ; Binary |= getAddrModeUPBits ( <STR_LIT> ( MO . getImm ( ) ) ) ; if ( IsUpdating ) Binary |= <NUM_LIT> << <STR_LIT> ; Binary |= encodeVFPRd ( MI , OpIdx + <NUM_LIT> ) ; unsigned NumRegs = <NUM_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; ++ NumRegs ; } Binary |= NumRegs * <NUM_LIT> ; emitWordLE ( Binary ) ;


<s> unsigned RegD = MI . getOperand ( OpIdx ) . getReg ( ) ; unsigned Binary = <NUM_LIT> ; bool isSPVFP = false ; RegD = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegD , & isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegD << <STR_LIT> ; else { Binary |= ( ( RegD & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ;

Binary |= ( RegD & <NUM_LIT> ) << <STR_LIT> ;


<s> unsigned Binary = <NUM_LIT> ; bool isSPVFP = false ; RegM = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegM , & isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegM ; else { Binary |= ( ( RegM & <NUM_LIT> ) >> <NUM_LIT> ) ; Binary |= ( RegM & <NUM_LIT> ) << <STR_LIT> ;


<s> unsigned Binary = <NUM_LIT> ; bool isSPVFP = false ; RegN = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RegN , & isSPVFP ) ; if ( ! isSPVFP ) Binary |= RegN << <STR_LIT> ; else { Binary |= ( ( RegN & <NUM_LIT> ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= ( RegN & <NUM_LIT> ) << <STR_LIT> ; } return Binary ;


<s> if ( MO . isReg ( ) && MO . isDef ( ) && MO . getReg ( ) == <STR_LIT> ) return <NUM_LIT> << <STR_LIT> ; } return <NUM_LIT> ;


<s> unsigned <ISA_LIT>CodeEmitter :: getMachineOpValue ( const MachineInstr & MI , const MachineOperand & MO ) { if ( MO . isReg ( ) ) return <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ; else if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; else if ( MO . isGlobal ( ) ) emitGlobalAddress ( MO . getGlobal ( ) , <STR_LIT> , true , false ) ; else if ( MO . isSymbol ( ) ) emitExternalSymbolAddress ( MO . getSymbolName ( ) , <STR_LIT> ) ; else if ( MO . isCPI ( ) ) { const TargetInstrDesc & TID = MI . getDesc ( ) ; unsigned Reloc = ( ( TID . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; emitConstPoolAddress ( MO . getIndex ( ) , Reloc ) ; } else if ( MO . isJTI ( ) ) emitJumpTableAddress ( MO . getIndex ( ) , <STR_LIT> ) ; else if ( MO . isMBB ( ) ) emitMachineBasicBlock ( MO . getMBB ( ) , <STR_LIT> ) ; else { errs ( ) << MO ; llvm_unreachable ( <NUM_LIT> ) ; } return <NUM_LIT> ;


<s> if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT> ) return Binary ; if ( Rs ) {

assert ( <STR_LIT> ( MO2 . getImm ( ) ) == <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>CodeEmitter :: getShiftOp ( unsigned Imm ) const { switch ( <STR_LIT> ( Imm ) ) {

default : llvm_unreachable ( <STR_LIT> ) ;


<s> if ( MF . getJumpTableInfo ( ) ) MJTEs = & MF . getJumpTableInfo ( ) -> getJumpTables ( ) ; IsPIC = TM . getRelocationModel ( ) == Reloc :: PIC_ ; JTI -> Initialize ( MF , IsPIC ) ; MMI = & getAnalysis < MachineModuleInfo > ( ) ; MCE . setModuleInfo ( MMI ) ; do { DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ) ; MCE . startFunction ( MF ) ; for ( MachineFunction :: iterator MBB = MF . begin ( ) , E = MF . end ( ) ;


<s> DOUT ( llvm :: dbgs ( ) << <STR_LIT> << LabelID << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << '\n' ) ; JTI -> addPCLabelAddr ( LabelID , MCE . getCurrentPCValue ( ) ) ;


<s> DEBUG ( { errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ;

} else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) {


<s> errs ( ) << <STR_LIT> << CPI << <STR_LIT> << ( void * ) MCE . getCurrentPCValue ( ) << <STR_LIT> ; if ( const Function * F = dyn_cast < Function > ( CV ) ) errs ( ) << F -> getName ( ) ; else errs ( ) << * CV ; errs ( ) << '\n' ; } ) ; if ( GlobalValue * GV = dyn_cast < GlobalValue > ( CV ) ) { emitGlobalAddress ( GV , <STR_LIT> , isa < Function > ( GV ) , false ) ; emitWordLE ( <NUM_LIT> ) ; } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( CV ) ) { uint32_t Val = * ( uint32_t * ) CI -> getValue ( ) . getRawData ( ) ; emitWordLE ( Val ) ; } else if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( CV ) ) { if ( CFP -> getType ( ) == Type :: getFloatTy ( CFP -> getContext ( ) ) ) emitWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else if ( CFP -> getType ( ) == Type :: getDoubleTy ( CFP -> getContext ( ) ) ) emitDWordLE ( CFP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ) ; else {


<s> for ( unsigned i = <NUM_LIT> , e = MBBs . size ( ) ; i != e ; ++ i ) { if ( IsPIC ) emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> , JTBase ) ;

else emitMachineBasicBlock ( MBBs [ i ] , <STR_LIT> ) ;


<s> emitMiscLoadStoreInstruction ( MI ) ; break ; case <STR_LIT> : emitLoadStoreMultipleInstruction ( MI ) ; break ; case <STR_LIT> : emitMulFrmInstruction ( MI ) ; break ; case <STR_LIT> : emitExtendInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscArithInstruction ( MI ) ; break ; case <STR_LIT> : emitBranchInstruction ( MI ) ; break ; case <STR_LIT> : emitMiscBranchInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : emitVFPArithInstruction ( MI ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : emitVFPConversionInstruction ( MI ) ; break ; case <STR_LIT> : emitVFPLoadStoreInstruction ( MI ) ;


<s> void Emitter < CodeEmitter > :: emitWordLE ( unsigned Binary ) { DOUT ( llvm :: dbgs ( ) << <STR_LIT> ;

llvm :: dbgs ( ) . write_hex ( Binary ) << <STR_LIT> ; ) ;


<s> if ( <STR_LIT> ( MO . getImm ( ) ) ) Binary |= <NUM_LIT> << <STR_LIT> ; for ( unsigned i = OpIdx + <NUM_LIT> , e = MI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || MO . isImplicit ( ) ) break ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( MO . getReg ( ) ) ; assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && RegNum < <NUM_LIT> ) ; Binary |= <NUM_LIT> << RegNum ;