<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override { LoopPass :: getAnalysisUsage ( AU ) ; AU . addRequired < AssumptionCacheTracker > ( ) ; AU . addRequired < ScalarEvolutionWrapperPass > ( ) ; AU . addRequired < AAResultsWrapperPass > ( ) ; AU . addRequired < TargetLibraryInfoWrapperPass > ( ) ; AU . addRequired < LoopInfoWrapperPass > ( ) ; AU . addRequired < DominatorTreeWrapperPass > ( ) ; AU . addRequired < TargetPassConfig > ( ) ; AU . addPreserved < LoopInfoWrapperPass > ( ) ;


<s> bool <ISA_LIT>ParallelDSP :: InsertParallelMACs ( Reduction & Reduction ) { Instruction * Acc = Reduction . Phi ; Instruction * InsertAfter = Reduction . AccIntAdd ; for ( auto & Pair : Reduction . PMACPairs ) { BinOpChain * PMul0 = Pair . first ; BinOpChain * PMul1 = Pair . second ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; dbgs ( ) << <STR_LIT> ; PMul0 -> Root -> dump ( ) ; dbgs ( ) << <STR_LIT> ; PMul1 -> Root -> dump ( ) ) ; auto * VecLd0 = cast < LoadInst > ( PMul0 -> VecLd [ <NUM_LIT> ] ) ; auto * VecLd1 = cast < LoadInst > ( PMul1 -> VecLd [ <NUM_LIT> ] ) ; Acc = CreateSMLADCall ( VecLd0 , VecLd1 , Acc , PMul1 -> Exchange , InsertAfter ) ; InsertAfter = Acc ;


<s> } else if ( match ( V , m_Add ( m_Value ( LHS ) , m_Value ( RHS ) ) ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; I -> dump ( ) ) ; return false ; } else if ( match ( V , m_ZExtOrSExt ( m_Value ( Val ) ) ) ) { if ( cast < CastInst > ( I ) -> getSrcTy ( ) -> getIntegerBitWidth ( ) != MaxBitWidth ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << cast < CastInst > ( I ) -> getSrcTy ( ) -> getIntegerBitWidth ( ) << <STR_LIT> ) ; return false ; }

if ( match ( Val , m_Load ( m_Value ( ) ) ) ) {


<s> static void MatchParallelMACSequences ( Reduction & R , OpChainList & Candidates ) { Instruction * Acc = R . AccIntAdd ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << * Acc ) ; std :: function < bool ( Value * ) > Match = [ & Candidates , & Match ] ( Value * V ) -> bool { auto * I = dyn_cast < Instruction > ( V ) ; if ( ! I ) return false ; switch ( I -> getOpcode ( ) ) { case Instruction :: Add : if ( Match ( I -> getOperand ( <NUM_LIT> ) ) || ( Match ( I -> getOperand ( <NUM_LIT> ) ) ) ) return true ; break ; case Instruction :: Mul : { Value * MulOp0 = I -> getOperand ( <NUM_LIT> ) ; Value * MulOp1 = I -> getOperand ( <NUM_LIT> ) ; if ( isa < SExtInst > ( MulOp0 ) && isa < SExtInst > ( MulOp1 ) ) AddMACCandidate ( Candidates , I , MulOp0 , MulOp1 ) ;


<s> case Instruction :: Add : if ( Match ( I -> getOperand ( <NUM_LIT> ) ) || ( Match ( I -> getOperand ( <NUM_LIT> ) ) ) ) return true ; break ; case Instruction :: Mul : { Value * MulOp0 = I -> getOperand ( <NUM_LIT> ) ; Value * MulOp1 = I -> getOperand ( <NUM_LIT> ) ; if ( isa < SExtInst > ( MulOp0 ) && isa < SExtInst > ( MulOp1 ) ) AddMACCandidate ( Candidates , I , MulOp0 , MulOp1 ) ;


<s> if ( ! TheLoop -> getLoopPreheader ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return ; } for ( PHINode & Phi : Header -> phis ( ) ) { const auto * Ty = Phi . getType ( ) ; if ( ! Ty -> isIntegerTy ( <NUM_LIT> ) && ! Ty -> isIntegerTy ( <NUM_LIT> ) ) continue ; const bool IsReduction = RecurrenceDescriptor :: AddReductionVar ( & Phi , RecurrenceDescriptor :: RK_IntegerAdd , TheLoop , HasFnNoNaNAttr , RecDesc ) ; if ( ! IsReduction ) continue ;

Instruction * Acc = dyn_cast < Instruction > ( Phi . getIncomingValueForBlock ( Latch ) ) ;


<s> dbgs ( ) << <STR_LIT> ; Header -> dump ( ) ; dbgs ( ) << <STR_LIT> ; L -> dump ( ) ) ; bool Changed = false ; ReductionList Reductions ; MatchReductions ( F , L , Header , Reductions ) ; for ( auto & R : Reductions ) { OpChainList MACCandidates ; MatchParallelMACSequences ( R , MACCandidates ) ; if ( ! CheckMACMemory ( MACCandidates ) ) continue ; R . MACCandidates = std :: move ( MACCandidates ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; for ( auto & M : R . MACCandidates ) M -> Root -> dump ( ) ; dbgs ( ) << <STR_LIT> ; ) ; } Instructions Reads , Writes ; AliasCandidates ( Header , Reads , Writes ) ;


<s> OpChain ( Instruction * I , ValueList & vl ) : Root ( I ) , AllValues ( vl ) {


<s> for ( auto * Ld1 : Loads ) { if ( Ld0 == Ld1 ) continue ; if ( AreSequentialAccesses < LoadInst > ( Ld0 , Ld1 , * DL , * SE ) ) { LoadPairs [ Ld0 ] = Ld1 ; if ( BaseLoads . count ( Ld0 ) ) { LoadInst * Base = BaseLoads [ Ld0 ] ; BaseLoads [ Ld1 ] = Base ; SequentialLoads [ Base ] . push_back ( Ld1 ) ;


<s> for ( auto * Ld0 : Loads ) { for ( auto * Ld1 : Loads ) { if ( Ld0 == Ld1 ) continue ; if ( AreSequentialAccesses < LoadInst > ( Ld0 , Ld1 , * DL , * SE ) ) { LoadPairs [ Ld0 ] = Ld1 ; if ( BaseLoads . count ( Ld0 ) ) { LoadInst * Base = BaseLoads [ Ld0 ] ; BaseLoads [ Ld1 ] = Base ; SequentialLoads [ Base ] . push_back ( Ld1 ) ; } else { BaseLoads [ Ld1 ] = Ld0 ; SequentialLoads [ Ld0 ] . push_back ( Ld1 ) ; } } } }

return LoadPairs . size ( ) > <NUM_LIT> ;


<s> L = TheLoop ; SE = & getAnalysis < ScalarEvolutionWrapperPass > ( ) . getSE ( ) ; AA = & getAnalysis < AAResultsWrapperPass > ( ) . getAAResults ( ) ; TLI = & getAnalysis < TargetLibraryInfoWrapperPass > ( ) . getTLI ( ) ; DT = & getAnalysis < DominatorTreeWrapperPass > ( ) . getDomTree ( ) ; LI = & getAnalysis < LoopInfoWrapperPass > ( ) . getLoopInfo ( ) ; auto & TPC = getAnalysis < TargetPassConfig > ( ) ; BasicBlock * Header = TheLoop -> getHeader ( ) ; if ( ! Header ) return false ; if ( Header != TheLoop -> getLoopLatch ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> <STR_LIT> ) ; return false ;


<s> for ( auto * V : AllValues ) { if ( auto * I = dyn_cast < Instruction > ( V ) ) {

if ( I -> mayWriteToMemory ( ) ) ReadOnly = false ;


<s> const auto Size = LocationSize :: unknown ( ) ; for ( auto * V : AllValues ) { if ( auto * I = dyn_cast < Instruction > ( V ) ) { if ( I -> mayWriteToMemory ( ) ) ReadOnly = false ; if ( auto * Ld = dyn_cast < LoadInst > ( V ) ) MemLocs . push_back ( MemoryLocation ( Ld -> getPointerOperand ( ) , Size ) ) ;


<s> unsigned size ( ) const { return AllValues . size ( ) ;


<s> uint64_t plt_base = m_Section . addr ( ) ; assert ( plt_base && <STR_LIT> ) ; uint64_t got_base = m_GOT . addr ( ) ; assert ( got_base && <STR_LIT> ) ; uint32_t offset = <NUM_LIT> ; if ( got_base > plt_base ) offset = got_base - ( plt_base + <NUM_LIT> ) ; else offset = ( plt_base + <NUM_LIT> ) - got_base ; iterator first = m_pSectionData -> getFragmentList ( ) . begin ( ) ; assert ( first != m_pSectionData -> getFragmentList ( ) . end ( ) && <STR_LIT> ) ; <ISA_LIT>PLT0 * plt0 = & ( llvm :: cast < <ISA_LIT>PLT0 > ( * first ) ) ; uint32_t * data = <NUM_LIT> ; data = static_cast < uint32_t * > ( malloc ( <ISA_LIT>PLT0 :: EntrySize ) ) ; if ( ! data ) fatal ( diag :: fail_allocate_memory_plt ) ; memcpy ( data , arm_plt0 , <ISA_LIT>PLT0 :: EntrySize ) ; data [ <NUM_LIT> ] = offset ; plt0 -> setValue ( reinterpret_cast < unsigned char * > ( data ) ) ;


<s> uint64_t PLT1EntrySize = <ISA_LIT>PLT1 :: EntrySize ; <ISA_LIT>PLT1 * plt1 = NULL ; uint32_t * Out = NULL ; while ( it != ie ) { plt1 = & ( llvm :: cast < <ISA_LIT>PLT1 > ( * it ) ) ; Out = static_cast < uint32_t * > ( malloc ( <ISA_LIT>PLT1 :: EntrySize ) ) ; if ( ! Out ) fatal ( diag :: fail_allocate_memory_plt ) ; int32_t Offset = ( GOTEntryAddress - ( PLTEntryAddress + <NUM_LIT> ) ) ; Out [ <NUM_LIT> ] = arm_plt1 [ <NUM_LIT> ] | ( ( Offset >> <NUM_LIT> ) & <NUM_LIT> ) ; Out [ <NUM_LIT> ] = arm_plt1 [ <NUM_LIT> ] | ( ( Offset >> <NUM_LIT> ) & <NUM_LIT> ) ; Out [ <NUM_LIT> ] = arm_plt1 [ <NUM_LIT> ] | ( Offset & <NUM_LIT> ) ; plt1 -> setValue ( reinterpret_cast < unsigned char * > ( Out ) ) ; ++ it ; GOTEntryAddress += GOTEntrySize ; PLTEntryAddress += PLT1EntrySize ;


<s> <ISA_LIT>PLT0 :: <ISA_LIT>PLT0 ( SectionData & pParent ) : PLT :: Entry < sizeof ( arm_plt0 ) > ( pParent ) {


<s> <ISA_LIT>PLT1 :: <ISA_LIT>PLT1 ( SectionData & pParent ) : PLT :: Entry < sizeof ( arm_plt1 ) > ( pParent ) {


<s> <ISA_LIT>PLT1 * plt1_entry = new ( std :: nothrow ) <ISA_LIT>PLT1 ( * m_pSectionData ) ; if ( ! plt1_entry ) fatal ( diag :: fail_allocate_memory_plt ) ; return plt1_entry ;


<s> iterator it = begin ( ) ; unsigned char * buffer = pRegion . begin ( ) ; memcpy ( buffer , llvm :: cast < <ISA_LIT>PLT0 > ( ( * it ) ) . getValue ( ) , <ISA_LIT>PLT0 :: EntrySize ) ; result += <ISA_LIT>PLT0 :: EntrySize ; ++ it ; <ISA_LIT>PLT1 * plt1 = <NUM_LIT> ;


<s> bool <ISA_LIT>PLT :: hasPLT1 ( ) const { return ( m_pSectionData -> size ( ) > <NUM_LIT> ) ;


<s> <ISA_LIT>PLT :: ~ <ISA_LIT>PLT ( ) {


<s> case G_MUL : case G_SDIV : case G_UDIV : case G_SEXT : case G_ZEXT : case G_TRUNC : case G_GEP : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : case G_STORE : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_CONSTANT : case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; } case G_EXTRACT : {


<s> assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;

assert ( RBGPR . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ;


<s> AlreadyInit = true ; const RegisterBank & RBGPR = getRegBank ( <STR_LIT> ) ; ( void ) RBGPR ; assert ( & <STR_LIT> == & RBGPR && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;


<s> using namespace TargetOpcode ; unsigned NumOperands = MI . getNumOperands ( ) ; const ValueMapping * OperandsMapping = & <STR_LIT> [ <NUM_LIT> ] ; switch ( Opc ) { case G_ADD : case G_LOAD : case G_SEXT : case G_ZEXT : OperandsMapping = & <STR_LIT> [ <NUM_LIT> ] ; break ; case G_FRAME_INDEX :

OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <NUM_LIT> ] , nullptr } ) ;


<s> case GPRnopcRegClassID : case tGPR_and_tcGPRRegClassID : return getRegBank ( <STR_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } llvm_unreachable ( <STR_LIT> ) ;


<s> static llvm :: once_flag InitializeRegisterBankFlag ; static auto InitializeRegisterBankOnce = [ & ] ( ) { const RegisterBank & RBGPR = getRegBank ( <STR_LIT> ) ; ( void ) RBGPR ; assert ( & <STR_LIT> == & RBGPR && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;


<s> ( void ) RBGPR ; assert ( & <STR_LIT> == & RBGPR && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ;


<s> const RegisterBank & <ISA_LIT>RegisterBankInfo :: getRegBankFromRegClass ( const TargetRegisterClass & RC , LLT ) const { using namespace <ISA_LIT> ; switch ( RC . getID ( ) ) { case GPRRegClassID : case GPRwithAPSRRegClassID : case GPRnoipRegClassID : case GPRnopcRegClassID : case GPRnoip_and_GPRnopcRegClassID : case rGPRRegClassID : case GPRspRegClassID : case GPRnoip_and_tcGPRRegClassID : case tcGPRRegClassID :


<s> assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ; <STR_LIT> ( ) ; <STR_LIT> ( ) ;


<s> assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ;


<s> assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;


<s> case tcGPRRegClassID : case tGPRRegClassID : case tGPREvenRegClassID : case tGPROddRegClassID : case tGPR_and_tGPREvenRegClassID : case tGPR_and_tGPROddRegClassID : case tGPREven_and_tcGPRRegClassID : case tGPREven_and_tGPR_and_tcGPRRegClassID : case tGPROdd_and_tcGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case HPRRegClassID :


<s> const ValueMapping * OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; switch ( Opc ) { case G_ADD : case G_SEXT : case G_ZEXT : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : case G_STORE : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; } case G_EXTRACT : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , nullptr } ) ; break ; } default : return InstructionMapping { } ; } for ( unsigned i = <NUM_LIT> ; i < NumOperands ; i ++ ) { for ( const auto & Mapping : OperandsMapping [ i ] ) { assert ( ( Mapping . RegBank -> getID ( ) != <STR_LIT> || MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasVFP2 ( ) ) && <STR_LIT> ) ; }


<s> case GPRnopcRegClassID : case tGPR_and_tcGPRRegClassID : case tGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case SPR_8RegClassID : case SPRRegClassID : case DPR_8RegClassID : case DPRRegClassID : return getRegBank ( <STR_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> static llvm :: once_flag InitializeRegisterBankFlag ; static auto InitializeRegisterBankOnce = [ & ] ( ) { const RegisterBank & RBGPR = getRegBank ( <STR_LIT> ) ; ( void ) RBGPR ; assert ( & <STR_LIT> == & RBGPR && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;


<s> case tGPR_and_tcGPRRegClassID : case tGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case SPR_8RegClassID : case SPRRegClassID : case DPR_8RegClassID : case DPRRegClassID :


<s> RegisterBankInfo :: InstructionMapping <ISA_LIT>RegisterBankInfo :: getInstrMapping ( const MachineInstr & MI ) const { auto Opc = MI . getOpcode ( ) ; if ( ! isPreISelGenericOpcode ( Opc ) ) { InstructionMapping Mapping = getInstrMappingImpl ( MI ) ; if ( Mapping . isValid ( ) ) return Mapping ; } using namespace TargetOpcode ; unsigned NumOperands = MI . getNumOperands ( ) ;

const ValueMapping * OperandsMapping = & <STR_LIT> [ <NUM_LIT> ] ;


<s> case GPRRegClassID : case tGPR_and_tcGPRRegClassID : return getRegBank ( <STR_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> const ValueMapping * OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; switch ( Opc ) { case G_ADD : case G_SEXT : case G_ZEXT : case G_GEP : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : case G_STORE : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_CONSTANT : case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ;


<s> const MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; LLT Ty = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; unsigned NumOperands = MI . getNumOperands ( ) ; const ValueMapping * OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; switch ( Opc ) { case G_ADD : case G_SEXT : case G_ZEXT : case G_GEP : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : case G_STORE : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_CONSTANT : case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; } case G_EXTRACT : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || MI . getOperand ( <NUM_LIT> ) . getImm ( ) % <NUM_LIT> != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , nullptr } ) ; break ; } default : return InstructionMapping { } ; } for ( unsigned i = <NUM_LIT> ; i < NumOperands ; i ++ ) {

for ( const auto & Mapping : OperandsMapping [ i ] ) {


<s> case G_ADD : case G_SEXT : case G_ZEXT : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; } case G_EXTRACT : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , nullptr } ) ; break ; }


<s> switch ( Opc ) { case G_ADD : case G_SEXT : case G_ZEXT : OperandsMapping = & <STR_LIT> [ <STR_LIT> ] ; break ; case G_LOAD : OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FADD : assert ( ( Ty . getSizeInBits ( ) == <NUM_LIT> || Ty . getSizeInBits ( ) == <NUM_LIT> ) && <STR_LIT> ) ; OperandsMapping = Ty . getSizeInBits ( ) == <NUM_LIT> ? & <STR_LIT> [ <STR_LIT> ] : & <STR_LIT> [ <STR_LIT> ] ; break ; case G_FRAME_INDEX : OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ; break ; case G_SEQUENCE : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return InstructionMapping { } ;

OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , nullptr } ) ;


<s> const RegisterBank & <ISA_LIT>RegisterBankInfo :: getRegBankFromRegClass ( const TargetRegisterClass & RC ) const { using namespace <ISA_LIT> ; switch ( RC . getID ( ) ) { case GPRRegClassID : case GPRnopcRegClassID : case tGPR_and_tcGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case SPR_8RegClassID : case SPRRegClassID : case DPR_8RegClassID : case DPRRegClassID : return getRegBank ( <STR_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> case GPRnopcRegClassID : case tGPR_and_tcGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case SPR_8RegClassID : case SPRRegClassID : case DPR_8RegClassID : case DPRRegClassID : return getRegBank ( <STR_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_MERGE_VALUES : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return getInvalidInstructionMapping ( ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_UNMERGE_VALUES : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return getInvalidInstructionMapping ( ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } default :


<s> break ; case G_SELECT : { LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; ( void ) Ty2 ; assert ( Ty . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; assert ( Ty2 . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_ICMP : { LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; ( void ) Ty2 ; assert ( Ty2 . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_FCMP : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; ( void ) Ty1 ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; ( void ) Ty2 ; assert ( Ty . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; assert ( Ty1 . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; assert ( Ty2 . getSizeInBits ( ) == <NUM_LIT> && <STR_LIT> ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , nullptr , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_MERGE_VALUES : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; if ( Ty . getSizeInBits ( ) != <NUM_LIT> || Ty1 . getSizeInBits ( ) != <NUM_LIT> || Ty2 . getSizeInBits ( ) != <NUM_LIT> ) return getInvalidInstructionMapping ( ) ; OperandsMapping = getOperandsMapping ( { & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] , & <STR_LIT> [ <STR_LIT> ] } ) ; break ; } case G_UNMERGE_VALUES : { LLT Ty1 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ; LLT Ty2 = MRI . getType ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) ;


<s> const RegisterBank & RBGPR = getRegBank ( <STR_LIT> ) ; ( void ) RBGPR ; assert ( & <STR_LIT> == & RBGPR && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ;


<s> assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . covers ( * TRI . getRegClass ( <STR_LIT> ) ) && <STR_LIT> ) ; assert ( RBGPR . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ;


<s> assert ( checkPartMapping ( PartMappings [ PMI_SPR - PMI_Min ] , <NUM_LIT> , <NUM_LIT> , FPRRegBankID ) && <STR_LIT> ) ;

assert ( checkPartMapping ( PartMappings [ PMI_DPR - PMI_Min ] , <NUM_LIT> , <NUM_LIT> , FPRRegBankID ) && <STR_LIT> ) ;


<s> return PM . StartIdx == Start && PM . Length == Length && PM . RegBank -> getID ( ) == RegBankID ;


<s> static bool checkValueMapping ( const RegisterBankInfo :: ValueMapping & VM , RegisterBankInfo :: PartialMapping * BreakDown ) {

return VM . NumBreakDowns == <NUM_LIT> && VM . BreakDown == BreakDown ;


<s> return VM . NumBreakDowns == <NUM_LIT> && VM . BreakDown == BreakDown ;


<s> assert ( checkValueMapping ( ValueMappings [ DPR3OpsIdx ] , & PartMappings [ PMI_DPR - PMI_Min ] ) && <STR_LIT> ) ; assert ( checkValueMapping ( ValueMappings [ DPR3OpsIdx + <NUM_LIT> ] , & PartMappings [ PMI_DPR - PMI_Min ] ) && <STR_LIT> ) ;


<s> static void checkValueMappings ( ) { assert ( checkValueMapping ( ValueMappings [ GPR3OpsIdx ] , & PartMappings [ PMI_GPR - PMI_Min ] ) && <STR_LIT> ) ; assert ( checkValueMapping ( ValueMappings [ GPR3OpsIdx + <NUM_LIT> ] , & PartMappings [ PMI_GPR - PMI_Min ] ) && <STR_LIT> ) ; assert ( checkValueMapping ( ValueMappings [ GPR3OpsIdx + <NUM_LIT> ] , & PartMappings [ PMI_GPR - PMI_Min ] ) && <STR_LIT> ) ;

assert ( checkValueMapping ( ValueMappings [ SPR3OpsIdx ] , & PartMappings [ PMI_SPR - PMI_Min ] ) && <STR_LIT> ) ;


<s> case GPRwithAPSRRegClassID : case GPRnopcRegClassID : case rGPRRegClassID : case GPRspRegClassID : case tGPR_and_tcGPRRegClassID : case tcGPRRegClassID : case tGPRRegClassID : return getRegBank ( <STR_LIT> ) ; case HPRRegClassID : case SPR_8RegClassID : case SPRRegClassID : case DPR_8RegClassID : case DPRRegClassID : case QPRRegClassID : return getRegBank ( <STR_LIT> ) ; default :


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const <ISA_LIT>BaseInstrInfo & tii , const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>BaseRegisterInfo ( tii , sti ) {


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const TargetInstrInfo & tii , const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <STR_LIT> ) , TII ( tii ) , STI ( sti ) , FramePtr ( ( STI . useThumbBacktraces ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ) {


<s> NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; Chunk = ( ( <NUM_LIT> << NumBits ) - <NUM_LIT> ) * Scale ; } NumMIs += Bytes / Chunk ; if ( ( Bytes % Chunk ) != <NUM_LIT> ) NumMIs ++ ;


<s> if ( Amount != <NUM_LIT> ) { <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned Align = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; unsigned Opc = Old -> getOpcode ( ) ; bool isThumb = AFI -> isThumbFunction ( ) ; <STR_LIT> Pred = isThumb ? <STR_LIT> : ( <STR_LIT> ) Old -> getOperand ( <NUM_LIT> ) . getImm ( ) ; if ( Opc == <STR_LIT> || Opc == <STR_LIT> ) {

unsigned PredReg = isThumb ? <NUM_LIT> : Old -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> MachineInstr * Old = I ; DebugLoc dl = Old -> getDebugLoc ( ) ; unsigned Amount = Old -> getOperand ( <NUM_LIT> ) . getImm ( ) ; if ( Amount != <NUM_LIT> ) { <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned Align = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; unsigned Opc = Old -> getOpcode ( ) ; bool isThumb = AFI -> isThumbFunction ( ) ; <STR_LIT> Pred = isThumb ? <STR_LIT> : ( <STR_LIT> ) Old -> getOperand ( <NUM_LIT> ) . getImm ( ) ;

if ( Opc == <STR_LIT> || Opc == <STR_LIT> ) {


<s> static void emit<ISA_LIT>RegPlusImmediate ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , unsigned DestReg , unsigned BaseReg , int NumBytes , <STR_LIT> Pred , unsigned PredReg , const TargetInstrInfo & TII , DebugLoc dl ) { bool isSub = NumBytes < <NUM_LIT> ; if ( isSub ) NumBytes = - NumBytes ; while ( NumBytes ) { unsigned RotAmt = <STR_LIT> ( NumBytes ) ; unsigned ThisVal = NumBytes & <STR_LIT> ( <NUM_LIT> , RotAmt ) ; assert ( ThisVal && <STR_LIT> ) ; NumBytes &= ~ ThisVal ; int SOImmVal = <STR_LIT> ( ThisVal ) ; assert ( SOImmVal != - <NUM_LIT> && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( isSub ? <STR_LIT> : <STR_LIT> ) , DestReg ) . addReg ( BaseReg , false , false , true ) . addImm ( SOImmVal ) . addImm ( ( unsigned ) Pred ) . addReg ( PredReg ) . addReg ( <NUM_LIT> ) ; BaseReg = DestReg ; }


<s> else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) ; } else { if ( MBBI -> getOpcode ( ) == <STR_LIT> && & MBB . front ( ) != MBBI && prior ( MBBI ) -> getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock :: iterator PMBBI = prior ( MBBI ) ; emitSPUpdate ( MBB , PMBBI , NumBytes , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; } else emitSPUpdate ( MBB , MBBI , NumBytes , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; } } else { if ( ( STI . isTargetDarwin ( ) && NumBytes ) || hasFP ( MF ) ) { NumBytes = AFI -> getFramePtrSpillOffset ( ) - NumBytes ; if ( AFI -> getGPRCalleeSavedArea2Size ( ) || AFI -> getDPRCalleeSavedAreaSize ( ) || AFI -> getDPRCalleeSavedAreaOffset ( ) || hasFP ( MF ) ) { if ( NumBytes ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( NumBytes ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; } } else if ( NumBytes ) { emitSPUpdate ( MBB , MBBI , NumBytes , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; } movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( MBB , MBBI , AFI -> getDPRCalleeSavedAreaSize ( ) , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( MBB , MBBI , AFI -> getGPRCalleeSavedArea2Size ( ) , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( MBB , MBBI , AFI -> getGPRCalleeSavedArea1Size ( ) , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; } } if ( VARegSaveSize ) { if ( isThumb ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) ; emitSPUpdate ( MBB , MBBI , VARegSaveSize , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; if ( isThumb ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) ; MBB . erase ( MBBI ) ; }


<s> void <ISA_LIT>RegisterInfo :: emitLoadConstPool ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , unsigned DestReg , int Val , unsigned Pred , unsigned PredReg , const TargetInstrInfo * TII , bool isThumb , DebugLoc dl ) const { MachineFunction & MF = * MBB . getParent ( ) ; MachineConstantPool * ConstantPool = MF . getConstantPool ( ) ; Constant * C = ConstantInt :: get ( Type :: Int32Ty , Val ) ; unsigned Idx = ConstantPool -> getConstantPoolIndex ( C , <NUM_LIT> ) ; if ( isThumb ) BuildMI ( MBB , MBBI , dl , TII -> get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) ;

else BuildMI ( MBB , MBBI , dl , TII -> get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) . addReg ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) ;


<s> if ( isThumb ) BuildMI ( MBB , MBBI , dl , TII -> get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) ; else BuildMI ( MBB , MBBI , dl , TII -> get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) . addReg ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( Pred ) . addReg ( PredReg ) ;


<s> if ( Reg == FramePtr ) FramePtrSpillFI = FI ; AFI -> addGPRCalleeSavedArea1Frame ( FI ) ; GPRCS1Size += <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Reg == FramePtr ) FramePtrSpillFI = FI ; if ( STI . isTargetDarwin ( ) ) { AFI -> addGPRCalleeSavedArea2Frame ( FI ) ; GPRCS2Size += <NUM_LIT> ; } else { AFI -> addGPRCalleeSavedArea1Frame ( FI ) ; GPRCS1Size += <NUM_LIT> ; } break ; default : AFI -> addDPRCalleeSavedAreaFrame ( FI ) ; DPRCSSize += <NUM_LIT> ; } } if ( ! isThumb ) { emitSPUpdate ( MBB , MBBI , - GPRCS1Size , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , STI ) ; } else if ( MBBI != MBB . end ( ) && MBBI -> getOpcode ( ) == <STR_LIT> ) { ++ MBBI ; if ( MBBI != MBB . end ( ) ) dl = MBBI -> getDebugLoc ( ) ; } if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) { MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , dl , TII . get ( isThumb ? <STR_LIT> : <STR_LIT> ) , FramePtr ) . addFrameIndex ( FramePtrSpillFI ) . addImm ( <NUM_LIT> ) ; if ( ! isThumb ) AddDefaultCC ( AddDefaultPred ( MIB ) ) ; } if ( ! isThumb ) { emitSPUpdate ( MBB , MBBI , - GPRCS2Size , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; movePastCSLoadStoreOps ( MBB , MBBI , <STR_LIT> , <NUM_LIT> , STI ) ; emitSPUpdate ( MBB , MBBI , - DPRCSSize , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ; } unsigned DPRCSOffset = NumBytes - ( GPRCS1Size + GPRCS2Size + DPRCSSize ) ;

unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize ;


<s> static void emitSPUpdate ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , int NumBytes , <STR_LIT> Pred , unsigned PredReg , bool isThumb , const TargetInstrInfo & TII , const <ISA_LIT>RegisterInfo & MRI , DebugLoc dl ) { if ( isThumb ) emitThumbRegPlusImmediate ( MBB , MBBI , <STR_LIT> , <STR_LIT> , NumBytes , TII , MRI , dl ) ;

else emit<ISA_LIT>RegPlusImmediate ( MBB , MBBI , <STR_LIT> , <STR_LIT> , NumBytes , Pred , PredReg , TII , dl ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , DestReg ) . addImm ( ThisVal ) ; if ( Imm > <NUM_LIT> ) emitThumbRegPlusImmediate ( MBB , MBBI , DestReg , DestReg , Imm , TII , MRI , dl ) ; if ( isSub ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , DestReg ) . addReg ( DestReg , false , false , true ) ;


<s> int Chunk = ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ; int ThisVal = ( Imm > Chunk ) ? Chunk : Imm ; Imm -= ThisVal ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , DestReg ) . addImm ( ThisVal ) ;


<s> while ( Bytes ) { unsigned ThisVal = ( Bytes > Chunk ) ? Chunk : Bytes ; Bytes -= ThisVal ; ThisVal /= Scale ; if ( isTwoAddr ) BuildMI ( MBB , MBBI , dl , TII . get ( Opc ) , DestReg ) . addReg ( DestReg ) . addImm ( ThisVal ) ; else { bool isKill = BaseReg != <STR_LIT> ; BuildMI ( MBB , MBBI , dl , TII . get ( Opc ) , DestReg ) . addReg ( BaseReg , false , false , isKill ) . addImm ( ThisVal ) ; BaseReg = DestReg ; if ( Opc == <STR_LIT> ) { NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; Chunk = ( ( <NUM_LIT> << NumBits ) - <NUM_LIT> ) * Scale ; Opc = isSub ? <STR_LIT> : <STR_LIT> ; isTwoAddr = true ; } } } if ( ExtraOpc ) BuildMI ( MBB , MBBI , dl , TII . get ( ExtraOpc ) , DestReg ) . addReg ( DestReg , false , false , true ) . addImm ( ( ( unsigned ) NumBytes ) & <NUM_LIT> ) ;


<s> NumBytes = - NumBytes ; } unsigned LdReg = DestReg ; if ( DestReg == <STR_LIT> ) { assert ( BaseReg == <STR_LIT> && <STR_LIT> ) ; LdReg = <STR_LIT> ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> , false , false , true ) ; } if ( NumBytes <= <NUM_LIT> && NumBytes >= <NUM_LIT> ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addImm ( NumBytes ) ; else if ( NumBytes < <NUM_LIT> && NumBytes >= - <NUM_LIT> ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addImm ( NumBytes ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addReg ( LdReg , false , false , true ) ; } else MRI . emitLoadConstPool ( MBB , MBBI , LdReg , NumBytes , <STR_LIT> , <NUM_LIT> , & TII , true , dl ) ; int Opc = ( isSub ) ? <STR_LIT> : ( isHigh ? <STR_LIT> : <STR_LIT> ) ; const MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , dl , TII . get ( Opc ) , DestReg ) ; if ( DestReg == <STR_LIT> || isSub ) MIB . addReg ( BaseReg ) . addReg ( LdReg , false , false , true ) ;

else MIB . addReg ( LdReg ) . addReg ( BaseReg , false , false , true ) ;


<s> static void emitThumbRegPlusImmInReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , unsigned DestReg , unsigned BaseReg , int NumBytes , bool CanChangeCC , const TargetInstrInfo & TII , const <ISA_LIT>RegisterInfo & MRI , DebugLoc dl ) { bool isHigh = ! MRI . isLowRegister ( DestReg ) || ( BaseReg != <NUM_LIT> && ! MRI . isLowRegister ( BaseReg ) ) ; bool isSub = false ; if ( NumBytes < <NUM_LIT> && ! isHigh && CanChangeCC ) { isSub = true ; NumBytes = - NumBytes ; } unsigned LdReg = DestReg ; if ( DestReg == <STR_LIT> ) { assert ( BaseReg == <STR_LIT> && <STR_LIT> ) ; LdReg = <STR_LIT> ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> , false , false , true ) ; } if ( NumBytes <= <NUM_LIT> && NumBytes >= <NUM_LIT> ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addImm ( NumBytes ) ; else if ( NumBytes < <NUM_LIT> && NumBytes >= - <NUM_LIT> ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addImm ( NumBytes ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addReg ( LdReg , false , false , true ) ; } else MRI . emitLoadConstPool ( MBB , MBBI , LdReg , NumBytes , <STR_LIT> , <NUM_LIT> , & TII , true , dl ) ; int Opc = ( isSub ) ? <STR_LIT> : ( isHigh ? <STR_LIT> : <STR_LIT> ) ;

const MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , dl , TII . get ( Opc ) , DestReg ) ;


<s> if ( Reg == <NUM_LIT> ) Reg = RS -> FindUnusedReg ( RC , AFI -> getSpilledCSRegisters ( ) ) ; return Reg ;


<s> static const unsigned CalleeSavedRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <NUM_LIT> } ; static const unsigned DarwinCalleeSavedRegs [ ] = {


<s> unsigned <ISA_LIT>RegisterInfo :: getEHExceptionRegister ( ) const { assert ( <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getEHHandlerRegister ( ) const { assert ( <NUM_LIT> && <STR_LIT> ) ; return <NUM_LIT> ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; return <NUM_LIT> ;


<s> if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) return ( STI . useThumbBacktraces ( ) || STI . isThumb ( ) ) ? <STR_LIT> : <STR_LIT> ;


<s> if ( STI . isTargetDarwin ( ) || hasFP ( MF ) ) Reserved . set ( FramePtr ) ; if ( STI . isR9Reserved ( ) ) Reserved . set ( <STR_LIT> ) ; return Reserved ;


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> bool <ISA_LIT>RegisterInfo :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> if ( AFI -> isThumbFunction ( ) ) { if ( CFSize >= ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) * <NUM_LIT> / <NUM_LIT> ) return false ; } else { if ( CFSize >= ( ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ) / <NUM_LIT> ) return false ; } return ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ;


<s> bool <ISA_LIT>RegisterInfo :: isLowRegister ( unsigned Reg ) const { using namespace <ISA_LIT> ; switch ( Reg ) { case R0 : case R1 : case R2 : case R3 :


<s> bool Done = false ; unsigned Category = <NUM_LIT> ; switch ( MBBI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Category = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Category = STI . isTargetDarwin ( ) ? <NUM_LIT> : <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Category = <NUM_LIT> ; break ;


<s> Category = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Category = STI . isTargetDarwin ( ) ? <NUM_LIT> : <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Category = <NUM_LIT> ; break ; default : Done = true ; break ; } if ( Done || Category != Area ) break ; } ++ MBBI ;


<s> const <ISA_LIT>FunctionInfo * AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ;

return ThumbRegScavenging || ! AFI -> isThumbFunction ( ) ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) : <ISA_LIT>BaseRegisterInfo ( ) {


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) {


<s> if ( isSub ) NumBytes = - NumBytes ; while ( NumBytes ) { unsigned RotAmt = <STR_LIT> ( NumBytes ) ; unsigned ThisVal = NumBytes & <STR_LIT> ( <NUM_LIT> , RotAmt ) ; assert ( ThisVal && <STR_LIT> ) ; NumBytes &= ~ ThisVal ; int SOImmVal = <STR_LIT> ( ThisVal ) ; assert ( SOImmVal != - <NUM_LIT> && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( isSub ? <STR_LIT> : <STR_LIT> ) , DestReg ) . addReg ( BaseReg , RegState :: Kill ) . addImm ( SOImmVal ) . addImm ( ( unsigned ) Pred ) . addReg ( PredReg ) . addReg ( <NUM_LIT> ) ;


<s> static void emit<ISA_LIT>RegPlusImmediate ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , unsigned DestReg , unsigned BaseReg , int NumBytes , <STR_LIT> Pred , unsigned PredReg , const TargetInstrInfo & TII , DebugLoc dl ) { bool isSub = NumBytes < <NUM_LIT> ; if ( isSub ) NumBytes = - NumBytes ; while ( NumBytes ) { unsigned RotAmt = <STR_LIT> ( NumBytes ) ; unsigned ThisVal = NumBytes & <STR_LIT> ( <NUM_LIT> , RotAmt ) ; assert ( ThisVal && <STR_LIT> ) ; NumBytes &= ~ ThisVal ; int SOImmVal = <STR_LIT> ( ThisVal ) ;

assert ( SOImmVal != - <NUM_LIT> && <STR_LIT> ) ;


<s> unsigned VARegSaveSize = AFI -> getVarArgsRegSaveSize ( ) ; int NumBytes = ( int ) MFI -> getStackSize ( ) ; if ( ! AFI -> hasStackFrame ( ) ) { if ( NumBytes != <NUM_LIT> ) emitSPUpdate ( MBB , MBBI , NumBytes , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; } else { const unsigned * CSRegs = getCalleeSavedRegs ( ) ; if ( MBBI != MBB . begin ( ) ) { do -- MBBI ; while ( MBBI != MBB . begin ( ) && isCSRestore ( MBBI , CSRegs ) ) ; if ( ! isCSRestore ( MBBI , CSRegs ) ) ++ MBBI ; } NumBytes -= ( AFI -> getGPRCalleeSavedArea1Size ( ) + AFI -> getGPRCalleeSavedArea2Size ( ) + AFI -> getDPRCalleeSavedAreaSize ( ) ) ; if ( isThumb ) { if ( hasFP ( MF ) ) { NumBytes = AFI -> getFramePtrSpillOffset ( ) - NumBytes ; if ( NumBytes ) emitThumbRegPlusImmediate ( MBB , MBBI , <STR_LIT> , FramePtr , - NumBytes , TII , * this , dl ) ; else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) ; } else { if ( MBBI -> getOpcode ( ) == <STR_LIT> && & MBB . front ( ) != MBBI && prior ( MBBI ) -> getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock :: iterator PMBBI = prior ( MBBI ) ; emitSPUpdate ( MBB , PMBBI , NumBytes , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; } else emitSPUpdate ( MBB , MBBI , NumBytes , <STR_LIT> , <NUM_LIT> , isThumb , TII , * this , dl ) ; } } else { if ( ( STI . isTargetDarwin ( ) && NumBytes ) || hasFP ( MF ) ) { NumBytes = AFI -> getFramePtrSpillOffset ( ) - NumBytes ; if ( AFI -> getGPRCalleeSavedArea2Size ( ) || AFI -> getDPRCalleeSavedAreaSize ( ) || AFI -> getDPRCalleeSavedAreaOffset ( ) || hasFP ( MF ) ) { if ( NumBytes ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( NumBytes ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; else BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( FramePtr ) . addImm ( ( unsigned ) <STR_LIT> ) . addReg ( <NUM_LIT> ) . addReg ( <NUM_LIT> ) ; } } else if ( NumBytes ) {

emitSPUpdate ( MBB , MBBI , NumBytes , <STR_LIT> , <NUM_LIT> , false , TII , * this , dl ) ;


<s> static void emitThumbConstant ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator & MBBI , unsigned DestReg , int Imm , const TargetInstrInfo & TII , const <ISA_LIT>RegisterInfo & MRI , DebugLoc dl ) { bool isSub = Imm < <NUM_LIT> ; if ( isSub ) Imm = - Imm ;

int Chunk = ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ;


<s> } else { if ( DestReg != BaseReg ) DstNotEqBase = true ; NumBits = <NUM_LIT> ; Opc = isSub ? <STR_LIT> : <STR_LIT> ; isTwoAddr = true ; } unsigned NumMIs = calcNumMI ( Opc , ExtraOpc , Bytes , NumBits , Scale ) ; unsigned Threshold = ( DestReg == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; if ( NumMIs > Threshold ) { emitThumbRegPlusImmInReg ( MBB , MBBI , DestReg , BaseReg , NumBytes , true , TII , MRI , dl ) ; return ; } if ( DstNotEqBase ) { if ( MRI . isLowRegister ( DestReg ) && MRI . isLowRegister ( BaseReg ) ) { unsigned Chunk = ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ; unsigned ThisVal = ( Bytes > Chunk ) ? Chunk : Bytes ; Bytes -= ThisVal ; BuildMI ( MBB , MBBI , dl , TII . get ( isSub ? <STR_LIT> : <STR_LIT> ) , DestReg ) . addReg ( BaseReg , RegState :: Kill ) . addImm ( ThisVal ) ; } else { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , DestReg ) . addReg ( BaseReg , RegState :: Kill ) ; } BaseReg = DestReg ; } unsigned Chunk = ( ( <NUM_LIT> << NumBits ) - <NUM_LIT> ) * Scale ; while ( Bytes ) { unsigned ThisVal = ( Bytes > Chunk ) ? Chunk : Bytes ; Bytes -= ThisVal ;


<s> NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; Opc = isSub ? <STR_LIT> : <STR_LIT> ; isTwoAddr = true ; } else if ( ! isSub && BaseReg == <STR_LIT> ) { if ( ! isMul4 ) { Bytes &= ~ <NUM_LIT> ; ExtraOpc = <STR_LIT> ; } NumBits = <NUM_LIT> ; Scale = <NUM_LIT> ; Opc = <STR_LIT> ; } else { if ( DestReg != BaseReg ) DstNotEqBase = true ; NumBits = <NUM_LIT> ; Opc = isSub ? <STR_LIT> : <STR_LIT> ; isTwoAddr = true ; } unsigned NumMIs = calcNumMI ( Opc , ExtraOpc , Bytes , NumBits , Scale ) ; unsigned Threshold = ( DestReg == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; if ( NumMIs > Threshold ) { emitThumbRegPlusImmInReg ( MBB , MBBI , DestReg , BaseReg , NumBytes , true , TII , MRI , dl ) ; return ; } if ( DstNotEqBase ) { if ( MRI . isLowRegister ( DestReg ) && MRI . isLowRegister ( BaseReg ) ) { unsigned Chunk = ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> ; unsigned ThisVal = ( Bytes > Chunk ) ? Chunk : Bytes ; Bytes -= ThisVal ; BuildMI ( MBB , MBBI , dl , TII . get ( isSub ? <STR_LIT> : <STR_LIT> ) , DestReg ) . addReg ( BaseReg , RegState :: Kill ) . addImm ( ThisVal ) ; } else { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , DestReg ) . addReg ( BaseReg , RegState :: Kill ) ; }


<s> bool isHigh = ! MRI . isLowRegister ( DestReg ) || ( BaseReg != <NUM_LIT> && ! MRI . isLowRegister ( BaseReg ) ) ; bool isSub = false ; if ( NumBytes < <NUM_LIT> && ! isHigh && CanChangeCC ) { isSub = true ; NumBytes = - NumBytes ; } unsigned LdReg = DestReg ; if ( DestReg == <STR_LIT> ) { assert ( BaseReg == <STR_LIT> && <STR_LIT> ) ; LdReg = <STR_LIT> ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; } if ( NumBytes <= <NUM_LIT> && NumBytes >= <NUM_LIT> ) BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , LdReg ) . addImm ( NumBytes ) ;

else if ( NumBytes < <NUM_LIT> && NumBytes >= - <NUM_LIT> ) {


<s> unsigned Reg = RS ? RS -> FindUnusedReg ( RC , true ) : ( unsigned ) <STR_LIT> ;

assert ( ! AFI -> isThumbFunction ( ) ) ;


<s> & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , <NUM_LIT> } ; static const TargetRegisterClass * const ThumbCalleeSavedRegClasses [ ] = {


<s> const TargetRegisterClass * const * <ISA_LIT>RegisterInfo :: getCalleeSavedRegClasses ( const MachineFunction * MF ) const { static const TargetRegisterClass * const CalleeSavedRegClasses [ ] = { & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , <NUM_LIT> } ; static const TargetRegisterClass * const ThumbCalleeSavedRegClasses [ ] = { & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , & <STR_LIT> , <NUM_LIT> } ; return STI . isThumb ( ) ? ThumbCalleeSavedRegClasses : CalleeSavedRegClasses ;


<s> void <ISA_LIT>RegisterInfo :: anchor ( ) {


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & sti ) : <ISA_LIT>BaseRegisterInfo ( sti ) {


<s> void <ISA_LIT>Relocator :: addCopyReloc ( ResolveInfo & pSym ) { Relocation & rel_entry = * getTarget ( ) . getRelDyn ( ) . create ( ) ;

rel_entry . setType ( llvm :: ELF :: R_<ISA_LIT>_COPY ) ;


<s> Relocation :: Type type = pRelocation . type ( ) ; if ( type > <NUM_LIT> ) {


return ApplyFunctions [ type ] . func ( pRelocation , * this ) ;


<s> <ISA_LIT>Relocator :: <ISA_LIT>Relocator ( <ISA_LIT>GNULDBackend & pParent , const LinkerConfig & pConfig ) : Relocator ( pConfig ) , m_Target ( pParent ) {


<s> pReloc . target ( ) = pReloc . symValue ( ) + A - pReloc . place ( ) ; return Relocator :: OK ;


<s> case llvm :: ELF :: R_<ISA_LIT>_JUMP_SLOT : case llvm :: ELF :: R_<ISA_LIT>_ABS32 : case llvm :: ELF :: R_<ISA_LIT>_ABS32_NOI : case llvm :: ELF :: R_<ISA_LIT>_PC24 : case llvm :: ELF :: R_<ISA_LIT>_TLS_DTPMOD32 : case llvm :: ELF :: R_<ISA_LIT>_TLS_DTPOFF32 : case llvm :: ELF :: R_<ISA_LIT>_TLS_TPOFF32 : break ; default : error ( diag :: non_pic_relocation ) << getName ( pReloc . type ( ) ) << pReloc . symInfo ( ) -> name ( ) ; break ;


<s> ELFFileFormat * file_format = getTarget ( ) . getOutputFormat ( ) ; if ( ResolveInfo :: ThreadLocal == pSym . type ( ) ) bss_sect_hdr = & file_format -> getTBSS ( ) ; else bss_sect_hdr = & file_format -> getBSS ( ) ; SectionData * bss_data = NULL ; if ( bss_sect_hdr -> hasSectionData ( ) ) bss_data = bss_sect_hdr -> getSectionData ( ) ; else bss_data = IRBuilder :: CreateSectionData ( * bss_sect_hdr ) ; uint32_t addralign = config ( ) . targets ( ) . bitclass ( ) / <NUM_LIT> ; Fragment * frag = new FillFragment ( <NUM_LIT> , <NUM_LIT> , pSym . size ( ) ) ; uint64_t size = ObjectBuilder :: AppendFragment ( * frag , * bss_data , addralign ) ;

bss_sect_hdr -> setSize ( bss_sect_hdr -> size ( ) + size ) ;


<s> SectionData * bss_data = NULL ; if ( bss_sect_hdr -> hasSectionData ( ) ) bss_data = bss_sect_hdr -> getSectionData ( ) ; else bss_data = IRBuilder :: CreateSectionData ( * bss_sect_hdr ) ; uint32_t addralign = config ( ) . targets ( ) . bitclass ( ) / <NUM_LIT> ; Fragment * frag = new FillFragment ( <NUM_LIT> , <NUM_LIT> , pSym . size ( ) ) ; uint64_t size = ObjectBuilder :: AppendFragment ( * frag , * bss_data , addralign ) ; bss_sect_hdr -> setSize ( bss_sect_hdr -> size ( ) + size ) ; ResolveInfo :: Binding binding = ( ResolveInfo :: Binding ) pSym . binding ( ) ; if ( binding == ResolveInfo :: Weak ) binding = ResolveInfo :: Global ; LDSymbol * cpy_sym = pBuilder . AddSymbol < IRBuilder :: Force , IRBuilder :: Resolve > ( pSym . name ( ) , ( ResolveInfo :: Type ) pSym . type ( ) , ResolveInfo :: Define , binding , pSym . size ( ) , <NUM_LIT> , FragmentRef :: Create ( * frag , <NUM_LIT> ) , ( ResolveInfo :: Visibility ) pSym . other ( ) ) ; return * cpy_sym ;


<s> uint32_t <ISA_LIT>Relocator :: getDebugStringOffset ( Relocation & pReloc ) const { if ( pReloc . type ( ) != llvm :: ELF :: R_<ISA_LIT>_ABS32 ) error ( diag :: unsupport_reloc_for_debug_string ) << getName ( pReloc . type ( ) ) << <STR_LIT> ;

if ( pReloc . symInfo ( ) -> type ( ) == ResolveInfo :: Section ) return pReloc . target ( ) + pReloc . addend ( ) ;


<s> if ( pReloc . symInfo ( ) -> type ( ) == ResolveInfo :: Section ) return pReloc . target ( ) + pReloc . addend ( ) ; else return pReloc . symInfo ( ) -> outSymbol ( ) -> fragRef ( ) -> offset ( ) + pReloc . target ( ) + pReloc . addend ( ) ;


<s> const char * <ISA_LIT>Relocator :: getName ( Relocator :: Type pType ) const {

return ApplyFunctions [ pType ] . name ;


<s> Relocator :: Size <ISA_LIT>Relocator :: getSize ( Relocation :: Type pType ) const {


<s> SymGOTMap & getSymGOTMap ( ) { return m_SymGOTMap ;


<s> const <ISA_LIT>GNULDBackend & getTarget ( ) const { return m_Target ;


<s> static Relocator :: DWord getThumbBit ( const Relocation & pReloc ) { Relocator :: DWord thumbBit = ( ( ! pReloc . symInfo ( ) -> isUndef ( ) || pReloc . symInfo ( ) -> isDyn ( ) ) && ( pReloc . symInfo ( ) -> type ( ) == ResolveInfo :: Function ) && ( ( pReloc . symValue ( ) & <NUM_LIT> ) != <NUM_LIT> ) ) ? <NUM_LIT> : <NUM_LIT> ;


<s> <ISA_LIT>Relocator :: Result gotoff32 ( Relocation & pReloc , <ISA_LIT>Relocator & pParent ) { Relocator :: DWord T = getThumbBit ( pReloc ) ; Relocator :: DWord A = pReloc . target ( ) + pReloc . addend ( ) ; Relocator :: Address GOT_ORG = helper_GOT_ORG ( pParent ) ; Relocator :: Address S = pReloc . symValue ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ;

pReloc . target ( ) = ( ( S + A ) | T ) - GOT_ORG ;


<s> if ( ! ( pReloc . symInfo ( ) -> reserved ( ) & <ISA_LIT>Relocator :: ReserveGOT ) ) return Relocator :: BadReloc ; Relocator :: Address GOT_S = helper_get_GOT_address ( * pReloc . symInfo ( ) , pParent ) ;

Relocator :: DWord A = pReloc . target ( ) + pReloc . addend ( ) ;


<s> pReloc . target ( ) = GOT_S + A - P ; <ISA_LIT>GOTEntry * got_entry = pParent . getSymGOTMap ( ) . lookUp ( * pReloc . symInfo ( ) ) ; if ( got_entry != NULL && <ISA_LIT>Relocator :: SymVal == got_entry -> getValue ( ) ) got_entry -> setValue ( pReloc . symValue ( ) ) ; return Relocator :: OK ;


<s> return ( pA & ~ pMask ) | ( pB & pMask ) ;


<s> int32_t max = ( <NUM_LIT> << ( bits - <NUM_LIT> ) ) - <NUM_LIT> ;

int32_t min = - ( <NUM_LIT> << ( bits - <NUM_LIT> ) ) ;


<s> <ISA_LIT>GNULDBackend & ld_backend = pParent . getTarget ( ) ; Relocation & rel_entry = * ld_backend . getRelDyn ( ) . create ( ) ; rel_entry . setType ( pType ) ; rel_entry . targetRef ( ) = pReloc . targetRef ( ) ; if ( pType == llvm :: ELF :: R_<ISA_LIT>_RELATIVE ) rel_entry . setSymInfo ( NULL ) ; else rel_entry . setSymInfo ( rsym ) ;


<s> static void helper_DynRel_init ( Relocation & pReloc , Relocator :: Type pType , <ISA_LIT>Relocator & pParent ) { ResolveInfo * rsym = pReloc . symInfo ( ) ; <ISA_LIT>GNULDBackend & ld_backend = pParent . getTarget ( ) ; Relocation & rel_entry = * ld_backend . getRelDyn ( ) . create ( ) ; rel_entry . setType ( pType ) ; rel_entry . targetRef ( ) = pReloc . targetRef ( ) ; if ( pType == llvm :: ELF :: R_<ISA_LIT>_RELATIVE ) rel_entry . setSymInfo ( NULL ) ; else rel_entry . setSymInfo ( rsym ) ;


<s> assert ( got_entry != NULL ) ; return pParent . getTarget ( ) . getGOT ( ) . addr ( ) + got_entry -> getOffset ( ) ;


<s> return pParent . getTarget ( ) . getPLT ( ) . addr ( ) + plt_entry -> getOffset ( ) ;


<s> return pParent . getTarget ( ) . getGOT ( ) . addr ( ) ;


<s> pTarget &= <NUM_LIT> ; pTarget |= pImm & <NUM_LIT> ; pTarget |= ( pImm & <NUM_LIT> ) << <NUM_LIT> ;


<s> pValue |= ( pImm & <NUM_LIT> ) << <NUM_LIT> ; pValue |= ( pImm & <NUM_LIT> ) << <NUM_LIT> ;


<s> static Relocator :: DWord helper_insert_val_thumb_movw_movt_inst ( Relocator :: DWord pValue , Relocator :: DWord pImm ) { pValue &= <NUM_LIT> ;

pValue |= ( pImm & <NUM_LIT> ) << <NUM_LIT> ;


<s> assert ( pParent . getSymGOTPLTMap ( ) . lookUp ( * rsym ) == NULL && <STR_LIT> ) ; <ISA_LIT>GOTEntry * gotplt_entry = ld_backend . getGOT ( ) . createGOTPLT ( ) ; pParent . getSymGOTPLTMap ( ) . record ( * rsym , * gotplt_entry ) ; Relocation & rel_entry = * ld_backend . getRelPLT ( ) . create ( ) ;

rel_entry . setType ( llvm :: ELF :: R_<ISA_LIT>_JUMP_SLOT ) ;


<s> if ( pOri_width == <NUM_LIT> ) return pVal ; uint64_t mask = ( ~ ( ( uint64_t ) <NUM_LIT> ) ) >> ( <NUM_LIT> - pOri_width ) ; pVal &= mask ; uint64_t sign_bit = <NUM_LIT> << ( pOri_width - <NUM_LIT> ) ;


<s> return ( ( pLower16 & ~ <NUM_LIT> ) | ( ( ( ( pOffset >> <NUM_LIT> ) & <NUM_LIT> ) ^ ! sign ) << <NUM_LIT> ) | ( ( ( ( pOffset >> <NUM_LIT> ) & <NUM_LIT> ) ^ ! sign ) << <NUM_LIT> ) | ( ( pOffset >> <NUM_LIT> ) & <NUM_LIT> ) ) ;


<s> return ( pUpper16 & ~ <NUM_LIT> ) | ( ( pOffset >> <NUM_LIT> ) & <NUM_LIT> ) | ( sign << <NUM_LIT> ) ;


<s> uint32_t j2 = ( pOffset & <NUM_LIT> ) >> <NUM_LIT> ;


<s> uint32_t j1 = ( pOffset & <NUM_LIT> ) >> <NUM_LIT> ;

uint32_t lo = ( pOffset & <NUM_LIT> ) >> <NUM_LIT> ;


<s> static Relocator :: DWord helper_thumb32_cond_branch_offset ( Relocator :: DWord pUpper16 , Relocator :: DWord pLower16 ) { uint32_t s = ( pUpper16 & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t j1 = ( pLower16 & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t j2 = ( pLower16 & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t lower = ( pLower16 & <NUM_LIT> ) ;

uint32_t upper = ( s << <NUM_LIT> ) | ( j2 << <NUM_LIT> ) | ( j1 << <NUM_LIT> ) | ( pUpper16 & <NUM_LIT> ) ;


<s> static Relocator :: DWord helper_thumb32_cond_branch_offset ( Relocator :: DWord pUpper16 , Relocator :: DWord pLower16 ) { uint32_t s = ( pUpper16 & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t j1 = ( pLower16 & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t j2 = ( pLower16 & <NUM_LIT> ) >> <NUM_LIT> ;

uint32_t lower = ( pLower16 & <NUM_LIT> ) ;


<s> static Relocator :: DWord helper_thumb32_cond_branch_upper ( Relocator :: DWord pUpper16 , Relocator :: DWord pOffset ) { uint32_t sign = ( ( pOffset & <NUM_LIT> ) >> <NUM_LIT> ) ; return ( pUpper16 & <NUM_LIT> ) | ( sign << <NUM_LIT> ) | ( ( pOffset & <NUM_LIT> ) >> <NUM_LIT> ) ;


<s> if ( pSym . isDyn ( ) || pSym . isUndef ( ) || pFactory . getTarget ( ) . isSymbolPreemptible ( pSym ) ) return false ;


<s> if ( pSym . isDyn ( ) || pSym . isUndef ( ) || pFactory . getTarget ( ) . isSymbolPreemptible ( pSym ) ) return false ; return true ;


<s> case llvm :: ELF :: R_<ISA_LIT>_THM_CALL : case llvm :: ELF :: R_<ISA_LIT>_PLT32 : case llvm :: ELF :: R_<ISA_LIT>_CALL : case llvm :: ELF :: R_<ISA_LIT>_JUMP24 : case llvm :: ELF :: R_<ISA_LIT>_THM_JUMP24 : case llvm :: ELF :: R_<ISA_LIT>_SBREL31 : case llvm :: ELF :: R_<ISA_LIT>_PREL31 : case llvm :: ELF :: R_<ISA_LIT>_THM_JUMP19 : case llvm :: ELF :: R_<ISA_LIT>_THM_JUMP6 : case llvm :: ELF :: R_<ISA_LIT>_THM_JUMP11 : case llvm :: ELF :: R_<ISA_LIT>_THM_JUMP8 : {


<s> Relocator :: DWord A = helper_extract_movw_movt_addend ( pReloc . target ( ) ) + pReloc . addend ( ) ; LDSection & target_sect = pReloc . targetRef ( ) . frag ( ) -> getParent ( ) -> getSection ( ) ; if ( ( llvm :: ELF :: SHF_ALLOC & target_sect . flag ( ) ) != <NUM_LIT> ) { if ( rsym -> reserved ( ) & <ISA_LIT>Relocator :: ReservePLT ) { S = helper_get_PLT_address ( * rsym , pParent ) ; } } Relocator :: DWord X = S + A ;


<s> Relocator :: DWord A = helper_extract_movw_movt_addend ( pReloc . target ( ) ) + pReloc . addend ( ) ;


<s> Relocator :: DWord A = helper_extract_movw_movt_addend ( pReloc . target ( ) ) + pReloc . addend ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; LDSection & target_sect = pReloc . targetRef ( ) . frag ( ) -> getParent ( ) -> getSection ( ) ;

if ( ( llvm :: ELF :: SHF_ALLOC & target_sect . flag ( ) ) != <NUM_LIT> ) {


<s> Relocator :: DWord T = getThumbBit ( pReloc ) ; Relocator :: DWord A = helper_extract_movw_movt_addend ( pReloc . target ( ) ) + pReloc . addend ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; LDSection & target_sect = pReloc . targetRef ( ) . frag ( ) -> getParent ( ) -> getSection ( ) ; if ( ( llvm :: ELF :: SHF_ALLOC & target_sect . flag ( ) ) != <NUM_LIT> ) { if ( rsym -> reserved ( ) & <ISA_LIT>Relocator :: ReservePLT ) { S = helper_get_PLT_address ( * rsym , pParent ) ; T = <NUM_LIT> ; } } Relocator :: DWord X = ( S + A ) | T ;

pReloc . target ( ) = helper_insert_val_movw_movt_inst ( pReloc . target ( ) + pReloc . addend ( ) , X ) ;


<s> if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) { return Relocator :: Overflow ; } else { pReloc . target ( ) = helper_insert_val_movw_movt_inst ( pReloc . target ( ) , X ) ; return Relocator :: OK ;


<s> Relocator :: DWord A = helper_extract_movw_movt_addend ( pReloc . target ( ) ) + pReloc . addend ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; Relocator :: DWord X = ( ( S + A ) | T ) - P ; if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) { return Relocator :: Overflow ; } else {

pReloc . target ( ) = helper_insert_val_movw_movt_inst ( pReloc . target ( ) , X ) ;


<s> Relocator :: DWord A = helper_sign_extend ( target , <NUM_LIT> ) + pReloc . addend ( ) ; Relocator :: DWord P = pReloc . place ( ) ; Relocator :: Address S = pReloc . symValue ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; if ( pReloc . symInfo ( ) -> reserved ( ) & <ISA_LIT>Relocator :: ReservePLT ) { S = helper_get_PLT_address ( * pReloc . symInfo ( ) , pParent ) ;


<s> Relocator :: DWord target = pReloc . target ( ) ; Relocator :: DWord T = getThumbBit ( pReloc ) ; Relocator :: DWord A = helper_sign_extend ( target , <NUM_LIT> ) + pReloc . addend ( ) ; Relocator :: DWord P = pReloc . place ( ) ;

Relocator :: Address S = pReloc . symValue ( ) ;


<s> rsym -> setReserved ( rsym -> reserved ( ) | ReserveRel ) ; getTarget ( ) . checkAndSetHasTextRel ( * pSection . getLink ( ) ) ; } return ; } case llvm :: ELF :: R_<ISA_LIT>_ABS16 : case llvm :: ELF :: R_<ISA_LIT>_ABS12 : case llvm :: ELF :: R_<ISA_LIT>_THM_ABS5 : case llvm :: ELF :: R_<ISA_LIT>_ABS8 : case llvm :: ELF :: R_<ISA_LIT>_BASE_ABS : case llvm :: ELF :: R_<ISA_LIT>_MOVW_ABS_NC : case llvm :: ELF :: R_<ISA_LIT>_MOVT_ABS : case llvm :: ELF :: R_<ISA_LIT>_THM_MOVW_ABS_NC : case llvm :: ELF :: R_<ISA_LIT>_THM_MOVT_ABS : { if ( config ( ) . isCodeIndep ( ) ) { error ( diag :: non_pic_relocation ) << getName ( pReloc . type ( ) ) << pReloc . symInfo ( ) -> name ( ) ; } return ; } case llvm :: ELF :: R_<ISA_LIT>_GOTOFF32 : case llvm :: ELF :: R_<ISA_LIT>_GOTOFF12 : { return ; } case llvm :: ELF :: R_<ISA_LIT>_TARGET2 : pReloc . setType ( llvm :: ELF :: R_<ISA_LIT>_GOT_PREL ) ; case llvm :: ELF :: R_<ISA_LIT>_GOT_BREL : case llvm :: ELF :: R_<ISA_LIT>_GOT_PREL : {

if ( rsym -> reserved ( ) & ReserveGOT ) return ;


<s> ResolveInfo * rsym = pReloc . symInfo ( ) ; assert ( rsym != NULL && <STR_LIT> ) ; assert ( pSection . getLink ( ) != NULL ) ; if ( ( pSection . getLink ( ) -> flag ( ) & llvm :: ELF :: SHF_ALLOC ) == <NUM_LIT> ) return ; if ( rsym -> isLocal ( ) ) scanLocalReloc ( pReloc , pSection ) ; else scanGlobalReloc ( pReloc , pBuilder , pSection ) ;

if ( rsym -> isUndef ( ) && ! rsym -> isDyn ( ) && ! rsym -> isWeak ( ) && ! rsym -> isNull ( ) ) issueUndefRef ( pReloc , pSection , pInput ) ;


<s> T = <NUM_LIT> ; } else { S = pReloc . symValue ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; } S = S + A ; if ( T == <NUM_LIT> ) { if ( pReloc . type ( ) == llvm :: ELF :: R_<ISA_LIT>_THM_JUMP24 ) return Relocator :: BadReloc ; S = helper_bit_select ( S , P , <NUM_LIT> ) ; lower_inst &= ~ <NUM_LIT> ; } else { lower_inst |= <NUM_LIT> ; } Relocator :: DWord X = ( S | T ) - P ; if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) { return Relocator :: Overflow ; } upper_inst = helper_thumb32_branch_upper ( upper_inst , X ) ;

lower_inst = helper_thumb32_branch_lower ( lower_inst , X ) ;


<s> if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) return Relocator :: Overflow ; pReloc . target ( ) = ( pReloc . target ( ) & <NUM_LIT> ) | ( ( X & <NUM_LIT> ) >> <NUM_LIT> ) ; return Relocator :: OK ;


<s> Relocator :: DWord X = ( ( S + A ) | T ) - P ; if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) return Relocator :: Overflow ; upper_inst = helper_thumb32_cond_branch_upper ( upper_inst , X ) ; lower_inst = helper_thumb32_cond_branch_lower ( lower_inst , X ) ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) = upper_inst ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) = lower_inst ; return Relocator :: OK ;


<s> <ISA_LIT>Relocator :: Result thm_jump8 ( Relocation & pReloc , <ISA_LIT>Relocator & pParent ) { Relocator :: DWord P = pReloc . place ( ) ;

Relocator :: DWord A = helper_sign_extend ( ( pReloc . target ( ) & <NUM_LIT> ) << <NUM_LIT> , <NUM_LIT> ) + pReloc . addend ( ) ;


<s> if ( ( llvm :: ELF :: SHF_ALLOC & target_sect . flag ( ) ) != <NUM_LIT> ) { if ( rsym -> reserved ( ) & <ISA_LIT>Relocator :: ReservePLT ) { S = helper_get_PLT_address ( * rsym , pParent ) ; } } Relocator :: DWord X = S + A ; X >>= <NUM_LIT> ; if ( helper_check_signed_overflow ( X , <NUM_LIT> ) ) return Relocator :: Overflow ; val = helper_insert_val_thumb_movw_movt_inst ( val , X ) ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) = val >> <NUM_LIT> ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) = val & <NUM_LIT> ;


<s> X >>= <NUM_LIT> ; val = helper_insert_val_thumb_movw_movt_inst ( val , X ) ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) = val >> <NUM_LIT> ;

* ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) = val & <NUM_LIT> ;


<s> X >>= <NUM_LIT> ; val = helper_insert_val_thumb_movw_movt_inst ( val , X ) ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) = val >> <NUM_LIT> ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) = val & <NUM_LIT> ;


<s> if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; uint16_t upper_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) ; uint16_t lower_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) ; Relocator :: DWord val = ( ( upper_inst ) << <NUM_LIT> ) | ( lower_inst ) ; Relocator :: DWord A = helper_extract_thumb_movw_movt_addend ( val ) + pReloc . addend ( ) ; LDSection & target_sect = pReloc . targetRef ( ) . frag ( ) -> getParent ( ) -> getSection ( ) ; if ( ( llvm :: ELF :: SHF_ALLOC & target_sect . flag ( ) ) != <NUM_LIT> ) { if ( rsym -> reserved ( ) & <ISA_LIT>Relocator :: ReservePLT ) { S = helper_get_PLT_address ( * rsym , pParent ) ; T = <NUM_LIT> ; } } Relocator :: DWord X = ( S + A ) | T ; val = helper_insert_val_thumb_movw_movt_inst ( val , X ) ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) = val >> <NUM_LIT> ; * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) = val & <NUM_LIT> ;


<s> Relocator :: Address S = pReloc . symValue ( ) ; Relocator :: DWord T = getThumbBit ( pReloc ) ; Relocator :: DWord P = pReloc . place ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; uint16_t upper_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) ; uint16_t lower_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) ; Relocator :: DWord val = ( ( upper_inst ) << <NUM_LIT> ) | ( lower_inst ) ;

Relocator :: DWord A = helper_extract_thumb_movw_movt_addend ( val ) + pReloc . addend ( ) ;


<s> if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; uint16_t upper_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) ; uint16_t lower_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) ; Relocator :: DWord val = ( ( upper_inst ) << <NUM_LIT> ) | ( lower_inst ) ;


<s> Relocator :: DWord T = getThumbBit ( pReloc ) ; Relocator :: DWord P = pReloc . place ( ) ; if ( T != <NUM_LIT> ) helper_clear_thumb_bit ( S ) ; uint16_t upper_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) ) ; uint16_t lower_inst = * ( reinterpret_cast < uint16_t * > ( & pReloc . target ( ) ) + <NUM_LIT> ) ; Relocator :: DWord val = ( ( upper_inst ) << <NUM_LIT> ) | ( lower_inst ) ; Relocator :: DWord A = helper_extract_thumb_movw_movt_addend ( val ) + pReloc . addend ( ) ; Relocator :: DWord X = ( ( S + A ) | T ) - P ;

val = helper_insert_val_thumb_movw_movt_inst ( val , X ) ;


<s> <ISA_LIT>Relocator :: Result tls ( Relocation & pReloc , <ISA_LIT>Relocator & pParent ) {


<s> <ISA_LIT>Relocator :: Result unsupported ( Relocation & pReloc , <ISA_LIT>Relocator & pParent ) {


<s> <ISA_LIT>Relocator :: ~ <ISA_LIT>Relocator ( ) {


<s> default : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; }


<s> switch ( Opcode ) { default : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; }


<s> AEABILibcall = AEABI_MEMMOVE ; break ; case RTLIB :: MEMSET : AEABILibcall = AEABI_MEMSET ; if ( ConstantSDNode * ConstantSrc = dyn_cast < ConstantSDNode > ( Src ) ) if ( ConstantSrc -> getZExtValue ( ) == <NUM_LIT> ) AEABILibcall = AEABI_MEMCLR ; break ; default : return SDValue ( ) ; } enum { ALIGN1 = <NUM_LIT> , ALIGN4 , ALIGN8 } AlignVariant ; if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN8 ; else if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN4 ; else AlignVariant = ALIGN1 ; TargetLowering :: ArgListTy Args ; TargetLowering :: ArgListEntry Entry ; Entry . Ty = DAG . getDataLayout ( ) . getIntPtrType ( * DAG . getContext ( ) ) ; Entry . Node = Dst ; Args . push_back ( Entry ) ; if ( AEABILibcall == AEABI_MEMCLR ) { Entry . Node = Size ; Args . push_back ( Entry ) ; } else if ( AEABILibcall == AEABI_MEMSET ) { Entry . Node = Size ;


<s> uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; unsigned NumMEMCPYs = ( NumMemOps + MaxLoadsInLDM - <NUM_LIT> ) / MaxLoadsInLDM ; if ( NumMEMCPYs > <NUM_LIT> && DAG . getMachineFunction ( ) . getFunction ( ) -> optForMinSize ( ) ) { return SDValue ( ) ; } SDVTList VTs = DAG . getVTList ( <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I != NumMEMCPYs ; ++ I ) { unsigned NextEmittedNumMemOps = NumMemOps * ( I + <NUM_LIT> ) / NumMEMCPYs ; unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps ; Dst = DAG . getNode ( <STR_LIT> , dl , VTs , Chain , Dst , Src , DAG . getConstant ( NumRegs , dl , <STR_LIT> ) ) ; Src = Dst . getValue ( <NUM_LIT> ) ; Chain = Dst . getValue ( <NUM_LIT> ) ; DstPtrInfo = DstPtrInfo . getWithOffset ( NumRegs * VTSize ) ; SrcPtrInfo = SrcPtrInfo . getWithOffset ( NumRegs * VTSize ) ; EmittedNumMemOps = NextEmittedNumMemOps ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } else { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , dl , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; ++ i ; SrcOff += VTSize ; BytesLeft -= VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; i = <NUM_LIT> ; BytesLeft = BytesLeftSave ; while ( BytesLeft ) {


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( const TargetMachine & TM ) : TargetSelectionDAGInfo ( TM ) , Subtarget ( & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ) {


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( const DataLayout & DL ) : TargetSelectionDAGInfo ( & DL ) {


<s> unsigned i = <NUM_LIT> ; const unsigned MAX_LOADS_IN_LDM = Subtarget . isThumb1Only ( ) ? <NUM_LIT> : <NUM_LIT> ; SDValue TFOps [ <NUM_LIT> ] ; SDValue Loads [ <NUM_LIT> ] ; uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; while ( EmittedNumMemOps < NumMemOps ) { for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , isVolatile , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; SrcOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { TFOps [ i ] = DAG . getStore ( Chain , dl , Loads [ i ] , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Dst , DAG . getConstant ( DstOff , <STR_LIT> ) ) , DstPtrInfo . getWithOffset ( DstOff ) , isVolatile , false , <NUM_LIT> ) ; DstOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; EmittedNumMemOps += i ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } else { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , false , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; ++ i ; SrcOff += VTSize ; BytesLeft -= VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; i = <NUM_LIT> ; BytesLeft = BytesLeftSave ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ;


<s> Entry . Node = Size ; Args . push_back ( Entry ) ; } else if ( AEABILibcall == AEABI_MEMSET ) { Entry . Node = Size ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else if ( Src . getValueType ( ) . bitsLT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . isSExt = false ; Args . push_back ( Entry ) ; } else { Entry . Node = Src ; Args . push_back ( Entry ) ; Entry . Node = Size ; Args . push_back ( Entry ) ; } char const * FunctionNames [ <NUM_LIT> ] [ <NUM_LIT> ] = { { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } } ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ;

CLI . setDebugLoc ( dl ) . setChain ( Chain ) . setCallee ( TLI -> getLibcallCallingConv ( LC ) , Type :: getVoidTy ( * DAG . getContext ( ) ) , DAG . getExternalSymbol ( FunctionNames [ AEABILibcall ] [ AlignVariant ] , TLI -> getPointerTy ( DAG . getDataLayout ( ) ) ) , std :: move ( Args ) , <NUM_LIT> ) . setDiscardResult ( ) ;


<s> unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps ; Dst = DAG . getNode ( <STR_LIT> , dl , VTs , Chain , Dst , Src , DAG . getConstant ( NumRegs , dl , <STR_LIT> ) ) ; Src = Dst . getValue ( <NUM_LIT> ) ; Chain = Dst . getValue ( <NUM_LIT> ) ; DstPtrInfo = DstPtrInfo . getWithOffset ( NumRegs * VTSize ) ; SrcPtrInfo = SrcPtrInfo . getWithOffset ( NumRegs * VTSize ) ; EmittedNumMemOps = NextEmittedNumMemOps ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } else { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , dl , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , false , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; ++ i ; SrcOff += VTSize ; BytesLeft -= VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; i = <NUM_LIT> ; BytesLeft = BytesLeftSave ;


<s> SDValue <ISA_LIT>SelectionDAGInfo :: EmitTargetCodeForMemmove ( SelectionDAG & DAG , SDLoc dl , SDValue Chain , SDValue Dst , SDValue Src , SDValue Size , unsigned Align , bool isVolatile , MachinePointerInfo DstPtrInfo , MachinePointerInfo SrcPtrInfo ) const { return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Align , RTLIB :: MEMMOVE ) ;


<s> EmitTargetCodeForMemmove ( SelectionDAG & DAG , SDLoc dl , SDValue Chain , SDValue Dst , SDValue Src , SDValue Size , unsigned Align , bool isVolatile , MachinePointerInfo DstPtrInfo , MachinePointerInfo SrcPtrInfo ) const {

return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Align , RTLIB :: MEMMOVE ) ;


<s> EmitTargetCodeForMemset ( SelectionDAG & DAG , SDLoc dl , SDValue Chain , SDValue Dst , SDValue Src , SDValue Size , unsigned Align , bool isVolatile , MachinePointerInfo DstPtrInfo ) const { return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Align , RTLIB :: MEMSET ) ;


<s> return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Alignment . value ( ) , RTLIB :: MEMSET ) ;


<s> EVT VT = <STR_LIT> ; unsigned VTSize = <NUM_LIT> ; unsigned i = <NUM_LIT> ; const unsigned MAX_LOADS_IN_LDM = Subtarget . isThumb1Only ( ) ? <NUM_LIT> : <NUM_LIT> ; SDValue TFOps [ <NUM_LIT> ] ; SDValue Loads [ <NUM_LIT> ] ; uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; while ( EmittedNumMemOps < NumMemOps ) { for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , isVolatile , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; SrcOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { TFOps [ i ] = DAG . getStore ( Chain , dl , Loads [ i ] , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Dst , DAG . getConstant ( DstOff , <STR_LIT> ) ) , DstPtrInfo . getWithOffset ( DstOff ) , isVolatile , false , <NUM_LIT> ) ; DstOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; EmittedNumMemOps += i ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } else { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , false , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; ++ i ;


<s> unsigned i = <NUM_LIT> ; const unsigned MAX_LOADS_IN_LDM = Subtarget -> isThumb1Only ( ) ? <NUM_LIT> : <NUM_LIT> ; SDValue TFOps [ <NUM_LIT> ] ; SDValue Loads [ <NUM_LIT> ] ; uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; while ( EmittedNumMemOps < NumMemOps ) { for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , isVolatile , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; SrcOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { TFOps [ i ] = DAG . getStore ( Chain , dl , Loads [ i ] , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Dst , DAG . getConstant ( DstOff , <STR_LIT> ) ) , DstPtrInfo . getWithOffset ( DstOff ) , isVolatile , false , <NUM_LIT> ) ; DstOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; EmittedNumMemOps += i ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ;


<s> Entry . Node = Size ; Entry . Ty = IntPtrTy ; Entry . isSExt = false ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . isSExt = true ; Args . push_back ( Entry ) ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ;

CLI . setDebugLoc ( dl ) . setChain ( Chain ) . setCallee ( TLI . getLibcallCallingConv ( RTLIB :: MEMSET ) , Type :: getVoidTy ( * DAG . getContext ( ) ) , DAG . getExternalSymbol ( TLI . getLibcallName ( RTLIB :: MEMSET ) , TLI . getPointerTy ( ) ) , & Args , <NUM_LIT> ) . setDiscardResult ( ) ;


<s> Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , isVolatile , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; SrcOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & TFOps [ <NUM_LIT> ] , i ) ; for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { TFOps [ i ] = DAG . getStore ( Chain , dl , Loads [ i ] , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Dst , DAG . getConstant ( DstOff , <STR_LIT> ) ) , DstPtrInfo . getWithOffset ( DstOff ) , isVolatile , false , <NUM_LIT> ) ; DstOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & TFOps [ <NUM_LIT> ] , i ) ; EmittedNumMemOps += i ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) {


<s> Entry . Ty = IntPtrTy ; Args . push_back ( Entry ) ; Entry . Node = Size ; Entry . Ty = IntPtrTy ; Entry . isSExt = false ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ;


<s> switch ( LC ) { case RTLIB :: MEMCPY : AEABILibcall = AEABI_MEMCPY ; break ; case RTLIB :: MEMMOVE : AEABILibcall = AEABI_MEMMOVE ; break ; case RTLIB :: MEMSET : AEABILibcall = AEABI_MEMSET ; if ( ConstantSDNode * ConstantSrc = dyn_cast < ConstantSDNode > ( Src ) ) if ( ConstantSrc -> getZExtValue ( ) == <NUM_LIT> ) AEABILibcall = AEABI_MEMCLR ; break ; default : return SDValue ( ) ; } enum { ALIGN1 = <NUM_LIT> , ALIGN4 , ALIGN8 } AlignVariant ; if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN8 ; else if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN4 ; else AlignVariant = ALIGN1 ; TargetLowering :: ArgListTy Args ; TargetLowering :: ArgListEntry Entry ; Entry . Ty = DAG . getDataLayout ( ) . getIntPtrType ( * DAG . getContext ( ) ) ; Entry . Node = Dst ; Args . push_back ( Entry ) ; if ( AEABILibcall == AEABI_MEMCLR ) { Entry . Node = Size ; Args . push_back ( Entry ) ; } else if ( AEABILibcall == AEABI_MEMSET ) { Entry . Node = Size ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else if ( Src . getValueType ( ) . bitsLT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . IsSExt = false ; Args . push_back ( Entry ) ; } else { Entry . Node = Src ; Args . push_back ( Entry ) ; Entry . Node = Size ; Args . push_back ( Entry ) ; } char const * FunctionNames [ <NUM_LIT> ] [ <NUM_LIT> ] = { { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> , <STR_LIT> } } ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ; CLI . setDebugLoc ( dl ) . setChain ( Chain ) . setLibCallee ( TLI -> getLibcallCallingConv ( LC ) , Type :: getVoidTy ( * DAG . getContext ( ) ) , DAG . getExternalFunctionSymbol ( FunctionNames [ AEABILibcall ] [ AlignVariant ] ) , std :: move ( Args ) ) . setDiscardResult ( ) ;

std :: pair < SDValue , SDValue > CallResult = TLI -> LowerCallTo ( CLI ) ;


<s> unsigned BytesLeft = SizeVal & <NUM_LIT> ; unsigned NumMemOps = SizeVal >> <NUM_LIT> ; unsigned EmittedNumMemOps = <NUM_LIT> ; EVT VT = <STR_LIT> ; unsigned VTSize = <NUM_LIT> ; unsigned i = <NUM_LIT> ; const unsigned MaxLoadsInLDM = Subtarget . isThumb1Only ( ) ? <NUM_LIT> : <NUM_LIT> ; SDValue TFOps [ <NUM_LIT> ] ; SDValue Loads [ <NUM_LIT> ] ; uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; unsigned NumMEMCPYs = ( NumMemOps + MaxLoadsInLDM - <NUM_LIT> ) / MaxLoadsInLDM ; if ( NumMEMCPYs > <NUM_LIT> && Subtarget . hasMinSize ( ) ) { return SDValue ( ) ; } SDVTList VTs = DAG . getVTList ( <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I != NumMEMCPYs ; ++ I ) { unsigned NextEmittedNumMemOps = NumMemOps * ( I + <NUM_LIT> ) / NumMEMCPYs ; unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps ; Dst = DAG . getNode ( <STR_LIT> , dl , VTs , Chain , Dst , Src , DAG . getConstant ( NumRegs , dl , <STR_LIT> ) ) ; Src = Dst . getValue ( <NUM_LIT> ) ; Chain = Dst . getValue ( <NUM_LIT> ) ; DstPtrInfo = DstPtrInfo . getWithOffset ( NumRegs * VTSize ) ; SrcPtrInfo = SrcPtrInfo . getWithOffset ( NumRegs * VTSize ) ; EmittedNumMemOps = NextEmittedNumMemOps ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; auto getRemainingValueType = [ ] ( unsigned BytesLeft ) { return ( BytesLeft >= <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ; } ; auto getRemainingSize = [ ] ( unsigned BytesLeft ) {

return ( BytesLeft >= <NUM_LIT> ) ? <NUM_LIT> : <NUM_LIT> ;


<s> SDValue <ISA_LIT>SelectionDAGInfo :: EmitTargetCodeForMemmove ( SelectionDAG & DAG , const SDLoc & dl , SDValue Chain , SDValue Dst , SDValue Src , SDValue Size , Align Alignment , bool isVolatile , bool MustPreserveCheriCapabilities , MachinePointerInfo DstPtrInfo , MachinePointerInfo SrcPtrInfo ) const {

return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Alignment . value ( ) , RTLIB :: MEMMOVE ) ;


<s> if ( Subtarget . hasMVEIntegerOps ( ) && shouldGenerateInlineTPLoop ( Subtarget , DAG , ConstantSize , Alignment , false ) ) { Src = DAG . getSplatBuildVector ( <STR_LIT> , dl , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , Dst , Src , DAG . getZExtOrTrunc ( Size , dl , <STR_LIT> ) ) ;


<s> if ( ! IsMemcpy ) return true ; if ( ! ConstantSize && Alignment >= Align ( <NUM_LIT> ) ) return true ;

if ( ConstantSize && ConstantSize -> getZExtValue ( ) > Subtarget . getMaxInlineSizeThreshold ( ) && ConstantSize -> getZExtValue ( ) < Subtarget . getMaxMemcpyTPInlineSizeThreshold ( ) ) return true ;


<s> Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . isSExt = true ; Args . push_back ( Entry ) ;

std :: pair < SDValue , SDValue > CallResult = TLI . LowerCallTo ( Chain , Type :: getVoidTy ( * DAG . getContext ( ) ) , false , false , false , false , <NUM_LIT> , TLI . getLibcallCallingConv ( RTLIB :: MEMSET ) , false , false , false , DAG . getExternalSymbol ( TLI . getLibcallName ( RTLIB :: MEMSET ) , TLI . getPointerTy ( ) ) , Args , DAG , dl ) ;


<s> Entry . Ty = IntPtrTy ; Args . push_back ( Entry ) ; Entry . Node = Size ; Entry . Ty = IntPtrTy ; Entry . isSExt = false ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . isSExt = true ; Args . push_back ( Entry ) ;


<s> const <ISA_LIT>Subtarget & Subtarget = DAG . getMachineFunction ( ) . getSubtarget < <ISA_LIT>Subtarget > ( ) ; ConstantSDNode * ConstantSize = dyn_cast < ConstantSDNode > ( Size ) ; if ( Subtarget . hasMVEIntegerOps ( ) && shouldGenerateInlineTPLoop ( Subtarget , DAG , ConstantSize , Alignment , true ) ) return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , Dst , Src , DAG . getZExtOrTrunc ( Size , dl , <STR_LIT> ) ) ; if ( Alignment < Align ( <NUM_LIT> ) ) return SDValue ( ) ; if ( ! ConstantSize ) return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Alignment . value ( ) , RTLIB :: MEMCPY ) ; uint64_t SizeVal = ConstantSize -> getZExtValue ( ) ; if ( ! AlwaysInline && SizeVal > Subtarget . getMaxInlineSizeThreshold ( ) ) return EmitSpecializedLibcall ( DAG , dl , Chain , Dst , Src , Size , Alignment . value ( ) , RTLIB :: MEMCPY ) ; unsigned BytesLeft = SizeVal & <NUM_LIT> ; unsigned NumMemOps = SizeVal >> <NUM_LIT> ; unsigned EmittedNumMemOps = <NUM_LIT> ; EVT VT = <STR_LIT> ; unsigned VTSize = <NUM_LIT> ; unsigned i = <NUM_LIT> ; const unsigned MaxLoadsInLDM = Subtarget . isThumb1Only ( ) ? <NUM_LIT> : <NUM_LIT> ; SDValue TFOps [ <NUM_LIT> ] ; SDValue Loads [ <NUM_LIT> ] ; uint64_t SrcOff = <NUM_LIT> , DstOff = <NUM_LIT> ; unsigned NumMEMCPYs = ( NumMemOps + MaxLoadsInLDM - <NUM_LIT> ) / MaxLoadsInLDM ; if ( NumMEMCPYs > <NUM_LIT> && Subtarget . hasMinSize ( ) ) { return SDValue ( ) ; } SDVTList VTs = DAG . getVTList ( <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I != NumMEMCPYs ; ++ I ) { unsigned NextEmittedNumMemOps = NumMemOps * ( I + <NUM_LIT> ) / NumMEMCPYs ; unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps ; Dst = DAG . getNode ( <STR_LIT> , dl , VTs , Chain , Dst , Src , DAG . getConstant ( NumRegs , dl , <STR_LIT> ) ) ; Src = Dst . getValue ( <NUM_LIT> ) ; Chain = Dst . getValue ( <NUM_LIT> ) ; DstPtrInfo = DstPtrInfo . getWithOffset ( NumRegs * VTSize ) ; SrcPtrInfo = SrcPtrInfo . getWithOffset ( NumRegs * VTSize ) ; EmittedNumMemOps = NextEmittedNumMemOps ; }

if ( BytesLeft == <NUM_LIT> ) return Chain ;


<s> TargetLowering :: ArgListTy Args ; TargetLowering :: ArgListEntry Entry ; Type * IntPtrTy = TLI . getDataLayout ( ) -> getIntPtrType ( * DAG . getContext ( ) ) ; Entry . Node = Dst ; Entry . Ty = IntPtrTy ; Args . push_back ( Entry ) ; Entry . Node = Size ; Entry . Ty = IntPtrTy ; Entry . isSExt = false ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; else Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ; Entry . Node = Src ; Entry . Ty = Type :: getInt32Ty ( * DAG . getContext ( ) ) ; Entry . isSExt = true ; Args . push_back ( Entry ) ; TargetLowering :: CallLoweringInfo CLI ( Chain , Type :: getVoidTy ( * DAG . getContext ( ) ) , false , false , false , false , <NUM_LIT> , TLI . getLibcallCallingConv ( RTLIB :: MEMSET ) , false , false , false , DAG . getExternalSymbol ( TLI . getLibcallName ( RTLIB :: MEMSET ) , TLI . getPointerTy ( ) ) , Args , DAG , dl ) ; std :: pair < SDValue , SDValue > CallResult = TLI . LowerCallTo ( CLI ) ;


<s> case RTLIB :: MEMSET : AEABILibcall = AEABI_MEMSET ; if ( ConstantSDNode * ConstantSrc = dyn_cast < ConstantSDNode > ( Src ) ) if ( ConstantSrc -> getZExtValue ( ) == <NUM_LIT> ) AEABILibcall = AEABI_MEMCLR ; break ; default : return SDValue ( ) ; } enum { ALIGN1 = <NUM_LIT> , ALIGN4 , ALIGN8 } AlignVariant ; if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN8 ; else if ( ( Align & <NUM_LIT> ) == <NUM_LIT> ) AlignVariant = ALIGN4 ; else AlignVariant = ALIGN1 ; TargetLowering :: ArgListTy Args ; TargetLowering :: ArgListEntry Entry ; Entry . Ty = TLI -> getDataLayout ( ) -> getIntPtrType ( * DAG . getContext ( ) ) ; Entry . Node = Dst ; Args . push_back ( Entry ) ; if ( AEABILibcall == AEABI_MEMCLR ) { Entry . Node = Size ; Args . push_back ( Entry ) ; } else if ( AEABILibcall == AEABI_MEMSET ) { Entry . Node = Size ; Args . push_back ( Entry ) ; if ( Src . getValueType ( ) . bitsGT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ;

else if ( Src . getValueType ( ) . bitsLT ( <STR_LIT> ) ) Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src ) ;


<s> } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; for ( i = <NUM_LIT> ; i < MAX_LOADS_IN_LDM && EmittedNumMemOps + i < NumMemOps ; ++ i ) { TFOps [ i ] = DAG . getStore ( Chain , dl , Loads [ i ] , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Dst , DAG . getConstant ( DstOff , dl , <STR_LIT> ) ) , DstPtrInfo . getWithOffset ( DstOff ) , isVolatile , false , <NUM_LIT> ) ; DstOff += VTSize ; } Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , makeArrayRef ( TFOps , i ) ) ; EmittedNumMemOps += i ; } if ( BytesLeft == <NUM_LIT> ) return Chain ; unsigned BytesLeftSave = BytesLeft ; i = <NUM_LIT> ; while ( BytesLeft ) { if ( BytesLeft >= <NUM_LIT> ) { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } else { VT = <STR_LIT> ; VTSize = <NUM_LIT> ; } Loads [ i ] = DAG . getLoad ( VT , dl , Chain , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Src , DAG . getConstant ( SrcOff , dl , <STR_LIT> ) ) , SrcPtrInfo . getWithOffset ( SrcOff ) , false , false , false , <NUM_LIT> ) ; TFOps [ i ] = Loads [ i ] . getValue ( <NUM_LIT> ) ; ++ i ;