<s> StringRef InitOrFiniKernelName = <STR_LIT> ; if ( ! IsCtor ) InitOrFiniKernelName = <STR_LIT> ; Function * InitOrFiniKernel = Function :: createWithDefaultAttr ( FunctionType :: get ( Type :: getVoidTy ( M . getContext ( ) ) , false ) , GlobalValue :: InternalLinkage , <NUM_LIT> , InitOrFiniKernelName , & M ) ; BasicBlock * InitOrFiniKernelBB = BasicBlock :: Create ( M . getContext ( ) , <STR_LIT> , InitOrFiniKernel ) ; ReturnInst :: Create ( M . getContext ( ) , InitOrFiniKernelBB ) ;

InitOrFiniKernel -> setCallingConv ( CallingConv :: <ISA_LIT>_KERNEL ) ;


<s> Function * createInitOrFiniKernelFunction ( Module & M , bool IsCtor ) { StringRef InitOrFiniKernelName = <STR_LIT> ; if ( ! IsCtor ) InitOrFiniKernelName = <STR_LIT> ; Function * InitOrFiniKernel = Function :: createWithDefaultAttr ( FunctionType :: get ( Type :: getVoidTy ( M . getContext ( ) ) , false ) , GlobalValue :: InternalLinkage , <NUM_LIT> , InitOrFiniKernelName , & M ) ; BasicBlock * InitOrFiniKernelBB = BasicBlock :: Create ( M . getContext ( ) , <STR_LIT> , InitOrFiniKernel ) ; ReturnInst :: Create ( M . getContext ( ) , InitOrFiniKernelBB ) ; InitOrFiniKernel -> setCallingConv ( CallingConv :: <ISA_LIT>_KERNEL ) ; if ( IsCtor ) InitOrFiniKernel -> addFnAttr ( <STR_LIT> ) ; else InitOrFiniKernel -> addFnAttr ( <STR_LIT> ) ;


<s> <ISA_LIT>CtorDtorLowering ( ) : ModulePass ( ID ) {


<s> return new <ISA_LIT>CtorDtorLowering ( ) ;


<s> for ( Value * V : GA -> operands ( ) ) { auto * CS = cast < ConstantStruct > ( V ) ; if ( Function * F = dyn_cast < Function > ( CS -> getOperand ( <NUM_LIT> ) ) ) { FunctionCallee Ctor = M . getOrInsertFunction ( F -> getName ( ) , IRB . getVoidTy ( ) ) ; IRB . CreateCall ( Ctor ) ; }


<s> if ( ! IsCtor ) InitOrFiniKernelName = <STR_LIT> ; Function * InitOrFiniKernel = Function :: createWithDefaultAttr ( FunctionType :: get ( Type :: getVoidTy ( M . getContext ( ) ) , false ) , GlobalValue :: ExternalLinkage , <NUM_LIT> , InitOrFiniKernelName , & M ) ; BasicBlock * InitOrFiniKernelBB = BasicBlock :: Create ( M . getContext ( ) , <STR_LIT> , InitOrFiniKernel ) ;

ReturnInst :: Create ( M . getContext ( ) , InitOrFiniKernelBB ) ;


<s> Function * createInitOrFiniKernelFunction ( Module & M , bool IsCtor ) { StringRef InitOrFiniKernelName = <STR_LIT> ; if ( ! IsCtor ) InitOrFiniKernelName = <STR_LIT> ; Function * InitOrFiniKernel = Function :: createWithDefaultAttr ( FunctionType :: get ( Type :: getVoidTy ( M . getContext ( ) ) , false ) , GlobalValue :: ExternalLinkage , <NUM_LIT> , InitOrFiniKernelName , & M ) ; BasicBlock * InitOrFiniKernelBB = BasicBlock :: Create ( M . getContext ( ) , <STR_LIT> , InitOrFiniKernel ) ; ReturnInst :: Create ( M . getContext ( ) , InitOrFiniKernelBB ) ; InitOrFiniKernel -> setCallingConv ( CallingConv :: <ISA_LIT>_KERNEL ) ;

if ( IsCtor ) InitOrFiniKernel -> addFnAttr ( <STR_LIT> ) ;


<s> bool Modified = false ; Modified |= createInitOrFiniKernel ( M , M . getGlobalVariable ( <STR_LIT> ) , true ) ;

Modified |= createInitOrFiniKernel ( M , M . getGlobalVariable ( <STR_LIT> ) , false ) ;


<s> void postProcessInstruction ( std :: unique_ptr < mca :: Instruction > & Inst , const MCInst & MCI ) override {


<s> const Instruction & PrevInst = * PrevIR . getInstruction ( ) ; const unsigned PrevInstIndex = PrevIR . getSourceIndex ( ) % SrcMgr . size ( ) ; const WaitCntInfo & PrevInstWaitInfo = InstrWaitCntInfo [ PrevInstIndex ] ; const int CyclesLeft = PrevInst . getCyclesLeft ( ) ; assert ( CyclesLeft != UNKNOWN_CYCLES && <STR_LIT> ) ; if ( PrevInstWaitInfo . VmCnt ) { CurrVmcnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitVm ) CyclesToWaitVm = CyclesLeft ; } if ( PrevInstWaitInfo . ExpCnt ) { CurrExpcnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitExp ) CyclesToWaitExp = CyclesLeft ; } if ( PrevInstWaitInfo . LgkmCnt ) { CurrLgkmcnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitLgkm ) CyclesToWaitLgkm = CyclesLeft ; } if ( PrevInstWaitInfo . VsCnt ) { CurrVscnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitVs ) CyclesToWaitVs = CyclesLeft ; } } unsigned CyclesToWait = ~ <NUM_LIT> ; if ( CurrVmcnt > Vmcnt && CyclesToWaitVm < CyclesToWait ) CyclesToWait = CyclesToWaitVm ; if ( CurrExpcnt > Expcnt && CyclesToWaitExp < CyclesToWait ) CyclesToWait = CyclesToWaitExp ; if ( CurrLgkmcnt > Lgkmcnt && CyclesToWaitLgkm < CyclesToWait ) CyclesToWait = CyclesToWaitLgkm ; if ( CurrVscnt > Vscnt && CyclesToWaitVs < CyclesToWait ) CyclesToWait = CyclesToWaitVs ; if ( CyclesToWait == ~ <NUM_LIT> ) return <NUM_LIT> ; return CyclesToWait ;


<s> <ISA_LIT>CustomBehaviour :: <ISA_LIT>CustomBehaviour ( const MCSubtargetInfo & STI , const mca :: SourceMgr & SrcMgr , const MCInstrInfo & MCII ) : CustomBehaviour ( STI , SrcMgr , MCII ) {


<s> unsigned <ISA_LIT>CustomBehaviour :: checkCustomHazard ( ArrayRef < mca :: InstRef > IssuedInst , const mca :: InstRef & IR ) { return <NUM_LIT> ;


<s> <ISA_LIT>InstrPostProcess ( const MCSubtargetInfo & STI , const MCInstrInfo & MCII ) : InstrPostProcess ( STI , MCII ) {


<s> return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return handleWaitCnt ( IssuedInst , IR ) ; } return <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { const MCAOperand * OpReg = Inst . getOperand ( <NUM_LIT> ) ; const MCAOperand * OpImm = Inst . getOperand ( <NUM_LIT> ) ; assert ( OpReg && OpReg -> isReg ( ) && <STR_LIT> ) ; assert ( OpImm && OpImm -> isImm ( ) && <STR_LIT> ) ; if ( OpReg -> getReg ( ) != <STR_LIT> ) { WithColor :: warning ( ) << <STR_LIT> << MCII . getName ( Opcode ) << <STR_LIT> << <STR_LIT> ; } switch ( Opcode ) { case <STR_LIT> : Expcnt = OpImm -> getImm ( ) ; break ; case <STR_LIT> : Lgkmcnt = OpImm -> getImm ( ) ; break ; case <STR_LIT> : Vmcnt = OpImm -> getImm ( ) ; break ; case <STR_LIT> : Vscnt = OpImm -> getImm ( ) ; break ;


<s> return new <ISA_LIT>CustomBehaviour ( STI , SrcMgr , MCII ) ;


<s> if ( ! STI . hasFeature ( <STR_LIT> ) ) InstrWaitCntInfo [ Index ] . VmCnt = true ; else if ( MCID . mayLoad ( ) && ! ( MCID . TSFlags & <STR_LIT> ) ) InstrWaitCntInfo [ Index ] . VmCnt = true ; else InstrWaitCntInfo [ Index ] . VsCnt = true ; } else if ( isVMEM ( MCID ) && ! <STR_LIT> ( Opcode ) ) { if ( ! STI . hasFeature ( <STR_LIT> ) ) InstrWaitCntInfo [ Index ] . VmCnt = true ; else if ( ( MCID . mayLoad ( ) && ! ( MCID . TSFlags & <STR_LIT> ) ) || ( ( MCID . TSFlags & <STR_LIT> ) && ! MCID . mayLoad ( ) && ! MCID . mayStore ( ) ) ) InstrWaitCntInfo [ Index ] . VmCnt = true ; else if ( MCID . mayStore ( ) ) InstrWaitCntInfo [ Index ] . VsCnt = true ; if ( IV . Major < <NUM_LIT> && ( MCID . mayStore ( ) || ( MCID . TSFlags & <STR_LIT> ) ) ) InstrWaitCntInfo [ Index ] . ExpCnt = true ; } else if ( MCID . TSFlags & <STR_LIT> ) { InstrWaitCntInfo [ Index ] . LgkmCnt = true ; } else if ( MCID . TSFlags & <STR_LIT> ) { InstrWaitCntInfo [ Index ] . ExpCnt = true ; } else { switch ( Opcode ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> const Instruction & PrevInst = * PrevIR . getInstruction ( ) ; const unsigned PrevInstIndex = PrevIR . getSourceIndex ( ) % SrcMgr . size ( ) ; const WaitCntInfo & PrevInstWaitInfo = InstrWaitCntInfo [ PrevInstIndex ] ; const int CyclesLeft = PrevInst . getCyclesLeft ( ) ; assert ( CyclesLeft != UNKNOWN_CYCLES && <STR_LIT> ) ; if ( PrevInstWaitInfo . VmCnt ) { CurrVmcnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitVm ) CyclesToWaitVm = CyclesLeft ; } if ( PrevInstWaitInfo . ExpCnt ) { CurrExpcnt ++ ; if ( ( unsigned ) CyclesLeft < CyclesToWaitExp ) CyclesToWaitExp = CyclesLeft ; } if ( PrevInstWaitInfo . LgkmCnt ) {


<s> bool <ISA_LIT>CustomBehaviour :: hasModifiersSet ( const std :: unique_ptr < Instruction > & Inst , unsigned OpName ) const { int Idx = <STR_LIT> ( Inst -> getOpcode ( ) , OpName ) ; if ( Idx == - <NUM_LIT> ) return false ; const MCAOperand * Op = Inst -> getOperand ( Idx ) ;

if ( Op == nullptr || ! Op -> isImm ( ) || ! Op -> getImm ( ) ) return false ;


<s> bool <ISA_LIT>CustomBehaviour :: isAlwaysGDS ( uint16_t Opcode ) const {

return Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ;


<s> return MCID . TSFlags & <STR_LIT> || MCID . TSFlags & <STR_LIT> || MCID . TSFlags & <STR_LIT> ;


<s> TargetRegistry :: RegisterInstrPostProcess ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>InstrPostProcess ) ;

TargetRegistry :: RegisterCustomBehaviour ( getTheGCNTarget ( ) , create<ISA_LIT>CustomBehaviour ) ;


<s> void <ISA_LIT>InstrPostProcess :: postProcessInstruction ( std :: unique_ptr < Instruction > & Inst , const MCInst & MCI ) { switch ( MCI . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> :


<s> static bool classof ( const DiagnosticInfo * DI ) { return DI -> getKind ( ) == getKindID ( ) ;


<s> return DI -> getKind ( ) == getKindID ( ) ;


<s> DiagnosticInfoUnsupported :: DiagnosticInfoUnsupported ( const Function & Fn , const Twine & Desc , DiagnosticSeverity Severity ) : DiagnosticInfo ( getKindID ( ) , Severity ) , Description ( Desc ) , Fn ( Fn ) {


<s> const Function & getFunction ( ) const { return Fn ;


<s> if ( KindID == <NUM_LIT> ) KindID = llvm :: getNextAvailablePluginDiagnosticKind ( ) ;


<s> DP << <STR_LIT> << getDescription ( ) << <STR_LIT> << Fn . getName ( ) ;


<s> Inst . addOperand ( Opnd ) ; return Opnd . isValid ( ) ? MCDisassembler :: Success :


<s> DecodeStatus <ISA_LIT>Disassembler :: convertSDWAInst ( MCInst & MI ) const { if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) {

if ( <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: sdst ) != - <NUM_LIT> ) insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: clamp ) ;


<s> const auto & RegCl = <ISA_LIT>MCRegisterClasses [ RegClassID ] ; if ( Val >= RegCl . getNumRegs ( ) ) return errOperand ( Val , Twine ( getRegClassName ( RegClassID ) ) + <STR_LIT> + Twine ( Val ) ) ; return createRegOperand ( RegCl . getRegister ( Val ) ) ;


<s> int shift = <NUM_LIT> ; switch ( SRegClassID ) { case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : case <STR_LIT> : shift = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : shift = <NUM_LIT> ; break ; default :


<s> switch ( Width ) { case OPW32 : return MCOperand :: createImm ( getInlineImmVal32 ( Imm ) ) ; case OPW64 : return MCOperand :: createImm ( getInlineImmVal64 ( Imm ) ) ; case OPW16 : case OPWV216 : return MCOperand :: createImm ( getInlineImmVal16 ( Imm ) ) ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeIntImmed ( unsigned Imm ) { using namespace <STR_LIT> ; assert ( Imm >= INLINE_INTEGER_C_MIN && Imm <= INLINE_INTEGER_C_MAX ) ; return MCOperand :: createImm ( ( Imm <= INLINE_INTEGER_C_PO<ISA_LIT>TIVE_MAX ) ? ( static_cast < int64_t > ( Imm ) - INLINE_INTEGER_C_MIN ) :

( INLINE_INTEGER_C_PO<ISA_LIT>TIVE_MAX - static_cast < int64_t > ( Imm ) ) ) ;


<s> assert ( Imm >= INLINE_INTEGER_C_MIN && Imm <= INLINE_INTEGER_C_MAX ) ; return MCOperand :: createImm ( ( Imm <= INLINE_INTEGER_C_PO<ISA_LIT>TIVE_MAX ) ? ( static_cast < int64_t > ( Imm ) - INLINE_INTEGER_C_MIN ) : ( INLINE_INTEGER_C_PO<ISA_LIT>TIVE_MAX - static_cast < int64_t > ( Imm ) ) ) ;


<s> HasLiteral = true ; Literal = eatBytes < uint32_t > ( Bytes ) ; }

return MCOperand :: createImm ( Literal ) ;


<s> return decodeSrcOp ( OPW128 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_SReg_128 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_SReg_256 ( unsigned Val ) const {

return createSRegOperand ( <STR_LIT> , Val ) ;


<s> return decodeOperand_SReg_32 ( Val ) ;


<s> return decodeSrcOp ( OPW64 , Val ) ;


<s> return createRegOperand ( <STR_LIT> , Val ) ;


return createRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VReg_128 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VReg_128 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VReg_96 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val ) ;


<s> return decodeSrcOp ( OPW16 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VSrc16 ( unsigned Val ) const { return decodeSrcOp ( OPW16 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VSrcV216 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VSrcV216 ( unsigned Val ) const { return decodeSrcOp ( OPWV216 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VS_32 ( unsigned Val ) const { return decodeSrcOp ( OPW32 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VS_64 ( unsigned Val ) const { return decodeSrcOp ( OPW64 , Val ) ;


<s> if ( SDWA9EncValues :: SRC_SGPR_MIN <= Val && Val <= SDWA9EncValues :: SRC_SGPR_MAX ) { return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } return decodeSpecialReg32 ( Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { return createRegOperand ( getVgprClassId ( Width ) , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeSDWASrc16 ( unsigned Val ) const {


<s> return decodeSDWASrc ( OPW32 , Val ) ;


<s> return decodeSpecialReg64 ( Val ) ; } else { return createSRegOperand ( getSgprClassId ( OPW64 ) , Val ) ; } } else {


<s> APInt SignedOffset ( <NUM_LIT> , Imm * <NUM_LIT> , true ) ; int64_t Offset = ( SignedOffset . sext ( <NUM_LIT> ) + <NUM_LIT> + Addr ) . getSExtValue ( ) ;

if ( DAsm -> tryAddingSymbolicOperand ( Inst , Offset , Addr , true , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Success ;


<s> case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( SCC ) ;


<s> case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : return createRegOperand ( TBA_LO ) ; case <NUM_LIT> : return createRegOperand ( TBA_HI ) ; case <NUM_LIT> : return createRegOperand ( TMA_LO ) ; case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ;

case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ;


<s> case <NUM_LIT> : return createRegOperand ( getMCReg ( FLAT_SCR , STI ) ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : return createRegOperand ( TBA ) ; case <NUM_LIT> : return createRegOperand ( TMA ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ;


<s> case <NUM_LIT> : return createRegOperand ( TBA ) ; case <NUM_LIT> : return createRegOperand ( TMA ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ;


<s> * CommentStream << <STR_LIT> + ErrMsg ; return MCOperand ( ) ;


<s> switch ( Imm ) { case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> :


<s> case <NUM_LIT> : return FloatToBits ( - <NUM_LIT> ) ; case <NUM_LIT> : return FloatToBits ( <NUM_LIT> ) ; case <NUM_LIT> : return FloatToBits ( - <NUM_LIT> ) ;


<s> case <NUM_LIT> : return DoubleToBits ( <NUM_LIT> ) ; case <NUM_LIT> : return DoubleToBits ( - <NUM_LIT> ) ; case <NUM_LIT> : return <NUM_LIT> ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> case <NUM_LIT> : return DoubleToBits ( - <NUM_LIT> ) ; case <NUM_LIT> : return DoubleToBits ( <NUM_LIT> ) ; case <NUM_LIT> : return DoubleToBits ( - <NUM_LIT> ) ;


<s> const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) { insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src2_modifiers ) ;


<s> const char * <ISA_LIT>Disassembler :: getRegClassName ( unsigned RegClassID ) const {

return getContext ( ) . getRegisterInfo ( ) -> getRegClassName ( & <ISA_LIT>MCRegisterClasses [ RegClassID ] ) ;


<s> case OPWV216 : return SGPR_32RegClassID ; case OPW64 : return SGPR_64RegClassID ; case OPW128 : return SGPR_128RegClassID ; }


<s> default : case OPW32 : case OPW16 : case OPWV216 : return TTMP_32RegClassID ; case OPW64 : return TTMP_64RegClassID ;

case OPW128 : return TTMP_128RegClassID ;


<s> unsigned <ISA_LIT>Disassembler :: getVgprClassId ( const OpWidthTy Width ) const { using namespace <ISA_LIT> ; assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : case OPW16 : case OPWV216 : return VGPR_32RegClassID ; case OPW64 : return VReg_64RegClassID ;

case OPW128 : return VReg_128RegClassID ;


<s> static int insertNamedMCOperand ( MCInst & MI , const MCOperand & Op , uint16_t NameIdx ) { int OpIdx = <STR_LIT> ( MI . getOpcode ( ) , NameIdx ) ; if ( OpIdx != - <NUM_LIT> ) { auto I = MI . begin ( ) ; std :: advance ( I , OpIdx ) ; MI . insert ( I , Op ) ;


<s> std :: advance ( I , OpIdx ) ; MI . insert ( I , Op ) ; }


<s> TargetRegistry :: RegisterMCSymbolizer ( getTheGCNTarget ( ) , create<ISA_LIT>Symbolizer ) ;


<s> if ( ! IsBranch ) { return false ; } auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; auto Result = std :: find_if ( Symbols -> begin ( ) , Symbols -> end ( ) , [ Value ] ( const SymbolInfoTy & Val ) { return std :: get < <NUM_LIT> > ( Val ) == static_cast < uint64_t > ( Value ) && std :: get < <NUM_LIT> > ( Val ) == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( std :: get < <NUM_LIT> > ( * Result ) ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ;

Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ;


<s> typedef std :: tuple < uint64_t , StringRef , uint8_t > SymbolInfoTy ; typedef std :: vector < SymbolInfoTy > SectionSymbolsTy ; if ( ! IsBranch ) { return false ; } auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; auto Result = std :: find_if ( Symbols -> begin ( ) , Symbols -> end ( ) , [ Value ] ( const SymbolInfoTy & Val ) { return std :: get < <NUM_LIT> > ( Val ) == static_cast < uint64_t > ( Value ) && std :: get < <NUM_LIT> > ( Val ) == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( std :: get < <NUM_LIT> > ( * Result ) ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ; Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ; return true ; }


<s> MCInst TmpInst ; HasLiteral = false ; const auto SavedBytes = Bytes ;

if ( decodeInstruction ( Table , TmpInst , Inst , Address , this , STI ) ) {


<s> unsigned DstSize = countPopulation ( DMask ) ; if ( DstSize == <NUM_LIT> ) return MCDisassembler :: Success ; bool D16 = MCII -> get ( MI . getOpcode ( ) ) . TSFlags & <STR_LIT> ; if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( MI . getOperand ( TFEIdx ) . getImm ( ) ) return MCDisassembler :: Success ; int NewOpcode = - <NUM_LIT> ; if ( isAtomic ) { if ( DMask == <NUM_LIT> || DMask == <NUM_LIT> || DMask == <NUM_LIT> ) { NewOpcode = <STR_LIT> ( * MCII , MI . getOpcode ( ) , DstSize ) ; } if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; } else { NewOpcode = <STR_LIT> ( * MCII , MI . getOpcode ( ) , DstSize ) ; assert ( NewOpcode != - <NUM_LIT> && <STR_LIT> ) ; }

auto RCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ;


<s> return std :: get < <NUM_LIT> > ( Val ) == static_cast < uint64_t > ( Value ) && std :: get < <NUM_LIT> > ( Val ) == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( std :: get < <NUM_LIT> > ( * Result ) ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ; Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ;


<s> assert ( Imm >= <STR_LIT> :: INLINE_FLOATING_C_MIN && Imm <= <STR_LIT> :: INLINE_FLOATING_C_MAX ) ; switch ( Width ) { case OPW32 : return MCOperand :: createImm ( getInlineImmVal32 ( Imm ) ) ; case OPW64 : return MCOperand :: createImm ( getInlineImmVal64 ( Imm ) ) ; case OPW16 : return MCOperand :: createImm ( getInlineImmVal16 ( Imm ) ) ;


<s> if ( Bytes . size ( ) < <NUM_LIT> ) return errOperand ( <NUM_LIT> , <STR_LIT> + Twine ( Bytes . size ( ) ) ) ;

return MCOperand :: createImm ( eatBytes < uint32_t > ( Bytes ) ) ;


<s> case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : return createRegOperand ( TBA_LO ) ; case <NUM_LIT> : return createRegOperand ( TBA_HI ) ; case <NUM_LIT> : return createRegOperand ( TMA_LO ) ; case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ;

case <NUM_LIT> : return createRegOperand ( SCC ) ;


<s> assert ( Width == OPW16 || Width == OPW32 || Width == OPW64 ) ; if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : return decodeSpecialReg32 ( Val ) ; case OPW64 : return decodeSpecialReg64 ( Val ) ; default :


<s> const auto Res = <STR_LIT> :: read < T , <STR_LIT> :: little > ( Bytes . data ( ) ) ;

Bytes = Bytes . slice ( sizeof ( T ) ) ;


<s> if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : <NUM_LIT> ;


<s> CommentStream = & CS ; assert ( <STR_LIT> ( STI ) && <STR_LIT> ) ; const unsigned MaxInstBytesNum = ( std :: min ) ( ( size_t ) <NUM_LIT> , Bytes_ . size ( ) ) ; Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; DecodeStatus Res = MCDisassembler :: Fail ; do { if ( Bytes . size ( ) >= <NUM_LIT> ) { const uint64_t QW = eatBytes < uint64_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableDPP64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA64 , MI , QW , Address ) ; if ( Res ) break ; } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ;


<s> unsigned <ISA_LIT>Disassembler :: getSgprClassId ( const OpWidthTy Width ) const { using namespace <ISA_LIT> ; assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : case OPW16 :


<s> case OPW32 : case OPW16 : return SGPR_32RegClassID ; case OPW64 : return SGPR_64RegClassID ; case OPW128 : return SGPR_128RegClassID ; }


<s> assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default :


<s> default : case OPW32 : case OPW16 : return TTMP_32RegClassID ;


<s> case OPW16 : return VGPR_32RegClassID ; case OPW64 : return VReg_64RegClassID ; case OPW128 : return VReg_128RegClassID ; }


<s> const auto SavedBytes = Bytes ; if ( decodeInstruction ( Table , TmpInst , Inst , Address , this , STI ) ) { MI = TmpInst ; return MCDisassembler :: Success ;


<s> if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( MI . getOperand ( TFEIdx ) . getImm ( ) ) return MCDisassembler :: Success ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ; if ( NewVdata == <STR_LIT> ) { return MCDisassembler :: Success ; } } unsigned NewVAddr0 = <STR_LIT> ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] && ! IsNSA && AddrSize != Info -> VAddrDwords ) { unsigned VAddr0 = MI . getOperand ( VAddr0Idx ) . getReg ( ) ; unsigned VAddrSub0 = MRI . getSubReg ( VAddr0 , <STR_LIT> ) ; VAddr0 = ( VAddrSub0 != <NUM_LIT> ) ? VAddrSub0 : VAddr0 ; auto AddrRCID = MCII -> get ( NewOpcode ) . OpInfo [ VAddr0Idx ] . RegClass ;

NewVAddr0 = MRI . getMatchingSuperReg ( VAddr0 , <STR_LIT> , & MRI . getRegClass ( AddrRCID ) ) ;


<s> const auto SavedBytes = Bytes ; if ( decodeInstruction ( Table , TmpInst , Inst , Address , this , STI ) ) { MI = TmpInst ; return MCDisassembler :: Success ; } Bytes = SavedBytes ;


<s> assert ( MI . getOpcode ( ) == <NUM_LIT> ) ; assert ( MI . getNumOperands ( ) == <NUM_LIT> ) ; MCInst TmpInst ; HasLiteral = false ; const auto SavedBytes = Bytes ; if ( decodeInstruction ( Table , TmpInst , Inst , Address , this , STI ) ) { MI = TmpInst ; return MCDisassembler :: Success ; } Bytes = SavedBytes ;


<s> auto OpType = Desc . OpInfo [ I ] . OperandType ; bool IsDeferredOp = ( OpType == <STR_LIT> || OpType == <STR_LIT> ) ; if ( Op . isImm ( ) && Op . getImm ( ) == <STR_LIT> :: LITERAL_CONST && IsDeferredOp ) Op . setImm ( Literal ) ; }


<s> const <STR_LIT> * BaseOpcode = <STR_LIT> ( Info -> BaseOpcode ) ; assert ( VDataIdx != - <NUM_LIT> ) ; if ( BaseOpcode -> BVH ) { if ( <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: a16 ) > - <NUM_LIT> ) { addOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) ) ; } return MCDisassembler :: Success ; } bool IsAtomic = ( VDstIdx != - <NUM_LIT> ) ; bool IsGather4 = MCII -> get ( MI . getOpcode ( ) ) . TSFlags & <STR_LIT> ; bool IsNSA = false ; unsigned AddrSize = Info -> VAddrDwords ; if ( isGFX10Plus ( ) ) { unsigned DimIdx = <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: dim ) ; int A16Idx = <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: a16 ) ; const <STR_LIT> * Dim = <STR_LIT> ( MI . getOperand ( DimIdx ) . getImm ( ) ) ; const bool IsA16 = ( A16Idx != - <NUM_LIT> && MI . getOperand ( A16Idx ) . getImm ( ) ) ; AddrSize = <STR_LIT> ( BaseOpcode , Dim , IsA16 , <STR_LIT> ( STI ) ) ; IsNSA = Info -> MIMGEncoding == <STR_LIT> || Info -> MIMGEncoding == <STR_LIT> ; if ( ! IsNSA ) { if ( AddrSize > <NUM_LIT> ) AddrSize = <NUM_LIT> ; } else { if ( AddrSize > Info -> VAddrDwords ) { return MCDisassembler :: Success ; } } } unsigned DMask = MI . getOperand ( DMaskIdx ) . getImm ( ) & <NUM_LIT> ; unsigned DstSize = IsGather4 ? <NUM_LIT> : std :: max ( countPopulation ( DMask ) , <NUM_LIT> ) ; bool D16 = D16Idx >= <NUM_LIT> && MI . getOperand ( D16Idx ) . getImm ( ) ; if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( TFEIdx != - <NUM_LIT> && MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ;

unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ;


<s> if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) {

insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: op_sel ) ;


<s> DecodeStatus <ISA_LIT>Disassembler :: convertVINTERPInst ( MCInst & MI ) const { if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) { insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: op_sel ) ;


<s> return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW128 , Decoder ) ;


<s> return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW32 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_64RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) {

return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW64 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_64RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW64 , Decoder ) ;


<s> return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW96 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_96RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW96 , Decoder ) ;


<s> static DecodeStatus decodeBoolReg ( MCInst & Inst , unsigned Val , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeBoolReg ( Val ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeDstOp ( const OpWidthTy Width , unsigned Val ) const { using namespace <STR_LIT> ; assert ( Val < <NUM_LIT> ) ; assert ( Width == OPW256 || Width == OPW512 ) ; if ( Val <= SGPR_MAX ) { static_assert ( SGPR_MIN == <NUM_LIT> , <STR_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } int TTmpIdx = getTTmpIdx ( Val ) ;


<s> assert ( Val < <NUM_LIT> ) ; assert ( Width == OPW256 || Width == OPW512 ) ; if ( Val <= SGPR_MAX ) { static_assert ( SGPR_MIN == <NUM_LIT> , <STR_LIT> ) ;

return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ;


<s> case OPWV232 : return MCOperand :: createImm ( getInlineImmVal32 ( Imm ) ) ; case OPW64 : case OPW256 : return MCOperand :: createImm ( getInlineImmVal64 ( Imm ) ) ; case OPW16 : case OPWV216 : return MCOperand :: createImm ( getInlineImmVal16 ( Imm ) ) ; default :


<s> MCOperand <ISA_LIT>Disassembler :: decodeMandatoryLiteralConstant ( unsigned Val ) const { if ( HasLiteral ) {

if ( Literal != Val ) return errOperand ( Val , <STR_LIT> ) ;


<s> auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW1024 , Imm | <NUM_LIT> ) ) ;


<s> return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW1024 , Imm | <NUM_LIT> ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AReg_256 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val & <NUM_LIT> ) ;


<s> static DecodeStatus decodeOperand_AReg_512 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW512 , Imm | <NUM_LIT> ) ) ;


<s> return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW512 , Imm | <NUM_LIT> ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AReg_64 ( unsigned Val ) const {

return createRegOperand ( <STR_LIT> , Val & <NUM_LIT> ) ;


<s> assert ( ( Val & IS_VGPR ) == <NUM_LIT> ) ;

return decodeSrcOp ( OPW128 , Val | IS_VGPR ) ;


<s> using namespace <STR_LIT> ; assert ( ( Val & IS_VGPR ) == <NUM_LIT> ) ;

return decodeSrcOp ( OPW512 , Val | IS_VGPR ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AVDst_512 ( unsigned Val ) const {


<s> if ( ! DAsm -> isGFX90A ( ) ) { Imm &= <NUM_LIT> ; } else { unsigned Opc = Inst . getOpcode ( ) ; uint64_t TSFlags = DAsm -> getMCII ( ) -> get ( Opc ) . TSFlags ; uint16_t DataNameIdx = ( TSFlags & <STR_LIT> ) ? <STR_LIT> :: data0 : <STR_LIT> :: vdata ; const MCRegisterInfo * MRI = DAsm -> getContext ( ) . getRegisterInfo ( ) ; int DataIdx = <STR_LIT> ( Opc , DataNameIdx ) ; if ( ( int ) Inst . getNumOperands ( ) == DataIdx ) { int DstIdx = <STR_LIT> ( Opc , <STR_LIT> :: vdst ) ;

if ( IsAGPROperand ( Inst , DstIdx , MRI ) ) Imm |= <NUM_LIT> ;


<s> int DstIdx = <STR_LIT> ( Opc , <STR_LIT> :: vdst ) ; if ( IsAGPROperand ( Inst , DstIdx , MRI ) ) Imm |= <NUM_LIT> ; } if ( TSFlags & <STR_LIT> ) { int Data2Idx = <STR_LIT> ( Opc , <STR_LIT> :: data1 ) ; if ( ( int ) Inst . getNumOperands ( ) == Data2Idx && IsAGPROperand ( Inst , DataIdx , MRI ) ) Imm |= <NUM_LIT> ; } } return addOperand ( Inst , DAsm -> decodeSrcOp ( Opw , Imm | <NUM_LIT> ) ) ;


<s> return decodeSrcOp ( OPW128 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AV_128 ( unsigned Val ) const {


<s> static DecodeStatus decodeOperand_SReg_32 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) {

auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VReg_1024 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val ) ;


<s> return createRegOperand ( <STR_LIT> , Val ) ;


<s> static DecodeStatus decodeOperand_VReg_128 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW128 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VReg_256 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW256 , Imm ) ) ;


<s> auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW64 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VS_16 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeOperand_VSrc16 ( Imm ) ) ;


<s> static DecodeStatus decodeOperand_VS_16_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) {

const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;


<s> static DecodeStatus decodeOperand_VS_16_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( llvm :: <ISA_LIT>Disassembler :: OPW16 , Imm , true ) ) ;


<s> static DecodeStatus decodeOperand_VS_32 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeOperand_VS_32 ( Imm ) ) ;


<s> static DecodeStatus decodeOperand_VS_32_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( llvm :: <ISA_LIT>Disassembler :: OPW32 , Imm , true ) ) ;


<s> static DecodeStatus decodeOperand_VS_32_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) {


<s> } if ( SDWA9EncValues :: SRC_SGPR_MIN <= Val && Val <= ( isGFX10Plus ( ) ? SDWA9EncValues :: SRC_SGPR_MAX_GFX10 : SDWA9EncValues :: SRC_SGPR_MAX_<ISA_LIT> ) ) { return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } if ( SDWA9EncValues :: SRC_TTMP_MIN <= Val && Val <= SDWA9EncValues :: SRC_TTMP_MAX ) { return createSRegOperand ( getTtmpClassId ( Width ) , Val - SDWA9EncValues :: SRC_TTMP_MIN ) ; } const unsigned SVal = Val - SDWA9EncValues :: SRC_SGPR_MIN ; if ( INLINE_INTEGER_C_MIN <= SVal && SVal <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( SVal ) ; if ( INLINE_FLOATING_C_MIN <= SVal && SVal <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , SVal ) ; return decodeSpecialReg32 ( SVal ) ;

} else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) {


<s> Offset = SignExtend64 < <NUM_LIT> > ( Imm ) ; } return addOperand ( Inst , MCOperand :: createImm ( Offset ) ) ;


<s> APInt SignedOffset ( <NUM_LIT> , Imm * <NUM_LIT> , true ) ; int64_t Offset = ( SignedOffset . sext ( <NUM_LIT> ) + <NUM_LIT> + Addr ) . getSExtValue ( ) ; if ( DAsm -> tryAddingSymbolicOperand ( Inst , Offset , Addr , true , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Success ;

return addOperand ( Inst , MCOperand :: createImm ( Imm ) ) ;


<s> static DecodeStatus decodeSoppBrTarget ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; APInt SignedOffset ( <NUM_LIT> , Imm * <NUM_LIT> , true ) ; int64_t Offset = ( SignedOffset . sext ( <NUM_LIT> ) + <NUM_LIT> + Addr ) . getSExtValue ( ) ; if ( DAsm -> tryAddingSymbolicOperand ( Inst , Offset , Addr , true , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Success ;


<s> case <NUM_LIT> : return isGFX11Plus ( ) ? createRegOperand ( SGPR_NULL ) : createRegOperand ( M0 ) ; case <NUM_LIT> : return isGFX11Plus ( ) ? createRegOperand ( M0 ) : createRegOperand ( SGPR_NULL ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : return createRegOperand ( SRC_VCCZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_EXECZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_SCC ) ; case <NUM_LIT> : return createRegOperand ( LDS_DIRECT ) ; default : break ; } return errOperand ( Val , <STR_LIT> + Twine ( Val ) ) ;


<s> case <NUM_LIT> : return createRegOperand ( TBA ) ; case <NUM_LIT> : return createRegOperand ( TMA ) ; case <NUM_LIT> : if ( isGFX11Plus ( ) ) return createRegOperand ( SGPR_NULL ) ; break ; case <NUM_LIT> : if ( ! isGFX11Plus ( ) ) return createRegOperand ( SGPR_NULL ) ; break ; case <NUM_LIT> : return createRegOperand ( EXEC ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : return createRegOperand ( SRC_VCCZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_EXECZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_SCC ) ; default : break ;


<s> case <NUM_LIT> : return createRegOperand ( XNACK_MASK ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : return createRegOperand ( TBA ) ; case <NUM_LIT> : return createRegOperand ( TMA ) ; case <NUM_LIT> : if ( isGFX11Plus ( ) ) return createRegOperand ( SGPR_NULL ) ; break ; case <NUM_LIT> : if ( ! isGFX11Plus ( ) ) return createRegOperand ( SGPR_NULL ) ;


<s> case OPW32 : case OPW16 : case OPWV216 : return AGPR_32RegClassID ; case OPW64 : case OPWV232 : return AReg_64RegClassID ; case OPW96 : return AReg_96RegClassID ; case OPW128 : return AReg_128RegClassID ; case OPW160 : return AReg_160RegClassID ; case OPW256 : return AReg_256RegClassID ; case OPW512 : return AReg_512RegClassID ; case OPW1024 : return AReg_1024RegClassID ;


<s> case OPW128 : return AReg_128RegClassID ; case OPW160 : return AReg_160RegClassID ; case OPW256 : return AReg_256RegClassID ; case OPW512 : return AReg_512RegClassID ; case OPW1024 : return AReg_1024RegClassID ; }


<s> case OPWV232 : return SGPR_64RegClassID ; case OPW96 : return SGPR_96RegClassID ; case OPW128 : return SGPR_128RegClassID ; case OPW160 : return SGPR_160RegClassID ; case OPW256 : return SGPR_256RegClassID ; case OPW512 : return SGPR_512RegClassID ; }


<s> case OPWV232 : return TTMP_64RegClassID ; case OPW128 : return TTMP_128RegClassID ; case OPW256 : return TTMP_256RegClassID ; case OPW512 : return TTMP_512RegClassID ; }


<s> using namespace <STR_LIT> ; unsigned TTmpMin = isGFX9Plus ( ) ? TTMP_GFX9PLUS_MIN : TTMP_VI_MIN ;

unsigned TTmpMax = isGFX9Plus ( ) ? TTMP_GFX9PLUS_MAX : TTMP_VI_MAX ;


<s> switch ( Width ) { default : case OPW32 : case OPW16 : case OPWV216 : return VGPR_32RegClassID ; case OPW64 : case OPWV232 : return VReg_64RegClassID ; case OPW96 : return VReg_96RegClassID ; case OPW128 : return VReg_128RegClassID ;

case OPW160 : return VReg_160RegClassID ;


<s> return STI . getFeatureBits ( ) [ <STR_LIT> ] ;


<s> unsigned Sub = MRI -> getSubReg ( Op . getReg ( ) , <STR_LIT> ) ;

auto Reg = Sub ? Sub : Op . getReg ( ) ;


<s> bool <ISA_LIT>Disassembler :: isGFX10Plus ( ) const { return <STR_LIT> ( STI ) ;


<s> bool <ISA_LIT>Disassembler :: isGFX11 ( ) const {

return STI . getFeatureBits ( ) [ <STR_LIT> ] ;


<s> bool <ISA_LIT>Disassembler :: isGFX11Plus ( ) const { return <STR_LIT> ( STI ) ;


<s> bool <ISA_LIT>Disassembler :: isGFX9 ( ) const {


<s> bool <ISA_LIT>Disassembler :: isGFX90A ( ) const {


<s> bool <ISA_LIT>Disassembler :: isGFX90A ( ) const { return STI . getFeatureBits ( ) [ <STR_LIT> ] ;


<s> } auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; if ( ! Symbols ) return false ; auto Result = llvm :: find_if ( * Symbols , [ Value ] ( const SymbolInfoTy & Val ) { return Val . Addr == static_cast < uint64_t > ( Value ) && Val . Type == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( Result -> Name ) ;

const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ;


<s> } unsigned DMask = MI . getOperand ( DMaskIdx ) . getImm ( ) & <NUM_LIT> ; unsigned DstSize = IsGather4 ? <NUM_LIT> : std :: max ( countPopulation ( DMask ) , <NUM_LIT> ) ; bool D16 = D16Idx >= <NUM_LIT> && MI . getOperand ( D16Idx ) . getImm ( ) ; if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( TFEIdx != - <NUM_LIT> && MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ; if ( NewVdata == <STR_LIT> ) { return MCDisassembler :: Success ; } } unsigned NewVAddr0 = <STR_LIT> ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] && ! IsNSA && AddrSize != Info -> VAddrDwords ) { unsigned VAddr0 = MI . getOperand ( VAddr0Idx ) . getReg ( ) ;

unsigned VAddrSub0 = MRI . getSubReg ( VAddr0 , <STR_LIT> ) ;


<s> return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW128 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_128RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {

return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW128 , Decoder ) ;


<s> return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW32 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_32RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW32 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_64RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {

return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW64 , Decoder ) ;


<s> static DecodeStatus DecodeAVLdSt_96RegisterClass ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { return decodeOperand_AVLdSt_Any ( Inst , Imm , <ISA_LIT>Disassembler :: OPW96 , Decoder ) ;


<s> auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW256 , Imm | <NUM_LIT> ) ) ;


<s> static DecodeStatus decodeOperand_AReg_64 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW64 , Imm | <NUM_LIT> ) ) ;


return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW64 , Imm | <NUM_LIT> ) ) ;


<s> return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW1024 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VReg_128 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW128 , Imm ) ) ;


<s> return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW256 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VReg_512 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {

auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;


<s> static DecodeStatus decodeOperand_VReg_512 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW512 , Imm ) ) ;


return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW64 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VReg_64 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW64 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VSrcV232 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeOperand_VSrcV232 ( Imm ) ) ;


<s> if ( Val <= SGPR_MAX ) { static_assert ( SGPR_MIN == <NUM_LIT> , <STR_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } int TTmpIdx = getTTmpIdx ( Val ) ; if ( TTmpIdx >= <NUM_LIT> ) { return createSRegOperand ( getTtmpClassId ( Width ) , TTmpIdx ) ; } if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : case OPWV216 : return decodeSpecialReg32 ( Val ) ; case OPW64 : case OPWV232 : return decodeSpecialReg64 ( Val ) ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> assert ( Val < <NUM_LIT> ) ; bool IsAGPR = Val & <NUM_LIT> ; Val &= <NUM_LIT> ; if ( VGPR_MIN <= Val && Val <= VGPR_MAX ) { return createRegOperand ( IsAGPR ? getAgprClassId ( Width ) : getVgprClassId ( Width ) , Val - VGPR_MIN ) ; } if ( Val <= SGPR_MAX ) { static_assert ( SGPR_MIN == <NUM_LIT> , <STR_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } int TTmpIdx = getTTmpIdx ( Val ) ; if ( TTmpIdx >= <NUM_LIT> ) { return createSRegOperand ( getTtmpClassId ( Width ) , TTmpIdx ) ; } if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : case OPWV216 : return decodeSpecialReg32 ( Val ) ; case OPW64 : case OPWV232 : return decodeSpecialReg64 ( Val ) ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> bool <ISA_LIT>Symbolizer :: tryAddingSymbolicOperand ( MCInst & Inst , raw_ostream & , int64_t Value , uint64_t , bool IsBranch , uint64_t , uint64_t ) { if ( ! IsBranch ) { return false ; } auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; if ( ! Symbols ) return false ; auto Result = llvm :: find_if ( * Symbols , [ Value ] ( const SymbolInfoTy & Val ) { return Val . Addr == static_cast < uint64_t > ( Value ) && Val . Type == ELF :: STT_NOTYPE ;


<s> IsNSA = Info -> MIMGEncoding == <STR_LIT> ; if ( ! IsNSA ) { if ( AddrSize > <NUM_LIT> ) AddrSize = <NUM_LIT> ; } else { if ( AddrSize > Info -> VAddrDwords ) { return MCDisassembler :: Success ; } } } unsigned DMask = MI . getOperand ( DMaskIdx ) . getImm ( ) & <NUM_LIT> ; unsigned DstSize = IsGather4 ? <NUM_LIT> : std :: max ( countPopulation ( DMask ) , <NUM_LIT> ) ; bool D16 = D16Idx >= <NUM_LIT> && MI . getOperand ( D16Idx ) . getImm ( ) ; if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( TFEIdx != - <NUM_LIT> && MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ; if ( NewVdata == <STR_LIT> ) { return MCDisassembler :: Success ; } } unsigned NewVAddr0 = <STR_LIT> ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] && ! IsNSA && AddrSize != Info -> VAddrDwords ) { unsigned VAddr0 = MI . getOperand ( VAddr0Idx ) . getReg ( ) ; unsigned VAddrSub0 = MRI . getSubReg ( VAddr0 , <STR_LIT> ) ; VAddr0 = ( VAddrSub0 != <NUM_LIT> ) ? VAddrSub0 : VAddr0 ; auto AddrRCID = MCII -> get ( NewOpcode ) . OpInfo [ VAddr0Idx ] . RegClass ; NewVAddr0 = MRI . getMatchingSuperReg ( VAddr0 , <STR_LIT> , & MRI . getRegClass ( AddrRCID ) ) ; if ( NewVAddr0 == <STR_LIT> ) return MCDisassembler :: Success ;


<s> using namespace <STR_LIT> ; assert ( ( STI . getFeatureBits ( ) [ <STR_LIT> ] || STI . getFeatureBits ( ) [ <STR_LIT> ] ) && <STR_LIT> ) ; bool IsWave64 = STI . getFeatureBits ( ) [ <STR_LIT> ] ;

if ( Val & SDWA9EncValues :: VOPC_DST_VCC_MASK ) {


<s> Res = tryDecodeInst ( DecoderTableGFX9_DL64 , MI , QW , Address ) ; if ( Res ) break ; } } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableGFX832 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX932 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX1032 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableGFX864 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX964 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX1064 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MaxInstBytesNum - Bytes . size ( ) ) == <NUM_LIT> && ( ! HasLiteral || ! ( MCII -> get ( MI . getOpcode ( ) ) . TSFlags & <STR_LIT> ) ) ) { MaxInstBytesNum = <NUM_LIT> ; Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; eatBytes < uint64_t > ( Bytes ) ; }

if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) {


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx , MCInstrInfo const * MCII ) : MCDisassembler ( STI , Ctx ) , MCII ( MCII ) , MRI ( * Ctx . getRegisterInfo ( ) ) {


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx , MCInstrInfo const * MCII ) :

MCDisassembler ( STI , Ctx ) , MCII ( MCII ) , MRI ( * Ctx . getRegisterInfo ( ) ) {


<s> if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( TFEIdx != - <NUM_LIT> && MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ; if ( NewVdata == <STR_LIT> ) { return MCDisassembler :: Success ; } } unsigned NewVAddr0 = <STR_LIT> ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] && ! IsNSA && AddrSize != Info -> VAddrDwords ) { unsigned VAddr0 = MI . getOperand ( VAddr0Idx ) . getReg ( ) ; unsigned VAddrSub0 = MRI . getSubReg ( VAddr0 , <STR_LIT> ) ; VAddr0 = ( VAddrSub0 != <NUM_LIT> ) ? VAddrSub0 : VAddr0 ; auto AddrRCID = MCII -> get ( NewOpcode ) . OpInfo [ VAddr0Idx ] . RegClass ; NewVAddr0 = MRI . getMatchingSuperReg ( VAddr0 , <STR_LIT> , & MRI . getRegClass ( AddrRCID ) ) ; if ( NewVAddr0 == <STR_LIT> ) return MCDisassembler :: Success ; } MI . setOpcode ( NewOpcode ) ; if ( NewVdata != <STR_LIT> ) { MI . getOperand ( VDataIdx ) = MCOperand :: createReg ( NewVdata ) ; if ( IsAtomic ) { MI . getOperand ( VDstIdx ) = MCOperand :: createReg ( NewVdata ) ; } } if ( NewVAddr0 != <STR_LIT> ) { MI . getOperand ( VAddr0Idx ) = MCOperand :: createReg ( NewVAddr0 ) ; } else if ( IsNSA ) { assert ( AddrSize <= Info -> VAddrDwords ) ; MI . erase ( MI . begin ( ) + VAddr0Idx + AddrSize , MI . begin ( ) + VAddr0Idx + Info -> VAddrDwords ) ; }


<s> AddrSize = <STR_LIT> ( BaseOpcode , Dim , IsA16 , <STR_LIT> ( STI ) ) ; IsNSA = Info -> MIMGEncoding == <STR_LIT> ; if ( ! IsNSA ) { if ( AddrSize > <NUM_LIT> ) AddrSize = <NUM_LIT> ; } else { if ( AddrSize > Info -> VAddrDwords ) { return MCDisassembler :: Success ; } } } unsigned DMask = MI . getOperand ( DMaskIdx ) . getImm ( ) & <NUM_LIT> ; unsigned DstSize = IsGather4 ? <NUM_LIT> : std :: max ( countPopulation ( DMask ) , <NUM_LIT> ) ; bool D16 = D16Idx >= <NUM_LIT> && MI . getOperand ( D16Idx ) . getImm ( ) ; if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( TFEIdx != - <NUM_LIT> && MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AV_512 ( unsigned Val ) const {


<s> return decodeSrcOp ( OPW512 , Val ) ;


<s> static DecodeStatus decodeSoppBrTarget ( MCInst & Inst , unsigned Imm , uint64_t Addr , const MCDisassembler * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; APInt SignedOffset ( <NUM_LIT> , Imm * <NUM_LIT> , true ) ; int64_t Offset = ( SignedOffset . sext ( <NUM_LIT> ) + <NUM_LIT> + Addr ) . getSExtValue ( ) ; if ( DAsm -> tryAddingSymbolicOperand ( Inst , Offset , Addr , true , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Success ; return addOperand ( Inst , MCOperand :: createImm ( Imm ) ) ;


<s> if ( DAsm -> tryAddingSymbolicOperand ( Inst , Offset , Addr , true , <NUM_LIT> , <NUM_LIT> ) ) return MCDisassembler :: Success ;

return addOperand ( Inst , MCOperand :: createImm ( Imm ) ) ;


<s> float V = <NUM_LIT> ; switch ( Imm ) { case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ; case <NUM_LIT> : V = <NUM_LIT> ; break ;


<s> float V = <NUM_LIT> ; switch ( Imm ) { case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ; case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ; case <NUM_LIT> : V = <NUM_LIT> ; break ;


<s> return decodeOperand_SReg_32 ( Val ) ;


<s> if ( VGPR_MIN <= Val && Val <= VGPR_MAX ) { return createRegOperand ( getVgprClassId ( Width ) , Val - VGPR_MIN ) ; } if ( Val <= SGPR_MAX ) { assert ( SGPR_MIN == <NUM_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } if ( TTMP_MIN <= Val && Val <= TTMP_MAX ) {

return createSRegOperand ( getTtmpClassId ( Width ) , Val - TTMP_MIN ) ;


<s> using namespace <ISA_LIT> ; assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : return SGPR_32RegClassID ; case OPW64 : return SGPR_64RegClassID ; case OPW128 : return SGPR_128RegClassID ;


<s> assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : return SGPR_32RegClassID ; case OPW64 : return SGPR_64RegClassID ;

case OPW128 : return SGPR_128RegClassID ;


<s> unsigned <ISA_LIT>Disassembler :: getTtmpClassId ( const OpWidthTy Width ) const { using namespace <ISA_LIT> ;

assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ;


<s> assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : return TTMP_32RegClassID ; case OPW64 : return TTMP_64RegClassID ;

case OPW128 : return TTMP_128RegClassID ;


<s> unsigned <ISA_LIT>Disassembler :: getVgprClassId ( const OpWidthTy Width ) const { using namespace <ISA_LIT> ; assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : return VGPR_32RegClassID ; case OPW64 : return VReg_64RegClassID ; case OPW128 : return VReg_128RegClassID ; }


<s> case OPW32 : return VGPR_32RegClassID ; case OPW64 : return VReg_64RegClassID ; case OPW128 : return VReg_128RegClassID ;


return Opnd . isValid ( ) ? MCDisassembler :: Success :


<s> <ISA_LIT>Disassembler :: <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx , MCInstrInfo const * MCII ) : MCDisassembler ( STI , Ctx ) , MCII ( MCII ) , MRI ( * Ctx . getRegisterInfo ( ) ) , TargetMaxInstBytes ( Ctx . getAsmInfo ( ) -> getMaxInstLength ( & STI ) ) { if ( ! STI . getFeatureBits ( ) [ <STR_LIT> ] && ! isGFX10 ( ) ) report_fatal_error ( <STR_LIT> ) ;


<s> <ISA_LIT>Disassembler :: <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx , MCInstrInfo const * MCII ) :

MCDisassembler ( STI , Ctx ) , MCII ( MCII ) , MRI ( * Ctx . getRegisterInfo ( ) ) , TargetMaxInstBytes ( Ctx . getAsmInfo ( ) -> getMaxInstLength ( & STI ) ) {


<s> unsigned Opc = MI . getOpcode ( ) ; unsigned DescNumOps = MCII -> get ( Opc ) . getNumOperands ( ) ; if ( MI . getNumOperands ( ) < DescNumOps && <STR_LIT> ( Opc , <STR_LIT> :: src0_modifiers ) != - <NUM_LIT> ) insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src0_modifiers ) ; if ( MI . getNumOperands ( ) < DescNumOps && <STR_LIT> ( Opc , <STR_LIT> :: src1_modifiers ) != - <NUM_LIT> ) insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src1_modifiers ) ; return isValidDPP8 ( MI ) ? MCDisassembler :: Success : MCDisassembler :: SoftFail ;


<s> if ( <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: sdst ) != - <NUM_LIT> ) insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: clamp ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { int SDst = <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: sdst ) ; if ( SDst != - <NUM_LIT> ) { insertNamedMCOperand ( MI , createRegOperand ( <STR_LIT> ) , <STR_LIT> :: sdst ) ; } else {

insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: omod ) ;


<s> if ( STI . getFeatureBits ( ) [ <STR_LIT> ] || STI . getFeatureBits ( ) [ <STR_LIT> ] ) { if ( <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: sdst ) != - <NUM_LIT> ) insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: clamp ) ;

} else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) {


<s> MCOperand <ISA_LIT>Disassembler :: decodeBoolReg ( unsigned Val ) const {

return STI . getFeatureBits ( ) [ <STR_LIT> ] ? decodeOperand_SReg_64 ( Val ) : decodeOperand_SReg_32 ( Val ) ;


<s> KdStream << <STR_LIT> << KdName << '\n' ; DataExtractor :: Cursor C ( <NUM_LIT> ) ; while ( C && C . tell ( ) < Bytes . size ( ) ) { MCDisassembler :: DecodeStatus Status = decodeKernelDescriptorDirective ( C , Bytes , KdStream ) ; cantFail ( C . takeError ( ) ) ; if ( Status == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; }


<s> return createRegOperand ( <STR_LIT> , Val & <NUM_LIT> ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AGPR_32 ( unsigned Val ) const {

return createRegOperand ( <STR_LIT> , Val & <NUM_LIT> ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AReg_1024 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AReg_128 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AReg_512 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val & <NUM_LIT> ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_AV_64 ( unsigned Val ) const {


<s> return decodeSrcOp ( OPW32 , Val ) ;


<s> auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeOperand_SReg_32 ( Imm ) ) ;


<s> auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW32 , Imm ) ) ;


<s> static DecodeStatus decodeOperand_VGPR_32 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( <ISA_LIT>Disassembler :: OPW32 , Imm ) ) ;


<s> return createRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VReg_512 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val ) ;


<s> static DecodeStatus decodeOperand_VS_16 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {

auto DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;


return addOperand ( Inst , DAsm -> decodeOperand_VSrc16 ( Imm ) ) ;


<s> static DecodeStatus decodeOperand_VS_32 ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {


<s> return createRegOperand ( getVgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_VGPR_MIN ) ; } if ( SDWA9EncValues :: SRC_SGPR_MIN <= Val && Val <= ( isGFX10 ( ) ? SDWA9EncValues :: SRC_SGPR_MAX_GFX10 : SDWA9EncValues :: SRC_SGPR_MAX_<ISA_LIT> ) ) { return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } if ( SDWA9EncValues :: SRC_TTMP_MIN <= Val && Val <= SDWA9EncValues :: SRC_TTMP_MAX ) { return createSRegOperand ( getTtmpClassId ( Width ) , Val - SDWA9EncValues :: SRC_TTMP_MIN ) ; } const unsigned SVal = Val - SDWA9EncValues :: SRC_SGPR_MIN ; if ( INLINE_INTEGER_C_MIN <= SVal && SVal <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( SVal ) ; if ( INLINE_FLOATING_C_MIN <= SVal && SVal <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , SVal ) ; return decodeSpecialReg32 ( SVal ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { return createRegOperand ( getVgprClassId ( Width ) , Val ) ;


<s> using namespace <STR_LIT> ; assert ( ( STI . getFeatureBits ( ) [ <STR_LIT> ] || STI . getFeatureBits ( ) [ <STR_LIT> ] ) && <STR_LIT> ) ; bool IsWave64 = STI . getFeatureBits ( ) [ <STR_LIT> ] ; if ( Val & SDWA9EncValues :: VOPC_DST_VCC_MASK ) { Val &= SDWA9EncValues :: VOPC_DST_SGPR_MASK ; int TTmpIdx = getTTmpIdx ( Val ) ; if ( TTmpIdx >= <NUM_LIT> ) { auto TTmpClsId = getTtmpClassId ( IsWave64 ? OPW64 : OPW32 ) ; return createSRegOperand ( TTmpClsId , TTmpIdx ) ; } else if ( Val > SGPR_MAX ) { return IsWave64 ? decodeSpecialReg64 ( Val ) : decodeSpecialReg32 ( Val ) ; } else { return createSRegOperand ( getSgprClassId ( IsWave64 ? OPW64 : OPW32 ) , Val ) ; } } else { return createRegOperand ( IsWave64 ? <STR_LIT> : <STR_LIT> ) ; }


<s> if ( DAsm -> isVI ( ) ) { Offset = Imm & <NUM_LIT> ; } else { Offset = SignExtend64 < <NUM_LIT> > ( Imm ) ; } return addOperand ( Inst , MCOperand :: createImm ( Offset ) ) ;


<s> case <NUM_LIT> : return createRegOperand ( TBA_LO ) ; case <NUM_LIT> : return createRegOperand ( TBA_HI ) ; case <NUM_LIT> : return createRegOperand ( TMA_LO ) ; case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( SGPR_NULL ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ;

case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ;


<s> case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( SGPR_NULL ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : return createRegOperand ( SRC_VCCZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_EXECZ ) ; case <NUM_LIT> : return createRegOperand ( SRC_SCC ) ;

case <NUM_LIT> : return createRegOperand ( LDS_DIRECT ) ;


<s> using namespace <ISA_LIT> ; switch ( Val ) { case <NUM_LIT> : return createRegOperand ( FLAT_SCR ) ; case <NUM_LIT> : return createRegOperand ( XNACK_MASK ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : return createRegOperand ( TBA ) ;

case <NUM_LIT> : return createRegOperand ( TMA ) ;


<s> return createRegOperand ( IsAGPR ? getAgprClassId ( Width ) : getVgprClassId ( Width ) , Val - VGPR_MIN ) ; } if ( Val <= SGPR_MAX ) { assert ( SGPR_MIN == <NUM_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } int TTmpIdx = getTTmpIdx ( Val ) ; if ( TTmpIdx >= <NUM_LIT> ) { return createSRegOperand ( getTtmpClassId ( Width ) , TTmpIdx ) ; } if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ;

if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ;


<s> assert ( Val < <NUM_LIT> ) ; bool IsAGPR = Val & <NUM_LIT> ; Val &= <NUM_LIT> ; if ( VGPR_MIN <= Val && Val <= VGPR_MAX ) { return createRegOperand ( IsAGPR ? getAgprClassId ( Width ) : getVgprClassId ( Width ) , Val - VGPR_MIN ) ; } if ( Val <= SGPR_MAX ) { assert ( SGPR_MIN == <NUM_LIT> ) ; return createSRegOperand ( getSgprClassId ( Width ) , Val - SGPR_MIN ) ; } int TTmpIdx = getTTmpIdx ( Val ) ; if ( TTmpIdx >= <NUM_LIT> ) { return createSRegOperand ( getTtmpClassId ( Width ) , TTmpIdx ) ; } if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : case OPWV216 :


<s> assert ( OPW_FIRST_ <= Width && Width < OPW_LAST_ ) ; switch ( Width ) { default : case OPW32 : case OPW16 : case OPWV216 : return AGPR_32RegClassID ;


<s> unsigned TTmpMin = ( isGFX9 ( ) || isGFX10 ( ) ) ? TTMP_GFX9_GFX10_MIN : TTMP_VI_MIN ; unsigned TTmpMax = ( isGFX9 ( ) || isGFX10 ( ) ) ? TTMP_GFX9_GFX10_MAX : TTMP_VI_MAX ;

return ( TTmpMin <= Val && Val <= TTmpMax ) ? Val - TTmpMin : - <NUM_LIT> ;


unsigned TTmpMin = ( isGFX9 ( ) || isGFX10 ( ) ) ? TTMP_GFX9_GFX10_MIN : TTMP_VI_MIN ;


<s> int FiIdx = <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: fi ) ; assert ( FiIdx != - <NUM_LIT> ) ; if ( ( unsigned ) FiIdx >= MI . getNumOperands ( ) ) return false ; unsigned Fi = MI . getOperand ( FiIdx ) . getImm ( ) ; return Fi == DPP8_FI_0 || Fi == DPP8_FI_1 ;


<s> LLVM_EXTERNAL_VI<ISA_LIT>BILITY void LLVMInitialize<ISA_LIT>Disassembler ( ) { TargetRegistry :: RegisterMCDisassembler ( getTheGCNTarget ( ) , create<ISA_LIT>Disassembler ) ; TargetRegistry :: RegisterMCSymbolizer ( getTheGCNTarget ( ) , create<ISA_LIT>Symbolizer ) ;


<s> } StringRef Name = Symbol . Name ; if ( Symbol . Type == ELF :: STT_OBJECT && Name . endswith ( StringRef ( <STR_LIT> ) ) ) { Size = <NUM_LIT> ;

return decodeKernelDescriptor ( Name . drop_back ( <NUM_LIT> ) , Bytes , Address ) ;


<s> return MCDisassembler :: Fail ; } StringRef Name = Symbol . Name ; if ( Symbol . Type == ELF :: STT_OBJECT && Name . endswith ( StringRef ( <STR_LIT> ) ) ) { Size = <NUM_LIT> ; return decodeKernelDescriptor ( Name . drop_back ( <NUM_LIT> ) , Bytes , Address ) ; } return None ;


<s> auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; if ( ! Symbols ) return false ; auto Result = std :: find_if ( Symbols -> begin ( ) , Symbols -> end ( ) , [ Value ] ( const SymbolInfoTy & Val ) { return Val . Addr == static_cast < uint64_t > ( Value ) && Val . Type == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( Result -> Name ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ; Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ; return true ; }


<s> switch ( Width ) { default : case OPW32 : case OPW16 : case OPWV216 : return AGPR_32RegClassID ; case OPW64 : return AReg_64RegClassID ;

case OPW128 : return AReg_128RegClassID ;


<s> return AGPR_32RegClassID ; case OPW64 : return AReg_64RegClassID ; case OPW128 : return AReg_128RegClassID ; case OPW512 : return AReg_512RegClassID ; case OPW1024 : return AReg_1024RegClassID ; }


<s> Res = tryDecodeInst ( DecoderTableDPP64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA64 , MI , QW , Address ) ; if ( Res ) break ; } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : <NUM_LIT> ; return Res ;


<s> IsSDWA = true ; break ; } } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX932 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX964 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) { insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src2_modifiers ) ; } if ( Res && IsSDWA ) Res = convertSDWAInst ( MI ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : <NUM_LIT> ; return Res ;


<s> return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } return decodeSpecialReg32 ( Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { return createRegOperand ( getVgprClassId ( Width ) , Val ) ; } llvm_unreachable ( <STR_LIT> ) ;


<s> if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : <NUM_LIT> ;


<s> if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : <NUM_LIT> ; return Res ;


<s> } else if ( Val > SGPR_MAX ) { return decodeSpecialReg64 ( Val ) ; } else { return createSRegOperand ( getSgprClassId ( OPW64 ) , Val ) ; } } else { return createRegOperand ( <STR_LIT> ) ; }


<s> case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( SCC ) ; case <NUM_LIT> : return createRegOperand ( LDS_DIRECT ) ; default : break ; } return errOperand ( Val , <STR_LIT> + Twine ( Val ) ) ;


<s> case <NUM_LIT> : return createRegOperand ( TBA_HI ) ; case <NUM_LIT> : return createRegOperand ( TMA_LO ) ; case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( SGPR_NULL ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ;

case <NUM_LIT> : return createRegOperand ( SCC ) ;


<s> case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : return createRegOperand ( TBA ) ; case <NUM_LIT> : return createRegOperand ( TMA ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; default : break ; } return errOperand ( Val , <STR_LIT> + Twine ( Val ) ) ;


<s> assert ( Width == OPW16 || Width == OPW32 || Width == OPW64 ) ; if ( INLINE_INTEGER_C_MIN <= Val && Val <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( Val ) ; if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : case OPWV216 : return decodeSpecialReg32 ( Val ) ; case OPW64 :


<s> const uint64_t QW = eatBytes < uint64_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableDPP64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA64 , MI , QW , Address ) ; if ( Res ) break ; } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) {

int Src2ModIdx = <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: src2_modifiers ) ;


<s> case <STR_LIT> : shift = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : shift = <NUM_LIT> ; break ; default : assert ( false ) ; break ; } if ( Val % ( <NUM_LIT> << shift ) ) * CommentStream << <STR_LIT> << getRegClassName ( SRegClassID ) << <STR_LIT> << Val ; return createRegOperand ( SRegClassID , Val >> shift ) ;


<s> int shift = <NUM_LIT> ; switch ( SRegClassID ) { case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : case <STR_LIT> : shift = <NUM_LIT> ; break ; case <STR_LIT> :


<s> MCOperand <ISA_LIT>Disassembler :: decodeFPImmed ( bool Is32 , unsigned Imm ) { assert ( Imm >= <NUM_LIT> && Imm <= <NUM_LIT> ) ; float V = <NUM_LIT> ; switch ( Imm ) { case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ; case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ; case <NUM_LIT> : V = <NUM_LIT> ; break ; case <NUM_LIT> : V = - <NUM_LIT> ; break ;


<s> return MCOperand :: createImm ( ( Imm <= <NUM_LIT> ) ? ( Imm - <NUM_LIT> ) : ( <NUM_LIT> - Imm ) ) ;


<s> assert ( Imm >= <NUM_LIT> && Imm <= <NUM_LIT> ) ; return MCOperand :: createImm ( ( Imm <= <NUM_LIT> ) ? ( Imm - <NUM_LIT> ) : ( <NUM_LIT> - Imm ) ) ;


<s> if ( Bytes . size ( ) < <NUM_LIT> ) return errOperand ( <NUM_LIT> , <STR_LIT> + Twine ( Bytes . size ( ) ) ) ;

return MCOperand :: createImm ( eatB32 ( Bytes ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeLiteralConstant ( ) const { if ( Bytes . size ( ) < <NUM_LIT> ) return errOperand ( <NUM_LIT> , <STR_LIT> + Twine ( Bytes . size ( ) ) ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_SGPR_32 ( unsigned Val ) const {

return createSRegOperand ( <STR_LIT> , Val ) ;


<s> return createSRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_SReg_128 ( unsigned Val ) const { return createSRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_SReg_32 ( unsigned Val ) const { return decodeSrcOp ( OP32 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VGPR_32 ( unsigned Val ) const { return createRegOperand ( <STR_LIT> , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VS_64 ( unsigned Val ) const {


<s> MCOperand <ISA_LIT>Disassembler :: decodeOperand_VS_64 ( unsigned Val ) const { return decodeSrcOp ( OP64 , Val ) ;


<s> case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ;


<s> case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : break ; case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( SCC ) ; default : break ;


<s> switch ( Val ) { case <NUM_LIT> : return createRegOperand ( getMCReg ( FLAT_SCR , STI ) ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ;

case <NUM_LIT> : return createRegOperand ( EXEC ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeSpecialReg64 ( unsigned Val ) const { using namespace <ISA_LIT> ; switch ( Val ) { case <NUM_LIT> : return createRegOperand ( getMCReg ( FLAT_SCR , STI ) ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ; default : break ; }

return errOperand ( Val , <STR_LIT> + Twine ( Val ) ) ;


<s> using namespace <ISA_LIT> ; assert ( Val < <NUM_LIT> ) ; if ( Val >= <NUM_LIT> ) return createRegOperand ( Is32 ? VGPR_32RegClassID : VReg_64RegClassID , Val - <NUM_LIT> ) ; if ( Val <= <NUM_LIT> ) return createSRegOperand ( Is32 ? SGPR_32RegClassID : SGPR_64RegClassID , Val ) ;

if ( Val >= <NUM_LIT> && Val <= <NUM_LIT> ) return decodeIntImmed ( Val ) ;


<s> assert ( Bytes . size ( ) >= sizeof eatB32 ( Bytes ) ) ;

const auto Res = <STR_LIT> :: read32le ( Bytes . data ( ) ) ;


<s> DecodeStatus <ISA_LIT>Disassembler :: getInstruction ( MCInst & MI , uint64_t & Size , ArrayRef < uint8_t > Bytes_ , uint64_t Address , raw_ostream & WS , raw_ostream & CS ) const { CommentStream = & CS ; assert ( <STR_LIT> ( STI ) && <STR_LIT> ) ; const unsigned MaxInstBytesNum = ( std :: min ) ( ( size_t ) <NUM_LIT> , Bytes_ . size ( ) ) ; Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; DecodeStatus Res = MCDisassembler :: Fail ; do { if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatB32 ( Bytes ) ;

Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ;


<s> const uint64_t QW = eatBytes < uint64_t > ( Bytes ) ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { Res = tryDecodeInst ( DecoderTableGFX10_B64 , MI , QW , Address ) ; if ( Res ) { if ( <STR_LIT> ( MI . getOpcode ( ) , <STR_LIT> :: dpp8 ) == - <NUM_LIT> ) break ; if ( convertDPP8Inst ( MI ) == MCDisassembler :: Success ) break ; MI = MCInst ( ) ; } } Res = tryDecodeInst ( DecoderTableDPP864 , MI , QW , Address ) ; if ( Res && convertDPP8Inst ( MI ) == MCDisassembler :: Success ) break ; MI = MCInst ( ) ; Res = tryDecodeInst ( DecoderTableDPP64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA64 , MI , QW , Address ) ; if ( Res ) { IsSDWA = true ; break ; } Res = tryDecodeInst ( DecoderTableSDWA964 , MI , QW , Address ) ; if ( Res ) { IsSDWA = true ; break ; } Res = tryDecodeInst ( DecoderTableSDWA1064 , MI , QW , Address ) ; if ( Res ) { IsSDWA = true ; break ; } if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { Res = tryDecodeInst ( DecoderTableGFX80_UNPACKED64 , MI , QW , Address ) ; if ( Res ) break ; } if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { Res = tryDecodeInst ( DecoderTableGFX9_DL64 , MI , QW , Address ) ; if ( Res ) break ; } } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableGFX832 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ;

Res = tryDecodeInst ( DecoderTableGFX932 , MI , DW , Address ) ;


<s> const unsigned SVal = Val - SDWA9EncValues :: SRC_SGPR_MIN ; if ( INLINE_INTEGER_C_MIN <= SVal && SVal <= INLINE_INTEGER_C_MAX ) return decodeIntImmed ( SVal ) ; if ( INLINE_FLOATING_C_MIN <= SVal && SVal <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , SVal ) ; return decodeSpecialReg32 ( SVal ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { return createRegOperand ( getVgprClassId ( Width ) , Val ) ;


<s> case <NUM_LIT> : return createRegOperand ( FLAT_SCR_HI ) ; case <NUM_LIT> : return createRegOperand ( XNACK_MASK_LO ) ; case <NUM_LIT> : return createRegOperand ( XNACK_MASK_HI ) ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : return createRegOperand ( TBA_LO ) ; case <NUM_LIT> : return createRegOperand ( TBA_HI ) ; case <NUM_LIT> : return createRegOperand ( TMA_LO ) ; case <NUM_LIT> : return createRegOperand ( TMA_HI ) ; case <NUM_LIT> : return createRegOperand ( M0 ) ; case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ;

case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ;


<s> case <NUM_LIT> : return createRegOperand ( EXEC_LO ) ; case <NUM_LIT> : return createRegOperand ( EXEC_HI ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_SHARED_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_BASE ) ; case <NUM_LIT> : return createRegOperand ( SRC_PRIVATE_LIMIT ) ; case <NUM_LIT> : return createRegOperand ( SRC_POPS_EXITING_WAVE_ID ) ; case <NUM_LIT> : break ;


<s> if ( D16 && <STR_LIT> ( STI ) ) { DstSize = ( DstSize + <NUM_LIT> ) / <NUM_LIT> ; } if ( MI . getOperand ( TFEIdx ) . getImm ( ) ) DstSize += <NUM_LIT> ; if ( DstSize == Info -> VDataDwords && AddrSize == Info -> VAddrDwords ) return MCDisassembler :: Success ; int NewOpcode = <STR_LIT> ( Info -> BaseOpcode , Info -> MIMGEncoding , DstSize , AddrSize ) ; if ( NewOpcode == - <NUM_LIT> ) return MCDisassembler :: Success ; unsigned NewVdata = <STR_LIT> ; if ( DstSize != Info -> VDataDwords ) { auto DataRCID = MCII -> get ( NewOpcode ) . OpInfo [ VDataIdx ] . RegClass ; unsigned Vdata0 = MI . getOperand ( VDataIdx ) . getReg ( ) ; unsigned VdataSub0 = MRI . getSubReg ( Vdata0 , <STR_LIT> ) ; Vdata0 = ( VdataSub0 != <NUM_LIT> ) ? VdataSub0 : Vdata0 ; NewVdata = MRI . getMatchingSuperReg ( Vdata0 , <STR_LIT> , & MRI . getRegClass ( DataRCID ) ) ; if ( NewVdata == <STR_LIT> ) { return MCDisassembler :: Success ; } } unsigned NewVAddr0 = <STR_LIT> ; if ( STI . getFeatureBits ( ) [ <STR_LIT> ] && ! IsNSA && AddrSize != Info -> VAddrDwords ) { unsigned VAddr0 = MI . getOperand ( VAddr0Idx ) . getReg ( ) ; unsigned VAddrSub0 = MRI . getSubReg ( VAddr0 , <STR_LIT> ) ; VAddr0 = ( VAddrSub0 != <NUM_LIT> ) ? VAddrSub0 : VAddr0 ; auto AddrRCID = MCII -> get ( NewOpcode ) . OpInfo [ VAddr0Idx ] . RegClass ; NewVAddr0 = MRI . getMatchingSuperReg ( VAddr0 , <STR_LIT> , & MRI . getRegClass ( AddrRCID ) ) ; if ( NewVAddr0 == <STR_LIT> ) return MCDisassembler :: Success ; } MI . setOpcode ( NewOpcode ) ; if ( NewVdata != <STR_LIT> ) { MI . getOperand ( VDataIdx ) = MCOperand :: createReg ( NewVdata ) ; if ( IsAtomic ) { MI . getOperand ( VDstIdx ) = MCOperand :: createReg ( NewVdata ) ; } } if ( NewVAddr0 != <STR_LIT> ) { MI . getOperand ( VAddr0Idx ) = MCOperand :: createReg ( NewVAddr0 ) ; } else if ( IsNSA ) { assert ( AddrSize <= Info -> VAddrDwords ) ; MI . erase ( MI . begin ( ) + VAddr0Idx + AddrSize , MI . begin ( ) + VAddr0Idx + Info -> VAddrDwords ) ; }


<s> if ( INLINE_FLOATING_C_MIN <= Val && Val <= INLINE_FLOATING_C_MAX ) return decodeFPImmed ( Width , Val ) ; if ( Val == LITERAL_CONST ) return decodeLiteralConstant ( ) ; switch ( Width ) { case OPW32 : case OPW16 : case OPWV216 : return decodeSpecialReg32 ( Val ) ; case OPW64 : return decodeSpecialReg64 ( Val ) ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> } auto * Symbols = static_cast < SectionSymbolsTy * > ( DisInfo ) ; if ( ! Symbols ) return false ; auto Result = llvm :: find_if ( * Symbols , [ Value ] ( const SymbolInfoTy & Val ) { return Val . Addr == static_cast < uint64_t > ( Value ) && Val . Type == ELF :: STT_NOTYPE ; } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( Result -> Name ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ; Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ; return true ;


<s> } ) ; if ( Result != Symbols -> end ( ) ) { auto * Sym = Ctx . getOrCreateSymbol ( Result -> Name ) ; const auto * Add = MCSymbolRefExpr :: create ( Sym , Ctx ) ; Inst . addOperand ( MCOperand :: createExpr ( Add ) ) ; return true ; }


<s> if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX964 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) { insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src2_modifiers ) ; } if ( Res && ( MCII -> get ( MI . getOpcode ( ) ) . TSFlags & <STR_LIT> ) ) { Res = convertMIMGInst ( MI ) ; } if ( Res && IsSDWA ) Res = convertSDWAInst ( MI ) ; Size = Res ? ( MaxInstBytesNum - Bytes . size ( ) ) : std :: min ( ( size_t ) <NUM_LIT> , Bytes_ . size ( ) ) ;


<s> using namespace <STR_LIT> ; unsigned TTmpMin = isGFX9Plus ( ) ? TTMP_GFX9_GFX10_MIN : TTMP_VI_MIN ; unsigned TTmpMax = isGFX9Plus ( ) ? TTMP_GFX9_GFX10_MAX : TTMP_VI_MAX ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeSDWA9Src ( const OpWidthTy Width , unsigned Val ) const { using namespace <STR_LIT> ; if ( SDWA9EncValues :: SRC_VGPR_MIN <= Val && Val <= SDWA9EncValues :: SRC_VGPR_MAX ) { return createRegOperand ( getVgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_VGPR_MIN ) ; } if ( SDWA9EncValues :: SRC_SGPR_MIN <= Val && Val <= SDWA9EncValues :: SRC_SGPR_MAX ) {

return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ;


<s> return decodeSDWA9Src ( OPW16 , Val ) ;


<s> MCOperand <ISA_LIT>Disassembler :: decodeSDWA9Src32 ( unsigned Val ) const {


<s> using namespace <STR_LIT> ; if ( Val & SDWA9EncValues :: VOPC_DST_VCC_MASK ) { Val &= SDWA9EncValues :: VOPC_DST_SGPR_MASK ; if ( Val > <STR_LIT> :: SGPR_MAX ) { return decodeSpecialReg64 ( Val ) ; } else { return createSRegOperand ( getSgprClassId ( OPW64 ) , Val ) ; } } else {


<s> return decodeSpecialReg64 ( Val ) ; } else { return createSRegOperand ( getSgprClassId ( OPW64 ) , Val ) ; } } else { return createRegOperand ( <STR_LIT> ) ;


<s> if ( Bytes . size ( ) >= <NUM_LIT> ) { const uint64_t QW = eatBytes < uint64_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableDPP64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableSDWA964 , MI , QW , Address ) ; if ( Res ) break ; } Bytes = Bytes_ . slice ( <NUM_LIT> , MaxInstBytesNum ) ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint32_t DW = eatBytes < uint32_t > ( Bytes ) ; Res = tryDecodeInst ( DecoderTableVI32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ;


<s> if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>32 , MI , DW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX932 , MI , DW , Address ) ; if ( Res ) break ; if ( Bytes . size ( ) < <NUM_LIT> ) break ; const uint64_t QW = ( ( uint64_t ) eatBytes < uint32_t > ( Bytes ) << <NUM_LIT> ) | DW ; Res = tryDecodeInst ( DecoderTableVI64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTable<ISA_LIT>64 , MI , QW , Address ) ; if ( Res ) break ; Res = tryDecodeInst ( DecoderTableGFX964 , MI , QW , Address ) ; } while ( false ) ; if ( Res && ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) ) { insertNamedMCOperand ( MI , MCOperand :: createImm ( <NUM_LIT> ) , <STR_LIT> :: src2_modifiers ) ;


<s> if ( SDWA9EncValues :: SRC_SGPR_MIN <= Val && Val <= SDWA9EncValues :: SRC_SGPR_MAX ) { return createSRegOperand ( getSgprClassId ( Width ) , Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } if ( SDWA9EncValues :: SRC_TTMP_MIN <= Val && Val <= SDWA9EncValues :: SRC_TTMP_MAX ) { return createSRegOperand ( getTtmpClassId ( Width ) , Val - SDWA9EncValues :: SRC_TTMP_MIN ) ; } return decodeSpecialReg32 ( Val - SDWA9EncValues :: SRC_SGPR_MIN ) ; } else if ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) { return createRegOperand ( getVgprClassId ( Width ) , Val ) ;


<s> using namespace <ISA_LIT> ; switch ( Val ) { case <NUM_LIT> : return createRegOperand ( FLAT_SCR_LO ) ; case <NUM_LIT> : return createRegOperand ( FLAT_SCR_HI ) ; case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TBA_LO ) ; case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TBA_HI ) ;

case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TMA_LO ) ;


<s> switch ( Val ) { case <NUM_LIT> : return createRegOperand ( FLAT_SCR_LO ) ; case <NUM_LIT> : return createRegOperand ( FLAT_SCR_HI ) ; case <NUM_LIT> : case <NUM_LIT> : break ; case <NUM_LIT> : return createRegOperand ( VCC_LO ) ; case <NUM_LIT> : return createRegOperand ( VCC_HI ) ; case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TBA_LO ) ;

case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TBA_HI ) ;


<s> case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TMA ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ; default : break ;


<s> switch ( Val ) { case <NUM_LIT> : return createRegOperand ( FLAT_SCR ) ; case <NUM_LIT> : return createRegOperand ( VCC ) ; case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TBA ) ; case <NUM_LIT> : assert ( ! isGFX9 ( ) ) ; return createRegOperand ( TMA ) ; case <NUM_LIT> : return createRegOperand ( EXEC ) ; default : break ;


<s> static DecodeStatus decodeOperand_f16kimm ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;

return addOperand ( Inst , DAsm -> decodeMandatoryLiteralConstant ( Imm ) ) ;


<s> const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeMandatoryLiteralConstant ( Imm ) ) ;


<s> static DecodeStatus decodeOperand_VS_16_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {

const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ;


<s> static DecodeStatus decodeOperand_VS_16_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) { const auto * DAsm = static_cast < const <ISA_LIT>Disassembler * > ( Decoder ) ; return addOperand ( Inst , DAsm -> decodeSrcOp ( llvm :: <ISA_LIT>Disassembler :: OPW16 , Imm , true ) ) ;


<s> return addOperand ( Inst , DAsm -> decodeSrcOp ( llvm :: <ISA_LIT>Disassembler :: OPW32 , Imm , true ) ) ;


<s> static DecodeStatus decodeOperand_VS_32_Deferred ( MCInst & Inst , unsigned Imm , uint64_t Addr , const void * Decoder ) {