<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << MBBI . getNumber ( ) << <STR_LIT> << MBB -> getNumber ( ) << <STR_LIT> ) ; }


<s> MachineBasicBlock * ExitMBB = & MFI ; if ( ExitMBB -> succ_size ( ) == <NUM_LIT> ) { return ExitMBB ; } }


<s> MachineBasicBlock * ExitMBB = & MFI ; if ( ExitMBB -> succ_size ( ) == <NUM_LIT> ) { return ExitMBB ; }


<s> LinearizedRegion * <ISA_LIT>MachineCFGStructurizer :: initLinearizedRegion ( RegionMRT * Region ) {

LinearizedRegion * LRegion = Region -> getLinearizedRegion ( ) ;


<s> void LinearizedRegion :: initLiveOut ( RegionMRT * Region , const MachineRegisterInfo * MRI , const TargetRegisterInfo * TRI , PHILinearize & PHIInfo ) {

storeLiveOuts ( Region , MRI , TRI , PHIInfo ) ;


<s> InnerRegion -> replaceRegisterInsideRegion ( SourceReg , DestReg , true , MRI ) ; storePHILinearizationInfoDest ( DestReg , * DefInstr ) ; PHIInfo . removeSource ( DestReg , SourceReg , CodeBB ) ; DefInstr -> eraseFromParent ( ) ; } else { if ( IsSingleBB && DefInstr -> getParent ( ) == InnerRegion -> getEntry ( ) ) { InnerRegion -> replaceRegisterOutsideRegion ( SourceReg , DestReg , false , MRI ) ; } const TargetRegisterClass * RegClass = MRI -> getRegClass ( DestReg ) ; unsigned NextDestReg = MRI -> createVirtualRegister ( RegClass ) ; bool IsLastDef = PHIInfo . getNumSources ( DestReg ) == <NUM_LIT> ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; insertMergePHI ( IfBB , InnerRegion -> getExit ( ) , MergeBB , DestReg , NextDestReg , SourceReg , IsLastDef ) ; PHIInfo . removeSource ( DestReg , SourceReg , CodeBB ) ; if ( IsLastDef ) { const DebugLoc & DL = IfBB -> findDebugLoc ( IfBB -> getFirstTerminator ( ) ) ; TII -> materializeImmediate ( * IfBB , IfBB -> getFirstTerminator ( ) , DL , NextDestReg , <NUM_LIT> ) ; PHIInfo . deleteDef ( DestReg ) ; } else { PHIInfo . replaceDef ( DestReg , NextDestReg ) ; }


<s> return ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * MergeBB ) << <STR_LIT> << printReg ( DestRegister , TRI ) << <STR_LIT> << printReg ( IfSourceRegister , TRI ) << <STR_LIT> << printMBBReference ( * IfBB ) << printReg ( CodeSourceRegister , TRI ) << <STR_LIT> << printMBBReference ( * CodeBB ) << <STR_LIT> ) ; const DebugLoc & DL = MergeBB -> findDebugLoc ( MergeBB -> begin ( ) ) ; MachineInstrBuilder MIB = BuildMI ( * MergeBB , MergeBB -> instr_begin ( ) , DL , TII -> get ( TargetOpcode :: PHI ) , DestRegister ) ; if ( IsUndefIfSource && false ) { MIB . addReg ( IfSourceRegister , RegState :: Undef ) ; } else { MIB . addReg ( IfSourceRegister ) ; }


<s> if ( MergeBB -> succ_begin ( ) == MergeBB -> succ_end ( ) ) { return ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * MergeBB ) << <STR_LIT> << printReg ( DestRegister , TRI ) << <STR_LIT> << printReg ( IfSourceRegister , TRI ) << <STR_LIT> << printMBBReference ( * IfBB ) << printReg ( CodeSourceRegister , TRI ) << <STR_LIT> << printMBBReference ( * CodeBB ) << <STR_LIT> ) ; const DebugLoc & DL = MergeBB -> findDebugLoc ( MergeBB -> begin ( ) ) ; MachineInstrBuilder MIB = BuildMI ( * MergeBB , MergeBB -> instr_begin ( ) , DL , TII -> get ( TargetOpcode :: PHI ) , DestRegister ) ; if ( IsUndefIfSource && false ) { MIB . addReg ( IfSourceRegister , RegState :: Undef ) ; } else { MIB . addReg ( IfSourceRegister ) ; }


<s> static bool isFunctionEntryBlock ( MachineBasicBlock * MBB ) { return ( ( & ( * ( MBB -> getParent ( ) -> begin ( ) ) ) ) == MBB ) ;


<s> return LiveOuts . count ( Reg ) == <NUM_LIT> ;


<s> bool isRegion ( ) { return getRegionMRT ( ) != nullptr ;


<s> bool PHILinearize :: isSource ( unsigned Reg , MachineBasicBlock * SourceMBB ) { unsigned DestReg ; return findDest ( Reg , SourceMBB , DestReg ) ;


<s> setEntry ( nullptr ) ; setExit ( nullptr ) ; Parent = nullptr ;


<s> LinearizedRegion :: LinearizedRegion ( ) {


<s> static bool mbbHasBackEdge ( MachineBasicBlock * MBB , SmallPtrSet < MachineBasicBlock * , <NUM_LIT> > & MBBs ) { for ( auto <ISA_LIT> = MBB -> succ_begin ( ) , SE = MBB -> succ_end ( ) ; <ISA_LIT> != SE ; ++ <ISA_LIT> ) { if ( MBBs . count ( * <ISA_LIT> ) != <NUM_LIT> ) { return true ;


<s> for ( auto <ISA_LIT> : phiInfoElementGetSources ( Info ) ) { assert ( ( <ISA_LIT> . second != SourceMBB || SourceReg == <ISA_LIT> . first ) ) ; }

phiInfoElementGetSources ( Info ) . insert ( PHISourceT ( SourceReg , SourceMBB ) ) ;


<s> SmallVector < PHISourceT , <NUM_LIT> > ElimiatedSources ; for ( auto <ISA_LIT> : Sources ) {

if ( <ISA_LIT> . first == SourceReg && ( <ISA_LIT> . second == nullptr || <ISA_LIT> . second == SourceMBB ) ) {


<s> SmallVector < PHISourceT , <NUM_LIT> > ElimiatedSources ; for ( auto <ISA_LIT> : Sources ) { if ( <ISA_LIT> . first == SourceReg && ( <ISA_LIT> . second == nullptr || <ISA_LIT> . second == SourceMBB ) ) { ElimiatedSources . push_back ( PHISourceT ( <ISA_LIT> . first , <ISA_LIT> . second ) ) ; } } for ( auto & Source : ElimiatedSources ) {


<s> void PHILinearize :: phiInfoElementSetDef ( PHIInfoElementT * Info , unsigned NewDef ) {


<s> PHILinearizeDestIterator ( PHILinearize :: PHIInfoT :: iterator I ) : Iter ( I ) {


<s> if ( IsFirst ) { IsFirst = false ; } else { OS << <STR_LIT> ; } OS << MBB -> getNumber ( ) ; } OS << <STR_LIT> << Entry -> getNumber ( ) << <STR_LIT> << ( Exit == nullptr ? - <NUM_LIT> : Exit -> getNumber ( ) ) << <STR_LIT> << printReg ( getBBSelectRegIn ( ) , TRI ) << <STR_LIT> << printReg ( getBBSelectRegOut ( ) , TRI ) << <STR_LIT> ; for ( auto & LI : LiveOuts ) { OS << printReg ( LI , TRI ) << <STR_LIT> ; }


<s> auto Children = Region -> getChildren ( ) ; for ( auto CI : * Children ) { if ( ! CI -> isRegion ( ) ) { if ( CI -> getMBBMRT ( ) -> getMBB ( ) -> succ_size ( ) > <NUM_LIT> ) {


<s> } for ( MachineBasicBlock :: const_succ_iterator <ISA_LIT> = Entry -> succ_begin ( ) , E = Entry -> succ_end ( ) ; <ISA_LIT> != E ; ++ <ISA_LIT> ) { MachineBasicBlock * Current = * <ISA_LIT> ; if ( Current == Succ ) { FoundBypass = true ; } else if ( ( Current -> succ_size ( ) == <NUM_LIT> ) && * ( Current -> succ_begin ( ) ) == Succ ) { FoundIf = true ; } } return FoundIf && FoundBypass ;


<s> if ( Entry -> succ_size ( ) != <NUM_LIT> ) { return false ; } for ( MachineBasicBlock :: const_succ_iterator <ISA_LIT> = Entry -> succ_begin ( ) , E = Entry -> succ_end ( ) ; <ISA_LIT> != E ; ++ <ISA_LIT> ) { MachineBasicBlock * Current = * <ISA_LIT> ;


<s> RegionMRT ( MachineRegion * MachineRegion ) : Region ( MachineRegion ) { setParent ( nullptr ) ; setBBSelectRegOut ( <NUM_LIT> ) ; setBBSelectRegIn ( <NUM_LIT> ) ;


<s> for ( MachineBasicBlock :: succ_iterator PI = MBB -> succ_begin ( ) , E = MBB -> succ_end ( ) ; PI != E ; ++ PI ) {


<s> const TargetRegisterInfo * TRI = MRI -> getTargetRegisterInfo ( ) ; for ( auto MBBI : MBBs ) { MachineBasicBlock * MBB = MBBI ; for ( auto & II : * MBB ) { for ( auto & RI : II . uses ( ) ) { if ( RI . isReg ( ) ) { unsigned Reg = RI . getReg ( ) ; if ( TRI -> isVirtualRegister ( Reg ) ) { if ( hasNoDef ( Reg , MRI ) ) continue ;


<s> if ( RI . isReg ( ) ) { unsigned Reg = RI . getReg ( ) ; if ( TRI -> isVirtualRegister ( Reg ) ) { if ( hasNoDef ( Reg , MRI ) ) continue ; if ( ! MRI -> hasOneDef ( Reg ) ) { LLVM_DEBUG ( this -> getEntry ( ) -> getParent ( ) -> dump ( ) ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( Reg , TRI ) << <STR_LIT> ) ; } if ( MRI -> def_begin ( Reg ) == MRI -> def_end ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> ) ; } else if ( ! MRI -> hasOneDef ( Reg ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> ) ; } assert ( MRI -> hasOneDef ( Reg ) && <STR_LIT> ) ; MachineOperand * Def = & ( * ( MRI -> def_begin ( Reg ) ) ) ; MachineOperand * UseOperand = & ( RI ) ; bool UseIsOutsideDefMBB = Def -> getParent ( ) -> getParent ( ) != MBB ; if ( UseIsOutsideDefMBB && UseOperand -> isKill ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; UseOperand -> setIsKill ( false ) ; } } } }


<s> void LinearizedRegion :: removeLiveOut ( unsigned Reg ) { if ( isLiveOut ( Reg ) ) LiveOuts . erase ( Reg ) ;


<s> MachineBasicBlock * Exit = Region -> getSucc ( ) ; if ( Exit == nullptr ) { return ; } for ( MachineBasicBlock :: pred_iterator PI = Exit -> pred_begin ( ) , E = Exit -> pred_end ( ) ;


<s> void PHILinearize :: removeSource ( unsigned DestReg , unsigned SourceReg , MachineBasicBlock * SourceMBB ) {

phiInfoElementRemoveSource ( findPHIInfoElement ( DestReg ) , SourceReg , SourceMBB ) ;


<s> LLVM_DEBUG ( dbgs ( ) << printReg ( CombinedSourceReg , TRI ) << <STR_LIT> << printMBBReference ( * IfMBB ) ) ; unsigned NumInputs = getPHINumInputs ( PHI ) ; for ( unsigned i = <NUM_LIT> ; i < NumInputs ; ++ i ) { if ( isPHIRegionIndex ( PHIRegionIndices , i ) ) { continue ; } unsigned SourceReg = getPHISourceReg ( PHI , i ) ; MachineBasicBlock * SourcePred = getPHIPred ( PHI , i ) ; MIB . addReg ( SourceReg ) ; MIB . addMBB ( SourcePred ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( SourceReg , TRI ) << <STR_LIT> << printMBBReference ( * SourcePred ) ) ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ;


<s> replaceRegisterWith ( DestReg , CombinedSourceReg ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( CombinedSourceReg , TRI ) << <STR_LIT> ) ; PHI . eraseFromParent ( ) ; } else { LLVM_DEBUG ( dbgs ( ) << printReg ( getPHIDestReg ( PHI ) , TRI ) << <STR_LIT> ) ; MachineBasicBlock * MBB = PHI . getParent ( ) ; MachineInstrBuilder MIB = BuildMI ( * MBB , PHI , PHI . getDebugLoc ( ) , TII -> get ( TargetOpcode :: PHI ) , getPHIDestReg ( PHI ) ) ; MIB . addReg ( CombinedSourceReg ) ; MIB . addMBB ( IfMBB ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( CombinedSourceReg , TRI ) << <STR_LIT> << printMBBReference ( * IfMBB ) ) ; unsigned NumInputs = getPHINumInputs ( PHI ) ;

for ( unsigned i = <NUM_LIT> ; i < NumInputs ; ++ i ) {


<s> void LinearizedRegion :: replaceLiveOut ( unsigned OldReg , unsigned NewReg ) { if ( isLiveOut ( OldReg ) ) {


<s> void LinearizedRegion :: replaceLiveOut ( unsigned OldReg , unsigned NewReg ) { if ( isLiveOut ( OldReg ) ) { removeLiveOut ( OldReg ) ;


<s> LRegion -> replaceLiveOut ( Register , NewRegister ) ; for ( auto & CI : Children ) { if ( CI -> isRegion ( ) ) { CI -> getRegionMRT ( ) -> replaceLiveOutReg ( Register , NewRegister ) ; }


<s> IsDead = false ; } } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> << ( IsDead ? <STR_LIT> : <STR_LIT> ) << <STR_LIT> ) ; if ( IsDead ) { LRegion -> removeLiveOut ( Reg ) ; } WasLiveOut = true ; } }

if ( WasLiveOut ) LRegion -> addLiveOut ( CombinedSourceReg ) ;


<s> void LinearizedRegion :: replaceRegister ( unsigned Register , unsigned NewRegister , MachineRegisterInfo * MRI , bool ReplaceInside , bool ReplaceOutside , bool IncludeLoopPHI ) { assert ( Register != NewRegister && <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Register , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> << printReg ( NewRegister , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> ) ; if ( ReplaceOutside && ( isLiveOut ( Register ) || this -> getParent ( ) -> isLiveOut ( Register ) ) ) { LinearizedRegion * Current = this ; while ( Current != nullptr && Current -> getEntry ( ) != nullptr ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( Current -> print ( dbgs ( ) , MRI -> getTargetRegisterInfo ( ) ) ) ; Current -> replaceLiveOut ( Register , NewRegister ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( Current -> print ( dbgs ( ) , MRI -> getTargetRegisterInfo ( ) ) ) ; Current = Current -> getParent ( ) ; } } for ( MachineRegisterInfo :: reg_iterator I = MRI -> reg_begin ( Register ) , E = MRI -> reg_end ( ) ; I != E ; ) { MachineOperand & O = * I ; ++ I ; if ( O . isDef ( ) ) continue ; bool IsInside = contains ( O . getParent ( ) -> getParent ( ) ) ; bool IsLoopPHI = IsInside && ( O . getParent ( ) -> isPHI ( ) && O . getParent ( ) -> getParent ( ) == getEntry ( ) ) ; bool ShouldReplace = ( IsInside && ReplaceInside ) || ( ! IsInside && ReplaceOutside ) || ( IncludeLoopPHI && IsLoopPHI ) ; if ( ShouldReplace ) { if ( TargetRegisterInfo :: isPhysicalRegister ( NewRegister ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( NewRegister , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> ) ; llvm_unreachable ( <STR_LIT> ) ; } else {


<s> if ( ReplaceOutside && ( isLiveOut ( Register ) || this -> getParent ( ) -> isLiveOut ( Register ) ) ) { LinearizedRegion * Current = this ; while ( Current != nullptr && Current -> getEntry ( ) != nullptr ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( Current -> print ( dbgs ( ) , MRI -> getTargetRegisterInfo ( ) ) ) ; Current -> replaceLiveOut ( Register , NewRegister ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( Current -> print ( dbgs ( ) , MRI -> getTargetRegisterInfo ( ) ) ) ; Current = Current -> getParent ( ) ; } } for ( MachineRegisterInfo :: reg_iterator I = MRI -> reg_begin ( Register ) , E = MRI -> reg_end ( ) ; I != E ; ) { MachineOperand & O = * I ; ++ I ; if ( O . isDef ( ) ) continue ; bool IsInside = contains ( O . getParent ( ) -> getParent ( ) ) ; bool IsLoopPHI = IsInside && ( O . getParent ( ) -> isPHI ( ) && O . getParent ( ) -> getParent ( ) == getEntry ( ) ) ; bool ShouldReplace = ( IsInside && ReplaceInside ) || ( ! IsInside && ReplaceOutside ) || ( IncludeLoopPHI && IsLoopPHI ) ; if ( ShouldReplace ) { if ( TargetRegisterInfo :: isPhysicalRegister ( NewRegister ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( NewRegister , MRI -> getTargetRegisterInfo ( ) ) << <STR_LIT> ) ;


<s> void LinearizedRegion :: replaceRegisterInsideRegion ( unsigned Register , unsigned NewRegister , bool IncludeLoopPHIs , MachineRegisterInfo * MRI ) {

replaceRegister ( Register , NewRegister , MRI , true , false , IncludeLoopPHIs ) ;


<s> void LinearizedRegion :: replaceRegisterOutsideRegion ( unsigned Register , unsigned NewRegister , bool IncludeLoopPHIs , MachineRegisterInfo * MRI ) { replaceRegister ( Register , NewRegister , MRI , false , true , IncludeLoopPHIs ) ;


<s> unsigned SourceReg = ( * SRI ) . first ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( DestReg , TRI ) << <STR_LIT> << printReg ( SourceReg , TRI ) << <STR_LIT> ) ; assert ( PHIInfo . sources_end ( DestReg ) == ++ SRI && <STR_LIT> ) ; replaceRegisterWith ( DestReg , SourceReg ) ; }


<s> MachineBasicBlock * FalseBB = nullptr ; SmallVector < MachineOperand , <NUM_LIT> > Cond ; MachineBasicBlock * FallthroughBB = FallthroughMap [ CodeBB ] ; TII -> analyzeBranch ( * CodeBB , TrueBB , FalseBB , Cond ) ; const DebugLoc & DL = CodeBB -> findDebugLoc ( CodeBB -> getFirstTerminator ( ) ) ; if ( FalseBB == nullptr && TrueBB == nullptr && FallthroughBB == nullptr ) { TII -> materializeImmediate ( * CodeBB , CodeBB -> getFirstTerminator ( ) , DL , BBSelectReg , CodeBB -> getParent ( ) -> begin ( ) -> getNumber ( ) ) ; insertUnconditionalBranch ( CodeBB , MergeBB , DL ) ;


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; unsigned Reg = LI ; if ( Reg != InnerRegion -> getBBSelectRegOut ( ) ) { const TargetRegisterClass * RegClass = MRI -> getRegClass ( Reg ) ; unsigned PHIDestReg = MRI -> createVirtualRegister ( RegClass ) ; unsigned IfSourceReg = MRI -> createVirtualRegister ( RegClass ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg ) << <STR_LIT> ) ; TII -> materializeImmediate ( * IfBB , IfBB -> getFirstTerminator ( ) , DebugLoc ( ) , IfSourceReg , <NUM_LIT> ) ; InnerRegion -> replaceRegisterOutsideRegion ( Reg , PHIDestReg , true , MRI ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; insertMergePHI ( IfBB , InnerRegion -> getExit ( ) , MergeBB , PHIDestReg , IfSourceReg , Reg , true ) ; } } SmallVector < unsigned , <NUM_LIT> > Sources ; if ( PHIInfo . findSourcesFromMBB ( CodeBB , Sources ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * CodeBB ) << <STR_LIT> ) ; for ( auto <ISA_LIT> : Sources ) { unsigned DestReg ; PHIInfo . findDest ( <ISA_LIT> , CodeBB , DestReg ) ; insertChainedPHI ( IfBB , CodeBB , MergeBB , InnerRegion , DestReg , <ISA_LIT> ) ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; }


<s> void <ISA_LIT>MachineCFGStructurizer :: rewriteRegionEntryPHI ( LinearizedRegion * Region , MachineBasicBlock * IfMBB , MachineInstr & PHI ) {

SmallVector < unsigned , <NUM_LIT> > PHINonRegionIndices ;


<s> unsigned LinearizedSourceReg = storePHILinearizationInfo ( PHI , & PHINonRegionIndices ) ;

replaceEntryPHI ( PHI , LinearizedSourceReg , IfMBB , PHINonRegionIndices ) ;


<s> for ( auto PHII : PHIs ) { rewriteRegionEntryPHI ( Region , IfMBB , * PHII ) ;


<s> void <ISA_LIT>MachineCFGStructurizer :: rewriteRegionEntryPHIs ( LinearizedRegion * Region , MachineBasicBlock * IfMBB ) {

SmallVector < MachineInstr * , <NUM_LIT> > PHIs ;


<s> replacePHI ( PHI , LinearizedSourceReg , LastMerge , PHIRegionIndices ) ; replaceLiveOutRegs ( PHI , PHIRegionIndices , LinearizedSourceReg , LRegion ) ;


<s> if ( Exit == nullptr ) return ; collectPHIs ( Exit , PHIs ) ; for ( auto PHII : PHIs ) { rewriteRegionExitPHI ( Region , LastMerge , * PHII , LRegion ) ; }


<s> void <ISA_LIT>MachineCFGStructurizer :: rewriteRegionExitPHIs ( RegionMRT * Region , MachineBasicBlock * LastMerge , LinearizedRegion * LRegion ) {


<s> bool <ISA_LIT>MachineCFGStructurizer :: runOnMachineFunction ( MachineFunction & MF ) { const GCNSubtarget & ST = MF . getSubtarget < GCNSubtarget > ( ) ; const <ISA_LIT>InstrInfo * TII = ST . getInstrInfo ( ) ; TRI = ST . getRegisterInfo ( ) ; MRI = & ( MF . getRegInfo ( ) ) ; initFallthroughMap ( MF ) ; checkRegOnlyPHIInputs ( MF ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( MF . dump ( ) ) ; Regions = & ( getAnalysis < MachineRegionInfoPass > ( ) . getRegionInfo ( ) ) ; LLVM_DEBUG ( Regions -> dump ( ) ) ; RegionMRT * RTree = MRT :: buildMRT ( MF , Regions , TII , MRI ) ; setRegionMRT ( RTree ) ; initializeSelectRegisters ( RTree , <NUM_LIT> , MRI , TII ) ; LLVM_DEBUG ( RTree -> dump ( TRI ) ) ;

bool result = structurizeRegions ( RTree , true ) ;


<s> void LinearizedRegion :: setHasLoop ( bool Value ) { HasLoop = Value ;


<s> void LinearizedRegion :: setHasLoop ( bool Value ) {


<s> void setLinearizedRegion ( LinearizedRegion * LinearizeRegion ) { LRegion = LinearizeRegion ;


<s> void setParent ( RegionMRT * Region ) { Parent = Region ;


<s> static void setPhiPred ( MachineInstr & PHI , unsigned Index , MachineBasicBlock * NewPred ) { PHI . getOperand ( Index * <NUM_LIT> + <NUM_LIT> ) . setMBB ( NewPred ) ;


<s> } else { SingleExternalEntryIndex = - <NUM_LIT> ; } } } if ( SingleExternalEntryIndex > - <NUM_LIT> ) { * ReplaceReg = getPHISourceReg ( PHI , SingleExternalEntryIndex ) ; Replaced = true ; } else { MachineBasicBlock * MBB = PHI . getParent ( ) ; MachineInstrBuilder MIB = BuildMI ( * MBB , PHI , PHI . getDebugLoc ( ) , TII -> get ( TargetOpcode :: PHI ) , getPHIDestReg ( PHI ) ) ; if ( SourceMBB ) { MIB . addReg ( CombinedSourceReg ) ; MIB . addMBB ( SourceMBB ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( CombinedSourceReg , TRI ) << <STR_LIT> << printMBBReference ( * SourceMBB ) ) ; } for ( unsigned i = <NUM_LIT> ; i < NumInputs ; ++ i ) { if ( isPHIRegionIndex ( PHIIndices , i ) ) { continue ; } unsigned SourceReg = getPHISourceReg ( PHI , i ) ; MachineBasicBlock * SourcePred = getPHIPred ( PHI , i ) ; MIB . addReg ( SourceReg ) ; MIB . addMBB ( SourcePred ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( SourceReg , TRI ) << <STR_LIT> << printMBBReference ( * SourcePred ) ) ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ;


<s> PHILinearize :: source_iterator PHILinearize :: sources_begin ( unsigned Reg ) { auto InfoElement = findPHIInfoElement ( Reg ) ; return phiInfoElementGetSources ( InfoElement ) . begin ( ) ;


<s> return phiInfoElementGetSources ( InfoElement ) . end ( ) ;


<s> auto InfoElement = findPHIInfoElement ( Reg ) ;

return phiInfoElementGetSources ( InfoElement ) . end ( ) ;


<s> static MachineBasicBlock * split ( MachineBasicBlock :: iterator I ) { MachineBasicBlock * MBB = ( * I ) . getParent ( ) ; MachineFunction * MF = MBB -> getParent ( ) ; MachineBasicBlock * SuccMBB = MF -> CreateMachineBasicBlock ( ) ;

auto MBBIter = ++ ( MBB -> getIterator ( ) ) ;


<s> MachineBasicBlock * EntrySucc = split ( Entry -> getFirstNonPHI ( ) ) ; MachineBasicBlock * Exit = LRegion -> getExit ( ) ;

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * Entry ) << <STR_LIT> << printMBBReference ( * Entry ) << <STR_LIT> << printMBBReference ( * EntrySucc ) << <STR_LIT> ) ;


<s> auto MRTRegion = LRegion -> getRegionMRT ( ) ; auto Exit = LRegion -> getExit ( ) ; auto MF = Exit -> getParent ( ) ; auto Succ = MRTRegion -> getSucc ( ) ; auto NewExit = MF -> CreateMachineBasicBlock ( ) ; auto AfterExitIter = Exit -> getIterator ( ) ; AfterExitIter ++ ; MF -> insert ( AfterExitIter , NewExit ) ; Exit -> removeSuccessor ( Succ ) ; Exit -> addSuccessor ( NewExit ) ; NewExit -> addSuccessor ( Succ ) ; insertUnconditionalBranch ( NewExit , Succ ) ; LRegion -> addMBB ( NewExit ) ; LRegion -> setExit ( NewExit ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << NewExit -> getNumber ( ) << <STR_LIT> ) ; for ( auto & II : * Succ ) {


<s> SmallVector < unsigned , <NUM_LIT> > PHIRegionIndices ; getPHIRegionIndices ( LRegion , PHI , PHIRegionIndices ) ; assert ( PHIRegionIndices . size ( ) == <NUM_LIT> ) ; unsigned RegionIndex = PHIRegionIndices [ <NUM_LIT> ] ; unsigned RegionSourceReg = getPHISourceReg ( PHI , RegionIndex ) ; MachineBasicBlock * RegionSourceMBB = getPHIPred ( PHI , RegionIndex ) ; unsigned PHIDest = getPHIDestReg ( PHI ) ; unsigned PHISource = PHIDest ; unsigned ReplaceReg ; if ( shrinkPHI ( PHI , PHIRegionIndices , & ReplaceReg ) ) { PHISource = ReplaceReg ; } const TargetRegisterClass * RegClass = MRI -> getRegClass ( PHIDest ) ; unsigned NewDestReg = MRI -> createVirtualRegister ( RegClass ) ; LRegion -> replaceRegisterInsideRegion ( PHIDest , NewDestReg , false , MRI ) ; MachineInstrBuilder MIB = BuildMI ( * EntrySucc , EntrySucc -> instr_begin ( ) , PHI . getDebugLoc ( ) , TII -> get ( TargetOpcode :: PHI ) , NewDestReg ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( NewDestReg , TRI ) << <STR_LIT> ) ; MIB . addReg ( PHISource ) ; MIB . addMBB ( Entry ) ; LLVM_DEBUG ( dbgs ( ) << printReg ( PHISource , TRI ) << <STR_LIT> << printMBBReference ( * Entry ) ) ;


<s> void <ISA_LIT>MachineCFGStructurizer :: splitLoopPHIs ( MachineBasicBlock * Entry , MachineBasicBlock * EntrySucc , LinearizedRegion * LRegion ) { SmallVector < MachineInstr * , <NUM_LIT> > PHIs ; collectPHIs ( Entry , PHIs ) ; for ( auto PHII : PHIs ) { splitLoopPHI ( * PHII , Entry , EntrySucc , LRegion ) ; }


<s> SmallVector < MachineInstr * , <NUM_LIT> > PHIs ; collectPHIs ( Entry , PHIs ) ; for ( auto PHII : PHIs ) { splitLoopPHI ( * PHII , Entry , EntrySucc , LRegion ) ; }


<s> if ( PHIInfo . isSource ( Reg ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; addLiveOut ( Reg ) ; } else { for ( auto & UI : MRI -> use_operands ( Reg ) ) { if ( UI . getParent ( ) -> getParent ( ) != MBB ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * MBB ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; addLiveOut ( Reg ) ; } else { MachineInstr * UseInstr = UI . getParent ( ) ; for ( MachineBasicBlock :: instr_iterator MII = UseInstr -> getIterator ( ) , MIE = UseInstr -> getParent ( ) -> instr_end ( ) ; MII != MIE ; ++ MII ) { if ( ( & ( * MII ) ) == DefInstr ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ;


<s> if ( TRI -> isVirtualRegister ( Reg ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; if ( PHIInfo . isSource ( Reg ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; addLiveOut ( Reg ) ; } else { for ( auto & UI : MRI -> use_operands ( Reg ) ) { if ( UI . getParent ( ) -> getParent ( ) != MBB ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printMBBReference ( * MBB ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; addLiveOut ( Reg ) ; } else { MachineInstr * UseInstr = UI . getParent ( ) ; for ( MachineBasicBlock :: instr_iterator MII = UseInstr -> getIterator ( ) , MIE = UseInstr -> getParent ( ) -> instr_end ( ) ; MII != MIE ; ++ MII ) { if ( ( & ( * MII ) ) == DefInstr ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; addLiveOut ( Reg ) ;


<s> void LinearizedRegion :: storeLiveOutRegRegion ( RegionMRT * Region , unsigned Reg , MachineInstr * DefInstr , const MachineRegisterInfo * MRI , const TargetRegisterInfo * TRI , PHILinearize & PHIInfo ) { if ( TRI -> isVirtualRegister ( Reg ) ) {

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ;


<s> void LinearizedRegion :: storeLiveOutRegRegion ( RegionMRT * Region , unsigned Reg , MachineInstr * DefInstr , const MachineRegisterInfo * MRI , const TargetRegisterInfo * TRI , PHILinearize & PHIInfo ) { if ( TRI -> isVirtualRegister ( Reg ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ; for ( auto & UI : MRI -> use_operands ( Reg ) ) { if ( ! Region -> contains ( UI . getParent ( ) -> getParent ( ) ) ) {

LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << ( void * ) Region << <STR_LIT> << printReg ( Reg , TRI ) << <STR_LIT> ) ;


<s> for ( auto CI : * Children ) { if ( CI -> isMBB ( ) ) { auto MBB = CI -> getMBBMRT ( ) -> getMBB ( ) ; storeMBBLiveOuts ( MBB , MRI , TRI , PHIInfo , TopRegion ) ; } else { LinearizedRegion * SubRegion = CI -> getRegionMRT ( ) -> getLinearizedRegion ( ) ; for ( auto MBBI : SubRegion -> MBBs ) { storeMBBLiveOuts ( MBBI , MRI , TRI , PHIInfo , TopRegion ) ; } } } if ( CurrentTopRegion == nullptr ) { auto Succ = Region -> getSucc ( ) ; for ( auto & II : * Succ ) {


<s> } else { LinearizedRegion * SubRegion = CI -> getRegionMRT ( ) -> getLinearizedRegion ( ) ; for ( auto MBBI : SubRegion -> MBBs ) { storeMBBLiveOuts ( MBBI , MRI , TRI , PHIInfo , TopRegion ) ; } } } if ( CurrentTopRegion == nullptr ) { auto Succ = Region -> getSucc ( ) ; for ( auto & II : * Succ ) { if ( II . isPHI ( ) ) { MachineInstr & PHI = II ;

int numPreds = getPHINumInputs ( PHI ) ;


<s> void LinearizedRegion :: storeMBBLiveOuts ( MachineBasicBlock * MBB , const MachineRegisterInfo * MRI , const TargetRegisterInfo * TRI , PHILinearize & PHIInfo , RegionMRT * TopRegion ) { for ( auto & II : * MBB ) { for ( auto & RI : II . defs ( ) ) { storeLiveOutRegRegion ( TopRegion , RI . getReg ( ) , RI . getParent ( ) , MRI , TRI , PHIInfo ) ; } for ( auto & IRI : II . implicit_operands ( ) ) { if ( IRI . isDef ( ) ) {

storeLiveOutRegRegion ( TopRegion , IRI . getReg ( ) , IRI . getParent ( ) , MRI , TRI , PHIInfo ) ;


<s> void LinearizedRegion :: storeMBBLiveOuts ( MachineBasicBlock * MBB , const MachineRegisterInfo * MRI , const TargetRegisterInfo * TRI , PHILinearize & PHIInfo , RegionMRT * TopRegion ) { for ( auto & II : * MBB ) { for ( auto & RI : II . defs ( ) ) { storeLiveOutRegRegion ( TopRegion , RI . getReg ( ) , RI . getParent ( ) , MRI , TRI , PHIInfo ) ; } for ( auto & IRI : II . implicit_operands ( ) ) { if ( IRI . isDef ( ) ) { storeLiveOutRegRegion ( TopRegion , IRI . getReg ( ) , IRI . getParent ( ) , MRI , TRI , PHIInfo ) ; }


<s> unsigned <ISA_LIT>MachineCFGStructurizer :: storePHILinearizationInfo ( MachineInstr & PHI , SmallVector < unsigned , <NUM_LIT> > * RegionIndices ) { unsigned DestReg = getPHIDestReg ( PHI ) ; unsigned LinearizeDestReg = MRI -> createVirtualRegister ( MRI -> getRegClass ( DestReg ) ) ; PHIInfo . addDest ( LinearizeDestReg , PHI . getDebugLoc ( ) ) ; storePHILinearizationInfoDest ( LinearizeDestReg , PHI , RegionIndices ) ;


<s> unsigned LinearizeDestReg = MRI -> createVirtualRegister ( MRI -> getRegClass ( DestReg ) ) ; PHIInfo . addDest ( LinearizeDestReg , PHI . getDebugLoc ( ) ) ;

storePHILinearizationInfoDest ( LinearizeDestReg , PHI , RegionIndices ) ;


<s> for ( auto i : * RegionIndices ) { PHIInfo . addSource ( LDestReg , getPHISourceReg ( PHI , i ) , getPHIPred ( PHI , i ) ) ; }


<s> LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; } else { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; } unsigned BBSelectRegIn ; unsigned BBSelectRegOut ; for ( auto CI = Children -> begin ( ) , CE = Children -> end ( ) ; CI != CE ; ++ CI ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( LRegion -> print ( dbgs ( ) , TRI ) ) ; auto CNI = CI ; ++ CNI ; MRT * Child = ( * CI ) ; if ( Child -> isRegion ( ) ) { LinearizedRegion * InnerLRegion = Child -> getRegionMRT ( ) -> getLinearizedRegion ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( InnerLRegion -> print ( dbgs ( ) , TRI ) ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; MachineBasicBlock * InnerEntry = InnerLRegion -> getEntry ( ) ; if ( ( & ( * ( InnerEntry -> getParent ( ) -> begin ( ) ) ) ) == InnerEntry ) { unsigned OuterSelect = InnerLRegion -> getBBSelectRegOut ( ) ; unsigned InnerSelectReg = InnerLRegion -> getRegionMRT ( ) -> getInnerOutputRegister ( ) ; replaceRegisterWith ( InnerSelectReg , OuterSelect ) , resolvePHIInfos ( InnerEntry ) ; if ( ! InnerLRegion -> getExit ( ) -> isSuccessor ( CurrentMerge ) ) InnerLRegion -> getExit ( ) -> addSuccessor ( CurrentMerge ) ; continue ; } BBSelectRegOut = Child -> getBBSelectRegOut ( ) ; BBSelectRegIn = Child -> getBBSelectRegIn ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( BBSelectRegIn , TRI ) << <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( BBSelectRegOut , TRI ) << <STR_LIT> ) ; MachineBasicBlock * IfEnd = CurrentMerge ; CurrentMerge = createIfRegion ( CurrentMerge , InnerLRegion , LRegion , Child -> getRegionMRT ( ) -> getEntry ( ) , BBSelectRegIn , BBSelectRegOut ) ; TII -> convertNonUniformIfRegion ( CurrentMerge , IfEnd ) ; } else { MachineBasicBlock * MBB = Child -> getMBBMRT ( ) -> getMBB ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << MBB -> getNumber ( ) << <STR_LIT> ) ; if ( MBB == getSingleExitNode ( * ( MBB -> getParent ( ) ) ) ) { continue ; } BBSelectRegOut = Child -> getBBSelectRegOut ( ) ; BBSelectRegIn = Child -> getBBSelectRegIn ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( BBSelectRegIn , TRI ) << <STR_LIT> ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << printReg ( BBSelectRegOut , TRI ) << <STR_LIT> ) ; MachineBasicBlock * IfEnd = CurrentMerge ; CurrentMerge = createIfRegion ( CurrentMerge , MBB , LRegion , BBSelectRegIn , BBSelectRegOut ) ; if ( CurrentMerge ) { TII -> convertNonUniformIfRegion ( CurrentMerge , IfEnd ) ;


<s> return true ; } else if ( regionIsSequence ( Region ) ) { fixupRegionExits ( Region ) ; return false ; } else {


<s> for ( auto CI : * Children ) { if ( CI -> isRegion ( ) ) { Changed |= structurizeRegions ( CI -> getRegionMRT ( ) , false ) ;


<s> bool Changed = false ; auto Children = Region -> getChildren ( ) ; for ( auto CI : * Children ) {


<s> MachineBasicBlock * Entry = Region -> getEntry ( ) ; MachineBasicBlock * Exit = Region -> getExit ( ) ; TII -> convertNonUniformIfRegion ( Entry , Exit ) ;


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , ShaderType ( ShaderType :: COMPUTE ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , IsKernel ( true ) { ShaderType = <STR_LIT> ( * MF . getFunction ( ) ) ;


<s> void <ISA_LIT>MachineFunction :: anchor ( ) {


<s> unsigned getShaderType ( ) const { return ShaderType ;


<s> bool isKernel ( ) const { return true ;


<s> auto Entry = LocalMemoryObjects . insert ( std :: make_pair ( & GV , <NUM_LIT> ) ) ; if ( ! Entry . second ) return Entry . first -> second ; Align Alignment = DL . getValueOrABITypeAlignment ( GV . getAlign ( ) , GV . getValueType ( ) ) ; unsigned Offset ; if ( GV . getAddressSpace ( ) == <ISA_LIT>AS :: LOCAL_ADDRESS ) { Offset = StaticLDSSize = alignTo ( StaticLDSSize , Alignment ) ; StaticLDSSize += DL . getTypeAllocSize ( GV . getValueType ( ) ) ; LDSSize = alignTo ( StaticLDSSize , DynLDSAlign ) ; } else { assert ( GV . getAddressSpace ( ) == <ISA_LIT>AS :: REGION_ADDRESS && <STR_LIT> ) ; Offset = StaticGDSSize = alignTo ( StaticGDSSize , Alignment ) ; StaticGDSSize += DL . getTypeAllocSize ( GV . getValueType ( ) ) ; GDSSize = StaticGDSSize ;


<s> const Module * M = F . getParent ( ) ; if ( isModuleEntryFunction ( ) ) { const GlobalVariable * GV = M -> getNamedGlobal ( <STR_LIT> ) ; if ( GV && ! canElideModuleLDS ( F ) ) { unsigned Offset = allocateLDSGlobal ( M -> getDataLayout ( ) , * GV ) ; ( void ) Offset ; assert ( Offset == <NUM_LIT> && <STR_LIT> ) ; }


<s> return F . hasFnAttribute ( <STR_LIT> ) ;


<s> Align Alignment = DL . getValueOrABITypeAlignment ( GV . getAlign ( ) , GV . getValueType ( ) ) ; if ( Alignment <= DynLDSAlign ) return ; LDSSize = alignTo ( StaticLDSSize , Alignment ) ;


<s> uint64_t allocateKernArg ( uint64_t Size , unsigned Align ) { assert ( isPowerOf2_32 ( Align ) ) ;

KernArgSize = alignTo ( KernArgSize , Align ) ;


<s> assert ( isPowerOf2_32 ( Align ) ) ; KernArgSize = alignTo ( KernArgSize , Align ) ; uint64_t Result = KernArgSize ; KernArgSize += Size ; MaxKernArgAlign = std :: max ( Align , MaxKernArgAlign ) ;


<s> unsigned <ISA_LIT>MachineFunction :: allocateLDSGlobal ( const DataLayout & DL , const GlobalVariable & GV ) { auto Entry = LocalMemoryObjects . insert ( std :: make_pair ( & GV , <NUM_LIT> ) ) ; if ( ! Entry . second ) return Entry . first -> second ; Align Alignment = DL . getValueOrABITypeAlignment ( GV . getAlign ( ) , GV . getValueType ( ) ) ; unsigned Offset = StaticLDSSize = alignTo ( StaticLDSSize , Alignment ) ; Entry . first -> second = Offset ; StaticLDSSize += DL . getTypeAllocSize ( GV . getValueType ( ) ) ; LDSSize = alignTo ( StaticLDSSize , DynLDSAlign ) ; return Offset ;


<s> const GlobalVariable * GV = M -> getNamedGlobal ( <STR_LIT> ) ; if ( GV ) { unsigned Offset = allocateLDSGlobal ( M -> getDataLayout ( ) , * GV ) ;


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : Mode ( MF . getFunction ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , IsModuleEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ; const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . getValueAsBool ( ) ; Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ;

WaveLimiter = WaveLimitAttr . getValueAsBool ( ) ;


<s> bool isKernel ( ) const { return IsKernel ;


<s> void setABIArgOffset ( unsigned NewOffset ) {


<s> unsigned Align = GV . getAlignment ( ) ; if ( Align == <NUM_LIT> ) Align = DL . getABITypeAlignment ( GV . getValueType ( ) ) ; unsigned Offset = LDSSize = alignTo ( LDSSize , Align ) ; Entry . first -> second = Offset ;

LDSSize += DL . getTypeAllocSize ( GV . getValueType ( ) ) ;


<s> unsigned Offset = LDSSize = alignTo ( LDSSize , Align ) ; Entry . first -> second = Offset ; LDSSize += DL . getTypeAllocSize ( GV . getValueType ( ) ) ; return Offset ;


<s> const Function & F = MF . getFunction ( ) ; if ( auto * Resolver = MF . getMMI ( ) . getResolver ( ) ) { if ( <ISA_LIT>PerfHintAnalysis * PHA = static_cast < <ISA_LIT>PerfHintAnalysis * > ( Resolver -> getAnalysisIfAvailable ( & <ISA_LIT>PerfHintAnalysisID , true ) ) ) {

MemoryBound = PHA -> isMemoryBound ( & F ) ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , ExplicitKernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) , MemoryBound ( false ) , WaveLimiter ( false ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ;

const Function & F = MF . getFunction ( ) ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , IsKernel ( MF . getFunction ( ) -> getCallingConv ( ) == CallingConv :: <ISA_LIT>_KERNEL || MF . getFunction ( ) -> getCallingConv ( ) == CallingConv :: SPIR_KERNEL ) {


<s> return MaxKernArgAlign . value ( ) ;


<s> <STR_LIT> getMode ( ) const { return Mode ;


<s> bool hasNoSignedZerosFPMath ( ) const {


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , Mode ( MF . getFunction ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , IsModuleEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ;


<s> Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . isStringAttribute ( ) && WaveLimitAttr . getValueAsString ( ) == <STR_LIT> ; CallingConv :: ID CC = F . getCallingConv ( ) ;

if ( CC == CallingConv :: <ISA_LIT>_KERNEL || CC == CallingConv :: SPIR_KERNEL ) ExplicitKernArgSize = ST . getExplicitKernArgSize ( F , MaxKernArgAlign ) ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , ExplicitKernArgSize ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , Mode ( MF . getFunction ( ) , MF . getSubtarget < GCNSubtarget > ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) , MemoryBound ( false ) , WaveLimiter ( false ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ; const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . isStringAttribute ( ) && MemBoundAttr . getValueAsString ( ) == <STR_LIT> ; Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . isStringAttribute ( ) && WaveLimitAttr . getValueAsString ( ) == <STR_LIT> ; CallingConv :: ID CC = F . getCallingConv ( ) ;


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , ExplicitKernArgSize ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , Mode ( MF . getFunction ( ) , MF . getSubtarget < GCNSubtarget > ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) , MemoryBound ( false ) , WaveLimiter ( false ) {

const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ;


<s> Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . isStringAttribute ( ) && WaveLimitAttr . getValueAsString ( ) == <STR_LIT> ; CallingConv :: ID CC = F . getCallingConv ( ) ; if ( CC == CallingConv :: <ISA_LIT>_KERNEL || CC == CallingConv :: SPIR_KERNEL ) ExplicitKernArgSize = ST . getExplicitKernArgSize ( F , MaxKernArgAlign ) ;


<s> MemoryBound = MemBoundAttr . getValueAsBool ( ) ; Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . getValueAsBool ( ) ; CallingConv :: ID CC = F . getCallingConv ( ) ;


<s> Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . getValueAsBool ( ) ; CallingConv :: ID CC = F . getCallingConv ( ) ; if ( CC == CallingConv :: <ISA_LIT>_KERNEL || CC == CallingConv :: SPIR_KERNEL ) ExplicitKernArgSize = ST . getExplicitKernArgSize ( F , MaxKernArgAlign ) ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) -> getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) {


<s> uint64_t Result = ExplicitKernArgSize ; ExplicitKernArgSize += Size ; MaxKernArgAlign = std :: max ( Align , MaxKernArgAlign ) ; return Result ;


<s> unsigned Offset = allocateLDSGlobal ( M -> getDataLayout ( ) , * GV ) ; ( void ) Offset ; assert ( Offset == <NUM_LIT> && <STR_LIT> ) ;


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) :

MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) {


<s> if ( A . isStringAttribute ( ) ) { StringRef Str = A . getValueAsString ( ) ; if ( Str . getAsInteger ( <NUM_LIT> , ShaderType ) ) llvm_unreachable ( <STR_LIT> ) ; }


<s> Attribute A = MF . getFunction ( ) -> getFnAttribute ( ShaderTypeAttribute ) ; if ( A . isStringAttribute ( ) ) { StringRef Str = A . getValueAsString ( ) ; if ( Str . getAsInteger ( <NUM_LIT> , ShaderType ) ) llvm_unreachable ( <STR_LIT> ) ; }


<s> const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . isStringAttribute ( ) && MemBoundAttr . getValueAsString ( ) == <STR_LIT> ; Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ; WaveLimiter = WaveLimitAttr . isStringAttribute ( ) && WaveLimitAttr . getValueAsString ( ) == <STR_LIT> ;

CallingConv :: ID CC = F . getCallingConv ( ) ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , ExplicitKernArgSize ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , Mode ( MF . getFunction ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) , MemoryBound ( false ) , WaveLimiter ( false ) {


MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , IsEntryFunction ( isEntryFunctionCC ( MF . getFunction ( ) -> getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) {


<s> case CallingConv :: SPIR_KERNEL : case CallingConv :: <ISA_LIT>_VS : case CallingConv :: <ISA_LIT>_GS : case CallingConv :: <ISA_LIT>_PS : case CallingConv :: <ISA_LIT>_CS : return true ; default : return false ;


<s> auto Entry = LocalMemoryObjects . insert ( std :: make_pair ( & GV , <NUM_LIT> ) ) ; if ( ! Entry . second ) return Entry . first -> second ; Align Alignment = DL . getValueOrABITypeAlignment ( GV . getAlign ( ) , GV . getValueType ( ) ) ; unsigned Offset = LDSSize = alignTo ( LDSSize , Alignment ) ;


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , Mode ( MF . getFunction ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ; const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . isStringAttribute ( ) && MemBoundAttr . getValueAsString ( ) == <STR_LIT> ;

Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ;


<s> MachineFunctionInfo ( ) , Mode ( MF . getFunction ( ) ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ; const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . isStringAttribute ( ) && MemBoundAttr . getValueAsString ( ) == <STR_LIT> ;


<s> MachineFunctionInfo ( ) , LocalMemoryObjects ( ) , ExplicitKernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , IsEntryFunction ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) , NoSignedZerosFPMath ( MF . getTarget ( ) . Options . NoSignedZerosFPMath ) , MemoryBound ( false ) , WaveLimiter ( false ) { const <ISA_LIT>Subtarget & ST = <ISA_LIT>Subtarget :: get ( MF ) ; const Function & F = MF . getFunction ( ) ; Attribute MemBoundAttr = F . getFnAttribute ( <STR_LIT> ) ; MemoryBound = MemBoundAttr . isStringAttribute ( ) && MemBoundAttr . getValueAsString ( ) == <STR_LIT> ; Attribute WaveLimitAttr = F . getFnAttribute ( <STR_LIT> ) ;

WaveLimiter = WaveLimitAttr . isStringAttribute ( ) && WaveLimitAttr . getValueAsString ( ) == <STR_LIT> ;


MachineFunctionInfo ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , IsKernel ( true ) {


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , IsKernel ( true ) {


<s> <ISA_LIT>MachineFunction :: <ISA_LIT>MachineFunction ( const MachineFunction & MF ) : MachineFunctionInfo ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , IsKernel ( MF . getFunction ( ) -> getCallingConv ( ) == llvm :: CallingConv :: <ISA_LIT>_KERNEL || MF . getFunction ( ) -> getCallingConv ( ) == llvm :: CallingConv :: SPIR_KERNEL ) {


<s> MachineFunctionInfo ( ) , KernArgSize ( <NUM_LIT> ) , MaxKernArgAlign ( <NUM_LIT> ) , LDSSize ( <NUM_LIT> ) , ABIArgOffset ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , IsKernel ( MF . getFunction ( ) -> getCallingConv ( ) == llvm :: CallingConv :: <ISA_LIT>_KERNEL || MF . getFunction ( ) -> getCallingConv ( ) == llvm :: CallingConv :: SPIR_KERNEL ) {


<s> bool <ISA_LIT>MachineFunction :: isKernel ( ) const {


<s> AgentS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ; WorkgroupS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ; WavefrontS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ; SystemOneAddressSpaceS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ;

AgentOneAddressSpaceS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ;


<s> return AgentOneAddressSpaceS<ISA_LIT>D ;


<s> SyncScope :: ID getAgentOneAddressSpaceS<ISA_LIT>D ( ) const {


else if ( S<ISA_LIT>D == SyncScope :: System || S<ISA_LIT>D == getSystemOneAddressSpaceS<ISA_LIT>D ( ) ) return <NUM_LIT> ;


<s> SyncScope :: ID getSystemOneAddressSpaceS<ISA_LIT>D ( ) const { return SystemOneAddressSpaceS<ISA_LIT>D ;


<s> SyncScope :: ID getWavefrontOneAddressSpaceS<ISA_LIT>D ( ) const { return WavefrontOneAddressSpaceS<ISA_LIT>D ;


<s> SyncScope :: ID getWorkgroupOneAddressSpaceS<ISA_LIT>D ( ) const { return WorkgroupOneAddressSpaceS<ISA_LIT>D ;


<s> Optional < bool > isSyncScopeInclusion ( SyncScope :: ID A , SyncScope :: ID B ) const { const auto & AIO = getSyncScopeInclusionOrdering ( A ) ; const auto & BIO = getSyncScopeInclusionOrdering ( B ) ; if ( ! AIO || ! BIO ) return None ;

bool IsAOneAddressSpace = isOneAddressSpace ( A ) ;


<s> WorkgroupS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ;

WavefrontS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ;


<s> AgentS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ; WorkgroupS<ISA_LIT>D = CTX . getOrInsertSyncScopeID ( <STR_LIT> ) ;


<s> SyncScope :: ID getAgentS<ISA_LIT>D ( ) const {


<s> else if ( S<ISA_LIT>D == getAgentS<ISA_LIT>D ( ) ) return <NUM_LIT> ;

else if ( S<ISA_LIT>D == SyncScope :: System ) return <NUM_LIT> ;


<s> const auto & AIO = getSyncScopeInclusionOrdering ( A ) ; const auto & BIO = getSyncScopeInclusionOrdering ( B ) ;


<s> const auto & AIO = getSyncScopeInclusionOrdering ( A ) ; const auto & BIO = getSyncScopeInclusionOrdering ( B ) ; if ( ! AIO || ! BIO ) return None ; return AIO . getValue ( ) > BIO . getValue ( ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { if ( ! FirstMI ) return true ; const MachineOperand * Src2 = TII . getNamedOperand ( SecondMI , <STR_LIT> :: src2 ) ;

return FirstMI -> definesRegister ( Src2 -> getReg ( ) ) ;


<s> if ( ! FirstMI ) return true ; const MachineOperand * Src2 = TII . getNamedOperand ( SecondMI , <STR_LIT> :: src2 ) ; return FirstMI -> definesRegister ( Src2 -> getReg ( ) ) ; } default :


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { if ( ! FirstMI ) return true ; const MachineBasicBlock & MBB = * FirstMI -> getParent ( ) ; const MachineRegisterInfo & MRI = MBB . getParent ( ) -> getRegInfo ( ) ; const TargetRegisterInfo * TRI = MRI . getTargetRegisterInfo ( ) ; const MachineOperand * Src2 = TII . getNamedOperand ( SecondMI , <STR_LIT> :: src2 ) ; return FirstMI -> definesRegister ( Src2 -> getReg ( ) , TRI ) ; } default : return false ;


<s> return createMacroFusionDAGMutation ( shouldScheduleAdjacent ) ;


<s> PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasDotTypeDotSizeDirective = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ; SupportsDebugInformation = true ;


<s> StackGrowsUp = true ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ;

COMMDirectiveAlignmentIsInBytes = false ;


<s> MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; SupportsDebugInformation = true ; UsesCFIForDebug = true ; DwarfRegNumForCFI = true ;


<s> InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ; SupportsDebugInformation = true ; DwarfRegNumForCFI = true ; UseIntegratedAssembler = false ;


<s> SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasDotTypeDotSizeDirective = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ;


<s> return SectionName == <STR_LIT> || MCAsmInfo :: shouldOmitSectionDirective ( SectionName ) ;


<s> PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; SupportsDebugInformation = true ; UsesCFIForDebug = true ; DwarfRegNumForCFI = true ; UseIntegratedAssembler = false ;


<s> StackGrowsUp = true ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & TT ) : MCAsmInfoELF ( ) { CodePointerSize = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ;


<s> CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ;


<s> MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ; SupportsDebugInformation = true ;


<s> HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ;


<s> CodePointerSize = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; StackGrowsUp = true ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ;


<s> StackGrowsUp = true ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ;


<s> MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ;


<s> InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ; COMMDirectiveAlignmentIsInBytes = false ; HasNoDeadStrip = true ; WeakRefDirective = <STR_LIT> ;


<s> MaxInstLength = <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ; HasAggressiveSymbolFolding = true ;


<s> CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ; SunStyleELFSectionSwitchSyntax = true ; UsesELFSectionDirectiveForBSS = true ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & TT , const MCTargetOptions & Options ) : MCAsmInfoELF ( ) { CodePointerSize = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; StackGrowsUp = true ; HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ;


<s> HasSingleParameterDotFile = false ; MinInstAlignment = <NUM_LIT> ; MaxInstLength = ( TT . getArch ( ) == Triple :: amdgcn ) ? <NUM_LIT> : <NUM_LIT> ; SeparatorString = <STR_LIT> ; CommentString = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; InlineAsmStart = <STR_LIT> ; InlineAsmEnd = <STR_LIT> ;


<s> unsigned <ISA_LIT>MCAsmInfo :: getMaxInstLength ( const MCSubtargetInfo * STI ) const { if ( ! STI || STI -> getTargetTriple ( ) . getArch ( ) == Triple :: r600 ) return MaxInstLength ; if ( STI -> getFeatureBits ( ) [ <STR_LIT> ] ) return <NUM_LIT> ;


<s> if ( ! STI || STI -> getTargetTriple ( ) . getArch ( ) == Triple :: r600 ) return MaxInstLength ;


<s> virtual unsigned getAVOperandEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> ;


<s> virtual unsigned getSMEMOffsetEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> ;


<s> virtual unsigned getSDWA9SrcEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii ) : MCII ( mcii ) {


<s> void <ISA_LIT>MCCodeEmitter :: anchor ( ) {


<s> virtual uint64_t getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> virtual unsigned getSOPPBrEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( MCContext & ctx , const <ISA_LIT>Subtarget & st ) :


<s> } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * MF -> getSubtarget ( ) . getInstrInfo ( ) , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , MF -> getSubtarget ( ) ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ; InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ;

for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) {


<s> break ; case MachineOperand :: MO_Register : MCOp = MCOperand :: createReg ( <STR_LIT> ( MO . getReg ( ) , ST ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : { const GlobalValue * GV = MO . getGlobal ( ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( StringRef ( GV -> getName ( ) ) ) ; MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( Sym , Ctx ) ) ; break ; } case MachineOperand :: MO_ExternalSymbol : { MCSymbol * Sym = Ctx . getOrCreateSymbol ( StringRef ( MO . getSymbolName ( ) ) ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( Sym , Ctx ) ; MCOp = MCOperand :: createExpr ( Expr ) ; break ; } }


<s> void <ISA_LIT>MCInstLower :: lower ( const MachineInstr * MI , MCInst & OutMI ) const { int MCOpcode = ST . getInstrInfo ( ) -> pseudoToMCOpcode ( MI -> getOpcode ( ) ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ; for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) { MCOperand MCOp ; switch ( MO . getType ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_Register : MCOp = MCOperand :: createReg ( <STR_LIT> ( MO . getReg ( ) , ST ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : { const GlobalValue * GV = MO . getGlobal ( ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( StringRef ( GV -> getName ( ) ) ) ; MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( Sym , Ctx ) ) ;


<s> Ctx ( ctx ) , ST ( st ) , AP ( ap ) {


<s> EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , STI ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ; InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ; for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) { unsigned int CodeDWord = * ( unsigned int * ) & CodeBytes [ i ] ;

HexStream << format ( <STR_LIT> , ( i > <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) , CodeDWord ) ;


<s> const MCExpr * <ISA_LIT>MCInstLower :: getLongBranchBlockExpr ( const MachineBasicBlock & SrcBB , const MachineOperand & MO ) const { const MCExpr * DestBBSym = MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ; const MCExpr * SrcBBSym = MCSymbolRefExpr :: create ( SrcBB . getSymbol ( ) , Ctx ) ; assert ( SrcBB . front ( ) . getOpcode ( ) == <STR_LIT> && ST . getInstrInfo ( ) -> get ( <STR_LIT> ) . Size == <NUM_LIT> ) ; const MCConstantExpr * One = MCConstantExpr :: create ( <NUM_LIT> , Ctx ) ; SrcBBSym = MCBinaryExpr :: createAdd ( SrcBBSym , One , Ctx ) ; if ( MO . getTargetFlags ( ) == <STR_LIT> ) return MCBinaryExpr :: createSub ( DestBBSym , SrcBBSym , Ctx ) ; assert ( MO . getTargetFlags ( ) == <STR_LIT> ) ; return MCBinaryExpr :: createSub ( SrcBBSym , DestBBSym , Ctx ) ;


<s> case <ISA_LIT>InstrInfo :: MO_GOTPCREL : return MCSymbolRefExpr :: VK_GOTPCREL ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_LO ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_HI ; case <ISA_LIT>InstrInfo :: MO_REL32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_LO ; case <ISA_LIT>InstrInfo :: MO_REL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_HI ;


<s> case <ISA_LIT>InstrInfo :: MO_GOTPCREL : return MCSymbolRefExpr :: VK_GOTPCREL ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_LO ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_HI ; case <ISA_LIT>InstrInfo :: MO_REL32_LO :

return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_LO ;


<s> int MCOpcode = ST . getInstrInfo ( ) -> pseudoToMCOpcode ( MI -> getOpcode ( ) ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ;


<s> if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ; for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) { MCOperand MCOp ;


<s> bool <ISA_LIT>AsmPrinter :: lowerOperand ( const MachineOperand & MO , MCOperand & MCOp ) const { const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ;

return MCInstLowering . lowerOperand ( MO , MCOp ) ;


<s> <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ;


<s> return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , STI ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ; InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ; for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) {

unsigned int CodeDWord = * ( unsigned int * ) & CodeBytes [ i ] ;


<s> if ( emitPseudoExpansionLowering ( * OutStreamer , MI ) ) return ; const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ; StringRef Err ; if ( ! STI . getInstrInfo ( ) -> verifyInstruction ( * MI , Err ) ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( <STR_LIT> + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; }


<s> lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Dest ) ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Src ) ; OutMI . addOperand ( Dest ) ; OutMI . addOperand ( Src ) ; return ; } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; } int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ;

for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) {


<s> if ( CE && CE -> getOpcode ( ) == Instruction :: AddrSpaceCast ) { auto Op = CE -> getOperand ( <NUM_LIT> ) ; auto SrcAddr = Op -> getType ( ) -> getPointerAddressSpace ( ) ; if ( Op -> isNullValue ( ) && AT -> getNullPointerValue ( SrcAddr ) == <NUM_LIT> ) { auto DstAddr = CE -> getType ( ) -> getPointerAddressSpace ( ) ; return MCConstantExpr :: create ( AT -> getNullPointerValue ( DstAddr ) , OutContext ) ; }


<s> return true ; case MachineOperand :: MO_MachineBasicBlock : { if ( MO . getTargetFlags ( ) != <NUM_LIT> ) { MCOp = MCOperand :: createExpr ( getLongBranchBlockExpr ( * MO . getParent ( ) -> getParent ( ) , MO ) ) ; } else { MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; } return true ; } case MachineOperand :: MO_GlobalAddress : { const GlobalValue * GV = MO . getGlobal ( ) ; SmallString < <NUM_LIT> > SymbolName ; AP . getNameWithPrefix ( SymbolName , GV ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( SymbolName ) ; const MCExpr * SymExpr = MCSymbolRefExpr :: create ( Sym , getVariantKind ( MO . getTargetFlags ( ) ) , Ctx ) ; const MCExpr * Expr = MCBinaryExpr :: createAdd ( SymExpr , MCConstantExpr :: create ( MO . getOffset ( ) , Ctx ) , Ctx ) ; MCOp = MCOperand :: createExpr ( Expr ) ; return true ; } case MachineOperand :: MO_ExternalSymbol : { MCSymbol * Sym = Ctx . getOrCreateSymbol ( StringRef ( MO . getSymbolName ( ) ) ) ; Sym -> setExternal ( true ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( Sym , Ctx ) ; MCOp = MCOperand :: createExpr ( Expr ) ; return true ; } case MachineOperand :: MO_RegisterMask : return false ; }


<s> } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , STI ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ;

MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ;


<s> OutMI . addOperand ( Dest ) ; OutMI . addOperand ( Src ) ; return ; } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; } int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ; for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) { MCOperand MCOp ;


<s> const auto * TII = ST . getInstrInfo ( ) ; if ( Opcode == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( Opcode == <STR_LIT> ) { OutMI . setOpcode ( TII -> pseudoToMCOpcode ( <STR_LIT> ) ) ; MCOperand Dest , Src ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Dest ) ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Src ) ; OutMI . addOperand ( Dest ) ; OutMI . addOperand ( Src ) ; return ; } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; }

int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ;


<s> MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , STI ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ; InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ; for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) {


<s> Ctx ( ctx ) , ST ( st ) , AP ( ap ) {


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( MCContext & ctx , const TargetSubtargetInfo & st , const AsmPrinter & ap ) : Ctx ( ctx ) , ST ( st ) , AP ( ap ) {


<s> emitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> isMetaInstruction ( ) ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( ! MI -> isPseudo ( ) && STI . isCPUStringValid ( STI . getCPU ( ) ) && ( ! STI . hasOffset3fBug ( ) || ! MI -> isBranch ( ) ) ) { SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; std :: unique_ptr < MCCodeEmitter > InstEmitter ( create<ISA_LIT>MCCodeEmitter ( * STI . getInstrInfo ( ) , OutContext ) ) ; InstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , STI ) ; assert ( CodeBytes . size ( ) == STI . getInstrInfo ( ) -> getInstSizeInBytes ( * MI ) ) ; } if ( DumpCodeInstEmitter ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , <NUM_LIT> , StringRef ( ) , STI , DisasmStream ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; DumpCodeInstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ; for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) { unsigned int CodeDWord = * ( unsigned int * ) & CodeBytes [ i ] ; HexStream << format ( <STR_LIT> , ( i > <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) , CodeDWord ) ; } DisasmStream . flush ( ) ; DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLine . size ( ) ) ;


<s> switch ( MOFlags ) { default : return MCSymbolRefExpr :: VK_None ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL : return MCSymbolRefExpr :: VK_GOTPCREL ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_LO ; case <ISA_LIT>InstrInfo :: MO_GOTPCREL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_GOTPCREL32_HI ; case <ISA_LIT>InstrInfo :: MO_REL32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_LO ; case <ISA_LIT>InstrInfo :: MO_REL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_HI ; case <ISA_LIT>InstrInfo :: MO_ABS32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_ABS32_LO ;


<s> case <ISA_LIT>InstrInfo :: MO_REL32_HI : return MCSymbolRefExpr :: VK_<ISA_LIT>_REL32_HI ; case <ISA_LIT>InstrInfo :: MO_ABS32_LO : return MCSymbolRefExpr :: VK_<ISA_LIT>_ABS32_LO ; case <ISA_LIT>InstrInfo :: MO_ABS32_HI :

return MCSymbolRefExpr :: VK_<ISA_LIT>_ABS32_HI ;


<s> else if ( Opcode == <STR_LIT> ) { OutMI . setOpcode ( TII -> pseudoToMCOpcode ( <STR_LIT> ) ) ; MCOperand Dest , Src ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Dest ) ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Src ) ; OutMI . addOperand ( Dest ) ; OutMI . addOperand ( Src ) ; return ; } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; } int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) {

LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ;


<s> if ( const MCExpr * E = lowerAddrSpaceCast ( TM , CV , OutContext ) ) return E ;

return AsmPrinter :: lowerConstant ( CV ) ;


<s> const MCExpr * <ISA_LIT>AsmPrinter :: lowerConstant ( const Constant * CV ) { if ( const MCExpr * E = lowerAddrSpaceCast ( TM , CV , OutContext ) ) return E ; return AsmPrinter :: lowerConstant ( CV ) ;


<s> bool <ISA_LIT>AsmPrinter :: lowerOperand ( const MachineOperand & MO , MCOperand & MCOp ) const { const GCNSubtarget & STI = MF -> getSubtarget < GCNSubtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ;


<s> const GCNSubtarget & STI = MF -> getSubtarget < GCNSubtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ;


<s> MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * MF -> getSubtarget ( ) . getInstrInfo ( ) , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , MF -> getSubtarget ( ) ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ;


<s> <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * MF -> getSubtarget ( ) . getInstrInfo ( ) , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , MF -> getSubtarget ( ) ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ; InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ;

std :: string & HexLine = HexLines . back ( ) ;


<s> MCOperand MCOp ; lowerOperand ( MO , MCOp ) ; OutMI . addOperand ( MCOp ) ; }


<s> const MCExpr * <ISA_LIT>AsmPrinter :: lowerConstant ( const Constant * CV ) { if ( const MCExpr * E = lowerAddrSpaceCast ( TM , CV , OutContext ) ) return E ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( MCContext & Ctx , const <ISA_LIT>Subtarget & ST , const AsmPrinter & AP ) : <ISA_LIT>MCInstLower ( Ctx , ST , AP ) {


<s> SrcBBSym = MCBinaryExpr :: createAdd ( SrcBBSym , One , Ctx ) ; if ( MO . getTargetFlags ( ) == <ISA_LIT>InstrInfo :: MO_LONG_BRANCH_FORWARD ) return MCBinaryExpr :: createSub ( DestBBSym , SrcBBSym , Ctx ) ; assert ( MO . getTargetFlags ( ) == <ISA_LIT>InstrInfo :: MO_LONG_BRANCH_BACKWARD ) ; return MCBinaryExpr :: createSub ( SrcBBSym , DestBBSym , Ctx ) ;


<s> case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; return true ; case MachineOperand :: MO_Register : MCOp = MCOperand :: createReg ( <STR_LIT> ( MO . getReg ( ) , ST ) ) ; return true ; case MachineOperand :: MO_MachineBasicBlock : { if ( MO . getTargetFlags ( ) != <NUM_LIT> ) { MCOp = MCOperand :: createExpr ( getLongBranchBlockExpr ( * MO . getParent ( ) -> getParent ( ) , MO ) ) ; } else { MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; } return true ; } case MachineOperand :: MO_GlobalAddress : { const GlobalValue * GV = MO . getGlobal ( ) ; SmallString < <NUM_LIT> > SymbolName ; AP . getNameWithPrefix ( SymbolName , GV ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( SymbolName ) ; const MCExpr * Expr = MCSymbolRefExpr :: create ( Sym , getVariantKind ( MO . getTargetFlags ( ) ) , Ctx ) ; int64_t Offset = MO . getOffset ( ) ; if ( Offset != <NUM_LIT> ) { Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Offset , Ctx ) , Ctx ) ; }

MCOp = MCOperand :: createExpr ( Expr ) ;


<s> MCOp = MCOperand :: createExpr ( getLongBranchBlockExpr ( * MO . getParent ( ) -> getParent ( ) , MO ) ) ; } else { MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; } return true ; } case MachineOperand :: MO_GlobalAddress : { const GlobalValue * GV = MO . getGlobal ( ) ; SmallString < <NUM_LIT> > SymbolName ; AP . getNameWithPrefix ( SymbolName , GV ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( SymbolName ) ; const MCExpr * Expr = MCSymbolRefExpr :: create ( Sym , getVariantKind ( MO . getTargetFlags ( ) ) , Ctx ) ; int64_t Offset = MO . getOffset ( ) ; if ( Offset != <NUM_LIT> ) { Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Offset , Ctx ) , Ctx ) ; } MCOp = MCOperand :: createExpr ( Expr ) ; return true ; } case MachineOperand :: MO_ExternalSymbol : { MCSymbol * Sym = Ctx . getOrCreateSymbol ( StringRef ( MO . getSymbolName ( ) ) ) ; Sym -> setExternal ( true ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( Sym , Ctx ) ; MCOp = MCOperand :: createExpr ( Expr ) ; return true ; } case MachineOperand :: MO_RegisterMask : return false ;


<s> const <ISA_LIT>Subtarget & STI = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ; StringRef Err ; if ( ! STI . getInstrInfo ( ) -> verifyInstruction ( * MI , Err ) ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ;


<s> if ( ! STI . getInstrInfo ( ) -> verifyInstruction ( * MI , Err ) ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; }


<s> } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( ! MI -> isPseudo ( ) && STI . isCPUStringValid ( STI . getCPU ( ) ) && ( ! STI . hasOffset3fBug ( ) || ! MI -> isBranch ( ) ) ) { SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; std :: unique_ptr < MCCodeEmitter > InstEmitter ( create<ISA_LIT>MCCodeEmitter ( * STI . getInstrInfo ( ) , * OutContext . getRegisterInfo ( ) , OutContext ) ) ; InstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , STI ) ; assert ( CodeBytes . size ( ) == STI . getInstrInfo ( ) -> getInstSizeInBytes ( * MI ) ) ; } if ( DumpCodeInstEmitter ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , <NUM_LIT> , StringRef ( ) , STI , DisasmStream ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; DumpCodeInstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ; HexLines . resize ( HexLines . size ( ) + <NUM_LIT> ) ; std :: string & HexLine = HexLines . back ( ) ; raw_string_ostream HexStream ( HexLine ) ; for ( size_t i = <NUM_LIT> ; i < CodeBytes . size ( ) ; i += <NUM_LIT> ) { unsigned int CodeDWord = * ( unsigned int * ) & CodeBytes [ i ] ; HexStream << format ( <STR_LIT> , ( i > <NUM_LIT> ? <STR_LIT> : <STR_LIT> ) , CodeDWord ) ; } DisasmStream . flush ( ) ;

DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLine . size ( ) ) ;


<s> const GCNSubtarget & STI = MF -> getSubtarget < GCNSubtarget > ( ) ; <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ; StringRef Err ; if ( ! STI . getInstrInfo ( ) -> verifyInstruction ( * MI , Err ) ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { emitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) {


<s> } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> isMetaInstruction ( ) ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( ! MI -> isPseudo ( ) && STI . isCPUStringValid ( STI . getCPU ( ) ) && ( ! STI . hasOffset3fBug ( ) || ! MI -> isBranch ( ) ) ) { SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; std :: unique_ptr < MCCodeEmitter > InstEmitter ( create<ISA_LIT>MCCodeEmitter ( * STI . getInstrInfo ( ) , OutContext ) ) ; InstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , STI ) ; assert ( CodeBytes . size ( ) == STI . getInstrInfo ( ) -> getInstSizeInBytes ( * MI ) ) ; } if ( DumpCodeInstEmitter ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , <NUM_LIT> , StringRef ( ) , STI , DisasmStream ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ;


<s> C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { emitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( ! MI -> isPseudo ( ) && STI . isCPUStringValid ( STI . getCPU ( ) ) ) {

SmallVector < MCFixup , <NUM_LIT> > Fixups ;


<s> emitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( ! MI -> isPseudo ( ) && STI . isCPUStringValid ( STI . getCPU ( ) ) ) { SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; std :: unique_ptr < MCCodeEmitter > InstEmitter ( create<ISA_LIT>MCCodeEmitter ( * STI . getInstrInfo ( ) , * OutContext . getRegisterInfo ( ) , OutContext ) ) ; InstEmitter -> encodeInstruction ( TmpInst , CodeStream , Fixups , STI ) ; assert ( CodeBytes . size ( ) == STI . getInstrInfo ( ) -> getInstSizeInBytes ( * MI ) ) ; } if ( DumpCodeInstEmitter ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , <NUM_LIT> , StringRef ( ) , STI , DisasmStream ) ;


<s> <ISA_LIT>MCInstLower MCInstLowering ( OutContext , STI , * this ) ; StringRef Err ; if ( ! STI . getInstrInfo ( ) -> verifyInstruction ( * MI , Err ) ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> + Err ) ; MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * STI . getInstrInfo ( ) , * STI . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , STI ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ; MCCodeEmitter & InstEmitter = ObjStreamer . getAssembler ( ) . getEmitter ( ) ;

InstEmitter . encodeInstruction ( TmpInst , CodeStream , Fixups , MF -> getSubtarget < MCSubtargetInfo > ( ) ) ;


<s> MI -> print ( errs ( ) ) ; } if ( MI -> isBundle ( ) ) { const MachineBasicBlock * MBB = MI -> getParent ( ) ; MachineBasicBlock :: const_instr_iterator I = ++ MI -> getIterator ( ) ; while ( I != MBB -> instr_end ( ) && I -> isInsideBundle ( ) ) { EmitInstruction ( & * I ) ; ++ I ; } } else { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) { SmallVector < char , <NUM_LIT> > BBStr ; raw_svector_ostream Str ( BBStr ) ; const MachineBasicBlock * MBB = MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; const MCSymbolRefExpr * Expr = MCSymbolRefExpr :: create ( MBB -> getSymbol ( ) , OutContext ) ; Expr -> print ( Str , MAI ) ; OutStreamer -> emitRawComment ( Twine ( <STR_LIT> ) + BBStr ) ; } return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( isVerbose ( ) ) OutStreamer -> emitRawComment ( <STR_LIT> ) ; return ; } MCInst TmpInst ; MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ;

raw_string_ostream DisasmStream ( DisasmLine ) ;


<s> unsigned Opcode = MI -> getOpcode ( ) ; if ( Opcode == <STR_LIT> ) Opcode = <STR_LIT> ; int MCOpcode = ST . getInstrInfo ( ) -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ; for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) {


<s> if ( Opcode == <STR_LIT> ) Opcode = <STR_LIT> ; int MCOpcode = ST . getInstrInfo ( ) -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) -> getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; } OutMI . setOpcode ( MCOpcode ) ; for ( const MachineOperand & MO : MI -> explicit_operands ( ) ) { MCOperand MCOp ; lowerOperand ( MO , MCOp ) ;


<s> MCInstLowering . lower ( MI , TmpInst ) ; EmitToStreamer ( * OutStreamer , TmpInst ) ; if ( STI . dumpCode ( ) ) { DisasmLines . resize ( DisasmLines . size ( ) + <NUM_LIT> ) ; std :: string & DisasmLine = DisasmLines . back ( ) ; raw_string_ostream DisasmStream ( DisasmLine ) ; <ISA_LIT>InstPrinter InstPrinter ( * TM . getMCAsmInfo ( ) , * MF -> getSubtarget ( ) . getInstrInfo ( ) , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ; InstPrinter . printInst ( & TmpInst , DisasmStream , StringRef ( ) , MF -> getSubtarget ( ) ) ; SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallVector < char , <NUM_LIT> > CodeBytes ; raw_svector_ostream CodeStream ( CodeBytes ) ; auto & ObjStreamer = static_cast < MCObjectStreamer & > ( * OutStreamer ) ;


<s> const MCConstantExpr * One = MCConstantExpr :: create ( <NUM_LIT> , Ctx ) ; SrcBBSym = MCBinaryExpr :: createAdd ( SrcBBSym , One , Ctx ) ; if ( MO . getTargetFlags ( ) == <STR_LIT> ) return MCBinaryExpr :: createSub ( DestBBSym , SrcBBSym , Ctx ) ; assert ( MO . getTargetFlags ( ) == <STR_LIT> ) ;

return MCBinaryExpr :: createSub ( SrcBBSym , DestBBSym , Ctx ) ;


<s> unsigned Opcode = MI -> getOpcode ( ) ; const auto * TII = static_cast < const <ISA_LIT>InstrInfo * > ( ST . getInstrInfo ( ) ) ; if ( Opcode == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( Opcode == <STR_LIT> ) { OutMI . setOpcode ( TII -> pseudoToMCOpcode ( <STR_LIT> ) ) ; MCOperand Dest , Src ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Dest ) ; lowerOperand ( MI -> getOperand ( <NUM_LIT> ) , Src ) ; OutMI . addOperand ( Dest ) ; OutMI . addOperand ( Src ) ; return ; } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; } int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ;


<s> } else if ( Opcode == <STR_LIT> ) { Opcode = <STR_LIT> ; } int MCOpcode = TII -> pseudoToMCOpcode ( Opcode ) ; if ( MCOpcode == - <NUM_LIT> ) { LLVMContext & C = MI -> getParent ( ) -> getParent ( ) -> getFunction ( ) . getContext ( ) ; C . emitError ( <STR_LIT> <STR_LIT> + Twine ( MI -> getOpcode ( ) ) ) ; }