<s> case ImmTyDppBankMask : OS << <STR_LIT> ; break ; case ImmTyDppBoundCtrl : OS << <STR_LIT> ; break ; case ImmTySdwaDstSel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc0Sel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc1Sel : OS << <STR_LIT> ; break ; case ImmTySdwaDstUnused : OS << <STR_LIT> ; break ; case ImmTyDMask : OS << <STR_LIT> ; break ; case ImmTyDim : OS << <STR_LIT> ; break ; case ImmTyUNorm : OS << <STR_LIT> ; break ; case ImmTyDA : OS << <STR_LIT> ; break ; case ImmTyR128A16 : OS << <STR_LIT> ; break ; case ImmTyLWE : OS << <STR_LIT> ; break ; case ImmTyOff : OS << <STR_LIT> ; break ; case ImmTyExpTgt : OS << <STR_LIT> ; break ; case ImmTyExpCompr : OS << <STR_LIT> ; break ; case ImmTyExpVM : OS << <STR_LIT> ; break ; case ImmTyHwreg : OS << <STR_LIT> ; break ; case ImmTySendMsg : OS << <STR_LIT> ; break ;

case ImmTyInterpSlot : OS << <STR_LIT> ; break ;


<s> for ( MCRegAliasIterator R ( <STR_LIT> , & MRI , true ) ; R . isValid ( ) ; ++ R ) { if ( * R == RegNo ) return hasSGPR104_SGPR105 ( ) ; } switch ( RegNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ! isGFX9 ( ) && ! isGFX10 ( ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ! isCI ( ) && ! is<ISA_LIT> ( ) && ! isGFX10 ( ) && hasXNACK ( ) ;


<s> if ( ! validateLdsDirect ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateSOPLiteral ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateVOP3Literal ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateConstantBusLimitations ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateEarlyClobberLimitations ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateIntClampSupported ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ;


<s> if ( ! validateIntClampSupported ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyClamp<ISA_LIT> , Operands ) , <STR_LIT> ) ; return false ; } if ( ! validateOpSel ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyOpSel , Operands ) , <STR_LIT> ) ; return false ; } if ( ! validateDPP ( Inst , Operands ) ) { return false ; } if ( ! validateMIMGD16 ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyD16 , Operands ) , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDim ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGMSAA ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyDim , Operands ) , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDataSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGAddrSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGAtomicDMask ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyDMask , Operands ) , <STR_LIT> ) ; return false ; } if ( ! validateMIMGGatherDMask ( Inst ) ) { Error ( getImmLoc ( <ISA_LIT>Operand :: ImmTyDMask , Operands ) , <STR_LIT> ) ; return false ; }

if ( ! validateMovrels ( Inst , Operands ) ) {


<s> OptionalIdx [ Op . getImmTy ( ) ] = i ; } if ( IsLdsOpcode && ! HasLdsModifier ) { int NoLdsOpcode = <STR_LIT> ( Inst . getOpcode ( ) ) ; if ( NoLdsOpcode != - <NUM_LIT> ) { Inst . setOpcode ( NoLdsOpcode ) ; IsLdsOpcode = false ; } } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyOffset ) ; if ( ! IsAtomic || IsAtomicReturn ) { addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyGLC ) ; } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySLC ) ; if ( ! IsLdsOpcode ) { addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyTFE ) ;


<s> Val = <NUM_LIT> ; return MatchOperand_Success ; } if ( Str . getAsInteger ( <NUM_LIT> , Val ) ) return MatchOperand_ParseFail ; if ( Val > <NUM_LIT> ) return MatchOperand_ParseFail ; return MatchOperand_Success ; } if ( Str . startswith ( <STR_LIT> ) ) { Str = Str . drop_front ( <NUM_LIT> ) ;


<s> case V_DIV_SCALE_F32_vi : case V_DIV_SCALE_F32_gfx10 : case V_DIV_SCALE_F64_gfx6_gfx7 : case V_DIV_SCALE_F64_vi : case V_DIV_SCALE_F64_gfx10 : break ; } for ( auto Name : { <STR_LIT> :: src0_modifiers , <STR_LIT> :: src2_modifiers , <STR_LIT> :: src2_modifiers } ) { if ( Inst . getOperand ( <STR_LIT> ( Inst . getOpcode ( ) , Name ) ) . getImm ( ) & <STR_LIT> ) {


<s> uint64_t TSFlags = MII . get ( Inst . getOpcode ( ) ) . TSFlags ; if ( ( TSFlags & <STR_LIT> ) == <NUM_LIT> ) return true ; auto Opcode = Inst . getOpcode ( ) ; auto OpNum = <STR_LIT> ( Opcode , <STR_LIT> :: offset ) ; assert ( OpNum != - <NUM_LIT> ) ; const auto & Op = Inst . getOperand ( OpNum ) ; if ( ! hasFlatOffsets ( ) && Op . getImm ( ) != <NUM_LIT> ) { Error ( getFlatOffsetLoc ( Operands ) , <STR_LIT> ) ; return false ; } unsigned OffsetSize = isGFX9 ( ) ? <NUM_LIT> : <NUM_LIT> ; if ( TSFlags & ( <STR_LIT> | <STR_LIT> ) ) { if ( ! isIntN ( OffsetSize , Op . getImm ( ) ) ) { Error ( getFlatOffsetLoc ( Operands ) , isGFX9 ( ) ? <STR_LIT> : <STR_LIT> ) ; return false ; } } else {

if ( ! isUIntN ( OffsetSize - <NUM_LIT> , Op . getImm ( ) ) ) {


<s> return false ; } if ( ! validateConstantBusLimitations ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateEarlyClobberLimitations ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateIntClampSupported ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateOpSel ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGD16 ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDim ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDataSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGAddrSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGAtomicDMask ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGGatherDMask ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMovrels ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateFlatOffset ( Inst , Operands ) ) { return false ; } if ( ! validateSMEMOffset ( Inst , Operands ) ) { return false ; } if ( ! validateMAIAccWrite ( Inst ) ) { return false ; } if ( ! validateDivScale ( Inst ) ) { return false ; } if ( ! validateCoherencyBits ( Inst , Operands , IDLoc ) ) { return false ;


<s> void <ISA_LIT>AsmParser :: cvtVOP3 ( MCInst & Inst , const OperandVector & Operands ) { ( ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ) . addRegOperands ( Inst , <NUM_LIT> ) ; unsigned i = <NUM_LIT> ; std :: map < enum <ISA_LIT>Operand :: ImmTy , unsigned > OptionalIdx ; if ( operandsHaveModifiers ( Operands ) ) { for ( unsigned e = Operands . size ( ) ; i != e ; ++ i ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ; if ( Op . isRegWithInputMods ( ) ) { ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) . addRegWithInputModsOperands ( Inst , <NUM_LIT> ) ; continue ; } OptionalIdx [ Op . getImmTy ( ) ] = i ; } unsigned ClampIdx = OptionalIdx [ <ISA_LIT>Operand :: ImmTyClamp ] ; unsigned OModIdx = OptionalIdx [ <ISA_LIT>Operand :: ImmTyOMod ] ;

( ( <ISA_LIT>Operand & ) * Operands [ ClampIdx ] ) . addImmOperands ( Inst , <NUM_LIT> ) ;


<s> return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) { if ( isForcedVOP3 ( ) ) { <ISA_LIT>Operand & LastOp = ( ( <ISA_LIT>Operand & ) * Operands [ Operands . size ( ) - <NUM_LIT> ] ) ; if ( LastOp . isRegKind ( ) || ( LastOp . isImm ( ) && LastOp . getImmTy ( ) != <ISA_LIT>Operand :: ImmTyNone ) ) {

SMLoc S = Parser . getTok ( ) . getLoc ( ) ;


<s> if ( IDVal == <STR_LIT> ) return ParseDirectiveHSACodeObjectISA ( ) ; if ( IDVal == <STR_LIT> ) return ParseDirectiveAMDKernelCodeT ( ) ; return true ;


<s> if ( IDVal == <STR_LIT> ) return ParseDirectiveHSACodeObjectVersion ( ) ; if ( IDVal == <STR_LIT> ) return ParseDirectiveHSACodeObjectISA ( ) ;

if ( IDVal == <STR_LIT> ) return ParseDirectiveAMDKernelCodeT ( ) ;


<s> unsigned RegIndexInClass ; if ( RegName . size ( ) > <NUM_LIT> ) { RegWidth = <NUM_LIT> ; if ( RegName . substr ( <NUM_LIT> ) . getAsInteger ( <NUM_LIT> , RegIndexInClass ) ) return true ; Parser . Lex ( ) ; } else { int64_t RegLo , RegHi ; Parser . Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: LBrac ) ) return true ; Parser . Lex ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( RegLo ) ) return true ; if ( getLexer ( ) . isNot ( AsmToken :: Colon ) ) return true ; Parser . Lex ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( RegHi ) ) return true ; if ( getLexer ( ) . isNot ( AsmToken :: RBrac ) ) return true ; Parser . Lex ( ) ; RegWidth = ( RegHi - RegLo ) + <NUM_LIT> ; if ( IsVgpr ) { RegIndexInClass = RegLo ; } else { RegIndexInClass = RegLo / std :: min ( RegWidth , <NUM_LIT> ) ; }


<s> bool <ISA_LIT>AsmParser :: ParseRegister ( unsigned & RegNo , SMLoc & StartLoc , SMLoc & EndLoc ) { const AsmToken Tok = Parser . getTok ( ) ; StartLoc = Tok . getLoc ( ) ; EndLoc = Tok . getEndLoc ( ) ; const StringRef & RegName = Tok . getString ( ) ; RegNo = getRegForName ( RegName ) ; if ( RegNo ) { Parser . Lex ( ) ; return false ; } if ( RegName [ <NUM_LIT> ] != 's' && RegName [ <NUM_LIT> ] != 'v' ) return true ; bool IsVgpr = RegName [ <NUM_LIT> ] == 'v' ; unsigned RegWidth ; unsigned RegIndexInClass ; if ( RegName . size ( ) > <NUM_LIT> ) { RegWidth = <NUM_LIT> ; if ( RegName . substr ( <NUM_LIT> ) . getAsInteger ( <NUM_LIT> , RegIndexInClass ) ) return true ; Parser . Lex ( ) ; } else { int64_t RegLo , RegHi ; Parser . Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: LBrac ) ) return true ;


<s> void print ( raw_ostream & OS ) const override {


<s> default : llvm_unreachable ( <STR_LIT> ) ; } return ; } switch ( OpSize ) { case <NUM_LIT> : { if ( isInt < <NUM_LIT> > ( Val ) && <STR_LIT> ( static_cast < int32_t > ( Val ) , AsmParser -> hasInv2PiInlineImm ( ) ) ) { Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return ; } Inst . addOperand ( MCOperand :: createImm ( Val & <NUM_LIT> ) ) ; return ; } case <NUM_LIT> : { if ( <STR_LIT> ( Val , AsmParser -> hasInv2PiInlineImm ( ) ) ) { Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return ; } Inst . addOperand ( MCOperand :: createImm ( Lo_32 ( Val ) ) ) ; return ; } case <NUM_LIT> : {

if ( isInt < <NUM_LIT> > ( Val ) && <STR_LIT> ( static_cast < int16_t > ( Val ) , AsmParser -> hasInv2PiInlineImm ( ) ) ) {


<s> if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) {


<s> } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } if ( Reg == <STR_LIT> && Reg1 == <STR_LIT> ) { Reg = <STR_LIT> ; RegWidth = <NUM_LIT> ; return true ; } return false ; case IS_VGPR :


<s> <ISA_LIT>AsmParser ( const MCSubtargetInfo & STI , MCAsmParser & _Parser , const MCInstrInfo & MII , const MCTargetOptions & Options ) : MCTargetAsmParser ( Options , STI ) , MII ( MII ) , Parser ( _Parser ) , ForcedEncodingSize ( <NUM_LIT> ) , ForcedDPP ( false ) , ForcedSDWA ( false ) { MCAsmParserExtension :: Initialize ( Parser ) ; if ( getSTI ( ) . getFeatureBits ( ) . none ( ) ) { copySTI ( ) . ToggleFeature ( <STR_LIT> ) ; }

setAvailableFeatures ( ComputeAvailableFeatures ( getSTI ( ) . getFeatureBits ( ) ) ) ;


<s> copySTI ( ) . ToggleFeature ( <STR_LIT> ) ; } setAvailableFeatures ( ComputeAvailableFeatures ( getSTI ( ) . getFeatureBits ( ) ) ) ; { <STR_LIT> Isa = <STR_LIT> ( getSTI ( ) . getFeatureBits ( ) ) ; MCContext & Ctx = getContext ( ) ; MCSymbol * Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( Isa . Major , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( Isa . Minor , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( Isa . Stepping , Ctx ) ) ;


<s> } else if ( isRegOrImmWithInputMods ( Desc , Inst . getNumOperands ( ) ) ) { Op . addRegWithInputModsOperands ( Inst , <NUM_LIT> ) ; } else if ( Op . isImm ( ) ) { OptionalIdx [ Op . getImmTy ( ) ] = I ; } else { llvm_unreachable ( <STR_LIT> ) ; } } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyClamp<ISA_LIT> , <NUM_LIT> ) ; if ( Inst . getOpcode ( ) != <STR_LIT> ) { switch ( BasicInstType ) { case <STR_LIT> : addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstSel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstUnused , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc0Sel , <NUM_LIT> ) ; break ; case <STR_LIT> : addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstSel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstUnused , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc0Sel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc1Sel , <NUM_LIT> ) ;


<s> APFloat FPLiteral ( APFloat :: IEEEdouble ( ) , APInt ( <NUM_LIT> , Imm . Val ) ) ; if ( ! canLosslesslyConvertToFPType ( FPLiteral , type ) ) return false ; return <STR_LIT> ( static_cast < int32_t > ( FPLiteral . bitcastToAPInt ( ) . getZExtValue ( ) ) , AsmParser -> hasInv2PiInlineImm ( ) ) ; } if ( type == <STR_LIT> || type == <STR_LIT> ) { return <STR_LIT> ( Imm . Val , AsmParser -> hasInv2PiInlineImm ( ) ) ; } if ( type . getScalarSizeInBits ( ) == <NUM_LIT> ) {

return <STR_LIT> ( static_cast < int16_t > ( Literal . getLoBits ( <NUM_LIT> ) . getSExtValue ( ) ) , AsmParser -> hasInv2PiInlineImm ( ) ) ;


<s> KernelScopeInfo ( ) : SgprIndexUnusedMin ( - <NUM_LIT> ) , VgprIndexUnusedMin ( - <NUM_LIT> ) , Ctx ( nullptr ) {


<s> if ( i >= VgprIndexUnusedMin ) { VgprIndexUnusedMin = ++ i ; if ( Ctx ) { MCSymbol * const Sym = Ctx -> getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( VgprIndexUnusedMin , * Ctx ) ) ; } }


<s> MCRegister DstReg = Inst . getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( Src2Reg == DstReg ) return true ; const MCRegisterInfo * TRI = getContext ( ) . getRegisterInfo ( ) ; if ( TRI -> getRegClass ( Desc . OpInfo [ <NUM_LIT> ] . RegClass ) . getSizeInBits ( ) <= <NUM_LIT> ) return true ; if ( isRegIntersect ( Src2Reg , DstReg , TRI ) ) { Error ( getRegLoc ( mc2PseudoReg ( Src2Reg ) , Operands ) , <STR_LIT> ) ;


<s> unsigned I = <NUM_LIT> ; const MCInstrDesc & Desc = MII . get ( Inst . getOpcode ( ) ) ; for ( unsigned J = <NUM_LIT> ; J < Desc . getNumDefs ( ) ; ++ J ) { ( ( <ISA_LIT>Operand & ) * Operands [ I ++ ] ) . addRegOperands ( Inst , <NUM_LIT> ) ; } for ( unsigned E = Operands . size ( ) ; I != E ; ++ I ) {

<ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ I ] ) ;


<s> switch ( RegNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ! isGFX9 ( ) ; default : break ; } if ( isCI ( ) ) return true ; if ( is<ISA_LIT> ( ) ) { switch ( RegNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return false ; default : return true ; } } for ( MCRegAliasIterator R ( <STR_LIT> , & MRI , true ) ; R . isValid ( ) ; ++ R ) {


<s> return ; } if ( <STR_LIT> ( InstDesc , OpNum ) ) { if ( Literal . getLoBits ( <NUM_LIT> ) != <NUM_LIT> ) { const_cast < <ISA_LIT>AsmParser * > ( AsmParser ) -> Warning ( Inst . getLoc ( ) , <STR_LIT> <STR_LIT> ) ; } Inst . addOperand ( MCOperand :: createImm ( Literal . lshr ( <NUM_LIT> ) . getZExtValue ( ) ) ) ; return ; } llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : { bool lost ; APFloat FPLiteral ( APFloat :: IEEEdouble ( ) , Literal ) ; FPLiteral . convert ( * getOpFltSemantics ( OpTy ) , APFloat :: rmNearestTiesToEven , & lost ) ; uint64_t ImmVal = FPLiteral . bitcastToAPInt ( ) . getZExtValue ( ) ; Inst . addOperand ( MCOperand :: createImm ( ImmVal ) ) ; return ; } default : llvm_unreachable ( <STR_LIT> ) ; } return ; } switch ( OpTy ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( isSafeTruncation ( Val , <NUM_LIT> ) && <STR_LIT> ( static_cast < int32_t > ( Val ) , AsmParser -> hasInv2PiInlineImm ( ) ) ) { Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return ; } Inst . addOperand ( MCOperand :: createImm ( Val & <NUM_LIT> ) ) ; return ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( <STR_LIT> ( Val , AsmParser -> hasInv2PiInlineImm ( ) ) ) { Inst . addOperand ( MCOperand :: createImm ( Val ) ) ; return ; } Inst . addOperand ( MCOperand :: createImm ( Lo_32 ( Val ) ) ) ; return ;


<s> setAvailableFeatures ( ComputeAvailableFeatures ( getFeatureBits ( ) ) ) ; { <STR_LIT> ISA = <STR_LIT> ( getSTI ( ) . getCPU ( ) ) ; MCContext & Ctx = getContext ( ) ; if ( ISA . Major >= <NUM_LIT> && <STR_LIT> :: hasCodeObjectV3 ( & getSTI ( ) ) ) { MCSymbol * Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Major , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Minor , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Stepping , Ctx ) ) ; } else { MCSymbol * Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Major , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Minor , Ctx ) ) ; Sym = Ctx . getOrCreateSymbol ( Twine ( <STR_LIT> ) ) ; Sym -> setVariableValue ( MCConstantExpr :: create ( ISA . Stepping , Ctx ) ) ; }


<s> Op . addRegOperands ( Inst , <NUM_LIT> ) ; if ( IsAtomicReturn && i == FirstOperandIdx ) Op . addRegOperands ( Inst , <NUM_LIT> ) ; continue ; } if ( Op . isImm ( ) && Op . getImmTy ( ) == <ISA_LIT>Operand :: ImmTyNone ) { Op . addImmOperands ( Inst , <NUM_LIT> ) ; continue ; } HasLdsModifier = Op . isLDS ( ) ; if ( Op . isToken ( ) ) { continue ; } assert ( Op . isImm ( ) ) ; OptionalIdx [ Op . getImmTy ( ) ] = i ; } if ( IsLdsOpcode && ! HasLdsModifier ) {

int NoLdsOpcode = <STR_LIT> ( Inst . getOpcode ( ) ) ;


<s> bool IsLdsOpcode = IsLds ; bool HasLdsModifier = false ; OptionalImmIndexMap OptionalIdx ; assert ( IsAtomicReturn ? IsAtomic : true ) ; unsigned FirstOperandIdx = <NUM_LIT> ; for ( unsigned i = FirstOperandIdx , e = Operands . size ( ) ; i != e ; ++ i ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ; if ( Op . isReg ( ) ) { Op . addRegOperands ( Inst , <NUM_LIT> ) ; if ( IsAtomicReturn && i == FirstOperandIdx ) Op . addRegOperands ( Inst , <NUM_LIT> ) ; continue ; } if ( Op . isImm ( ) && Op . getImmTy ( ) == <ISA_LIT>Operand :: ImmTyNone ) { Op . addImmOperands ( Inst , <NUM_LIT> ) ; continue ; } HasLdsModifier = Op . isLDS ( ) ;


<s> static unsigned getSpecialRegForName ( StringRef RegName ) { return StringSwitch < unsigned > ( RegName ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Default ( <NUM_LIT> ) ;


<s> return StringSwitch < unsigned > ( RegName ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Default ( <NUM_LIT> ) ;


<s> if ( Size == <NUM_LIT> ) Size = <NUM_LIT> ; return isSafeTruncation ( Imm . Val , Size ) ; } if ( type == <STR_LIT> ) { return true ; } if ( type == <STR_LIT> ) { return false ; } APFloat FPLiteral ( APFloat :: IEEEdouble ( ) , APInt ( <NUM_LIT> , Imm . Val ) ) ; return canLosslesslyConvertToFPType ( FPLiteral , type ) ;


<s> bool isRegOrImmWithInputMods ( unsigned RCID , MVT type ) const { return isRegClass ( RCID ) || isInlinableImm ( type ) ;


<s> bool isRegOrImmWithInputMods ( unsigned RCID , MVT type ) const {

return isRegClass ( RCID ) || isInlinableImm ( type ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> switch ( Opcode ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> bool <ISA_LIT>Operand :: isSDWAOperand ( MVT type ) const { if ( AsmParser -> isVI ( ) ) return isVReg32 ( ) ;

else if ( AsmParser -> isGFX9 ( ) ) return isRegClass ( <STR_LIT> ) || isInlinableImm ( type ) ;


<s> bool <ISA_LIT>Operand :: isSDWAOperand ( MVT type ) const {

if ( AsmParser -> isVI ( ) ) return isVReg32 ( ) ;


<s> case ImmTyOffen : OS << <STR_LIT> ; break ; case ImmTyIdxen : OS << <STR_LIT> ; break ; case ImmTyAddr64 : OS << <STR_LIT> ; break ; case ImmTyOffset : OS << <STR_LIT> ; break ; case ImmTyInstOffset : OS << <STR_LIT> ; break ; case ImmTyOffset0 : OS << <STR_LIT> ; break ; case ImmTyOffset1 : OS << <STR_LIT> ; break ; case ImmTyGLC : OS << <STR_LIT> ; break ; case ImmTySLC : OS << <STR_LIT> ; break ; case ImmTyTFE : OS << <STR_LIT> ; break ; case ImmTyD16 : OS << <STR_LIT> ; break ; case ImmTyFORMAT : OS << <STR_LIT> ; break ; case ImmTyClamp<ISA_LIT> : OS << <STR_LIT> ; break ; case ImmTyOMod<ISA_LIT> : OS << <STR_LIT> ; break ; case ImmTyDppCtrl : OS << <STR_LIT> ; break ; case ImmTyDppRowMask : OS << <STR_LIT> ; break ; case ImmTyDppBankMask : OS << <STR_LIT> ; break ; case ImmTyDppBoundCtrl : OS << <STR_LIT> ; break ; case ImmTySdwaDstSel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc0Sel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc1Sel : OS << <STR_LIT> ; break ; case ImmTySdwaDstUnused : OS << <STR_LIT> ; break ; case ImmTyDMask : OS << <STR_LIT> ; break ; case ImmTyUNorm : OS << <STR_LIT> ; break ; case ImmTyDA : OS << <STR_LIT> ; break ; case ImmTyR128A16 : OS << <STR_LIT> ; break ; case ImmTyLWE : OS << <STR_LIT> ; break ; case ImmTyOff : OS << <STR_LIT> ; break ; case ImmTyExpTgt : OS << <STR_LIT> ; break ; case ImmTyExpCompr : OS << <STR_LIT> ; break ;

case ImmTyExpVM : OS << <STR_LIT> ; break ;


<s> case ImmTyGLC : OS << <STR_LIT> ; break ; case ImmTySLC : OS << <STR_LIT> ; break ; case ImmTyTFE : OS << <STR_LIT> ; break ; case ImmTyD16 : OS << <STR_LIT> ; break ; case ImmTyFORMAT : OS << <STR_LIT> ; break ; case ImmTyClamp<ISA_LIT> : OS << <STR_LIT> ; break ; case ImmTyOMod<ISA_LIT> : OS << <STR_LIT> ; break ; case ImmTyDppCtrl : OS << <STR_LIT> ; break ; case ImmTyDppRowMask : OS << <STR_LIT> ; break ; case ImmTyDppBankMask : OS << <STR_LIT> ; break ; case ImmTyDppBoundCtrl : OS << <STR_LIT> ; break ; case ImmTySdwaDstSel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc0Sel : OS << <STR_LIT> ; break ; case ImmTySdwaSrc1Sel : OS << <STR_LIT> ; break ; case ImmTySdwaDstUnused : OS << <STR_LIT> ; break ; case ImmTyDMask : OS << <STR_LIT> ; break ; case ImmTyUNorm : OS << <STR_LIT> ; break ; case ImmTyDA : OS << <STR_LIT> ; break ;

case ImmTyR128A16 : OS << <STR_LIT> ; break ;


<s> } switch ( RegNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ! isGFX9 ( ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return ! isCI ( ) && ! is<ISA_LIT> ( ) && hasXNACK ( ) ; default : break ; } if ( isInlineValue ( RegNo ) ) return ! isCI ( ) && ! is<ISA_LIT> ( ) && ! isVI ( ) ; if ( isCI ( ) ) return true ; if ( is<ISA_LIT> ( ) ) { switch ( RegNo ) {


<s> if ( isInlineValue ( RegNo ) ) return ! isCI ( ) && ! is<ISA_LIT> ( ) && ! isVI ( ) ; if ( isCI ( ) ) return true ; if ( is<ISA_LIT> ( ) ) { switch ( RegNo ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return false ; default : return true ; } } for ( MCRegAliasIterator R ( <STR_LIT> , & MRI , true ) ;


<s> for ( unsigned E = Operands . size ( ) ; I != E ; ++ I ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ I ] ) ; if ( Op . isRegOrImmWithInputMods ( ) ) { Op . addRegOrImmWithInputModsOperands ( Inst , <NUM_LIT> ) ; } else if ( Op . isImm ( ) ) { OptionalIdx [ Op . getImmTy ( ) ] = I ; } else { llvm_unreachable ( <STR_LIT> ) ; } } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyClamp<ISA_LIT> , <NUM_LIT> ) ; if ( Inst . getOpcode ( ) == <STR_LIT> ) { return ; } if ( IsVOP1 ) { addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstSel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstUnused , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc0Sel , <NUM_LIT> ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; } } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyClamp<ISA_LIT> , <NUM_LIT> ) ; if ( Inst . getOpcode ( ) == <STR_LIT> ) { return ; } if ( IsVOP1 ) { addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstSel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstUnused , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc0Sel , <NUM_LIT> ) ; } else { addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstSel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaDstUnused , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc0Sel , <NUM_LIT> ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySdwaSrc1Sel , <NUM_LIT> ) ;


<s> void <ISA_LIT>AsmParser :: cvtSdwaVOP1 ( MCInst & Inst , const OperandVector & Operands ) { cvtSDWA ( Inst , Operands , true ) ;


<s> cvtSDWA ( Inst , Operands , true ) ;


<s> cvtSDWA ( Inst , Operands , false ) ;


<s> <ISA_LIT>Operand :: Ptr <ISA_LIT>AsmParser :: defaultSDWADstSel ( ) const { return defaultSDWASel ( <ISA_LIT>Operand :: ImmTySdwaDstSel ) ;


<s> <ISA_LIT>Operand :: Ptr <ISA_LIT>AsmParser :: defaultSDWASel ( <ISA_LIT>Operand :: ImmTy Type ) const {

return <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , SMLoc ( ) , Type ) ;


<s> return defaultSDWASel ( <ISA_LIT>Operand :: ImmTySdwaSrc0Sel ) ;


<s> <ISA_LIT>Operand :: Ptr <ISA_LIT>AsmParser :: defaultSDWASrc1Sel ( ) const {

return defaultSDWASel ( <ISA_LIT>Operand :: ImmTySdwaSrc1Sel ) ;


<s> if ( Res != MatchOperand_Success ) { return Res ; } <ISA_LIT>Operand & Op = static_cast < <ISA_LIT>Operand & > ( * Operands . back ( ) ) ; if ( Op . isImm ( ) && Op . Imm . IsFPImm ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } <ISA_LIT>Operand :: Modifiers Mods = { false , false , false } ; if ( Sext ) { if ( getLexer ( ) . isNot ( AsmToken :: RParen ) ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } Parser . Lex ( ) ; Mods . Sext = true ; } if ( Mods . hasIntModifiers ( ) ) { Op . setModifiers ( Mods ) ; }


<s> Sext = true ; if ( getLexer ( ) . isNot ( AsmToken :: LParen ) ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } Parser . Lex ( ) ; } auto Res = parseRegOrImm ( Operands ) ; if ( Res != MatchOperand_Success ) { return Res ; } <ISA_LIT>Operand & Op = static_cast < <ISA_LIT>Operand & > ( * Operands . back ( ) ) ;

if ( Op . isImm ( ) && Op . Imm . IsFPImm ) {


<s> case MCK_addr64 : return Operand . isAddr64 ( ) ? Match_Success : Match_InvalidOperand ; case MCK_gds : return Operand . isGDS ( ) ? Match_Success : Match_InvalidOperand ; case MCK_glc : return Operand . isGLC ( ) ? Match_Success : Match_InvalidOperand ; case MCK_idxen : return Operand . isIdxen ( ) ? Match_Success : Match_InvalidOperand ; case MCK_offen : return Operand . isOffen ( ) ? Match_Success : Match_InvalidOperand ; case MCK_SSrc32 : return Operand . isSSrc32 ( ) ? Match_Success : Match_InvalidOperand ; default : return Match_InvalidOperand ; }


<s> return false ; } if ( ! validateIntClampSupported ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateOpSel ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGD16 ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDim ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGDataSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ; } if ( ! validateMIMGAddrSize ( Inst ) ) { Error ( IDLoc , <STR_LIT> ) ; return false ;


<s> if ( isToken ( AsmToken :: Integer ) ) { SMLoc Loc = getToken ( ) . getEndLoc ( ) ; Token = std :: string ( getTokenStr ( ) ) ; Parser . Lex ( ) ; if ( getLoc ( ) != Loc ) return MatchOperand_ParseFail ; } if ( ! isToken ( AsmToken :: Identifier ) ) return MatchOperand_ParseFail ; Token += getTokenStr ( ) ; StringRef DimId = Token ; if ( DimId . startswith ( <STR_LIT> ) ) DimId = DimId . substr ( <NUM_LIT> ) ; const <STR_LIT> * DimInfo = <STR_LIT> ( DimId ) ;

if ( ! DimInfo ) return MatchOperand_ParseFail ;


<s> if ( ! isGFX10Plus ( ) ) return MatchOperand_NoMatch ; SMLoc S = getLoc ( ) ; if ( ! trySkipId ( <STR_LIT> , AsmToken :: Colon ) ) return MatchOperand_NoMatch ; std :: string Token ; if ( isToken ( AsmToken :: Integer ) ) { SMLoc Loc = getToken ( ) . getEndLoc ( ) ; Token = std :: string ( getTokenStr ( ) ) ; Parser . Lex ( ) ; if ( getLoc ( ) != Loc ) return MatchOperand_ParseFail ; } if ( ! isToken ( AsmToken :: Identifier ) ) return MatchOperand_ParseFail ; Token += getTokenStr ( ) ;


<s> int64_t Sels [ <NUM_LIT> ] ; if ( ! trySkipToken ( AsmToken :: LBrac ) ) return MatchOperand_ParseFail ; if ( getParser ( ) . parseAbsoluteExpression ( Sels [ <NUM_LIT> ] ) ) return MatchOperand_ParseFail ; if ( <NUM_LIT> > Sels [ <NUM_LIT> ] || <NUM_LIT> < Sels [ <NUM_LIT> ] ) return MatchOperand_ParseFail ; for ( size_t i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( ! trySkipToken ( AsmToken :: Comma ) ) return MatchOperand_ParseFail ; if ( getParser ( ) . parseAbsoluteExpression ( Sels [ i ] ) ) return MatchOperand_ParseFail ; if ( <NUM_LIT> > Sels [ i ] || <NUM_LIT> < Sels [ i ] ) return MatchOperand_ParseFail ; } if ( ! trySkipToken ( AsmToken :: RBrac ) ) return MatchOperand_ParseFail ; unsigned DPP8 = <NUM_LIT> ;

for ( size_t i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) DPP8 |= ( Sels [ i ] << ( i * <NUM_LIT> ) ) ;


<s> SMLoc S = getLoc ( ) ; if ( ! parseId ( Str ) ) return MatchOperand_NoMatch ; uint8_t Val ; auto Res = parseExpTgtImpl ( Str , Val ) ;


<s> uint8_t Val ; auto Res = parseExpTgtImpl ( Str , Val ) ; if ( Res != MatchOperand_Success ) {


<s> checkUnsupportedInstruction ( Name , NameLoc ) ; if ( ! Parser . hasPendingError ( ) ) { StringRef Msg = ( Res == MatchOperand_ParseFail ) ? <STR_LIT> : <STR_LIT> ; Error ( getLoc ( ) , Msg ) ; } while ( ! trySkipToken ( AsmToken :: EndOfStatement ) ) {


<s> } int64_t Int ; Int = StringSwitch < int64_t > ( Value ) . Case ( <STR_LIT> , DstUnused :: UNUSED_PAD ) . Case ( <STR_LIT> , DstUnused :: UNUSED_SEXT ) . Case ( <STR_LIT> , DstUnused :: UNUSED_PRESERVE ) . Default ( <NUM_LIT> ) ; if ( Int == <NUM_LIT> ) { return MatchOperand_ParseFail ; }

Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( this , Int , S , <ISA_LIT>Operand :: ImmTySdwaDstUnused ) ) ;


<s> SMLoc S = getLoc ( ) ; StringRef Value ; OperandMatchResultTy res ; res = parseStringWithPrefix ( Prefix , Value ) ; if ( res != MatchOperand_Success ) { return res ; } int64_t Int ; Int = StringSwitch < int64_t > ( Value ) . Case ( <STR_LIT> , SdwaSel :: BYTE_0 ) . Case ( <STR_LIT> , SdwaSel :: BYTE_1 ) . Case ( <STR_LIT> , SdwaSel :: BYTE_2 ) . Case ( <STR_LIT> , SdwaSel :: BYTE_3 ) . Case ( <STR_LIT> , SdwaSel :: WORD_0 ) . Case ( <STR_LIT> , SdwaSel :: WORD_1 ) . Case ( <STR_LIT> , SdwaSel :: DWORD ) . Default ( <NUM_LIT> ) ;


<s> if ( ! trySkipId ( Prefix , AsmToken :: Colon ) ) return MatchOperand_NoMatch ;

return parseId ( Value ) ? MatchOperand_Success : MatchOperand_ParseFail ;


<s> OperandMatchResultTy <ISA_LIT>AsmParser :: parseImm ( OperandVector & Operands , bool HasSP3AbsModifier ) { assert ( ! isRegister ( ) ) ; assert ( ! isModifier ( ) ) ; const auto & Tok = getToken ( ) ; const auto & NextTok = peekToken ( ) ; bool IsReal = Tok . is ( AsmToken :: Real ) ; SMLoc S = getLoc ( ) ; bool Negate = false ; if ( ! IsReal && Tok . is ( AsmToken :: Minus ) && NextTok . is ( AsmToken :: Real ) ) { lex ( ) ; IsReal = true ; Negate = true ; } if ( IsReal ) { StringRef Num = getTokenStr ( ) ; lex ( ) ; APFloat RealVal ( APFloat :: IEEEdouble ( ) ) ; auto roundMode = APFloat :: rmNearestTiesToEven ; if ( ! RealVal . convertFromString ( Num , roundMode ) ) { return MatchOperand_ParseFail ; } if ( Negate ) RealVal . changeSign ( ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( this , RealVal . bitcastToAPInt ( ) . getZExtValue ( ) , S , <ISA_LIT>Operand :: ImmTyNone , true ) ) ; return MatchOperand_Success ; } else { int64_t IntVal ; const MCExpr * Expr ;


<s> static unsigned getSpecialRegForName ( StringRef RegName ) { return StringSwitch < unsigned > ( RegName ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Default ( <NUM_LIT> ) ;


<s> } if ( Src0Idx == - <NUM_LIT> ) return true ; const MCOperand & Src = Inst . getOperand ( Src0Idx ) ; if ( ! Src . isReg ( ) || Src . getReg ( ) != LDS_DIRECT ) return true ; if ( <STR_LIT> ( getMRI ( ) , Desc , Src0Idx ) != <NUM_LIT> ) return false ; if ( Desc . TSFlags & <STR_LIT> ) return false ; switch ( Opcode ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> return <ISA_LIT>Operand :: CreateImm ( this , <NUM_LIT> , SMLoc ( ) , <ISA_LIT>Operand :: ImmTyD16 ) ;


<s> void addRegOrImmWithInputModsOperands ( MCInst & Inst , unsigned N ) const { if ( isRegKind ( ) ) { Inst . addOperand ( MCOperand :: createImm ( Reg . Modifiers ) ) ;


<s> Inst . addOperand ( MCOperand :: createImm ( Reg . Modifiers ) ) ;


<s> Op -> Imm . IsFPImm = IsFPImm ; Op -> Imm . Type = Type ; Op -> Imm . Modifiers = <NUM_LIT> ; Op -> StartLoc = Loc ;


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateReg ( unsigned RegNo , SMLoc S , SMLoc E , const MCRegisterInfo * TRI , const MCSubtargetInfo * STI , bool ForceVOP3 ) { auto Op = llvm :: make_unique < <ISA_LIT>Operand > ( Register ) ; Op -> Reg . RegNo = RegNo ; Op -> Reg . TRI = TRI ; Op -> Reg . STI = STI ; Op -> Reg . Modifiers = <NUM_LIT> ; Op -> Reg . IsForcedVOP3 = ForceVOP3 ; Op -> StartLoc = S ; Op -> EndLoc = E ;


<s> OptionalImmIndexMap OptionalIdx ; unsigned I = <NUM_LIT> ; const MCInstrDesc & Desc = MII . get ( Inst . getOpcode ( ) ) ; for ( unsigned J = <NUM_LIT> ; J < Desc . getNumDefs ( ) ; ++ J ) { ( ( <ISA_LIT>Operand & ) * Operands [ I ++ ] ) . addRegOperands ( Inst , <NUM_LIT> ) ; } for ( unsigned E = Operands . size ( ) ; I != E ; ++ I ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ I ] ) ; if ( ! HasMods && Op . isReg ( ) ) { Op . addRegOperands ( Inst , <NUM_LIT> ) ; } else if ( HasMods && Op . isRegOrImmWithInputMods ( ) ) { Op . addRegOrImmWithInputModsOperands ( Inst , <NUM_LIT> ) ; } else if ( Op . isDPPCtrl ( ) ) { Op . addImmOperands ( Inst , <NUM_LIT> ) ; } else if ( Op . isImm ( ) ) { OptionalIdx [ Op . getImmTy ( ) ] = I ; } else {


<s> void <ISA_LIT>AsmParser :: cvtDPP_nomod ( MCInst & Inst , const OperandVector & Operands ) {


<s> if ( Op . isReg ( ) ) { Op . addRegOperands ( Inst , <NUM_LIT> ) ; continue ; } OptionalIdx [ Op . getImmTy ( ) ] = i ; }

addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyGLC ) ;


<s> OptionalImmIndexMap OptionalIdx ; for ( unsigned i = <NUM_LIT> , e = Operands . size ( ) ; i != e ; ++ i ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ;


<s> OptionalIdx [ Op . getImmTy ( ) ] = i ; } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySLC ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyTFE ) ;


<s> <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ; if ( Op . isReg ( ) ) { Op . addRegOperands ( Inst , <NUM_LIT> ) ; continue ; } if ( Op . isImm ( ) && Op . getImmTy ( ) == <ISA_LIT>Operand :: ImmTyNone ) { Op . addImmOperands ( Inst , <NUM_LIT> ) ; continue ; } if ( Op . isToken ( ) ) { continue ; } assert ( Op . isImm ( ) ) ; OptionalIdx [ Op . getImmTy ( ) ] = i ; } addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyOffset ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyGLC ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTySLC ) ; addOptionalImmOperand ( Inst , Operands , OptionalIdx , <ISA_LIT>Operand :: ImmTyTFE ) ;


<s> for ( unsigned E = Operands . size ( ) ; I != E ; ++ I ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ I ] ) ; if ( Op . isRegOrImmWithInputMods ( ) ) { Op . addRegOrImmWithInputModsOperands ( Inst , <NUM_LIT> ) ; } else if ( Op . isImm ( ) ) { OptionalIdx [ Op . getImmTy ( ) ] = I ; } else { assert ( false ) ;


<s> cvtVOP3 ( Inst , Operands ) ; } else {


<s> if ( operandsHaveModifiers ( Operands ) ) { cvtVOP3 ( Inst , Operands ) ; } else { cvtId ( Inst , Operands ) ;


<s> void <ISA_LIT>AsmParser :: cvtVOP3_only ( MCInst & Inst , const OperandVector & Operands ) { cvtVOP3 ( Inst , Operands ) ;


<s> bool defaultTokenHasSuffix ( ) const {

StringRef Token ( Tok . Data , Tok . Length ) ;


<s> bool isClamp ( ) const { return isImmTy ( ImmTyClamp ) ;


<s> bool isOMod ( ) const { return isImmTy ( ImmTyOMod ) ;


<s> return isInlinableImm ( ) || ( isReg ( ) && isRegClass ( <STR_LIT> ) ) ;


return isInlinableImm ( ) || ( isReg ( ) && isRegClass ( <STR_LIT> ) ) ;


<s> bool isVCSrc64 ( ) const { return isInlinableImm ( ) || ( isReg ( ) && isRegClass ( <STR_LIT> ) ) ;


<s> <ISA_LIT>Operand & Src1Op = ( ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ) ; if ( Src1Op . isReg ( ) && ( Src1Op . isRegClass ( <STR_LIT> ) || Src1Op . isRegClass ( <STR_LIT> ) ) ) return true ; }


<s> if ( operandsHaveModifiers ( Operands ) ) return true ; if ( Operands . size ( ) >= <NUM_LIT> ) { <ISA_LIT>Operand & DstOp = ( ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ) ; if ( DstOp . isReg ( ) && DstOp . isRegClass ( <STR_LIT> ) ) return true ; } if ( Operands . size ( ) >= <NUM_LIT> ) return true ; if ( Operands . size ( ) > <NUM_LIT> ) { <ISA_LIT>Operand & Src1Op = ( ( <ISA_LIT>Operand & ) * Operands [ <NUM_LIT> ] ) ;

if ( Src1Op . isReg ( ) && ( Src1Op . isRegClass ( <STR_LIT> ) || Src1Op . isRegClass ( <STR_LIT> ) ) ) return true ;


<s> if ( Op . isImm ( ) && Op . hasModifiers ( ) ) return true ; if ( Op . isImm ( ) && ( Op . getImmTy ( ) == <ISA_LIT>Operand :: ImmTyOMod || Op . getImmTy ( ) == <ISA_LIT>Operand :: ImmTyClamp ) ) return true ; } return false ;


<s> <ISA_LIT>AsmParser :: OperandMatchResultTy <ISA_LIT>AsmParser :: parseDA ( OperandVector & Operands ) { return parseNamedBit ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyDA ) ;


<s> return parseIntWithPrefix ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyDMask ) ;


<s> <ISA_LIT>AsmParser :: OperandMatchResultTy <ISA_LIT>AsmParser :: parseDMask ( OperandVector & Operands ) {

return parseIntWithPrefix ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyDMask ) ;


<s> if ( getLexer ( ) . isNot ( AsmToken :: Integer ) ) return MatchOperand_ParseFail ; if ( getParser ( ) . parseAbsoluteExpression ( Int ) ) return MatchOperand_ParseFail ; break ; } } if ( Prefix . equals ( <STR_LIT> ) ) { Int |= <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int |= <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int |= <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int = <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int = <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int = <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) { Int = <NUM_LIT> ; } else if ( Prefix . equals ( <STR_LIT> ) ) {


<s> if ( Op . isImmTy ( <ISA_LIT>Operand :: ImmTyDppBoundCtrl ) ) { Operands . pop_back ( ) ;

Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , S , <ISA_LIT>Operand :: ImmTyDppBoundCtrl ) ) ;


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { setForcedEncodingSize ( <NUM_LIT> ) ; if ( Name . endswith ( <STR_LIT> ) ) setForcedEncodingSize ( <NUM_LIT> ) ; else if ( Name . endswith ( <STR_LIT> ) ) setForcedEncodingSize ( <NUM_LIT> ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( Name , NameLoc ) ) ; while ( ! getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) { <ISA_LIT>AsmParser :: OperandMatchResultTy Res = parseOperand ( Operands , Name ) ; if ( getLexer ( ) . is ( AsmToken :: Comma ) ) Parser . Lex ( ) ; switch ( Res ) { case MatchOperand_Success : break ; case MatchOperand_ParseFail : return Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; case MatchOperand_NoMatch : return Error ( getLexer ( ) . getLoc ( ) , <STR_LIT> ) ; } } return false ;


<s> return parseNamedBit ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyLWE ) ;


<s> if ( ! isInt < <NUM_LIT> > ( IntVal ) && ! isUInt < <NUM_LIT> > ( IntVal ) ) { Error ( S , <STR_LIT> ) ; return MatchOperand_ParseFail ; } if ( Negate ) IntVal *= - <NUM_LIT> ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( IntVal , S ) ) ; return MatchOperand_Success ; } case AsmToken :: Real : { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; int64_t IntVal ; if ( getParser ( ) . parseAbsoluteExpression ( IntVal ) ) return MatchOperand_ParseFail ; APFloat F ( ( float ) BitsToDouble ( IntVal ) ) ; if ( Negate ) F . changeSign ( ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( F . bitcastToAPInt ( ) . getZExtValue ( ) , S ) ) ; return MatchOperand_Success ; } case AsmToken :: Identifier : { SMLoc S , E ; unsigned RegNo ; if ( ! ParseRegister ( RegNo , S , E ) ) { unsigned Modifiers = <NUM_LIT> ; if ( Negate ) Modifiers |= <NUM_LIT> ; if ( Abs ) { if ( getLexer ( ) . getKind ( ) != AsmToken :: Pipe ) return MatchOperand_ParseFail ;


<s> for ( const OptionalOperand & Op : OptionalOps ) { if ( operandsHasOptionalOp ( Operands , Op ) ) continue ; <ISA_LIT>AsmParser :: OperandMatchResultTy Res ; int64_t Value ; if ( Op . IsBit ) { Res = parseNamedBit ( Op . Name , Operands , Op . Type ) ; if ( Res == MatchOperand_NoMatch ) continue ; return Res ; } Res = parseIntWithPrefix ( Op . Name , Value , Op . Default ) ; if ( Res == MatchOperand_NoMatch ) continue ;

if ( Res != MatchOperand_Success ) return Res ;


<s> <ISA_LIT>AsmParser :: OperandMatchResultTy <ISA_LIT>AsmParser :: parseR128 ( OperandVector & Operands ) { return parseNamedBit ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyR128 ) ;


<s> <ISA_LIT>AsmParser :: OperandMatchResultTy <ISA_LIT>AsmParser :: parseUNorm ( OperandVector & Operands ) {

return parseNamedBit ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyUNorm ) ;


<s> <ISA_LIT>AsmParser :: OperandMatchResultTy <ISA_LIT>AsmParser :: parseUNorm ( OperandVector & Operands ) { return parseNamedBit ( <STR_LIT> , Operands , <ISA_LIT>Operand :: ImmTyUNorm ) ;


<s> if ( HasModifiers || IsVOP3 || getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) || getForcedEncodingSize ( ) == <NUM_LIT> ) { <ISA_LIT>AsmParser :: OperandMatchResultTy Res = parseOptionalOps ( VOP3OptionalOps , Operands ) ; if ( ! HasModifiers && Res == MatchOperand_Success ) { for ( unsigned i = <NUM_LIT> , e = Operands . size ( ) ; i != e ; ++ i ) { <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ; if ( ( Op . isReg ( ) || Op . isImm ( ) ) && ! Op . hasModifiers ( ) ) Op . setModifiers ( <NUM_LIT> ) ; }


<s> <ISA_LIT>Operand & Op = ( ( <ISA_LIT>Operand & ) * Operands [ i ] ) ; if ( ( Op . isReg ( ) || Op . isImm ( ) ) && ! Op . hasModifiers ( ) ) Op . setModifiers ( <NUM_LIT> ) ; } } return Res ; } return MatchOperand_NoMatch ;


<s> else OS << '<' << getImm ( ) << <STR_LIT> << Imm . Modifiers << '>' ; break ; case Token : OS << '\'' << getToken ( ) << '\'' ;


<s> void print ( raw_ostream & OS ) const override { switch ( Kind ) { case Register : OS << <STR_LIT> << getReg ( ) << <STR_LIT> << Reg . Modifiers << '>' ; break ; case Immediate : if ( Imm . Type != <ISA_LIT>Operand :: ImmTyNone ) OS << getImm ( ) ; else OS << '<' << getImm ( ) << <STR_LIT> << Imm . Modifiers << '>' ; break ; case Token : OS << '\'' << getToken ( ) << '\'' ; break ; case Expression :


<s> void addRegOperands ( MCInst & Inst , unsigned N ) const {

Inst . addOperand ( MCOperand :: createReg ( getReg ( ) ) ) ;


<s> auto Op = llvm :: make_unique < <ISA_LIT>Operand > ( Register ) ; Op -> Reg . RegNo = RegNo ; Op -> Reg . TRI = TRI ; Op -> Reg . Modifiers = - <NUM_LIT> ; Op -> Reg . IsForcedVOP3 = ForceVOP3 ; Op -> StartLoc = S ; Op -> EndLoc = E ;


<s> case <NUM_LIT> : return <STR_LIT> ; } } switch ( RegWidth ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; }


<s> static unsigned getRegForName ( StringRef RegName ) { return StringSwitch < unsigned > ( RegName ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Default ( <NUM_LIT> ) ;


<s> case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) { if ( isForcedVOP3 ( ) ) { <ISA_LIT>Operand & LastOp = ( ( <ISA_LIT>Operand & ) * Operands [ Operands . size ( ) - <NUM_LIT> ] ) ; if ( LastOp . isRegKind ( ) || ( LastOp . isImm ( ) && LastOp . getImmTy ( ) != <ISA_LIT>Operand :: ImmTyNone ) ) { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , S , <ISA_LIT>Operand :: ImmTyClamp ) ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , S , <ISA_LIT>Operand :: ImmTyOMod ) ) ; bool Res = MatchAndEmitInstruction ( IDLoc , Opcode , Operands , Out , ErrorInfo , MatchingInlineAsm ) ; if ( ! Res ) return Res ; }


<s> if ( isForcedVOP3 ( ) ) { <ISA_LIT>Operand & LastOp = ( ( <ISA_LIT>Operand & ) * Operands [ Operands . size ( ) - <NUM_LIT> ] ) ; if ( LastOp . isRegKind ( ) || ( LastOp . isImm ( ) && LastOp . getImmTy ( ) != <ISA_LIT>Operand :: ImmTyNone ) ) { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , S , <ISA_LIT>Operand :: ImmTyClamp ) ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( <NUM_LIT> , S , <ISA_LIT>Operand :: ImmTyOMod ) ) ; bool Res = MatchAndEmitInstruction ( IDLoc , Opcode , Operands , Out , ErrorInfo , MatchingInlineAsm ) ; if ( ! Res ) return Res ;


<s> if ( IDVal == <STR_LIT> ) return ParseDirectiveAMDKernelCodeT ( ) ; if ( IDVal == <STR_LIT> || IDVal == <STR_LIT> ) return ParseSectionDirectiveHSAText ( ) ;


<s> if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) return TokError ( <STR_LIT> ) ; while ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: Identifier ) ) return TokError ( <STR_LIT> ) ;

StringRef ID = getLexer ( ) . getTok ( ) . getIdentifier ( ) ;


<s> <STR_LIT> ( Header , STI . getFeatureBits ( ) ) ; while ( true ) { if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) return TokError ( <STR_LIT> ) ; while ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: Identifier ) ) return TokError ( <STR_LIT> ) ; StringRef ID = getLexer ( ) . getTok ( ) . getIdentifier ( ) ; Lex ( ) ; if ( ID == <STR_LIT> ) break ; if ( ParseAMDKernelCodeTValue ( ID , Header ) ) return true ; }

getTargetStreamer ( ) . EmitAMDKernelCodeT ( Header ) ;


<s> if ( getLexer ( ) . isNot ( AsmToken :: String ) ) return TokError ( <STR_LIT> ) ; VendorName = getLexer ( ) . getTok ( ) . getStringContents ( ) ; Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) return TokError ( <STR_LIT> ) ; Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: String ) ) return TokError ( <STR_LIT> ) ;

ArchName = getLexer ( ) . getTok ( ) . getStringContents ( ) ;


<s> Error ( S , <STR_LIT> ) ; return MatchOperand_ParseFail ; } IntVal = IntVal32 . getSExtValue ( ) ; if ( Negate ) IntVal *= - <NUM_LIT> ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( IntVal , S ) ) ; return MatchOperand_Success ; } case AsmToken :: Real : { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; int64_t IntVal ; if ( getParser ( ) . parseAbsoluteExpression ( IntVal ) ) return MatchOperand_ParseFail ; APFloat F ( ( float ) BitsToDouble ( IntVal ) ) ; if ( Negate ) F . changeSign ( ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateImm ( F . bitcastToAPInt ( ) . getZExtValue ( ) , S ) ) ; return MatchOperand_Success ; } case AsmToken :: Identifier : { SMLoc S , E ; unsigned RegNo ; if ( ! ParseRegister ( RegNo , S , E ) ) { bool HasModifiers = operandsHaveModifiers ( Operands ) ; unsigned Modifiers = <NUM_LIT> ; if ( Negate ) Modifiers |= <NUM_LIT> ; if ( Abs ) { if ( getLexer ( ) . getKind ( ) != AsmToken :: Pipe ) return MatchOperand_ParseFail ;


<s> if ( RegName [ <NUM_LIT> ] != 's' && RegName [ <NUM_LIT> ] != 'v' ) return true ; bool IsVgpr = RegName [ <NUM_LIT> ] == 'v' ; unsigned RegWidth ; unsigned RegIndexInClass ; if ( RegName . size ( ) > <NUM_LIT> ) { RegWidth = <NUM_LIT> ; if ( RegName . substr ( <NUM_LIT> ) . getAsInteger ( <NUM_LIT> , RegIndexInClass ) ) return true ; Parser . Lex ( ) ; } else { int64_t RegLo , RegHi ; Parser . Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: LBrac ) ) return true ; Parser . Lex ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( RegLo ) ) return true ; if ( getLexer ( ) . isNot ( AsmToken :: Colon ) ) return true ; Parser . Lex ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( RegHi ) ) return true ;

if ( getLexer ( ) . isNot ( AsmToken :: RBrac ) ) return true ;


<s> OS << getImm ( ) ; break ; case Token : OS << '\'' << getToken ( ) << '\'' ; break ; case Expression : OS << <STR_LIT> << * Expr << '>' ; break ;


<s> <ISA_LIT>AsmPrinter :: <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) {


<s> static AsmPrinter * create<ISA_LIT>AsmPrinterPass ( TargetMachine & tm , std :: unique_ptr < MCStreamer > && Streamer ) {

return new <ISA_LIT>AsmPrinter ( tm , std :: move ( Streamer ) ) ;


if ( MFI -> hasGridWorkgroupCountY ( ) ) {


header . workitem_private_segment_byte_size = KernelInfo . ScratchSize ;


<s> if ( STM . isAmdHsaOS ( ) ) { get<ISA_LIT>ProgramInfo ( KernelInfo , * MF ) ; EmitAmdKernelCodeT ( * MF , KernelInfo ) ;


<s> if ( <STR_LIT> ( GV ) ) return ; <ISA_LIT>TargetStreamer * TS = static_cast < <ISA_LIT>TargetStreamer * > ( OutStreamer -> getTargetStreamer ( ) ) ; if ( isModuleLinkage ( GV ) ) { TS -> Emit<ISA_LIT>HsaModuleScopeGlobal ( GV -> getName ( ) ) ; } else { TS -> Emit<ISA_LIT>HsaProgramScopeGlobal ( GV -> getName ( ) ) ; } const DataLayout & DL = getDataLayout ( ) ; OutStreamer -> PushSection ( ) ; OutStreamer -> SwitchSection ( getObjFileLowering ( ) . SectionForGlobal ( GV , * Mang , TM ) ) ; MCSymbol * GVSym = getSymbol ( GV ) ; const Constant * C = GV -> getInitializer ( ) ; OutStreamer -> EmitLabel ( GVSym ) ; EmitGlobalConstant ( DL , C ) ;


<s> if ( isModuleLinkage ( GV ) ) { TS -> Emit<ISA_LIT>HsaModuleScopeGlobal ( GV -> getName ( ) ) ; } else { TS -> Emit<ISA_LIT>HsaProgramScopeGlobal ( GV -> getName ( ) ) ; } const DataLayout & DL = getDataLayout ( ) ; OutStreamer -> PushSection ( ) ;

OutStreamer -> SwitchSection ( getObjFileLowering ( ) . SectionForGlobal ( GV , * Mang , TM ) ) ;


<s> } } else { switch ( MFI -> getShaderType ( ) ) { default : case ShaderType :: GEOMETRY : case ShaderType :: COMPUTE : case ShaderType :: VERTEX : RsrcReg = R_028868_SQ_PGM_RESOURCES_VS ; break ; case ShaderType :: PIXEL : RsrcReg = R_028850_SQ_PGM_RESOURCES_PS ; break ; } } OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_NUM_GPRS ( MaxGPR + <NUM_LIT> ) | S_STACK_<ISA_LIT>ZE ( MFI -> StackSize ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_02880C_DB_SHADER_CONTROL , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_02880C_KILL_ENABLE ( killPixel ) , <NUM_LIT> ) ; if ( MFI -> getShaderType ( ) == ShaderType :: COMPUTE ) { OutStreamer -> EmitIntValue ( R_0288E8_SQ_LDS_ALLOC , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( RoundUpToAlignment ( MFI -> LDSSize , <NUM_LIT> ) >> <NUM_LIT> , <NUM_LIT> ) ;


<s> for ( const MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) killPixel = true ; unsigned numOperands = MI . getNumOperands ( ) ; for ( unsigned op_idx = <NUM_LIT> ; op_idx < numOperands ; op_idx ++ ) { const MachineOperand & MO = MI . getOperand ( op_idx ) ; if ( ! MO . isReg ( ) ) continue ; unsigned HWReg = RI -> getEncodingValue ( MO . getReg ( ) ) & <NUM_LIT> ; if ( HWReg > <NUM_LIT> ) continue ; MaxGPR = std :: max ( MaxGPR , HWReg ) ; } } } unsigned RsrcReg ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: EVERGREEN ) { switch ( MFI -> getShaderType ( ) ) { default : case ShaderType :: COMPUTE : RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS ; break ; case ShaderType :: GEOMETRY : RsrcReg = R_028878_SQ_PGM_RESOURCES_GS ; break ; case ShaderType :: PIXEL : RsrcReg = R_028844_SQ_PGM_RESOURCES_PS ; break ; case ShaderType :: VERTEX : RsrcReg = R_028860_SQ_PGM_RESOURCES_VS ; break ; } } else { switch ( MFI -> getShaderType ( ) ) { default : case ShaderType :: GEOMETRY : case ShaderType :: COMPUTE : case ShaderType :: VERTEX : RsrcReg = R_028868_SQ_PGM_RESOURCES_VS ; break ; case ShaderType :: PIXEL : RsrcReg = R_028850_SQ_PGM_RESOURCES_PS ; break ; } } OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_NUM_GPRS ( MaxGPR + <NUM_LIT> ) | S_STACK_<ISA_LIT>ZE ( MFI -> StackSize ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_02880C_DB_SHADER_CONTROL , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_02880C_KILL_ENABLE ( killPixel ) , <NUM_LIT> ) ; if ( MFI -> getShaderType ( ) == ShaderType :: COMPUTE ) {

OutStreamer -> EmitIntValue ( R_0288E8_SQ_LDS_ALLOC , <NUM_LIT> ) ;


<s> OutStreamer -> EmitIntValue ( KernelInfo . ComputePGMRSrc1 , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_00B84C_COMPUTE_PGM_RSRC2 , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( KernelInfo . ComputePGMRSrc2 , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_00B860_COMPUTE_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B860_WAVE<ISA_LIT>ZE ( KernelInfo . ScratchBlocks ) , <NUM_LIT> ) ; } else { OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ;

OutStreamer -> EmitIntValue ( S_00B028_VGPRS ( KernelInfo . VGPRBlocks ) | S_00B028_SGPRS ( KernelInfo . SGPRBlocks ) , <NUM_LIT> ) ;


<s> OutStreamer -> EmitIntValue ( KernelInfo . ComputePGMRSrc2 , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_00B860_COMPUTE_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B860_WAVE<ISA_LIT>ZE ( KernelInfo . ScratchBlocks ) , <NUM_LIT> ) ; } else { OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B028_VGPRS ( KernelInfo . VGPRBlocks ) | S_00B028_SGPRS ( KernelInfo . SGPRBlocks ) , <NUM_LIT> ) ; if ( STM . isVGPRSpillingEnabled ( MFI ) ) { OutStreamer -> EmitIntValue ( R_0286E8_SPI_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_0286E8_WAVE<ISA_LIT>ZE ( KernelInfo . ScratchBlocks ) , <NUM_LIT> ) ; } }

if ( MFI -> getShaderType ( ) == ShaderType :: PIXEL ) {


<s> const <ISA_LIT>Subtarget & ST = F . getSubtarget < <ISA_LIT>Subtarget > ( ) ; uint32_t FP32Denormals = ST . hasFP32Denormals ( ) ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT ;


<s> switch ( ShaderType ) { default : case ShaderType :: COMPUTE : return R_00B848_COMPUTE_PGM_RSRC1 ;

case ShaderType :: GEOMETRY : return R_00B228_SPI_SHADER_PGM_RSRC1_GS ;


<s> switch ( ShaderType ) { default : case ShaderType :: COMPUTE : return R_00B848_COMPUTE_PGM_RSRC1 ; case ShaderType :: GEOMETRY : return R_00B228_SPI_SHADER_PGM_RSRC1_GS ; case ShaderType :: PIXEL : return R_00B028_SPI_SHADER_PGM_RSRC1_PS ; case ShaderType :: VERTEX : return R_00B128_SPI_SHADER_PGM_RSRC1_VS ;


<s> switch ( GV -> getLinkage ( ) ) { case GlobalValue :: InternalLinkage : case GlobalValue :: CommonLinkage : return true ; case GlobalValue :: ExternalLinkage : return false ;

default : llvm_unreachable ( <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) {

TargetRegistry :: RegisterAsmPrinter ( The<ISA_LIT>Target , create<ISA_LIT>AsmPrinterPass ) ;


<s> if ( ExtraCode [ <NUM_LIT> ] != <NUM_LIT> ) return true ; switch ( ExtraCode [ <NUM_LIT> ] ) { default : return AsmPrinter :: PrintAsmOperand ( MI , OpNo , AsmVariant , ExtraCode , O ) ; case 'r' : break ; } } <ISA_LIT>InstPrinter :: printRegOperand ( MI -> getOperand ( OpNo ) . getReg ( ) , O , * TM . getSubtargetImpl ( * MF -> getFunction ( ) ) -> getRegisterInfo ( ) ) ; return false ;


<s> break ; } } <ISA_LIT>InstPrinter :: printRegOperand ( MI -> getOperand ( OpNo ) . getReg ( ) , O , * TM . getSubtargetImpl ( * MF -> getFunction ( ) ) -> getRegisterInfo ( ) ) ; return false ;


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction & MF ) { MF . setAlignment ( <NUM_LIT> ) ; SetupMachineFunction ( MF ) ; MCContext & Context = getObjFileLowering ( ) . getContext ( ) ; MCSectionELF * ConfigSection = Context . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , <NUM_LIT> ) ; OutStreamer -> SwitchSection ( ConfigSection ) ; const <ISA_LIT>Subtarget & STM = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; <ISA_LIT>ProgramInfo KernelInfo ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: SOUTHERN_ISLANDS ) { get<ISA_LIT>ProgramInfo ( KernelInfo , MF ) ; if ( ! STM . isAmdHsaOS ( ) ) { EmitProgramInfo<ISA_LIT> ( MF , KernelInfo ) ; } <ISA_LIT>TargetStreamer * TS = static_cast < <ISA_LIT>TargetStreamer * > ( OutStreamer -> getTargetStreamer ( ) ) ; TS -> EmitDirectiveHSACodeObjectVersion ( <NUM_LIT> , <NUM_LIT> ) ; <STR_LIT> ISA = STM . getIsaVersion ( ) ; TS -> EmitDirectiveHSACodeObjectISA ( ISA . Major , ISA . Minor , ISA . Stepping , <STR_LIT> , <STR_LIT> ) ; } else { EmitProgramInfo<ISA_LIT> ( MF ) ; } DisasmLines . clear ( ) ; HexLines . clear ( ) ; DisasmLineMaxLen = <NUM_LIT> ; EmitFunctionBody ( ) ; if ( isVerbose ( ) ) { MCSectionELF * CommentSection = Context . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , <NUM_LIT> ) ; OutStreamer -> SwitchSection ( CommentSection ) ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: SOUTHERN_ISLANDS ) { OutStreamer -> emitRawComment ( <STR_LIT> , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . CodeLen ) , false ) ;

OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . NumSGPR ) , false ) ;


<s> VGPRBlocks ( <NUM_LIT> ) , SGPRBlocks ( <NUM_LIT> ) , Priority ( <NUM_LIT> ) , FloatMode ( <NUM_LIT> ) , Priv ( <NUM_LIT> ) , DX10Clamp ( <NUM_LIT> ) , DebugMode ( <NUM_LIT> ) , IEEEMode ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , ComputePGMRSrc1 ( <NUM_LIT> ) , LDSBlocks ( <NUM_LIT> ) , ScratchBlocks ( <NUM_LIT> ) , ComputePGMRSrc2 ( <NUM_LIT> ) , NumVGPR ( <NUM_LIT> ) , NumSGPR ( <NUM_LIT> ) , FlatUsed ( false ) , VCCUsed ( false ) , CodeLen ( <NUM_LIT> ) {


VGPRBlocks ( <NUM_LIT> ) , SGPRBlocks ( <NUM_LIT> ) , Priority ( <NUM_LIT> ) , FloatMode ( <NUM_LIT> ) , Priv ( <NUM_LIT> ) , DX10Clamp ( <NUM_LIT> ) , DebugMode ( <NUM_LIT> ) , IEEEMode ( <NUM_LIT> ) , ScratchSize ( <NUM_LIT> ) , ComputePGMRSrc1 ( <NUM_LIT> ) , LDSBlocks ( <NUM_LIT> ) , ScratchBlocks ( <NUM_LIT> ) , ComputePGMRSrc2 ( <NUM_LIT> ) , NumVGPR ( <NUM_LIT> ) , NumSGPR ( <NUM_LIT> ) , FlatUsed ( false ) , VCCUsed ( false ) , CodeLen ( <NUM_LIT> ) {


<s> <ISA_LIT>AsmPrinter :: <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) { if ( IsaInfo :: hasCodeObjectV3 ( getGlobalSTI ( ) ) ) HSAMetadataStream . reset ( new MetadataStreamerV3 ( ) ) ; else HSAMetadataStream . reset ( new MetadataStreamerV2 ( ) ) ;


<s> OutStreamer -> SwitchSection ( getObjFileLowering ( ) . getTextSection ( ) ) ; getTargetStreamer ( ) -> EmitCodeEnd ( ) ; } return AsmPrinter :: doFinalization ( M ) ;


<s> if ( DumpCodeInstEmitter && ! isBlockOnlyReachableByFallthrough ( & MBB ) ) { DisasmLines . push_back ( ( Twine ( <STR_LIT> ) + Twine ( getFunctionNumber ( ) ) + <STR_LIT> + Twine ( MBB . getNumber ( ) ) + <STR_LIT> ) . str ( ) ) ;

DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLines . back ( ) . size ( ) ) ;


<s> raw_string_ostream ISAVersionStream ( ISAVersionString ) ; IsaInfo :: streamIsaVersion ( getGlobalSTI ( ) , ISAVersionStream ) ; getTargetStreamer ( ) -> EmitISAVersion ( ISAVersionStream . str ( ) ) ; } if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) { HSAMetadataStream -> end ( ) ; bool Success = HSAMetadataStream -> emitTo ( * getTargetStreamer ( ) ) ;


<s> Streamer . SwitchSection ( & ReadOnlySection ) ; Streamer . EmitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ; if ( ReadOnlySection . getAlignment ( ) < <NUM_LIT> ) ReadOnlySection . setAlignment ( Align ( <NUM_LIT> ) ) ; const MCSubtargetInfo & STI = MF -> getSubtarget ( ) ; SmallString < <NUM_LIT> > KernelName ; getNameWithPrefix ( KernelName , & MF -> getFunction ( ) ) ; getTargetStreamer ( ) -> EmitAmdhsaKernelDescriptor ( STI , KernelName , getAmdhsaKernelDescriptor ( * MF , CurrentProgramInfo ) , CurrentProgramInfo . NumVGPRsForWavesPerEU , CurrentProgramInfo . NumSGPRsForWavesPerEU - IsaInfo :: getNumExtraSGPRs ( & STI , CurrentProgramInfo . VCCUsed , CurrentProgramInfo . FlatUsed ) , CurrentProgramInfo . VCCUsed , CurrentProgramInfo . FlatUsed , hasXNACK ( STI ) ) ;


<s> const GCNSubtarget & STM = MF -> getSubtarget < GCNSubtarget > ( ) ; const Function & F = MF -> getFunction ( ) ; if ( ! STM . hasCodeObjectV3 ( ) && STM . isAmdHsaOrMesa ( F ) && ( F . getCallingConv ( ) == CallingConv :: <ISA_LIT>_KERNEL || F . getCallingConv ( ) == CallingConv :: SPIR_KERNEL ) ) { amd_kernel_code_t KernelCode ; getAmdKernelCode ( KernelCode , CurrentProgramInfo , * MF ) ; getTargetStreamer ( ) -> EmitAMDKernelCodeT ( KernelCode ) ; } if ( STM . isAmdHsaOS ( ) ) HSAMetadataStream -> emitKernel ( * MF , CurrentProgramInfo ) ;


<s> } if ( DumpCodeInstEmitter ) { DisasmLines . push_back ( MF -> getName ( ) . str ( ) + <STR_LIT> ) ; DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLines . back ( ) . size ( ) ) ; HexLines . push_back ( <STR_LIT> ) ; } AsmPrinter :: EmitFunctionEntryLabel ( ) ;


<s> if ( GV -> hasInitializer ( ) && ! isa < UndefValue > ( GV -> getInitializer ( ) ) ) { OutContext . reportError ( { } , Twine ( GV -> getName ( ) ) + <STR_LIT> ) ; return ; } const Triple :: OSType OS = TM . getTargetTriple ( ) . getOS ( ) ; if ( OS == Triple :: AMDHSA || OS == Triple :: AMDPAL ) return ; MCSymbol * GVSym = getSymbol ( GV ) ; GVSym -> redefineIfPossible ( ) ; if ( GVSym -> isDefined ( ) || GVSym -> isVariable ( ) ) report_fatal_error ( <STR_LIT> + Twine ( GVSym -> getName ( ) ) + <STR_LIT> ) ; const DataLayout & DL = GV -> getParent ( ) -> getDataLayout ( ) ; uint64_t Size = DL . getTypeAllocSize ( GV -> getValueType ( ) ) ; unsigned Align = GV -> getAlignment ( ) ; if ( ! Align ) Align = <NUM_LIT> ; EmitVisibility ( GVSym , GV -> getVisibility ( ) , ! GV -> isDeclaration ( ) ) ; EmitLinkage ( GV , GVSym ) ; if ( auto TS = getTargetStreamer ( ) ) TS -> emit<ISA_LIT>LDS ( GVSym , Size , Align ) ; return ; } AsmPrinter :: EmitGlobalVariable ( GV ) ;


<s> } MD -> setScratchSize ( CC , alignTo ( CurrentProgramInfo . ScratchSize , <NUM_LIT> ) ) ; if ( MF . getFunction ( ) . getCallingConv ( ) == CallingConv :: <ISA_LIT>_PS ) { MD -> setRsrc2 ( CC , S_00B02C_EXTRA_LDS_<ISA_LIT>ZE ( CurrentProgramInfo . LDSBlocks ) ) ; MD -> setSpiPsInputEna ( MFI -> getP<ISA_LIT>nputEnable ( ) ) ; MD -> setSpiPsInputAddr ( MFI -> getP<ISA_LIT>nputAddr ( ) ) ; } const GCNSubtarget & STM = MF . getSubtarget < GCNSubtarget > ( ) ;

if ( STM . isWave32 ( ) ) MD -> setWave32 ( MF . getFunction ( ) . getCallingConv ( ) ) ;


<s> OutStreamer -> EmitIntValue ( CurrentProgramInfo . ComputePGMRSrc2 , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_00B860_COMPUTE_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B860_WAVE<ISA_LIT>ZE ( CurrentProgramInfo . ScratchBlocks ) , <NUM_LIT> ) ; } else { OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B028_VGPRS ( CurrentProgramInfo . VGPRBlocks ) | S_00B028_SGPRS ( CurrentProgramInfo . SGPRBlocks ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_0286E8_SPI_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_0286E8_WAVE<ISA_LIT>ZE ( CurrentProgramInfo . ScratchBlocks ) , <NUM_LIT> ) ; } if ( MF . getFunction ( ) . getCallingConv ( ) == CallingConv :: <ISA_LIT>_PS ) { OutStreamer -> EmitIntValue ( R_00B02C_SPI_SHADER_PGM_RSRC2_PS , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B02C_EXTRA_LDS_<ISA_LIT>ZE ( CurrentProgramInfo . LDSBlocks ) , <NUM_LIT> ) ;

OutStreamer -> EmitIntValue ( R_0286CC_SPI_PS_INPUT_ENA , <NUM_LIT> ) ;


<s> if ( TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA && TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDPAL ) return ; if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) HSAMetadataStream -> begin ( M ) ; if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDPAL ) getTargetStreamer ( ) -> getPALMetadata ( ) -> readFromIR ( M ) ; if ( IsaInfo :: hasCodeObjectV3 ( getGlobalSTI ( ) ) ) return ;

if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) getTargetStreamer ( ) -> EmitDirectiveHSACodeObjectVersion ( <NUM_LIT> , <NUM_LIT> ) ;


Out . workitem_private_segment_byte_size = CurrentProgramInfo . ScratchSize ;


<s> ProgInfo . NumVGPR = Info . getTotalNumVGPRs ( STM ) ; ProgInfo . NumSGPR = Info . NumExplicitSGPR ; ProgInfo . ScratchSize = Info . PrivateSegmentSize ; ProgInfo . VCCUsed = Info . UsesVCC ; ProgInfo . FlatUsed = Info . UsesFlatScratch ; ProgInfo . DynamicCallStack = Info . HasDynamicallySizedStack || Info . HasRecursion ; if ( ! isUInt < <NUM_LIT> > ( ProgInfo . ScratchSize ) ) { DiagnosticInfoStackSize DiagStackSize ( MF . getFunction ( ) , ProgInfo . ScratchSize , DS_Error ) ; MF . getFunction ( ) . getContext ( ) . diagnose ( DiagStackSize ) ; } const <ISA_LIT>MachineFunctionInfo * MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned ExtraSGPRs = IsaInfo :: getNumExtraSGPRs ( & STM , ProgInfo . VCCUsed , ProgInfo . FlatUsed ) ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: VOLCANIC_ISLANDS && ! STM . hasSGPRInitBug ( ) ) { unsigned MaxAddressableNumSGPRs = STM . getAddressableNumSGPRs ( ) ; if ( ProgInfo . NumSGPR > MaxAddressableNumSGPRs ) { LLVMContext & Ctx = MF . getFunction ( ) . getContext ( ) ; DiagnosticInfoResourceLimit Diag ( MF . getFunction ( ) , <STR_LIT> , ProgInfo . NumSGPR , DS_Error , DK_ResourceLimit , MaxAddressableNumSGPRs ) ; Ctx . diagnose ( Diag ) ; ProgInfo . NumSGPR = MaxAddressableNumSGPRs - <NUM_LIT> ; } } ProgInfo . NumSGPR += ExtraSGPRs ; unsigned WaveDispatchNumSGPR = <NUM_LIT> , WaveDispatchNumVGPR = <NUM_LIT> ; for ( auto & Arg : MF . getFunction ( ) . args ( ) ) { unsigned NumRegs = ( Arg . getType ( ) -> getPrimitiveSizeInBits ( ) + <NUM_LIT> ) / <NUM_LIT> ; if ( Arg . hasAttribute ( Attribute :: InReg ) ) WaveDispatchNumSGPR += NumRegs ; else WaveDispatchNumVGPR += NumRegs ; } ProgInfo . NumSGPR = std :: max ( ProgInfo . NumSGPR , WaveDispatchNumSGPR ) ; ProgInfo . NumVGPR = std :: max ( ProgInfo . NumVGPR , WaveDispatchNumVGPR ) ; ProgInfo . NumSGPRsForWavesPerEU = std :: max ( std :: max ( ProgInfo . NumSGPR , <NUM_LIT> ) , STM . getMinNumSGPRs ( MFI -> getMaxWavesPerEU ( ) ) ) ; ProgInfo . NumVGPRsForWavesPerEU = std :: max ( std :: max ( ProgInfo . NumVGPR , <NUM_LIT> ) , STM . getMinNumVGPRs ( MFI -> getMaxWavesPerEU ( ) ) ) ; if ( STM . getGeneration ( ) <= <ISA_LIT>Subtarget :: SEA_ISLANDS || STM . hasSGPRInitBug ( ) ) {


<s> for ( const MachineOperand & UseOp : MRI . reg_operands ( Reg ) ) { if ( ! UseOp . isImplicit ( ) || ! TII . isFLAT ( * UseOp . getParent ( ) ) ) return true ; } return false ;


<s> default : return true ; } } const MachineOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) { <ISA_LIT>InstPrinter :: printRegOperand ( MO . getReg ( ) , O , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ;


<s> case 'r' : break ; default : return true ; } } const MachineOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) { <ISA_LIT>InstPrinter :: printRegOperand ( MO . getReg ( ) , O , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ; return false ; } return true ;


<s> AMDGPUA<ISA_LIT> = static_cast < <ISA_LIT>TargetMachine * > ( & TM ) -> get<ISA_LIT>AS ( ) ;


<s> assert ( ! <STR_LIT> . contains ( Reg ) && <STR_LIT> ) ; IsSGPR = true ; Width = <NUM_LIT> ; } else if ( <STR_LIT> . contains ( Reg ) ) { IsSGPR = false ; Width = <NUM_LIT> ; } else if ( <STR_LIT> . contains ( Reg ) ) { assert ( ! <STR_LIT> . contains ( Reg ) && <STR_LIT> ) ; IsSGPR = true ; Width = <NUM_LIT> ; } else if ( <STR_LIT> . contains ( Reg ) ) { IsSGPR = false ; Width = <NUM_LIT> ; } else if ( <STR_LIT> . contains ( Reg ) ) { assert ( ! <STR_LIT> . contains ( Reg ) && <STR_LIT> ) ; IsSGPR = true ; Width = <NUM_LIT> ; } else if ( <STR_LIT> . contains ( Reg ) ) { IsSGPR = false ; Width = <NUM_LIT> ; } else { llvm_unreachable ( <STR_LIT> ) ; } unsigned HWReg = TRI . getHWRegIndex ( Reg ) ; int MaxUsed = HWReg + Width - <NUM_LIT> ; if ( IsSGPR ) { MaxSGPR = MaxUsed > MaxSGPR ? MaxUsed : MaxSGPR ; } else { MaxVGPR = MaxUsed > MaxVGPR ? MaxUsed : MaxVGPR ; } } if ( MI . isCall ( ) ) { const MachineOperand * CalleeOp = TII -> getNamedOperand ( MI , <STR_LIT> :: callee ) ; const Function * Callee = cast < Function > ( CalleeOp -> getGlobal ( ) ) ; if ( Callee -> isDeclaration ( ) ) { int MaxSGPRGuess = <NUM_LIT> - IsaInfo :: getNumExtraSGPRs ( ST . getFeatureBits ( ) , true , ST . hasFlatAddressSpace ( ) ) ; MaxSGPR = std :: max ( MaxSGPR , MaxSGPRGuess ) ; MaxVGPR = std :: max ( MaxVGPR , <NUM_LIT> ) ; CalleeFrameSize = std :: max ( CalleeFrameSize , UINT64_C ( <NUM_LIT> ) ) ; Info . UsesVCC = true ; Info . UsesFlatScratch = ST . hasFlatAddressSpace ( ) ; Info . HasDynamicallySizedStack = true ; } else { auto I = CallGraphResourceInfo . find ( Callee ) ; assert ( I != CallGraphResourceInfo . end ( ) && <STR_LIT> ) ; MaxSGPR = std :: max ( I -> second . NumExplicitSGPR - <NUM_LIT> , MaxSGPR ) ; MaxVGPR = std :: max ( I -> second . NumVGPR - <NUM_LIT> , MaxVGPR ) ; CalleeFrameSize = std :: max ( I -> second . PrivateSegmentSize , CalleeFrameSize ) ;

Info . UsesVCC |= I -> second . UsesVCC ;


<s> bool <ISA_LIT>AsmPrinter :: doFinalization ( Module & M ) { CallGraphResourceInfo . clear ( ) ; return AsmPrinter :: doFinalization ( M ) ;


return AsmPrinter :: doFinalization ( M ) ;


<s> if ( STI . dumpCode ( ) && ! isBlockOnlyReachableByFallthrough ( & MBB ) ) { DisasmLines . push_back ( ( Twine ( <STR_LIT> ) + Twine ( getFunctionNumber ( ) ) + <STR_LIT> + Twine ( MBB . getNumber ( ) ) + <STR_LIT> ) . str ( ) ) ; DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLines . back ( ) . size ( ) ) ;


<s> OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( CodeSize ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( NumSGPR ) , false ) ;

OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( NumVGPR ) , false ) ;


<s> HSAMetadataStream . end ( ) ; getTargetStreamer ( ) -> EmitHSAMetadata ( HSAMetadataStream . getHSAMetadata ( ) ) ; } if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDPAL ) { PALMD :: Metadata PALMetadataVector ; for ( auto i : PALMetadataMap ) { PALMetadataVector . push_back ( i . first ) ; PALMetadataVector . push_back ( i . second ) ; } getTargetStreamer ( ) -> EmitPALMetadata ( PALMetadataVector ) ;


<s> auto & ReadOnlySection = * ObjectFileInfo . getReadOnlySection ( ) ; Streamer . PushSection ( ) ; Streamer . SwitchSection ( & ReadOnlySection ) ; Streamer . EmitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ; if ( ReadOnlySection . getAlignment ( ) < <NUM_LIT> ) ReadOnlySection . setAlignment ( <NUM_LIT> ) ; SmallString < <NUM_LIT> > KernelName ; getNameWithPrefix ( KernelName , & MF -> getFunction ( ) ) ;

getTargetStreamer ( ) -> EmitAmdhsaKernelDescriptor ( * getSTI ( ) , KernelName , getAmdhsaKernelDescriptor ( * MF , CurrentProgramInfo ) , CurrentProgramInfo . NumVGPRsForWavesPerEU , CurrentProgramInfo . NumSGPRsForWavesPerEU - IsaInfo :: getNumExtraSGPRs ( getSTI ( ) -> getFeatureBits ( ) , CurrentProgramInfo . VCCUsed , CurrentProgramInfo . FlatUsed ) , CurrentProgramInfo . VCCUsed , CurrentProgramInfo . FlatUsed , hasXNACK ( * getSTI ( ) ) ) ;


<s> if ( ! IsaInfo :: hasCodeObjectV3 ( getSTI ( ) ) || TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA ) return ; auto & Streamer = getTargetStreamer ( ) -> getStreamer ( ) ; auto & Context = Streamer . getContext ( ) ; auto & ObjectFileInfo = * Context . getObjectFileInfo ( ) ; auto & ReadOnlySection = * ObjectFileInfo . getReadOnlySection ( ) ; Streamer . PushSection ( ) ; Streamer . SwitchSection ( & ReadOnlySection ) ; Streamer . EmitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ;

if ( ReadOnlySection . getAlignment ( ) < <NUM_LIT> ) ReadOnlySection . setAlignment ( <NUM_LIT> ) ;


<s> if ( IsaInfo :: hasCodeObjectV3 ( getSTI ( ) ) && TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) return ; const GCNSubtarget & STM = MF -> getSubtarget < GCNSubtarget > ( ) ; const Function & F = MF -> getFunction ( ) ; if ( STM . isAmdCodeObjectV2 ( F ) && ( F . getCallingConv ( ) == CallingConv :: <ISA_LIT>_KERNEL || F . getCallingConv ( ) == CallingConv :: SPIR_KERNEL ) ) { amd_kernel_code_t KernelCode ; getAmdKernelCode ( KernelCode , CurrentProgramInfo , * MF ) ; getTargetStreamer ( ) -> EmitAMDKernelCodeT ( KernelCode ) ; }

if ( TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA ) return ;


<s> const GCNSubtarget & STI = MF -> getSubtarget < GCNSubtarget > ( ) ; if ( STI . dumpCode ( ) ) { DisasmLines . push_back ( MF -> getName ( ) . str ( ) + <STR_LIT> ) ; DisasmLineMaxLen = std :: max ( DisasmLineMaxLen , DisasmLines . back ( ) . size ( ) ) ; HexLines . push_back ( <STR_LIT> ) ;


AsmPrinter :: EmitGlobalVariable ( GV ) ;


<s> unsigned Rsrc2Reg = Rsrc1Reg + <NUM_LIT> ; unsigned ScratchSizeKey = PALMD :: Key :: CS_SCRATCH_<ISA_LIT>ZE ; switch ( MF . getFunction ( ) . getCallingConv ( ) ) { case CallingConv :: <ISA_LIT>_PS : ScratchSizeKey = PALMD :: Key :: PS_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_VS : ScratchSizeKey = PALMD :: Key :: VS_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_GS : ScratchSizeKey = PALMD :: Key :: GS_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_ES : ScratchSizeKey = PALMD :: Key :: ES_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_HS : ScratchSizeKey = PALMD :: Key :: HS_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_LS : ScratchSizeKey = PALMD :: Key :: LS_SCRATCH_<ISA_LIT>ZE ; break ; } unsigned NumUsedVgprsKey = ScratchSizeKey + PALMD :: Key :: VS_NUM_USED_VGPRS - PALMD :: Key :: VS_SCRATCH_<ISA_LIT>ZE ; unsigned NumUsedSgprsKey = ScratchSizeKey + PALMD :: Key :: VS_NUM_USED_SGPRS - PALMD :: Key :: VS_SCRATCH_<ISA_LIT>ZE ; PALMetadataMap [ NumUsedVgprsKey ] = CurrentProgramInfo . NumVGPRsForWavesPerEU ; PALMetadataMap [ NumUsedSgprsKey ] = CurrentProgramInfo . NumSGPRsForWavesPerEU ; if ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) { PALMetadataMap [ Rsrc1Reg ] |= CurrentProgramInfo . ComputePGMRSrc1 ; PALMetadataMap [ Rsrc2Reg ] |= CurrentProgramInfo . ComputePGMRSrc2 ; PALMetadataMap [ ScratchSizeKey ] |= alignTo ( CurrentProgramInfo . ScratchSize , <NUM_LIT> ) ; } else { PALMetadataMap [ Rsrc1Reg ] |= S_00B028_VGPRS ( CurrentProgramInfo . VGPRBlocks ) | S_00B028_SGPRS ( CurrentProgramInfo . SGPRBlocks ) ; if ( CurrentProgramInfo . ScratchBlocks > <NUM_LIT> ) PALMetadataMap [ Rsrc2Reg ] |= S_00B84C_SCRATCH_EN ( <NUM_LIT> ) ; PALMetadataMap [ ScratchSizeKey ] |= alignTo ( CurrentProgramInfo . ScratchSize , <NUM_LIT> ) ;


<s> ScratchSizeKey = PALMD :: Key :: ES_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_HS : ScratchSizeKey = PALMD :: Key :: HS_SCRATCH_<ISA_LIT>ZE ; break ; case CallingConv :: <ISA_LIT>_LS : ScratchSizeKey = PALMD :: Key :: LS_SCRATCH_<ISA_LIT>ZE ; break ; } unsigned NumUsedVgprsKey = ScratchSizeKey + PALMD :: Key :: VS_NUM_USED_VGPRS - PALMD :: Key :: VS_SCRATCH_<ISA_LIT>ZE ; unsigned NumUsedSgprsKey = ScratchSizeKey + PALMD :: Key :: VS_NUM_USED_SGPRS - PALMD :: Key :: VS_SCRATCH_<ISA_LIT>ZE ; PALMetadataMap [ NumUsedVgprsKey ] = CurrentProgramInfo . NumVGPRsForWavesPerEU ; PALMetadataMap [ NumUsedSgprsKey ] = CurrentProgramInfo . NumSGPRsForWavesPerEU ; if ( <STR_LIT> ( MF . getFunction ( ) . getCallingConv ( ) ) ) { PALMetadataMap [ Rsrc1Reg ] |= CurrentProgramInfo . ComputePGMRSrc1 ; PALMetadataMap [ Rsrc2Reg ] |= CurrentProgramInfo . ComputePGMRSrc2 ; PALMetadataMap [ ScratchSizeKey ] |= alignTo ( CurrentProgramInfo . ScratchSize , <NUM_LIT> ) ; } else { PALMetadataMap [ Rsrc1Reg ] |= S_00B028_VGPRS ( CurrentProgramInfo . VGPRBlocks ) | S_00B028_SGPRS ( CurrentProgramInfo . SGPRBlocks ) ;

if ( CurrentProgramInfo . ScratchBlocks > <NUM_LIT> ) PALMetadataMap [ Rsrc2Reg ] |= S_00B84C_SCRATCH_EN ( <NUM_LIT> ) ;


<s> if ( STM . isVGPRSpillingEnabled ( MF . getFunction ( ) ) ) { OutStreamer -> EmitIntValue ( R_0286E8_SPI_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_0286E8_WAVE<ISA_LIT>ZE ( CurrentProgramInfo . ScratchBlocks ) , <NUM_LIT> ) ; } } if ( MF . getFunction ( ) . getCallingConv ( ) == CallingConv :: <ISA_LIT>_PS ) { OutStreamer -> EmitIntValue ( R_00B02C_SPI_SHADER_PGM_RSRC2_PS , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B02C_EXTRA_LDS_<ISA_LIT>ZE ( CurrentProgramInfo . LDSBlocks ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_0286CC_SPI_PS_INPUT_ENA , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( MFI -> getP<ISA_LIT>nputEnable ( ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_0286D0_SPI_PS_INPUT_ADDR , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( MFI -> getP<ISA_LIT>nputAddr ( ) , <NUM_LIT> ) ;


<s> if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) getTargetStreamer ( ) -> EmitDirectiveHSACodeObjectVersion ( <NUM_LIT> , <NUM_LIT> ) ; IsaInfo :: IsaVersion ISA = IsaInfo :: getIsaVersion ( getSTI ( ) -> getFeatureBits ( ) ) ;

getTargetStreamer ( ) -> EmitDirectiveHSACodeObjectISA ( ISA . Major , ISA . Minor , ISA . Stepping , <STR_LIT> , <STR_LIT> ) ;


<s> static uint32_t getFPMode ( const MachineFunction & F ) {

const GCNSubtarget & ST = F . getSubtarget < GCNSubtarget > ( ) ;


<s> const MCSubtargetInfo * <ISA_LIT>AsmPrinter :: getSTI ( ) const { return TM . getMCSubtargetInfo ( ) ;


<s> return true ; } } const MachineOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . isReg ( ) ) {

<ISA_LIT>InstPrinter :: printRegOperand ( MO . getReg ( ) , O , * MF -> getSubtarget ( ) . getRegisterInfo ( ) ) ;


<s> auto NamedMD = M . getNamedMetadata ( <STR_LIT> ) ; if ( ! NamedMD || ! NamedMD -> getNumOperands ( ) ) return ; auto Tuple = dyn_cast < MDTuple > ( NamedMD -> getOperand ( <NUM_LIT> ) ) ; if ( ! Tuple ) return ; for ( unsigned I = <NUM_LIT> , E = Tuple -> getNumOperands ( ) & - <NUM_LIT> ; I != E ; I += <NUM_LIT> ) { auto Key = mdconst :: dyn_extract < ConstantInt > ( Tuple -> getOperand ( I ) ) ; auto Val = mdconst :: dyn_extract < ConstantInt > ( Tuple -> getOperand ( I + <NUM_LIT> ) ) ;


<s> auto Key = mdconst :: dyn_extract < ConstantInt > ( Tuple -> getOperand ( I ) ) ; auto Val = mdconst :: dyn_extract < ConstantInt > ( Tuple -> getOperand ( I + <NUM_LIT> ) ) ; if ( ! Key || ! Val ) continue ; PALMetadataMap [ Key -> getZExtValue ( ) ] = Val -> getZExtValue ( ) ;


<s> std :: string ISAVersionString ; raw_string_ostream ISAVersionStream ( ISAVersionString ) ; IsaInfo :: streamIsaVersion ( getGlobalSTI ( ) , ISAVersionStream ) ; getTargetStreamer ( ) -> EmitISAVersion ( ISAVersionStream . str ( ) ) ; } if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) { HSAMetadataStream -> end ( ) ; bool Success = HSAMetadataStream -> emitTo ( * getTargetStreamer ( ) ) ;


<s> bool Success = HSAMetadataStream -> emitTo ( * getTargetStreamer ( ) ) ; ( void ) Success ; assert ( Success && <STR_LIT> ) ; } if ( ! IsaInfo :: hasCodeObjectV3 ( getGlobalSTI ( ) ) ) { if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDPAL ) {


<s> if ( ! IsaInfo :: hasCodeObjectV3 ( getGlobalSTI ( ) ) || TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA ) return ; auto & Streamer = getTargetStreamer ( ) -> getStreamer ( ) ; auto & Context = Streamer . getContext ( ) ; auto & ObjectFileInfo = * Context . getObjectFileInfo ( ) ; auto & ReadOnlySection = * ObjectFileInfo . getReadOnlySection ( ) ; Streamer . PushSection ( ) ; Streamer . SwitchSection ( & ReadOnlySection ) ; Streamer . EmitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) ; if ( ReadOnlySection . getAlignment ( ) < <NUM_LIT> ) ReadOnlySection . setAlignment ( <NUM_LIT> ) ; const MCSubtargetInfo & STI = MF -> getSubtarget ( ) ; SmallString < <NUM_LIT> > KernelName ;

getNameWithPrefix ( KernelName , & MF -> getFunction ( ) ) ;


<s> return ; } const <ISA_LIT>MachineFunctionInfo * MFI = MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const GCNSubtarget & STM = MF -> getSubtarget < GCNSubtarget > ( ) ; if ( MFI -> isEntryFunction ( ) && STM . isAmdHsaOrMesa ( MF -> getFunction ( ) ) ) { SmallString < <NUM_LIT> > SymbolName ; getNameWithPrefix ( SymbolName , & MF -> getFunction ( ) ) , getTargetStreamer ( ) -> Emit<ISA_LIT>SymbolType ( SymbolName , ELF :: STT_<ISA_LIT>_HSA_KERNEL ) ; } if ( STM . dumpCode ( ) ) {

DisasmLines . push_back ( MF -> getName ( ) . str ( ) + <STR_LIT> ) ;


<s> } const <ISA_LIT>MachineFunctionInfo * MFI = MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const GCNSubtarget & STM = MF -> getSubtarget < GCNSubtarget > ( ) ; if ( MFI -> isEntryFunction ( ) && STM . isAmdHsaOrMesa ( MF -> getFunction ( ) ) ) { SmallString < <NUM_LIT> > SymbolName ; getNameWithPrefix ( SymbolName , & MF -> getFunction ( ) ) , getTargetStreamer ( ) -> Emit<ISA_LIT>SymbolType ( SymbolName , ELF :: STT_<ISA_LIT>_HSA_KERNEL ) ;


<s> IsaInfo :: streamIsaVersion ( getGlobalSTI ( ) , ExpectedTargetOS ) ; getTargetStreamer ( ) -> EmitDirectiveAMDGCNTarget ( ExpectedTarget ) ; } if ( TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA && TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDPAL ) return ; if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) HSAMetadataStream -> begin ( M ) ;

if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDPAL ) readPALMetadata ( M ) ;


<s> if ( TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDHSA && TM . getTargetTriple ( ) . getOS ( ) != Triple :: AMDPAL ) return ; if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) HSAMetadataStream -> begin ( M ) ; if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDPAL ) readPALMetadata ( M ) ; if ( IsaInfo :: hasCodeObjectV3 ( getGlobalSTI ( ) ) ) return ;

if ( TM . getTargetTriple ( ) . getOS ( ) == Triple :: AMDHSA ) getTargetStreamer ( ) -> EmitDirectiveHSACodeObjectVersion ( <NUM_LIT> , <NUM_LIT> ) ;


<s> const <ISA_LIT>MachineFunctionInfo * MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const <ISA_LIT>InstrInfo * TII = STM . getInstrInfo ( ) ; const <ISA_LIT>RegisterInfo * RI = & TII -> getRegisterInfo ( ) ; unsigned ExtraSGPRs = IsaInfo :: getNumExtraSGPRs ( & STM , ProgInfo . VCCUsed , ProgInfo . FlatUsed ) ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: VOLCANIC_ISLANDS && ! STM . hasSGPRInitBug ( ) ) { unsigned MaxAddressableNumSGPRs = STM . getAddressableNumSGPRs ( ) ; if ( ProgInfo . NumSGPR > MaxAddressableNumSGPRs ) { LLVMContext & Ctx = MF . getFunction ( ) . getContext ( ) ; DiagnosticInfoResourceLimit Diag ( MF . getFunction ( ) , <STR_LIT> , ProgInfo . NumSGPR , DS_Error , DK_ResourceLimit , MaxAddressableNumSGPRs ) ; Ctx . diagnose ( Diag ) ; ProgInfo . NumSGPR = MaxAddressableNumSGPRs - <NUM_LIT> ; } } ProgInfo . NumSGPR += ExtraSGPRs ; unsigned WaveDispatchNumSGPR = <NUM_LIT> , WaveDispatchNumVGPR = <NUM_LIT> ; for ( auto & Arg : MF . getFunction ( ) . args ( ) ) { unsigned NumRegs = ( Arg . getType ( ) -> getPrimitiveSizeInBits ( ) + <NUM_LIT> ) / <NUM_LIT> ; if ( Arg . hasAttribute ( Attribute :: InReg ) ) WaveDispatchNumSGPR += NumRegs ; else WaveDispatchNumVGPR += NumRegs ; } ProgInfo . NumSGPR = std :: max ( ProgInfo . NumSGPR , WaveDispatchNumSGPR ) ; ProgInfo . NumVGPR = std :: max ( ProgInfo . NumVGPR , WaveDispatchNumVGPR ) ; ProgInfo . NumSGPRsForWavesPerEU = std :: max ( std :: max ( ProgInfo . NumSGPR , <NUM_LIT> ) , STM . getMinNumSGPRs ( MFI -> getMaxWavesPerEU ( ) ) ) ; ProgInfo . NumVGPRsForWavesPerEU = std :: max ( std :: max ( ProgInfo . NumVGPR , <NUM_LIT> ) , STM . getMinNumVGPRs ( MFI -> getMaxWavesPerEU ( ) ) ) ; if ( STM . getGeneration ( ) <= <ISA_LIT>Subtarget :: SEA_ISLANDS || STM . hasSGPRInitBug ( ) ) { unsigned MaxAddressableNumSGPRs = STM . getAddressableNumSGPRs ( ) ; if ( ProgInfo . NumSGPR > MaxAddressableNumSGPRs ) { LLVMContext & Ctx = MF . getFunction ( ) . getContext ( ) ; DiagnosticInfoResourceLimit Diag ( MF . getFunction ( ) , <STR_LIT> , ProgInfo . NumSGPR , DS_Error , DK_ResourceLimit , MaxAddressableNumSGPRs ) ; Ctx . diagnose ( Diag ) ; ProgInfo . NumSGPR = MaxAddressableNumSGPRs ; ProgInfo . NumSGPRsForWavesPerEU = MaxAddressableNumSGPRs ; } } if ( STM . hasSGPRInitBug ( ) ) { ProgInfo . NumSGPR = <STR_LIT> :: FIXED_NUM_SGPRS_FOR_INIT_BUG ; ProgInfo . NumSGPRsForWavesPerEU = <STR_LIT> :: FIXED_NUM_SGPRS_FOR_INIT_BUG ; } if ( MFI -> getNumUserSGPRs ( ) > STM . getMaxNumUserSGPRs ( ) ) { LLVMContext & Ctx = MF . getFunction ( ) . getContext ( ) ; DiagnosticInfoResourceLimit Diag ( MF . getFunction ( ) , <STR_LIT> , MFI -> getNumUserSGPRs ( ) , DS_Error ) ;


<s> get<ISA_LIT>ProgramInfo ( KernelInfo , * MF ) ; EmitAmdKernelCodeT ( * MF , KernelInfo ) ; }


<s> const <ISA_LIT>Subtarget & STM = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; <ISA_LIT>ProgramInfo KernelInfo ;

if ( STM . isAmdCodeObjectV2 ( * MF ) ) {


<s> <ISA_LIT>TargetStreamer * TS = static_cast < <ISA_LIT>TargetStreamer * > ( OutStreamer -> getTargetStreamer ( ) ) ; SmallString < <NUM_LIT> > SymbolName ; getNameWithPrefix ( SymbolName , MF -> getFunction ( ) ) , TS -> Emit<ISA_LIT>SymbolType ( SymbolName , ELF :: STT_<ISA_LIT>_HSA_KERNEL ) ; } AsmPrinter :: EmitFunctionEntryLabel ( ) ;


<s> void <ISA_LIT>AsmPrinter :: EmitProgramInfo<ISA_LIT> ( const MachineFunction & MF ) { unsigned MaxGPR = <NUM_LIT> ; bool killPixel = false ; const <ISA_LIT>Subtarget & STM = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; const <ISA_LIT>RegisterInfo * RI = STM . getRegisterInfo ( ) ; const <ISA_LIT>MachineFunctionInfo * MFI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; for ( const MachineBasicBlock & MBB : MF ) { for ( const MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) killPixel = true ; unsigned numOperands = MI . getNumOperands ( ) ; for ( unsigned op_idx = <NUM_LIT> ; op_idx < numOperands ; op_idx ++ ) { const MachineOperand & MO = MI . getOperand ( op_idx ) ; if ( ! MO . isReg ( ) ) continue ; unsigned HWReg = RI -> getEncodingValue ( MO . getReg ( ) ) & <NUM_LIT> ; if ( HWReg > <NUM_LIT> ) continue ; MaxGPR = std :: max ( MaxGPR , HWReg ) ; } } } unsigned RsrcReg ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: EVERGREEN ) { switch ( MF . getFunction ( ) -> getCallingConv ( ) ) { default : LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_CS : RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS ; break ; case CallingConv :: <ISA_LIT>_GS : RsrcReg = R_028878_SQ_PGM_RESOURCES_GS ; break ; case CallingConv :: <ISA_LIT>_PS : RsrcReg = R_028844_SQ_PGM_RESOURCES_PS ; break ;

case CallingConv :: <ISA_LIT>_VS : RsrcReg = R_028860_SQ_PGM_RESOURCES_VS ; break ;


<s> case CallingConv :: <ISA_LIT>_GS : RsrcReg = R_028878_SQ_PGM_RESOURCES_GS ; break ; case CallingConv :: <ISA_LIT>_PS : RsrcReg = R_028844_SQ_PGM_RESOURCES_PS ; break ; case CallingConv :: <ISA_LIT>_VS : RsrcReg = R_028860_SQ_PGM_RESOURCES_VS ; break ; } } else { switch ( MF . getFunction ( ) -> getCallingConv ( ) ) { default : LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_GS : LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_CS : LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_VS : RsrcReg = R_028868_SQ_PGM_RESOURCES_VS ; break ; case CallingConv :: <ISA_LIT>_PS : RsrcReg = R_028850_SQ_PGM_RESOURCES_PS ; break ; } } OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_NUM_GPRS ( MaxGPR + <NUM_LIT> ) | S_STACK_<ISA_LIT>ZE ( MFI -> CFStackSize ) , <NUM_LIT> ) ;

OutStreamer -> EmitIntValue ( R_02880C_DB_SHADER_CONTROL , <NUM_LIT> ) ;


<s> OutStreamer -> EmitIntValue ( R_0286E8_SPI_TMPRING_<ISA_LIT>ZE , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_0286E8_WAVE<ISA_LIT>ZE ( KernelInfo . ScratchBlocks ) , <NUM_LIT> ) ; } } if ( MF . getFunction ( ) -> getCallingConv ( ) == CallingConv :: <ISA_LIT>_PS ) { OutStreamer -> EmitIntValue ( R_00B02C_SPI_SHADER_PGM_RSRC2_PS , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( S_00B02C_EXTRA_LDS_<ISA_LIT>ZE ( KernelInfo . LDSBlocks ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_0286CC_SPI_PS_INPUT_ENA , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( MFI -> P<ISA_LIT>nputEna , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_0286D0_SPI_PS_INPUT_ADDR , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( MFI -> getP<ISA_LIT>nputAddr ( ) , <NUM_LIT> ) ; } OutStreamer -> EmitIntValue ( R_SPILLED_SGPRS , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( MFI -> getNumSpilledSGPRs ( ) , <NUM_LIT> ) ; OutStreamer -> EmitIntValue ( R_SPILLED_VGPRS , <NUM_LIT> ) ;

OutStreamer -> EmitIntValue ( MFI -> getNumSpilledVGPRs ( ) , <NUM_LIT> ) ;


<s> const MCSubtargetInfo * STI = TM . getMCSubtargetInfo ( ) ; <STR_LIT> :: IsaVersion ISA = <STR_LIT> :: getIsaVersion ( STI -> getFeatureBits ( ) ) ; TS -> EmitDirectiveHSACodeObjectISA ( ISA . Major , ISA . Minor , ISA . Stepping , <STR_LIT> , <STR_LIT> ) ; TS -> EmitRuntimeMetadata ( STI -> getFeatureBits ( ) , M ) ;


<s> const <ISA_LIT>Subtarget & ST = F . getSubtarget < <ISA_LIT>Subtarget > ( ) ; uint32_t FP32Denormals = ST . hasFP32Denormals ( ) ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT ; uint32_t FP64Denormals = ST . hasFP64Denormals ( ) ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT ;


<s> switch ( CallConv ) { default : LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_CS : return R_00B848_COMPUTE_PGM_RSRC1 ; case CallingConv :: <ISA_LIT>_GS : return R_00B228_SPI_SHADER_PGM_RSRC1_GS ; case CallingConv :: <ISA_LIT>_PS : return R_00B028_SPI_SHADER_PGM_RSRC1_PS ; case CallingConv :: <ISA_LIT>_VS : return R_00B128_SPI_SHADER_PGM_RSRC1_VS ; }


<s> TargetRegistry :: RegisterAsmPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmPrinterPass ) ; TargetRegistry :: RegisterAsmPrinter ( getTheGCNTarget ( ) , create<ISA_LIT>AsmPrinterPass ) ;


<s> EmitProgramInfo<ISA_LIT> ( MF ) ; } DisasmLines . clear ( ) ; HexLines . clear ( ) ; DisasmLineMaxLen = <NUM_LIT> ; EmitFunctionBody ( ) ; if ( isVerbose ( ) ) { MCSectionELF * CommentSection = Context . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , <NUM_LIT> ) ; OutStreamer -> SwitchSection ( CommentSection ) ; if ( STM . getGeneration ( ) >= <ISA_LIT>Subtarget :: SOUTHERN_ISLANDS ) { OutStreamer -> emitRawComment ( <STR_LIT> , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . CodeLen ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . NumSGPR ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . NumVGPR ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . FloatMode ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . IEEEMode ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . ScratchSize ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . LDSSize ) + <STR_LIT> , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . SGPRBlocks ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . VGPRBlocks ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . NumSGPRsForWavesPerEU ) , false ) ; OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . NumVGPRsForWavesPerEU ) , false ) ;

OutStreamer -> emitRawComment ( <STR_LIT> + Twine ( KernelInfo . ReservedVGPRFirst ) , false ) ;


<s> <ISA_LIT>AsmPrinter :: <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) {


<s> case ShaderType :: COMPUTE : RsrcReg = R_0288D4_SQ_PGM_RESOURCES_LS ; break ; case ShaderType :: GEOMETRY : RsrcReg = R_028878_SQ_PGM_RESOURCES_GS ; break ; case ShaderType :: PIXEL : RsrcReg = R_028844_SQ_PGM_RESOURCES_PS ; break ; case ShaderType :: VERTEX : RsrcReg = R_028860_SQ_PGM_RESOURCES_VS ; break ; } } else { switch ( MFI -> getShaderType ( ) ) { default : case ShaderType :: GEOMETRY : case ShaderType :: COMPUTE : case ShaderType :: VERTEX : RsrcReg = R_028868_SQ_PGM_RESOURCES_VS ; break ; case ShaderType :: PIXEL : RsrcReg = R_028850_SQ_PGM_RESOURCES_PS ; break ; } } OutStreamer -> EmitIntValue ( RsrcReg , <NUM_LIT> ) ;

OutStreamer -> EmitIntValue ( S_NUM_GPRS ( MaxGPR + <NUM_LIT> ) | S_STACK_<ISA_LIT>ZE ( MFI -> StackSize ) , <NUM_LIT> ) ;