<s> LLT Ty = MRI -> getType ( VDataIn ) ; const bool Is64Bit = BaseOpcode -> AtomicX2 ? Ty . getSizeInBits ( ) == <NUM_LIT> : Ty . getSizeInBits ( ) == <NUM_LIT> ; if ( BaseOpcode -> AtomicX2 ) { assert ( MI . getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) ; DMask = Is64Bit ? <NUM_LIT> : <NUM_LIT> ; NumVDataDwords = Is64Bit ? <NUM_LIT> : <NUM_LIT> ; } else { DMask = Is64Bit ? <NUM_LIT> : <NUM_LIT> ; NumVDataDwords = Is64Bit ? <NUM_LIT> : <NUM_LIT> ; } } else { const int DMaskIdx = <NUM_LIT> ; DMask = MI . getOperand ( DMaskIdx ) . getImm ( ) ; DMaskLanes = BaseOpcode -> Gather4 ? <NUM_LIT> : countPopulation ( DMask ) ; if ( BaseOpcode -> Store ) { VDataIn = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; VDataTy = MRI -> getType ( VDataIn ) ; NumVDataDwords = ( VDataTy . getSizeInBits ( ) + <NUM_LIT> ) / <NUM_LIT> ; } else { VDataOut = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; VDataTy = MRI -> getType ( VDataOut ) ; NumVDataDwords = DMaskLanes ; if ( ! MI . memoperands_empty ( ) ) { const MachineMemOperand * MMO = * MI . memoperands_begin ( ) ; IsD16 = ( ( <NUM_LIT> * MMO -> getSize ( ) ) / DMaskLanes ) < <NUM_LIT> ; if ( IsD16 && ! STI . hasUnpackedD16VMem ( ) ) NumVDataDwords = ( DMaskLanes + <NUM_LIT> ) / <NUM_LIT> ; } } } if ( LZMappingInfo ) { const MachineOperand & Lod = MI . getOperand ( VAddrIdx + NumVAddr - <NUM_LIT> ) ; if ( Lod . isImm ( ) ) { assert ( Lod . getImm ( ) == <NUM_LIT> ) ; IntrOpcode = LZMappingInfo -> LZ ; } } if ( MIPMappingInfo ) { const MachineOperand & Lod = MI . getOperand ( VAddrIdx + NumVAddr - <NUM_LIT> ) ; if ( Lod . isImm ( ) ) { assert ( Lod . getImm ( ) == <NUM_LIT> ) ; IntrOpcode = MIPMappingInfo -> NONMIP ; } } if ( IsG16 && ! IsA16 ) { const <STR_LIT> * G16MappingInfo = <STR_LIT> ( Intr -> BaseOpcode ) ; assert ( G16MappingInfo ) ; IntrOpcode = G16MappingInfo -> G16 ; } assert ( ( ! IsTexFail || DMaskLanes >= <NUM_LIT> ) && <STR_LIT> ) ; bool GLC = false ; bool SLC = false ; bool DLC = false ; if ( BaseOpcode -> Atomic ) { GLC = true ; if ( ! parseCachePolicy ( MI . getOperand ( CtrlIdx + <NUM_LIT> ) . getImm ( ) , nullptr , & SLC , IsGFX10 ? & DLC : nullptr ) ) return false ; } else {

if ( ! parseCachePolicy ( MI . getOperand ( CtrlIdx + <NUM_LIT> ) . getImm ( ) , & GLC , & SLC , IsGFX10 ? & DLC : nullptr ) ) return false ;


<s> BuildMI ( * MBB , & MI , DL , TII . get ( <STR_LIT> ) , InterpMov ) . addImm ( <NUM_LIT> ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; BuildMI ( * MBB , & MI , DL , TII . get ( <STR_LIT> ) , Dst ) . addImm ( <NUM_LIT> ) . addReg ( Src0 ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( <NUM_LIT> ) . addReg ( InterpMov ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) ; MI . eraseFromParent ( ) ;


<s> MachineBasicBlock * MBB = MI . getParent ( ) ; BuildMI ( * MBB , & MI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( M0Val ) ; BuildMI ( * MBB , & MI , DL , TII . get ( <STR_LIT> ) , InterpMov ) . addImm ( <NUM_LIT> ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) ; BuildMI ( * MBB , & MI , DL , TII . get ( <STR_LIT> ) , Dst ) . addImm ( <NUM_LIT> ) . addReg ( Src0 ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( <NUM_LIT> ) . addReg ( InterpMov ) . addImm ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) ) . addImm ( <NUM_LIT> ) . addImm ( <NUM_LIT> ) ;


<s> return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( RSrcReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( VAddr ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { if ( SOffset ) MIB . addReg ( SOffset ) ; else MIB . addImm ( <NUM_LIT> ) ;


<s> if ( ! STI . hasAddr64 ( ) || STI . useFlatForGlobal ( ) ) return false ; MUBUFAddressData AddrData = parseMUBUFAddress ( Root . getReg ( ) ) ; if ( ! shouldUseAddr64 ( AddrData ) ) return false ; Register N0 = AddrData . N0 ; Register N2 = AddrData . N2 ; Register N3 = AddrData . N3 ; Offset = AddrData . Offset ; Register SRDPtr ; if ( N2 ) { if ( RBI . getRegBank ( N2 , * MRI , TRI ) -> getID ( ) == <STR_LIT> ) { assert ( N3 ) ; if ( RBI . getRegBank ( N3 , * MRI , TRI ) -> getID ( ) == <STR_LIT> ) { VAddr = N0 ; } else { SRDPtr = N3 ; VAddr = N2 ; } } else { SRDPtr = N2 ; VAddr = N3 ; } } else if ( RBI . getRegBank ( N0 , * MRI , TRI ) -> getID ( ) == <STR_LIT> ) { VAddr = N0 ;


<s> Offset = AddrData . Offset ; Register SRDPtr ; if ( N2 ) { if ( RBI . getRegBank ( N2 , * MRI , TRI ) -> getID ( ) == <STR_LIT> ) { assert ( N3 ) ; if ( RBI . getRegBank ( N3 , * MRI , TRI ) -> getID ( ) == <STR_LIT> ) { VAddr = N0 ; } else { SRDPtr = N3 ; VAddr = N2 ; } } else {


<s> Register SOffset ; int64_t Offset = <NUM_LIT> ; if ( ! selectMUBUFOffsetImpl ( Root , RSrcReg , SOffset , Offset ) ) return { } ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( RSrcReg ) ;


<s> return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( RSrcReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { if ( SOffset ) MIB . addReg ( SOffset ) ; else MIB . addImm ( <NUM_LIT> ) ;

} , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Offset ) ; } , addZeroImm , addZeroImm , addZeroImm , addZeroImm , addZeroImm } } ;


<s> if ( ! selectMUBUFOffsetImpl ( Root , RSrcReg , SOffset , Offset ) ) return { } ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( RSrcReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {

if ( SOffset ) MIB . addReg ( SOffset ) ;


<s> Offset = AddrData . Offset ; MachineIRBuilder B ( * Root . getParent ( ) ) ; RSrcReg = buildOffsetSrc ( B , * MRI , TII , SRDPtr ) ;

splitIllegalMUBUFOffset ( B , SOffset , Offset ) ;


<s> bool <ISA_LIT>InstructionSelector :: selectMUBUFOffsetImpl ( MachineOperand & Root , Register & RSrcReg , Register & SOffset , int64_t & Offset ) const { MUBUFAddressData AddrData = parseMUBUFAddress ( Root . getReg ( ) ) ; if ( shouldUseAddr64 ( AddrData ) ) return false ;


<s> } , [ = ] ( MachineInstrBuilder & MIB ) { const MachineMemOperand * MMO = * MI -> memoperands_begin ( ) ; const MachinePointerInfo & PtrInfo = MMO -> getPointerInfo ( ) ; if ( isStackPtrRelative ( PtrInfo ) ) MIB . addReg ( Info -> getStackPtrOffsetReg ( ) ) ; else MIB . addImm ( <NUM_LIT> ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Offset & <NUM_LIT> ) ; } } } ; } assert ( Offset == <NUM_LIT> || Offset == - <NUM_LIT> ) ; Optional < int > FI ; Register VAddr = Root . getReg ( ) ; if ( const MachineInstr * RootDef = MRI -> getVRegDef ( Root . getReg ( ) ) ) { if ( isBaseWithConstantOffset ( Root , * MRI ) ) { const MachineOperand & LHS = RootDef -> getOperand ( <NUM_LIT> ) ; const MachineOperand & RHS = RootDef -> getOperand ( <NUM_LIT> ) ; const MachineInstr * LHSDef = MRI -> getVRegDef ( LHS . getReg ( ) ) ; const MachineInstr * RHSDef = MRI -> getVRegDef ( RHS . getReg ( ) ) ; if ( LHSDef && RHSDef ) { int64_t PossibleOffset = RHSDef -> getOperand ( <NUM_LIT> ) . getCImm ( ) -> getSExtValue ( ) ; if ( <ISA_LIT>InstrInfo :: isLegalMUBUFImmOffset ( PossibleOffset ) && ( ! STI . privateMemoryResourceIsRangeChecked ( ) || KnownBits -> signBitIsZero ( LHS . getReg ( ) ) ) ) { if ( LHSDef -> getOpcode ( ) == <STR_LIT> ) FI = LHSDef -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; else VAddr = LHS . getReg ( ) ; Offset = PossibleOffset ; } } } else if ( RootDef -> getOpcode ( ) == <STR_LIT> ) { FI = RootDef -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; } } return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Info -> getScratchRSrcReg ( ) ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {

if ( FI . hasValue ( ) ) MIB . addFrameIndex ( FI . getValue ( ) ) ;


<s> MachineBasicBlock * MBB = MI -> getParent ( ) ; int64_t Offset = <NUM_LIT> ; if ( ! mi_match ( Root . getReg ( ) , * MRI , m_ICst ( Offset ) ) || ! <ISA_LIT>InstrInfo :: isLegalMUBUFImmOffset ( Offset ) ) return { } ; const MachineFunction * MF = MBB -> getParent ( ) ; const <ISA_LIT>MachineFunctionInfo * Info = MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const MachineMemOperand * MMO = * MI -> memoperands_begin ( ) ; const MachinePointerInfo & PtrInfo = MMO -> getPointerInfo ( ) ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Info -> getScratchRSrcReg ( ) ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { if ( isStackPtrRelative ( PtrInfo ) ) MIB . addReg ( Info -> getStackPtrOffsetReg ( ) ) ; else MIB . addImm ( <NUM_LIT> ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Offset ) ; }


<s> if ( DefTy == LLT :: scalar ( <NUM_LIT> ) ) { if ( ! AllowRiskySelect ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; } const RegClassOrRegBank & RegClassOrBank = MRI -> getRegClassOrRegBank ( DefReg ) ; const TargetRegisterClass * DefRC = RegClassOrBank . dyn_cast < const TargetRegisterClass * > ( ) ; if ( ! DefRC ) { if ( ! DefTy . isValid ( ) ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; }

const RegisterBank & RB = * RegClassOrBank . get < const RegisterBank * > ( ) ;


return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( * EncodedImm ) ; } } } ;


<s> Optional < uint64_t > OffsetVal = getConstantZext32Val ( Root . getReg ( ) , * MRI ) ; if ( ! OffsetVal ) return { } ; Optional < int64_t > EncodedImm = <STR_LIT> ( STI , * OffsetVal , true ) ; if ( ! EncodedImm ) return { } ;


<s> Optional < int64_t > EncodedImm = <STR_LIT> ( STI , * OffsetVal ) ; if ( ! EncodedImm ) return { } ;


<s> if ( ! EncodedImm ) return { } ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( * EncodedImm ) ; } } } ;


<s> Optional < int64_t > EncodedImm = <STR_LIT> ( STI , GEPInfo . Imm , false ) ; if ( ! EncodedImm ) return None ; unsigned PtrReg = GEPInfo . SgprParts [ <NUM_LIT> ] ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( PtrReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( * EncodedImm ) ; } } } ;


<s> if ( ! EncodedImm ) return None ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( PtrReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( * EncodedImm ) ; } } } ;


<s> Register PtrReg = GEPInfo . SgprParts [ <NUM_LIT> ] ; Register OffsetReg = MRI -> createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( * MBB , MI , MI -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , OffsetReg ) . addImm ( GEPInfo . Imm ) ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( PtrReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( OffsetReg ) ;


<s> getAddrModeInfo ( * MI , * MRI , AddrInfo ) ; if ( AddrInfo . empty ( ) || AddrInfo [ <NUM_LIT> ] . SgprParts . size ( ) != <NUM_LIT> ) return None ; const GEPInfo & GEPInfo = AddrInfo [ <NUM_LIT> ] ; if ( ! GEPInfo . Imm || GEPInfo . Imm < <NUM_LIT> || ! isUInt < <NUM_LIT> > ( GEPInfo . Imm ) ) return None ; Register PtrReg = GEPInfo . SgprParts [ <NUM_LIT> ] ; Register OffsetReg = MRI -> createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( * MBB , MI , MI -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , OffsetReg ) . addImm ( GEPInfo . Imm ) ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( PtrReg ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {


<s> return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . add ( Root ) ;


<s> unsigned Mods ; std :: tie ( Src , Mods ) = selectVOP3ModsImpl ( Root ) ; return { {

[ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Src ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {


<s> [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Src ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Mods ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ; } } } ;


<s> [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Src ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Mods ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ; }


<s> unsigned Mods = <NUM_LIT> ; MachineInstr * MI = getDefIgnoringCopies ( Src , * MRI ) ; if ( MI && MI -> getOpcode ( ) == <STR_LIT> ) { Src = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Mods |= <STR_LIT> ; MI = getDefIgnoringCopies ( Src , * MRI ) ; } if ( MI && MI -> getOpcode ( ) == <STR_LIT> ) { Src = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Mods |= <STR_LIT> ;


<s> std :: tie ( Src , Mods ) = selectVOP3ModsImpl ( Root ) ; if ( ! TM . Options . NoNaNsFPMath && ! isKnownNeverNaN ( Src , * MRI ) ) return None ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Src ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {


<s> Register Reg = Root . getReg ( ) ; const MachineInstr * Def = getDefIgnoringCopies ( Reg , * MRI ) ;

if ( Def && ( Def -> getOpcode ( ) == <STR_LIT> || Def -> getOpcode ( ) == <STR_LIT> ) ) return { } ;


<s> Register Reg = Root . getReg ( ) ; const MachineInstr * Def = getDefIgnoringCopies ( Reg , * MRI ) ; if ( Def && ( Def -> getOpcode ( ) == <STR_LIT> || Def -> getOpcode ( ) == <STR_LIT> ) ) return { } ; return { {

[ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Reg ) ; } , } } ;


<s> InstructionSelector :: ComplexRendererFns <ISA_LIT>InstructionSelector :: selectVOP3OMods ( MachineOperand & Root ) const { return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . add ( Root ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( <NUM_LIT> ) ;


[ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Root . getReg ( ) ) ; } , [ = ] ( MachineInstrBuilder & MIB ) {


<s> InstructionSelector :: ComplexRendererFns <ISA_LIT>InstructionSelector :: selectVOP3PMods ( MachineOperand & Root ) const { MachineRegisterInfo & MRI = Root . getParent ( ) -> getParent ( ) -> getParent ( ) -> getRegInfo ( ) ; Register Src ; unsigned Mods ;

std :: tie ( Src , Mods ) = selectVOP3PModsImpl ( Root . getReg ( ) , MRI ) ;


<s> MachineRegisterInfo & MRI = Root . getParent ( ) -> getParent ( ) -> getParent ( ) -> getRegInfo ( ) ; Register Src ; unsigned Mods ; std :: tie ( Src , Mods ) = selectVOP3PModsImpl ( Root . getReg ( ) , MRI ) ; return { { [ = ] ( MachineInstrBuilder & MIB ) { MIB . addReg ( Src ) ; } , [ = ] ( MachineInstrBuilder & MIB ) { MIB . addImm ( Mods ) ;


<s> MachineInstr * MI = MRI . getVRegDef ( Src ) ; if ( MI && MI -> getOpcode ( ) == <STR_LIT> && MRI . getType ( Src ) == LLT :: vector ( <NUM_LIT> , <NUM_LIT> ) ) {


<s> MachineInstr * MI = MRI . getVRegDef ( Src ) ; if ( MI && MI -> getOpcode ( ) == <STR_LIT> && MRI . getType ( Src ) == LLT :: vector ( <NUM_LIT> , <NUM_LIT> ) ) { Mods ^= ( <STR_LIT> | <STR_LIT> ) ;

Src = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> InstructionSelector :: ComplexRendererFns <ISA_LIT>InstructionSelector :: selectVSRC0 ( MachineOperand & Root ) const { return { { [ = ] ( MachineInstrBuilder & MIB ) {


<s> void <ISA_LIT>InstructionSelector :: setupMF ( MachineFunction & MF , GISelKnownBits & KB , CodeGenCoverage & CoverageInfo ) { MRI = & MF . getRegInfo ( ) ; InstructionSelector :: setupMF ( MF , KB , CoverageInfo ) ;


<s> InstructionSelector :: setupMF ( MF , KB , CoverageInfo ) ;


<s> Mask = maskTrailingOnes < unsigned > ( Size ) ; int SignedMask = static_cast < int > ( Mask ) ; return SignedMask >= - <NUM_LIT> && SignedMask <= <NUM_LIT> ;


<s> return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; default : if ( Size < <NUM_LIT> ) return <STR_LIT> ; if ( Size > <NUM_LIT> ) return - <NUM_LIT> ; return sizeToSubRegIndex ( PowerOf2Ceil ( Size ) ) ;


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> SOffset = MRI -> createVirtualRegister ( & <STR_LIT> ) ; B . buildInstr ( <STR_LIT> ) . addDef ( SOffset ) . addImm ( ImmOffset ) ;


<s> Function * <ISA_LIT>IntrinsicInfo :: getDeclaration ( Module * M , unsigned IntrID , Type * * Tys , unsigned numTys ) const {


<s> Function * <ISA_LIT>IntrinsicInfo :: getDeclaration ( Module * M , unsigned IntrID , Type * * Tys , unsigned numTys ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> return nullptr ; } assert ( IntrID < <STR_LIT> && <STR_LIT> ) ; std :: string Result ( IntrinsicNameTable [ IntrID - <STR_LIT> ] ) ; return Result ;


<s> static const char * const names [ ] = { } ; if ( IntrID < <STR_LIT> ) { return nullptr ;


<s> Function * <ISA_LIT>IntrinsicInfo :: getDeclaration ( Module * M , unsigned IntrID , ArrayRef < Type * > Tys ) const {

FunctionType * FTy = getType ( M -> getContext ( ) , IntrID , Tys ) ;


<s> switch ( ID ) { case <STR_LIT> : { Type * F32Ty = Type :: getFloatTy ( Context ) ; return FunctionType :: get ( F32Ty , { F32Ty , F32Ty } , false ) ;


<s> FunctionType * FTy = getType ( M -> getContext ( ) , IntrID , Tys ) ; Function * F = cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID , Tys ) , FTy ) ) ; AttributeList AS = getAttributes ( M -> getContext ( ) , static_cast < <STR_LIT> > ( IntrID ) ) ; F -> setAttributes ( AS ) ; return F ;


<s> StringRef <ISA_LIT>IntrinsicInfo :: getName ( unsigned IntrID , ArrayRef < Type * > Tys ) const { if ( IntrID < <STR_LIT> ) return StringRef ( ) ;

assert ( IntrID < <STR_LIT> && <STR_LIT> ) ;


<s> <ISA_LIT>IntrinsicInfo :: <ISA_LIT>IntrinsicInfo ( ) : TargetIntrinsicInfo ( ) {


<s> Function * <ISA_LIT>IntrinsicInfo :: getDeclaration ( Module * M , unsigned IntrID , Type * * Tys , unsigned NumTys ) const {

return getDeclaration ( M , IntrID , makeArrayRef ( Tys , NumTys ) ) ;


<s> return getDeclaration ( M , IntrID , makeArrayRef ( Tys , NumTys ) ) ;


<s> FunctionType * <ISA_LIT>IntrinsicInfo :: getType ( LLVMContext & Context , unsigned ID , ArrayRef < Type * > Tys ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> bool <ISA_LIT>IntrinsicInfo :: isOverloaded ( unsigned id ) const {


<s> StringRef Name ( NameData , Len ) ; if ( ! Name . startswith ( <STR_LIT> ) ) return <NUM_LIT> ; int Idx = <STR_LIT> ( IntrinsicNameTable , Name ) ; if ( Idx >= <NUM_LIT> ) { bool IsPrefixMatch = Name . size ( ) > strlen ( IntrinsicNameTable [ Idx ] ) ; return IsPrefixMatch == isOverloaded ( Idx + <NUM_LIT> ) ? <STR_LIT> + Idx : <NUM_LIT> ; } return <NUM_LIT> ;


<s> <ISA_LIT>DAGToDAGISel :: <ISA_LIT>DAGToDAGISel ( TargetMachine & TM ) : SelectionDAGISel ( TM ) {


<s> if ( PointerType * PT = dyn_cast < PointerType > ( Op -> getValue ( ) -> getType ( ) ) ) return PT -> getAddressSpace ( ) == <ISA_LIT>AS :: PRIVATE_ADDRESS ; return false ;


<s> bool <ISA_LIT>DAGToDAGISel :: checkPrivateAddress ( const MachineMemOperand * Op ) { if ( Op -> getPseudoValue ( ) ) return true ;

if ( PointerType * PT = dyn_cast < PointerType > ( Op -> getValue ( ) -> getType ( ) ) ) return PT -> getAddressSpace ( ) == <ISA_LIT>AS :: PRIVATE_ADDRESS ;


<s> assert ( AS != <NUM_LIT> && <STR_LIT> ) ; if ( ! Ptr ) return false ;

return Ptr -> getType ( ) -> getPointerAddressSpace ( ) == AS ;


<s> if ( ! Ptr ) return false ; return Ptr -> getType ( ) -> getPointerAddressSpace ( ) == AS ;


<s> return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> switch ( N -> getMachineOpcode ( ) ) { default : { const MCInstrDesc & Desc = Subtarget -> getInstrInfo ( ) -> get ( N -> getMachineOpcode ( ) ) ; unsigned OpIdx = Desc . getNumDefs ( ) + OpNo ; if ( OpIdx >= Desc . getNumOperands ( ) ) return nullptr ; int RegClass = Desc . OpInfo [ OpIdx ] . RegClass ; if ( RegClass == - <NUM_LIT> ) return nullptr ; return Subtarget -> getRegisterInfo ( ) -> getRegClass ( RegClass ) ; } case <STR_LIT> : { unsigned RCID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; const TargetRegisterClass * SuperRC = Subtarget -> getRegisterInfo ( ) -> getRegClass ( RCID ) ; SDValue SubRegOp = N -> getOperand ( OpNo + <NUM_LIT> ) ; unsigned SubRegIdx = cast < ConstantSDNode > ( SubRegOp ) -> getZExtValue ( ) ; return Subtarget -> getRegisterInfo ( ) -> getSubClassWithSubReg ( SuperRC , SubRegIdx ) ;


<s> const char * <ISA_LIT>DAGToDAGISel :: getPassName ( ) const { return <STR_LIT> ;


<s> const char * <ISA_LIT>DAGToDAGISel :: getPassName ( ) const {


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getS_BFE ( unsigned Opcode , SDLoc DL , SDValue Val , uint32_t Offset , uint32_t Width ) { uint32_t PackedVal = Offset | ( Width << <NUM_LIT> ) ; SDValue PackedConst = CurDAG -> getTargetConstant ( PackedVal , DL , <STR_LIT> ) ;

return CurDAG -> getMachineNode ( Opcode , DL , <STR_LIT> , Val , PackedConst ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getS_BFE ( unsigned Opcode , SDLoc DL , SDValue Val , uint32_t Offset , uint32_t Width ) { uint32_t PackedVal = Offset | ( Width << <NUM_LIT> ) ;

SDValue PackedConst = CurDAG -> getTargetConstant ( PackedVal , DL , <STR_LIT> ) ;


<s> const <ISA_LIT>TargetLowering & Lowering = * static_cast < const <ISA_LIT>TargetLowering * > ( getTargetLowering ( ) ) ; SDValue M0 = Lowering . copyToM0 ( * CurDAG , CurDAG -> getEntryNode ( ) , SDLoc ( N ) , CurDAG -> getTargetConstant ( - <NUM_LIT> , SDLoc ( N ) , <STR_LIT> ) ) ; SDValue Glue = M0 . getValue ( <NUM_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; for ( unsigned i = <NUM_LIT> , e = N -> getNumOperands ( ) ; i != e ; ++ i ) { Ops . push_back ( N -> getOperand ( i ) ) ; } Ops . push_back ( Glue ) ; CurDAG -> MorphNodeTo ( N , N -> getOpcode ( ) , N -> getVTList ( ) , Ops ) ;


<s> if ( CbId == - <NUM_LIT> ) return checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_ADDRESS ) ; return checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_BUFFER_0 + CbId ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: isConstantLoad ( const LoadSDNode * N , int CbId ) const { const Value * MemVal = N -> getMemOperand ( ) -> getValue ( ) ; if ( CbId == - <NUM_LIT> ) return checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_ADDRESS ) ;

return checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_BUFFER_0 + CbId ) ;


<s> if ( MMO ) { const PseudoSourceValue * PSV = MMO -> getPseudoValue ( ) ; if ( PSV && PSV -> isConstantPool ( ) ) { return true ; }


<s> if ( Subtarget -> getGeneration ( ) >= <ISA_LIT>Subtarget :: SEA_ISLANDS || Subtarget -> unsafeDSOffsetFoldingEnabled ( ) ) return true ; return CurDAG -> SignBitIsZero ( Base ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: isFlatLoad ( const LoadSDNode * N ) const {

return checkType ( N -> getMemOperand ( ) -> getValue ( ) , <ISA_LIT>AS :: FLAT_ADDRESS ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: isGlobalStore ( const StoreSDNode * N ) {

return checkType ( N -> getMemOperand ( ) -> getValue ( ) , <ISA_LIT>AS :: GLOBAL_ADDRESS ) ;


<s> const <ISA_LIT>TargetLowering * TL = static_cast < const <ISA_LIT>TargetLowering * > ( getTargetLowering ( ) ) ;

return TL -> analyzeImmediate ( N ) == <NUM_LIT> ;


<s> bool <ISA_LIT>DAGToDAGISel :: isLocalStore ( const StoreSDNode * N ) { return checkType ( N -> getMemOperand ( ) -> getValue ( ) , <ISA_LIT>AS :: LOCAL_ADDRESS ) ;


<s> return checkType ( N -> getMemOperand ( ) -> getValue ( ) , <ISA_LIT>AS :: PARAM_I_ADDRESS ) ;


<s> if ( isCPLoad ( N ) || isConstantLoad ( N , - <NUM_LIT> ) ) { return false ; } } const Value * MemVal = N -> getMemOperand ( ) -> getValue ( ) ; if ( ! checkType ( MemVal , <ISA_LIT>AS :: LOCAL_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: GLOBAL_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: FLAT_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: REGION_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: PARAM_D_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: PARAM_I_ADDRESS ) ) { return true ; }


<s> } } const Value * MemVal = N -> getMemOperand ( ) -> getValue ( ) ; if ( ! checkType ( MemVal , <ISA_LIT>AS :: LOCAL_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: GLOBAL_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: FLAT_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: REGION_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: CONSTANT_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: PARAM_D_ADDRESS ) && ! checkType ( MemVal , <ISA_LIT>AS :: PARAM_I_ADDRESS ) ) { return true ; } return false ;


<s> bool <ISA_LIT>DAGToDAGISel :: isPrivateStore ( const StoreSDNode * N ) {

const Value * MemVal = N -> getMemOperand ( ) -> getValue ( ) ;


<s> return checkType ( N -> getMemOperand ( ) -> getValue ( ) , <ISA_LIT>AS :: REGION_ADDRESS ) ;


<s> for ( SDNode & Node : CurDAG -> allnodes ( ) ) { MachineSDNode * MachineNode = dyn_cast < MachineSDNode > ( & Node ) ; if ( ! MachineNode ) continue ; SDNode * ResNode = Lowering . PostISelFolding ( MachineNode , * CurDAG ) ;


<s> LoadsToReplace . push_back ( LD ) ; } else if ( StoreSDNode * ST = dyn_cast < StoreSDNode > ( & Node ) ) { SDValue Value = ST -> getValue ( ) ; if ( Value . getValueType ( ) != <STR_LIT> || ST -> isTruncatingStore ( ) ) continue ; StoresToReplace . push_back ( ST ) ; } } for ( LoadSDNode * LD : LoadsToReplace ) { SDLoc SL ( LD ) ; SDValue NewLoad = CurDAG -> getLoad ( <STR_LIT> , SL , LD -> getChain ( ) , LD -> getBasePtr ( ) , LD -> getMemOperand ( ) ) ; SDValue BitCast = CurDAG -> getNode ( <STR_LIT> , SL , <STR_LIT> , NewLoad ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LD , <NUM_LIT> ) , NewLoad . getValue ( <NUM_LIT> ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LD , <NUM_LIT> ) , BitCast ) ; Modified = true ; }

for ( StoreSDNode * ST : StoresToReplace ) {


<s> for ( LoadSDNode * LD : LoadsToReplace ) { SDLoc SL ( LD ) ; SDValue NewLoad = CurDAG -> getLoad ( <STR_LIT> , SL , LD -> getChain ( ) , LD -> getBasePtr ( ) , LD -> getMemOperand ( ) ) ; SDValue BitCast = CurDAG -> getNode ( <STR_LIT> , SL , <STR_LIT> , NewLoad ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LD , <NUM_LIT> ) , NewLoad . getValue ( <NUM_LIT> ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LD , <NUM_LIT> ) , BitCast ) ; Modified = true ; } for ( StoreSDNode * ST : StoresToReplace ) { SDValue NewValue = CurDAG -> getNode ( <STR_LIT> , SDLoc ( ST ) , <STR_LIT> , ST -> getValue ( ) ) ; const SDValue StoreOps [ ] = { ST -> getChain ( ) , NewValue , ST -> getBasePtr ( ) , ST -> getOffset ( ) } ; CurDAG -> UpdateNodeOperands ( ST , StoreOps ) ; Modified = true ; } if ( Modified ) CurDAG -> RemoveDeadNodes ( ) ;


<s> if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) {


<s> bool <ISA_LIT>DAGToDAGISel :: SelectADDR ( SDValue Addr , SDValue & R1 , SDValue & R2 ) {

if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) {


<s> } else { R1 = Addr ; R2 = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; } } else if ( Addr . getOpcode ( ) == <STR_LIT> ) { R1 = Addr . getOperand ( <NUM_LIT> ) ; R2 = Addr . getOperand ( <NUM_LIT> ) ; } else { R1 = Addr ; R2 = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; } return true ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectADDRIndirect ( SDValue Addr , SDValue & Base , SDValue & Offset ) { ConstantSDNode * C ; SDLoc DL ( Addr ) ; if ( ( C = dyn_cast < ConstantSDNode > ( Addr ) ) ) { Base = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( C -> getZExtValue ( ) , DL , <STR_LIT> ) ; } else if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) && ( C = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) ) { Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = CurDAG -> getTargetConstant ( C -> getZExtValue ( ) , DL , <STR_LIT> ) ; } else { Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; } return true ;


<s> if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { R1 = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; R2 = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; } else { R1 = Addr ; R2 = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; } } else if ( Addr . getOpcode ( ) == <STR_LIT> ) { R1 = Addr . getOperand ( <NUM_LIT> ) ; R2 = Addr . getOperand ( <NUM_LIT> ) ; } else { R1 = Addr ; R2 = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; }


<s> unsigned SrcSize = SrcVT . getSizeInBits ( ) ; unsigned DestSize = DestVT . getSizeInBits ( ) ; if ( SrcSize > DestSize ) { assert ( SrcSize == <NUM_LIT> && DestSize == <NUM_LIT> ) ; return CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , DestVT , Src , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ) ; } if ( DestSize > SrcSize ) { assert ( SrcSize == <NUM_LIT> && DestSize == <NUM_LIT> ) ; SDValue RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; const SDValue Ops [ ] = { RC , Src , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) } ; return CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , N -> getValueType ( <NUM_LIT> ) , Ops ) ;


<s> if ( SrcSize > DestSize ) { assert ( SrcSize == <NUM_LIT> && DestSize == <NUM_LIT> ) ; return CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , DestVT , Src , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ) ; } if ( DestSize > SrcSize ) { assert ( SrcSize == <NUM_LIT> && DestSize == <NUM_LIT> ) ; SDValue RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; const SDValue Ops [ ] = { RC , Src , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ) , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) } ; return CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , N -> getValueType ( <NUM_LIT> ) , Ops ) ; } assert ( SrcSize == <NUM_LIT> && DestSize == <NUM_LIT> ) ; return CurDAG -> getNode ( <STR_LIT> , DL , DestVT , Src ) . getNode ( ) ;


<s> Offset = CurDAG -> getTargetConstant ( IMMOffset -> getZExtValue ( ) , SDLoc ( Addr ) , <STR_LIT> ) ; return true ; } else if ( ( IMMOffset = dyn_cast < ConstantSDNode > ( Addr ) ) && isInt < <NUM_LIT> > ( IMMOffset -> getZExtValue ( ) ) ) { Base = CurDAG -> getCopyFromReg ( CurDAG -> getEntryNode ( ) , SDLoc ( CurDAG -> getEntryNode ( ) ) , <STR_LIT> , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( IMMOffset -> getZExtValue ( ) , SDLoc ( Addr ) , <STR_LIT> ) ; return true ; } Base = Addr ;

Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ;


<s> } else if ( ( IMMOffset = dyn_cast < ConstantSDNode > ( Addr ) ) && isInt < <NUM_LIT> > ( IMMOffset -> getZExtValue ( ) ) ) { Base = CurDAG -> getCopyFromReg ( CurDAG -> getEntryNode ( ) , SDLoc ( CurDAG -> getEntryNode ( ) ) , <STR_LIT> , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( IMMOffset -> getZExtValue ( ) , SDLoc ( Addr ) , <STR_LIT> ) ; return true ; } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ;


<s> unsigned Opc = IsAdd ? <STR_LIT> : <STR_LIT> ; unsigned CarryOpc = IsAdd ? <STR_LIT> : <STR_LIT> ; SDNode * AddLo = CurDAG -> getMachineNode ( Opc , DL , VTList , AddLoArgs ) ; SDValue Carry ( AddLo , <NUM_LIT> ) ; SDNode * AddHi = CurDAG -> getMachineNode ( CarryOpc , DL , <STR_LIT> , SDValue ( Hi0 , <NUM_LIT> ) , SDValue ( Hi1 , <NUM_LIT> ) , Carry ) ; SDValue Args [ <NUM_LIT> ] = {

CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( AddLo , <NUM_LIT> ) , Sub0 , SDValue ( AddHi , <NUM_LIT> ) , Sub1 , } ;


<s> SDValue Ops [ <NUM_LIT> ] ; SelectVOP3Mods0 ( N -> getOperand ( <NUM_LIT> ) , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] ) ;

SelectVOP3Mods ( N -> getOperand ( <NUM_LIT> ) , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] ) ;


<s> EVT VT = N -> getValueType ( <NUM_LIT> ) ; assert ( VT == <STR_LIT> || VT == <STR_LIT> ) ; unsigned Opc = ( VT == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; SDValue Ops [ <NUM_LIT> ] ; SelectVOP3Mods0 ( N -> getOperand ( <NUM_LIT> ) , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] ) ;


<s> } } } } else if ( const ConstantSDNode * CAddr = dyn_cast < ConstantSDNode > ( Addr ) ) { SDLoc DL ( Addr ) ; if ( isUInt < <NUM_LIT> > ( CAddr -> getZExtValue ( ) ) ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; MachineSDNode * MovZero = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Zero ) ; Base = SDValue ( MovZero , <NUM_LIT> ) ; Offset = Addr ; return true ; } } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ;


<s> SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; unsigned DWordOffset0 = C1 -> getZExtValue ( ) / <NUM_LIT> ; unsigned DWordOffset1 = DWordOffset0 + <NUM_LIT> ; if ( isDSOffsetLegal ( N0 , DWordOffset1 , <NUM_LIT> ) ) { Base = N0 ; Offset0 = CurDAG -> getTargetConstant ( DWordOffset0 , DL , <STR_LIT> ) ; Offset1 = CurDAG -> getTargetConstant ( DWordOffset1 , DL , <STR_LIT> ) ; return true ; } } else if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { unsigned DWordOffset0 = C -> getZExtValue ( ) / <NUM_LIT> ; unsigned DWordOffset1 = DWordOffset0 + <NUM_LIT> ; if ( isUInt < <NUM_LIT> > ( DWordOffset0 ) ) { SDLoc DL ( Addr ) ; SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SDValue Sub = CurDAG -> getNode ( <STR_LIT> , DL , <STR_LIT> , Zero , Addr . getOperand ( <NUM_LIT> ) ) ; if ( isDSOffsetLegal ( Sub , DWordOffset1 , <NUM_LIT> ) ) { MachineSDNode * MachineSub = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Zero , Addr . getOperand ( <NUM_LIT> ) ) ; Base = SDValue ( MachineSub , <NUM_LIT> ) ; Offset0 = CurDAG -> getTargetConstant ( DWordOffset0 , DL , <STR_LIT> ) ; Offset1 = CurDAG -> getTargetConstant ( DWordOffset1 , DL , <STR_LIT> ) ; return true ; } } } } else if ( const ConstantSDNode * CAddr = dyn_cast < ConstantSDNode > ( Addr ) ) { unsigned DWordOffset0 = CAddr -> getZExtValue ( ) / <NUM_LIT> ; unsigned DWordOffset1 = DWordOffset0 + <NUM_LIT> ; assert ( <NUM_LIT> * DWordOffset0 == CAddr -> getZExtValue ( ) ) ; if ( isUInt < <NUM_LIT> > ( DWordOffset0 ) && isUInt < <NUM_LIT> > ( DWordOffset1 ) ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; MachineSDNode * MovZero = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Zero ) ; Base = SDValue ( MovZero , <NUM_LIT> ) ; Offset0 = CurDAG -> getTargetConstant ( DWordOffset0 , DL , <STR_LIT> ) ; Offset1 = CurDAG -> getTargetConstant ( DWordOffset1 , DL , <STR_LIT> ) ; return true ; } } Base = Addr ;

Offset0 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ;


<s> if ( ConstantSDNode * Cst = dyn_cast < ConstantSDNode > ( Addr ) ) { IntPtr = CurDAG -> getIntPtrConstant ( Cst -> getZExtValue ( ) / <NUM_LIT> , SDLoc ( Addr ) , true ) ; return true ; } return false ;


<s> Offset = CurDAG -> getIntPtrConstant ( <NUM_LIT> , SDLoc ( Addr ) , true ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectGlobalValueVariableOffset ( SDValue Addr , SDValue & BaseReg , SDValue & Offset ) {

if ( ! isa < ConstantSDNode > ( Addr ) ) {


<s> if ( isLegalMUBUFImmOffset ( C1 ) ) { Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } else if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) { Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ) , <NUM_LIT> ) ; return true ; } } if ( Addr . getOpcode ( ) == <STR_LIT> ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ; VAddr = N1 ;


<s> GLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; TFE = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Idxen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Offen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N2 ; VAddr = N3 ; } else { VAddr = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ; } if ( isLegalMUBUFImmOffset ( C1 ) ) { Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } else if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) { Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ) , <NUM_LIT> ) ; return true ; } } if ( Addr . getOpcode ( ) == <STR_LIT> ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ;


<s> SLC = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Addr ) , <STR_LIT> ) ; SDValue GLC , TFE ;

return SelectMUBUFAddr64 ( Addr , SRsrc , VAddr , SOffset , Offset , GLC , SLC , TFE ) ;


<s> SOffset = CurDAG -> getRegister ( Info -> getScratchWaveOffsetReg ( ) , <STR_LIT> ) ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; if ( CurDAG -> SignBitIsZero ( N0 ) ) { ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; if ( isLegalMUBUFImmOffset ( C1 ) ) { VAddr = N0 ; ImmOffset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ;


<s> switch ( NumVectorElts ) { case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> return SelectSMRDOffset ( Addr , Offset , Imm ) && Imm ;


<s> if ( Subtarget -> getGeneration ( ) != <ISA_LIT>Subtarget :: SEA_ISLANDS ) return false ; bool Imm ; if ( ! SelectSMRDOffset ( Addr , Offset , Imm ) ) return false ; return ! Imm && isa < ConstantSDNode > ( Offset ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectSMRDBufferImm32 ( SDValue Addr , SDValue & Offset ) const {

if ( Subtarget -> getGeneration ( ) != <ISA_LIT>Subtarget :: SEA_ISLANDS ) return false ;


return SelectSMRDOffset ( Addr , Offset , Imm ) && ! Imm && ! isa < ConstantSDNode > ( Offset ) ;


<s> bool Imm ; return SelectSMRD ( Addr , SBase , Offset , Imm ) && Imm ;


<s> return SelectSMRD ( Addr , SBase , Offset , Imm ) && Imm ;


<s> if ( Subtarget -> getGeneration ( ) != <ISA_LIT>Subtarget :: SEA_ISLANDS ) return false ; bool Imm ; if ( ! SelectSMRD ( Addr , SBase , Offset , Imm ) ) return false ;

return ! Imm && isa < ConstantSDNode > ( Offset ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectSMRDOffset ( SDValue ByteOffsetNode , SDValue & Offset , bool & Imm ) const { ConstantSDNode * C = dyn_cast < ConstantSDNode > ( ByteOffsetNode ) ; if ( ! C ) return false ; SDLoc SL ( ByteOffsetNode ) ; <ISA_LIT>Subtarget :: Generation Gen = Subtarget -> getGeneration ( ) ; int64_t ByteOffset = C -> getSExtValue ( ) ; int64_t EncodedOffset = Gen < <ISA_LIT>Subtarget :: VOLCANIC_ISLANDS ? ByteOffset >> <NUM_LIT> : ByteOffset ; if ( isLegalSMRDImmOffset ( Subtarget , EncodedOffset ) ) { Offset = CurDAG -> getTargetConstant ( EncodedOffset , SL , <STR_LIT> ) ; Imm = true ; return true ; } if ( ! isUInt < <NUM_LIT> > ( EncodedOffset ) || ! isUInt < <NUM_LIT> > ( ByteOffset ) ) return false ; if ( Gen == <ISA_LIT>Subtarget :: SEA_ISLANDS && isUInt < <NUM_LIT> > ( EncodedOffset ) ) {


<s> if ( isLegalSMRDImmOffset ( Subtarget , EncodedOffset ) ) { Offset = CurDAG -> getTargetConstant ( EncodedOffset , SL , <STR_LIT> ) ; Imm = true ; return true ; } if ( ! isUInt < <NUM_LIT> > ( EncodedOffset ) || ! isUInt < <NUM_LIT> > ( ByteOffset ) ) return false ; if ( Gen == <ISA_LIT>Subtarget :: SEA_ISLANDS && isUInt < <NUM_LIT> > ( EncodedOffset ) ) { Offset = CurDAG -> getTargetConstant ( EncodedOffset , SL , <STR_LIT> ) ; } else { SDValue C32Bit = CurDAG -> getTargetConstant ( ByteOffset , SL , <STR_LIT> ) ; Offset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , C32Bit ) , <NUM_LIT> ) ; }


<s> bool <ISA_LIT>DAGToDAGISel :: SelectSMRDSgpr ( SDValue Addr , SDValue & SBase , SDValue & Offset ) const {


<s> bool <ISA_LIT>DAGToDAGISel :: SelectSMRDSgpr ( SDValue Addr , SDValue & SBase , SDValue & Offset ) const { bool Imm ;

return SelectSMRD ( Addr , SBase , Offset , Imm ) && ! Imm && ! isa < ConstantSDNode > ( Offset ) ;


<s> uint32_t WidthVal = countPopulation ( MaskVal ) ; return getS_BFE ( <STR_LIT> , SDLoc ( N ) , Srl . getOperand ( <NUM_LIT> ) , ShiftVal , WidthVal ) ; } } } break ; case <STR_LIT> : if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) { const SDValue & And = N -> getOperand ( <NUM_LIT> ) ; ConstantSDNode * Shift = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; ConstantSDNode * Mask = dyn_cast < ConstantSDNode > ( And -> getOperand ( <NUM_LIT> ) ) ; if ( Shift && Mask ) { uint32_t ShiftVal = Shift -> getZExtValue ( ) ; uint32_t MaskVal = Mask -> getZExtValue ( ) >> ShiftVal ; if ( isMask_32 ( MaskVal ) ) { uint32_t WidthVal = countPopulation ( MaskVal ) ; return getS_BFE ( <STR_LIT> , SDLoc ( N ) , And . getOperand ( <NUM_LIT> ) , ShiftVal , WidthVal ) ; } } } else if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return SelectS_BFEFromShifts ( N ) ; break ; case <STR_LIT> : if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return SelectS_BFEFromShifts ( N ) ;


<s> ConstantSDNode * Mask = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; if ( Shift && Mask ) { uint32_t ShiftVal = Shift -> getZExtValue ( ) ; uint32_t MaskVal = Mask -> getZExtValue ( ) ; if ( isMask_32 ( MaskVal ) ) { uint32_t WidthVal = countPopulation ( MaskVal ) ; return getS_BFE ( <STR_LIT> , SDLoc ( N ) , Srl . getOperand ( <NUM_LIT> ) , ShiftVal , WidthVal ) ; } } } break ; case <STR_LIT> : if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) { const SDValue & And = N -> getOperand ( <NUM_LIT> ) ; ConstantSDNode * Shift = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; ConstantSDNode * Mask = dyn_cast < ConstantSDNode > ( And -> getOperand ( <NUM_LIT> ) ) ; if ( Shift && Mask ) { uint32_t ShiftVal = Shift -> getZExtValue ( ) ; uint32_t MaskVal = Mask -> getZExtValue ( ) >> ShiftVal ; if ( isMask_32 ( MaskVal ) ) { uint32_t WidthVal = countPopulation ( MaskVal ) ; return getS_BFE ( <STR_LIT> , SDLoc ( N ) , And . getOperand ( <NUM_LIT> ) , ShiftVal , WidthVal ) ; } } } else if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return SelectS_BFEFromShifts ( N ) ; break ; case <STR_LIT> : if ( N -> getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return SelectS_BFEFromShifts ( N ) ; break ; }


<s> bool Signed = N -> getOpcode ( ) == <STR_LIT> ; unsigned Opcode = Signed ? <STR_LIT> : <STR_LIT> ; return getS_BFE ( Opcode , SDLoc ( N ) , Shl . getOperand ( <NUM_LIT> ) , CVal - BVal , <NUM_LIT> - CVal ) ; }


<s> if ( Src . getOpcode ( ) == <STR_LIT> ) { Mods |= <STR_LIT> ; Src = Src . getOperand ( <NUM_LIT> ) ; } if ( Src . getOpcode ( ) == <STR_LIT> ) { Mods |= <STR_LIT> ; Src = Src . getOperand ( <NUM_LIT> ) ;


<s> Clamp = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Omod = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; return SelectVOP3Mods ( In , Src , SrcMods ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectVOP3Mods0 ( SDValue In , SDValue & Src , SDValue & SrcMods , SDValue & Clamp , SDValue & Omod ) const { SDLoc DL ( In ) ; Clamp = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Omod = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ;

return SelectVOP3Mods ( In , Src , SrcMods ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectVOP3Mods0Clamp0OMod ( SDValue In , SDValue & Src , SDValue & SrcMods , SDValue & Clamp , SDValue & Omod ) const {

Clamp = Omod = CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( In ) , <STR_LIT> ) ;


<s> bool Res = SelectVOP3Mods0 ( In , Src , SrcMods , Clamp , Omod ) ; return Res && cast < ConstantSDNode > ( SrcMods ) -> isNullValue ( ) && cast < ConstantSDNode > ( Clamp ) -> isNullValue ( ) && cast < ConstantSDNode > ( Omod ) -> isNullValue ( ) ;


<s> bool Res = SelectVOP3Mods0 ( In , Src , SrcMods , Clamp , Omod ) ;

return Res && cast < ConstantSDNode > ( SrcMods ) -> isNullValue ( ) && cast < ConstantSDNode > ( Clamp ) -> isNullValue ( ) && cast < ConstantSDNode > ( Omod ) -> isNullValue ( ) ;


<s> <ISA_LIT>DAGToDAGISel :: ~ <ISA_LIT>DAGToDAGISel ( ) {


<s> assert ( N -> getOpcode ( ) == <STR_LIT> ) ; if ( ! N -> hasOneUse ( ) ) return false ; SDValue Cond = N -> getOperand ( <NUM_LIT> ) ;

if ( Cond . getOpcode ( ) == <STR_LIT> ) Cond = Cond . getOperand ( <NUM_LIT> ) ;


<s> if ( ! N -> readMem ( ) ) return false ; if ( CbId == - <NUM_LIT> ) return N -> getAddressSpace ( ) == <ISA_LIT>AS :: CONSTANT_ADDRESS ; return N -> getAddressSpace ( ) == <ISA_LIT>AS :: CONSTANT_BUFFER_0 + CbId ;


<s> if ( It -> getOpcode ( ) == <STR_LIT> && FI -> hasOneUse ( ) ) { EffectiveFI = SDValue ( * It , <NUM_LIT> ) ; It = EffectiveFI -> use_begin ( ) ; } for ( auto It = EffectiveFI -> use_begin ( ) ; ! It . atEnd ( ) ; ) { SDUse & Use = It . getUse ( ) ; SDNode * User = Use . getUser ( ) ; unsigned OpIdx = It . getOperandNo ( ) ; ++ It ; if ( MemSDNode * M = dyn_cast < MemSDNode > ( User ) ) { unsigned PtrIdx = M -> getOpcode ( ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ; if ( OpIdx == PtrIdx ) continue ; unsigned OpN = M -> getNumOperands ( ) ; SDValue NewOps [ <NUM_LIT> ] ; assert ( OpN < array_lengthof ( NewOps ) ) ; for ( unsigned Op = <NUM_LIT> ; Op != OpN ; ++ Op ) { if ( Op != OpIdx ) { NewOps [ Op ] = M -> getOperand ( Op ) ; continue ; } MachineSDNode * Mov = CurDAG -> getMachineNode ( <STR_LIT> , SDLoc ( M ) , <STR_LIT> , FI ) ; NewOps [ Op ] = SDValue ( Mov , <NUM_LIT> ) ; }

CurDAG -> UpdateNodeOperands ( M , makeArrayRef ( NewOps , OpN ) ) ;


<s> } for ( auto It = EffectiveFI -> use_begin ( ) ; ! It . atEnd ( ) ; ) { SDUse & Use = It . getUse ( ) ; SDNode * User = Use . getUser ( ) ; unsigned OpIdx = It . getOperandNo ( ) ; ++ It ; if ( MemSDNode * M = dyn_cast < MemSDNode > ( User ) ) { unsigned PtrIdx = M -> getOpcode ( ) == <STR_LIT> ? <NUM_LIT> : <NUM_LIT> ; if ( OpIdx == PtrIdx ) continue ; unsigned OpN = M -> getNumOperands ( ) ; SDValue NewOps [ <NUM_LIT> ] ; assert ( OpN < array_lengthof ( NewOps ) ) ; for ( unsigned Op = <NUM_LIT> ; Op != OpN ; ++ Op ) { if ( Op != OpIdx ) { NewOps [ Op ] = M -> getOperand ( Op ) ; continue ; } MachineSDNode * Mov = CurDAG -> getMachineNode ( <STR_LIT> , SDLoc ( M ) , <STR_LIT> , FI ) ; NewOps [ Op ] = SDValue ( Mov , <NUM_LIT> ) ; } CurDAG -> UpdateNodeOperands ( M , makeArrayRef ( NewOps , OpN ) ) ; } } }


<s> SDValue LHS = N -> getOperand ( <NUM_LIT> ) ; SDValue RHS = N -> getOperand ( <NUM_LIT> ) ; bool IsAdd = ( N -> getOpcode ( ) == <STR_LIT> ) ; SDValue Sub0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SDValue Sub1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SDNode * Lo0 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , LHS , Sub0 ) ; SDNode * Hi0 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , LHS , Sub1 ) ; SDNode * Lo1 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , RHS , Sub0 ) ; SDNode * Hi1 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , RHS , Sub1 ) ; SDVTList VTList = CurDAG -> getVTList ( <STR_LIT> , <STR_LIT> ) ; SDValue AddLoArgs [ ] = { SDValue ( Lo0 , <NUM_LIT> ) , SDValue ( Lo1 , <NUM_LIT> ) } ; unsigned Opc = IsAdd ? <STR_LIT> : <STR_LIT> ; unsigned CarryOpc = IsAdd ? <STR_LIT> : <STR_LIT> ; SDNode * AddLo = CurDAG -> getMachineNode ( Opc , DL , VTList , AddLoArgs ) ; SDValue Carry ( AddLo , <NUM_LIT> ) ; SDNode * AddHi = CurDAG -> getMachineNode ( CarryOpc , DL , <STR_LIT> , SDValue ( Hi0 , <NUM_LIT> ) , SDValue ( Hi1 , <NUM_LIT> ) , Carry ) ;


<s> CmpVal , VAddr , SRsrc , SOffset , Offset , SLC , Mem -> getChain ( ) } ; CmpSwap = CurDAG -> getMachineNode ( Opcode , SL , Mem -> getVTList ( ) , Ops ) ; } } if ( ! CmpSwap ) { SDValue SRsrc , SOffset , Offset , SLC ; if ( SelectMUBUFOffset ( Mem -> getBasePtr ( ) , SRsrc , SOffset , Offset , SLC ) ) { unsigned Opcode = Is32 ? <STR_LIT> : <STR_LIT> ; SDValue CmpVal = Mem -> getOperand ( <NUM_LIT> ) ; SDValue Ops [ ] = { CmpVal , SRsrc , SOffset , Offset , SLC , Mem -> getChain ( ) } ; CmpSwap = CurDAG -> getMachineNode ( Opcode , SL , Mem -> getVTList ( ) , Ops ) ; }


<s> if ( isCBranchSCC ( N ) ) { SelectCode ( N ) ; return ; } SDLoc SL ( N ) ; SDNode * MaskedCond = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) , Cond ) ; SDValue VCC = CurDAG -> getCopyToReg ( N -> getOperand ( <NUM_LIT> ) , SL , <STR_LIT> , SDValue ( MaskedCond , <NUM_LIT> ) , SDValue ( ) ) ; CurDAG -> SelectNodeTo ( N , <STR_LIT> , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , VCC . getValue ( <NUM_LIT> ) , VCC . getValue ( <NUM_LIT> ) ) ;


<s> EVT VT = N -> getValueType ( <NUM_LIT> ) ; assert ( VT == <STR_LIT> || VT == <STR_LIT> ) ; unsigned Opc = ( VT == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; SDValue Ops [ <NUM_LIT> ] ; SelectVOP3Mods0 ( N -> getOperand ( <NUM_LIT> ) , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] ) ;


<s> assert ( VT == <STR_LIT> || VT == <STR_LIT> ) ; unsigned Opc = ( VT == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; SDValue Ops [ <NUM_LIT> ] ;

SelectVOP3Mods0 ( N -> getOperand ( <NUM_LIT> ) , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] , Ops [ <NUM_LIT> ] ) ;


<s> return true ; } } else if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { int64_t ByteOffset = C -> getSExtValue ( ) ; if ( isUInt < <NUM_LIT> > ( ByteOffset ) ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SDValue Sub = CurDAG -> getNode ( <STR_LIT> , DL , <STR_LIT> , Zero , Addr . getOperand ( <NUM_LIT> ) ) ; if ( isDSOffsetLegal ( Sub , ByteOffset , <NUM_LIT> ) ) { MachineSDNode * MachineSub = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Zero , Addr . getOperand ( <NUM_LIT> ) ) ;

Base = SDValue ( MachineSub , <NUM_LIT> ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: selectMOVRELDOffset ( SDValue Index , SDValue & Base , SDValue & Offset ) const { return selectMOVRELOffsetImpl ( Index , Base , Offset , true ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: selectMOVRELDOffset ( SDValue Index , SDValue & Base , SDValue & Offset ) const {

return selectMOVRELOffsetImpl ( Index , Base , Offset , true ) ;


<s> SDLoc DL ( Index ) ; if ( CurDAG -> isBaseWithConstantOffset ( Index ) ) { SDValue N0 = Index . getOperand ( <NUM_LIT> ) ; SDValue N1 = Index . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; Base = N0 ; Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } if ( IsInsert ) { if ( ConstantSDNode * CBase = dyn_cast < ConstantSDNode > ( Index ) ) {

Base = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ;


<s> SDLoc DL ( Index ) ; if ( CurDAG -> isBaseWithConstantOffset ( Index ) ) { SDValue N0 = Index . getOperand ( <NUM_LIT> ) ; SDValue N1 = Index . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; Base = N0 ; Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } if ( IsInsert ) { if ( ConstantSDNode * CBase = dyn_cast < ConstantSDNode > ( Index ) ) { Base = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; Offset = CurDAG -> getTargetConstant ( CBase -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } } else { if ( isa < ConstantSDNode > ( Index ) ) return false ; } Base = Index ;

Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: selectMOVRELSOffset ( SDValue Index , SDValue & Base , SDValue & Offset ) const {

return selectMOVRELOffsetImpl ( Index , Base , Offset , false ) ;


<s> Idxen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Offen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N2 ; VAddr = N3 ; } else { VAddr = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ; } if ( isLegalMUBUFImmOffset ( C1 ) ) { Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) { Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ;

SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ) , <NUM_LIT> ) ;


<s> SDLoc DL ( Addr ) ; if ( ! GLC . getNode ( ) ) GLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( ! SLC . getNode ( ) ) SLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; TFE = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Idxen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Offen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N2 ; VAddr = N3 ; } else { VAddr = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ; } if ( isLegalMUBUFImmOffset ( C1 ) ) { Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) { Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ) , <NUM_LIT> ) ; return true ; } } if ( Addr . getOpcode ( ) == <STR_LIT> ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ;


<s> } if ( Overflow > <NUM_LIT> && Subtarget -> getGeneration ( ) <= <ISA_LIT>Subtarget :: SEA_ISLANDS ) return false ; ImmOffset = CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ; if ( Overflow <= <NUM_LIT> ) SOffset = CurDAG -> getTargetConstant ( Overflow , DL , <STR_LIT> ) ;

else SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Overflow , DL , <STR_LIT> ) ) , <NUM_LIT> ) ;


<s> } else { uint32_t High = ( Imm + <NUM_LIT> ) & ~ <NUM_LIT> ; uint32_t Low = ( Imm + <NUM_LIT> ) & <NUM_LIT> ; Imm = Low ; Overflow = High - <NUM_LIT> ; } } if ( Overflow > <NUM_LIT> && Subtarget -> getGeneration ( ) <= <ISA_LIT>Subtarget :: SEA_ISLANDS ) return false ; ImmOffset = CurDAG -> getTargetConstant ( Imm , DL , <STR_LIT> ) ; if ( Overflow <= <NUM_LIT> ) SOffset = CurDAG -> getTargetConstant ( Overflow , DL , <STR_LIT> ) ; else SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Overflow , DL , <STR_LIT> ) ) , <NUM_LIT> ) ;


<s> SDLoc DL ( Addr ) ; MachineFunction & MF = CurDAG -> getMachineFunction ( ) ; const <ISA_LIT>MachineFunctionInfo * Info = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; Rsrc = CurDAG -> getRegister ( Info -> getScratchRSrcReg ( ) , <STR_LIT> ) ; SOffset = CurDAG -> getRegister ( Info -> getScratchWaveOffsetReg ( ) , <STR_LIT> ) ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { SDValue N0 = Addr . getOperand ( <NUM_LIT> ) ; SDValue N1 = Addr . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ;


<s> auto Ld = cast < LoadSDNode > ( N ) ; return Ld -> getAlignment ( ) >= <NUM_LIT> && ( ( ( Ld -> getAddressSpace ( ) == <ISA_LIT>AS :: CONSTANT_ADDRESS || Ld -> getAddressSpace ( ) == <ISA_LIT>AS :: CONSTANT_ADDRESS_32BIT ) && ! N -> isDivergent ( ) ) || ( Subtarget -> getScalarizeGlobalBehavior ( ) && Ld -> getAddressSpace ( ) == <ISA_LIT>AS :: GLOBAL_ADDRESS && ! Ld -> isVolatile ( ) && ! N -> isDivergent ( ) && static_cast < const <ISA_LIT>TargetLowering * > ( getTargetLowering ( ) ) -> isMemOpHasNoClobberedMemOperand ( N ) ) ) ;


<s> AllUsesAcceptSReg = false ; SDNode * User = * U ; if ( User -> isMachineOpcode ( ) ) { unsigned Opc = User -> getMachineOpcode ( ) ; MCInstrDesc Desc = <ISA_LIT>I -> get ( Opc ) ; if ( Desc . isCommutable ( ) ) { unsigned OpIdx = Desc . getNumDefs ( ) + U . getOperandNo ( ) ; unsigned CommuteIdx1 = TargetInstrInfo :: CommuteAnyOperandIndex ; if ( <ISA_LIT>I -> findCommutedOpIndices ( Desc , OpIdx , CommuteIdx1 ) ) { unsigned CommutedOpNo = CommuteIdx1 - Desc . getNumDefs ( ) ; const TargetRegisterClass * CommutedRC = getOperandRegClass ( * U , CommutedOpNo ) ; if ( CommutedRC == & <STR_LIT> ) AllUsesAcceptSReg = true ; } }


<s> const MachineFunction & MF = CurDAG -> getMachineFunction ( ) ; const <ISA_LIT>MachineFunctionInfo * Info = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; if ( auto FI = dyn_cast < FrameIndexSDNode > ( N ) ) {

SDValue TFI = CurDAG -> getTargetFrameIndex ( FI -> getIndex ( ) , FI -> getValueType ( <NUM_LIT> ) ) ;


<s> if ( auto FI = dyn_cast < FrameIndexSDNode > ( N ) ) { SDValue TFI = CurDAG -> getTargetFrameIndex ( FI -> getIndex ( ) , FI -> getValueType ( <NUM_LIT> ) ) ; return std :: make_pair ( TFI , CurDAG -> getRegister ( Info -> getStackPtrOffsetReg ( ) , <STR_LIT> ) ) ; }

return std :: make_pair ( N , CurDAG -> getRegister ( Info -> getScratchWaveOffsetReg ( ) , <STR_LIT> ) ) ;


<s> SDValue <ISA_LIT>DAGToDAGISel :: getHi16Elt ( SDValue In ) const { if ( In . isUndef ( ) ) return CurDAG -> getUNDEF ( <STR_LIT> ) ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( In ) ) { SDLoc SL ( In ) ; return CurDAG -> getConstant ( C -> getZExtValue ( ) << <NUM_LIT> , SL , <STR_LIT> ) ; } if ( ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( In ) ) { SDLoc SL ( In ) ;

return CurDAG -> getConstant ( C -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) << <NUM_LIT> , SL , <STR_LIT> ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: glueCopyToM0 ( SDNode * N , SDValue Val ) const { const <ISA_LIT>TargetLowering & Lowering = * static_cast < const <ISA_LIT>TargetLowering * > ( getTargetLowering ( ) ) ; assert ( N -> getOperand ( <NUM_LIT> ) . getValueType ( ) == <STR_LIT> && <STR_LIT> ) ; SDValue M0 = Lowering . copyToM0 ( * CurDAG , N -> getOperand ( <NUM_LIT> ) , SDLoc ( N ) , Val ) ; SDValue Glue = M0 . getValue ( <NUM_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ;


<s> if ( ( OffsetBits == <NUM_LIT> && ! isUInt < <NUM_LIT> > ( Offset ) ) || ( OffsetBits == <NUM_LIT> && ! isUInt < <NUM_LIT> > ( Offset ) ) ) return false ; if ( Subtarget -> getGeneration ( ) >= <ISA_LIT>Subtarget :: SEA_ISLANDS || Subtarget -> unsafeDSOffsetFoldingEnabled ( ) ) return true ;

return CurDAG -> SignBitIsZero ( Base ) ;


<s> if ( Subtarget -> getGeneration ( ) >= <ISA_LIT>Subtarget :: SEA_ISLANDS || Subtarget -> unsafeDSOffsetFoldingEnabled ( ) ) return true ;


<s> SDValue Ops [ ] = { LdHi -> getChain ( ) , LdHi -> getBasePtr ( ) , TiedIn } ; unsigned LoadOp = <STR_LIT> ; if ( LdHi -> getMemoryVT ( ) == <STR_LIT> ) { LoadOp = LdHi -> getExtensionType ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; } else { assert ( LdHi -> getMemoryVT ( ) == <STR_LIT> ) ; } SDValue NewLoadHi = CurDAG -> getMemIntrinsicNode ( LoadOp , SDLoc ( LdHi ) , VTList , Ops , LdHi -> getMemoryVT ( ) , LdHi -> getMemOperand ( ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , NewLoadHi ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LdHi , <NUM_LIT> ) , NewLoadHi . getValue ( <NUM_LIT> ) ) ; return true ; } LoadSDNode * LdLo = dyn_cast < LoadSDNode > ( stripBitcast ( Lo ) ) ; if ( LdLo && Lo . hasOneUse ( ) ) { SDValue TiedIn = getHi16Elt ( Hi ) ; if ( ! TiedIn || LdLo -> isPredecessorOf ( TiedIn . getNode ( ) ) ) return false ; SDVTList VTList = CurDAG -> getVTList ( VT , <STR_LIT> ) ; unsigned LoadOp = <STR_LIT> ; if ( LdLo -> getMemoryVT ( ) == <STR_LIT> ) { LoadOp = LdLo -> getExtensionType ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; } else { assert ( LdLo -> getMemoryVT ( ) == <STR_LIT> ) ; } TiedIn = CurDAG -> getNode ( <STR_LIT> , SDLoc ( N ) , VT , TiedIn ) ; SDValue Ops [ ] = { LdLo -> getChain ( ) , LdLo -> getBasePtr ( ) , TiedIn } ; SDValue NewLoadLo = CurDAG -> getMemIntrinsicNode ( LoadOp , SDLoc ( LdLo ) , VTList , Ops , LdLo -> getMemoryVT ( ) , LdLo -> getMemOperand ( ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , NewLoadLo ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LdLo , <NUM_LIT> ) , NewLoadLo . getValue ( <NUM_LIT> ) ) ; return true ; } return false ;


<s> LoadSDNode * LdHi = dyn_cast < LoadSDNode > ( stripBitcast ( Hi ) ) ; if ( LdHi && Hi . hasOneUse ( ) && ! LdHi -> isPredecessorOf ( Lo . getNode ( ) ) ) { SDVTList VTList = CurDAG -> getVTList ( VT , <STR_LIT> ) ; SDValue TiedIn = CurDAG -> getNode ( <STR_LIT> , SDLoc ( N ) , VT , Lo ) ; SDValue Ops [ ] = { LdHi -> getChain ( ) , LdHi -> getBasePtr ( ) , TiedIn } ; unsigned LoadOp = <STR_LIT> ; if ( LdHi -> getMemoryVT ( ) == <STR_LIT> ) { LoadOp = LdHi -> getExtensionType ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; } else { assert ( LdHi -> getMemoryVT ( ) == <STR_LIT> ) ; } SDValue NewLoadHi = CurDAG -> getMemIntrinsicNode ( LoadOp , SDLoc ( LdHi ) , VTList , Ops , LdHi -> getMemoryVT ( ) , LdHi -> getMemOperand ( ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , NewLoadHi ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LdHi , <NUM_LIT> ) , NewLoadHi . getValue ( <NUM_LIT> ) ) ; return true ; } LoadSDNode * LdLo = dyn_cast < LoadSDNode > ( stripBitcast ( Lo ) ) ; if ( LdLo && Lo . hasOneUse ( ) ) { SDValue TiedIn = getHi16Elt ( Hi ) ; if ( ! TiedIn || LdLo -> isPredecessorOf ( TiedIn . getNode ( ) ) ) return false ; SDVTList VTList = CurDAG -> getVTList ( VT , <STR_LIT> ) ; unsigned LoadOp = <STR_LIT> ; if ( LdLo -> getMemoryVT ( ) == <STR_LIT> ) { LoadOp = LdLo -> getExtensionType ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; } else { assert ( LdLo -> getMemoryVT ( ) == <STR_LIT> ) ; } TiedIn = CurDAG -> getNode ( <STR_LIT> , SDLoc ( N ) , VT , TiedIn ) ; SDValue Ops [ ] = { LdLo -> getChain ( ) , LdLo -> getBasePtr ( ) , TiedIn } ; SDValue NewLoadLo = CurDAG -> getMemIntrinsicNode ( LoadOp , SDLoc ( LdLo ) , VTList , Ops , LdLo -> getMemoryVT ( ) , LdLo -> getMemOperand ( ) ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , NewLoadLo ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( LdLo , <NUM_LIT> ) , NewLoadLo . getValue ( <NUM_LIT> ) ) ; return true ; } return false ;


<s> bool MadeChange = false ; while ( Position != CurDAG -> allnodes_begin ( ) ) { SDNode * N = & * -- Position ; if ( N -> use_empty ( ) ) continue ; switch ( N -> getOpcode ( ) ) {


<s> if ( Cond . isUndef ( ) ) { CurDAG -> SelectNodeTo ( N , <STR_LIT> , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) ) ; return ; } const GCNSubtarget * ST = static_cast < const GCNSubtarget * > ( Subtarget ) ; const <ISA_LIT>RegisterInfo * TRI = ST -> getRegisterInfo ( ) ; bool UseSCCBr = isCBranchSCC ( N ) && isUniformBr ( N ) ; unsigned BrOp = UseSCCBr ? <STR_LIT> : <STR_LIT> ; unsigned CondReg = UseSCCBr ? ( unsigned ) <STR_LIT> : TRI -> getVCC ( ) ; SDLoc SL ( N ) ; if ( ! UseSCCBr ) { Cond = SDValue ( CurDAG -> getMachineNode ( ST -> isWave32 ( ) ? <STR_LIT> : <STR_LIT> , SL , <STR_LIT> , CurDAG -> getRegister ( ST -> isWave32 ( ) ? <STR_LIT> : <STR_LIT> , <STR_LIT> ) , Cond ) , <NUM_LIT> ) ;


<s> Opnds . push_back ( Zero ) ; Opnds . push_back ( Addr . getOperand ( <NUM_LIT> ) ) ; unsigned SubOp = <STR_LIT> ; if ( Subtarget -> hasAddNoCarry ( ) ) { SubOp = <STR_LIT> ; Opnds . push_back ( CurDAG -> getTargetConstant ( <NUM_LIT> , { } , <STR_LIT> ) ) ; } MachineSDNode * MachineSub = CurDAG -> getMachineNode ( SubOp , DL , <STR_LIT> , Opnds ) ; Base = SDValue ( MachineSub , <NUM_LIT> ) ; Offset = CurDAG -> getTargetConstant ( ByteOffset , DL , <STR_LIT> ) ; return true ; } } } } else if ( const ConstantSDNode * CAddr = dyn_cast < ConstantSDNode > ( Addr ) ) { SDLoc DL ( Addr ) ; if ( isUInt < <NUM_LIT> > ( CAddr -> getZExtValue ( ) ) ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; MachineSDNode * MovZero = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Zero ) ; Base = SDValue ( MovZero , <NUM_LIT> ) ;

Offset = CurDAG -> getTargetConstant ( CAddr -> getZExtValue ( ) , DL , <STR_LIT> ) ;


<s> SDValue Chain = N -> getOperand ( <NUM_LIT> ) ; SDValue Ptr = N -> getOperand ( <NUM_LIT> ) ; MemIntrinsicSDNode * M = cast < MemIntrinsicSDNode > ( N ) ; MachineMemOperand * MMO = M -> getMemOperand ( ) ; bool IsGDS = M -> getAddressSpace ( ) == <ISA_LIT>AS :: REGION_ADDRESS ; SDValue Offset ; if ( CurDAG -> isBaseWithConstantOffset ( Ptr ) ) { SDValue PtrBase = Ptr . getOperand ( <NUM_LIT> ) ; SDValue PtrOffset = Ptr . getOperand ( <NUM_LIT> ) ; const APInt & OffsetVal = cast < ConstantSDNode > ( PtrOffset ) -> getAPIntValue ( ) ; if ( isDSOffsetLegal ( PtrBase , OffsetVal . getZExtValue ( ) , <NUM_LIT> ) ) { N = glueCopyToM0 ( N , PtrBase ) ; Offset = CurDAG -> getTargetConstant ( OffsetVal , SDLoc ( ) , <STR_LIT> ) ;


<s> SDNode * CopyToM0 ; MemIntrinsicSDNode * M = cast < MemIntrinsicSDNode > ( N ) ; MachineMemOperand * MMO = M -> getMemOperand ( ) ; if ( ConstantSDNode * ConstOffset = dyn_cast < ConstantSDNode > ( BaseOffset ) ) { CopyToM0 = glueCopyToM0 ( N , CurDAG -> getTargetConstant ( - <NUM_LIT> , SL , <STR_LIT> ) ) ; ImmOffset = ConstOffset -> getZExtValue ( ) + <NUM_LIT> ; } else { if ( CurDAG -> isBaseWithConstantOffset ( BaseOffset ) ) { ImmOffset = BaseOffset . getConstantOperandVal ( <NUM_LIT> ) ; BaseOffset = BaseOffset . getOperand ( <NUM_LIT> ) ; } SDNode * SGPROffset = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , BaseOffset ) ; SDNode * M0Base = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , SDValue ( SGPROffset , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ) ; CopyToM0 = glueCopyToM0 ( N , SDValue ( M0Base , <NUM_LIT> ) ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectFlatOffset ( SDNode * N , SDValue Addr , SDValue & VAddr , SDValue & Offset , SDValue & SLC ) const {

return static_cast < const <ISA_LIT>TargetLowering * > ( getTargetLowering ( ) ) -> SelectFlatOffset ( IsSigned , * CurDAG , N , Addr , VAddr , Offset , SLC ) ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectINTRIN<ISA_LIT>C_VOID ( SDNode * N ) { unsigned IntrID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntrID ) { case <STR_LIT> :


<s> if ( N -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) break ; SelectDSAppendConsume ( N , IntrID ) ; return ; } } SelectCode ( N ) ;


<s> SDValue N0 = Index . getOperand ( <NUM_LIT> ) ; SDValue N1 = Index . getOperand ( <NUM_LIT> ) ; ConstantSDNode * C1 = cast < ConstantSDNode > ( N1 ) ; if ( C1 -> getSExtValue ( ) <= <NUM_LIT> || CurDAG -> SignBitIsZero ( N0 ) ) { Base = N0 ; Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } } if ( isa < ConstantSDNode > ( Index ) ) return false ; Base = Index ;


<s> if ( ! SLC . getNode ( ) ) SLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; TFE = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; DLC = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Idxen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Offen = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; ConstantSDNode * C1 = nullptr ; SDValue N0 = Addr ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { C1 = cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) N0 = Addr . getOperand ( <NUM_LIT> ) ; else C1 = nullptr ; } if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( N2 -> isDivergent ( ) ) { if ( N3 -> isDivergent ( ) ) { Ptr = SDValue ( buildSMovImm64 ( DL , <NUM_LIT> , <STR_LIT> ) , <NUM_LIT> ) ; VAddr = N0 ; } else { Ptr = N3 ; VAddr = N2 ; } } else { Ptr = N2 ; VAddr = N3 ; } Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; } else if ( N0 -> isDivergent ( ) ) {


return SelectMUBUFOffset ( Addr , SRsrc , Soffset , Offset , GLC , SLC , TFE , DLC ) ;


<s> static unsigned selectSGPRVectorRegClassID ( unsigned NumVectorElts ) { switch ( NumVectorElts ) { case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> const SDValue Ops [ ] = { CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( Lo , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( Hi , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) } ;

return CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , VT , Ops ) ;


<s> SDNode * Lo = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Imm & <NUM_LIT> , DL , <STR_LIT> ) ) ; SDNode * Hi = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Imm >> <NUM_LIT> , DL , <STR_LIT> ) ) ;


<s> static MemSDNode * findMemSDNode ( SDNode * N ) { N = <ISA_LIT>TargetLowering :: stripBitcast ( SDValue ( N , <NUM_LIT> ) ) . getNode ( ) ; if ( MemSDNode * MN = dyn_cast < MemSDNode > ( N ) ) return MN ;

assert ( isa < BuildVectorSDNode > ( N ) ) ;


<s> for ( SDValue V : N -> op_values ( ) ) if ( MemSDNode * MN = dyn_cast < MemSDNode > ( <ISA_LIT>TargetLowering :: stripBitcast ( V ) ) ) return MN ;


<s> AU . addRequired < LoopInfoWrapperPass > ( ) ; SelectionDAGISel :: getAnalysisUsage ( AU ) ;


<s> AU . addRequired < DominatorTreeWrapperPass > ( ) ;

AU . addRequired < LoopInfoWrapperPass > ( ) ;


<s> return true ; } if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( N ) ) { Out = C -> getAPIntValue ( ) . getSExtValue ( ) ; return true ; } if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) { Out = C -> getValueAPF ( ) . bitcastToAPInt ( ) . getSExtValue ( ) ;


<s> if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( N ) ) { Out = C -> getAPIntValue ( ) . getSExtValue ( ) ; return true ; } if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) { Out = C -> getValueAPF ( ) . bitcastToAPInt ( ) . getSExtValue ( ) ; return true ; }


<s> SDValue <ISA_LIT>DAGToDAGISel :: getMaterializedScalarImm32 ( int64_t Val , const SDLoc & DL ) const { SDNode * Mov = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Val , DL , <STR_LIT> ) ) ;


<s> SDNode * Mov = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( Val , DL , <STR_LIT> ) ) ; return SDValue ( Mov , <NUM_LIT> ) ;


<s> switch ( N -> getMachineOpcode ( ) ) { default : { const MCInstrDesc & Desc = Subtarget -> getInstrInfo ( ) -> get ( N -> getMachineOpcode ( ) ) ; unsigned OpIdx = Desc . getNumDefs ( ) + OpNo ; if ( OpIdx >= Desc . getNumOperands ( ) ) return nullptr ; int RegClass = Desc . OpInfo [ OpIdx ] . RegClass ; if ( RegClass == - <NUM_LIT> ) return nullptr ; return Subtarget -> getRegisterInfo ( ) -> getRegClass ( RegClass ) ; } case <STR_LIT> : { unsigned RCID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; const TargetRegisterClass * SuperRC = Subtarget -> getRegisterInfo ( ) -> getRegClass ( RCID ) ; SDValue SubRegOp = N -> getOperand ( OpNo + <NUM_LIT> ) ;

unsigned SubRegIdx = cast < ConstantSDNode > ( SubRegOp ) -> getZExtValue ( ) ;


<s> if ( N -> getOpcode ( ) == <STR_LIT> ) { unsigned Reg = cast < RegisterSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getReg ( ) ; if ( Register :: isVirtualRegister ( Reg ) ) { MachineRegisterInfo & MRI = CurDAG -> getMachineFunction ( ) . getRegInfo ( ) ; return MRI . getRegClass ( Reg ) ; } const <ISA_LIT>RegisterInfo * TRI = static_cast < const GCNSubtarget * > ( Subtarget ) -> getRegisterInfo ( ) ; return TRI -> getPhysRegClass ( Reg ) ; } return nullptr ; }


<s> SDValue M0 = Lowering . copyToM0 ( * CurDAG , N -> getOperand ( <NUM_LIT> ) , SDLoc ( N ) , Val ) ; return glueCopyToOp ( N , M0 , M0 . getValue ( <NUM_LIT> ) ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: glueCopyToM0LD<ISA_LIT>nit ( SDNode * N ) const { unsigned AS = cast < MemSDNode > ( N ) -> getAddressSpace ( ) ; if ( AS == <ISA_LIT>AS :: LOCAL_ADDRESS ) { if ( Subtarget -> ldsRequiresM0Init ( ) ) return glueCopyToM0 ( N , CurDAG -> getTargetConstant ( - <NUM_LIT> , SDLoc ( N ) , <STR_LIT> ) ) ; } else if ( AS == <ISA_LIT>AS :: REGION_ADDRESS ) { MachineFunction & MF = CurDAG -> getMachineFunction ( ) ; unsigned Value = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getGDSSize ( ) ; return glueCopyToM0 ( N , CurDAG -> getTargetConstant ( Value , SDLoc ( N ) , <STR_LIT> ) ) ; }


<s> if ( Subtarget -> ldsRequiresM0Init ( ) ) return glueCopyToM0 ( N , CurDAG -> getTargetConstant ( - <NUM_LIT> , SDLoc ( N ) , <STR_LIT> ) ) ; } else if ( AS == <ISA_LIT>AS :: REGION_ADDRESS ) { MachineFunction & MF = CurDAG -> getMachineFunction ( ) ; unsigned Value = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> getGDSSize ( ) ; return glueCopyToM0 ( N , CurDAG -> getTargetConstant ( Value , SDLoc ( N ) , <STR_LIT> ) ) ; }


<s> SDNode * <ISA_LIT>DAGToDAGISel :: glueCopyToOp ( SDNode * N , SDValue NewChain , SDValue Glue ) const { SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( NewChain ) ; for ( unsigned i = <NUM_LIT> , e = N -> getNumOperands ( ) ; i != e ; ++ i ) Ops . push_back ( N -> getOperand ( i ) ) ;


<s> Ops . push_back ( NewChain ) ; for ( unsigned i = <NUM_LIT> , e = N -> getNumOperands ( ) ; i != e ; ++ i ) Ops . push_back ( N -> getOperand ( i ) ) ; Ops . push_back ( Glue ) ; return CurDAG -> MorphNodeTo ( N , N -> getOpcode ( ) , N -> getVTList ( ) , Ops ) ;


<s> if ( ( OffsetBits == <NUM_LIT> && ! isUInt < <NUM_LIT> > ( Offset ) ) || ( OffsetBits == <NUM_LIT> && ! isUInt < <NUM_LIT> > ( Offset ) ) ) return false ;

if ( Subtarget -> hasUsableDSOffset ( ) || Subtarget -> unsafeDSOffsetFoldingEnabled ( ) ) return true ;


<s> if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getAPIntValue ( ) ) ;

if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getValueAPF ( ) . bitcastToAPInt ( ) ) ;


<s> if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) return TII -> isInlineConstant ( - C -> getValueAPF ( ) . bitcastToAPInt ( ) ) ; } else { if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getAPIntValue ( ) ) ; if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getValueAPF ( ) . bitcastToAPInt ( ) ) ; }


<s> static bool isNullConstantOrUndef ( SDValue V ) {


<s> if ( V . isUndef ( ) ) return true ; ConstantSDNode * Const = dyn_cast < ConstantSDNode > ( V ) ;

return Const != nullptr && Const -> isNullValue ( ) ;


<s> assert ( N -> getOpcode ( ) == <STR_LIT> && N -> getNumOperands ( ) == <NUM_LIT> ) ; uint32_t LHSVal , RHSVal ; if ( getConstantValue ( N -> getOperand ( <NUM_LIT> ) , LHSVal ) && getConstantValue ( N -> getOperand ( <NUM_LIT> ) , RHSVal ) ) { SDLoc SL ( N ) ; uint32_t K = Negate ? ( - LHSVal & <NUM_LIT> ) | ( - RHSVal << <NUM_LIT> ) : ( LHSVal & <NUM_LIT> ) | ( RHSVal << <NUM_LIT> ) ;

return DAG . getMachineNode ( <STR_LIT> , SL , N -> getValueType ( <NUM_LIT> ) , DAG . getTargetConstant ( K , SL , <STR_LIT> ) ) ;


<s> if ( getConstantValue ( N -> getOperand ( <NUM_LIT> ) , LHSVal ) && getConstantValue ( N -> getOperand ( <NUM_LIT> ) , RHSVal ) ) { SDLoc SL ( N ) ; uint32_t K = Negate ? ( - LHSVal & <NUM_LIT> ) | ( - RHSVal << <NUM_LIT> ) : ( LHSVal & <NUM_LIT> ) | ( RHSVal << <NUM_LIT> ) ;


<s> static SDNode * packNegConstantV2I16 ( const SDNode * N , SelectionDAG & DAG ) {

return packConstantV2I16 ( N , DAG , true ) ;


<s> return packConstantV2I16 ( N , DAG , true ) ;


<s> assert ( L -> isLCSSAForm ( DT ) ) ; } Subtarget = & MF . getSubtarget < GCNSubtarget > ( ) ; Mode = <STR_LIT> ( MF . getFunction ( ) , * Subtarget ) ; return SelectionDAGISel :: runOnMachineFunction ( MF ) ;


<s> case <STR_LIT> : { SelectFMA_W_CHAIN ( N ) ; return ; } case <STR_LIT> : case <STR_LIT> : { EVT VT = N -> getValueType ( <NUM_LIT> ) ; unsigned NumVectorElts = VT . getVectorNumElements ( ) ; if ( VT . getScalarSizeInBits ( ) == <NUM_LIT> ) { if ( Opc == <STR_LIT> && NumVectorElts == <NUM_LIT> ) { if ( SDNode * Packed = packConstantV2I16 ( N , * CurDAG ) ) { ReplaceNode ( N , Packed ) ; return ; } } break ; } assert ( VT . getVectorElementType ( ) . bitsEq ( <STR_LIT> ) ) ; unsigned RegClassID = selectSGPRVectorRegClassID ( NumVectorElts ) ; SelectBuildVector ( N , RegClassID ) ; return ; } case <STR_LIT> : { SDValue RC , SubReg0 , SubReg1 ; SDLoc DL ( N ) ; if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; } else if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; } else { llvm_unreachable ( <STR_LIT> ) ; } const SDValue Ops [ ] = { RC , N -> getOperand ( <NUM_LIT> ) , SubReg0 , N -> getOperand ( <NUM_LIT> ) , SubReg1 } ; ReplaceNode ( N , CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , N -> getValueType ( <NUM_LIT> ) , Ops ) ) ; return ; } case <STR_LIT> : case <STR_LIT> : { if ( N -> getValueType ( <NUM_LIT> ) . getSizeInBits ( ) != <NUM_LIT> || isInlineImmediate ( N ) ) break ; uint64_t Imm ; if ( ConstantFPSDNode * FP = dyn_cast < ConstantFPSDNode > ( N ) ) Imm = FP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ; else { ConstantSDNode * C = cast < ConstantSDNode > ( N ) ; Imm = C -> getZExtValue ( ) ;


<s> assert ( HasVSrc || N -> getNumOperands ( ) == <NUM_LIT> ) ; SDLoc SL ( N ) ; SDValue BaseOffset = N -> getOperand ( HasVSrc ? <NUM_LIT> : <NUM_LIT> ) ; int ImmOffset = <NUM_LIT> ; MemIntrinsicSDNode * M = cast < MemIntrinsicSDNode > ( N ) ; MachineMemOperand * MMO = M -> getMemOperand ( ) ; if ( ConstantSDNode * ConstOffset = dyn_cast < ConstantSDNode > ( BaseOffset ) ) { glueCopyToM0 ( N , CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ) ; ImmOffset = ConstOffset -> getZExtValue ( ) ; } else { if ( CurDAG -> isBaseWithConstantOffset ( BaseOffset ) ) { ImmOffset = BaseOffset . getConstantOperandVal ( <NUM_LIT> ) ; BaseOffset = BaseOffset . getOperand ( <NUM_LIT> ) ; } SDNode * SGPROffset = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , BaseOffset ) ; SDNode * M0Base = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , SDValue ( SGPROffset , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ) ; glueCopyToM0 ( N , SDValue ( M0Base , <NUM_LIT> ) ) ; } SDValue Chain = N -> getOperand ( <NUM_LIT> ) ; SDValue OffsetField = CurDAG -> getTargetConstant ( ImmOffset , SL , <STR_LIT> ) ;

SDValue GDS = CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ;


<s> return ; } const bool HasVSrc = N -> getNumOperands ( ) == <NUM_LIT> ; assert ( HasVSrc || N -> getNumOperands ( ) == <NUM_LIT> ) ; SDLoc SL ( N ) ; SDValue BaseOffset = N -> getOperand ( HasVSrc ? <NUM_LIT> : <NUM_LIT> ) ; int ImmOffset = <NUM_LIT> ; MemIntrinsicSDNode * M = cast < MemIntrinsicSDNode > ( N ) ; MachineMemOperand * MMO = M -> getMemOperand ( ) ; if ( ConstantSDNode * ConstOffset = dyn_cast < ConstantSDNode > ( BaseOffset ) ) { glueCopyToM0 ( N , CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ) ; ImmOffset = ConstOffset -> getZExtValue ( ) ; } else { if ( CurDAG -> isBaseWithConstantOffset ( BaseOffset ) ) { ImmOffset = BaseOffset . getConstantOperandVal ( <NUM_LIT> ) ; BaseOffset = BaseOffset . getOperand ( <NUM_LIT> ) ; } SDNode * SGPROffset = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , BaseOffset ) ; SDNode * M0Base = CurDAG -> getMachineNode ( <STR_LIT> , SL , <STR_LIT> , SDValue ( SGPROffset , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , SL , <STR_LIT> ) ) ;

glueCopyToM0 ( N , SDValue ( M0Base , <NUM_LIT> ) ) ;


<s> SDValue Sub1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SDNode * N0Lo = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , N0 , Sub0 ) ; SDNode * N0Hi = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , N0 , Sub1 ) ; SDValue AddOffsetLo = getMaterializedScalarImm32 ( Lo_32 ( RemainderOffset ) , DL ) ; SDValue AddOffsetHi = getMaterializedScalarImm32 ( Hi_32 ( RemainderOffset ) , DL ) ; SDVTList VTs = CurDAG -> getVTList ( <STR_LIT> , <STR_LIT> ) ; SDValue Clamp = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SDNode * Add = CurDAG -> getMachineNode ( <STR_LIT> , DL , VTs , { AddOffsetLo , SDValue ( N0Lo , <NUM_LIT> ) , Clamp } ) ; SDNode * Addc = CurDAG -> getMachineNode ( <STR_LIT> , DL , VTs , { AddOffsetHi , SDValue ( N0Hi , <NUM_LIT> ) , SDValue ( Add , <NUM_LIT> ) , Clamp } ) ; SDValue RegSequenceArgs [ ] = { CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( Add , <NUM_LIT> ) , Sub0 , SDValue ( Addc , <NUM_LIT> ) , Sub1 } ; Addr = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , RegSequenceArgs ) , <NUM_LIT> ) ; } }


<s> SDValue Ops [ ] = { CurDAG -> getTargetConstant ( Src0Mods , SDLoc ( ) , <STR_LIT> ) , Src0 , CurDAG -> getTargetConstant ( Src1Mods , SDLoc ( ) , <STR_LIT> ) , Src1 , CurDAG -> getTargetConstant ( Src2Mods , SDLoc ( ) , <STR_LIT> ) , Src2 , CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( ) , <STR_LIT> ) , Zero , Zero } ; CurDAG -> SelectNodeTo ( N , IsFMA ? <STR_LIT> : <STR_LIT> , <STR_LIT> , Ops ) ; } else { SelectCode ( N ) ; }


<s> SDLoc DL ( N ) ; SDValue ToM0 = CurDAG -> getCopyToReg ( CurDAG -> getEntryNode ( ) , DL , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , SDValue ( ) ) ; SDVTList VTs = CurDAG -> getVTList ( <STR_LIT> , <STR_LIT> ) ; SDNode * InterpMov = CurDAG -> getMachineNode ( <STR_LIT> , DL , VTs , { CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , ToM0 . getValue ( <NUM_LIT> ) } ) ; SDNode * InterpP1LV = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , {

CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , SDValue ( InterpMov , <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , SDValue ( InterpMov , <NUM_LIT> ) } ) ;


<s> return ; } SDLoc DL ( N ) ; SDValue ToM0 = CurDAG -> getCopyToReg ( CurDAG -> getEntryNode ( ) , DL , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , SDValue ( ) ) ; SDVTList VTs = CurDAG -> getVTList ( <STR_LIT> , <STR_LIT> ) ; SDNode * InterpMov = CurDAG -> getMachineNode ( <STR_LIT> , DL , VTs , { CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , ToM0 . getValue ( <NUM_LIT> ) } ) ; SDNode * InterpP1LV = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , { CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , SDValue ( InterpMov , <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) , SDValue ( InterpMov , <NUM_LIT> ) } ) ; CurDAG -> ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , SDValue ( InterpP1LV , <NUM_LIT> ) ) ;


<s> unsigned IntrID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; switch ( IntrID ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SelectDS_GWS ( N , IntrID ) ; return ; default : break ; } SelectCode ( N ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SelectDS_GWS ( N , IntrID ) ; return ; default : break ;


<s> SOffset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; ConstantSDNode * C1 = nullptr ; SDValue N0 = Addr ; if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { C1 = cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) N0 = Addr . getOperand ( <NUM_LIT> ) ; else C1 = nullptr ; } if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( N2 -> isDivergent ( ) ) { if ( N3 -> isDivergent ( ) ) { Ptr = SDValue ( buildSMovImm64 ( DL , <NUM_LIT> , <STR_LIT> ) , <NUM_LIT> ) ; VAddr = N0 ; } else { Ptr = N3 ; VAddr = N2 ; } } else { Ptr = N2 ; VAddr = N3 ; } Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; } else if ( N0 -> isDivergent ( ) ) { Ptr = SDValue ( buildSMovImm64 ( DL , <NUM_LIT> , <STR_LIT> ) , <NUM_LIT> ) ;


<s> C1 = cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isUInt < <NUM_LIT> > ( C1 -> getZExtValue ( ) ) ) N0 = Addr . getOperand ( <NUM_LIT> ) ; else C1 = nullptr ; } if ( N0 . getOpcode ( ) == <STR_LIT> ) { SDValue N2 = N0 . getOperand ( <NUM_LIT> ) ; SDValue N3 = N0 . getOperand ( <NUM_LIT> ) ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; if ( N2 -> isDivergent ( ) ) { if ( N3 -> isDivergent ( ) ) { Ptr = SDValue ( buildSMovImm64 ( DL , <NUM_LIT> , <STR_LIT> ) , <NUM_LIT> ) ; VAddr = N0 ; } else { Ptr = N3 ; VAddr = N2 ; } } else { Ptr = N2 ; VAddr = N3 ; } Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; } else if ( N0 -> isDivergent ( ) ) { Ptr = SDValue ( buildSMovImm64 ( DL , <NUM_LIT> , <STR_LIT> ) , <NUM_LIT> ) ; VAddr = N0 ; Addr64 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; } else { VAddr = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; Ptr = N0 ; } if ( ! C1 ) { Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; return true ; } if ( <ISA_LIT>InstrInfo :: isLegalMUBUFImmOffset ( C1 -> getZExtValue ( ) ) ) { Offset = CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ; return true ; } Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SOffset = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getTargetConstant ( C1 -> getZExtValue ( ) , DL , <STR_LIT> ) ) , <NUM_LIT> ) ;


<s> SDValue GLC , TFE , DLC , SWZ ; return SelectMUBUFAddr64 ( Addr , SRsrc , VAddr , SOffset , Offset , GLC , SLC , TFE , DLC , SWZ ) ;


return SelectMUBUFAddr64 ( Addr , SRsrc , VAddr , SOffset , Offset , GLC , SLC , TFE , DLC , SWZ ) ;


<s> SDValue GLC , TFE , DLC , SWZ ; return SelectMUBUFOffset ( Addr , SRsrc , Soffset , Offset , GLC , SLC , TFE , DLC , SWZ ) ;


<s> switch ( NumVectorElts ) { case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectSMRDBufferImm32 ( SDValue Addr , SDValue & Offset ) const { assert ( Subtarget -> getGeneration ( ) == <ISA_LIT>Subtarget :: SEA_ISLANDS ) ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Addr ) ) { if ( auto Imm = <STR_LIT> ( * Subtarget , C -> getZExtValue ( ) ) ) {

Offset = CurDAG -> getTargetConstant ( * Imm , SDLoc ( Addr ) , <STR_LIT> ) ;


<s> bool Imm = false ; return SelectSMRD ( Addr , SBase , Offset , Imm ) && Imm ;


return SelectSMRD ( Addr , SBase , Offset , Imm ) && Imm ;


if ( ! SelectSMRD ( Addr , SBase , Offset , Imm ) ) return false ;


<s> if ( ! SelectSMRD ( Addr , SBase , Offset , Imm ) ) return false ; return ! Imm && isa < ConstantSDNode > ( Offset ) ;


<s> if ( ! C ) return false ; SDLoc SL ( ByteOffsetNode ) ; GCNSubtarget :: Generation Gen = Subtarget -> getGeneration ( ) ; uint64_t ByteOffset = C -> getZExtValue ( ) ; Optional < int64_t > EncodedOffset = <STR_LIT> ( * Subtarget , ByteOffset ) ; if ( EncodedOffset ) { Offset = CurDAG -> getTargetConstant ( * EncodedOffset , SL , <STR_LIT> ) ; Imm = true ; return true ; } if ( Gen == <ISA_LIT>Subtarget :: SEA_ISLANDS ) { EncodedOffset = <STR_LIT> ( * Subtarget , ByteOffset ) ; if ( EncodedOffset ) { Offset = CurDAG -> getTargetConstant ( * EncodedOffset , SL , <STR_LIT> ) ; return true ; }


<s> ConstantSDNode * C = dyn_cast < ConstantSDNode > ( ByteOffsetNode ) ; if ( ! C ) return false ; SDLoc SL ( ByteOffsetNode ) ; GCNSubtarget :: Generation Gen = Subtarget -> getGeneration ( ) ; uint64_t ByteOffset = C -> getZExtValue ( ) ; Optional < int64_t > EncodedOffset = <STR_LIT> ( * Subtarget , ByteOffset ) ; if ( EncodedOffset ) { Offset = CurDAG -> getTargetConstant ( * EncodedOffset , SL , <STR_LIT> ) ; Imm = true ; return true ; } if ( Gen == <ISA_LIT>Subtarget :: SEA_ISLANDS ) { EncodedOffset = <STR_LIT> ( * Subtarget , ByteOffset ) ; if ( EncodedOffset ) {


return SelectSMRD ( Addr , SBase , Offset , Imm ) && ! Imm && ! isa < ConstantSDNode > ( Offset ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( TargetMachine & TM , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( TM , OptLevel ) {


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( TargetMachine & TM , CodeGenOpt :: Level OptLevel ) { return new <ISA_LIT>DAGToDAGISel ( TM , OptLevel ) ;


<s> SDValue <ISA_LIT>DAGToDAGISel :: foldFrameIndex ( SDValue N ) const { if ( auto FI = dyn_cast < FrameIndexSDNode > ( N ) ) return CurDAG -> getTargetFrameIndex ( FI -> getIndex ( ) , FI -> getValueType ( <NUM_LIT> ) ) ; return N ;


<s> if ( N -> getOpcode ( ) == <STR_LIT> ) { unsigned Reg = cast < RegisterSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( Reg ) ) { MachineRegisterInfo & MRI = CurDAG -> getMachineFunction ( ) . getRegInfo ( ) ; return MRI . getRegClass ( Reg ) ; } const <ISA_LIT>RegisterInfo * TRI = static_cast < const <ISA_LIT>Subtarget * > ( Subtarget ) -> getRegisterInfo ( ) ; return TRI -> getPhysRegClass ( Reg ) ; } return nullptr ; }


<s> if ( VT == <STR_LIT> ) return true ; if ( VT == <STR_LIT> ) { auto ST = static_cast < const <ISA_LIT>Subtarget * > ( Subtarget ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Cond . getOperand ( <NUM_LIT> ) ) -> get ( ) ; return ( CC == <STR_LIT> || CC == <STR_LIT> ) && ST -> hasScalarCompareEq64 ( ) ; }


<s> SDValue Cond = N -> getOperand ( <NUM_LIT> ) ; if ( Cond . getOpcode ( ) == <STR_LIT> ) Cond = Cond . getOperand ( <NUM_LIT> ) ; if ( Cond . getOpcode ( ) != <STR_LIT> || ! Cond . hasOneUse ( ) ) return false ; MVT VT = Cond . getOperand ( <NUM_LIT> ) . getSimpleValueType ( ) ; if ( VT == <STR_LIT> ) return true ; if ( VT == <STR_LIT> ) { auto ST = static_cast < const <ISA_LIT>Subtarget * > ( Subtarget ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Cond . getOperand ( <NUM_LIT> ) ) -> get ( ) ; return ( CC == <STR_LIT> || CC == <STR_LIT> ) && ST -> hasScalarCompareEq64 ( ) ; } return false ;


<s> if ( const ConstantSDNode * C = dyn_cast < ConstantSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getAPIntValue ( ) ) ; if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getValueAPF ( ) . bitcastToAPInt ( ) ) ; return false ;


<s> if ( const ConstantFPSDNode * C = dyn_cast < ConstantFPSDNode > ( N ) ) return TII -> isInlineConstant ( C -> getValueAPF ( ) . bitcastToAPInt ( ) ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: isNoNanSrc ( SDValue N ) const { if ( TM . Options . NoNaNsFPMath ) return true ; if ( const auto * BO = dyn_cast < BinaryWithFlagsSDNode > ( N ) ) return BO -> Flags . hasNoNaNs ( ) ; return CurDAG -> isKnownNeverNaN ( N ) ;


<s> } SDLoc DL ( N ) ; if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; } else if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { RC = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SubReg1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; } else { llvm_unreachable ( <STR_LIT> ) ; } const SDValue Ops [ ] = { RC , N -> getOperand ( <NUM_LIT> ) , SubReg0 , N -> getOperand ( <NUM_LIT> ) , SubReg1 } ; ReplaceNode ( N , CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , N -> getValueType ( <NUM_LIT> ) , Ops ) ) ; return ; } case <STR_LIT> : case <STR_LIT> : { if ( Subtarget -> getGeneration ( ) < <ISA_LIT>Subtarget :: SOUTHERN_ISLANDS || N -> getValueType ( <NUM_LIT> ) . getSizeInBits ( ) != <NUM_LIT> || isInlineImmediate ( N ) ) break ; uint64_t Imm ; if ( ConstantFPSDNode * FP = dyn_cast < ConstantFPSDNode > ( N ) ) Imm = FP -> getValueAPF ( ) . bitcastToAPInt ( ) . getZExtValue ( ) ; else { ConstantSDNode * C = cast < ConstantSDNode > ( N ) ; Imm = C -> getZExtValue ( ) ; } SDLoc DL ( N ) ; SDNode * Lo = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getConstant ( Imm & <NUM_LIT> , DL , <STR_LIT> ) ) ; SDNode * Hi = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , CurDAG -> getConstant ( Imm >> <NUM_LIT> , DL , <STR_LIT> ) ) ; const SDValue Ops [ ] = { CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( Lo , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) , SDValue ( Hi , <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) } ; ReplaceNode ( N , CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , DL , N -> getValueType ( <NUM_LIT> ) , Ops ) ) ; return ; } case <STR_LIT> : case <STR_LIT> : { N = glueCopyToM0 ( N ) ; break ; } case <STR_LIT> : case <STR_LIT> : { if ( Subtarget -> getGeneration ( ) < <ISA_LIT>Subtarget :: SOUTHERN_ISLANDS ) break ; ConstantSDNode * Offset = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; if ( ! Offset ) break ; ConstantSDNode * Width = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; if ( ! Width ) break ; bool Signed = Opc == <STR_LIT> ;

uint32_t OffsetVal = Offset -> getZExtValue ( ) ;


<s> unsigned Opc = IsAdd ? <STR_LIT> : <STR_LIT> ; unsigned CarryOpc = IsAdd ? <STR_LIT> : <STR_LIT> ; SDNode * AddLo ; if ( ! ConsumeCarry ) { SDValue Args [ ] = { SDValue ( Lo0 , <NUM_LIT> ) , SDValue ( Lo1 , <NUM_LIT> ) } ; AddLo = CurDAG -> getMachineNode ( Opc , DL , VTList , Args ) ; } else { SDValue Args [ ] = { SDValue ( Lo0 , <NUM_LIT> ) , SDValue ( Lo1 , <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) } ; AddLo = CurDAG -> getMachineNode ( CarryOpc , DL , VTList , Args ) ; } SDValue AddHiArgs [ ] = { SDValue ( Hi0 , <NUM_LIT> ) , SDValue ( Hi1 , <NUM_LIT> ) , SDValue ( AddLo , <NUM_LIT> ) } ;

SDNode * AddHi = CurDAG -> getMachineNode ( CarryOpc , DL , VTList , AddHiArgs ) ;


<s> unsigned Opcode = N -> getOpcode ( ) ; bool ConsumeCarry = ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ; bool ProduceCarry = ConsumeCarry || Opcode == <STR_LIT> || Opcode == <STR_LIT> ; bool IsAdd = ( Opcode == <STR_LIT> || Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ; SDValue Sub0 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SDValue Sub1 = CurDAG -> getTargetConstant ( <STR_LIT> , DL , <STR_LIT> ) ; SDNode * Lo0 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , LHS , Sub0 ) ; SDNode * Hi0 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , LHS , Sub1 ) ; SDNode * Lo1 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , RHS , Sub0 ) ; SDNode * Hi1 = CurDAG -> getMachineNode ( TargetOpcode :: EXTRACT_SUBREG , DL , <STR_LIT> , RHS , Sub1 ) ; SDVTList VTList = CurDAG -> getVTList ( <STR_LIT> , <STR_LIT> ) ; unsigned Opc = IsAdd ? <STR_LIT> : <STR_LIT> ; unsigned CarryOpc = IsAdd ? <STR_LIT> : <STR_LIT> ; SDNode * AddLo ; if ( ! ConsumeCarry ) { SDValue Args [ ] = { SDValue ( Lo0 , <NUM_LIT> ) , SDValue ( Lo1 , <NUM_LIT> ) } ; AddLo = CurDAG -> getMachineNode ( Opc , DL , VTList , Args ) ; } else { SDValue Args [ ] = { SDValue ( Lo0 , <NUM_LIT> ) , SDValue ( Lo1 , <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) } ; AddLo = CurDAG -> getMachineNode ( CarryOpc , DL , VTList , Args ) ; }