<s> <ISA_LIT>AsmBackend ( Target const & T ) : MCAsmBackend ( <STR_LIT> ) {


<s> case FK_Data_4 : Size = <NUM_LIT> ; break ; case FK_Data_8 : Size = <NUM_LIT> ; break ; default : return ; } for ( unsigned i = <NUM_LIT> ; i < Size ; ++ i ) {

Data [ i + Fixup . getOffset ( ) ] |= static_cast < uint8_t > ( Value >> ( i * <NUM_LIT> ) ) ;


<s> std :: unique_ptr < MCObjectTargetWriter > createObjectTargetWriter ( ) const override {


<s> ELF<ISA_LIT>AsmBackend ( Target const & T , uint8_t OSABI ) : <ISA_LIT>AsmBackend ( T ) , OSABI ( OSABI ) {


<s> const MCFixupKindInfo & getFixupKindInfo ( MCFixupKind Kind ) const override { const static MCFixupKindInfo Infos [ <STR_LIT> ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } } ; if ( Kind < FirstTargetFixupKind ) return MCAsmBackend :: getFixupKindInfo ( Kind ) ; assert ( unsigned ( Kind - FirstTargetFixupKind ) < getNumFixupKinds ( ) && <STR_LIT> ) ;

return Infos [ Kind - FirstTargetFixupKind ] ;


<s> unsigned getNumFixupKinds ( ) const override { return <NUM_LIT> ;


<s> unsigned getNumFixupKinds ( ) const override {


<s> void relaxInstruction ( MCInst const & Inst , const MCSubtargetInfo & STI , MCInst & Res ) const override { llvm_unreachable ( <STR_LIT> ) ;


<s> return false ; } for ( uint64_t i = <NUM_LIT> ; i < Count ; i += <NUM_LIT> ) {


<s> setAvailableFeatures ( ComputeAvailableFeatures ( sti . getFeatureBits ( ) ) ) ;

MRI = Parser . getContext ( ) . getRegisterInfo ( ) ;


<s> Kind = o . Kind ; StartLoc = o . StartLoc ; EndLoc = o . EndLoc ; switch ( Kind ) { case Register : Reg = o . Reg ; break ; case Immediate : Imm = o . Imm ; break ; case Token : Tok = o . Tok ;


<s> void addExpr ( MCInst & Inst , const MCExpr * Expr ) const { if ( Expr == <NUM_LIT> ) Inst . addOperand ( MCOperand :: createImm ( <NUM_LIT> ) ) ;

else if ( const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( Expr ) ) Inst . addOperand ( MCOperand :: createImm ( CE -> getValue ( ) ) ) ;


<s> void addImmOperands ( MCInst & Inst , unsigned N ) const { assert ( N == <NUM_LIT> && <STR_LIT> ) ; addExpr ( Inst , getImm ( ) ) ;


<s> void addMemSrc10Operands ( MCInst & Inst , unsigned N ) const {


<s> void addMemSrc10PostIncOperands ( MCInst & Inst , unsigned N ) const {


<s> void addMemSrc10PreDecOperands ( MCInst & Inst , unsigned N ) const {


<s> void addMemSrc3Operands ( MCInst & Inst , unsigned N ) const { addMemSrcOperands ( Inst , N ) ;


<s> void addMemSrc3PostIncOperands ( MCInst & Inst , unsigned N ) const {


<s> void addMemSrc3PostIncOperands ( MCInst & Inst , unsigned N ) const { addMemSrcOperands ( Inst , N ) ;


<s> void addMemSrcOperands ( MCInst & Inst , unsigned N ) const { assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( getMemSrcReg ( ) ) ) ;


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ;

Inst . addOperand ( MCOperand :: createReg ( getReg ( ) ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : break ; } for ( MCInst :: iterator I = Inst . begin ( ) ; I != Inst . end ( ) ; ++ I ) {

if ( I -> isReg ( ) && ! MRC . contains ( I -> getReg ( ) ) ) {


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateImm ( const MCExpr * Val , SMLoc S , SMLoc E ) { auto Op = make_unique < <ISA_LIT>Operand > ( Immediate ) ; Op -> Imm . Val = Val ;


<s> auto Op = make_unique < <ISA_LIT>Operand > ( Immediate ) ; Op -> Imm . Val = Val ; Op -> StartLoc = S ; Op -> EndLoc = E ; return Op ;


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateMemSrc ( unsigned RegNo , const MCExpr * Offset , bool WithPreDec , bool WithPostInc , SMLoc S , SMLoc E ) { auto Op = make_unique < <ISA_LIT>Operand > ( MemSrc ) ; Op -> Mem . WithPreDec = WithPreDec ;


<s> auto Op = make_unique < <ISA_LIT>Operand > ( Register ) ;


<s> Op -> Reg . RegNum = RegNo ; Op -> StartLoc = S ; Op -> EndLoc = E ;


<s> auto Op = make_unique < <ISA_LIT>Operand > ( Token ) ; Op -> Tok . Data = Str . data ( ) ; Op -> Tok . Length = Str . size ( ) ; Op -> StartLoc = S ;


assert ( Kind == Immediate && <STR_LIT> ) ;


<s> const MCExpr * getMemSrcImm ( ) const { assert ( Kind == MemSrc && <STR_LIT> ) ; return Mem . Offset ;


<s> assert ( Kind == MemSrc && <STR_LIT> ) ; return Mem . RegNum ;


<s> MCAsmParser & getParser ( ) const { return Parser ;


<s> static bool isConst ( const MCExpr * I ) {

return I -> getKind ( ) == MCExpr :: Constant ;


<s> return I -> getKind ( ) == MCExpr :: Constant ;


<s> return isImm ( ) && isConst6 ( getImm ( ) ) ;


<s> return isImm ( ) && isField16 ( getImm ( ) ) ;


return isImm ( ) && isField16 ( getImm ( ) ) ;


return isImm ( ) && isImm10 ( getImm ( ) ) ;


return isImm ( ) && isImm12 ( getImm ( ) ) ;


<s> return isImm ( ) && isImm12 ( getImm ( ) ) ;


<s> return isImm ( ) && isImm6 ( getImm ( ) ) ;


<s> return isImm ( ) && isImm9 ( getImm ( ) ) ;


return isImm ( ) && isImm9 ( getImm ( ) ) ;


<s> bool isMemSrc10 ( ) const { if ( Kind != MemSrc || Mem . WithPreDec || Mem . WithPostInc ) {


<s> if ( Mem . WithPreDec ) { return false ; } if ( ! Mem . WithPostInc ) {


<s> return false ; } if ( ! Mem . WithPreDec ) { return false ; }


<s> bool isMemSrc3PostInc ( ) const { if ( Kind != MemSrc ) { return false ; } if ( Mem . WithPreDec ) { return false ; } if ( ! Mem . WithPostInc ) {


<s> return false ; } if ( ! Mem . WithPostInc ) { return false ; }


<s> if ( Kind != MemSrc ) { return false ; } if ( ! Mem . WithPreDec ) { return false ;


<s> bool isOff3 ( ) const { return isImm ( ) && isOff3 ( getImm ( ) ) ;


<s> return isImm ( ) && isShiftImm6 ( getImm ( ) ) ;


<s> bool isToken ( ) const { return Kind == Token ;


<s> RegisterMCAsmParser < <ISA_LIT>AsmParser > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> return false ; case Match_MissingFeature : { assert ( ErrorInfo && <STR_LIT> ) ; std :: string Msg = <STR_LIT> ; unsigned Mask = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < ( sizeof ( ErrorInfo ) * <NUM_LIT> - <NUM_LIT> ) ; ++ i ) { if ( ErrorInfo & Mask ) { Msg += <STR_LIT> ; Msg += getSubtargetFeatureName ( ErrorInfo & Mask ) ; } Mask <<= <NUM_LIT> ; } return Error ( IDLoc , Msg ) ; } case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand :


<s> bool <ISA_LIT>AsmParser :: ParseDirective ( AsmToken DirectiveID ) {


<s> if ( ! getParser ( ) . parseExpression ( EVal , E ) ) { return <STR_LIT> ( EVal , S , E ) ; }


<s> if ( ! getParser ( ) . parseExpression ( EVal , E ) ) { return <STR_LIT> ( EVal , S , E ) ;


<s> if ( ParseOperand ( Operands ) ) return true ; while ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) && getLexer ( ) . is ( AsmToken :: Comma ) ) { getLexer ( ) . Lex ( ) ; if ( ParseOperand ( Operands ) ) return true ;


<s> getLexer ( ) . Lex ( ) ; WithPostInc = true ; } if ( ! getLexer ( ) . is ( AsmToken :: Comma ) ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return nullptr ; } Parser . Lex ( ) ; std :: unique_ptr < <ISA_LIT>Operand > ImmOp = ParseImmediate ( ) ; if ( ! ImmOp ) {


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>AsmParser :: ParseMemSrc ( ) { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ; bool WithPreDec = false ; bool WithPostInc = false ; if ( getLexer ( ) . getKind ( ) == AsmToken :: Minus ) { getLexer ( ) . Lex ( ) ; WithPreDec = true ; } unsigned RegNo ; std :: unique_ptr < <ISA_LIT>Operand > RegOp = ParseRegister ( RegNo ) ; if ( ! RegOp ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return nullptr ; } RegNo = RegOp -> getReg ( ) ; if ( getLexer ( ) . getKind ( ) == AsmToken :: Plus ) { getLexer ( ) . Lex ( ) ; WithPostInc = true ; } if ( ! getLexer ( ) . is ( AsmToken :: Comma ) ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ;


<s> if ( Op ) { Operands . push_back ( std :: move ( Op ) ) ; S = Parser . getTok ( ) . getLoc ( ) ; if ( getLexer ( ) . getKind ( ) == AsmToken :: RBrac ) { Operands . push_back ( <STR_LIT> ( <STR_LIT> , S ) ) ; Parser . Lex ( ) ; } else { Error ( S , <STR_LIT> ) ;


<s> SMLoc S = Parser . getTok ( ) . getLoc ( ) ; SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ; if ( getLexer ( ) . getKind ( ) != AsmToken :: Dollar ) { return nullptr ; } getLexer ( ) . Lex ( ) ; switch ( getLexer ( ) . getKind ( ) ) { default : return nullptr ; case AsmToken :: Identifier : std :: string lowerCaseStr = getLexer ( ) . getTok ( ) . getString ( ) . lower ( ) ; RegNo = MatchRegisterName ( lowerCaseStr ) ; if ( RegNo == <NUM_LIT> ) { return nullptr ; } getLexer ( ) . Lex ( ) ; return <STR_LIT> ( RegNo , S , E ) ;


<s> std :: unique_ptr < <ISA_LIT>Operand > <ISA_LIT>AsmParser :: ParseRegister ( unsigned & RegNo ) { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ;

if ( getLexer ( ) . getKind ( ) != AsmToken :: Dollar ) {


<s> void print ( raw_ostream & OS ) const {


<s> <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) {


<s> MCInstLowering . Lower ( MI , TmpInst ) ;

EmitToStreamer ( * OutStreamer , TmpInst ) ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> bool <ISA_LIT>AsmPrinter :: lowerOperand ( const MachineOperand & MO , MCOperand & MCOp ) { <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ; return MCInstLowering . LowerMachineOperand ( MO , MCOp ) ;


<s> return MCInstLowering . LowerMachineOperand ( MO , MCOp ) ;


<s> printMemOffOperand ( MI , OpNo , O ) ;


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmMemoryOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) {


<s> printOperand ( MI , OpNo , O ) ; return false ;


<s> return ; case MachineOperand :: MO_MachineBasicBlock : O << * MO . getMBB ( ) -> getSymbol ( ) ; return ; case MachineOperand :: MO_GlobalAddress : { O << * getSymbol ( MO . getGlobal ( ) ) ; return ; } }


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI , MCContext & Ctx ) : MCDisassembler ( STI , Ctx ) {


<s> return new <ISA_LIT>Disassembler ( STI , Ctx ) ;


<s> return decodeRegisterClass ( Inst , RegNo , <ISA_LIT>Regs64 ) ;


<s> DecodeStatus DecodeGR8RegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const void * Decoder ) {

return decodeRegisterClass ( Inst , RegNo , <ISA_LIT>Regs8 ) ;


<s> int32_t Offset = SignExtend32 < <NUM_LIT> > ( Operand & <NUM_LIT> ) ; if ( decodeRegisterClass ( Inst , Reg , <ISA_LIT>Regs64 ) == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Offset ) ) ;


<s> int32_t Offset = SignExtend32 < <NUM_LIT> > ( Operand & <NUM_LIT> ) ; if ( decodeRegisterClass ( Inst , Reg , <ISA_LIT>Regs64 ) == MCDisassembler :: Fail ) return MCDisassembler :: Fail ;

Inst . addOperand ( MCOperand :: createImm ( Offset ) ) ;


<s> DecodeStatus decodeMemSrc3Operand ( MCInst & Inst , unsigned Operand , uint64_t Address , const void * Decoder ) { unsigned Reg = ( Operand >> <NUM_LIT> ) & <NUM_LIT> ; int32_t Offset = SignExtend32 < <NUM_LIT> > ( Operand & <NUM_LIT> ) ; if ( decodeRegisterClass ( Inst , Reg , <ISA_LIT>Regs8 ) == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Offset ) ) ;


<s> if ( decodeRegisterClass ( Inst , Reg , <ISA_LIT>Regs8 ) == MCDisassembler :: Fail ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createImm ( Offset ) ) ; return MCDisassembler :: Success ;


<s> DecodeStatus decodeOff10Operand ( MCInst & Inst , unsigned Operand , uint64_t Address , const void * Decoder ) { Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Operand ) ) ) ;


<s> DecodeStatus decodeOff3Operand ( MCInst & Inst , unsigned Operand , uint64_t Address , const void * Decoder ) { Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Operand ) ) ) ;


<s> DecodeStatus decodeOff3Operand ( MCInst & Inst , unsigned Operand , uint64_t Address , const void * Decoder ) { Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Operand ) ) ) ; return MCDisassembler :: Success ;


<s> Inst . addOperand ( MCOperand :: createReg ( Regs [ RegNo ] ) ) ; return MCDisassembler :: Success ;


<s> Inst . addOperand ( MCOperand :: createImm ( Operand + <NUM_LIT> ) ) ; return MCDisassembler :: Success ;


<s> return MCDisassembler :: Fail ; } Insn = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; Result = decodeInstruction ( DecoderTable32 , MI , Insn , Address , this , STI ) ; if ( Result != MCDisassembler :: Fail ) { Size = <NUM_LIT> ; return Result ; } Size = <NUM_LIT> ;


<s> TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>Disassembler ) ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI , StringRef C ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_<ISA_LIT> , true ) , CPU ( C ) {


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( uint8_t OSABI , StringRef CPU ) {

return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI , CPU ) ;


<s> case <STR_LIT> : return ELF :: R_<ISA_LIT>_BR32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_BRCC32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_BAL32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS6 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS9 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS10 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS12 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS16 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_SHIFT6 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_OFF10 ; case FK_Data_1 : return ELF :: R_<ISA_LIT>_8 ; case FK_Data_2 : return ELF :: R_<ISA_LIT>_16 ; case FK_Data_4 : return ELF :: R_<ISA_LIT>_32 ; case FK_Data_8 : return ELF :: R_<ISA_LIT>_64 ; case <STR_LIT> : case <STR_LIT> :


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & , MCValue const & , MCFixup const & Fixup , bool IsPCRel ) const { llvm :: MCFixupKind Kind = Fixup . getKind ( ) ; switch ( ( unsigned ) Kind ) { case <STR_LIT> : return ELF :: R_<ISA_LIT>_NONE ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_BR32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_BRCC32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_BAL32 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS6 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS9 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS10 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS12 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_ABS16 ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_SHIFT6 ;

case <STR_LIT> : return ELF :: R_<ISA_LIT>_OFF10 ;


<s> <ISA_LIT>FrameLowering :: <ISA_LIT>FrameLowering ( ) : TargetFrameLowering ( TargetFrameLowering :: StackGrowsDown , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ) {


<s> MachineBasicBlock :: iterator <ISA_LIT>FrameLowering :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { assert ( ! hasFP ( MF ) && <STR_LIT> ) ; return MBB . erase ( I ) ;


<s> void <ISA_LIT>FrameLowering :: emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { const MachineFrameInfo & MFrameInfo = MF . getFrameInfo ( ) ; <ISA_LIT>MachineFunctionInfo * MFuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const <ISA_LIT>InstrInfo & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( MF . getSubtarget ( ) . getInstrInfo ( ) ) ; auto MBBI = MBB . getLastNonDebugInstr ( ) ; DebugLoc DL = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; assert ( ( MBBI -> getDesc ( ) . isReturn ( ) ) && <STR_LIT> ) ; const uint64_t StackSize = MFrameInfo . getStackSize ( ) ; uint64_t NumBytes = StackSize - MFuncInfo -> getCalleeSavedFrameSize ( ) ; const unsigned SP = <ISA_LIT>RegisterInfo :: getStackPtrRegister ( ) ; assert ( ! hasFP ( MF ) && <STR_LIT> ) ; if ( NumBytes ) { const uint64_t Addend = NumBytes % <NUM_LIT> ; const uint64_t NumChunks = NumBytes / <NUM_LIT> ; for ( uint64_t i = <NUM_LIT> ; i < NumChunks ; ++ i ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( <NUM_LIT> ) ; }


<s> assert ( ! hasFP ( MF ) && <STR_LIT> ) ; uint64_t NumBytes = StackSize - MFuncInfo -> getCalleeSavedFrameSize ( ) ; const unsigned SP = <ISA_LIT>RegisterInfo :: getStackPtrRegister ( ) ; if ( NumBytes ) { const uint64_t Addend = NumBytes % <NUM_LIT> ; const uint64_t NumChunks = NumBytes / <NUM_LIT> ; for ( uint64_t i = <NUM_LIT> ; i < NumChunks ; ++ i ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( <NUM_LIT> ) ; } if ( Addend ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( Addend ) ; } }


<s> void <ISA_LIT>FrameLowering :: processFunctionBeforeFrameFinalized ( MachineFunction & MF , RegScavenger * RS ) const {


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ;


<s> if ( WithPreDec ) { O << '-' ; } if ( Base . getReg ( ) ) { printRegister ( Base . getReg ( ) , O ) ; } if ( WithPostInc ) { O << '+' ; } O << <STR_LIT> ; if ( Offset . isImm ( ) ) { O << Offset . getImm ( ) ; } else if ( Offset . isExpr ( ) ) { O << * Offset . getExpr ( ) ;


<s> const MCOperand & Offset = MI -> getOperand ( OpNo + <NUM_LIT> ) ; if ( WithPreDec ) { O << '-' ; } if ( Base . getReg ( ) ) { printRegister ( Base . getReg ( ) , O ) ; } if ( WithPostInc ) {


<s> void <ISA_LIT>InstPrinter :: printMemSrcPostIncOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O , const char * Modifier ) { printMemSrcOperand ( MI , OpNo , O , Modifier , false , true ) ;


<s> printMemSrcOperand ( MI , OpNo , O , Modifier , true , false ) ;


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O , const char * Modifier ) { assert ( ( Modifier == nullptr || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ; const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { printRegister ( Op . getReg ( ) , O ) ; } else if ( Op . isImm ( ) ) { O << Op . getImm ( ) ;


<s> void <ISA_LIT>InstPrinter :: printRegister ( unsigned RegNo , raw_ostream & O ) const { O << '$' << getRegisterName ( RegNo ) ;


<s> void <ISA_LIT>InstPrinter :: printRegister ( unsigned RegNo , raw_ostream & O ) const {


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( <ISA_LIT>Subtarget & STI ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> ) , TRI ( ) {


<s> if ( AllowModify && HaveUnCondBr && MBB . isLayoutSuccessor ( getBranchDestBlock ( * FirstUnCondBr ) ) ) { FirstUnCondBr -> eraseFromParent ( ) ; -- NumTerminators ; HaveUnCondBr = false ; } if ( ( ! HaveUnCondBr && NumTerminators > <NUM_LIT> ) || NumTerminators > <NUM_LIT> ) return true ; if ( AllowModify && HaveUnCondBr && NumTerminators == <NUM_LIT> && MBB . isLayoutSuccessor ( getBranchDestBlock ( * FirstBr ) ) ) { <STR_LIT> CC = getCondFromBranchOpcode ( FirstBr -> getOpcode ( ) ) ; <STR_LIT> RCC = reverseCondCode ( CC ) ; if ( RCC != <STR_LIT> ) { MachineBasicBlock * Target = getBranchDestBlock ( * FirstUnCondBr ) ; DebugLoc DL = MBB . findDebugLoc ( FirstBr ) ; MachineInstr * OldCondBr = & * FirstBr ; FirstBr = BuildMI ( & MBB , DL , get ( getBranchOpcodeFromCond ( RCC ) ) ) . addMBB ( Target ) . addReg ( FirstBr -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FirstBr -> getOperand ( <NUM_LIT> ) . getReg ( ) ) ; FirstUnCondBr -> eraseFromParent ( ) ; OldCondBr -> eraseFromParent ( ) ; -- NumTerminators ; HaveUnCondBr = false ; } } if ( NumTerminators == <NUM_LIT> ) return false ; if ( HaveUnCondBr && NumTerminators == <NUM_LIT> ) { TBB = getBranchDestBlock ( * FirstUnCondBr ) ; return false ; } if ( ! HaveUnCondBr && NumTerminators == <NUM_LIT> ) { TBB = getBranchDestBlock ( * FirstBr ) ; <STR_LIT> CC = getCondFromBranchOpcode ( FirstBr -> getOpcode ( ) ) ; Cond . push_back ( MachineOperand :: CreateImm ( CC ) ) ;

Cond . push_back ( FirstBr -> getOperand ( <NUM_LIT> ) ) ;


<s> if ( ! isUnpredicatedTerminator ( * I ) ) break ; ++ NumTerminators ; FirstBr = I ; if ( I -> getDesc ( ) . isUnconditionalBranch ( ) || I -> getDesc ( ) . isIndirectBranch ( ) ) FirstUnCondBr = I ; } bool HaveUnCondBr = FirstUnCondBr != MBB . end ( ) ; if ( AllowModify && HaveUnCondBr ) { while ( std :: next ( FirstUnCondBr ) != MBB . end ( ) ) { std :: next ( FirstUnCondBr ) -> eraseFromParent ( ) ; -- NumTerminators ; } } if ( HaveUnCondBr && FirstUnCondBr -> getDesc ( ) . isIndirectBranch ( ) ) return true ; if ( AllowModify && HaveUnCondBr && MBB . isLayoutSuccessor ( getBranchDestBlock ( * FirstUnCondBr ) ) ) { FirstUnCondBr -> eraseFromParent ( ) ; -- NumTerminators ; HaveUnCondBr = false ; } if ( ( ! HaveUnCondBr && NumTerminators > <NUM_LIT> ) || NumTerminators > <NUM_LIT> ) return true ; if ( AllowModify && HaveUnCondBr && NumTerminators == <NUM_LIT> && MBB . isLayoutSuccessor ( getBranchDestBlock ( * FirstBr ) ) ) { <STR_LIT> CC = getCondFromBranchOpcode ( FirstBr -> getOpcode ( ) ) ; <STR_LIT> RCC = reverseCondCode ( CC ) ; if ( RCC != <STR_LIT> ) { MachineBasicBlock * Target = getBranchDestBlock ( * FirstUnCondBr ) ; DebugLoc DL = MBB . findDebugLoc ( FirstBr ) ; MachineInstr * OldCondBr = & * FirstBr ; FirstBr = BuildMI ( & MBB , DL , get ( getBranchOpcodeFromCond ( RCC ) ) ) . addMBB ( Target ) . addReg ( FirstBr -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FirstBr -> getOperand ( <NUM_LIT> ) . getReg ( ) ) ; FirstUnCondBr -> eraseFromParent ( ) ;


<s> void <ISA_LIT>InstrInfo :: anchor ( ) {


<s> assert ( <STR_LIT> . contains ( DestReg ) && <STR_LIT> . contains ( DestReg ) && <STR_LIT> ) ; BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> void <ISA_LIT>InstrInfo :: copyPhysReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , const DebugLoc & DL , unsigned DestReg , unsigned SrcReg , bool KillSrc ) const {

assert ( <STR_LIT> . contains ( DestReg ) && <STR_LIT> . contains ( DestReg ) && <STR_LIT> ) ;


<s> MachineBasicBlock * <ISA_LIT>InstrInfo :: getBranchDestBlock ( const MachineInstr & MI ) const { assert ( MI . getDesc ( ) . isBranch ( ) && <STR_LIT> ) ;

return MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ;


<s> return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> case TargetOpcode :: KILL : case TargetOpcode :: DBG_VALUE : return <NUM_LIT> ; case TargetOpcode :: INLINEASM : { const MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const auto & TM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; return getInlineAsmLength ( MI . getOperand ( <NUM_LIT> ) . getSymbolName ( ) , * TM . getMCAsmInfo ( ) ) ;


<s> case TargetOpcode :: INLINEASM : { const MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const auto & TM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; return getInlineAsmLength ( MI . getOperand ( <NUM_LIT> ) . getSymbolName ( ) , * TM . getMCAsmInfo ( ) ) ;


<s> const TargetRegisterInfo & getRegisterInfo ( ) const { return TRI ;


<s> } unsigned Count = <NUM_LIT> ; <STR_LIT> CC = ( <STR_LIT> ) Cond [ <NUM_LIT> ] . getImm ( ) ; MI = BuildMI ( & MBB , DL , get ( getBranchOpcodeFromCond ( CC ) ) ) . addMBB ( TBB ) . addReg ( Cond [ <NUM_LIT> ] . getReg ( ) ) . addReg ( Cond [ <NUM_LIT> ] . getReg ( ) ) ;

if ( BytesAdded ) * BytesAdded += getInstSizeInBytes ( * MI ) ;


<s> auto & MI = * BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( & DestBB ) ; return getInstSizeInBytes ( MI ) ;


<s> unsigned <ISA_LIT>InstrInfo :: insertIndirectBranch ( MachineBasicBlock & MBB , MachineBasicBlock & DestBB , const DebugLoc & DL , int64_t BrOffset , RegScavenger * RS ) const { auto & MI = * BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB ( & DestBB ) ;


<s> switch ( BranchOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <STR_LIT> ( BrOffset ) ; case <STR_LIT> : case <STR_LIT> :


<s> break ; } if ( MI . getOperand ( <NUM_LIT> ) . isFI ( ) && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { FrameIndex = MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; } return <NUM_LIT> ;


<s> case <STR_LIT> : break ; } if ( MI . getOperand ( <NUM_LIT> ) . isFI ( ) && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { FrameIndex = MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; } return <NUM_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : break ; } if ( MI . getOperand ( <NUM_LIT> ) . isFI ( ) && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) {

FrameIndex = MI . getOperand ( <NUM_LIT> ) . getIndex ( ) ;


<s> MachineFrameInfo & MFrameInfo = MF . getFrameInfo ( ) ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FrameIdx ) , MachineMemOperand :: MOLoad , MFrameInfo . getObjectSize ( FrameIdx ) , MFrameInfo . getObjectAlignment ( FrameIdx ) ) ;

assert ( ( RC == & <STR_LIT> || RC == & <STR_LIT> ) && <STR_LIT> ) ;


<s> DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FrameIdx ) , MachineMemOperand :: MOLoad , MFrameInfo . getObjectSize ( FrameIdx ) , MFrameInfo . getObjectAlignment ( FrameIdx ) ) ;


<s> while ( I != MBB . begin ( ) ) { -- I ; if ( I -> isDebugValue ( ) ) continue ; if ( ! I -> isBranch ( ) ) break ;


<s> <STR_LIT> RCC = reverseCondCode ( ( <STR_LIT> ) Cond [ <NUM_LIT> ] . getImm ( ) ) ; if ( RCC == <STR_LIT> ) return true ; Cond [ <NUM_LIT> ] . setImm ( RCC ) ; return false ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <STR_LIT> ; }


<s> MachineFrameInfo & MFrameInfo = MF . getFrameInfo ( ) ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FrameIdx ) , MachineMemOperand :: MOStore , MFrameInfo . getObjectSize ( FrameIdx ) , MFrameInfo . getObjectAlignment ( FrameIdx ) ) ; assert ( ( RC == & <STR_LIT> || RC == & <STR_LIT> ) && <STR_LIT> ) ; BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addImm ( <NUM_LIT> ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addMemOperand ( MMO ) ;


<s> DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( MF , FrameIdx ) , MachineMemOperand :: MOStore , MFrameInfo . getObjectSize ( FrameIdx ) , MFrameInfo . getObjectAlignment ( FrameIdx ) ) ; assert ( ( RC == & <STR_LIT> || RC == & <STR_LIT> ) && <STR_LIT> ) ;

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addImm ( <NUM_LIT> ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addMemOperand ( MMO ) ;


<s> <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & tm , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( tm ) , TM ( tm ) {


<s> } switch ( Opcode ) { case <STR_LIT> : { assert ( Node -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) ; int FI = cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , <STR_LIT> ) ; SDNode * N = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TFI , CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ) ; ReplaceNode ( Node , N ) ; return ; } default : break ; }


<s> } if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) ) { return false ; } bool isConstantOffset = CurDAG -> isBaseWithConstantOffset ( Addr ) ; bool isSubOffset = Addr . getOpcode ( ) == <STR_LIT> ; if ( ( isConstantOffset || isSubOffset ) && isa < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; SDLoc dl ( CN ) ;

if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) {


<s> bool <ISA_LIT>DAGToDAGISel :: SelectAddr_MO10 ( SDValue Addr , SDValue & Base , SDValue & Offset ) { SDValue B , O ; bool ret = SelectAddr ( Addr , B , O ) ; if ( ret ) { int64_t c = dyn_cast < ConstantSDNode > ( O ) -> getSExtValue ( ) ; if ( <STR_LIT> ( c ) ) { Base = B ;


<s> if ( ret ) { int64_t c = dyn_cast < ConstantSDNode > ( O ) -> getSExtValue ( ) ;


<s> if ( ret ) { int64_t c = dyn_cast < ConstantSDNode > ( O ) -> getSExtValue ( ) ; if ( <STR_LIT> ( c ) ) { Base = B ; Offset = O ; return true ; }


<s> default : return true ; case InlineAsm :: Constraint_i : case InlineAsm :: Constraint_m : SDLoc DL ( Op ) ; SDValue RC = CurDAG -> getTargetConstant ( <STR_LIT> . getID ( ) , DL , <STR_LIT> ) ; SDNode * N = CurDAG -> getMachineNode ( TargetOpcode :: COPY_TO_REGCLASS , DL , Op . getValueType ( ) , Op , RC ) ; SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; OutOps . push_back ( SDValue ( N , <NUM_LIT> ) ) ; OutOps . push_back ( Zero ) ; break ; }


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> computeRegisterProperties ( STI . getRegisterInfo ( ) ) ; setStackPointerRegisterToSaveRestore ( <ISA_LIT>RegisterInfo :: getStackPtrRegister ( ) ) ; setBooleanContents ( ZeroOrOneBooleanContent ) ; setBooleanVectorContents ( ZeroOrOneBooleanContent ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Expand ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Expand ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Expand ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Expand ) ; setLoadExtAction ( <STR_LIT> , <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setCondCodeAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , MF , RVLocs , Context ) ; return CCInfo . CheckReturn ( Outs , RetCC_<ISA_LIT> ) ;


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , MF , RVLocs , Context ) ; return CCInfo . CheckReturn ( Outs , RetCC_<ISA_LIT> ) ;


<s> const auto & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( STI . getInstrInfo ( ) ) ; DebugLoc DL = MI . getDebugLoc ( ) ; <STR_LIT> CC = ( <STR_LIT> ) MI . getOperand ( <NUM_LIT> ) . getImm ( ) ; unsigned LhsReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ;

unsigned RhsReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> MachineBasicBlock * <ISA_LIT>TargetLowering :: EmitInstrWithCustomInserter ( MachineInstr & MI , MachineBasicBlock * MBB ) const { switch ( MI . getOpcode ( ) ) { case <STR_LIT> : return emitBrCC ( MI , MBB ) ; case <STR_LIT> : return emitSelectCC ( MI , MBB ) ; default :


<s> return emitBrCC ( MI , MBB ) ; case <STR_LIT> : return emitSelectCC ( MI , MBB ) ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> BuildMI ( EntryMBB , DL , TII . get ( BranchOp ) ) . addMBB ( SinkMBB ) . addReg ( LhsReg ) . addReg ( RhsReg ) ; FalseValueMBB -> addSuccessor ( SinkMBB ) ; unsigned TrueValueReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned FalseValueReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; BuildMI ( * SinkMBB , SinkMBB -> begin ( ) , DL , TII . get ( <STR_LIT> ) , InReg ) . addReg ( TrueValueReg ) . addMBB ( EntryMBB ) . addReg ( FalseValueReg ) . addMBB ( FalseValueMBB ) ; MI . eraseFromParent ( ) ; return SinkMBB ;


<s> <STR_LIT> getCmpLibcallReturnType ( ) const override {


<s> switch ( Constraint [ <NUM_LIT> ] ) { default : break ; case 'r' : return C_RegisterClass ; } } return TargetLowering :: getConstraintType ( Constraint ) ;


<s> return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } } return TargetLowering :: getRegForInlineAsmConstraint ( TRI , Constraint , VT ) ;


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( const DataLayout & DL , LLVMContext & Context , EVT VT ) const {


<s> switch ( Opcode ) { default : return nullptr ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> default : return nullptr ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> SDValue <ISA_LIT>TargetLowering :: LowerBlockAddress ( SDValue Op , SelectionDAG & DAG ) const { const DataLayout DL = DAG . getDataLayout ( ) ; const BlockAddress * BA = cast < BlockAddressSDNode > ( Op ) -> getBlockAddress ( ) ;

SDValue Result = DAG . getTargetBlockAddress ( BA , getPointerTy ( DL ) ) ;


<s> SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue BranchTarget = Op . getOperand ( <NUM_LIT> ) ;

<STR_LIT> TargetCC = get<ISA_LIT>CondCode ( CC ) ;


<s> SDValue Ops [ ] = { Chain , DAG . getConstant ( TargetCC , DL , <STR_LIT> ) , LHS , RHS , BranchTarget } ; return DAG . getNode ( <STR_LIT> , DL , Op . getValueType ( ) , Ops ) ;


<s> CallingConv :: ID CallConv = CLI . CallConv ; bool isVarArg = CLI . IsVarArg ; isTailCall = false ; switch ( CallConv ) { default : llvm_unreachable ( <STR_LIT> ) ; case CallingConv :: Fast : case CallingConv :: C :

return LowerCCCCallTo ( Chain , Callee , CallConv , isVarArg , isTailCall , Outs , OutVals , Ins , DL , DAG , InVals ) ;


<s> for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , DL , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ;


<s> InFlag = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ; } for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { unsigned Reg = RVLocs [ i ] . getLocReg ( ) ;

RegMask [ Reg / <NUM_LIT> ] &= ~ ( <NUM_LIT> << ( Reg & <NUM_LIT> ) ) ;


<s> CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; if ( isVarArg ) { unsigned Offset = CCInfo . getNextStackOffset ( ) ; FuncInfo -> setVarArgsFrameIndex ( MFI . CreateFixedObject ( <NUM_LIT> , Offset , true ) ) ; } for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( VA . isRegLoc ( ) ) { EVT RegVT = VA . getLocVT ( ) ; switch ( RegVT . getSimpleVT ( ) . SimpleTy ) { default : { errs ( ) << <STR_LIT> << RegVT . getEVTString ( ) << <STR_LIT> ; llvm_unreachable ( <NUM_LIT> ) ; } case <STR_LIT> : unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , VReg , RegVT ) ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) ArgValue = DAG . getNode ( <STR_LIT> , DL , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) ArgValue = DAG . getNode ( <STR_LIT> , DL , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) ArgValue = DAG . getNode ( <STR_LIT> , DL , VA . getValVT ( ) , ArgValue ) ; InVals . push_back ( ArgValue ) ; } } else { assert ( VA . isMemLoc ( ) ) ; SDValue InVal ; <STR_LIT> Flags = Ins [ i ] . Flags ; if ( Flags . isByVal ( ) ) { int FI = MFI . CreateFixedObject ( Flags . getByValSize ( ) , VA . getLocMemOffset ( ) , true ) ; InVal = DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ; } else { unsigned ObjSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; if ( ObjSize > <NUM_LIT> ) { errs ( ) << <STR_LIT> << EVT ( VA . getLocVT ( ) ) . getEVTString ( ) << <STR_LIT> ; } int FI = MFI . CreateFixedObject ( ObjSize , VA . getLocMemOffset ( ) , true ) ; SDValue FIN = DAG . getFrameIndex ( FI , <STR_LIT> ) ; InVal = DAG . getLoad ( VA . getLocVT ( ) , DL , Chain , FIN , MachinePointerInfo :: getFixedStack ( MF , FI ) ) ; } InVals . push_back ( InVal ) ; }


<s> EVT RegVT = VA . getLocVT ( ) ; switch ( RegVT . getSimpleVT ( ) . SimpleTy ) { default : { errs ( ) << <STR_LIT> << RegVT . getEVTString ( ) << <STR_LIT> ; llvm_unreachable ( <NUM_LIT> ) ; } case <STR_LIT> : unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , VReg , RegVT ) ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) ArgValue = DAG . getNode ( <STR_LIT> , DL , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) ArgValue = DAG . getNode ( <STR_LIT> , DL , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) ArgValue = DAG . getNode ( <STR_LIT> , DL , VA . getValVT ( ) , ArgValue ) ; InVals . push_back ( ArgValue ) ; } } else { assert ( VA . isMemLoc ( ) ) ; SDValue InVal ;


<s> case CallingConv :: C : case CallingConv :: Fast :

return LowerCCCArguments ( Chain , CallConv , isVarArg , Ins , DL , DAG , InVals ) ;


<s> const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; int64_t Offset = cast < GlobalAddressSDNode > ( Op ) -> getOffset ( ) ;

SDValue Result = DAG . getTargetGlobalAddress ( GV , SDLoc ( Op ) , getPointerTy ( DL ) , Offset ) ;


<s> case <STR_LIT> : return LowerExternalSymbol ( Op , DAG ) ; case <STR_LIT> : return LowerBlockAddress ( Op , DAG ) ; case <STR_LIT> : return LowerBR_CC ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT_CC ( Op , DAG ) ; case <STR_LIT> : return LowerVASTART ( Op , DAG ) ; case <STR_LIT> : return LowerRETURNADDR ( Op , DAG ) ; } llvm_unreachable ( <STR_LIT> ) ;


<s> MachineRegisterInfo & MRI = DAG . getMachineFunction ( ) . getRegInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { MRI . disableCalleeSavedRegister ( RVLocs [ i ] . getLocReg ( ) ) ; } for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) RetOps . push_back ( Flag ) ; return DAG . getNode ( <STR_LIT> , DL , { <STR_LIT> , <STR_LIT> } , RetOps ) ;


<s> const TargetRegisterInfo & RI = * Subtarget . getRegisterInfo ( ) ; MachineFunction & MF = DAG . getMachineFunction ( ) ; if ( verifyReturnAddressArgumentIsConstant ( Op , DAG ) ) return SDValue ( ) ; unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( Depth ) return SDValue ( ) ;

unsigned Reg = MF . addLiveIn ( RI . getRARegister ( ) , getRegClassFor ( <STR_LIT> ) ) ;


<s> SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueValue = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseValue = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; <STR_LIT> TargetCC = get<ISA_LIT>CondCode ( CC ) ;

SDValue Ops [ ] = { LHS , RHS , TrueValue , FalseValue , DAG . getConstant ( TargetCC , DL , <STR_LIT> ) } ;


<s> SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueValue = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseValue = Op . getOperand ( <NUM_LIT> ) ; <STR_LIT> CC = cast < CondCodeSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> get ( ) ; <STR_LIT> TargetCC = get<ISA_LIT>CondCode ( CC ) ; SDValue Ops [ ] = { LHS , RHS , TrueValue , FalseValue , DAG . getConstant ( TargetCC , DL , <STR_LIT> ) } ;

return DAG . getNode ( <STR_LIT> , DL , Op . getValueType ( ) , Ops ) ;


<s> const Value * Src = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;

return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , SDLoc ( Op ) , FrameIndex , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( Src ) ) ;


<s> unsigned CurrentArgIndex = ~ <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = Args . size ( ) ; i != e ; i ++ ) { if ( CurrentArgIndex == Args [ i ] . OrigArgIndex ) { Out . back ( ) ++ ; } else { Out . push_back ( <NUM_LIT> ) ; CurrentArgIndex ++ ;


<s> ConstantSDNode * Const = dyn_cast < ConstantSDNode > ( RHS ) ; if ( ! Const ) { return SDValue ( ) ; } int64_t Value = Const -> getSExtValue ( ) ; if ( Value >= <NUM_LIT> ) { return SDValue ( ) ; }

RHS = DAG . getConstant ( - Value , DL , RHS . getValueType ( ) ) ;


<s> switch ( N -> getOpcode ( ) ) { case <STR_LIT> : Results . push_back ( DAG . getTargetConstant ( - <NUM_LIT> , SDLoc ( N ) , <STR_LIT> ) ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ;


<s> Results . push_back ( DAG . getTargetConstant ( - <NUM_LIT> , SDLoc ( N ) , <STR_LIT> ) ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; }


<s> <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) , CalleeSavedFrameSize ( <NUM_LIT> ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) {


<s> void <ISA_LIT>MachineFunctionInfo :: anchor ( ) {


<s> unsigned getCalleeSavedFrameSize ( ) { return CalleeSavedFrameSize ;


<s> unsigned getSRetReturnReg ( ) const {


<s> void setCalleeSavedFrameSize ( unsigned bytes ) {


<s> void setVarArgsFrameIndex ( int Index ) { VarArgsFrameIndex = Index ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const llvm :: Triple & TT ) { CalleeSaveStackSlotSize = <NUM_LIT> ; CodePointerSize = <NUM_LIT> ;


<s> CalleeSaveStackSlotSize = <NUM_LIT> ; CodePointerSize = <NUM_LIT> ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ;


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> <ISA_LIT>MCCodeEmitter :: <ISA_LIT>MCCodeEmitter ( MCInstrInfo const & MII , MCContext & Context ) : MCtx ( Context ) , MCII ( MII ) {


<s> return new <ISA_LIT>MCCodeEmitter ( MII , Context ) ;


<s> void emitLittleEndian ( uint64_t Encoding , raw_ostream & OS , unsigned sz ) { while ( sz > <NUM_LIT> ) {

OS << static_cast < uint8_t > ( Encoding & <NUM_LIT> ) ;


<s> while ( sz > <NUM_LIT> ) { OS << static_cast < uint8_t > ( Encoding & <NUM_LIT> ) ; Encoding = Encoding >> <NUM_LIT> ;


<s> return encodeImmN ( MI , Op , Fixups , STI , MCFixupKind ( <STR_LIT> ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodeImm10 ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

return encodeImmN ( MI , Op , Fixups , STI , MCFixupKind ( <STR_LIT> ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodeImm10 ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return encodeImmN ( MI , Op , Fixups , STI , MCFixupKind ( <STR_LIT> ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodeImm3 ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {

return encodeImmN ( MI , Op , Fixups , STI , static_cast < MCFixupKind > ( <NUM_LIT> ) ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodeImm6 ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> assert ( MCII . get ( MI . getOpcode ( ) ) . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ; if ( FixupKind >= FirstTargetFixupKind ) { Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , FixupKind ) ) ; } else { llvm_unreachable ( <STR_LIT> ) ; }


<s> void <ISA_LIT>MCCodeEmitter :: encodeInstruction ( MCInst const & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , MCSubtargetInfo const & STI ) const { const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ;

uint64_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodeMemSrcOperand ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned encoding ; const MCOperand RegOp = MI . getOperand ( Op ) ; assert ( RegOp . isReg ( ) && <STR_LIT> ) ; unsigned Reg = MCtx . getRegisterInfo ( ) -> getEncodingValue ( RegOp . getReg ( ) ) ; encoding = ( Reg & <NUM_LIT> ) << <NUM_LIT> ; MCOperand ImmOp = MI . getOperand ( Op + <NUM_LIT> ) ; if ( ImmOp . isImm ( ) ) { encoding |= static_cast < unsigned > ( ImmOp . getImm ( ) ) & <NUM_LIT> ; return encoding ; }

assert ( ImmOp . isExpr ( ) && <STR_LIT> ) ;


<s> if ( ImmOp . isImm ( ) ) { encoding |= static_cast < unsigned > ( ImmOp . getImm ( ) ) & <NUM_LIT> ; return encoding ; } assert ( ImmOp . isExpr ( ) && <STR_LIT> ) ; const unsigned Opcode = MI . getOpcode ( ) ; const MCInstrDesc & Desc = MCII . get ( Opcode ) ; assert ( Desc . getSize ( ) == <NUM_LIT> && <STR_LIT> ) ;


<s> return getMachineOpValue ( MI , MO , Fixups , STI ) ; } const unsigned Opcode = MI . getOpcode ( ) ; <STR_LIT> FixupKind ; switch ( Opcode ) { case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; default : FixupKind = <STR_LIT> ; if ( findOpcode ( Opcode , BRCCOpcodes ) ) { const MCInstrDesc & Desc = MCII . get ( Opcode ) ; if ( Desc . getSize ( ) == <NUM_LIT> ) { FixupKind = <STR_LIT> ; } else { FixupKind = <STR_LIT> ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: encodePCRelImmOperand ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isReg ( ) || MO . isImm ( ) ) { return getMachineOpValue ( MI , MO , Fixups , STI ) ; } const unsigned Opcode = MI . getOpcode ( ) ; <STR_LIT> FixupKind ; switch ( Opcode ) { case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; case <STR_LIT> : FixupKind = <STR_LIT> ; break ; default : FixupKind = <STR_LIT> ; if ( findOpcode ( Opcode , BRCCOpcodes ) ) { const MCInstrDesc & Desc = MCII . get ( Opcode ) ; if ( Desc . getSize ( ) == <NUM_LIT> ) { FixupKind = <STR_LIT> ; } else { FixupKind = <STR_LIT> ; } } else { llvm_unreachable ( <STR_LIT> ) ; } } Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , ( MCFixupKind ) FixupKind ) ) ;


<s> const MCOperand MO = MI . getOperand ( Op ) ; if ( MO . isImm ( ) ) {


<s> const MCOperand MO = MI . getOperand ( Op ) ; if ( MO . isImm ( ) ) { unsigned value = MO . getImm ( ) ; return static_cast < unsigned > ( value - <NUM_LIT> ) ; } assert ( MO . isExpr ( ) ) ; <STR_LIT> FixupKind = <STR_LIT> ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , MCFixupKind ( FixupKind ) ) ) ;


<s> for ( auto It = Opcodes . begin ( ) ; It != Opcodes . end ( ) ; It ++ ) { if ( Op == * It ) {


<s> case <NUM_LIT> : break ; } return Printer . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetExternalSymbolSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ; }

return Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ;


<s> AsmPrinter & Printer ; public : <ISA_LIT>MCInstLower ( MCContext & ctx , AsmPrinter & printer ) : Ctx ( ctx ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; bool LowerMachineOperand ( const MachineOperand & MO , MCOperand & MCOp ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ;

MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ;


<s> MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ;


<s> const DataLayout & DL = Printer . getDataLayout ( ) ; SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << DL . getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ; } return Ctx . getOrCreateSymbol ( Name ) ;


<s> OutMI . setOpcode ( MI -> getOpcode ( ) ) ; for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; if ( ! LowerMachineOperand ( MO , MCOp ) ) continue ; OutMI . addOperand ( MCOp ) ; }


<s> MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; return true ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; return true ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; return true ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; return true ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ;


<s> const MCExpr * Expr = MCSymbolRefExpr :: create ( Sym , Ctx ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : break ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ; return nullptr ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ;

TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) : <ISA_LIT>GenRegisterInfo ( getLinkRegister ( ) ) {


<s> assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIdx = MI . getOperand ( i ) . getIndex ( ) ; unsigned BaseReg = getFrameRegister ( MF ) ; int Offset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIdx ) ; if ( ! TFI -> hasFP ( MF ) ) { Offset += MF . getFrameInfo ( ) . getStackSize ( ) ; } Offset += MI . getOperand ( i + <NUM_LIT> ) . getImm ( ) ; if ( MI . getOpcode ( ) == <STR_LIT> ) { const TargetInstrInfo * TII = MF . getSubtarget ( ) . getInstrInfo ( ) ; unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( ( ( Offset >= - <NUM_LIT> ) || ( Offset <= <NUM_LIT> ) ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> ) { BuildMI ( MBB , & MI , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( BaseReg ) . addImm ( Offset ) ; } else if ( Offset < <NUM_LIT> ) { BuildMI ( MBB , & MI , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( BaseReg ) . addImm ( - Offset ) ;


<s> const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; DebugLoc DL = MI . getDebugLoc ( ) ; unsigned i = <NUM_LIT> ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIdx = MI . getOperand ( i ) . getIndex ( ) ; unsigned BaseReg = getFrameRegister ( MF ) ; int Offset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIdx ) ; if ( ! TFI -> hasFP ( MF ) ) { Offset += MF . getFrameInfo ( ) . getStackSize ( ) ; } Offset += MI . getOperand ( i + <NUM_LIT> ) . getImm ( ) ; if ( MI . getOpcode ( ) == <STR_LIT> ) { const TargetInstrInfo * TII = MF . getSubtarget ( ) . getInstrInfo ( ) ; unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( ( ( Offset >= - <NUM_LIT> ) || ( Offset <= <NUM_LIT> ) ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> ) { BuildMI ( MBB , & MI , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( BaseReg ) . addImm ( Offset ) ; } else if ( Offset < <NUM_LIT> ) { BuildMI ( MBB , & MI , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( BaseReg ) . addImm ( - Offset ) ; } else { BuildMI ( MBB , & MI , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( BaseReg ) ; } MI . eraseFromParent ( ) ; } else { MI . getOperand ( i ) . ChangeToRegister ( BaseReg , false ) ; MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ;


<s> const MCPhysReg * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getFramePtrRegister ( ) { return <STR_LIT> ;


<s> return TFI -> hasFP ( MF ) ? getFramePtrRegister ( ) : getStackPtrRegister ( ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getLinkRegister ( ) {


<s> const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; Reserved . set ( getLinkRegister ( ) ) ; Reserved . set ( getStackPtrRegister ( ) ) ; if ( TFI -> hasFP ( MF ) ) { Reserved . set ( getFramePtrRegister ( ) ) ; }


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const {


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const { return true ;


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( ) : SelectionDAGTargetInfo ( ) {


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> return new ShortInstrPeephole ( TM ) ;


<s> StringRef getPassName ( ) const override {


<s> case <STR_LIT> : case <STR_LIT> : return updateALU_r ( MI ) ; case <STR_LIT> : case <STR_LIT> : return updateARITH_i10 ( MI ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return updateSHIFT_i6 ( MI ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return updateLD ( MI ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return updateST ( MI ) ; case <STR_LIT> : return updateBRA ( MI ) ; case <STR_LIT> : return updateBAL ( MI ) ; case <STR_LIT> : return updateJAL ( MI ) ;


<s> bool ShortInstrPeephole :: runOnMachineFunction ( MachineFunction & MF ) { bool Changed = false ;


<s> bool ShortInstrPeephole :: runOnMachineFunction ( MachineFunction & MF ) { bool Changed = false ; for ( MachineBasicBlock & MBB : MF ) { for ( MachineInstr & MI : MBB ) { Changed |= runOnInstruction ( MI ) ; }


<s> ShortInstrPeephole ( TargetMachine & TM ) : MachineFunctionPass ( ID ) , TM ( TM ) , MII ( * TM . getMCInstrInfo ( ) ) {


<s> bool ShortInstrPeephole :: updateARITH_i10 ( MachineInstr & MI ) const { unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; const auto & Imm = MI . getOperand ( <NUM_LIT> ) ; if ( <STR_LIT> . contains ( DstReg , SrcReg ) && Imm . isImm ( ) && <STR_LIT> ( Imm . getImm ( ) ) ) { unsigned Opcode = MI . getOpcode ( ) ; switch ( Opcode ) { case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; } MI . setDesc ( MII . get ( Opcode ) ) ; return true ; }


<s> if ( MO . isImm ( ) && <STR_LIT> ( MO . getImm ( ) ) && <STR_LIT> . contains ( LinkReg ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ; }


<s> if ( MO . isImm ( ) && <STR_LIT> ( MO . getImm ( ) ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ;


<s> bool ShortInstrPeephole :: updateJAL ( MachineInstr & MI ) const { unsigned TargetReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned LinkReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ;

if ( <STR_LIT> . contains ( TargetReg , LinkReg ) ) {


<s> bool ShortInstrPeephole :: updateJAL ( MachineInstr & MI ) const {

unsigned TargetReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> unsigned LinkReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( <STR_LIT> . contains ( LinkReg ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ;


<s> if ( <STR_LIT> . contains ( LinkReg ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ; } return false ;


<s> if ( <STR_LIT> . contains ( DstReg ) && Base . isReg ( ) && <STR_LIT> . contains ( Base . getReg ( ) ) && Off . isImm ( ) && <STR_LIT> ( Off . getImm ( ) ) ) { unsigned Opcode = MI . getOpcode ( ) ; switch ( Opcode ) { case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> :


<s> if ( <STR_LIT> . contains ( DstReg ) && Imm . isImm ( ) && <STR_LIT> ( Imm . getImm ( ) ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ; }


<s> const auto & SrcReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( <STR_LIT> . contains ( DstReg , SrcReg ) ) { MI . setDesc ( MII . get ( <STR_LIT> ) ) ; return true ; }


<s> if ( <STR_LIT> . contains ( DstReg , SrcReg ) ) {

MI . setDesc ( MII . get ( <STR_LIT> ) ) ;


<s> bool ShortInstrPeephole :: updateNOP ( MachineInstr & MI ) const { unsigned SrcReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; const auto & Imm = MI . getOperand ( <NUM_LIT> ) ;

if ( <STR_LIT> . contains ( SrcReg ) && Imm . isImm ( ) && <STR_LIT> ( Imm . getImm ( ) ) ) {


<s> unsigned Opcode = MI . getOpcode ( ) ; switch ( Opcode ) { case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; case <STR_LIT> : Opcode = <STR_LIT> ; break ; } MI . setDesc ( MII . get ( Opcode ) ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , const std :: string & CPU , const std :: string & FS , const TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , InstrInfo ( * this ) , FrameLowering ( ) , TLInfo ( TM , * this ) , TSInfo ( ) {


<s> void <ISA_LIT>Subtarget :: anchor ( ) {


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override {


<s> return & InstrInfo . getRegisterInfo ( ) ;


<s> Target & getThe<ISA_LIT>Target ( ) {


<s> Target & getThe<ISA_LIT>Target ( ) { static Target The<ISA_LIT>Target ;


<s> RegisterTarget < Triple :: aap > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine & TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : LLVMTargetMachine ( T , <STR_LIT> , TT , CPU , FS , Options , getEffectiveRelocModel ( RM ) , getEffectiveCodeModel ( CM ) , OL ) , TLOF ( make_unique < TargetLoweringObjectFileELF > ( ) ) , Subtarget ( TT , CPU , FS , * this ) {


<s> addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) { addPass ( & BranchRelaxationPassID ) ; addPass ( create<ISA_LIT>ShortInstrPeepholePass ( get<ISA_LIT>TargetMachine ( ) ) , false ) ;


<s> addPass ( & BranchRelaxationPassID ) ;

addPass ( create<ISA_LIT>ShortInstrPeepholePass ( get<ISA_LIT>TargetMachine ( ) ) , false ) ;


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PM ) { return new <ISA_LIT>PassConfig ( * this , PM ) ;


<s> return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> if ( ! CM . hasValue ( ) ) return CodeModel :: Small ; return * CM ;


<s> if ( ! RM . hasValue ( ) ) return Reloc :: Static ; return * RM ;


<s> TargetLoweringObjectFile * getObjFileLowering ( ) const override { return TLOF . get ( ) ;


<s> const <ISA_LIT>Subtarget * getSubtargetImpl ( const Function & F ) const override {


<s> void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> <ISA_LIT>TargetMachine :: ~ <ISA_LIT>TargetMachine ( ) {


<s> static bool inline isField16 ( int64_t I ) {

return isInt < <NUM_LIT> > ( I ) || isUInt < <NUM_LIT> > ( I ) ;


<s> static bool inline isImm10 ( int64_t I ) { return isUInt < <NUM_LIT> > ( I ) ;


<s> static bool inline isImm3 ( int64_t I ) { return isUInt < <NUM_LIT> > ( I ) ;


<s> static bool inline isImm6 ( int64_t I ) {


<s> static bool inline isImm9 ( int64_t I ) {


<s> static bool inline isOff22 ( int64_t I ) {


<s> static bool inline isOff6 ( int64_t I ) {


<s> static bool inline isShiftImm3 ( int64_t I ) {

return ( I >= <NUM_LIT> ) && ( I <= <NUM_LIT> ) ;