<s> break ; case SUBREG : if ( ! REG_P ( SUBREG_REG ( op ) ) ) return <NUM_LIT> ; case REG : if ( ! base ) base = op ; else if ( ! index ) index = op ; else return <NUM_LIT> ; break ; case CONST : case CONST_INT : case SYMBOL_REF : case LABEL_REF : if ( disp ) return <NUM_LIT> ; disp = op ; break ; default : return <NUM_LIT> ; } } } else if ( GET_CODE ( addr ) == MULT ) { index = XEXP ( addr , <NUM_LIT> ) ; scale_rtx = XEXP ( addr , <NUM_LIT> ) ; } else if ( GET_CODE ( addr ) == ASHIFT ) { index = XEXP ( addr , <NUM_LIT> ) ; tmp = XEXP ( addr , <NUM_LIT> ) ; if ( ! CONST_INT_P ( tmp ) ) return <NUM_LIT> ; scale = INTVAL ( tmp ) ; if ( ( unsigned HOST_WIDE_INT ) scale > <NUM_LIT> ) return <NUM_LIT> ; scale = <NUM_LIT> << scale ; retval = - <NUM_LIT> ; } else disp = addr ; if ( index ) { if ( REG_P ( index ) ) ; else if ( GET_CODE ( index ) == SUBREG && REG_P ( SUBREG_REG ( index ) ) ) ; else return <NUM_LIT> ; } if ( scale_rtx ) { if ( ! CONST_INT_P ( scale_rtx ) ) return <NUM_LIT> ; scale = INTVAL ( scale_rtx ) ; } base_reg = base && GET_CODE ( base ) == SUBREG ? SUBREG_REG ( base ) : base ; index_reg = index && GET_CODE ( index ) == SUBREG ? SUBREG_REG ( index ) : index ; if ( disp == const0_rtx && ( base || index ) ) disp = NULL_RTX ; if ( base_reg && index_reg && scale == <NUM_LIT> && ( index_reg == arg_pointer_rtx || index_reg == frame_pointer_rtx || ( REG_P ( index_reg ) && REGNO ( index_reg ) == STACK_POINTER_REGNUM ) ) ) { std :: swap ( base , index ) ; std :: swap ( base_reg , index_reg ) ; } if ( ! disp && base_reg && ( base_reg == hard_frame_pointer_rtx || base_reg == frame_pointer_rtx || base_reg == arg_pointer_rtx || ( REG_P ( base_reg ) && ( REGNO ( base_reg ) == HARD_FRAME_POINTER_REGNUM || REGNO ( base_reg ) == R13_REG ) ) ) ) disp = const0_rtx ; if ( TARGET_K6 && cfun && optimize_function_for_speed_p ( cfun ) && base_reg && ! index_reg && ! disp && REG_P ( base_reg ) && REGNO ( base_reg ) == SI_REG ) disp = const0_rtx ; if ( ! base && index && scale == <NUM_LIT> ) base = index , base_reg = index_reg , scale = <NUM_LIT> ; if ( ! base && ! disp && index && scale != <NUM_LIT> ) disp = const0_rtx ; out -> base = base ; out -> index = index ;


<s> rtx reg_addend = NULL_RTX ; rtx const_addend = NULL_RTX ; rtx result = NULL_RTX ; x = orig_x ; if ( MEM_P ( x ) ) x = XEXP ( x , <NUM_LIT> ) ; if ( TARGET_64BIT ) { if ( GET_CODE ( x ) == CONST && GET_CODE ( XEXP ( x , <NUM_LIT> ) ) == PLUS && GET_MODE ( XEXP ( x , <NUM_LIT> ) ) == Pmode && CONST_INT_P ( XEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) ) && GET_CODE ( XEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) ) == UNSPEC && XINT ( XEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) , <NUM_LIT> ) == UNSPEC_PCREL ) { rtx x2 = XVECEXP ( XEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) , <NUM_LIT> , <NUM_LIT> ) ; x = gen_rtx_PLUS ( Pmode , XEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) , x2 ) ; if ( MEM_P ( orig_x ) ) x = replace_equiv_address_nv ( orig_x , x ) ; return x ; } if ( GET_CODE ( x ) == CONST && GET_CODE ( XEXP ( x , <NUM_LIT> ) ) == UNSPEC && ( XINT ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) == UNSPEC_GOTPCREL || XINT ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) == UNSPEC_PCREL ) && ( MEM_P ( orig_x ) || XINT ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> ) == UNSPEC_PCREL ) ) { x = XVECEXP ( XEXP ( x , <NUM_LIT> ) , <NUM_LIT> , <NUM_LIT> ) ; if ( GET_MODE ( orig_x ) != GET_MODE ( x ) && MEM_P ( orig_x ) ) { x = simplify_gen_subreg ( GET_MODE ( orig_x ) , x , GET_MODE ( x ) , <NUM_LIT> ) ; if ( x == NULL_RTX ) return orig_x ; } return x ; } if ( ix86_cmodel != CM_MEDIUM_PIC && ix86_cmodel != CM_LARGE_PIC ) return ix86_delegitimize_tls_address ( orig_x ) ; } if ( GET_CODE ( x ) != PLUS || GET_CODE ( XEXP ( x , <NUM_LIT> ) ) != CONST ) return ix86_delegitimize_tls_address ( orig_x ) ; if ( ix86_pic_register_p ( XEXP ( x , <NUM_LIT> ) ) ) ; else if ( GET_CODE ( XEXP ( x , <NUM_LIT> ) ) == PLUS ) { reg_addend = XEXP ( x , <NUM_LIT> ) ; if ( ix86_pic_register_p ( XEXP ( reg_addend , <NUM_LIT> ) ) ) reg_addend = XEXP ( reg_addend , <NUM_LIT> ) ; else if ( ix86_pic_register_p ( XEXP ( reg_addend , <NUM_LIT> ) ) ) reg_addend = XEXP ( reg_addend , <NUM_LIT> ) ; else { reg_addend = NULL_RTX ; addend = XEXP ( x , <NUM_LIT> ) ; } }


<s> case SET : shift_rtx = XEXP ( use_body , <NUM_LIT> ) ; break ; case PARALLEL : for ( i = XVECLEN ( use_body , <NUM_LIT> ) - <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) if ( ix86_dep_by_shift_count_body ( set_body , XVECEXP ( use_body , <NUM_LIT> , i ) ) ) return true ; default : return false ; break ; } if ( shift_rtx && ( GET_CODE ( shift_rtx ) == ASHIFT || GET_CODE ( shift_rtx ) == LSHIFTRT || GET_CODE ( shift_rtx ) == ASHIFTRT || GET_CODE ( shift_rtx ) == ROTATE || GET_CODE ( shift_rtx ) == ROTATERT ) ) { rtx shift_count = XEXP ( shift_rtx , <NUM_LIT> ) ; if ( REG_P ( shift_count ) ) { if ( reload_completed && true_regnum ( set_dest ) == true_regnum ( shift_count ) ) return true ; else if ( REGNO ( set_dest ) == REGNO ( shift_count ) ) return true ; } } return false ;


<s> rtx op , clob ; op = gen_rtx_SET ( VOIDmode , dst , gen_rtx_fmt_ee ( code , mode , dst , src ) ) ; clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ;


<s> op = gen_rtx_SET ( VOIDmode , dst , gen_rtx_fmt_ee ( code , mode , dst , src ) ) ; clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ;

emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ;


<s> else { rtx nomove = gen_label_rtx ( ) ; emit_cmp_and_jump_insns ( op1 , op2 , reverse_condition ( code ) , const0_rtx , GET_MODE ( op1 ) , <NUM_LIT> , nomove ) ;


<s> t = ix86_expand_compare ( code , op1 , op2 ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dst , gen_rtx_IF_THEN_ELSE ( GET_MODE ( dst ) , t , src , dst ) ) ) ;


<s> if ( TARGET_SAHF && ( TARGET_USE_SAHF || optimize_insn_for_size_p ( ) ) ) { emit_insn ( gen_x86_sahf_1 ( reg ) ) ; temp = gen_rtx_REG ( CCmode , FLAGS_REG ) ; temp = gen_rtx_UNORDERED ( VOIDmode , temp , const0_rtx ) ; } else { emit_insn ( gen_testqi_ext_ccno_0 ( reg , GEN_INT ( <NUM_LIT> ) ) ) ; temp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; temp = gen_rtx_NE ( VOIDmode , temp , const0_rtx ) ; } temp = gen_rtx_IF_THEN_ELSE ( VOIDmode , temp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; temp = gen_rtx_SET ( VOIDmode , pc_rtx , temp ) ; emit_jump_insn ( temp ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ;


<s> rtx reg = gen_reg_rtx ( HImode ) ; rtx temp ; emit_insn ( gen_x86_fnstsw_1 ( reg ) ) ; if ( TARGET_SAHF && ( TARGET_USE_SAHF || optimize_insn_for_size_p ( ) ) ) { emit_insn ( gen_x86_sahf_1 ( reg ) ) ; temp = gen_rtx_REG ( CCmode , FLAGS_REG ) ; temp = gen_rtx_UNORDERED ( VOIDmode , temp , const0_rtx ) ; } else { emit_insn ( gen_testqi_ext_ccno_0 ( reg , GEN_INT ( <NUM_LIT> ) ) ) ; temp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; temp = gen_rtx_NE ( VOIDmode , temp , const0_rtx ) ; }

temp = gen_rtx_IF_THEN_ELSE ( VOIDmode , temp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ;


<s> rtx tmp2 = gen_reg_rtx ( XFmode ) ; rtx test ; emit_insn ( gen_absxf2 ( tmp , op1 ) ) ; test = gen_rtx_GE ( VOIDmode , tmp , CONST_DOUBLE_FROM_REAL_VALUE ( REAL_VALUE_ATOF ( <STR_LIT> , XFmode ) , XFmode ) ) ; emit_jump_insn ( gen_cbranchxf4 ( test , XEXP ( test , <NUM_LIT> ) , XEXP ( test , <NUM_LIT> ) , label1 ) ) ; emit_move_insn ( tmp2 , standard_80387_constant_rtx ( <NUM_LIT> ) ) ; emit_insn ( gen_fyl2xp1xf3_i387 ( op0 , op1 , tmp2 ) ) ; emit_jump ( label2 ) ; emit_label ( label1 ) ; emit_move_insn ( tmp , CONST1_RTX ( XFmode ) ) ; emit_insn ( gen_addxf3 ( tmp , op1 , tmp ) ) ;


<s> rtx test ; emit_insn ( gen_absxf2 ( tmp , op1 ) ) ; test = gen_rtx_GE ( VOIDmode , tmp , CONST_DOUBLE_FROM_REAL_VALUE ( REAL_VALUE_ATOF ( <STR_LIT> , XFmode ) , XFmode ) ) ; emit_jump_insn ( gen_cbranchxf4 ( test , XEXP ( test , <NUM_LIT> ) , XEXP ( test , <NUM_LIT> ) , label1 ) ) ; emit_move_insn ( tmp2 , standard_80387_constant_rtx ( <NUM_LIT> ) ) ; emit_insn ( gen_fyl2xp1xf3_i387 ( op0 , op1 , tmp2 ) ) ; emit_jump ( label2 ) ; emit_label ( label1 ) ;

emit_move_insn ( tmp , CONST1_RTX ( XFmode ) ) ;


<s> gen_neg = gen_negsi2 ; break ; case DImode : gen_neg = gen_negdi2 ; break ; default : gcc_unreachable ( ) ; } e1 = gen_reg_rtx ( inmode ) ; e2 = gen_reg_rtx ( inmode ) ; res = gen_reg_rtx ( outmode ) ; half = CONST_DOUBLE_FROM_REAL_VALUE ( dconsthalf , inmode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , scratch , gen_rtx_UNSPEC ( HImode , gen_rtvec ( <NUM_LIT> , op1 ) , UNSPEC_FXAM ) ) ) ; emit_insn ( gen_abs ( e1 , op1 ) ) ; half = force_reg ( inmode , half ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e2 , gen_rtx_PLUS ( inmode , e1 , half ) ) ) ; if ( inmode != XFmode ) { tmp1 = gen_reg_rtx ( XFmode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp1 , gen_rtx_FLOAT_EXTEND ( XFmode , e2 ) ) ) ; } else tmp1 = e2 ; switch ( outmode ) { case SFmode : case DFmode : { rtx tmp0 = gen_reg_rtx ( XFmode ) ; emit_insn ( gen_frndintxf2_floor ( tmp0 , tmp1 ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , res , gen_rtx_UNSPEC ( outmode , gen_rtvec ( <NUM_LIT> , tmp0 ) , UNSPEC_TRUNC_NOOP ) ) ) ; } break ; case XFmode : emit_insn ( gen_frndintxf2_floor ( res , tmp1 ) ) ; break ;


<s> break ; case SImode : gen_neg = gen_negsi2 ; break ; case DImode : gen_neg = gen_negdi2 ; break ; default : gcc_unreachable ( ) ; } e1 = gen_reg_rtx ( inmode ) ; e2 = gen_reg_rtx ( inmode ) ; res = gen_reg_rtx ( outmode ) ; half = CONST_DOUBLE_FROM_REAL_VALUE ( dconsthalf , inmode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , scratch , gen_rtx_UNSPEC ( HImode , gen_rtvec ( <NUM_LIT> , op1 ) , UNSPEC_FXAM ) ) ) ; emit_insn ( gen_abs ( e1 , op1 ) ) ; half = force_reg ( inmode , half ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e2 , gen_rtx_PLUS ( inmode , e1 , half ) ) ) ; if ( inmode != XFmode ) { tmp1 = gen_reg_rtx ( XFmode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp1 , gen_rtx_FLOAT_EXTEND ( XFmode , e2 ) ) ) ; } else tmp1 = e2 ; switch ( outmode ) { case SFmode : case DFmode : { rtx tmp0 = gen_reg_rtx ( XFmode ) ; emit_insn ( gen_frndintxf2_floor ( tmp0 , tmp1 ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , res , gen_rtx_UNSPEC ( outmode , gen_rtvec ( <NUM_LIT> , tmp0 ) , UNSPEC_TRUNC_NOOP ) ) ) ; } break ; case XFmode : emit_insn ( gen_frndintxf2_floor ( res , tmp1 ) ) ; break ; case HImode : emit_insn ( gen_lfloorxfhi2 ( res , tmp1 ) ) ; break ; case SImode : emit_insn ( gen_lfloorxfsi2 ( res , tmp1 ) ) ; break ; case DImode : emit_insn ( gen_lfloorxfdi2 ( res , tmp1 ) ) ; break ; default : gcc_unreachable ( ) ; } emit_insn ( gen_testqi_ext_ccno_0 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_EQ ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( VOIDmode , pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = jump_label ; emit_insn ( gen_neg ( res , res ) ) ;


<s> gcc_assert ( m -> fs . fp_valid ) ; m -> fs . sp_valid = true ; m -> fs . sp_offset = m -> fs . fp_offset - UNITS_PER_WORD ; m -> fs . fp_valid = false ; if ( m -> fs . cfa_reg == hard_frame_pointer_rtx ) { m -> fs . cfa_reg = stack_pointer_rtx ; m -> fs . cfa_offset = m -> fs . sp_offset ; add_reg_note ( insn , REG_CFA_DEF_CFA , plus_constant ( Pmode , stack_pointer_rtx , m -> fs . sp_offset ) ) ; RTX_FRAME_RELATED_P ( insn ) = <NUM_LIT> ; }

ix86_add_cfa_restore_note ( insn , hard_frame_pointer_rtx , m -> fs . fp_offset ) ;


<s> gcc_assert ( m -> fs . fp_valid ) ; m -> fs . sp_valid = true ; m -> fs . sp_offset = m -> fs . fp_offset - UNITS_PER_WORD ; m -> fs . fp_valid = false ; if ( m -> fs . cfa_reg == hard_frame_pointer_rtx ) {


<s> if ( mode == AVX_U128_CLEAN ) ix86_avx_emit_vzeroupper ( regs_live ) ; break ; case I387_TRUNC : case I387_FLOOR : case I387_CEIL : case I387_MASK_PM : if ( mode != I387_CW_ANY && mode != I387_CW_UNINITIALIZED ) emit_i387_cw_initialization ( mode ) ; break ; default :


<s> case I387_TRUNC : case I387_FLOOR : case I387_CEIL : case I387_MASK_PM : if ( mode != I387_CW_ANY && mode != I387_CW_UNINITIALIZED ) emit_i387_cw_initialization ( mode ) ; break ; default : gcc_unreachable ( ) ;


<s> last = first + rounded_size ; emit_insn ( ix86_gen_probe_stack_range ( sr . reg , sr . reg , GEN_INT ( - last ) ) ) ; if ( size != rounded_size ) emit_stack_probe ( plus_constant ( Pmode , gen_rtx_PLUS ( Pmode , stack_pointer_rtx , sr . reg ) , rounded_size - size ) ) ; release_scratch_register_on_entry ( & sr ) ; }


<s> struct machine_function * m = cfun -> machine ; unsigned int regno ; for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , maybe_eh_return ) ) { rtx reg = gen_rtx_REG ( word_mode , regno ) ; rtx insn , mem ; mem = choose_baseaddr ( cfa_offset ) ; mem = gen_frame_mem ( word_mode , mem ) ; insn = emit_move_insn ( reg , mem ) ;

if ( m -> fs . cfa_reg == crtl -> drap_reg && regno == REGNO ( crtl -> drap_reg ) ) {


<s> static void ix86_emit_restore_regs_using_pop ( void ) { unsigned int regno ;

for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , false ) ) ix86_emit_restore_reg_using_pop ( gen_rtx_REG ( word_mode , regno ) ) ;


<s> static void ix86_emit_restore_regs_using_pop ( void ) { unsigned int regno ; for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , false ) ) ix86_emit_restore_reg_using_pop ( gen_rtx_REG ( word_mode , regno ) ) ;


<s> if ( m -> fs . cfa_reg == stack_pointer_rtx ) { rtx x = plus_constant ( Pmode , stack_pointer_rtx , UNITS_PER_WORD ) ; x = gen_rtx_SET ( VOIDmode , stack_pointer_rtx , x ) ; add_reg_note ( insn , REG_CFA_ADJUST_CFA , x ) ; RTX_FRAME_RELATED_P ( insn ) = <NUM_LIT> ; m -> fs . cfa_offset -= UNITS_PER_WORD ; } if ( reg == hard_frame_pointer_rtx ) { m -> fs . fp_valid = false ;

if ( m -> fs . cfa_reg == hard_frame_pointer_rtx ) {


<s> static void ix86_emit_restore_sse_regs_using_mov ( HOST_WIDE_INT cfa_offset , bool maybe_eh_return ) { unsigned int regno ; for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , maybe_eh_return ) ) { rtx reg = gen_rtx_REG ( V4SFmode , regno ) ; rtx mem ; mem = choose_baseaddr ( cfa_offset ) ;


<s> rtx mem ; mem = choose_baseaddr ( cfa_offset ) ; mem = gen_rtx_MEM ( V4SFmode , mem ) ; set_mem_align ( mem , <NUM_LIT> ) ; emit_move_insn ( reg , mem ) ; ix86_add_cfa_restore_note ( NULL_RTX , reg , cfa_offset ) ;


for ( regno = FIRST_PSEUDO_REGISTER - <NUM_LIT> ; regno -- > <NUM_LIT> ; ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , true ) ) {


<s> for ( regno = FIRST_PSEUDO_REGISTER - <NUM_LIT> ; regno -- > <NUM_LIT> ; ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , true ) ) { insn = emit_insn ( gen_push ( gen_rtx_REG ( word_mode , regno ) ) ) ; RTX_FRAME_RELATED_P ( insn ) = <NUM_LIT> ; }


<s> unsigned int regno ; for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( ! SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , true ) ) { ix86_emit_save_reg_using_mov ( word_mode , regno , cfa_offset ) ; cfa_offset -= UNITS_PER_WORD ; }


<s> rtx mem , addr , base , insn ; addr = choose_baseaddr ( cfa_offset ) ; mem = gen_frame_mem ( mode , addr ) ; set_mem_align ( mem , GET_MODE_ALIGNMENT ( mode ) ) ; insn = emit_move_insn ( mem , reg ) ; RTX_FRAME_RELATED_P ( insn ) = <NUM_LIT> ; base = addr ; if ( GET_CODE ( base ) == PLUS ) base = XEXP ( base , <NUM_LIT> ) ; gcc_checking_assert ( REG_P ( base ) ) ; if ( m -> fs . realigned ) { gcc_checking_assert ( stack_realign_drap ) ; if ( regno == REGNO ( crtl -> drap_reg ) ) { gcc_checking_assert ( cfun -> machine -> fs . fp_valid ) ; addr = plus_constant ( Pmode , hard_frame_pointer_rtx , cfun -> machine -> fs . fp_offset - cfa_offset ) ; mem = gen_rtx_MEM ( mode , addr ) ; add_reg_note ( insn , REG_CFA_DEF_CFA , mem ) ; } else { gcc_checking_assert ( cfun -> machine -> fs . fp_valid ) ; addr = plus_constant ( Pmode , hard_frame_pointer_rtx , cfun -> machine -> fs . fp_offset - cfa_offset ) ; mem = gen_rtx_MEM ( mode , addr ) ;

add_reg_note ( insn , REG_CFA_EXPRESSION , gen_rtx_SET ( VOIDmode , mem , reg ) ) ;


<s> static void ix86_emit_save_sse_regs_using_mov ( HOST_WIDE_INT cfa_offset ) { unsigned int regno ; for ( regno = <NUM_LIT> ; regno < FIRST_PSEUDO_REGISTER ; regno ++ ) if ( SSE_REGNO_P ( regno ) && ix86_save_reg ( regno , true ) ) { ix86_emit_save_reg_using_mov ( V4SFmode , regno , cfa_offset ) ; cfa_offset -= <NUM_LIT> ; }


<s> x0 = gen_reg_rtx ( mode ) ; e0 = gen_reg_rtx ( mode ) ; e1 = gen_reg_rtx ( mode ) ; x1 = gen_reg_rtx ( mode ) ; b = force_reg ( mode , b ) ; if ( mode == V16SFmode || mode == V8DFmode ) emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP14 ) ) ) ; else emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e0 , gen_rtx_MULT ( mode , x0 , b ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e0 , gen_rtx_MULT ( mode , x0 , e0 ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e1 , gen_rtx_PLUS ( mode , x0 , x0 ) ) ) ;

emit_insn ( gen_rtx_SET ( VOIDmode , x1 , gen_rtx_MINUS ( mode , e1 , e0 ) ) ) ;


<s> x1 = gen_reg_rtx ( mode ) ; b = force_reg ( mode , b ) ; if ( mode == V16SFmode || mode == V8DFmode ) emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP14 ) ) ) ; else emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e0 , gen_rtx_MULT ( mode , x0 , b ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e0 , gen_rtx_MULT ( mode , x0 , e0 ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , e1 , gen_rtx_PLUS ( mode , x0 , x0 ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , x1 , gen_rtx_MINUS ( mode , e1 , e0 ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , res , gen_rtx_MULT ( mode , a , x1 ) ) ) ;


<s> mthree = CONST_DOUBLE_FROM_REAL_VALUE ( r , SFmode ) ; real_arithmetic ( & r , NEGATE_EXPR , & dconsthalf , NULL ) ; mhalf = CONST_DOUBLE_FROM_REAL_VALUE ( r , SFmode ) ; unspec = UNSPEC_RSQRT ; if ( VECTOR_MODE_P ( mode ) ) { mthree = ix86_build_const_vector ( mode , true , mthree ) ; mhalf = ix86_build_const_vector ( mode , true , mhalf ) ; if ( GET_MODE_SIZE ( mode ) == <NUM_LIT> ) unspec = UNSPEC_RSQRT14 ; } a = force_reg ( mode , a ) ; emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , a ) , unspec ) ) ) ; if ( ! recip ) { rtx zero , mask ; zero = gen_reg_rtx ( mode ) ; mask = gen_reg_rtx ( mode ) ; zero = force_reg ( mode , CONST0_RTX ( mode ) ) ; if ( VECTOR_MODE_P ( mode ) && GET_MODE_SIZE ( mode ) == <NUM_LIT> ) { mask = gen_reg_rtx ( HImode ) ; emit_insn ( gen_avx512f_cmpv16sf3 ( mask , zero , a , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_avx512f_blendmv16sf ( x0 , zero , x0 , mask ) ) ; } else { emit_insn ( gen_rtx_SET ( VOIDmode , mask , gen_rtx_NE ( mode , zero , a ) ) ) ; emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_AND ( mode , x0 , mask ) ) ) ; } } emit_insn ( gen_rtx_SET ( VOIDmode , e0 , gen_rtx_MULT ( mode , x0 , a ) ) ) ;

emit_insn ( gen_rtx_SET ( VOIDmode , e1 , gen_rtx_MULT ( mode , e0 , x0 ) ) ) ;


<s> e2 = gen_reg_rtx ( mode ) ; e3 = gen_reg_rtx ( mode ) ; real_from_integer ( & r , VOIDmode , - <NUM_LIT> , SIGNED ) ; mthree = CONST_DOUBLE_FROM_REAL_VALUE ( r , SFmode ) ; real_arithmetic ( & r , NEGATE_EXPR , & dconsthalf , NULL ) ; mhalf = CONST_DOUBLE_FROM_REAL_VALUE ( r , SFmode ) ; unspec = UNSPEC_RSQRT ; if ( VECTOR_MODE_P ( mode ) ) { mthree = ix86_build_const_vector ( mode , true , mthree ) ; mhalf = ix86_build_const_vector ( mode , true , mhalf ) ; if ( GET_MODE_SIZE ( mode ) == <NUM_LIT> ) unspec = UNSPEC_RSQRT14 ; } a = force_reg ( mode , a ) ; emit_insn ( gen_rtx_SET ( VOIDmode , x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , a ) , unspec ) ) ) ; if ( ! recip ) { rtx zero , mask ; zero = gen_reg_rtx ( mode ) ; mask = gen_reg_rtx ( mode ) ; zero = force_reg ( mode , CONST0_RTX ( mode ) ) ; if ( VECTOR_MODE_P ( mode ) && GET_MODE_SIZE ( mode ) == <NUM_LIT> ) { mask = gen_reg_rtx ( HImode ) ; emit_insn ( gen_avx512f_cmpv16sf3 ( mask , zero , a , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_avx512f_blendmv16sf ( x0 , zero , x0 , mask ) ) ;


<s> static rtx ix86_erase_embedded_rounding ( rtx pat ) { if ( GET_CODE ( pat ) == INSN ) pat = PATTERN ( pat ) ; gcc_assert ( GET_CODE ( pat ) == PARALLEL ) ; if ( XVECLEN ( pat , <NUM_LIT> ) == <NUM_LIT> ) { rtx p0 = XVECEXP ( pat , <NUM_LIT> , <NUM_LIT> ) ; rtx p1 = XVECEXP ( pat , <NUM_LIT> , <NUM_LIT> ) ; gcc_assert ( GET_CODE ( p0 ) == SET && GET_CODE ( p1 ) == UNSPEC && XINT ( p1 , <NUM_LIT> ) == UNSPEC_EMBEDDED_ROUNDING ) ; return p0 ; } else { rtx * res = XALLOCAVEC ( rtx , XVECLEN ( pat , <NUM_LIT> ) ) ; int i = <NUM_LIT> ; int j = <NUM_LIT> ; for ( ; i < XVECLEN ( pat , <NUM_LIT> ) ; ++ i ) { rtx elem = XVECEXP ( pat , <NUM_LIT> , i ) ;

if ( GET_CODE ( elem ) != UNSPEC || XINT ( elem , <NUM_LIT> ) != UNSPEC_EMBEDDED_ROUNDING ) res [ j ++ ] = elem ;


<s> case V2DFmode : cmp = gen_sse2_maskcmpv2df3 ; break ; default : gcc_unreachable ( ) ; } tmp [ <NUM_LIT> ] = gen_rtx_LE ( mode , two31r , val ) ; emit_insn ( cmp ( tmp [ <NUM_LIT> ] , two31r , val , tmp [ <NUM_LIT> ] ) ) ; tmp [ <NUM_LIT> ] = expand_simple_binop ( mode , AND , tmp [ <NUM_LIT> ] , two31r , tmp [ <NUM_LIT> ] , <NUM_LIT> , OPTAB_DIRECT ) ; if ( intmode == V4SImode || TARGET_AVX2 ) * xorp = expand_simple_binop ( intmode , ASHIFT , gen_lowpart ( intmode , tmp [ <NUM_LIT> ] ) , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; else {


<s> rtx ( * cmp ) ( rtx , rtx , rtx , rtx ) ; int i ; for ( i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) tmp [ i ] = gen_reg_rtx ( mode ) ; real_ldexp ( & TWO31r , & dconst1 , <NUM_LIT> ) ; two31r = const_double_from_real_value ( TWO31r , scalarmode ) ; two31r = ix86_build_const_vector ( mode , <NUM_LIT> , two31r ) ; two31r = force_reg ( mode , two31r ) ; switch ( mode ) { case V8SFmode : cmp = gen_avx_maskcmpv8sf3 ; break ; case V4SFmode : cmp = gen_sse_maskcmpv4sf3 ; break ; case V4DFmode : cmp = gen_avx_maskcmpv4df3 ; break ; case V2DFmode : cmp = gen_sse2_maskcmpv2df3 ; break ; default : gcc_unreachable ( ) ; } tmp [ <NUM_LIT> ] = gen_rtx_LE ( mode , two31r , val ) ; emit_insn ( cmp ( tmp [ <NUM_LIT> ] , two31r , val , tmp [ <NUM_LIT> ] ) ) ; tmp [ <NUM_LIT> ] = expand_simple_binop ( mode , AND , tmp [ <NUM_LIT> ] , two31r , tmp [ <NUM_LIT> ] , <NUM_LIT> , OPTAB_DIRECT ) ; if ( intmode == V4SImode || TARGET_AVX2 ) * xorp = expand_simple_binop ( intmode , ASHIFT , gen_lowpart ( intmode , tmp [ <NUM_LIT> ] ) , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; else { rtx two31 = GEN_INT ( ( unsigned HOST_WIDE_INT ) <NUM_LIT> << <NUM_LIT> ) ;


<s> if ( count == <NUM_LIT> || ( count * ix86_cost -> add <= ix86_cost -> shift_const && ! optimize_insn_for_size_p ( ) ) ) { insn = mode == DImode ? gen_addsi3 : gen_adddi3 ; while ( count -- > <NUM_LIT> ) emit_insn ( insn ( operand , operand , operand ) ) ; } else { insn = mode == DImode ? gen_ashlsi3 : gen_ashldi3 ;

emit_insn ( insn ( operand , operand , GEN_INT ( count ) ) ) ;


<s> src2 = operands [ <NUM_LIT> ] ; op = gen_rtx_SET ( VOIDmode , dst , gen_rtx_fmt_ee ( code , mode , src1 , src2 ) ) ; if ( reload_in_progress ) { gcc_assert ( code == PLUS ) ; emit_insn ( op ) ; } else if ( reload_completed && code == PLUS && ! rtx_equal_p ( dst , src1 ) ) { emit_insn ( op ) ; } else { clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ; }

if ( dst != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , dst ) ;


<s> } else { clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ; } if ( dst != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , dst ) ;


<s> simple : tmp = ix86_expand_compare ( code , op0 , op1 ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; emit_jump_insn ( gen_rtx_SET ( VOIDmode , pc_rtx , tmp ) ) ; return ; case DImode : if ( TARGET_64BIT ) goto simple ; case TImode : { rtx lo [ <NUM_LIT> ] , hi [ <NUM_LIT> ] ; rtx_code_label * label2 ; enum rtx_code code1 , code2 , code3 ; machine_mode submode ; if ( CONSTANT_P ( op0 ) && ! CONSTANT_P ( op1 ) ) { std :: swap ( op0 , op1 ) ; code = swap_condition ( code ) ; } split_double_mode ( mode , & op0 , <NUM_LIT> , lo + <NUM_LIT> , hi + <NUM_LIT> ) ; split_double_mode ( mode , & op1 , <NUM_LIT> , lo + <NUM_LIT> , hi + <NUM_LIT> ) ; submode = mode == DImode ? SImode : DImode ; if ( ( code == EQ || code == NE ) && ( ! optimize_insn_for_size_p ( ) || hi [ <NUM_LIT> ] == const0_rtx || lo [ <NUM_LIT> ] == const0_rtx ) ) { rtx xor0 , xor1 ; xor1 = hi [ <NUM_LIT> ] ; if ( hi [ <NUM_LIT> ] != const0_rtx ) xor1 = expand_binop ( submode , xor_optab , xor1 , hi [ <NUM_LIT> ] , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; xor0 = lo [ <NUM_LIT> ] ; if ( lo [ <NUM_LIT> ] != const0_rtx ) xor0 = expand_binop ( submode , xor_optab , xor0 , lo [ <NUM_LIT> ] , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; tmp = expand_binop ( submode , ior_optab , xor1 , xor0 , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; ix86_expand_branch ( code , tmp , const0_rtx , label ) ; return ; } if ( CONST_INT_P ( hi [ <NUM_LIT> ] ) ) switch ( code ) { case LT : case LTU : case GE : case GEU : if ( lo [ <NUM_LIT> ] == const0_rtx ) { ix86_expand_branch ( code , hi [ <NUM_LIT> ] , hi [ <NUM_LIT> ] , label ) ; return ; } break ; case LE : case LEU : case GT : case GTU : if ( lo [ <NUM_LIT> ] == constm1_rtx ) {


<s> } if ( ix86_cmodel == CM_LARGE_PIC && ! TARGET_PECOFF && MEM_P ( fnaddr ) && GET_CODE ( XEXP ( fnaddr , <NUM_LIT> ) ) == SYMBOL_REF && ! local_symbolic_operand ( XEXP ( fnaddr , <NUM_LIT> ) , VOIDmode ) ) fnaddr = gen_rtx_MEM ( QImode , construct_plt_address ( XEXP ( fnaddr , <NUM_LIT> ) ) ) ; else if ( sibcall ? ! sibcall_insn_operand ( XEXP ( fnaddr , <NUM_LIT> ) , word_mode ) : ! call_insn_operand ( XEXP ( fnaddr , <NUM_LIT> ) , word_mode ) ) { fnaddr = convert_to_mode ( word_mode , XEXP ( fnaddr , <NUM_LIT> ) , <NUM_LIT> ) ; fnaddr = gen_rtx_MEM ( QImode , copy_to_mode_reg ( word_mode , fnaddr ) ) ; } call = gen_rtx_CALL ( VOIDmode , fnaddr , callarg1 ) ; if ( retval ) { if ( TARGET_MPX && SCALAR_INT_MODE_P ( GET_MODE ( retval ) ) ) { rtx b0 = gen_rtx_REG ( BND64mode , FIRST_BND_REG ) ; rtx b1 = gen_rtx_REG ( BND64mode , FIRST_BND_REG + <NUM_LIT> ) ; if ( GET_CODE ( retval ) == PARALLEL ) { b0 = gen_rtx_EXPR_LIST ( VOIDmode , b0 , const0_rtx ) ; b1 = gen_rtx_EXPR_LIST ( VOIDmode , b1 , const0_rtx ) ; rtx par = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , b0 , b1 ) ) ; retval = chkp_join_splitted_slot ( retval , par ) ; } else { retval = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , retval , b0 , b1 ) ) ; chkp_put_regs_to_expr_list ( retval ) ; } } call = gen_rtx_SET ( VOIDmode , retval , call ) ; } vec [ vec_len ++ ] = call ; if ( pop ) { pop = gen_rtx_PLUS ( Pmode , stack_pointer_rtx , pop ) ; pop = gen_rtx_SET ( VOIDmode , stack_pointer_rtx , pop ) ;


<s> use_reg ( & use , al ) ; } if ( ix86_cmodel == CM_LARGE_PIC && ! TARGET_PECOFF && MEM_P ( fnaddr ) && GET_CODE ( XEXP ( fnaddr , <NUM_LIT> ) ) == SYMBOL_REF && ! local_symbolic_operand ( XEXP ( fnaddr , <NUM_LIT> ) , VOIDmode ) ) fnaddr = gen_rtx_MEM ( QImode , construct_plt_address ( XEXP ( fnaddr , <NUM_LIT> ) ) ) ; else if ( sibcall ? ! sibcall_insn_operand ( XEXP ( fnaddr , <NUM_LIT> ) , word_mode ) : ! call_insn_operand ( XEXP ( fnaddr , <NUM_LIT> ) , word_mode ) ) { fnaddr = convert_to_mode ( word_mode , XEXP ( fnaddr , <NUM_LIT> ) , <NUM_LIT> ) ; fnaddr = gen_rtx_MEM ( QImode , copy_to_mode_reg ( word_mode , fnaddr ) ) ; } call = gen_rtx_CALL ( VOIDmode , fnaddr , callarg1 ) ; if ( retval ) { if ( TARGET_MPX && SCALAR_INT_MODE_P ( GET_MODE ( retval ) ) ) { rtx b0 = gen_rtx_REG ( BND64mode , FIRST_BND_REG ) ; rtx b1 = gen_rtx_REG ( BND64mode , FIRST_BND_REG + <NUM_LIT> ) ; if ( GET_CODE ( retval ) == PARALLEL ) { b0 = gen_rtx_EXPR_LIST ( VOIDmode , b0 , const0_rtx ) ; b1 = gen_rtx_EXPR_LIST ( VOIDmode , b1 , const0_rtx ) ; rtx par = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , b0 , b1 ) ) ; retval = chkp_join_splitted_slot ( retval , par ) ;


<s> break ; case EQ : case NE : if ( op1 != const0_rtx ) return false ; op1 = const1_rtx ; code = ( code == EQ ? LTU : GEU ) ; break ; case GTU : case LEU : if ( CONST_INT_P ( op1 ) ) { op1 = gen_int_mode ( INTVAL ( op1 ) + <NUM_LIT> , GET_MODE ( op0 ) ) ; if ( op1 == const0_rtx || ! x86_64_immediate_operand ( op1 , GET_MODE ( op1 ) ) ) return false ; code = ( code == GTU ? GEU : LTU ) ; } else { std :: swap ( op0 , op1 ) ; code = ( code == GTU ? LTU : GEU ) ; } break ; case LT : case GE : if ( mode == DImode || op1 != const0_rtx ) return false ; op1 = gen_int_mode ( <NUM_LIT> << ( GET_MODE_BITSIZE ( mode ) - <NUM_LIT> ) , mode ) ; code = ( code == LT ? GEU : LTU ) ; break ; case LE : case GT :

if ( mode == DImode || op1 != constm1_rtx ) return false ;


<s> rtx clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ;

tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , tmp , clob ) ) ;


<s> rtx clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , tmp , clob ) ) ; }


<s> else if ( SCALAR_FLOAT_MODE_P ( GET_MODE ( op0 ) ) ) { gcc_assert ( ! DECIMAL_FLOAT_MODE_P ( GET_MODE ( op0 ) ) ) ; ret = ix86_expand_fp_compare ( code , op0 , op1 , NULL_RTX ) ;


<s> op0 = force_reg ( vmode , v ) ; } } else if ( op0 != CONST0_RTX ( mode ) ) op0 = force_reg ( mode , op0 ) ; mask = ix86_build_signbit_mask ( vmode , <NUM_LIT> , <NUM_LIT> ) ; if ( mode == SFmode ) copysign_insn = gen_copysignsf3_const ; else if ( mode == DFmode ) copysign_insn = gen_copysigndf3_const ; else copysign_insn = gen_copysigntf3_const ; emit_insn ( copysign_insn ( dest , op0 , op1 , mask ) ) ; } else { rtx ( * copysign_insn ) ( rtx , rtx , rtx , rtx , rtx , rtx ) ; nmask = ix86_build_signbit_mask ( vmode , <NUM_LIT> , <NUM_LIT> ) ; mask = ix86_build_signbit_mask ( vmode , <NUM_LIT> , <NUM_LIT> ) ; if ( mode == SFmode ) copysign_insn = gen_copysignsf3_var ; else if ( mode == DFmode ) copysign_insn = gen_copysigndf3_var ;


<s> tmp = expand_simple_binop ( mode , do_floor ? MINUS : PLUS , xa , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; emit_move_insn ( res , tmp ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) ix86_sse_copysign_to_positive ( res , res , force_reg ( mode , operand1 ) , mask ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_sse_copysign_to_positive ( xa , xa , res , mask ) ; one = force_reg ( mode , const_double_from_real_value ( do_floor ? dconst1 : dconstm1 , mode ) ) ;

tmp = ix86_expand_sse_compare_mask ( UNGT , xa , res , ! do_floor ) ;


<s> if ( vector_mode ) use_sse = true ; else if ( mode == TFmode ) use_sse = true ; else if ( TARGET_SSE_MATH ) { use_sse = SSE_FLOAT_MODE_P ( mode ) ; if ( mode == SFmode ) vmode = V4SFmode ; else if ( mode == DFmode ) vmode = V2DFmode ; } if ( use_sse ) mask = ix86_build_signbit_mask ( vmode , vector_mode , code == ABS ) ; else mask = NULL_RTX ; dst = operands [ <NUM_LIT> ] ; src = operands [ <NUM_LIT> ] ; set = gen_rtx_fmt_e ( code , mode , src ) ; set = gen_rtx_SET ( VOIDmode , dst , set ) ; if ( mask ) { rtx use , clob ; rtvec par ; use = gen_rtx_USE ( VOIDmode , mask ) ; if ( vector_mode ) par = gen_rtvec ( <NUM_LIT> , set , use ) ;


<s> case LT : case UNLT : if ( code == LT && TARGET_IEEE_FP ) { emit_insn ( gen_andqi_ext_0 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_cmpqi_ext_3 ( scratch , const1_rtx ) ) ; intcmp_mode = CCmode ; code = EQ ; } else { emit_insn ( gen_testqi_ext_ccno_0 ( scratch , const1_rtx ) ) ; code = NE ; } break ; case GE : case UNGE : if ( code == GE || ! TARGET_IEEE_FP ) { emit_insn ( gen_testqi_ext_ccno_0 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; code = EQ ; } else { emit_insn ( gen_andqi_ext_0 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_xorqi_cc_ext_1 ( scratch , scratch , const1_rtx ) ) ; code = NE ; } break ; case LE : case UNLE : if ( code == LE && TARGET_IEEE_FP ) { emit_insn ( gen_andqi_ext_0 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_addqi_ext_1 ( scratch , scratch , constm1_rtx ) ) ; emit_insn ( gen_cmpqi_ext_3 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; intcmp_mode = CCmode ; code = LTU ; } else { emit_insn ( gen_testqi_ext_ccno_0 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; code = NE ; } break ; case EQ : case UNEQ : if ( code == EQ && TARGET_IEEE_FP ) { emit_insn ( gen_andqi_ext_0 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_cmpqi_ext_3 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; intcmp_mode = CCmode ; code = EQ ; } else { emit_insn ( gen_testqi_ext_ccno_0 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; code = NE ; } break ; case NE : case LTGT : if ( code == NE && TARGET_IEEE_FP ) {


<s> machine_mode cmode ; cmode = GET_MODE ( op0 ) ; if ( cmode == VOIDmode ) cmode = GET_MODE ( op1 ) ; if ( cmode != mode ) return false ; code = ix86_prepare_sse_fp_compare_args ( operands [ <NUM_LIT> ] , code , & op0 , & op1 ) ; if ( code == UNKNOWN ) return false ; if ( ix86_expand_sse_fp_minmax ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) return true ; tmp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; ix86_expand_sse_movcc ( operands [ <NUM_LIT> ] , tmp , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; return true ; } if ( GET_MODE ( op0 ) == TImode || ( GET_MODE ( op0 ) == DImode && ! TARGET_64BIT ) ) return false ; compare_op = ix86_expand_compare ( code , op0 , op1 ) ; if ( ! fcmov_comparison_operator ( compare_op , VOIDmode ) ) {


<s> machine_mode cmode ; cmode = GET_MODE ( op0 ) ; if ( cmode == VOIDmode ) cmode = GET_MODE ( op1 ) ; if ( cmode != mode ) return false ; code = ix86_prepare_sse_fp_compare_args ( operands [ <NUM_LIT> ] , code , & op0 , & op1 ) ; if ( code == UNKNOWN ) return false ; if ( ix86_expand_sse_fp_minmax ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) return true ; tmp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; ix86_expand_sse_movcc ( operands [ <NUM_LIT> ] , tmp , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; return true ; } if ( GET_MODE ( op0 ) == TImode || ( GET_MODE ( op0 ) == DImode && ! TARGET_64BIT ) ) return false ; compare_op = ix86_expand_compare ( code , op0 , op1 ) ; if ( ! fcmov_comparison_operator ( compare_op , VOIDmode ) ) { tmp = gen_reg_rtx ( QImode ) ; ix86_expand_setcc ( tmp , code , op0 , op1 ) ; compare_op = ix86_expand_compare ( NE , tmp , const0_rtx ) ; } emit_insn ( gen_rtx_SET ( VOIDmode , operands [ <NUM_LIT> ] , gen_rtx_IF_THEN_ELSE ( mode , compare_op , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) ) ; return true ;


<s> static rtx ix86_expand_int_compare ( enum rtx_code code , rtx op0 , rtx op1 ) { machine_mode cmpmode ; rtx tmp , flags ; cmpmode = SELECT_CC_MODE ( code , op0 , op1 ) ; flags = gen_rtx_REG ( cmpmode , FLAGS_REG ) ;

tmp = gen_rtx_COMPARE ( cmpmode , op0 , op1 ) ;


<s> machine_mode cmpmode ; rtx tmp , flags ; cmpmode = SELECT_CC_MODE ( code , op0 , op1 ) ; flags = gen_rtx_REG ( cmpmode , FLAGS_REG ) ; tmp = gen_rtx_COMPARE ( cmpmode , op0 , op1 ) ;

emit_insn ( gen_rtx_SET ( VOIDmode , flags , tmp ) ) ;


<s> case LT : case LTU : std :: swap ( cop0 , cop1 ) ; code = swap_condition ( code ) ; break ; default : gcc_unreachable ( ) ; } if ( mode == V2DImode ) { switch ( code ) { case EQ : if ( ! TARGET_SSE4_1 ) return false ; break ; case GT : case GTU : if ( ! TARGET_SSE4_2 ) return false ; break ; default : gcc_unreachable ( ) ; } } if ( code == GTU ) { cop0 = force_reg ( mode , cop0 ) ; switch ( mode ) { case V16SImode : case V8DImode : case V8SImode : case V4DImode : case V4SImode : case V2DImode : { rtx t1 , t2 , mask ; rtx ( * gen_sub3 ) ( rtx , rtx , rtx ) ; switch ( mode ) { case V16SImode : gen_sub3 = gen_subv16si3 ; break ; case V8DImode : gen_sub3 = gen_subv8di3 ; break ; case V8SImode : gen_sub3 = gen_subv8si3 ; break ; case V4DImode : gen_sub3 = gen_subv4di3 ; break ; case V4SImode : gen_sub3 = gen_subv4si3 ; break ; case V2DImode : gen_sub3 = gen_subv2di3 ; break ; default : gcc_unreachable ( ) ; } mask = ix86_build_signbit_mask ( mode , true , false ) ; t1 = gen_reg_rtx ( mode ) ; emit_insn ( gen_sub3 ( t1 , cop0 , mask ) ) ; t2 = gen_reg_rtx ( mode ) ; emit_insn ( gen_sub3 ( t2 , cop1 , mask ) ) ; cop0 = t1 ; cop1 = t2 ; code = GT ; } break ; case V64QImode : case V32HImode : case V32QImode : case V16HImode : case V16QImode : case V8HImode : x = gen_reg_rtx ( mode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , x , gen_rtx_US_MINUS ( mode , cop0 , cop1 ) ) ) ; cop0 = x ; cop1 = CONST0_RTX ( mode ) ; code = EQ ; negate = ! negate ; break ; default : gcc_unreachable ( ) ; } } } if ( data_mode == mode ) { x = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , code , cop0 , cop1 , operands [ <NUM_LIT> + negate ] , operands [ <NUM_LIT> - negate ] ) ; }


<s> machine_mode mode = GET_MODE ( op1 ) ; const struct real_format * fmt ; REAL_VALUE_TYPE pred_half , half_minus_pred_half ; rtx adj ; fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ; REAL_ARITHMETIC ( pred_half , MINUS_EXPR , dconsthalf , half_minus_pred_half ) ;

adj = force_reg ( mode , const_double_from_real_value ( pred_half , mode ) ) ;


<s> machine_mode mode = GET_MODE ( op1 ) ; const struct real_format * fmt ; REAL_VALUE_TYPE pred_half , half_minus_pred_half ; rtx adj ; fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ;


<s> tmp = expand_simple_binop ( Pmode , PLUS , tmp , addend , op0 , <NUM_LIT> , OPTAB_DIRECT ) ; if ( tmp == op0 ) return ; op1 = convert_to_mode ( mode , tmp , <NUM_LIT> ) ; } } if ( ( flag_pic || MACHOPIC_INDIRECT ) && symbolic_operand ( op1 , mode ) ) { if ( TARGET_MACHO && ! TARGET_64BIT ) { if ( MACHOPIC_INDIRECT ) { rtx temp = ( ( reload_in_progress || ( ( op0 && REG_P ( op0 ) ) && mode == Pmode ) ) ? op0 : gen_reg_rtx ( Pmode ) ) ; op1 = machopic_indirect_data_reference ( op1 , temp ) ; if ( MACHOPIC_PURE ) op1 = machopic_legitimize_pic_address ( op1 , mode , temp == op1 ? <NUM_LIT> : temp ) ; } if ( op0 != op1 && GET_CODE ( op0 ) != MEM ) { rtx insn = gen_rtx_SET ( VOIDmode , op0 , op1 ) ; emit_insn ( insn ) ; return ; } if ( GET_CODE ( op0 ) == MEM ) op1 = force_reg ( Pmode , op1 ) ; else { rtx temp = op0 ; if ( GET_CODE ( temp ) != REG ) temp = gen_reg_rtx ( Pmode ) ; temp = legitimize_pic_address ( op1 , temp ) ; if ( temp == op0 ) return ; op1 = temp ; } } else { if ( MEM_P ( op0 ) ) op1 = force_reg ( mode , op1 ) ; else if ( ! ( TARGET_64BIT && x86_64_movabs_operand ( op1 , DImode ) ) ) { rtx reg = can_create_pseudo_p ( ) ? NULL_RTX : op0 ; op1 = legitimize_pic_address ( op1 , reg ) ; if ( op0 == op1 ) return ; op1 = convert_to_mode ( mode , op1 , <NUM_LIT> ) ; } } } else { if ( MEM_P ( op0 ) && ( PUSH_ROUNDING ( GET_MODE_SIZE ( mode ) ) != GET_MODE_SIZE ( mode ) || ! push_operand ( op0 , mode ) ) && MEM_P ( op1 ) ) op1 = force_reg ( mode , op1 ) ; if ( push_operand ( op0 , mode ) && ! general_no_elim_operand ( op1 , mode ) ) op1 = copy_to_mode_reg ( mode , op1 ) ; if ( can_create_pseudo_p ( ) && ( mode == DImode ) && TARGET_64BIT && immediate_operand ( op1 , mode ) && ! x86_64_zext_immediate_operand ( op1 , VOIDmode ) && ! register_operand ( op0 , mode ) && optimize ) op1 = copy_to_mode_reg ( mode , op1 ) ; if ( can_create_pseudo_p ( ) && FLOAT_MODE_P ( mode ) && GET_CODE ( op1 ) == CONST_DOUBLE ) { op1 = validize_mem ( force_const_mem ( mode , op1 ) ) ; if ( ! register_operand ( op0 , mode ) ) { rtx temp = gen_reg_rtx ( mode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , temp , op1 ) ) ; emit_move_insn ( op0 , temp ) ; return ;


<s> goto xop_rotl ; case CODE_FOR_xop_rotlv16qi3 : new_icode = CODE_FOR_rotlv16qi3 ; xop_rotl : if ( CONST_INT_P ( op ) ) { int mask = GET_MODE_BITSIZE ( GET_MODE_INNER ( tmode ) ) - <NUM_LIT> ; op = GEN_INT ( INTVAL ( op ) & mask ) ; gcc_checking_assert ( insn_data [ icode ] . operand [ i + <NUM_LIT> ] . predicate ( op , mode ) ) ; } else { gcc_checking_assert ( nargs == <NUM_LIT> && insn_data [ new_icode ] . operand [ <NUM_LIT> ] . mode == tmode && insn_data [ new_icode ] . operand [ <NUM_LIT> ] . mode == tmode && insn_data [ new_icode ] . operand [ <NUM_LIT> ] . mode == mode && insn_data [ new_icode ] . operand [ <NUM_LIT> ] . predicate == insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate && insn_data [ new_icode ] . operand [ <NUM_LIT> ] . predicate == insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ) ; icode = new_icode ; goto non_constant ; } break ; default : gcc_unreachable ( ) ; } } } else { non_constant : if ( VECTOR_MODE_P ( mode ) ) op = safe_vector_operand ( op , mode ) ; if ( memory_operand ( op , mode ) ) num_memory ++ ; gcc_assert ( GET_MODE ( op ) == mode || GET_MODE ( op ) == VOIDmode ) ; if ( optimize || ! insn_data [ icode ] . operand [ i + adjust + <NUM_LIT> ] . predicate ( op , mode ) || num_memory > <NUM_LIT> ) op = force_reg ( mode , op ) ; } args [ i ] . op = op ; args [ i ] . mode = mode ; } switch ( nargs ) { case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op ) ; break ; case <NUM_LIT> : if ( tf_p ) pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , GEN_INT ( ( int ) sub_code ) ) ;

else if ( ! comparison_p ) pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ;


<s> rtx src = operands [ <NUM_LIT> ] ; unsigned int size = INTVAL ( operands [ <NUM_LIT> ] ) ; unsigned int pos = INTVAL ( operands [ <NUM_LIT> ] ) ; if ( GET_CODE ( dst ) == SUBREG ) { pos += SUBREG_BYTE ( dst ) * BITS_PER_UNIT ; dst = SUBREG_REG ( dst ) ; } if ( GET_CODE ( src ) == SUBREG ) src = SUBREG_REG ( src ) ; switch ( GET_MODE ( dst ) ) { case V16QImode : case V8HImode : case V4SImode : case V2DImode : { machine_mode srcmode , dstmode ;

rtx ( * pinsr ) ( rtx , rtx , rtx , rtx ) ;


<s> emit_reduc_half ( half , vec , i ) ; if ( i == GET_MODE_BITSIZE ( GET_MODE_INNER ( mode ) ) * <NUM_LIT> ) dst = dest ; else dst = gen_reg_rtx ( mode ) ; emit_insn ( fn ( dst , half , vec ) ) ;


<s> machine_mode mode = GET_MODE ( in ) ; int i ; if ( TARGET_SSE4_1 && mode == V8HImode && fn == gen_uminv8hi3 ) { emit_insn ( gen_sse4_1_phminposuw ( dest , in ) ) ; return ; } for ( i = GET_MODE_BITSIZE ( mode ) ; i > GET_MODE_BITSIZE ( GET_MODE_INNER ( mode ) ) ; i >>= <NUM_LIT> ) { half = gen_reg_rtx ( mode ) ; emit_reduc_half ( half , vec , i ) ; if ( i == GET_MODE_BITSIZE ( GET_MODE_INNER ( mode ) ) * <NUM_LIT> ) dst = dest ; else dst = gen_reg_rtx ( mode ) ; emit_insn ( fn ( dst , half , vec ) ) ; vec = dst ; }


<s> res = gen_reg_rtx ( mode ) ; emit_move_insn ( res , operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; TWO52 = ix86_gen_TWO52 ( mode ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_sse_copysign_to_positive ( res , xa , res , mask ) ;


<s> rtx_code_label * label ; res = gen_reg_rtx ( mode ) ; emit_move_insn ( res , operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; TWO52 = ix86_gen_TWO52 ( mode ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_sse_copysign_to_positive ( res , xa , res , mask ) ; emit_label ( label ) ;


<s> rtx_code_label * label ; const struct real_format * fmt ; REAL_VALUE_TYPE pred_half , half_minus_pred_half ; res = gen_reg_rtx ( mode ) ; emit_move_insn ( res , operand1 ) ; TWO52 = ix86_gen_TWO52 ( mode ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ;


<s> xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa2 = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , TWO52 , xa2 , <NUM_LIT> , OPTAB_DIRECT ) ; dxa = expand_simple_binop ( mode , MINUS , xa2 , xa , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; half = force_reg ( mode , const_double_from_real_value ( dconsthalf , mode ) ) ; one = expand_simple_binop ( mode , PLUS , half , half , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; mhalf = expand_simple_binop ( mode , MINUS , half , one , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = gen_reg_rtx ( mode ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , dxa , half , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = ix86_expand_sse_compare_mask ( UNGE , mhalf , dxa , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; xa2 = expand_simple_binop ( mode , PLUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ;

ix86_sse_copysign_to_positive ( res , xa2 , force_reg ( mode , operand1 ) , mask ) ;


<s> void ix86_expand_rounddf_32 ( rtx operand0 , rtx operand1 ) { machine_mode mode = GET_MODE ( operand0 ) ; rtx xa , xa2 , dxa , TWO52 , tmp , half , mhalf , one , res , mask ; rtx_code_label * label ; TWO52 = ix86_gen_TWO52 ( mode ) ; res = gen_reg_rtx ( mode ) ; emit_move_insn ( res , operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa2 = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , TWO52 , xa2 , <NUM_LIT> , OPTAB_DIRECT ) ; dxa = expand_simple_binop ( mode , MINUS , xa2 , xa , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; half = force_reg ( mode , const_double_from_real_value ( dconsthalf , mode ) ) ; one = expand_simple_binop ( mode , PLUS , half , half , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; mhalf = expand_simple_binop ( mode , MINUS , half , one , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = gen_reg_rtx ( mode ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , dxa , half , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = ix86_expand_sse_compare_mask ( UNGE , mhalf , dxa , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; xa2 = expand_simple_binop ( mode , PLUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_sse_copysign_to_positive ( res , xa2 , force_reg ( mode , operand1 ) , mask ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> default : error ( <STR_LIT> ) ; return const0_rtx ; } } } else if ( i == nargs - <NUM_LIT> ) { if ( ! insn_p -> operand [ nargs ] . predicate ( op , SImode ) ) { error ( <STR_LIT> ) ; return const0_rtx ; } if ( INTVAL ( op ) == NO_ROUND ) redundant_embed_rnd = <NUM_LIT> ; } else { if ( VECTOR_MODE_P ( mode ) ) op = safe_vector_operand ( op , mode ) ; op = fixup_modeless_constant ( op , mode ) ; if ( GET_MODE ( op ) == mode || GET_MODE ( op ) == VOIDmode ) { if ( optimize || ! match ) op = copy_to_mode_reg ( mode , op ) ; } else { op = copy_to_reg ( op ) ; op = simplify_gen_subreg ( mode , op , GET_MODE ( op ) , <NUM_LIT> ) ; } } args [ i ] . op = op ; args [ i ] . mode = mode ; } switch ( nargs ) { case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op ) ; break ; case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ; break ; case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ; break ; case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ; break ; case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ; case <NUM_LIT> : pat = GEN_FCN ( icode ) ( target , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op , args [ <NUM_LIT> ] . op ) ; break ; default : gcc_unreachable ( ) ; } if ( ! pat ) return <NUM_LIT> ; if ( redundant_embed_rnd ) pat = ix86_erase_embedded_rounding ( pat ) ; emit_insn ( pat ) ;


<s> rtx ( * gen_round ) ( rtx , rtx , rtx ) ; switch ( mode ) { case SFmode : gen_copysign = gen_copysignsf3 ; gen_round = gen_sse4_1_roundsf2 ; break ; case DFmode : gen_copysign = gen_copysigndf3 ; gen_round = gen_sse4_1_rounddf2 ; break ; default : gcc_unreachable ( ) ; } fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ;


<s> ret = ix86_expand_compare ( code , op0 , op1 ) ; PUT_MODE ( ret , QImode ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dest , ret ) ) ;


<s> } break ; case VOID_FTYPE_UINT_UINT_UINT : case VOID_FTYPE_UINT64_UINT_UINT : case UCHAR_FTYPE_UINT_UINT_UINT : case UCHAR_FTYPE_UINT64_UINT_UINT : nargs = <NUM_LIT> ; klass = load ; memory = ARRAY_SIZE ( args ) ; last_arg_constant = true ; break ; default : gcc_unreachable ( ) ; } gcc_assert ( nargs <= ARRAY_SIZE ( args ) ) ; if ( klass == store ) { arg = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; op = expand_normal ( arg ) ; gcc_assert ( target == <NUM_LIT> ) ; if ( memory ) { op = ix86_zero_extend_to_Pmode ( op ) ; target = gen_rtx_MEM ( tmode , op ) ; unsigned int align = get_pointer_alignment ( arg ) ; if ( aligned_mem && align < GET_MODE_ALIGNMENT ( tmode ) ) align = GET_MODE_ALIGNMENT ( tmode ) ; if ( MEM_ALIGN ( target ) < align ) set_mem_align ( target , align ) ; } else target = force_reg ( tmode , op ) ; arg_adjust = <NUM_LIT> ; } else { arg_adjust = <NUM_LIT> ; if ( optimize || target == <NUM_LIT> || ! register_operand ( target , tmode ) || GET_MODE ( target ) != tmode ) target = gen_reg_rtx ( tmode ) ; } for ( i = <NUM_LIT> ; i < nargs ; i ++ ) { machine_mode mode = insn_p -> operand [ i + <NUM_LIT> ] . mode ; bool match ; arg = CALL_EXPR_ARG ( exp , i + arg_adjust ) ; op = expand_normal ( arg ) ; match = insn_p -> operand [ i + <NUM_LIT> ] . predicate ( op , mode ) ; if ( last_arg_constant && ( i + <NUM_LIT> ) == nargs ) { if ( ! match ) { if ( icode == CODE_FOR_lwp_lwpvalsi3 || icode == CODE_FOR_lwp_lwpinssi3 || icode == CODE_FOR_lwp_lwpvaldi3 || icode == CODE_FOR_lwp_lwpinsdi3 ) error ( <STR_LIT> ) ; else error ( <STR_LIT> ) ; return const0_rtx ; } } else { if ( i == memory ) { op = ix86_zero_extend_to_Pmode ( op ) ; op = gen_rtx_MEM ( mode , op ) ; unsigned int align = get_pointer_alignment ( arg ) ; if ( aligned_mem && align < GET_MODE_ALIGNMENT ( mode ) ) align = GET_MODE_ALIGNMENT ( mode ) ; if ( MEM_ALIGN ( op ) < align ) set_mem_align ( op , align ) ; } else { if ( VECTOR_MODE_P ( mode ) ) op = safe_vector_operand ( op , mode ) ; op = fixup_modeless_constant ( op , mode ) ; if ( GET_MODE ( op ) == mode || GET_MODE ( op ) == VOIDmode ) op = copy_to_mode_reg ( mode , op ) ; else { op = copy_to_reg ( op ) ; op = simplify_gen_subreg ( mode , op , GET_MODE ( op ) , <NUM_LIT> ) ; } } } args [ i ] . op = op ; args [ i ] . mode = mode ; } switch ( nargs ) {


<s> SYMBOL_REF_FLAGS ( split_stack_fn ) |= SYMBOL_FLAG_LOCAL ; } fn = split_stack_fn ; allocate_rtx = GEN_INT ( allocate ) ; args_size = crtl -> args . size >= <NUM_LIT> ? crtl -> args . size : <NUM_LIT> ; call_fusage = NULL_RTX ; if ( TARGET_64BIT ) { rtx reg10 , reg11 ; reg10 = gen_rtx_REG ( Pmode , R10_REG ) ; reg11 = gen_rtx_REG ( Pmode , R11_REG ) ; if ( DECL_STATIC_CHAIN ( cfun -> decl ) ) { rtx rax ; rax = gen_rtx_REG ( word_mode , AX_REG ) ; emit_move_insn ( rax , gen_rtx_REG ( word_mode , R10_REG ) ) ; use_reg ( & call_fusage , rax ) ; } if ( ( ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC ) && ! TARGET_PECOFF ) { HOST_WIDE_INT argval ; gcc_assert ( Pmode == DImode ) ; gcc_assert ( ( allocate & ( HOST_WIDE_INT ) <NUM_LIT> ) == allocate ) ; gcc_assert ( ( args_size & <NUM_LIT> ) == args_size ) ; if ( split_stack_fn_large == NULL_RTX ) { split_stack_fn_large = gen_rtx_SYMBOL_REF ( Pmode , <STR_LIT> ) ; SYMBOL_REF_FLAGS ( split_stack_fn_large ) |= SYMBOL_FLAG_LOCAL ; } if ( ix86_cmodel == CM_LARGE_PIC ) { rtx_code_label * label ; rtx x ; label = gen_label_rtx ( ) ; emit_label ( label ) ; LABEL_PRESERVE_P ( label ) = <NUM_LIT> ; emit_insn ( gen_set_rip_rex64 ( reg10 , label ) ) ; emit_insn ( gen_set_got_offset_rex64 ( reg11 , label ) ) ; emit_insn ( ix86_gen_add3 ( reg10 , reg10 , reg11 ) ) ; x = gen_rtx_UNSPEC ( Pmode , gen_rtvec ( <NUM_LIT> , split_stack_fn_large ) , UNSPEC_GOT ) ; x = gen_rtx_CONST ( Pmode , x ) ; emit_move_insn ( reg11 , x ) ; x = gen_rtx_PLUS ( Pmode , reg10 , reg11 ) ; x = gen_const_mem ( Pmode , x ) ; emit_move_insn ( reg11 , x ) ; } else emit_move_insn ( reg11 , split_stack_fn_large ) ; fn = reg11 ; argval = ( ( args_size << <NUM_LIT> ) << <NUM_LIT> ) + allocate ; emit_move_insn ( reg10 , GEN_INT ( argval ) ) ; } else { emit_move_insn ( reg10 , allocate_rtx ) ; emit_move_insn ( reg11 , GEN_INT ( args_size ) ) ; use_reg ( & call_fusage , reg11 ) ; } use_reg ( & call_fusage , reg10 ) ;


<s> case V4SImode : tmp0 = expand_simple_binop ( mode , ASHIFTRT , input , GEN_INT ( GET_MODE_BITSIZE ( GET_MODE_INNER ( mode ) ) - <NUM_LIT> ) , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; tmp1 = expand_simple_binop ( mode , XOR , tmp0 , input , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; x = expand_simple_binop ( mode , MINUS , tmp1 , tmp0 , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; case V8HImode : tmp0 = expand_unop ( mode , neg_optab , input , NULL_RTX , <NUM_LIT> ) ; x = expand_simple_binop ( mode , SMAX , tmp0 , input , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; case V16QImode : tmp0 = expand_unop ( mode , neg_optab , input , NULL_RTX , <NUM_LIT> ) ; x = expand_simple_binop ( V16QImode , UMIN , tmp0 , input , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; default :


<s> case V4SImode : tmp0 = expand_simple_binop ( mode , ASHIFTRT , input , GEN_INT ( GET_MODE_BITSIZE ( GET_MODE_INNER ( mode ) ) - <NUM_LIT> ) , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; tmp1 = expand_simple_binop ( mode , XOR , tmp0 , input , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; x = expand_simple_binop ( mode , MINUS , tmp1 , tmp0 , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; case V8HImode : tmp0 = expand_unop ( mode , neg_optab , input , NULL_RTX , <NUM_LIT> ) ; x = expand_simple_binop ( mode , SMAX , tmp0 , input , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; case V16QImode : tmp0 = expand_unop ( mode , neg_optab , input , NULL_RTX , <NUM_LIT> ) ; x = expand_simple_binop ( V16QImode , UMIN , tmp0 , input , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; default : gcc_unreachable ( ) ; } if ( x != target ) emit_move_insn ( target , x ) ;


<s> else if ( mode == V4DImode ) { umul = gen_vec_widen_umult_even_v8si ; nmode = V8SImode ; } else if ( mode == V8DImode ) { umul = gen_vec_widen_umult_even_v16si ; nmode = V16SImode ; } else gcc_unreachable ( ) ; t1 = gen_reg_rtx ( mode ) ; emit_insn ( umul ( t1 , gen_lowpart ( nmode , op1 ) , gen_lowpart ( nmode , op2 ) ) ) ; t6 = GEN_INT ( <NUM_LIT> ) ; t2 = expand_binop ( mode , lshr_optab , op1 , t6 , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; t3 = expand_binop ( mode , lshr_optab , op2 , t6 , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; t4 = gen_reg_rtx ( mode ) ; t5 = gen_reg_rtx ( mode ) ; emit_insn ( umul ( t4 , gen_lowpart ( nmode , t2 ) , gen_lowpart ( nmode , op2 ) ) ) ; emit_insn ( umul ( t5 , gen_lowpart ( nmode , t3 ) , gen_lowpart ( nmode , op1 ) ) ) ; t4 = expand_binop ( mode , add_optab , t4 , t5 , t4 , <NUM_LIT> , OPTAB_DIRECT ) ; t4 = expand_binop ( mode , ashl_optab , t4 , t6 , t4 , <NUM_LIT> , OPTAB_DIRECT ) ; force_expand_binop ( mode , add_optab , t1 , t4 , op0 , <NUM_LIT> , OPTAB_DIRECT ) ;


<s> machine_mode cmp_mode ; bool maskcmp = false ; rtx x ; if ( GET_MODE_SIZE ( cmp_ops_mode ) == <NUM_LIT> ) { cmp_mode = mode_for_size ( GET_MODE_NUNITS ( cmp_ops_mode ) , MODE_INT , <NUM_LIT> ) ; gcc_assert ( cmp_mode != BLKmode ) ; maskcmp = true ; } else cmp_mode = cmp_ops_mode ; cmp_op0 = force_reg ( cmp_ops_mode , cmp_op0 ) ; if ( ! nonimmediate_operand ( cmp_op1 , cmp_ops_mode ) ) cmp_op1 = force_reg ( cmp_ops_mode , cmp_op1 ) ; if ( optimize || reg_overlap_mentioned_p ( dest , op_true ) || reg_overlap_mentioned_p ( dest , op_false ) ) dest = gen_reg_rtx ( maskcmp ? cmp_mode : mode ) ; if ( maskcmp && ( code == GT || code == EQ ) ) { rtx ( * gen ) ( rtx , rtx , rtx ) ; switch ( cmp_ops_mode ) { case V64QImode : gcc_assert ( TARGET_AVX512BW ) ; gen = code == GT ? gen_avx512bw_gtv64qi3 : gen_avx512bw_eqv64qi3_1 ; break ; case V32HImode : gcc_assert ( TARGET_AVX512BW ) ; gen = code == GT ? gen_avx512bw_gtv32hi3 : gen_avx512bw_eqv32hi3_1 ; break ; case V16SImode : gen = code == GT ? gen_avx512f_gtv16si3 : gen_avx512f_eqv16si3_1 ; break ; case V8DImode : gen = code == GT ? gen_avx512f_gtv8di3 : gen_avx512f_eqv8di3_1 ; break ;


<s> rtx op0 = expand_normal ( arg0 ) ; rtx op1 = expand_normal ( arg1 ) ; machine_mode mode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; enum rtx_code comparison = d -> comparison ; if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( VECTOR_MODE_P ( mode1 ) ) op1 = safe_vector_operand ( op1 , mode1 ) ; if ( d -> flag & BUILTIN_DESC_SWAP_OPERANDS ) std :: swap ( op0 , op1 ) ; target = gen_reg_rtx ( SImode ) ; emit_move_insn ( target , const0_rtx ) ;

target = gen_rtx_SUBREG ( QImode , target , <NUM_LIT> ) ;


<s> rtx op3 = expand_normal ( arg3 ) ; enum insn_code icode = d -> icode ; const struct insn_data_d * insn_p = & insn_data [ icode ] ; machine_mode mode0 = insn_p -> operand [ <NUM_LIT> ] . mode ; machine_mode mode1 = insn_p -> operand [ <NUM_LIT> ] . mode ; enum rtx_code comparison = UNEQ ; bool need_ucomi = false ; enum rtx_code comi_comparisons [ <NUM_LIT> ] = { UNEQ , GT , GE , UNORDERED , LTGT , UNLE , UNLT , ORDERED , UNEQ , UNLT , UNLE , LT , LTGT , GE , GT , LT , UNEQ , GT , GE , UNORDERED , LTGT , UNLE , UNLT , ORDERED , UNEQ , UNLT , UNLE , LT , LTGT , GE , GT , LT } ; bool need_ucomi_values [ <NUM_LIT> ] = { true , false , false , true , true , false , false , true , true , false , false , true , true , false , false , true , false , true , true , false , false , true , true , false , false , true , true , false , false , true , true , false } ; if ( ! CONST_INT_P ( op2 ) ) { error ( <STR_LIT> ) ; return const0_rtx ; } if ( INTVAL ( op2 ) < <NUM_LIT> || INTVAL ( op2 ) >= <NUM_LIT> ) { error ( <STR_LIT> ) ; return const0_rtx ; } if ( ! insn_p -> operand [ <NUM_LIT> ] . predicate ( op3 , SImode ) ) { error ( <STR_LIT> ) ; return const0_rtx ; } comparison = comi_comparisons [ INTVAL ( op2 ) ] ; need_ucomi = need_ucomi_values [ INTVAL ( op2 ) ] ; if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( VECTOR_MODE_P ( mode1 ) ) op1 = safe_vector_operand ( op1 , mode1 ) ; target = gen_reg_rtx ( SImode ) ; emit_move_insn ( target , const0_rtx ) ; target = gen_rtx_SUBREG ( QImode , target , <NUM_LIT> ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_p -> operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_p -> operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ; if ( need_ucomi ) icode = icode == CODE_FOR_sse_comi_round ? CODE_FOR_sse_ucomi_round : CODE_FOR_sse2_ucomi_round ; pat = GEN_FCN ( icode ) ( op0 , op1 , op3 ) ; if ( ! pat ) return <NUM_LIT> ; if ( INTVAL ( op3 ) == NO_ROUND ) {

pat = ix86_erase_embedded_rounding ( pat ) ;


<s> tmp = gen_rtx_REG ( fpcmp_mode , FLAGS_REG ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_COMPARE ( fpcmp_mode , op0 , op1 ) ) ) ; tmp = gen_rtx_fmt_ee ( code , VOIDmode , tmp , const0_rtx ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; tmp = emit_jump_insn ( gen_rtx_SET ( VOIDmode , pc_rtx , tmp ) ) ;


<s> if ( swap_operands ) std :: swap ( op0 , op1 ) ; label = gen_label_rtx ( ) ; tmp = gen_rtx_REG ( fpcmp_mode , FLAGS_REG ) ; emit_insn ( gen_rtx_SET ( VOIDmode , tmp , gen_rtx_COMPARE ( fpcmp_mode , op0 , op1 ) ) ) ; tmp = gen_rtx_fmt_ee ( code , VOIDmode , tmp , const0_rtx ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; tmp = emit_jump_insn ( gen_rtx_SET ( VOIDmode , pc_rtx , tmp ) ) ;


<s> static rtx ix86_expand_sse_fabs ( rtx op0 , rtx * smask ) { machine_mode vmode , mode = GET_MODE ( op0 ) ; rtx xa , mask ; xa = gen_reg_rtx ( mode ) ; if ( mode == SFmode ) vmode = V4SFmode ; else if ( mode == DFmode ) vmode = V2DFmode ; else vmode = mode ;

mask = ix86_build_signbit_mask ( vmode , VECTOR_MODE_P ( mode ) , true ) ;


<s> rtx tmp ; if ( code == LT ) ; else if ( code == UNGE ) std :: swap ( if_true , if_false ) ; else return false ; if ( rtx_equal_p ( cmp_op0 , if_true ) && rtx_equal_p ( cmp_op1 , if_false ) ) is_min = true ; else if ( rtx_equal_p ( cmp_op1 , if_true ) && rtx_equal_p ( cmp_op0 , if_false ) ) is_min = false ; else return false ; mode = GET_MODE ( dest ) ;

if ( ! flag_finite_math_only || ! flag_unsafe_math_optimizations ) {


<s> machine_mode cmpmode = GET_MODE ( cmp ) ; bool maskcmp = ( mode != cmpmode && TARGET_AVX512F ) ; rtx t2 , t3 , x ; if ( vector_all_ones_operand ( op_true , mode ) && rtx_equal_p ( op_false , CONST0_RTX ( mode ) ) && ! maskcmp ) { emit_insn ( gen_rtx_SET ( VOIDmode , dest , cmp ) ) ; } else if ( op_false == CONST0_RTX ( mode ) && ! maskcmp ) { op_true = force_reg ( mode , op_true ) ; x = gen_rtx_AND ( mode , cmp , op_true ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dest , x ) ) ; } else if ( op_true == CONST0_RTX ( mode ) && ! maskcmp ) { op_false = force_reg ( mode , op_false ) ; x = gen_rtx_NOT ( mode , cmp ) ; x = gen_rtx_AND ( mode , x , op_false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dest , x ) ) ; } else if ( INTEGRAL_MODE_P ( mode ) && op_true == CONSTM1_RTX ( mode ) && ! maskcmp ) { op_false = force_reg ( mode , op_false ) ; x = gen_rtx_IOR ( mode , cmp , op_false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dest , x ) ) ; } else if ( TARGET_XOP && ! maskcmp ) { op_true = force_reg ( mode , op_true ) ; if ( ! nonimmediate_operand ( op_false , mode ) ) op_false = force_reg ( mode , op_false ) ; emit_insn ( gen_rtx_SET ( mode , dest , gen_rtx_IF_THEN_ELSE ( mode , cmp , op_true , op_false ) ) ) ; } else { rtx ( * gen ) ( rtx , rtx , rtx , rtx ) = NULL ; rtx d = dest ; if ( ! nonimmediate_operand ( op_true , mode ) ) op_true = force_reg ( mode , op_true ) ; op_false = force_reg ( mode , op_false ) ; switch ( mode ) { case V4SFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvps ; break ; case V2DFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvpd ; break ; case V16QImode : case V8HImode : case V4SImode : case V2DImode : if ( TARGET_SSE4_1 ) { gen = gen_sse4_1_pblendvb ; if ( mode != V16QImode ) d = gen_reg_rtx ( V16QImode ) ; op_false = gen_lowpart ( V16QImode , op_false ) ; op_true = gen_lowpart ( V16QImode , op_true ) ; cmp = gen_lowpart ( V16QImode , cmp ) ; } break ; case V8SFmode : if ( TARGET_AVX ) gen = gen_avx_blendvps256 ; break ; case V4DFmode : if ( TARGET_AVX ) gen = gen_avx_blendvpd256 ; break ; case V32QImode : case V16HImode : case V8SImode : case V4DImode : if ( TARGET_AVX2 ) {


<s> op_true = force_reg ( mode , op_true ) ; if ( ! nonimmediate_operand ( op_false , mode ) ) op_false = force_reg ( mode , op_false ) ; emit_insn ( gen_rtx_SET ( mode , dest , gen_rtx_IF_THEN_ELSE ( mode , cmp , op_true , op_false ) ) ) ; } else { rtx ( * gen ) ( rtx , rtx , rtx , rtx ) = NULL ; rtx d = dest ; if ( ! nonimmediate_operand ( op_true , mode ) ) op_true = force_reg ( mode , op_true ) ; op_false = force_reg ( mode , op_false ) ; switch ( mode ) { case V4SFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvps ; break ; case V2DFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvpd ; break ; case V16QImode : case V8HImode : case V4SImode : case V2DImode : if ( TARGET_SSE4_1 ) { gen = gen_sse4_1_pblendvb ; if ( mode != V16QImode ) d = gen_reg_rtx ( V16QImode ) ; op_false = gen_lowpart ( V16QImode , op_false ) ; op_true = gen_lowpart ( V16QImode , op_true ) ; cmp = gen_lowpart ( V16QImode , cmp ) ; } break ; case V8SFmode : if ( TARGET_AVX ) gen = gen_avx_blendvps256 ; break ; case V4DFmode : if ( TARGET_AVX ) gen = gen_avx_blendvpd256 ; break ; case V32QImode : case V16HImode : case V8SImode : case V4DImode : if ( TARGET_AVX2 ) { gen = gen_avx2_pblendvb ; if ( mode != V32QImode ) d = gen_reg_rtx ( V32QImode ) ; op_false = gen_lowpart ( V32QImode , op_false ) ; op_true = gen_lowpart ( V32QImode , op_true ) ; cmp = gen_lowpart ( V32QImode , cmp ) ; } break ; case V64QImode : gen = gen_avx512bw_blendmv64qi ; break ; case V32HImode : gen = gen_avx512bw_blendmv32hi ; break ; case V16SImode : gen = gen_avx512f_blendmv16si ; break ; case V8DImode : gen = gen_avx512f_blendmv8di ; break ; case V8DFmode : gen = gen_avx512f_blendmv8df ; break ; case V16SFmode : gen = gen_avx512f_blendmv16sf ; break ; default : break ; } if ( gen != NULL ) { emit_insn ( gen ( d , op_false , op_true , cmp ) ) ; if ( d != dest ) emit_move_insn ( dest , gen_lowpart ( GET_MODE ( dest ) , d ) ) ; } else { op_true = force_reg ( mode , op_true ) ; t2 = gen_reg_rtx ( mode ) ;

if ( optimize ) t3 = gen_reg_rtx ( mode ) ;


<s> rtx op1 = expand_normal ( arg1 ) ; rtx op2 = expand_normal ( arg2 ) ; rtx op3 = expand_normal ( arg3 ) ; rtx op4 = expand_normal ( arg4 ) ; machine_mode tmode0 , tmode1 , modev2 , modei3 , modev4 , modei5 , modeimm ; tmode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; tmode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev2 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modei3 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev4 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modei5 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modeimm = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( VECTOR_MODE_P ( modev2 ) ) op0 = safe_vector_operand ( op0 , modev2 ) ; if ( VECTOR_MODE_P ( modev4 ) ) op2 = safe_vector_operand ( op2 , modev4 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , modev2 ) ) op0 = copy_to_mode_reg ( modev2 , op0 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , modei3 ) ) op1 = copy_to_mode_reg ( modei3 , op1 ) ; if ( ( optimize && ! register_operand ( op2 , modev4 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op2 , modev4 ) ) op2 = copy_to_mode_reg ( modev4 , op2 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op3 , modei5 ) ) op3 = copy_to_mode_reg ( modei5 , op3 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op4 , modeimm ) ) { error ( <STR_LIT> ) ; return const0_rtx ; } if ( d -> code == IX86_BUILTIN_PCMPESTRI128 ) { if ( optimize || ! target || GET_MODE ( target ) != tmode0 || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode0 ) ) target = gen_reg_rtx ( tmode0 ) ; scratch1 = gen_reg_rtx ( tmode1 ) ; pat = GEN_FCN ( d -> icode ) ( target , scratch1 , op0 , op1 , op2 , op3 , op4 ) ;


<s> static rtx ix86_expand_sse_pcmpestr ( const struct builtin_description * d , tree exp , rtx target ) { rtx pat ; tree arg0 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; tree arg1 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; tree arg2 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; tree arg3 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; tree arg4 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; rtx scratch0 , scratch1 ; rtx op0 = expand_normal ( arg0 ) ; rtx op1 = expand_normal ( arg1 ) ; rtx op2 = expand_normal ( arg2 ) ; rtx op3 = expand_normal ( arg3 ) ; rtx op4 = expand_normal ( arg4 ) ; machine_mode tmode0 , tmode1 , modev2 , modei3 , modev4 , modei5 , modeimm ; tmode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; tmode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev2 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modei3 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev4 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modei5 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modeimm = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( VECTOR_MODE_P ( modev2 ) ) op0 = safe_vector_operand ( op0 , modev2 ) ; if ( VECTOR_MODE_P ( modev4 ) ) op2 = safe_vector_operand ( op2 , modev4 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , modev2 ) ) op0 = copy_to_mode_reg ( modev2 , op0 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , modei3 ) ) op1 = copy_to_mode_reg ( modei3 , op1 ) ; if ( ( optimize && ! register_operand ( op2 , modev4 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op2 , modev4 ) ) op2 = copy_to_mode_reg ( modev4 , op2 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op3 , modei5 ) ) op3 = copy_to_mode_reg ( modei5 , op3 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op4 , modeimm ) ) { error ( <STR_LIT> ) ; return const0_rtx ; }

if ( d -> code == IX86_BUILTIN_PCMPESTRI128 ) {


<s> extract = high_p ? gen_vec_extract_hi_v16hi : gen_vec_extract_lo_v16hi ; break ; case V16SImode : if ( unsigned_p ) unpack = gen_avx512f_zero_extendv8siv8di2 ; else unpack = gen_avx512f_sign_extendv8siv8di2 ; halfmode = V8SImode ; extract = high_p ? gen_vec_extract_hi_v16si : gen_vec_extract_lo_v16si ; break ; case V8SImode : if ( unsigned_p ) unpack = gen_avx2_zero_extendv4siv4di2 ; else unpack = gen_avx2_sign_extendv4siv4di2 ; halfmode = V4SImode ; extract = high_p ? gen_vec_extract_hi_v8si : gen_vec_extract_lo_v8si ; break ; case V16QImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv8qiv8hi2 ; else unpack = gen_sse4_1_sign_extendv8qiv8hi2 ; break ; case V8HImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv4hiv4si2 ; else unpack = gen_sse4_1_sign_extendv4hiv4si2 ; break ; case V4SImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv2siv2di2 ; else unpack = gen_sse4_1_sign_extendv2siv2di2 ; break ; default : gcc_unreachable ( ) ; } if ( GET_MODE_SIZE ( imode ) >= <NUM_LIT> ) { tmp = gen_reg_rtx ( halfmode ) ; emit_insn ( extract ( tmp , src ) ) ; } else if ( high_p ) { tmp = gen_reg_rtx ( V1TImode ) ; emit_insn ( gen_sse2_lshrv1ti3 ( tmp , gen_lowpart ( V1TImode , src ) , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_lowpart ( imode , tmp ) ; } else tmp = src ; emit_insn ( unpack ( dest , tmp ) ) ; } else { rtx ( * unpack ) ( rtx , rtx , rtx ) ; switch ( imode ) { case V16QImode :

if ( high_p ) unpack = gen_vec_interleave_highv16qi ;


<s> scratch4 = force_reg ( Pmode , constm1_rtx ) ; emit_move_insn ( scratch3 , addr ) ; eoschar = force_reg ( QImode , eoschar ) ; src = replace_equiv_address_nv ( src , scratch3 ) ; unspec = gen_rtx_UNSPEC ( Pmode , gen_rtvec ( <NUM_LIT> , src , eoschar , align , scratch4 ) , UNSPEC_SCAS ) ; emit_insn ( gen_strlenqi_1 ( scratch1 , scratch3 , unspec ) ) ; emit_insn ( ix86_gen_one_cmpl2 ( scratch2 , scratch1 ) ) ; emit_insn ( ix86_gen_add3 ( out , scratch2 , constm1_rtx ) ) ; }


<s> bool ix86_expand_strlen ( rtx out , rtx src , rtx eoschar , rtx align ) { rtx addr , scratch1 , scratch2 , scratch3 , scratch4 ; if ( TARGET_UNROLL_STRLEN && eoschar == const0_rtx && optimize > <NUM_LIT> && ! TARGET_INLINE_ALL_STRINGOPS && ! optimize_insn_for_size_p ( ) && ( ! CONST_INT_P ( align ) || INTVAL ( align ) < <NUM_LIT> ) ) return false ; addr = force_reg ( Pmode , XEXP ( src , <NUM_LIT> ) ) ; scratch1 = gen_reg_rtx ( Pmode ) ; if ( TARGET_UNROLL_STRLEN && eoschar == const0_rtx && optimize > <NUM_LIT> && ! optimize_insn_for_size_p ( ) ) { emit_move_insn ( out , addr ) ; ix86_expand_strlensi_unroll_1 ( out , src , align ) ; emit_insn ( ix86_gen_sub3 ( out , out , addr ) ) ; }


<s> if ( align < <NUM_LIT> ) { rtx scratch1 = gen_reg_rtx ( Pmode ) ; emit_move_insn ( scratch1 , out ) ; if ( align != <NUM_LIT> ) { align_3_label = gen_label_rtx ( ) ; align_2_label = gen_label_rtx ( ) ; align_rtx = expand_binop ( Pmode , and_optab , scratch1 , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; emit_cmp_and_jump_insns ( align_rtx , const0_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_4_label ) ; emit_cmp_and_jump_insns ( align_rtx , const2_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_2_label ) ; emit_cmp_and_jump_insns ( align_rtx , const2_rtx , GTU , NULL , Pmode , <NUM_LIT> , align_3_label ) ; } else { align_rtx = expand_binop ( Pmode , and_optab , scratch1 , const2_rtx , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; emit_cmp_and_jump_insns ( align_rtx , const0_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_4_label ) ; } mem = change_address ( src , QImode , out ) ; emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( ix86_gen_add3 ( out , out , const1_rtx ) ) ; if ( align != <NUM_LIT> ) { emit_label ( align_2_label ) ; emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( ix86_gen_add3 ( out , out , const1_rtx ) ) ; emit_label ( align_3_label ) ; } emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( ix86_gen_add3 ( out , out , const1_rtx ) ) ; }


<s> mask = ix86_expand_sse_compare_mask ( UNGT , res , xa , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , mask , gen_rtx_AND ( mode , mask , one ) ) ) ; tmp = expand_simple_binop ( mode , MINUS , res , mask , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; emit_move_insn ( res , tmp ) ; ix86_sse_copysign_to_positive ( res , res , force_reg ( mode , operand1 ) , smask ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> emit_move_insn ( res , tmp ) ; one = force_reg ( mode , const_double_from_real_value ( dconst1 , mode ) ) ; mask = ix86_expand_sse_compare_mask ( UNGT , res , xa , false ) ; emit_insn ( gen_rtx_SET ( VOIDmode , mask , gen_rtx_AND ( mode , mask , one ) ) ) ; tmp = expand_simple_binop ( mode , MINUS , res , mask , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; emit_move_insn ( res , tmp ) ; ix86_sse_copysign_to_positive ( res , res , force_reg ( mode , operand1 ) , smask ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> src = operands [ <NUM_LIT> ] ; if ( MEM_P ( dst ) ) { if ( rtx_equal_p ( dst , src ) ) matching_memory = true ; else dst = gen_reg_rtx ( mode ) ; } if ( MEM_P ( src ) && ! matching_memory ) src = force_reg ( mode , src ) ; op = gen_rtx_SET ( VOIDmode , dst , gen_rtx_fmt_e ( code , mode , src ) ) ; if ( reload_in_progress || code == NOT ) { gcc_assert ( code == NOT ) ; emit_insn ( op ) ; } else { clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ; } if ( dst != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , dst ) ;


<s> break ; case ASHIFT : case LSHIFTRT : uns_p = true ; case ASHIFTRT : op1_l = gen_reg_rtx ( himode ) ; op1_h = gen_reg_rtx ( himode ) ; ix86_expand_sse_unpack ( op1_l , op1 , uns_p , false ) ; ix86_expand_sse_unpack ( op1_h , op1 , uns_p , true ) ; full_interleave = true ; break ; default : gcc_unreachable ( ) ; } res_l = expand_simple_binop ( himode , code , op1_l , op2_l , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; res_h = expand_simple_binop ( himode , code , op1_h , op2_h , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; gcc_assert ( res_l && res_h ) ; d . target = dest ; d . op0 = gen_lowpart ( qimode , res_l ) ; d . op1 = gen_lowpart ( qimode , res_h ) ; d . vmode = qimode ; d . nelt = GET_MODE_NUNITS ( qimode ) ; d . one_operand_p = false ; d . testing_p = false ; if ( full_interleave ) { for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) d . perm [ i ] = i * <NUM_LIT> ; } else { for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) d . perm [ i ] = i * <NUM_LIT> + ( ( i & <NUM_LIT> ) == <NUM_LIT> ? <NUM_LIT> : ( i & <NUM_LIT> ) == <NUM_LIT> ? - <NUM_LIT> : <NUM_LIT> ) ; }

ok = ix86_expand_vec_perm_const_1 ( & d ) ;


<s> gen_il = gen_avx2_interleave_lowv32qi ; gen_ih = gen_avx2_interleave_highv32qi ; break ; case V64QImode : himode = V32HImode ; gen_il = gen_avx512bw_interleave_lowv64qi ; gen_ih = gen_avx512bw_interleave_highv64qi ; break ; default : gcc_unreachable ( ) ; } op2_l = op2_h = op2 ; switch ( code ) { case MULT : op2_l = gen_reg_rtx ( qimode ) ; op2_h = gen_reg_rtx ( qimode ) ; emit_insn ( gen_il ( op2_l , op2 , op2 ) ) ; emit_insn ( gen_ih ( op2_h , op2 , op2 ) ) ; op1_l = gen_reg_rtx ( qimode ) ; op1_h = gen_reg_rtx ( qimode ) ; emit_insn ( gen_il ( op1_l , op1 , op1 ) ) ; emit_insn ( gen_ih ( op1_h , op1 , op1 ) ) ; full_interleave = qimode == V16QImode ; break ; case ASHIFT : case LSHIFTRT : uns_p = true ; case ASHIFTRT : op1_l = gen_reg_rtx ( himode ) ; op1_h = gen_reg_rtx ( himode ) ; ix86_expand_sse_unpack ( op1_l , op1 , uns_p , false ) ; ix86_expand_sse_unpack ( op1_h , op1 , uns_p , true ) ; full_interleave = true ; break ; default : gcc_unreachable ( ) ; } res_l = expand_simple_binop ( himode , code , op1_l , op2_l , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; res_h = expand_simple_binop ( himode , code , op1_h , op2_h , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; gcc_assert ( res_l && res_h ) ; d . target = dest ; d . op0 = gen_lowpart ( qimode , res_l ) ; d . op1 = gen_lowpart ( qimode , res_h ) ; d . vmode = qimode ; d . nelt = GET_MODE_NUNITS ( qimode ) ; d . one_operand_p = false ; d . testing_p = false ; if ( full_interleave ) { for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) d . perm [ i ] = i * <NUM_LIT> ; } else { for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) d . perm [ i ] = i * <NUM_LIT> + ( ( i & <NUM_LIT> ) == <NUM_LIT> ? <NUM_LIT> : ( i & <NUM_LIT> ) == <NUM_LIT> ? - <NUM_LIT> : <NUM_LIT> ) ; }


<s> ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; } break ; case V32HImode : if ( TARGET_AVX512BW ) { tmp = gen_reg_rtx ( V16HImode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v32hi ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v32hi ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; } break ; case V64QImode : if ( TARGET_AVX512BW ) { tmp = gen_reg_rtx ( V32QImode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v64qi ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v64qi ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; } break ; case V16SFmode : tmp = gen_reg_rtx ( V8SFmode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v16sf ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v16sf ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; case V8DFmode : tmp = gen_reg_rtx ( V4DFmode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v8df ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v8df ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; case V16SImode : tmp = gen_reg_rtx ( V8SImode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v16si ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v16si ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; case V8DImode : tmp = gen_reg_rtx ( V4DImode ) ; if ( elt < <NUM_LIT> ) emit_insn ( gen_vec_extract_lo_v8di ( tmp , vec ) ) ; else emit_insn ( gen_vec_extract_hi_v8di ( tmp , vec ) ) ; ix86_expand_vector_extract ( false , target , tmp , elt & <NUM_LIT> ) ; return ; case V8QImode : default : break ; } if ( use_vec_extr ) { tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , GEN_INT ( elt ) ) ) ; tmp = gen_rtx_VEC_SELECT ( inner_mode , vec , tmp ) ; if ( inner_mode == QImode || inner_mode == HImode ) {

tmp = gen_rtx_ZERO_EXTEND ( SImode , tmp ) ;


<s> } if ( all_same && ix86_expand_vector_init_duplicate ( mmx_ok , mode , target , XVECEXP ( vals , <NUM_LIT> , <NUM_LIT> ) ) ) return ; if ( n_var == <NUM_LIT> ) { if ( all_const_zero && ix86_expand_vector_init_one_nonzero ( mmx_ok , mode , target , XVECEXP ( vals , <NUM_LIT> , one_var ) , one_var ) ) return ; if ( ix86_expand_vector_init_one_var ( mmx_ok , mode , target , vals , one_var ) ) return ; }

ix86_expand_vector_init_general ( mmx_ok , mode , target , vals ) ;


<s> rtx first [ <NUM_LIT> ] , second [ <NUM_LIT> ] , third [ <NUM_LIT> ] ; rtvec v ; int i , j ; switch ( n ) { case <NUM_LIT> : switch ( mode ) { case V16SImode : cmode = V8SImode ; break ; case V16SFmode : cmode = V8SFmode ; break ; case V8DImode : cmode = V4DImode ; break ; case V8DFmode : cmode = V4DFmode ; break ; case V8SImode : cmode = V4SImode ; break ; case V8SFmode : cmode = V4SFmode ; break ; case V4DImode : cmode = V2DImode ; break ; case V4DFmode : cmode = V2DFmode ; break ; case V4SImode : cmode = V2SImode ; break ; case V4SFmode : cmode = V2SFmode ; break ; case V2DImode : cmode = DImode ; break ; case V2SImode : cmode = SImode ; break ; case V2DFmode : cmode = DFmode ; break ; case V2SFmode : cmode = SFmode ; break ; default : gcc_unreachable ( ) ; } if ( ! register_operand ( ops [ <NUM_LIT> ] , cmode ) ) ops [ <NUM_LIT> ] = force_reg ( cmode , ops [ <NUM_LIT> ] ) ; if ( ! register_operand ( ops [ <NUM_LIT> ] , cmode ) ) ops [ <NUM_LIT> ] = force_reg ( cmode , ops [ <NUM_LIT> ] ) ; emit_insn ( gen_rtx_SET ( VOIDmode , target , gen_rtx_VEC_CONCAT ( mode , ops [ <NUM_LIT> ] , ops [ <NUM_LIT> ] ) ) ) ; break ; case <NUM_LIT> : switch ( mode ) { case V4DImode : cmode = V2DImode ; break ; case V4DFmode : cmode = V2DFmode ; break ; case V4SImode : cmode = V2SImode ; break ; case V4SFmode : cmode = V2SFmode ; break ; default : gcc_unreachable ( ) ; } goto half ; case <NUM_LIT> : switch ( mode ) { case V8DImode : cmode = V2DImode ; hmode = V4DImode ; break ; case V8DFmode : cmode = V2DFmode ; hmode = V4DFmode ; break ; case V8SImode : cmode = V2SImode ; hmode = V4SImode ; break ; case V8SFmode : cmode = V2SFmode ; hmode = V4SFmode ; break ; default : gcc_unreachable ( ) ; } goto half ; case <NUM_LIT> : switch ( mode ) { case V16SImode : cmode = V2SImode ; hmode = V4SImode ; gmode = V8SImode ; break ; case V16SFmode : cmode = V2SFmode ; hmode = V4SFmode ; gmode = V8SFmode ; break ; default : gcc_unreachable ( ) ; } goto half ; half : i = n - <NUM_LIT> ; j = ( n >> <NUM_LIT> ) - <NUM_LIT> ;

for ( ; i > <NUM_LIT> ; i -= <NUM_LIT> , j -- ) {


<s> case V4SImode : case V16SImode : case V8DImode : case V16SFmode : case V8DFmode : return ix86_vector_duplicate_value ( mode , target , val ) ; case V4HImode : if ( ! mmx_ok ) return false ; if ( TARGET_SSE || TARGET_3DNOW_A ) { rtx x ; val = gen_lowpart ( SImode , val ) ; x = gen_rtx_TRUNCATE ( HImode , val ) ; x = gen_rtx_VEC_DUPLICATE ( mode , x ) ; emit_insn ( gen_rtx_SET ( VOIDmode , target , x ) ) ; return true ; } goto widen ; case V8QImode : if ( ! mmx_ok ) return false ; goto widen ; case V8HImode : if ( TARGET_AVX2 ) return ix86_vector_duplicate_value ( mode , target , val ) ; if ( TARGET_SSE2 ) { struct expand_vec_perm_d dperm ; rtx tmp1 , tmp2 ; permute : memset ( & dperm , <NUM_LIT> , sizeof ( dperm ) ) ; dperm . target = target ; dperm . vmode = mode ; dperm . nelt = GET_MODE_NUNITS ( mode ) ; dperm . op0 = dperm . op1 = gen_reg_rtx ( mode ) ; dperm . one_operand_p = true ; tmp1 = gen_reg_rtx ( SImode ) ; emit_move_insn ( tmp1 , gen_lowpart ( SImode , val ) ) ; tmp2 = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_vec_setv4si_0 ( tmp2 , CONST0_RTX ( V4SImode ) , tmp1 ) ) ; emit_move_insn ( dperm . op0 , gen_lowpart ( mode , tmp2 ) ) ; ok = ( expand_vec_perm_1 ( & dperm ) || expand_vec_perm_broadcast_1 ( & dperm ) ) ; gcc_assert ( ok ) ; return ok ;


<s> op0 = gen_reg_rtx ( SImode ) ; emit_move_insn ( op0 , gen_lowpart ( SImode , ops [ i + i ] ) ) ; op1 = gen_reg_rtx ( V4SImode ) ; op0 = gen_rtx_VEC_MERGE ( V4SImode , gen_rtx_VEC_DUPLICATE ( V4SImode , op0 ) , CONST0_RTX ( V4SImode ) , const1_rtx ) ; emit_insn ( gen_rtx_SET ( VOIDmode , op1 , op0 ) ) ; op0 = gen_reg_rtx ( mode ) ; emit_move_insn ( op0 , gen_lowpart ( mode , op1 ) ) ; emit_insn ( gen_load_even ( op0 , force_reg ( inner_mode , ops [ i + i + <NUM_LIT> ] ) , const1_rtx ) ) ; ops [ i ] = gen_reg_rtx ( first_imode ) ; emit_move_insn ( ops [ i ] , gen_lowpart ( first_imode , op0 ) ) ; } for ( i = j = <NUM_LIT> ; i < n ; i += <NUM_LIT> , j ++ ) { op0 = gen_reg_rtx ( first_imode ) ; emit_insn ( gen_interleave_first_low ( op0 , ops [ i ] , ops [ i + <NUM_LIT> ] ) ) ; ops [ j ] = gen_reg_rtx ( second_imode ) ; emit_move_insn ( ops [ j ] , gen_lowpart ( second_imode , op0 ) ) ; } switch ( second_imode ) { case V4SImode : for ( i = j = <NUM_LIT> ; i < n / <NUM_LIT> ; i += <NUM_LIT> , j ++ ) { op0 = gen_reg_rtx ( second_imode ) ; emit_insn ( gen_interleave_second_low ( op0 , ops [ i ] , ops [ i + <NUM_LIT> ] ) ) ; ops [ j ] = gen_reg_rtx ( third_imode ) ;

emit_move_insn ( ops [ j ] , gen_lowpart ( third_imode , op0 ) ) ;


<s> return false ; case V4DImode : if ( ! TARGET_64BIT ) return false ; case V4DFmode : case V8SFmode : case V8SImode : case V16HImode : case V32QImode : case V4SFmode : case V4SImode : case V8HImode : case V4HImode : break ; case V16QImode : if ( TARGET_SSE4_1 ) break ; wmode = V8HImode ; goto widen ; case V8QImode : wmode = V4HImode ; goto widen ; widen : x = XVECEXP ( vals , <NUM_LIT> , one_var ^ <NUM_LIT> ) ; if ( one_var & <NUM_LIT> ) { var = convert_modes ( HImode , QImode , var , true ) ; var = expand_simple_binop ( HImode , ASHIFT , var , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; x = GEN_INT ( INTVAL ( x ) & <NUM_LIT> ) ; } else { var = convert_modes ( HImode , QImode , var , true ) ; x = gen_int_mode ( INTVAL ( x ) << <NUM_LIT> , HImode ) ; }

if ( x != const0_rtx ) var = expand_simple_binop ( HImode , IOR , var , x , var , <NUM_LIT> , OPTAB_LIB_WIDEN ) ;


<s> widen : x = XVECEXP ( vals , <NUM_LIT> , one_var ^ <NUM_LIT> ) ; if ( one_var & <NUM_LIT> ) { var = convert_modes ( HImode , QImode , var , true ) ; var = expand_simple_binop ( HImode , ASHIFT , var , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; x = GEN_INT ( INTVAL ( x ) & <NUM_LIT> ) ; } else { var = convert_modes ( HImode , QImode , var , true ) ; x = gen_int_mode ( INTVAL ( x ) << <NUM_LIT> , HImode ) ; } if ( x != const0_rtx ) var = expand_simple_binop ( HImode , IOR , var , x , var , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; x = gen_reg_rtx ( wmode ) ; emit_move_insn ( x , gen_lowpart ( wmode , const_vec ) ) ; ix86_expand_vector_set ( mmx_ok , x , var , one_var >> <NUM_LIT> ) ;

emit_move_insn ( target , gen_lowpart ( mode , x ) ) ;


<s> case V4SFmode : case V8SFmode : case V16SFmode : case V2DFmode : case V4DFmode : case V8DFmode : dst = gen_reg_rtx ( GET_MODE ( SUBREG_REG ( op1 ) ) ) ; if ( GET_CODE ( op2 ) == CONST_VECTOR ) { op2 = gen_lowpart ( GET_MODE ( dst ) , op2 ) ; op2 = force_reg ( GET_MODE ( dst ) , op2 ) ; } else { op1 = operands [ <NUM_LIT> ] ; op2 = SUBREG_REG ( operands [ <NUM_LIT> ] ) ; if ( ! nonimmediate_operand ( op2 , GET_MODE ( dst ) ) ) op2 = force_reg ( GET_MODE ( dst ) , op2 ) ; } op1 = SUBREG_REG ( op1 ) ; if ( ! nonimmediate_operand ( op1 , GET_MODE ( dst ) ) ) op1 = force_reg ( GET_MODE ( dst ) , op1 ) ; emit_insn ( gen_rtx_SET ( VOIDmode , dst , gen_rtx_fmt_ee ( code , GET_MODE ( dst ) , op1 , op2 ) ) ) ; emit_move_insn ( operands [ <NUM_LIT> ] , gen_lowpart ( mode , dst ) ) ; return ; default : break ; }


<s> void ix86_expand_vector_move ( machine_mode mode , rtx operands [ ] ) { rtx op0 = operands [ <NUM_LIT> ] , op1 = operands [ <NUM_LIT> ] ; unsigned int align = GET_MODE_ALIGNMENT ( mode ) ; if ( push_operand ( op0 , VOIDmode ) ) op0 = emit_move_resolve_push ( mode , op0 ) ; if ( can_create_pseudo_p ( ) && register_operand ( op0 , mode ) && ( CONSTANT_P ( op1 ) || ( GET_CODE ( op1 ) == SUBREG && CONSTANT_P ( SUBREG_REG ( op1 ) ) ) ) && ! standard_sse_constant_p ( op1 ) ) op1 = validize_mem ( force_const_mem ( mode , op1 ) ) ;

if ( can_create_pseudo_p ( ) && SSE_REG_MODE_P ( mode ) && ( ( MEM_P ( op0 ) && ( MEM_ALIGN ( op0 ) < align ) ) || ( MEM_P ( op1 ) && ( MEM_ALIGN ( op1 ) < align ) ) ) ) {


<s> d . target = operands [ <NUM_LIT> ] ; d . op0 = operands [ <NUM_LIT> ] ; d . op1 = operands [ <NUM_LIT> ] ; sel = operands [ <NUM_LIT> ] ; d . vmode = GET_MODE ( d . target ) ; gcc_assert ( VECTOR_MODE_P ( d . vmode ) ) ; d . nelt = nelt = GET_MODE_NUNITS ( d . vmode ) ; d . testing_p = false ; gcc_assert ( GET_CODE ( sel ) == CONST_VECTOR ) ; gcc_assert ( XVECLEN ( sel , <NUM_LIT> ) == nelt ) ; gcc_checking_assert ( sizeof ( d . perm ) == sizeof ( perm ) ) ; for ( i = <NUM_LIT> ; i < nelt ; ++ i ) { rtx e = XVECEXP ( sel , <NUM_LIT> , i ) ; int ei = INTVAL ( e ) & ( <NUM_LIT> * nelt - <NUM_LIT> ) ; d . perm [ i ] = ei ; perm [ i ] = ei ; }


<s> d . nelt = nelt = GET_MODE_NUNITS ( d . vmode ) ; d . testing_p = false ; gcc_assert ( GET_CODE ( sel ) == CONST_VECTOR ) ; gcc_assert ( XVECLEN ( sel , <NUM_LIT> ) == nelt ) ; gcc_checking_assert ( sizeof ( d . perm ) == sizeof ( perm ) ) ; for ( i = <NUM_LIT> ; i < nelt ; ++ i ) { rtx e = XVECEXP ( sel , <NUM_LIT> , i ) ;

int ei = INTVAL ( e ) & ( <NUM_LIT> * nelt - <NUM_LIT> ) ;


<s> static bool ix86_expand_vec_perm_const_1 ( struct expand_vec_perm_d * d ) { if ( expand_vec_perm_1 ( d ) ) return true ; if ( expand_vec_perm_pshuflw_pshufhw ( d ) ) return true ; if ( expand_vec_perm_palignr ( d , false ) ) return true ; if ( expand_vec_perm_interleave2 ( d ) ) return true ; if ( expand_vec_perm_broadcast ( d ) ) return true ;

if ( expand_vec_perm_vpermq_perm_1 ( d ) ) return true ;


<s> if ( TARGET_AVX512VL ) gen = gen_avx512vl_vpermi2varv8si3 ; break ; case V16SImode : if ( TARGET_AVX512F ) gen = gen_avx512f_vpermi2varv16si3 ; break ; case V4SFmode : if ( TARGET_AVX512VL ) { gen = gen_avx512vl_vpermi2varv4sf3 ; maskmode = V4SImode ; } break ; case V8SFmode : if ( TARGET_AVX512VL ) { gen = gen_avx512vl_vpermi2varv8sf3 ; maskmode = V8SImode ; } break ; case V16SFmode : if ( TARGET_AVX512F ) { gen = gen_avx512f_vpermi2varv16sf3 ; maskmode = V16SImode ; } break ; case V2DImode : if ( TARGET_AVX512VL ) gen = gen_avx512vl_vpermi2varv2di3 ; break ; case V4DImode : if ( TARGET_AVX512VL ) gen = gen_avx512vl_vpermi2varv4di3 ; break ; case V8DImode : if ( TARGET_AVX512F ) gen = gen_avx512f_vpermi2varv8di3 ; break ; case V2DFmode : if ( TARGET_AVX512VL ) { gen = gen_avx512vl_vpermi2varv2df3 ; maskmode = V2DImode ; } break ; case V4DFmode : if ( TARGET_AVX512VL ) { gen = gen_avx512vl_vpermi2varv4df3 ; maskmode = V4DImode ; } break ; case V8DFmode : if ( TARGET_AVX512F ) { gen = gen_avx512f_vpermi2varv8df3 ; maskmode = V8DImode ; } break ; default : break ; } if ( gen == NULL ) return false ; if ( d ) { rtx vec [ <NUM_LIT> ] ; target = d -> target ; op0 = d -> op0 ; op1 = d -> op1 ; for ( int i = <NUM_LIT> ; i < d -> nelt ; ++ i ) vec [ i ] = GEN_INT ( d -> perm [ i ] ) ;

mask = gen_rtx_CONST_VECTOR ( maskmode , gen_rtvec_v ( d -> nelt , vec ) ) ;


<s> crtl -> stack_realign_finalized = true ; return ; } } if ( crtl -> drap_reg ) { basic_block bb = ENTRY_BLOCK_PTR_FOR_FN ( cfun ) -> next_bb ; if ( ! REGNO_REG_SET_P ( DF_LR_IN ( bb ) , REGNO ( crtl -> drap_reg ) ) ) { crtl -> drap_reg = NULL_RTX ; crtl -> need_drap = false ; } } else cfun -> machine -> no_drap_save_restore = true ; frame_pointer_needed = false ; stack_realign = false ; crtl -> max_used_stack_slot_alignment = incoming_stack_boundary ; crtl -> stack_alignment_needed = incoming_stack_boundary ; crtl -> stack_alignment_estimated = incoming_stack_boundary ; if ( crtl -> preferred_stack_boundary > incoming_stack_boundary ) crtl -> preferred_stack_boundary = incoming_stack_boundary ; df_finish_pass ( true ) ; df_scan_alloc ( NULL ) ;


<s> if ( TARGET_64BIT ) { if ( GET_CODE ( x ) != CONST ) return x ; term = XEXP ( x , <NUM_LIT> ) ; if ( GET_CODE ( term ) == PLUS && ( CONST_INT_P ( XEXP ( term , <NUM_LIT> ) ) || GET_CODE ( XEXP ( term , <NUM_LIT> ) ) == CONST_DOUBLE ) ) term = XEXP ( term , <NUM_LIT> ) ; if ( GET_CODE ( term ) != UNSPEC || ( XINT ( term , <NUM_LIT> ) != UNSPEC_GOTPCREL && XINT ( term , <NUM_LIT> ) != UNSPEC_PCREL ) ) return x ; return XVECEXP ( term , <NUM_LIT> , <NUM_LIT> ) ; }

return ix86_delegitimize_address ( x ) ;


<s> if ( GET_CODE ( term ) != UNSPEC || ( XINT ( term , <NUM_LIT> ) != UNSPEC_GOTPCREL && XINT ( term , <NUM_LIT> ) != UNSPEC_PCREL ) ) return x ; return XVECEXP ( term , <NUM_LIT> , <NUM_LIT> ) ; }


<s> if ( insn_type != TYPE_SETCC && insn_type != TYPE_ICMOV && insn_type != TYPE_FCMOV && insn_type != TYPE_IBR ) return false ; if ( ( set = single_set ( dep_insn ) ) != <NUM_LIT> ) { set = SET_DEST ( set ) ; set2 = NULL_RTX ; } else if ( GET_CODE ( PATTERN ( dep_insn ) ) == PARALLEL && XVECLEN ( PATTERN ( dep_insn ) , <NUM_LIT> ) == <NUM_LIT> && GET_CODE ( XVECEXP ( PATTERN ( dep_insn ) , <NUM_LIT> , <NUM_LIT> ) ) == SET && GET_CODE ( XVECEXP ( PATTERN ( dep_insn ) , <NUM_LIT> , <NUM_LIT> ) ) == SET ) { set = SET_DEST ( XVECEXP ( PATTERN ( dep_insn ) , <NUM_LIT> , <NUM_LIT> ) ) ; set2 = SET_DEST ( XVECEXP ( PATTERN ( dep_insn ) , <NUM_LIT> , <NUM_LIT> ) ) ; } else return false ; if ( ! REG_P ( set ) || REGNO ( set ) != FLAGS_REG ) return false ; if ( ! reg_overlap_mentioned_p ( set , PATTERN ( insn ) ) ) return false ; if ( set2 && reg_overlap_mentioned_p ( set2 , PATTERN ( insn ) ) ) return false ;


<s> return fold_builtin_cpu ( fndecl , args ) ; } } return SUBTARGET_FOLD_BUILTIN ( fndecl , n_args , args , ignore ) ; return NULL_TREE ;


<s> if ( DECL_BUILT_IN_CLASS ( fndecl ) == BUILT_IN_MD ) { enum ix86_builtins fn_code = ( enum ix86_builtins ) DECL_FUNCTION_CODE ( fndecl ) ; if ( fn_code == IX86_BUILTIN_CPU_IS || fn_code == IX86_BUILTIN_CPU_SUPPORTS ) { gcc_assert ( n_args == <NUM_LIT> ) ; return fold_builtin_cpu ( fndecl , args ) ; } } return SUBTARGET_FOLD_BUILTIN ( fndecl , n_args , args , ignore ) ;


<s> static bool ix86_frame_pointer_required ( void ) { if ( cfun -> machine -> accesses_prev_frame ) return true ;

if ( SUBTARGET_FRAME_POINTER_REQUIRED ) return true ;


<s> static enum calling_abi ix86_function_abi ( const_tree fndecl ) {


<s> return ix86_function_type_abi ( TREE_TYPE ( fndecl ) ) ;


<s> if ( mode == BLKmode ) bytes = int_size_in_bytes ( type ) ; else bytes = GET_MODE_SIZE ( mode ) ; words = ( bytes + UNITS_PER_WORD - <NUM_LIT> ) / UNITS_PER_WORD ; if ( type && TREE_CODE ( type ) == VECTOR_TYPE ) mode = type_natural_mode ( type , cum , false ) ; if ( TARGET_64BIT && ( cum ? cum -> call_abi : ix86_abi ) == MS_ABI ) arg = function_arg_ms_64 ( cum , mode , omode , named , bytes ) ; else if ( TARGET_64BIT ) arg = function_arg_64 ( cum , mode , omode , type , named ) ; else arg = function_arg_32 ( cum , mode , omode , type , bytes , words ) ;


<s> if ( type ) mode = type_natural_mode ( type , NULL , false ) ; if ( ( type && POINTER_BOUNDS_TYPE_P ( type ) ) || POINTER_BOUNDS_MODE_P ( mode ) ) { if ( cum -> bnds_in_bt ) { cum -> bnds_in_bt -- ; return ; } if ( cum -> force_bnd_pass ) cum -> force_bnd_pass -- ; cum -> bnd_regno ++ ; return ; } cum -> bnds_in_bt = <NUM_LIT> ; if ( cum -> force_bnd_pass ) {

cum -> bnd_regno += cum -> force_bnd_pass ;


<s> type = TYPE_MAIN_VARIANT ( type ) ; align = TYPE_ALIGN ( type ) ; } else align = GET_MODE_ALIGNMENT ( mode ) ; if ( align < PARM_BOUNDARY ) align = PARM_BOUNDARY ; else { static bool warned ; unsigned int saved_align = align ; if ( ! TARGET_64BIT ) { if ( ! type ) { if ( mode == XFmode || mode == XCmode ) align = PARM_BOUNDARY ; } else if ( ! ix86_contains_aligned_value_p ( type ) ) align = PARM_BOUNDARY ; if ( align < <NUM_LIT> ) align = PARM_BOUNDARY ; } if ( warn_psabi && ! warned && align != ix86_compat_function_arg_boundary ( mode , type , saved_align ) ) { warned = true ; inform ( input_location , <STR_LIT> <STR_LIT> , align / BITS_PER_UNIT ) ; } }


<s> if ( ix86_abi == SYSV_ABI && regno == AX_REG ) return true ; if ( ix86_abi == MS_ABI ) parm_regs = x86_64_ms_abi_int_parameter_registers ; else parm_regs = x86_64_int_parameter_registers ; for ( i = <NUM_LIT> ; i < ( ix86_abi == MS_ABI ? X86_64_MS_REGPARM_MAX : X86_64_REGPARM_MAX ) ; i ++ ) if ( regno == parm_regs [ i ] ) return true ;


<s> } if ( TARGET_SSE && SSE_REGNO_P ( regno ) && ( regno < FIRST_SSE_REG + SSE_REGPARM_MAX ) ) return true ; if ( ix86_abi == SYSV_ABI && regno == AX_REG ) return true ; if ( ix86_abi == MS_ABI ) parm_regs = x86_64_ms_abi_int_parameter_registers ; else parm_regs = x86_64_int_parameter_registers ; for ( i = <NUM_LIT> ; i < ( ix86_abi == MS_ABI ? X86_64_MS_REGPARM_MAX : X86_64_REGPARM_MAX ) ; i ++ ) if ( regno == parm_regs [ i ] ) return true ;


<s> static bool ix86_function_ms_hook_prologue ( const_tree fn ) { if ( fn && lookup_attribute ( <STR_LIT> , DECL_ATTRIBUTES ( fn ) ) ) { if ( decl_function_context ( fn ) != NULL_TREE ) error_at ( DECL_SOURCE_LOCATION ( fn ) , <STR_LIT> ) ; else return true ;


<s> if ( fn && lookup_attribute ( <STR_LIT> , DECL_ATTRIBUTES ( fn ) ) ) { if ( decl_function_context ( fn ) != NULL_TREE ) error_at ( DECL_SOURCE_LOCATION ( fn ) , <STR_LIT> ) ; else return true ;


<s> b = ix86_function_value ( TREE_TYPE ( DECL_RESULT ( cfun -> decl ) ) , cfun -> decl , false ) ; if ( STACK_REG_P ( a ) || STACK_REG_P ( b ) ) { if ( ! rtx_equal_p ( a , b ) ) return false ; } else if ( VOID_TYPE_P ( TREE_TYPE ( DECL_RESULT ( cfun -> decl ) ) ) ) ; else if ( ! rtx_equal_p ( a , b ) ) return false ;