<s> emit_insn ( gen_avx2_pshufbv32qi3 ( l , op , vperm ) ) ; vperm = gen_rtx_CONST_VECTOR ( V32QImode , gen_rtvec_v ( <NUM_LIT> , rperm [ <NUM_LIT> ] ) ) ; vperm = force_reg ( V32QImode , vperm ) ; h = gen_reg_rtx ( V32QImode ) ; op = gen_lowpart ( V32QImode , d -> op1 ) ; emit_insn ( gen_avx2_pshufbv32qi3 ( h , op , vperm ) ) ; ior = gen_reg_rtx ( V32QImode ) ; emit_insn ( gen_iorv32qi3 ( ior , l , h ) ) ; op = gen_reg_rtx ( V4DImode ) ; ior = gen_lowpart ( V4DImode , ior ) ; emit_insn ( gen_avx2_permv4di_1 ( op , ior , const0_rtx , const2_rtx , const1_rtx , GEN_INT ( <NUM_LIT> ) ) ) ; emit_move_insn ( d -> target , gen_lowpart ( d -> vmode , op ) ) ; return true ;


<s> unsigned xorv = ( i >= nelt / <NUM_LIT> && i < <NUM_LIT> * nelt / <NUM_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; for ( j = <NUM_LIT> ; j < eltsz ; ++ j ) { rperm [ which ] [ ( i * eltsz + j ) ^ xorv ] = GEN_INT ( e * eltsz + j ) ; rperm [ <NUM_LIT> - which ] [ ( i * eltsz + j ) ^ xorv ] = m128 ; } } vperm = gen_rtx_CONST_VECTOR ( V32QImode , gen_rtvec_v ( <NUM_LIT> , rperm [ <NUM_LIT> ] ) ) ; vperm = force_reg ( V32QImode , vperm ) ; l = gen_reg_rtx ( V32QImode ) ; op = gen_lowpart ( V32QImode , d -> op0 ) ; emit_insn ( gen_avx2_pshufbv32qi3 ( l , op , vperm ) ) ; vperm = gen_rtx_CONST_VECTOR ( V32QImode , gen_rtvec_v ( <NUM_LIT> , rperm [ <NUM_LIT> ] ) ) ; vperm = force_reg ( V32QImode , vperm ) ; h = gen_reg_rtx ( V32QImode ) ;

op = gen_lowpart ( V32QImode , d -> op1 ) ;


<s> used [ <NUM_LIT> ] = false ; used [ <NUM_LIT> ] = false ; for ( i = <NUM_LIT> ; i < nelt ; ++ i ) { unsigned j , e = d -> perm [ i ] & ( nelt / <NUM_LIT> - <NUM_LIT> ) ; unsigned xlane = ( ( d -> perm [ i ] ^ i ) & ( nelt / <NUM_LIT> ) ) * eltsz ; unsigned int which = ( ( d -> perm [ i ] & nelt ) ? <NUM_LIT> : <NUM_LIT> ) + ( xlane ? <NUM_LIT> : <NUM_LIT> ) ; for ( j = <NUM_LIT> ; j < eltsz ; ++ j ) rperm [ which ] [ ( i * eltsz + j ) ^ xlane ] = GEN_INT ( e * eltsz + j ) ; used [ which ] = true ; } for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( ! used [ <NUM_LIT> * i + <NUM_LIT> ] ) { h [ i ] = NULL_RTX ; continue ; } vperm = gen_rtx_CONST_VECTOR ( V32QImode , gen_rtvec_v ( <NUM_LIT> , rperm [ <NUM_LIT> * i + <NUM_LIT> ] ) ) ; vperm = force_reg ( V32QImode , vperm ) ; h [ i ] = gen_reg_rtx ( V32QImode ) ; op = gen_lowpart ( V32QImode , i ? d -> op1 : d -> op0 ) ; emit_insn ( gen_avx2_pshufbv32qi3 ( h [ i ] , op , vperm ) ) ; } for ( i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( h [ i ] == NULL_RTX ) continue ; op = gen_reg_rtx ( V4DImode ) ; emit_insn ( gen_avx2_permv4di_1 ( op , gen_lowpart ( V4DImode , h [ i ] ) , const2_rtx , GEN_INT ( <NUM_LIT> ) , const0_rtx , const1_rtx ) ) ;

h [ i ] = gen_lowpart ( V32QImode , op ) ;


<s> SET_DEST ( PATTERN ( vselect_insn ) ) = target ; icode = recog_memoized ( vselect_insn ) ; if ( icode >= <NUM_LIT> && ! testing_p ) emit_insn ( copy_rtx ( PATTERN ( vselect_insn ) ) ) ; SET_DEST ( PATTERN ( vselect_insn ) ) = const0_rtx ; XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) = save_vconcat ; INSN_CODE ( vselect_insn ) = - <NUM_LIT> ;


<s> x = XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) ; PUT_NUM_ELEM ( XVEC ( x , <NUM_LIT> ) , nelt ) ; for ( i = <NUM_LIT> ; i < nelt ; ++ i ) XVECEXP ( x , <NUM_LIT> , i ) = GEN_INT ( perm [ i ] ) ; save_vconcat = XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) ; XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) = op0 ; PUT_MODE ( SET_SRC ( PATTERN ( vselect_insn ) ) , GET_MODE ( target ) ) ; SET_DEST ( PATTERN ( vselect_insn ) ) = target ; icode = recog_memoized ( vselect_insn ) ;

if ( icode >= <NUM_LIT> && ! testing_p ) emit_insn ( copy_rtx ( PATTERN ( vselect_insn ) ) ) ;


<s> machine_mode v2mode ; rtx x ; bool ok ; if ( vselect_insn == NULL_RTX ) init_vselect_insn ( ) ; if ( ! GET_MODE_2XWIDER_MODE ( GET_MODE ( op0 ) ) . exists ( & v2mode ) ) return false ; x = XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) ; PUT_MODE ( x , v2mode ) ; XEXP ( x , <NUM_LIT> ) = op0 ; XEXP ( x , <NUM_LIT> ) = op1 ; ok = expand_vselect ( target , x , perm , nelt , testing_p ) ; XEXP ( x , <NUM_LIT> ) = const0_rtx ; XEXP ( x , <NUM_LIT> ) = const0_rtx ; return ok ;


<s> rtx x ; bool ok ; if ( vselect_insn == NULL_RTX ) init_vselect_insn ( ) ; if ( ! GET_MODE_2XWIDER_MODE ( GET_MODE ( op0 ) ) . exists ( & v2mode ) ) return false ; x = XEXP ( SET_SRC ( PATTERN ( vselect_insn ) ) , <NUM_LIT> ) ; PUT_MODE ( x , v2mode ) ;


<s> if ( insn_defines_reg ( regno1 , INVALID_REGNUM , prev ) ) return true ; else if ( insn_defines_reg ( regno2 , INVALID_REGNUM , prev ) ) return false ; prev = PREV_INSN ( prev ) ; }


<s> continue ; } if ( insn_defines_reg ( regno1 , INVALID_REGNUM , prev ) ) return true ; else if ( insn_defines_reg ( regno2 , INVALID_REGNUM , prev ) ) return false ; prev = PREV_INSN ( prev ) ; }


<s> if ( GET_MODE ( x ) == VOIDmode ) x = convert_to_mode ( mode , x , <NUM_LIT> ) ;


<s> static rtx fixup_modeless_constant ( rtx x , machine_mode mode ) { if ( GET_MODE ( x ) == VOIDmode ) x = convert_to_mode ( mode , x , <NUM_LIT> ) ; return x ;


<s> unsigned HOST_WIDE_INT elt , max = TYPE_VECTOR_SUBPARTS ( vec_type ) - <NUM_LIT> ; if ( ! tree_fits_uhwi_p ( arg ) || ( elt = tree_to_uhwi ( arg ) , elt > max ) ) { error ( <STR_LIT> <STR_LIT> , max ) ; return <NUM_LIT> ;


<s> static int get_element_number ( tree vec_type , tree arg ) { unsigned HOST_WIDE_INT elt , max = TYPE_VECTOR_SUBPARTS ( vec_type ) - <NUM_LIT> ; if ( ! tree_fits_uhwi_p ( arg ) || ( elt = tree_to_uhwi ( arg ) , elt > max ) ) {


<s> gcc_assert ( GET_MODE_NUNITS ( o ) == GET_MODE_NUNITS ( n ) * <NUM_LIT> ) ;

gcc_assert ( GET_MODE_SIZE ( o ) == GET_MODE_SIZE ( n ) ) ;


<s> unsigned i ; rtx x ; x = gen_rtx_PARALLEL ( VOIDmode , rtvec_alloc ( MAX_VECT_LEN ) ) ; for ( i = <NUM_LIT> ; i < MAX_VECT_LEN ; ++ i ) XVECEXP ( x , <NUM_LIT> , i ) = const0_rtx ;

x = gen_rtx_VEC_SELECT ( V2DFmode , gen_rtx_VEC_CONCAT ( V4DFmode , const0_rtx , const0_rtx ) , x ) ;


<s> static void init_vselect_insn ( void ) { unsigned i ; rtx x ; x = gen_rtx_PARALLEL ( VOIDmode , rtvec_alloc ( MAX_VECT_LEN ) ) ;

for ( i = <NUM_LIT> ; i < MAX_VECT_LEN ; ++ i ) XVECEXP ( x , <NUM_LIT> , i ) = const0_rtx ;


<s> static void ix86_adjust_counter ( rtx countreg , HOST_WIDE_INT value ) {

emit_insn ( gen_add2_insn ( countreg , GEN_INT ( - value ) ) ) ;


<s> mode = GET_MODE ( op0 ) ; switch ( GET_MODE_CLASS ( mode ) ) { case MODE_VECTOR_INT : case MODE_INT : if ( mode != V32QImode ) { if ( ! MEM_P ( op0 ) ) { orig_op0 = op0 ; op0 = gen_reg_rtx ( V32QImode ) ; } else op0 = gen_lowpart ( V32QImode , op0 ) ; op1 = gen_lowpart ( V32QImode , op1 ) ; mode = V32QImode ; } break ; case MODE_VECTOR_FLOAT : break ; default : gcc_unreachable ( ) ; } switch ( mode ) { default : gcc_unreachable ( ) ; case E_V32QImode : extract = gen_avx_vextractf128v32qi ; mode = V16QImode ; break ; case E_V16HFmode : extract = gen_avx_vextractf128v16hf ; mode = V8HFmode ; break ; case E_V8SFmode : extract = gen_avx_vextractf128v8sf ;


<s> if ( ( MEM_P ( src1 ) || bcst_mem_operand ( src1 , mode ) ) && ( MEM_P ( src2 ) || bcst_mem_operand ( src2 , mode ) ) ) return false ; if ( ix86_swap_binary_operands_p ( code , mode , operands ) ) std :: swap ( src1 , src2 ) ;

if ( MEM_P ( dst ) && ! rtx_equal_p ( dst , src1 ) ) return false ;


<s> static bool ix86_broadcast ( HOST_WIDE_INT v , unsigned int width , HOST_WIDE_INT & val_broadcast ) { wide_int val = wi :: uhwi ( v , HOST_BITS_PER_WIDE_INT ) ; val_broadcast = wi :: extract_uhwi ( val , <NUM_LIT> , width ) ; for ( unsigned int i = width ; i < HOST_BITS_PER_WIDE_INT ; i += width ) { HOST_WIDE_INT each = wi :: extract_uhwi ( val , i , width ) ; if ( val_broadcast != each ) return false ; } val_broadcast = sext_hwi ( val_broadcast , width ) ;


<s> HOST_WIDE_INT each = wi :: extract_uhwi ( val , i , width ) ; if ( val_broadcast != each ) return false ; } val_broadcast = sext_hwi ( val_broadcast , width ) ; return true ;


<s> if ( nunits < <NUM_LIT> ) return nullptr ; if ( ! TARGET_INTER_UNIT_MOVES_TO_VEC && INTEGRAL_MODE_P ( mode ) ) return nullptr ; if ( ! ( TARGET_AVX2 || ( TARGET_AVX && ( GET_MODE_INNER ( mode ) == SImode || GET_MODE_INNER ( mode ) == DImode ) ) || FLOAT_MODE_P ( mode ) ) || standard_sse_constant_p ( op , mode ) ) return nullptr ; if ( GET_MODE_INNER ( mode ) == DImode && ! TARGET_64BIT && ( ! TARGET_AVX512F || ( GET_MODE_SIZE ( mode ) < <NUM_LIT> && ! TARGET_AVX512VL ) ) ) return nullptr ; if ( GET_MODE_INNER ( mode ) == TImode ) return nullptr ; rtx constant = get_pool_constant ( XEXP ( op , <NUM_LIT> ) ) ;

if ( GET_CODE ( constant ) != CONST_VECTOR ) return nullptr ;


<s> if ( ( ( bisa & ( OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 ) ) == ( OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 ) ) && ( isa & ( OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 ) ) != <NUM_LIT> ) isa |= ( OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 ) ; if ( ( ( bisa & ( OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4 ) ) == ( OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4 ) ) && ( isa & ( OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4 ) ) != <NUM_LIT> ) isa |= ( OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4 ) ; if ( ( ( ( bisa & ( OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL ) ) == ( OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL ) ) || ( bisa2 & OPTION_MASK_ISA2_AVXVNNI ) != <NUM_LIT> ) && ( ( ( isa & ( OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL ) ) == ( OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL ) ) || ( isa2 & OPTION_MASK_ISA2_AVXVNNI ) != <NUM_LIT> ) ) { isa |= OPTION_MASK_ISA_AVX512VNNI | OPTION_MASK_ISA_AVX512VL ; isa2 |= OPTION_MASK_ISA2_AVXVNNI ; } if ( ( bisa & OPTION_MASK_ISA_MMX ) && ! TARGET_MMX && TARGET_MMX_WITH_SSE && fcode != IX86_BUILTIN_MASKMOVQ ) { bisa &= ~ OPTION_MASK_ISA_MMX ; bisa |= OPTION_MASK_ISA_SSE2 ; } if ( pbisa ) * pbisa = bisa ;


<s> if ( FLOAT_MODE_P ( mode ) ) return ix86_fp_cmp_code_to_pcmp_immediate ( code ) ; return ix86_int_cmp_code_to_pcmp_immediate ( code ) ;


for ( int i = <NUM_LIT> ; i < CONST_WIDE_INT_NUNITS ( op ) ; i ++ ) if ( val != CONST_WIDE_INT_ELT ( op , i ) ) return nullptr ;


<s> if ( GET_MODE ( addr ) == Pmode || GET_MODE ( addr ) == VOIDmode ) { reg = copy_addr_to_reg ( addr ) ; REG_POINTER ( reg ) = <NUM_LIT> ; return reg ; } else { gcc_assert ( GET_MODE ( addr ) == DImode && Pmode == SImode ) ; reg = copy_to_mode_reg ( DImode , addr ) ;


<s> rtx reg ; if ( GET_MODE ( addr ) == Pmode || GET_MODE ( addr ) == VOIDmode ) { reg = copy_addr_to_reg ( addr ) ; REG_POINTER ( reg ) = <NUM_LIT> ; return reg ; } else { gcc_assert ( GET_MODE ( addr ) == DImode && Pmode == SImode ) ;

reg = copy_to_mode_reg ( DImode , addr ) ;


<s> void ix86_emit_binop ( enum rtx_code code , machine_mode mode , rtx dst , rtx src ) { rtx op , clob ; op = gen_rtx_SET ( dst , gen_rtx_fmt_ee ( code , mode , dst , src ) ) ;

clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ;


<s> temp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; temp = gen_rtx_NE ( VOIDmode , temp , const0_rtx ) ; } temp = gen_rtx_IF_THEN_ELSE ( VOIDmode , temp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , temp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = label ;


<s> void ix86_emit_i387_asinh ( rtx op0 , rtx op1 ) { rtx e1 = gen_reg_rtx ( XFmode ) ; rtx e2 = gen_reg_rtx ( XFmode ) ; rtx scratch = gen_reg_rtx ( HImode ) ; rtx flags = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; rtx cst1 , tmp ; rtx_code_label * jump_label = gen_label_rtx ( ) ; rtx_insn * insn ; emit_insn ( gen_mulxf3 ( e1 , op1 , op1 ) ) ; cst1 = force_reg ( XFmode , CONST1_RTX ( XFmode ) ) ; emit_insn ( gen_addxf3 ( e2 , e1 , cst1 ) ) ; emit_insn ( gen_sqrtxf2 ( e2 , e2 ) ) ; emit_insn ( gen_addxf3 ( e2 , e2 , cst1 ) ) ; emit_insn ( gen_divxf3 ( e1 , e1 , e2 ) ) ; emit_insn ( gen_fxamxf2_i387 ( scratch , op1 ) ) ; emit_insn ( gen_absxf2 ( e2 , op1 ) ) ; emit_insn ( gen_addxf3 ( e1 , e1 , e2 ) ) ; ix86_emit_i387_log1p ( e2 , e1 ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_EQ ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = jump_label ; emit_insn ( gen_negxf2 ( e2 , e2 ) ) ;


<s> emit_insn ( gen_addxf3 ( e1 , e1 , e2 ) ) ; ix86_emit_i387_log1p ( e2 , e1 ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_EQ ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ;


<s> emit_insn ( gen_divxf3 ( e1 , e2 , e1 ) ) ; ix86_emit_i387_log1p ( e2 , e1 ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_NE ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ;


<s> emit_insn ( gen_expxf2 ( e1 , op1 ) ) ; cst1 = force_reg ( XFmode , CONST1_RTX ( XFmode ) ) ; emit_insn ( gen_divxf3 ( e2 , cst1 , e1 ) ) ; emit_insn ( gen_addxf3 ( e2 , e1 , e2 ) ) ; half = force_reg ( XFmode , half ) ; emit_insn ( gen_mulxf3 ( op0 , e2 , half ) ) ;


<s> rtx_code_label * label2 = gen_label_rtx ( ) ; rtx tmp = gen_reg_rtx ( XFmode ) ; rtx res = gen_reg_rtx ( XFmode ) ; rtx cst , cstln2 , cst1 ; rtx_insn * insn ; do_pending_stack_adjust ( ) ; cst = const_double_from_real_value ( REAL_VALUE_ATOF ( <STR_LIT> , XFmode ) , XFmode ) ; cstln2 = force_reg ( XFmode , standard_80387_constant_rtx ( <NUM_LIT> ) ) ; emit_insn ( gen_absxf2 ( tmp , op1 ) ) ;


<s> rtx res = gen_reg_rtx ( outmode ) ; rtx_code_label * jump_label = gen_label_rtx ( ) ; rtx ( * floor_insn ) ( rtx , rtx ) ; rtx ( * neg_insn ) ( rtx , rtx ) ; rtx_insn * insn ; rtx tmp ; switch ( inmode ) { case E_SFmode : case E_DFmode : tmp = gen_reg_rtx ( XFmode ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_FLOAT_EXTEND ( XFmode , op1 ) ) ) ; op1 = tmp ; break ; case E_XFmode : break ; default : gcc_unreachable ( ) ; } switch ( outmode ) { case E_SFmode : floor_insn = gen_frndintxf2_floor ; neg_insn = gen_negsf2 ; break ; case E_DFmode : floor_insn = gen_frndintxf2_floor ; neg_insn = gen_negdf2 ; break ; case E_XFmode : floor_insn = gen_frndintxf2_floor ; neg_insn = gen_negxf2 ; break ; case E_HImode : floor_insn = gen_lfloorxfhi2 ; neg_insn = gen_neghi2 ; break ; case E_SImode : floor_insn = gen_lfloorxfsi2 ; neg_insn = gen_negsi2 ;


<s> emit_insn ( gen_addxf3 ( e2 , e2 , e1 ) ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_EQ ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = jump_label ; emit_insn ( gen_negxf2 ( e2 , e2 ) ) ; emit_label ( jump_label ) ; LABEL_NUSES ( jump_label ) = <NUM_LIT> ;


<s> emit_insn ( gen_addxf3 ( e2 , e1 , cst1 ) ) ; emit_insn ( gen_divxf3 ( e2 , e1 , e2 ) ) ; emit_insn ( gen_addxf3 ( e2 , e2 , e1 ) ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_EQ ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = jump_label ; emit_insn ( gen_negxf2 ( e2 , e2 ) ) ; emit_label ( jump_label ) ; LABEL_NUSES ( jump_label ) = <NUM_LIT> ; half = force_reg ( XFmode , half ) ; emit_insn ( gen_mulxf3 ( op0 , e2 , half ) ) ;


<s> emit_insn ( gen_addxf3 ( e2 , e1 , cst2 ) ) ; emit_insn ( gen_divxf3 ( e2 , e1 , e2 ) ) ; emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , gen_rtx_NE ( VOIDmode , flags , const0_rtx ) , gen_rtx_LABEL_REF ( VOIDmode , jump_label ) , pc_rtx ) ; insn = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ; JUMP_LABEL ( insn ) = jump_label ; emit_insn ( gen_negxf2 ( e2 , e2 ) ) ; emit_label ( jump_label ) ;


<s> if ( TARGET_AVX512ER ) { emit_insn ( gen_rtx_SET ( x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP28 ) ) ) ; emit_insn ( gen_rtx_SET ( res , gen_rtx_MULT ( mode , a , x0 ) ) ) ; return ; } else emit_insn ( gen_rtx_SET ( x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP14 ) ) ) ; } else emit_insn ( gen_rtx_SET ( x0 , gen_rtx_UNSPEC ( mode , gen_rtvec ( <NUM_LIT> , b ) , UNSPEC_RCP ) ) ) ; emit_insn ( gen_rtx_SET ( e0 , gen_rtx_MULT ( mode , x0 , b ) ) ) ;


<s> rtx tmp ; tmp = gen_rtx_SET ( dst , gen_rtx_fmt_ee ( code , mode , src1 , src2 ) ) ; if ( GET_MODE_SIZE ( mode ) <= GET_MODE_SIZE ( SImode ) && GET_MODE_CLASS ( mode ) == MODE_VECTOR_INT ) { rtx clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , tmp , clob ) ) ; } emit_insn ( tmp ) ;


<s> rtx tmp ; tmp = gen_rtx_SET ( dst , gen_rtx_fmt_ee ( code , mode , src1 , src2 ) ) ;

if ( GET_MODE_SIZE ( mode ) <= GET_MODE_SIZE ( SImode ) && GET_MODE_CLASS ( mode ) == MODE_VECTOR_INT ) {


<s> machine_mode mode = GET_MODE ( val ) ; machine_mode scalarmode = GET_MODE_INNER ( mode ) ; machine_mode intmode = GET_MODE_SIZE ( mode ) == <NUM_LIT> ? V8SImode : V4SImode ; rtx ( * cmp ) ( rtx , rtx , rtx , rtx ) ; int i ; for ( i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) tmp [ i ] = gen_reg_rtx ( mode ) ; real_ldexp ( & TWO31r , & dconst1 , <NUM_LIT> ) ; two31r = const_double_from_real_value ( TWO31r , scalarmode ) ; two31r = ix86_build_const_vector ( mode , <NUM_LIT> , two31r ) ; two31r = force_reg ( mode , two31r ) ; switch ( mode ) { case E_V8SFmode : cmp = gen_avx_maskcmpv8sf3 ; break ; case E_V4SFmode : cmp = gen_sse_maskcmpv4sf3 ; break ; case E_V4DFmode : cmp = gen_avx_maskcmpv4df3 ; break ; case E_V2DFmode : cmp = gen_sse2_maskcmpv2df3 ; break ; default : gcc_unreachable ( ) ;


<s> case E_V4DFmode : cmp = gen_avx_maskcmpv4df3 ; break ; case E_V2DFmode : cmp = gen_sse2_maskcmpv2df3 ; break ; default : gcc_unreachable ( ) ; } tmp [ <NUM_LIT> ] = gen_rtx_LE ( mode , two31r , val ) ; emit_insn ( cmp ( tmp [ <NUM_LIT> ] , two31r , val , tmp [ <NUM_LIT> ] ) ) ; tmp [ <NUM_LIT> ] = expand_simple_binop ( mode , AND , tmp [ <NUM_LIT> ] , two31r , tmp [ <NUM_LIT> ] , <NUM_LIT> , OPTAB_DIRECT ) ;

if ( intmode == V4SImode || TARGET_AVX2 ) * xorp = expand_simple_binop ( intmode , ASHIFT , gen_lowpart ( intmode , tmp [ <NUM_LIT> ] ) , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ;


<s> rtx tmpcount = gen_reg_rtx ( GET_MODE ( variable ) ) ; if ( GET_MODE ( variable ) == DImode ) emit_insn ( gen_anddi3 ( tmpcount , variable , GEN_INT ( value ) ) ) ;

else emit_insn ( gen_andsi3 ( tmpcount , variable , GEN_INT ( value ) ) ) ;


<s> static rtx_code_label * ix86_expand_aligntest ( rtx variable , int value , bool epilogue ) { rtx_code_label * label = gen_label_rtx ( ) ; rtx tmpcount = gen_reg_rtx ( GET_MODE ( variable ) ) ; if ( GET_MODE ( variable ) == DImode ) emit_insn ( gen_anddi3 ( tmpcount , variable , GEN_INT ( value ) ) ) ; else emit_insn ( gen_andsi3 ( tmpcount , variable , GEN_INT ( value ) ) ) ; emit_cmp_and_jump_insns ( tmpcount , const0_rtx , EQ , <NUM_LIT> , GET_MODE ( variable ) , <NUM_LIT> , label ) ;

if ( epilogue ) predict_jump ( REG_BR_PROB_BASE * <NUM_LIT> / <NUM_LIT> ) ;


<s> if ( count == <NUM_LIT> || ( count * ix86_cost -> add <= ix86_cost -> shift_const && ! optimize_insn_for_size_p ( ) ) ) { while ( count -- > <NUM_LIT> ) emit_insn ( gen_add2_insn ( operand , operand ) ) ; }


<s> static void ix86_expand_ashl_const ( rtx operand , int count , machine_mode mode ) { if ( count == <NUM_LIT> || ( count * ix86_cost -> add <= ix86_cost -> shift_const && ! optimize_insn_for_size_p ( ) ) ) { while ( count -- > <NUM_LIT> ) emit_insn ( gen_add2_insn ( operand , operand ) ) ;


<s> old_reg = gen_reg_rtx ( mode ) ; new_reg = old_reg ; old_mem = copy_to_reg ( mem ) ; loop_label = gen_label_rtx ( ) ; emit_label ( loop_label ) ; emit_move_insn ( old_reg , old_mem ) ; if ( ! after ) emit_move_insn ( target , old_reg ) ; if ( code == NOT ) {

new_reg = expand_simple_binop ( mode , AND , new_reg , val , NULL_RTX , true , OPTAB_LIB_WIDEN ) ;


<s> src1 = operands [ <NUM_LIT> ] ; src2 = operands [ <NUM_LIT> ] ; op = gen_rtx_SET ( dst , gen_rtx_fmt_ee ( code , mode , src1 , src2 ) ) ;

if ( reload_completed && code == PLUS && ! rtx_equal_p ( dst , src1 ) ) {


<s> if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( VECTOR_MODE_P ( mode1 ) ) op1 = safe_vector_operand ( op1 , mode1 ) ; if ( optimize || ! target || GET_MODE ( target ) != tmode || ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; if ( GET_MODE ( op1 ) == SImode && mode1 == TImode ) { rtx x = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_sse2_loadd ( x , op1 ) ) ; op1 = gen_lowpart ( TImode , x ) ; } if ( ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ;

pat = GEN_FCN ( icode ) ( target , op0 , op1 ) ;


<s> if ( code == EQ || code == NE || code == UNEQ || code == LTGT || code == ORDERED || code == UNORDERED ) return false ; if ( ( code == GT || code == UNLE || code == LE || code == UNGT ) && ! TARGET_IEEE_FP ) { std :: swap ( op0 , op1 ) ; code = swap_condition ( code ) ; } start_sequence ( ) ; compare_op = ix86_expand_fp_compare ( code , op0 , op1 ) ; compare_seq = get_insns ( ) ; end_sequence ( ) ; if ( GET_MODE ( XEXP ( compare_op , <NUM_LIT> ) ) == CCFPmode ) code = ix86_fp_compare_code_to_integer ( GET_CODE ( compare_op ) ) ; else code = GET_CODE ( compare_op ) ; if ( code != LTU && code != GEU ) return false ; emit_insn ( compare_seq ) ; * pop = compare_op ; return true ; } if ( ! INTEGRAL_MODE_P ( mode ) ) return false ; switch ( code ) { case LTU : case GEU : break ;


<s> if ( code == EQ || code == NE || code == UNEQ || code == LTGT || code == ORDERED || code == UNORDERED ) return false ; if ( ( code == GT || code == UNLE || code == LE || code == UNGT ) && ! TARGET_IEEE_FP ) { std :: swap ( op0 , op1 ) ; code = swap_condition ( code ) ; } start_sequence ( ) ; compare_op = ix86_expand_fp_compare ( code , op0 , op1 ) ; compare_seq = get_insns ( ) ; end_sequence ( ) ; if ( GET_MODE ( XEXP ( compare_op , <NUM_LIT> ) ) == CCFPmode ) code = ix86_fp_compare_code_to_integer ( GET_CODE ( compare_op ) ) ; else code = GET_CODE ( compare_op ) ; if ( code != LTU && code != GEU ) return false ; emit_insn ( compare_seq ) ; * pop = compare_op ; return true ; } if ( ! INTEGRAL_MODE_P ( mode ) ) return false ; switch ( code ) { case LTU : case GEU : break ; case EQ : case NE : if ( op1 != const0_rtx ) return false ; op1 = const1_rtx ; code = ( code == EQ ? LTU : GEU ) ; break ; case GTU : case LEU : if ( CONST_INT_P ( op1 ) ) { op1 = gen_int_mode ( INTVAL ( op1 ) + <NUM_LIT> , GET_MODE ( op0 ) ) ; if ( op1 == const0_rtx || ! x86_64_immediate_operand ( op1 , GET_MODE ( op1 ) ) ) return false ; code = ( code == GTU ? GEU : LTU ) ; } else { std :: swap ( op0 , op1 ) ; code = ( code == GTU ? LTU : GEU ) ; } break ; case LT : case GE : if ( mode == DImode || op1 != const0_rtx ) return false ; op1 = gen_int_mode ( <NUM_LIT> << ( GET_MODE_BITSIZE ( mode ) - <NUM_LIT> ) , mode ) ; code = ( code == LT ? GEU : LTU ) ; break ; case LE : case GT : if ( mode == DImode || op1 != constm1_rtx ) return false ; op1 = gen_int_mode ( <NUM_LIT> << ( GET_MODE_BITSIZE ( mode ) - <NUM_LIT> ) , mode ) ; code = ( code == LE ? GEU : LTU ) ; break ; default : return false ; } if ( ! nonimmediate_operand ( op0 , VOIDmode ) ) { if ( ! can_create_pseudo_p ( ) ) return false ; op0 = force_reg ( mode , op0 ) ; } * pop = ix86_expand_compare ( code , op0 , op1 ) ; gcc_assert ( GET_CODE ( * pop ) == LTU || GET_CODE ( * pop ) == GEU ) ; return true ;


<s> if ( ! TARGET_USE_MOV0 || optimize_insn_for_size_p ( ) ) { rtx clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , tmp , clob ) ) ;


<s> gen = gen_atomic_compare_and_swapqi_1 ; break ; default : gcc_unreachable ( ) ; } if ( doubleword ) { rtx low_new_mem = gen_lowpart ( hmode , new_mem ) ; rtx low_exp_input = gen_lowpart ( hmode , exp_input ) ; rtx high_new_mem = gen_highpart ( hmode , new_mem ) ; rtx high_exp_input = gen_highpart ( hmode , exp_input ) ; emit_cmp_and_jump_insns ( low_new_mem , low_exp_input , NE , NULL_RTX , hmode , <NUM_LIT> , cmp_label , profile_probability :: guessed_never ( ) ) ; emit_cmp_and_jump_insns ( high_new_mem , high_exp_input , NE , NULL_RTX , hmode , <NUM_LIT> , cmp_label , profile_probability :: guessed_never ( ) ) ; } else emit_cmp_and_jump_insns ( new_mem , exp_input , NE , NULL_RTX , GET_MODE ( exp_input ) , <NUM_LIT> , cmp_label , profile_probability :: guessed_never ( ) ) ; if ( doubleword ) emit_insn ( gendw ( target_val , mem , exp_input , gen_lowpart ( hmode , new_input ) , gen_highpart ( hmode , new_input ) , mem_model ) ) ; else emit_insn ( gen ( target_val , mem , exp_input , new_input , mem_model ) ) ; if ( ! loop_label ) { emit_jump_insn ( gen_jump ( done_label ) ) ; emit_barrier ( ) ;


<s> else if ( SCALAR_FLOAT_MODE_P ( GET_MODE ( op0 ) ) ) { gcc_assert ( ! DECIMAL_FLOAT_MODE_P ( GET_MODE ( op0 ) ) ) ; ret = ix86_expand_fp_compare ( code , op0 , op1 ) ; } else ret = ix86_expand_int_compare ( code , op0 , op1 ) ; return ret ;


<s> static rtx ix86_expand_compare ( enum rtx_code code , rtx op0 , rtx op1 ) { rtx ret ;

if ( GET_MODE_CLASS ( GET_MODE ( op0 ) ) == MODE_CC ) ret = gen_rtx_fmt_ee ( code , VOIDmode , op0 , op1 ) ;


<s> emit_insn ( gen_floatsidf2 ( fp_hi , gen_highpart ( SImode , input ) ) ) ; real_ldexp ( & TWO32r , & dconst1 , <NUM_LIT> ) ; x = const_double_from_real_value ( TWO32r , DFmode ) ; fp_hi = expand_simple_binop ( DFmode , MULT , fp_hi , x , fp_hi , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_expand_convert_uns_sidf_sse ( fp_lo , gen_lowpart ( SImode , input ) ) ; x = expand_simple_binop ( DFmode , PLUS , fp_hi , fp_lo , target , <NUM_LIT> , OPTAB_DIRECT ) ; if ( x != target ) emit_move_insn ( target , x ) ;


<s> real_ldexp ( & bias_lo_rvt , & dconst1 , <NUM_LIT> ) ; real_ldexp ( & bias_hi_rvt , & dconst1 , <NUM_LIT> ) ; biases = const_double_from_real_value ( bias_lo_rvt , DFmode ) ; x = const_double_from_real_value ( bias_hi_rvt , DFmode ) ; biases = gen_rtx_CONST_VECTOR ( V2DFmode , gen_rtvec ( <NUM_LIT> , biases , x ) ) ; biases = validize_mem ( force_const_mem ( V2DFmode , biases ) ) ; emit_insn ( gen_subv2df3 ( fp_xmm , fp_xmm , biases ) ) ; if ( TARGET_SSE3 ) emit_insn ( gen_sse3_haddv2df3 ( fp_xmm , fp_xmm , fp_xmm ) ) ; else { x = copy_to_mode_reg ( V2DFmode , fp_xmm ) ; emit_insn ( gen_vec_interleave_highv2df ( fp_xmm , fp_xmm , fp_xmm ) ) ;

emit_insn ( gen_addv2df3 ( fp_xmm , fp_xmm , x ) ) ;


<s> int_xmm = gen_reg_rtx ( V4SImode ) ; if ( TARGET_INTER_UNIT_MOVES_TO_VEC ) emit_insn ( gen_movdi_to_sse ( int_xmm , input ) ) ; else if ( TARGET_SSE_SPLIT_REGS ) { emit_clobber ( int_xmm ) ; emit_move_insn ( gen_lowpart ( DImode , int_xmm ) , input ) ; } else { x = gen_reg_rtx ( V2DImode ) ; ix86_expand_vector_init_one_nonzero ( false , V2DImode , x , input , <NUM_LIT> ) ; emit_move_insn ( int_xmm , gen_lowpart ( V4SImode , x ) ) ; } x = gen_rtx_CONST_VECTOR ( V4SImode , gen_rtvec ( <NUM_LIT> , GEN_INT ( <NUM_LIT> ) , GEN_INT ( <NUM_LIT> ) , const0_rtx , const0_rtx ) ) ; exponents = validize_mem ( force_const_mem ( V4SImode , x ) ) ; emit_insn ( gen_vec_interleave_lowv4si ( int_xmm , int_xmm , exponents ) ) ; fp_xmm = copy_to_mode_reg ( V2DFmode , gen_lowpart ( V2DFmode , int_xmm ) ) ; real_ldexp ( & bias_lo_rvt , & dconst1 , <NUM_LIT> ) ; real_ldexp ( & bias_hi_rvt , & dconst1 , <NUM_LIT> ) ; biases = const_double_from_real_value ( bias_lo_rvt , DFmode ) ; x = const_double_from_real_value ( bias_hi_rvt , DFmode ) ; biases = gen_rtx_CONST_VECTOR ( V2DFmode , gen_rtvec ( <NUM_LIT> , biases , x ) ) ; biases = validize_mem ( force_const_mem ( V2DFmode , biases ) ) ; emit_insn ( gen_subv2df3 ( fp_xmm , fp_xmm , biases ) ) ; if ( TARGET_SSE3 ) emit_insn ( gen_sse3_haddv2df3 ( fp_xmm , fp_xmm , fp_xmm ) ) ; else { x = copy_to_mode_reg ( V2DFmode , fp_xmm ) ; emit_insn ( gen_vec_interleave_highv2df ( fp_xmm , fp_xmm , fp_xmm ) ) ; emit_insn ( gen_addv2df3 ( fp_xmm , fp_xmm , x ) ) ; } ix86_expand_vector_extract ( false , target , fp_xmm , <NUM_LIT> ) ;


<s> real_ldexp ( & TWO31r , & dconst1 , <NUM_LIT> ) ; x = const_double_from_real_value ( TWO31r , DFmode ) ; x = expand_simple_binop ( DFmode , PLUS , fp , x , target , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( DFmode ) && flag_rounding_math ) x = ix86_expand_sse_fabs ( x , NULL ) ; if ( x != target ) emit_move_insn ( target , x ) ;


<s> x = validize_mem ( force_const_mem ( SFmode , x ) ) ; fp_hi = gen_rtx_FMA ( SFmode , fp_hi , x , fp_lo ) ; emit_move_insn ( target , fp_hi ) ; } else { fp_hi = expand_simple_binop ( SFmode , MULT , fp_hi , x , fp_hi , <NUM_LIT> , OPTAB_DIRECT ) ; fp_hi = expand_simple_binop ( SFmode , PLUS , fp_hi , fp_lo , target , <NUM_LIT> , OPTAB_DIRECT ) ; if ( ! rtx_equal_p ( target , fp_hi ) ) emit_move_insn ( target , fp_hi ) ;


<s> if ( TARGET_FMA ) { x = validize_mem ( force_const_mem ( SFmode , x ) ) ; fp_hi = gen_rtx_FMA ( SFmode , fp_hi , x , fp_lo ) ; emit_move_insn ( target , fp_hi ) ; } else { fp_hi = expand_simple_binop ( SFmode , MULT , fp_hi , x , fp_hi , <NUM_LIT> , OPTAB_DIRECT ) ; fp_hi = expand_simple_binop ( SFmode , PLUS , fp_hi , fp_lo , target , <NUM_LIT> , OPTAB_DIRECT ) ;

if ( ! rtx_equal_p ( target , fp_hi ) ) emit_move_insn ( target , fp_hi ) ;


<s> void ix86_expand_convert_uns_sixf_sse ( rtx , rtx ) { gcc_unreachable ( ) ;


<s> void ix86_expand_convert_uns_sixf_sse ( rtx , rtx ) {


<s> rtx dest , vdest , op0 , op1 , mask , op2 , op3 ; mode = GET_MODE ( operands [ <NUM_LIT> ] ) ; if ( mode == HFmode ) vmode = V8HFmode ; else if ( mode == SFmode ) vmode = V4SFmode ; else if ( mode == DFmode ) vmode = V2DFmode ; else if ( mode == TFmode ) vmode = mode ; else gcc_unreachable ( ) ; if ( rtx_equal_p ( operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) { emit_move_insn ( operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; return ; } dest = operands [ <NUM_LIT> ] ; vdest = lowpart_subreg ( vmode , dest , mode ) ;

if ( vdest == NULL_RTX ) vdest = gen_reg_rtx ( vmode ) ;


<s> rtx rem = assign_386_stack_local ( mode , SLOT_TEMP ) ; rtx quot = emit_library_call_value ( libfunc , NULL_RTX , LCT_NORMAL , mode , op0 , mode , op1 , mode , XEXP ( rem , <NUM_LIT> ) , Pmode ) ; * quot_p = quot ; * rem_p = rem ;


<s> tmp = ix86_expand_sse_compare_mask ( UNGT , xa , res , ! do_floor ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; tmp = expand_simple_binop ( mode , do_floor ? MINUS : PLUS , xa , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) { if ( do_floor && flag_rounding_math ) tmp = ix86_expand_sse_fabs ( tmp , NULL ) ; ix86_sse_copysign_to_positive ( tmp , tmp , res , mask ) ; } emit_move_insn ( res , tmp ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> one = force_reg ( mode , const_double_from_real_value ( dconst1 , mode ) ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , xa , res , ! do_floor ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; tmp = expand_simple_binop ( mode , do_floor ? MINUS : PLUS , xa , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) { if ( do_floor && flag_rounding_math ) tmp = ix86_expand_sse_fabs ( tmp , NULL ) ; ix86_sse_copysign_to_positive ( tmp , tmp , res , mask ) ; } emit_move_insn ( res , tmp ) ;


<s> res = copy_to_reg ( operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; ix86_sse_copysign_to_positive ( xa , xa , res , mask ) ; one = force_reg ( mode , const_double_from_real_value ( dconst1 , mode ) ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , xa , res , ! do_floor ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; tmp = expand_simple_binop ( mode , do_floor ? MINUS : PLUS , xa , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) { if ( do_floor && flag_rounding_math ) tmp = ix86_expand_sse_fabs ( tmp , NULL ) ; ix86_sse_copysign_to_positive ( tmp , tmp , res , mask ) ;


<s> tmp = ix86_expand_sse_compare_mask ( UNGT , xa , res , ! do_floor ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; tmp = expand_simple_binop ( mode , do_floor ? MINUS : PLUS , xa , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) { if ( do_floor && flag_rounding_math ) tmp = ix86_expand_sse_fabs ( tmp , NULL ) ; ix86_sse_copysign_to_positive ( tmp , tmp , res , mask ) ;


<s> use_sse = true ; if ( mode == HFmode ) vmode = V8HFmode ; } else if ( TARGET_SSE_MATH ) { use_sse = SSE_FLOAT_MODE_P ( mode ) ; if ( mode == SFmode ) vmode = V4SFmode ; else if ( mode == DFmode ) vmode = V2DFmode ; } dst = operands [ <NUM_LIT> ] ; src = operands [ <NUM_LIT> ] ; set = gen_rtx_fmt_e ( code , mode , src ) ; set = gen_rtx_SET ( dst , set ) ; if ( use_sse ) { rtx mask , use , clob ; mask = ix86_build_signbit_mask ( vmode , vector_mode , code == ABS ) ; use = gen_rtx_USE ( VOIDmode , mask ) ; if ( vector_mode || mode == TFmode ) par = gen_rtvec ( <NUM_LIT> , set , use ) ; else { clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; par = gen_rtvec ( <NUM_LIT> , set , use , clob ) ; } } else { rtx clob ; clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ;

par = gen_rtvec ( <NUM_LIT> , set , clob ) ;


<s> cmp_mode = CCNOmode ; tmp = gen_rtx_UNSPEC ( HImode , gen_rtvec ( <NUM_LIT> , tmp ) , UNSPEC_FNSTSW ) ; scratch = gen_reg_rtx ( HImode ) ; emit_insn ( gen_rtx_SET ( scratch , tmp ) ) ; switch ( code ) { case GT : case UNGT : if ( code == GT || ! TARGET_IEEE_FP ) { emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; code = EQ ; } else { emit_insn ( gen_andqi_ext_1 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_addqi_ext_1 ( scratch , scratch , constm1_rtx ) ) ; emit_insn ( gen_cmpqi_ext_3 ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; cmp_mode = CCmode ; code = GEU ; } break ; case LT : case UNLT : if ( code == LT && TARGET_IEEE_FP ) { emit_insn ( gen_andqi_ext_1 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_cmpqi_ext_3 ( scratch , const1_rtx ) ) ; cmp_mode = CCmode ; code = EQ ; } else { emit_insn ( gen_testqi_ext_1_ccno ( scratch , const1_rtx ) ) ; code = NE ; } break ; case GE : case UNGE : if ( code == GE || ! TARGET_IEEE_FP ) { emit_insn ( gen_testqi_ext_1_ccno ( scratch , GEN_INT ( <NUM_LIT> ) ) ) ; code = EQ ; } else { emit_insn ( gen_andqi_ext_1 ( scratch , scratch , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_xorqi_ext_1_cc ( scratch , scratch , const1_rtx ) ) ;


<s> if ( ix86_expand_sse_fp_minmax ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) return true ; tmp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , code , op0 , op1 , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; ix86_expand_sse_movcc ( operands [ <NUM_LIT> ] , tmp , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ; return true ; } if ( GET_MODE ( op0 ) == TImode || ( GET_MODE ( op0 ) == DImode && ! TARGET_64BIT ) ) return false ; compare_op = ix86_expand_compare ( code , op0 , op1 ) ; if ( ! fcmov_comparison_operator ( compare_op , VOIDmode ) ) { tmp = gen_reg_rtx ( QImode ) ; ix86_expand_setcc ( tmp , code , op0 , op1 ) ; compare_op = ix86_expand_compare ( NE , tmp , const0_rtx ) ; }

emit_insn ( gen_rtx_SET ( operands [ <NUM_LIT> ] , gen_rtx_IF_THEN_ELSE ( mode , compare_op , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] ) ) ) ;


<s> rtx cmp ; code = ix86_prepare_sse_fp_compare_args ( operands [ <NUM_LIT> ] , code , & operands [ <NUM_LIT> ] , & operands [ <NUM_LIT> ] ) ; if ( code == UNKNOWN ) { rtx temp ; switch ( GET_CODE ( operands [ <NUM_LIT> ] ) ) { case LTGT : temp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , ORDERED , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] , NULL , NULL ) ; cmp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , NE , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] , NULL , NULL ) ; code = AND ; break ; case UNEQ : temp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , UNORDERED , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] , NULL , NULL ) ;

cmp = ix86_expand_sse_cmp ( operands [ <NUM_LIT> ] , EQ , operands [ <NUM_LIT> ] , operands [ <NUM_LIT> ] , NULL , NULL ) ;


<s> rtx op0 = XEXP ( operands [ <NUM_LIT> ] , <NUM_LIT> ) ; rtx op1 = XEXP ( operands [ <NUM_LIT> ] , <NUM_LIT> ) ; if ( operands [ <NUM_LIT> ] != const1_rtx && operands [ <NUM_LIT> ] != constm1_rtx ) return false ; if ( ! ix86_expand_carry_flag_compare ( code , op0 , op1 , & compare_op ) ) return false ; code = GET_CODE ( compare_op ) ; flags = XEXP ( compare_op , <NUM_LIT> ) ; if ( GET_MODE ( flags ) == CCFPmode ) { fpcmp = true ; code = ix86_fp_compare_code_to_integer ( code ) ; }


<s> machine_mode mode ; rtx op0 = XEXP ( operands [ <NUM_LIT> ] , <NUM_LIT> ) ; rtx op1 = XEXP ( operands [ <NUM_LIT> ] , <NUM_LIT> ) ; if ( operands [ <NUM_LIT> ] != const1_rtx && operands [ <NUM_LIT> ] != constm1_rtx ) return false ; if ( ! ix86_expand_carry_flag_compare ( code , op0 , op1 , & compare_op ) ) return false ; code = GET_CODE ( compare_op ) ; flags = XEXP ( compare_op , <NUM_LIT> ) ; if ( GET_MODE ( flags ) == CCFPmode ) { fpcmp = true ; code = ix86_fp_compare_code_to_integer ( code ) ; } if ( code != LTU ) { val = constm1_rtx ; if ( fpcmp ) PUT_CODE ( compare_op , reverse_condition_maybe_unordered ( GET_CODE ( compare_op ) ) ) ; else PUT_CODE ( compare_op , reverse_condition ( GET_CODE ( compare_op ) ) ) ; }

mode = GET_MODE ( operands [ <NUM_LIT> ] ) ;


<s> cmpmode = SELECT_CC_MODE ( code , op0 , op1 ) ; flags = gen_rtx_REG ( cmpmode , FLAGS_REG ) ; tmp = gen_rtx_COMPARE ( cmpmode , op0 , op1 ) ; emit_insn ( gen_rtx_SET ( flags , tmp ) ) ; return gen_rtx_fmt_ee ( code , VOIDmode , flags , const0_rtx ) ;


<s> std :: swap ( op0 , op1 ) ; code = swap_condition ( code ) ; } cmpmode = SELECT_CC_MODE ( code , op0 , op1 ) ; flags = gen_rtx_REG ( cmpmode , FLAGS_REG ) ;

tmp = gen_rtx_COMPARE ( cmpmode , op0 , op1 ) ;


<s> if ( ( code == LT || code == GE ) && data_mode == mode && cop1 == CONST0_RTX ( mode ) && operands [ <NUM_LIT> + ( code == LT ) ] == CONST0_RTX ( data_mode ) && GET_MODE_UNIT_SIZE ( data_mode ) > <NUM_LIT> && GET_MODE_UNIT_SIZE ( data_mode ) <= <NUM_LIT> && ( GET_MODE_SIZE ( data_mode ) == <NUM_LIT> || ( TARGET_AVX2 && GET_MODE_SIZE ( data_mode ) == <NUM_LIT> ) ) ) { rtx negop = operands [ <NUM_LIT> - ( code == LT ) ] ; int shift = GET_MODE_UNIT_BITSIZE ( data_mode ) - <NUM_LIT> ; if ( negop == CONST1_RTX ( data_mode ) ) { rtx res = expand_simple_binop ( mode , LSHIFTRT , cop0 , GEN_INT ( shift ) , operands [ <NUM_LIT> ] , <NUM_LIT> , OPTAB_DIRECT ) ; if ( res != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , res ) ; return true ; } else if ( GET_MODE_INNER ( data_mode ) != DImode && vector_all_ones_operand ( negop , data_mode ) ) { rtx res = expand_simple_binop ( mode , ASHIFTRT , cop0 , GEN_INT ( shift ) , operands [ <NUM_LIT> ] , <NUM_LIT> , OPTAB_DIRECT ) ; if ( res != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , res ) ; return true ;


<s> if ( ! cmp ) return false ; if ( negate ) cmp = ix86_expand_int_sse_cmp ( operands [ <NUM_LIT> ] , EQ , cmp , CONST0_RTX ( GET_MODE ( cmp ) ) , NULL , NULL , & negate ) ; gcc_assert ( ! negate ) ; if ( operands [ <NUM_LIT> ] != cmp ) emit_move_insn ( operands [ <NUM_LIT> ] , cmp ) ;


<s> if ( negate ) cmp = ix86_expand_int_sse_cmp ( operands [ <NUM_LIT> ] , EQ , cmp , CONST0_RTX ( GET_MODE ( cmp ) ) , NULL , NULL , & negate ) ; gcc_assert ( ! negate ) ; if ( operands [ <NUM_LIT> ] != cmp ) emit_move_insn ( operands [ <NUM_LIT> ] , cmp ) ; return true ;


<s> expand_fix ( ireg , op1 , <NUM_LIT> ) ; freg = gen_reg_rtx ( fmode ) ; expand_float ( freg , ireg , <NUM_LIT> ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , freg , op1 , ! do_floor ) ; tmp = expand_simple_binop ( imode , do_floor ? MINUS : PLUS , ireg , const1_rtx , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; emit_move_insn ( ireg , tmp ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( op0 , ireg ) ;


<s> rtx ireg , freg , tmp ; rtx_code_label * label ; ireg = gen_reg_rtx ( imode ) ; expand_fix ( ireg , op1 , <NUM_LIT> ) ; freg = gen_reg_rtx ( fmode ) ; expand_float ( freg , ireg , <NUM_LIT> ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , freg , op1 , ! do_floor ) ; tmp = expand_simple_binop ( imode , do_floor ? MINUS : PLUS , ireg , const1_rtx , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; emit_move_insn ( ireg , tmp ) ; emit_label ( label ) ;


<s> REAL_VALUE_TYPE pred_half , half_minus_pred_half ; rtx adj ; fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ; real_arithmetic ( & pred_half , MINUS_EXPR , & dconsthalf , & half_minus_pred_half ) ; adj = force_reg ( mode , const_double_from_real_value ( pred_half , mode ) ) ; ix86_sse_copysign_to_positive ( adj , adj , force_reg ( mode , op1 ) , NULL_RTX ) ; adj = expand_simple_binop ( mode , PLUS , adj , op1 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ;


<s> ix86_sse_copysign_to_positive ( adj , adj , force_reg ( mode , op1 ) , NULL_RTX ) ; adj = expand_simple_binop ( mode , PLUS , adj , op1 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ;


<s> case GTU : case GEU : case LTU : unspec_code = UNSPEC_UNSIGNED_PCMP ; break ; default : unspec_code = UNSPEC_PCMP ; } unspec = gen_rtx_UNSPEC ( mask_mode , gen_rtvec ( <NUM_LIT> , cmp_op0 , cmp_op1 , imm ) , unspec_code ) ;

emit_insn ( gen_rtx_SET ( dest , unspec ) ) ;


<s> op1 = tmp ; } switch ( GET_CODE ( op1 ) ) { case CONST : tmp = XEXP ( op1 , <NUM_LIT> ) ; if ( GET_CODE ( tmp ) != PLUS || GET_CODE ( XEXP ( tmp , <NUM_LIT> ) ) != SYMBOL_REF ) break ; op1 = XEXP ( tmp , <NUM_LIT> ) ; addend = XEXP ( tmp , <NUM_LIT> ) ; case SYMBOL_REF : model = SYMBOL_REF_TLS_MODEL ( op1 ) ; if ( model ) op1 = legitimize_tls_address ( op1 , model , true ) ; else if ( ix86_force_load_from_GOT_p ( op1 ) ) { op1 = gen_rtx_UNSPEC ( Pmode , gen_rtvec ( <NUM_LIT> , op1 ) , ( TARGET_64BIT ? UNSPEC_GOTPCREL : UNSPEC_GOT ) ) ; op1 = gen_rtx_CONST ( Pmode , op1 ) ; op1 = gen_const_mem ( Pmode , op1 ) ; set_mem_alias_set ( op1 , ix86_GOT_alias_set ( ) ) ; } else { tmp = legitimize_pe_coff_symbol ( op1 , addend != NULL_RTX ) ; if ( tmp ) { op1 = tmp ; if ( ! addend ) break ; } else { op1 = operands [ <NUM_LIT> ] ; break ; } } if ( addend ) { op1 = force_operand ( op1 , NULL_RTX ) ; op1 = expand_simple_binop ( Pmode , PLUS , op1 , addend , op0 , <NUM_LIT> , OPTAB_DIRECT ) ; } else op1 = force_operand ( op1 , op0 ) ; if ( op1 == op0 ) return ; op1 = convert_to_mode ( mode , op1 , <NUM_LIT> ) ; default : break ; } if ( ( flag_pic || MACHOPIC_INDIRECT ) && symbolic_operand ( op1 , mode ) ) { if ( TARGET_MACHO && ! TARGET_64BIT ) { if ( MACHOPIC_INDIRECT ) { rtx temp = ( op0 && REG_P ( op0 ) && mode == Pmode ) ? op0 : gen_reg_rtx ( Pmode ) ; op1 = machopic_indirect_data_reference ( op1 , temp ) ; if ( MACHOPIC_PURE ) op1 = machopic_legitimize_pic_address ( op1 , mode , temp == op1 ? <NUM_LIT> : temp ) ; } if ( op0 != op1 && GET_CODE ( op0 ) != MEM ) { rtx insn = gen_rtx_SET ( op0 , op1 ) ; emit_insn ( insn ) ; return ; } if ( GET_CODE ( op0 ) == MEM ) op1 = force_reg ( Pmode , op1 ) ;


<s> if ( ! const_vector_equal_evenodd_p ( orig_op1 ) ) op1 = expand_binop ( wmode , lshr_optab , gen_lowpart ( wmode , op1 ) , x , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; if ( ! const_vector_equal_evenodd_p ( orig_op2 ) ) op2 = expand_binop ( wmode , lshr_optab , gen_lowpart ( wmode , op2 ) , x , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; op1 = gen_lowpart ( mode , op1 ) ; op2 = gen_lowpart ( mode , op2 ) ; } if ( mode == V16SImode ) { if ( uns_p ) x = gen_vec_widen_umult_even_v16si ( dest , op1 , op2 ) ; else x = gen_vec_widen_smult_even_v16si ( dest , op1 , op2 ) ; } else if ( mode == V8SImode ) { if ( uns_p ) x = gen_vec_widen_umult_even_v8si ( dest , op1 , op2 ) ; else x = gen_vec_widen_smult_even_v8si ( dest , op1 , op2 ) ; } else if ( uns_p ) x = gen_vec_widen_umult_even_v4si ( dest , op1 , op2 ) ; else if ( TARGET_SSE4_1 ) x = gen_sse4_1_mulv2siv2di3 ( dest , op1 , op2 ) ; else { rtx s1 , s2 , t0 , t1 , t2 ;

s1 = ix86_expand_sse_cmp ( gen_reg_rtx ( mode ) , GT , CONST0_RTX ( mode ) , op1 , pc_rtx , pc_rtx ) ;


<s> pos += SUBREG_BYTE ( dst ) * BITS_PER_UNIT ; dst = SUBREG_REG ( dst ) ; } switch ( GET_MODE ( dst ) ) { case E_V16QImode : case E_V8HImode : case E_V4SImode : case E_V2DImode : case E_V1TImode : { machine_mode srcmode , dstmode ; rtx ( * pinsr ) ( rtx , rtx , rtx , rtx ) ; rtx d ; if ( ! int_mode_for_size ( size , <NUM_LIT> ) . exists ( & srcmode ) ) return false ; switch ( srcmode ) { case E_QImode : if ( ! TARGET_SSE4_1 ) return false ; dstmode = V16QImode ; pinsr = gen_sse4_1_pinsrb ; break ; case E_HImode : if ( ! TARGET_SSE2 ) return false ; dstmode = V8HImode ; pinsr = gen_sse2_pinsrw ; break ; case E_SImode : if ( ! TARGET_SSE4_1 ) return false ; dstmode = V4SImode ; pinsr = gen_sse4_1_pinsrd ; break ; case E_DImode : gcc_assert ( TARGET_64BIT ) ; if ( ! TARGET_SSE4_1 ) return false ; dstmode = V2DImode ; pinsr = gen_sse4_1_pinsrq ; break ; default : return false ; } if ( pos & ( size - <NUM_LIT> ) ) return false ; if ( SUBREG_P ( src ) ) { unsigned int srcpos = SUBREG_BYTE ( src ) ; if ( srcpos > <NUM_LIT> ) { rtx extr_ops [ <NUM_LIT> ] ; extr_ops [ <NUM_LIT> ] = gen_reg_rtx ( srcmode ) ; extr_ops [ <NUM_LIT> ] = gen_lowpart ( srcmode , SUBREG_REG ( src ) ) ; extr_ops [ <NUM_LIT> ] = GEN_INT ( size ) ; extr_ops [ <NUM_LIT> ] = GEN_INT ( srcpos * BITS_PER_UNIT ) ; if ( ! ix86_expand_pextr ( extr_ops ) ) return false ; src = extr_ops [ <NUM_LIT> ] ; } else src = gen_lowpart ( srcmode , SUBREG_REG ( src ) ) ; } if ( GET_MODE ( dst ) == dstmode ) d = dst ; else d = gen_reg_rtx ( dstmode ) ; emit_insn ( pinsr ( d , gen_lowpart ( dstmode , dst ) , gen_lowpart ( srcmode , src ) , GEN_INT ( <NUM_LIT> << ( pos / size ) ) ) ) ; if ( d != dst ) emit_move_insn ( dst , gen_lowpart ( GET_MODE ( dst ) , d ) ) ; return true ;


<s> machine_mode mode = GET_MODE ( in ) ; int i ; if ( TARGET_SSE4_1 && mode == V8HImode && fn == gen_uminv8hi3 ) { emit_insn ( gen_sse4_1_phminposuw ( dest , in ) ) ; return ; } for ( i = GET_MODE_BITSIZE ( mode ) ; i > GET_MODE_UNIT_BITSIZE ( mode ) ; i >>= <NUM_LIT> ) { half = gen_reg_rtx ( mode ) ; emit_reduc_half ( half , vec , i ) ; if ( i == GET_MODE_UNIT_BITSIZE ( mode ) * <NUM_LIT> ) dst = dest ; else dst = gen_reg_rtx ( mode ) ; emit_insn ( fn ( dst , half , vec ) ) ;


<s> label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; if ( flag_rounding_math ) { ix86_sse_copysign_to_positive ( TWO52 , TWO52 , res , mask ) ; xa = res ; } xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) && flag_rounding_math ) xa = ix86_expand_sse_fabs ( xa , NULL ) ; ix86_sse_copysign_to_positive ( res , xa , res , mask ) ;


<s> } xa = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa = expand_simple_binop ( mode , MINUS , xa , TWO52 , xa , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) && flag_rounding_math ) xa = ix86_expand_sse_fabs ( xa , NULL ) ;

ix86_sse_copysign_to_positive ( res , xa , res , mask ) ;


<s> fmt = REAL_MODE_FORMAT ( mode ) ; real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ; real_arithmetic ( & pred_half , MINUS_EXPR , & dconsthalf , & half_minus_pred_half ) ; half = force_reg ( mode , const_double_from_real_value ( pred_half , mode ) ) ; xa = expand_simple_binop ( mode , PLUS , xa , half , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xi = gen_reg_rtx ( int_mode_for_mode ( mode ) . require ( ) ) ;


<s> machine_mode mode = GET_MODE ( operand0 ) ; rtx xa , xa2 , dxa , TWO52 , tmp , half , mhalf , one , res , mask ; rtx_code_label * label ; TWO52 = ix86_gen_TWO52 ( mode ) ; res = copy_to_reg ( operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa2 = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , TWO52 , xa2 , <NUM_LIT> , OPTAB_DIRECT ) ; dxa = expand_simple_binop ( mode , MINUS , xa2 , xa , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; half = force_reg ( mode , const_double_from_real_value ( dconsthalf , mode ) ) ; one = expand_simple_binop ( mode , PLUS , half , half , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; mhalf = expand_simple_binop ( mode , MINUS , half , one , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , dxa , half , false ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , tmp , one ) ) ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp = ix86_expand_sse_compare_mask ( UNGE , mhalf , dxa , false ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , tmp , one ) ) ) ; xa2 = expand_simple_binop ( mode , PLUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ;

ix86_sse_copysign_to_positive ( res , xa2 , res , mask ) ;


<s> machine_mode mode = GET_MODE ( op0 ) ; rtx e1 , e2 , res , half ; const struct real_format * fmt ; REAL_VALUE_TYPE pred_half , half_minus_pred_half ; rtx ( * gen_copysign ) ( rtx , rtx , rtx ) ; rtx ( * gen_round ) ( rtx , rtx , rtx ) ; switch ( mode ) { case E_SFmode : gen_copysign = gen_copysignsf3 ; gen_round = gen_sse4_1_roundsf2 ; break ; case E_DFmode :


<s> real_2expN ( & half_minus_pred_half , - ( fmt -> p ) - <NUM_LIT> , mode ) ; real_arithmetic ( & pred_half , MINUS_EXPR , & dconsthalf , & half_minus_pred_half ) ; half = const_double_from_real_value ( pred_half , mode ) ; e1 = gen_reg_rtx ( mode ) ; emit_insn ( gen_copysign ( e1 , half , op1 ) ) ; e2 = expand_simple_binop ( mode , PLUS , op1 , e1 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; res = gen_reg_rtx ( mode ) ; emit_insn ( gen_round ( res , e2 , GEN_INT ( ROUND_TRUNC ) ) ) ; emit_move_insn ( op0 , res ) ;


<s> ret = ix86_expand_compare ( code , op0 , op1 ) ; PUT_MODE ( ret , QImode ) ; emit_insn ( gen_rtx_SET ( dest , ret ) ) ;


<s> PUT_MODE ( ret , QImode ) ; emit_insn ( gen_rtx_SET ( dest , ret ) ) ;


<s> case V8DF_FTYPE_PCV8DF_V8DF_UQI : case V2DI_FTYPE_PCV2DI_V2DI_UQI : case V4DI_FTYPE_PCV4DI_V4DI_UQI : case V8DI_FTYPE_PCV8DI_V8DI_UQI : case V64QI_FTYPE_PCV64QI_V64QI_UDI : case V32HI_FTYPE_PCV32HI_V32HI_USI : case V32QI_FTYPE_PCV32QI_V32QI_USI : case V16QI_FTYPE_PCV16QI_V16QI_UHI : case V16HI_FTYPE_PCV16HI_V16HI_UHI : case V8HI_FTYPE_PCV8HI_V8HI_UQI : switch ( icode ) { case CODE_FOR_avx512f_loadv16sf_mask : case CODE_FOR_avx512f_loadv16si_mask : case CODE_FOR_avx512f_loadv8df_mask : case CODE_FOR_avx512f_loadv8di_mask : case CODE_FOR_avx512vl_loadv8sf_mask : case CODE_FOR_avx512vl_loadv8si_mask : case CODE_FOR_avx512vl_loadv4df_mask : case CODE_FOR_avx512vl_loadv4di_mask : case CODE_FOR_avx512vl_loadv4sf_mask : case CODE_FOR_avx512vl_loadv4si_mask : case CODE_FOR_avx512vl_loadv2df_mask : case CODE_FOR_avx512vl_loadv2di_mask : case CODE_FOR_avx512bw_loadv64qi_mask : case CODE_FOR_avx512vl_loadv32qi_mask : case CODE_FOR_avx512vl_loadv16qi_mask : case CODE_FOR_avx512bw_loadv32hi_mask : case CODE_FOR_avx512vl_loadv16hi_mask : case CODE_FOR_avx512vl_loadv8hi_mask : aligned_mem = true ; break ; default : break ; } case V64QI_FTYPE_PCCHAR_V64QI_UDI : case V32QI_FTYPE_PCCHAR_V32QI_USI : case V16QI_FTYPE_PCCHAR_V16QI_UHI : case V32HI_FTYPE_PCSHORT_V32HI_USI : case V16HI_FTYPE_PCSHORT_V16HI_UHI : case V8HI_FTYPE_PCSHORT_V8HI_UQI : case V16SI_FTYPE_PCINT_V16SI_UHI : case V8SI_FTYPE_PCINT_V8SI_UQI : case V4SI_FTYPE_PCINT_V4SI_UQI : case V8DI_FTYPE_PCINT64_V8DI_UQI : case V4DI_FTYPE_PCINT64_V4DI_UQI : case V2DI_FTYPE_PCINT64_V2DI_UQI : case V8DF_FTYPE_PCDOUBLE_V8DF_UQI : case V4DF_FTYPE_PCDOUBLE_V4DF_UQI : case V2DF_FTYPE_PCDOUBLE_V2DF_UQI : case V16SF_FTYPE_PCFLOAT_V16SF_UHI : case V8SF_FTYPE_PCFLOAT_V8SF_UQI : case V4SF_FTYPE_PCFLOAT_V4SF_UQI : case V8HF_FTYPE_PCFLOAT16_V8HF_UQI : nargs = <NUM_LIT> ; klass = load ; memory = <NUM_LIT> ; break ; default : gcc_unreachable ( ) ; } gcc_assert ( nargs <= ARRAY_SIZE ( xops ) ) ; if ( klass == store ) { arg = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; op = expand_normal ( arg ) ; gcc_assert ( target == <NUM_LIT> ) ; if ( memory ) { op = ix86_zero_extend_to_Pmode ( op ) ; target = gen_rtx_MEM ( tmode , op ) ; unsigned int align = get_pointer_alignment ( arg ) ; if ( aligned_mem && align < GET_MODE_ALIGNMENT ( tmode ) ) align = GET_MODE_ALIGNMENT ( tmode ) ; if ( MEM_ALIGN ( target ) < align ) set_mem_align ( target , align ) ; } else target = force_reg ( tmode , op ) ; arg_adjust = <NUM_LIT> ; } else { arg_adjust = <NUM_LIT> ; if ( optimize || target == <NUM_LIT> || ! register_operand ( target , tmode ) || GET_MODE ( target ) != tmode ) target = gen_reg_rtx ( tmode ) ; } for ( i = <NUM_LIT> ; i < nargs ; i ++ ) { machine_mode mode = insn_p -> operand [ i + <NUM_LIT> ] . mode ; arg = CALL_EXPR_ARG ( exp , i + arg_adjust ) ; op = expand_normal ( arg ) ; if ( i == memory ) { op = ix86_zero_extend_to_Pmode ( op ) ; op = gen_rtx_MEM ( mode , op ) ; unsigned int align = get_pointer_alignment ( arg ) ; if ( aligned_mem && align < GET_MODE_ALIGNMENT ( mode ) ) align = GET_MODE_ALIGNMENT ( mode ) ; if ( MEM_ALIGN ( op ) < align ) set_mem_align ( op , align ) ;


<s> else emit_insn ( gen_avx2_gtv4di3 ( tmp0 , tmp1 , input ) ) ; } else { tmp0 = expand_simple_binop ( mode , LSHIFTRT , input , GEN_INT ( GET_MODE_UNIT_BITSIZE ( mode ) - <NUM_LIT> ) , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; tmp0 = expand_simple_unop ( mode , NEG , tmp0 , NULL , false ) ; } tmp1 = expand_simple_binop ( mode , XOR , tmp0 , input , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; x = expand_simple_binop ( mode , MINUS , tmp1 , tmp0 , target , <NUM_LIT> , OPTAB_DIRECT ) ; break ; case E_V4SImode :

tmp0 = expand_simple_binop ( mode , ASHIFTRT , input , GEN_INT ( GET_MODE_UNIT_BITSIZE ( mode ) - <NUM_LIT> ) , NULL , <NUM_LIT> , OPTAB_DIRECT ) ;


<s> machine_mode mode = GET_MODE ( target ) ; rtx tmp0 , tmp1 , x ; switch ( mode ) { case E_V2DImode : case E_V4DImode : if ( TARGET_SSE4_2 ) { tmp0 = gen_reg_rtx ( mode ) ; tmp1 = gen_reg_rtx ( mode ) ; emit_move_insn ( tmp1 , CONST0_RTX ( mode ) ) ; if ( mode == E_V2DImode ) emit_insn ( gen_sse4_2_gtv2di3 ( tmp0 , tmp1 , input ) ) ; else emit_insn ( gen_avx2_gtv4di3 ( tmp0 , tmp1 , input ) ) ; } else { tmp0 = expand_simple_binop ( mode , LSHIFTRT , input , GEN_INT ( GET_MODE_UNIT_BITSIZE ( mode ) - <NUM_LIT> ) , NULL , <NUM_LIT> , OPTAB_DIRECT ) ; tmp0 = expand_simple_unop ( mode , NEG , tmp0 , NULL , false ) ;


<s> maskcmp = true ; cmp_mode = nbits > <NUM_LIT> ? int_mode_for_size ( nbits , <NUM_LIT> ) . require ( ) : E_QImode ; } else cmp_mode = cmp_ops_mode ; cmp_op0 = force_reg ( cmp_ops_mode , cmp_op0 ) ; bool ( * op1_predicate ) ( rtx , machine_mode ) = VECTOR_MODE_P ( cmp_ops_mode ) ? vector_operand : nonimmediate_operand ; if ( ! op1_predicate ( cmp_op1 , cmp_ops_mode ) ) cmp_op1 = force_reg ( cmp_ops_mode , cmp_op1 ) ; if ( optimize || ( maskcmp && cmp_mode != mode ) || ( op_true && reg_overlap_mentioned_p ( dest , op_true ) ) || ( op_false && reg_overlap_mentioned_p ( dest , op_false ) ) ) dest = gen_reg_rtx ( maskcmp ? cmp_mode : mode ) ; if ( maskcmp ) { bool ok = ix86_expand_mask_vec_cmp ( dest , code , cmp_op0 , cmp_op1 ) ; gcc_assert ( ok ) ;


<s> if ( optimize || ! target || GET_MODE ( target ) != tmode || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ; op2 = gen_rtx_fmt_ee ( comparison , mode0 , op0 , op1 ) ; pat = GEN_FCN ( d -> icode ) ( target , op0 , op1 , op2 ) ;


<s> if ( swap ) std :: swap ( op0 , op1 ) ; if ( optimize || ! target || GET_MODE ( target ) != tmode || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ; op2 = gen_rtx_fmt_ee ( comparison , mode0 , op0 , op1 ) ;

pat = GEN_FCN ( d -> icode ) ( target , op0 , op1 , op2 ) ;


<s> label = gen_label_rtx ( ) ; tmp = gen_rtx_COMPARE ( CCFPmode , op0 , op1 ) ; if ( unordered_compare ) tmp = gen_rtx_UNSPEC ( CCFPmode , gen_rtvec ( <NUM_LIT> , tmp ) , UNSPEC_NOTRAP ) ; reg = gen_rtx_REG ( CCFPmode , FLAGS_REG ) ; emit_insn ( gen_rtx_SET ( reg , tmp ) ) ; tmp = gen_rtx_fmt_ee ( code , VOIDmode , reg , const0_rtx ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; tmp = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; JUMP_LABEL ( tmp ) = label ; return label ;


<s> rtx tmp , reg ; if ( swap_operands ) std :: swap ( op0 , op1 ) ; label = gen_label_rtx ( ) ; tmp = gen_rtx_COMPARE ( CCFPmode , op0 , op1 ) ; if ( unordered_compare ) tmp = gen_rtx_UNSPEC ( CCFPmode , gen_rtvec ( <NUM_LIT> , tmp ) , UNSPEC_NOTRAP ) ; reg = gen_rtx_REG ( CCFPmode , FLAGS_REG ) ; emit_insn ( gen_rtx_SET ( reg , tmp ) ) ; tmp = gen_rtx_fmt_ee ( code , VOIDmode , reg , const0_rtx ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , label ) , pc_rtx ) ; tmp = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; JUMP_LABEL ( tmp ) = label ; return label ;


<s> rtx mask = gen_reg_rtx ( mode ) ; if ( swap_operands ) std :: swap ( op0 , op1 ) ; insn = mode == DFmode ? gen_setcc_df_sse : gen_setcc_sf_sse ; emit_insn ( insn ( mask , op0 , op1 , gen_rtx_fmt_ee ( code , mode , op0 , op1 ) ) ) ;


<s> if ( ! VECTOR_MODE_P ( mode ) ) { rtx tmp = gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , const0_rtx ) ) ; tmp = gen_rtx_VEC_SELECT ( mode , mask , tmp ) ; mask = gen_reg_rtx ( mode ) ; emit_insn ( gen_rtx_SET ( mask , tmp ) ) ;


<s> if ( rtx_equal_p ( cmp_op0 , if_true ) && rtx_equal_p ( cmp_op1 , if_false ) ) is_min = true ; else if ( rtx_equal_p ( cmp_op1 , if_true ) && rtx_equal_p ( cmp_op0 , if_false ) ) is_min = false ; else return false ; mode = GET_MODE ( dest ) ; if ( ! flag_finite_math_only || flag_signed_zeros ) { int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX ; rtvec v ; if_true = force_reg ( mode , if_true ) ; v = gen_rtvec ( <NUM_LIT> , if_true , if_false ) ; tmp = gen_rtx_UNSPEC ( mode , v , u ) ; } else { code = is_min ? SMIN : SMAX ;

if ( MEM_P ( if_true ) && MEM_P ( if_false ) ) if_true = force_reg ( mode , if_true ) ;


<s> static bool ix86_expand_sse_fp_minmax ( rtx dest , enum rtx_code code , rtx cmp_op0 , rtx cmp_op1 , rtx if_true , rtx if_false ) { machine_mode mode ; bool is_min ; rtx tmp ; if ( code == LT ) ; else if ( code == UNGE ) std :: swap ( if_true , if_false ) ; else return false ; if ( rtx_equal_p ( cmp_op0 , if_true ) && rtx_equal_p ( cmp_op1 , if_false ) ) is_min = true ; else if ( rtx_equal_p ( cmp_op1 , if_true ) && rtx_equal_p ( cmp_op0 , if_false ) ) is_min = false ; else return false ; mode = GET_MODE ( dest ) ; if ( ! flag_finite_math_only || flag_signed_zeros ) { int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX ;


<s> ix86_emit_vec_binop ( AND , mode , dest , x , op_false ) ; return ; } else if ( vector_all_ones_operand ( op_true , mode ) ) { x = expand_simple_binop ( mode , IOR , cmp , op_false , dest , <NUM_LIT> , OPTAB_DIRECT ) ; if ( x != dest ) emit_move_insn ( dest , x ) ; return ; } if ( TARGET_XOP ) { op_true = force_reg ( mode , op_true ) ; if ( GET_MODE_SIZE ( mode ) < <NUM_LIT> || ! nonimmediate_operand ( op_false , mode ) ) op_false = force_reg ( mode , op_false ) ; emit_insn ( gen_rtx_SET ( dest , gen_rtx_IF_THEN_ELSE ( mode , cmp , op_true , op_false ) ) ) ; return ; } rtx ( * gen ) ( rtx , rtx , rtx , rtx ) = NULL ; machine_mode blend_mode = mode ; if ( GET_MODE_SIZE ( mode ) < <NUM_LIT> || ! vector_operand ( op_true , mode ) ) op_true = force_reg ( mode , op_true ) ; op_false = force_reg ( mode , op_false ) ; switch ( mode ) { case E_V2SFmode : if ( TARGET_SSE4_1 ) gen = gen_mmx_blendvps ; break ; case E_V4SFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvps ; break ; case E_V2DFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvpd ; break ; case E_SFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvss ; break ; case E_DFmode : if ( TARGET_SSE4_1 ) gen = gen_sse4_1_blendvsd ; break ; case E_V8QImode : case E_V4HImode : case E_V2SImode : if ( TARGET_SSE4_1 ) { gen = gen_mmx_pblendvb_v8qi ; blend_mode = V8QImode ; } break ; case E_V4QImode : case E_V2HImode : if ( TARGET_SSE4_1 ) { gen = gen_mmx_pblendvb_v4qi ; blend_mode = V4QImode ; } break ; case E_V2QImode : if ( TARGET_SSE4_1 ) gen = gen_mmx_pblendvb_v2qi ; break ; case E_V16QImode : case E_V8HImode : case E_V8HFmode : case E_V4SImode : case E_V2DImode : if ( TARGET_SSE4_1 ) { gen = gen_sse4_1_pblendvb ; blend_mode = V16QImode ; } break ; case E_V8SFmode : if ( TARGET_AVX ) gen = gen_avx_blendvps256 ; break ; case E_V4DFmode : if ( TARGET_AVX ) gen = gen_avx_blendvpd256 ; break ; case E_V32QImode :


<s> if ( VECTOR_MODE_P ( modev2 ) ) op0 = safe_vector_operand ( op0 , modev2 ) ; if ( VECTOR_MODE_P ( modev4 ) ) op2 = safe_vector_operand ( op2 , modev4 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , modev2 ) ) op0 = copy_to_mode_reg ( modev2 , op0 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , modei3 ) ) op1 = copy_to_mode_reg ( modei3 , op1 ) ; if ( ( optimize && ! register_operand ( op2 , modev4 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op2 , modev4 ) ) op2 = copy_to_mode_reg ( modev4 , op2 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op3 , modei5 ) ) op3 = copy_to_mode_reg ( modei5 , op3 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op4 , modeimm ) ) { error ( <STR_LIT> ) ; return const0_rtx ; } if ( d -> code == IX86_BUILTIN_PCMPESTRI128 ) { if ( optimize || ! target || GET_MODE ( target ) != tmode0 || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode0 ) ) target = gen_reg_rtx ( tmode0 ) ; scratch1 = gen_reg_rtx ( tmode1 ) ; pat = GEN_FCN ( d -> icode ) ( target , scratch1 , op0 , op1 , op2 , op3 , op4 ) ; } else if ( d -> code == IX86_BUILTIN_PCMPESTRM128 ) {

if ( optimize || ! target || GET_MODE ( target ) != tmode1 || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode1 ) ) target = gen_reg_rtx ( tmode1 ) ;


<s> machine_mode tmode0 , tmode1 , modev2 , modev3 , modeimm ; tmode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; tmode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev2 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modev3 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; modeimm = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( VECTOR_MODE_P ( modev2 ) ) op0 = safe_vector_operand ( op0 , modev2 ) ; if ( VECTOR_MODE_P ( modev3 ) ) op1 = safe_vector_operand ( op1 , modev3 ) ; if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , modev2 ) ) op0 = copy_to_mode_reg ( modev2 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , modev3 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , modev3 ) ) op1 = copy_to_mode_reg ( modev3 , op1 ) ;

if ( ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op2 , modeimm ) ) {


<s> if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ;

pat = GEN_FCN ( d -> icode ) ( op0 , op1 ) ;


<s> machine_mode mode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; enum rtx_code comparison = d -> comparison ; if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( VECTOR_MODE_P ( mode1 ) ) op1 = safe_vector_operand ( op1 , mode1 ) ; target = gen_reg_rtx ( SImode ) ; emit_move_insn ( target , const0_rtx ) ; target = gen_rtx_SUBREG ( QImode , target , <NUM_LIT> ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ; pat = GEN_FCN ( d -> icode ) ( op0 , op1 ) ; if ( ! pat ) return <NUM_LIT> ; emit_insn ( pat ) ;

emit_insn ( gen_rtx_SET ( gen_rtx_STRICT_LOW_PART ( VOIDmode , target ) , gen_rtx_fmt_ee ( comparison , QImode , SET_DEST ( pat ) , const0_rtx ) ) ) ;


<s> tree arg0 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; rtx op1 , op0 = expand_normal ( arg0 ) ; machine_mode tmode = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( optimize || target == <NUM_LIT> || GET_MODE ( target ) != tmode || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; op1 = GEN_INT ( d -> comparison ) ; pat = GEN_FCN ( d -> icode ) ( target , op0 , op1 ) ;


<s> rtx op1 = expand_normal ( arg1 ) ; rtx op2 ; machine_mode tmode = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( optimize || target == <NUM_LIT> || GET_MODE ( target ) != tmode || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; op0 = safe_vector_operand ( op0 , mode0 ) ; op1 = safe_vector_operand ( op1 , mode1 ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ; op2 = GEN_INT ( d -> comparison ) ; pat = GEN_FCN ( d -> icode ) ( target , op0 , op1 , op2 ) ;


<s> rtx op0 = expand_normal ( arg0 ) ; rtx op1 = expand_normal ( arg1 ) ; rtx op2 ; machine_mode tmode = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode0 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode1 = insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . mode ; if ( optimize || target == <NUM_LIT> || GET_MODE ( target ) != tmode || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; op0 = safe_vector_operand ( op0 , mode0 ) ; op1 = safe_vector_operand ( op1 , mode1 ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; if ( ( optimize && ! register_operand ( op1 , mode1 ) ) || ! insn_data [ d -> icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode1 ) ) op1 = copy_to_mode_reg ( mode1 , op1 ) ;


<s> halfmode = V32QImode ; extract = high_p ? gen_vec_extract_hi_v64qi : gen_vec_extract_lo_v64qi ; break ; case E_V32QImode : if ( unsigned_p ) unpack = gen_avx2_zero_extendv16qiv16hi2 ; else unpack = gen_avx2_sign_extendv16qiv16hi2 ; halfmode = V16QImode ; extract = high_p ? gen_vec_extract_hi_v32qi : gen_vec_extract_lo_v32qi ; break ; case E_V32HImode : if ( unsigned_p ) unpack = gen_avx512f_zero_extendv16hiv16si2 ; else unpack = gen_avx512f_sign_extendv16hiv16si2 ; halfmode = V16HImode ; extract = high_p ? gen_vec_extract_hi_v32hi : gen_vec_extract_lo_v32hi ; break ; case E_V16HImode : if ( unsigned_p ) unpack = gen_avx2_zero_extendv8hiv8si2 ; else unpack = gen_avx2_sign_extendv8hiv8si2 ; halfmode = V8HImode ; extract = high_p ? gen_vec_extract_hi_v16hi : gen_vec_extract_lo_v16hi ; break ; case E_V16SImode : if ( unsigned_p ) unpack = gen_avx512f_zero_extendv8siv8di2 ; else unpack = gen_avx512f_sign_extendv8siv8di2 ; halfmode = V8SImode ; extract = high_p ? gen_vec_extract_hi_v16si : gen_vec_extract_lo_v16si ; break ; case E_V8SImode : if ( unsigned_p ) unpack = gen_avx2_zero_extendv4siv4di2 ; else unpack = gen_avx2_sign_extendv4siv4di2 ; halfmode = V4SImode ; extract = high_p ? gen_vec_extract_hi_v8si : gen_vec_extract_lo_v8si ; break ; case E_V16QImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv8qiv8hi2 ; else unpack = gen_sse4_1_sign_extendv8qiv8hi2 ; break ; case E_V8HImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv4hiv4si2 ; else unpack = gen_sse4_1_sign_extendv4hiv4si2 ; break ; case E_V4SImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv2siv2di2 ; else unpack = gen_sse4_1_sign_extendv2siv2di2 ; break ; case E_V8QImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv4qiv4hi2 ; else unpack = gen_sse4_1_sign_extendv4qiv4hi2 ; break ; case E_V4HImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv2hiv2si2 ; else unpack = gen_sse4_1_sign_extendv2hiv2si2 ; break ; case E_V4QImode : if ( unsigned_p ) unpack = gen_sse4_1_zero_extendv2qiv2hi2 ; else unpack = gen_sse4_1_sign_extendv2qiv2hi2 ; break ; default : gcc_unreachable ( ) ; } if ( GET_MODE_SIZE ( imode ) >= <NUM_LIT> ) { tmp = gen_reg_rtx ( halfmode ) ; emit_insn ( extract ( tmp , src ) ) ; } else if ( high_p ) { switch ( GET_MODE_SIZE ( imode ) ) { case <NUM_LIT> : tmp = gen_reg_rtx ( V1TImode ) ; emit_insn ( gen_sse2_lshrv1ti3 ( tmp , gen_lowpart ( V1TImode , src ) , GEN_INT ( <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : tmp = gen_reg_rtx ( V1DImode ) ; emit_insn ( gen_mmx_lshrv1di3 ( tmp , gen_lowpart ( V1DImode , src ) , GEN_INT ( <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : tmp = gen_reg_rtx ( V1SImode ) ; emit_insn ( gen_mmx_lshrv1si3 ( tmp , gen_lowpart ( V1SImode , src ) , GEN_INT ( <NUM_LIT> ) ) ) ; break ; default : gcc_unreachable ( ) ; } tmp = gen_lowpart ( imode , tmp ) ; } else tmp = src ; emit_insn ( unpack ( dest , tmp ) ) ; } else { rtx ( * unpack ) ( rtx , rtx , rtx ) ; switch ( imode ) { case E_V16QImode : if ( high_p ) unpack = gen_vec_interleave_highv16qi ; else unpack = gen_vec_interleave_lowv16qi ; break ; case E_V8HImode : if ( high_p ) unpack = gen_vec_interleave_highv8hi ; else unpack = gen_vec_interleave_lowv8hi ; break ;


<s> rtx addr = force_reg ( Pmode , XEXP ( src , <NUM_LIT> ) ) ; emit_move_insn ( out , addr ) ; ix86_expand_strlensi_unroll_1 ( out , src , align ) ;

emit_insn ( gen_sub2_insn ( out , addr ) ) ;


<s> rtx addr = force_reg ( Pmode , XEXP ( src , <NUM_LIT> ) ) ; emit_move_insn ( out , addr ) ; ix86_expand_strlensi_unroll_1 ( out , src , align ) ; emit_insn ( gen_sub2_insn ( out , addr ) ) ; return true ; }


<s> align_rtx = expand_binop ( Pmode , and_optab , scratch1 , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; emit_cmp_and_jump_insns ( align_rtx , const0_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_4_label ) ; emit_cmp_and_jump_insns ( align_rtx , const2_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_2_label ) ; emit_cmp_and_jump_insns ( align_rtx , const2_rtx , GTU , NULL , Pmode , <NUM_LIT> , align_3_label ) ; } else { align_rtx = expand_binop ( Pmode , and_optab , scratch1 , const2_rtx , NULL_RTX , <NUM_LIT> , OPTAB_WIDEN ) ; emit_cmp_and_jump_insns ( align_rtx , const0_rtx , EQ , NULL , Pmode , <NUM_LIT> , align_4_label ) ; } mem = change_address ( src , QImode , out ) ; emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( gen_add2_insn ( out , const1_rtx ) ) ; if ( align != <NUM_LIT> ) { emit_label ( align_2_label ) ; emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( gen_add2_insn ( out , const1_rtx ) ) ; emit_label ( align_3_label ) ; } emit_cmp_and_jump_insns ( mem , const0_rtx , EQ , NULL , QImode , <NUM_LIT> , end_0_label ) ; emit_insn ( gen_add2_insn ( out , const1_rtx ) ) ; } emit_label ( align_4_label ) ; mem = change_address ( src , SImode , out ) ; emit_move_insn ( scratch , mem ) ; emit_insn ( gen_add2_insn ( out , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_addsi3 ( tmpreg , scratch , GEN_INT ( - <NUM_LIT> ) ) ) ; emit_insn ( gen_one_cmplsi2 ( scratch , scratch ) ) ; emit_insn ( gen_andsi3 ( tmpreg , tmpreg , scratch ) ) ; emit_insn ( gen_andsi3 ( tmpreg , tmpreg , gen_int_mode ( <NUM_LIT> , SImode ) ) ) ;

emit_cmp_and_jump_insns ( tmpreg , const0_rtx , EQ , <NUM_LIT> , SImode , <NUM_LIT> , align_4_label ) ;


<s> emit_cmp_and_jump_insns ( tmpreg , const0_rtx , EQ , <NUM_LIT> , SImode , <NUM_LIT> , align_4_label ) ; if ( TARGET_CMOVE ) { rtx reg = gen_reg_rtx ( SImode ) ; rtx reg2 = gen_reg_rtx ( Pmode ) ; emit_move_insn ( reg , tmpreg ) ; emit_insn ( gen_lshrsi3 ( reg , reg , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_testsi_ccno_1 ( tmpreg , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; tmp = gen_rtx_EQ ( VOIDmode , tmp , const0_rtx ) ; emit_insn ( gen_rtx_SET ( tmpreg , gen_rtx_IF_THEN_ELSE ( SImode , tmp , reg , tmpreg ) ) ) ; emit_insn ( gen_rtx_SET ( reg2 , plus_constant ( Pmode , out , <NUM_LIT> ) ) ) ; tmp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; tmp = gen_rtx_EQ ( VOIDmode , tmp , const0_rtx ) ; emit_insn ( gen_rtx_SET ( out , gen_rtx_IF_THEN_ELSE ( Pmode , tmp , reg2 , out ) ) ) ; } else { rtx_code_label * end_2_label = gen_label_rtx ( ) ; emit_insn ( gen_testsi_ccno_1 ( tmpreg , GEN_INT ( <NUM_LIT> ) ) ) ; tmp = gen_rtx_REG ( CCNOmode , FLAGS_REG ) ; tmp = gen_rtx_NE ( VOIDmode , tmp , const0_rtx ) ; tmp = gen_rtx_IF_THEN_ELSE ( VOIDmode , tmp , gen_rtx_LABEL_REF ( VOIDmode , end_2_label ) , pc_rtx ) ; tmp = emit_jump_insn ( gen_rtx_SET ( pc_rtx , tmp ) ) ; JUMP_LABEL ( tmp ) = end_2_label ; emit_insn ( gen_lshrsi3 ( tmpreg , tmpreg , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_add2_insn ( out , const2_rtx ) ) ;


<s> rtx hi = gen_highpart ( DImode , x ) ; rtx tmp = gen_reg_rtx ( V2DImode ) ;

emit_insn ( gen_vec_concatv2di ( tmp , lo , hi ) ) ;


<s> rtx tmp = gen_reg_rtx ( V2DImode ) ; emit_insn ( gen_vec_concatv2di ( tmp , lo , hi ) ) ;

return force_reg ( V1TImode , gen_lowpart ( V1TImode , tmp ) ) ;


<s> expand_float ( xa , xi , <NUM_LIT> ) ; if ( HONOR_SIGNED_ZEROS ( mode ) ) ix86_sse_copysign_to_positive ( xa , xa , res , mask ) ; emit_move_insn ( res , xa ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ;


<s> if ( HONOR_SIGNED_ZEROS ( mode ) ) ix86_sse_copysign_to_positive ( xa , xa , res , mask ) ; emit_move_insn ( res , xa ) ; emit_label ( label ) ; LABEL_NUSES ( label ) = <NUM_LIT> ; emit_move_insn ( operand0 , res ) ;


<s> rtx xa , xa2 , TWO52 , tmp , one , res , mask ; rtx_code_label * label ; TWO52 = ix86_gen_TWO52 ( mode ) ; res = copy_to_reg ( operand1 ) ; xa = ix86_expand_sse_fabs ( res , & mask ) ; label = ix86_expand_sse_compare_and_jump ( UNLE , TWO52 , xa , false ) ; xa2 = expand_simple_binop ( mode , PLUS , xa , TWO52 , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; xa2 = expand_simple_binop ( mode , MINUS , xa2 , TWO52 , xa2 , <NUM_LIT> , OPTAB_DIRECT ) ; one = force_reg ( mode , const_double_from_real_value ( dconst1 , mode ) ) ; tmp = ix86_expand_sse_compare_mask ( UNGT , xa2 , xa , false ) ; emit_insn ( gen_rtx_SET ( tmp , gen_rtx_AND ( mode , one , tmp ) ) ) ; tmp = expand_simple_binop ( mode , MINUS , xa2 , tmp , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; if ( HONOR_SIGNED_ZEROS ( mode ) && flag_rounding_math ) tmp = ix86_expand_sse_fabs ( tmp , NULL ) ;

ix86_sse_copysign_to_positive ( res , tmp , res , mask ) ;


<s> op = gen_rtx_SET ( dst , gen_rtx_fmt_e ( code , mode , src ) ) ; if ( code == NOT ) emit_insn ( op ) ; else { clob = gen_rtx_CLOBBER ( VOIDmode , gen_rtx_REG ( CCmode , FLAGS_REG ) ) ; emit_insn ( gen_rtx_PARALLEL ( VOIDmode , gen_rtvec ( <NUM_LIT> , op , clob ) ) ) ; }

if ( dst != operands [ <NUM_LIT> ] ) emit_move_insn ( operands [ <NUM_LIT> ] , dst ) ;


<s> if ( rtx_equal_p ( dst , src ) ) matching_memory = true ; else dst = gen_reg_rtx ( mode ) ; } if ( MEM_P ( src ) && ! matching_memory ) src = force_reg ( mode , src ) ; op = gen_rtx_SET ( dst , gen_rtx_fmt_e ( code , mode , src ) ) ;


<s> rtx pat ; tree arg0 = CALL_EXPR_ARG ( exp , <NUM_LIT> ) ; rtx op1 , op0 = expand_normal ( arg0 ) ; machine_mode tmode = insn_data [ icode ] . operand [ <NUM_LIT> ] . mode ; machine_mode mode0 = insn_data [ icode ] . operand [ <NUM_LIT> ] . mode ; if ( optimize || ! target || GET_MODE ( target ) != tmode || ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( target , tmode ) ) target = gen_reg_rtx ( tmode ) ; if ( VECTOR_MODE_P ( mode0 ) ) op0 = safe_vector_operand ( op0 , mode0 ) ; if ( ( optimize && ! register_operand ( op0 , mode0 ) ) || ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( op0 , mode0 ) ) op0 = copy_to_mode_reg ( mode0 , op0 ) ; op1 = op0 ; if ( ! insn_data [ icode ] . operand [ <NUM_LIT> ] . predicate ( op1 , mode0 ) ) op1 = copy_to_mode_reg ( mode0 , op1 ) ; pat = GEN_FCN ( icode ) ( target , op0 , op1 ) ;


<s> emit_insn ( gen_sse2_lshrv1ti3 ( tmp2 , op1 , GEN_INT ( <NUM_LIT> - bits ) ) ) ; emit_insn ( gen_iorv1ti3 ( tmp3 , tmp1 , tmp2 ) ) ; emit_move_insn ( operands [ <NUM_LIT> ] , tmp3 ) ; return ; } rtx op1_v4si = force_reg ( V4SImode , gen_lowpart ( V4SImode , op1 ) ) ; rtx lobits ; rtx hibits ; switch ( bits >> <NUM_LIT> ) { case <NUM_LIT> : lobits = op1_v4si ; hibits = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_sse2_pshufd ( hibits , op1_v4si , GEN_INT ( <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : lobits = gen_reg_rtx ( V4SImode ) ; hibits = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_sse2_pshufd ( lobits , op1_v4si , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_sse2_pshufd ( hibits , op1_v4si , GEN_INT ( <NUM_LIT> ) ) ) ; break ; case <NUM_LIT> : lobits = gen_reg_rtx ( V4SImode ) ; hibits = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_sse2_pshufd ( lobits , op1_v4si , GEN_INT ( <NUM_LIT> ) ) ) ; emit_insn ( gen_sse2_pshufd ( hibits , op1_v4si , GEN_INT ( <NUM_LIT> ) ) ) ; break ; default : lobits = gen_reg_rtx ( V4SImode ) ;


<s> emit_insn ( shift ( tmp2 , tmp1 , operands [ <NUM_LIT> ] ) ) ; rtx tmp3 = ix86_expand_ti_to_v1ti ( tmp2 ) ; emit_move_insn ( operands [ <NUM_LIT> ] , tmp3 ) ; return ; } HOST_WIDE_INT bits = INTVAL ( operands [ <NUM_LIT> ] ) & <NUM_LIT> ; if ( bits == <NUM_LIT> ) { emit_move_insn ( operands [ <NUM_LIT> ] , op1 ) ; return ; } if ( ( bits & <NUM_LIT> ) == <NUM_LIT> ) { rtx tmp = gen_reg_rtx ( V1TImode ) ; if ( code == ASHIFT ) emit_insn ( gen_sse2_ashlv1ti3 ( tmp , op1 , GEN_INT ( bits ) ) ) ; else emit_insn ( gen_sse2_lshrv1ti3 ( tmp , op1 , GEN_INT ( bits ) ) ) ; emit_move_insn ( operands [ <NUM_LIT> ] , tmp ) ; return ; } rtx tmp1 = gen_reg_rtx ( V1TImode ) ; if ( code == ASHIFT ) emit_insn ( gen_sse2_ashlv1ti3 ( tmp1 , op1 , GEN_INT ( <NUM_LIT> ) ) ) ; else emit_insn ( gen_sse2_lshrv1ti3 ( tmp1 , op1 , GEN_INT ( <NUM_LIT> ) ) ) ;


<s> if ( code == ASHIFT ) emit_insn ( gen_ashlv2di3 ( tmp3 , tmp2 , GEN_INT ( bits - <NUM_LIT> ) ) ) ; else emit_insn ( gen_lshrv2di3 ( tmp3 , tmp2 , GEN_INT ( bits - <NUM_LIT> ) ) ) ; } else { rtx tmp4 = force_reg ( V2DImode , gen_lowpart ( V2DImode , op1 ) ) ; rtx tmp5 = gen_reg_rtx ( V2DImode ) ; if ( code == ASHIFT ) emit_insn ( gen_ashlv2di3 ( tmp5 , tmp4 , GEN_INT ( bits ) ) ) ; else emit_insn ( gen_lshrv2di3 ( tmp5 , tmp4 , GEN_INT ( bits ) ) ) ; rtx tmp6 = gen_reg_rtx ( V2DImode ) ; if ( code == ASHIFT ) emit_insn ( gen_lshrv2di3 ( tmp6 , tmp2 , GEN_INT ( <NUM_LIT> - bits ) ) ) ; else emit_insn ( gen_ashlv2di3 ( tmp6 , tmp2 , GEN_INT ( <NUM_LIT> - bits ) ) ) ; emit_insn ( gen_iorv2di3 ( tmp3 , tmp5 , tmp6 ) ) ;


<s> rtx result = gen_reg_rtx ( TImode ) ; if ( TARGET_SSE2 ) { rtx temp = force_reg ( V2DImode , gen_lowpart ( V2DImode , x ) ) ; rtx lo = gen_lowpart ( DImode , result ) ; emit_insn ( gen_vec_extractv2didi ( lo , temp , const0_rtx ) ) ; rtx hi = gen_highpart ( DImode , result ) ; emit_insn ( gen_vec_extractv2didi ( hi , temp , const1_rtx ) ) ; }

else emit_move_insn ( result , gen_lowpart ( TImode , x ) ) ;


<s> switch ( qimode ) { case E_V16QImode : himode = V8HImode ; gen_il = gen_vec_interleave_lowv16qi ; gen_ih = gen_vec_interleave_highv16qi ; break ; case E_V32QImode : himode = V16HImode ; gen_il = gen_avx2_interleave_lowv32qi ; gen_ih = gen_avx2_interleave_highv32qi ; break ; case E_V64QImode : himode = V32HImode ; gen_il = gen_avx512bw_interleave_lowv64qi ; gen_ih = gen_avx512bw_interleave_highv64qi ; break ; default : gcc_unreachable ( ) ; } switch ( code ) { case MULT : op2_l = gen_reg_rtx ( qimode ) ; op2_h = gen_reg_rtx ( qimode ) ; emit_insn ( gen_il ( op2_l , op2 , op2 ) ) ; emit_insn ( gen_ih ( op2_h , op2 , op2 ) ) ; op1_l = gen_reg_rtx ( qimode ) ; op1_h = gen_reg_rtx ( qimode ) ; emit_insn ( gen_il ( op1_l , op1 , op1 ) ) ; emit_insn ( gen_ih ( op1_h , op1 , op1 ) ) ; full_interleave = qimode == V16QImode ; break ; case ASHIFT : case LSHIFTRT : uns_p = true ; case ASHIFTRT : op1_l = gen_reg_rtx ( himode ) ; op1_h = gen_reg_rtx ( himode ) ; ix86_expand_sse_unpack ( op1_l , op1 , uns_p , false ) ; ix86_expand_sse_unpack ( op1_h , op1 , uns_p , true ) ; if ( GET_MODE_CLASS ( GET_MODE ( op2 ) ) == MODE_VECTOR_INT ) {


<s> if ( ( qimode == V8QImode || qimode == V16QImode ) && ! TARGET_AVX512VL ) return false ; if ( qimode == V32QImode && ( TARGET_PREFER_AVX128 || TARGET_PREFER_AVX256 ) ) return false ; switch ( qimode ) { case E_V8QImode : himode = V8HImode ; gen_extend = uns_p ? gen_zero_extendv8qiv8hi2 : gen_extendv8qiv8hi2 ; gen_truncate = gen_truncv8hiv8qi2 ; break ; case E_V16QImode : himode = V16HImode ; gen_extend = uns_p ? gen_zero_extendv16qiv16hi2 : gen_extendv16qiv16hi2 ; gen_truncate = gen_truncv16hiv16qi2 ; break ; case E_V32QImode : himode = V32HImode ; gen_extend = uns_p ? gen_zero_extendv32qiv32hi2 : gen_extendv32qiv32hi2 ; gen_truncate = gen_truncv32hiv32qi2 ; break ; default : gcc_unreachable ( ) ; } hop1 = gen_reg_rtx ( himode ) ; hop2 = gen_reg_rtx ( himode ) ; hdest = gen_reg_rtx ( himode ) ; emit_insn ( gen_extend ( hop1 , op1 ) ) ; emit_insn ( gen_extend ( hop2 , op2 ) ) ; emit_insn ( gen_rtx_SET ( hdest , simplify_gen_binary ( code , himode , hop1 , hop2 ) ) ) ; emit_insn ( gen_truncate ( dest , hdest ) ) ; return true ;


<s> bool uns_p = ( code == ASHIFTRT ) ? false : true ; if ( qimode == E_V64QImode ) return false ; if ( ! TARGET_AVX512BW ) return false ; if ( ( qimode == V8QImode || qimode == V16QImode ) && ! TARGET_AVX512VL ) return false ; if ( qimode == V32QImode && ( TARGET_PREFER_AVX128 || TARGET_PREFER_AVX256 ) ) return false ; switch ( qimode ) { case E_V8QImode : himode = V8HImode ; gen_extend = uns_p ? gen_zero_extendv8qiv8hi2 : gen_extendv8qiv8hi2 ; gen_truncate = gen_truncv8hiv8qi2 ; break ; case E_V16QImode : himode = V16HImode ; gen_extend = uns_p ? gen_zero_extendv16qiv16hi2 : gen_extendv16qiv16hi2 ; gen_truncate = gen_truncv16hiv16qi2 ; break ;


<s> tmp [ <NUM_LIT> ] = force_reg ( fltmode , ix86_build_const_vector ( fltmode , <NUM_LIT> , tmp [ <NUM_LIT> ] ) ) ; if ( TARGET_FMA ) { tmp [ <NUM_LIT> ] = gen_rtx_FMA ( fltmode , tmp [ <NUM_LIT> ] , tmp [ <NUM_LIT> ] , tmp [ <NUM_LIT> ] ) ; emit_move_insn ( target , tmp [ <NUM_LIT> ] ) ; } else { tmp [ <NUM_LIT> ] = expand_simple_binop ( fltmode , MULT , tmp [ <NUM_LIT> ] , tmp [ <NUM_LIT> ] , NULL_RTX , <NUM_LIT> , OPTAB_DIRECT ) ; tmp [ <NUM_LIT> ] = expand_simple_binop ( fltmode , PLUS , tmp [ <NUM_LIT> ] , tmp [ <NUM_LIT> ] , target , <NUM_LIT> , OPTAB_DIRECT ) ;

if ( tmp [ <NUM_LIT> ] != target ) emit_move_insn ( target , tmp [ <NUM_LIT> ] ) ;


<s> rtx ops [ <NUM_LIT> ] = { XVECEXP ( vals , <NUM_LIT> , <NUM_LIT> ) , XVECEXP ( vals , <NUM_LIT> , <NUM_LIT> ) } ; if ( inner_mode == QImode || inner_mode == HImode || inner_mode == TImode || inner_mode == HFmode ) { unsigned int n_bits = n_elts * GET_MODE_SIZE ( inner_mode ) ; scalar_mode elt_mode = inner_mode == TImode ? DImode : SImode ; n_bits /= GET_MODE_SIZE ( elt_mode ) ; mode = mode_for_vector ( elt_mode , n_bits ) . require ( ) ; inner_mode = mode_for_vector ( elt_mode , n_bits / <NUM_LIT> ) . require ( ) ; ops [ <NUM_LIT> ] = gen_lowpart ( inner_mode , ops [ <NUM_LIT> ] ) ; ops [ <NUM_LIT> ] = gen_lowpart ( inner_mode , ops [ <NUM_LIT> ] ) ; subtarget = gen_reg_rtx ( mode ) ; } ix86_expand_vector_init_concat ( mode , subtarget , ops , <NUM_LIT> ) ; if ( subtarget != target ) emit_move_insn ( target , gen_lowpart ( GET_MODE ( target ) , subtarget ) ) ; return ; } gcc_unreachable ( ) ; } for ( i = <NUM_LIT> ; i < n_elts ; ++ i ) { x = XVECEXP ( vals , <NUM_LIT> , i ) ; if ( ! ( CONST_SCALAR_INT_P ( x ) || CONST_DOUBLE_P ( x ) || CONST_FIXED_P ( x ) ) ) n_var ++ , one_var = i ; else if ( x != CONST0_RTX ( inner_mode ) ) all_const_zero = false ; if ( i > <NUM_LIT> && ! rtx_equal_p ( x , XVECEXP ( vals , <NUM_LIT> , <NUM_LIT> ) ) ) all_same = false ; } if ( n_var == <NUM_LIT> ) { emit_move_insn ( target , gen_rtx_CONST_VECTOR ( mode , XVEC ( vals , <NUM_LIT> ) ) ) ; return ; } if ( all_same && ix86_expand_vector_init_duplicate ( mmx_ok , mode , target , XVECEXP ( vals , <NUM_LIT> , <NUM_LIT> ) ) ) return ; if ( n_var == <NUM_LIT> ) { if ( all_const_zero && ix86_expand_vector_init_one_nonzero ( mmx_ok , mode , target , XVECEXP ( vals , <NUM_LIT> , one_var ) , one_var ) ) return ; if ( ix86_expand_vector_init_one_var ( mmx_ok , mode , target , vals , one_var ) ) return ; } ix86_expand_vector_init_general ( mmx_ok , mode , target , vals ) ;


<s> half_mode = V2SFmode ; break ; case E_V2DImode : half_mode = DImode ; break ; case E_V2SImode : half_mode = SImode ; break ; case E_V2DFmode : half_mode = DFmode ; break ; case E_V2SFmode : half_mode = SFmode ; break ; default : gcc_unreachable ( ) ; } if ( ! register_operand ( ops [ <NUM_LIT> ] , half_mode ) ) ops [ <NUM_LIT> ] = force_reg ( half_mode , ops [ <NUM_LIT> ] ) ; if ( ! register_operand ( ops [ <NUM_LIT> ] , half_mode ) ) ops [ <NUM_LIT> ] = force_reg ( half_mode , ops [ <NUM_LIT> ] ) ; emit_insn ( gen_rtx_SET ( target , gen_rtx_VEC_CONCAT ( mode , ops [ <NUM_LIT> ] , ops [ <NUM_LIT> ] ) ) ) ; break ; case <NUM_LIT> : switch ( mode ) { case E_V4DImode : half_mode = V2DImode ; break ; case E_V4DFmode : half_mode = V2DFmode ; break ; case E_V4SImode : half_mode = V2SImode ; break ; case E_V4SFmode : half_mode = V2SFmode ; break ; default : gcc_unreachable ( ) ; } goto half ; case <NUM_LIT> : switch ( mode ) { case E_V8DImode : half_mode = V4DImode ; break ; case E_V8DFmode : half_mode = V4DFmode ;


<s> tmp2 = gen_reg_rtx ( mode ) ; emit_insn ( gen_vec_setv8hf_0 ( tmp2 , CONST0_RTX ( mode ) , tmp1 ) ) ; tmp1 = gen_lowpart ( mode , tmp2 ) ; } else { tmp1 = gen_reg_rtx ( SImode ) ; emit_move_insn ( tmp1 , gen_lowpart ( SImode , val ) ) ; tmp2 = gen_reg_rtx ( V4SImode ) ; emit_insn ( gen_vec_setv4si_0 ( tmp2 , CONST0_RTX ( V4SImode ) , tmp1 ) ) ; tmp1 = gen_lowpart ( mode , tmp2 ) ; } emit_move_insn ( dperm . op0 , tmp1 ) ; ok = ( expand_vec_perm_1 ( & dperm ) || expand_vec_perm_broadcast_1 ( & dperm ) ) ; gcc_assert ( ok ) ; return ok ; } goto widen ; case E_V16QImode : if ( TARGET_AVX2 ) return ix86_vector_duplicate_value ( mode , target , val ) ; if ( TARGET_SSE2 ) goto permute ; goto widen ; widen : { machine_mode smode , wsmode , wvmode ; rtx x ; smode = GET_MODE_INNER ( mode ) ; wvmode = get_mode_wider_vector ( mode ) ; wsmode = GET_MODE_INNER ( wvmode ) ; val = convert_modes ( wsmode , smode , val , true ) ; if ( smode == QImode && ! TARGET_PARTIAL_REG_STALL ) emit_insn ( gen_insv_1 ( wsmode , val , val ) ) ; else { x = expand_simple_binop ( wsmode , ASHIFT , val , GEN_INT ( GET_MODE_BITSIZE ( smode ) ) , NULL_RTX , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; val = expand_simple_binop ( wsmode , IOR , val , x , x , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; } x = gen_reg_rtx ( wvmode ) ; ok = ix86_expand_vector_init_duplicate ( mmx_ok , wvmode , x , val ) ; gcc_assert ( ok ) ; emit_move_insn ( target , gen_lowpart ( GET_MODE ( target ) , x ) ) ; return ok ; } case E_V16HImode : case E_V16HFmode :


<s> op0 = gen_reg_rtx ( mode ) ; emit_move_insn ( op0 , gen_lowpart ( mode , op1 ) ) ; emit_insn ( gen_load_even ( op0 , force_reg ( inner_mode , ops [ i + i + <NUM_LIT> ] ) , const1_rtx ) ) ; } ops [ i ] = gen_reg_rtx ( first_imode ) ; emit_move_insn ( ops [ i ] , gen_lowpart ( first_imode , op0 ) ) ; } for ( i = j = <NUM_LIT> ; i < n ; i += <NUM_LIT> , j ++ ) { op0 = gen_reg_rtx ( first_imode ) ; emit_insn ( gen_interleave_first_low ( op0 , ops [ i ] , ops [ i + <NUM_LIT> ] ) ) ; ops [ j ] = gen_reg_rtx ( second_imode ) ; emit_move_insn ( ops [ j ] , gen_lowpart ( second_imode , op0 ) ) ; } switch ( second_imode ) { case E_V4SImode : for ( i = j = <NUM_LIT> ; i < n / <NUM_LIT> ; i += <NUM_LIT> , j ++ ) { op0 = gen_reg_rtx ( second_imode ) ; emit_insn ( gen_interleave_second_low ( op0 , ops [ i ] , ops [ i + <NUM_LIT> ] ) ) ; ops [ j ] = gen_reg_rtx ( third_imode ) ; emit_move_insn ( ops [ j ] , gen_lowpart ( third_imode , op0 ) ) ; } second_imode = V2DImode ; gen_interleave_second_low = gen_vec_interleave_lowv2di ; case E_V2DImode : op0 = gen_reg_rtx ( second_imode ) ; emit_insn ( gen_interleave_second_low ( op0 , ops [ <NUM_LIT> ] , ops [ <NUM_LIT> ] ) ) ; emit_insn ( gen_rtx_SET ( target , gen_lowpart ( mode , op0 ) ) ) ; break ; default : gcc_unreachable ( ) ; }


<s> rtx even , odd ; op0 = gen_reg_rtx ( V8HFmode ) ; even = lowpart_subreg ( V8HFmode , force_reg ( HFmode , op ) , HFmode ) ; odd = lowpart_subreg ( V8HFmode , force_reg ( HFmode , ops [ i + i + <NUM_LIT> ] ) , HFmode ) ; emit_insn ( gen_load_even ( op0 , even , odd ) ) ; } else { op0 = gen_reg_rtx ( SImode ) ; emit_move_insn ( op0 , gen_lowpart ( SImode , op ) ) ; op1 = gen_reg_rtx ( V4SImode ) ; op0 = gen_rtx_VEC_MERGE ( V4SImode , gen_rtx_VEC_DUPLICATE ( V4SImode , op0 ) , CONST0_RTX ( V4SImode ) , const1_rtx ) ; emit_insn ( gen_rtx_SET ( op1 , op0 ) ) ; op0 = gen_reg_rtx ( mode ) ; emit_move_insn ( op0 , gen_lowpart ( mode , op1 ) ) ; emit_insn ( gen_load_even ( op0 , force_reg ( inner_mode , ops [ i + i + <NUM_LIT> ] ) , const1_rtx ) ) ; } ops [ i ] = gen_reg_rtx ( first_imode ) ; emit_move_insn ( ops [ i ] , gen_lowpart ( first_imode , op0 ) ) ; }

for ( i = j = <NUM_LIT> ; i < n ; i += <NUM_LIT> , j ++ ) {


<s> use_vector_set = TARGET_AVX ; gen_vec_set_0 = gen_vec_setv8si_0 ; break ; case E_V8SFmode : use_vector_set = TARGET_AVX ; gen_vec_set_0 = gen_vec_setv8sf_0 ; break ; case E_V4DFmode : use_vector_set = TARGET_AVX ; gen_vec_set_0 = gen_vec_setv4df_0 ; break ; case E_V4DImode : use_vector_set = TARGET_AVX && TARGET_64BIT ; gen_vec_set_0 = gen_vec_setv4di_0 ; break ; case E_V16SImode : use_vector_set = TARGET_AVX512F && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv16si_0 ; break ; case E_V16SFmode : use_vector_set = TARGET_AVX512F && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv16sf_0 ; break ; case E_V8DFmode : use_vector_set = TARGET_AVX512F && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv8df_0 ; break ; case E_V8DImode : use_vector_set = TARGET_AVX512F && TARGET_64BIT && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv8di_0 ; break ; case E_V8HFmode : use_vector_set = TARGET_AVX512FP16 && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv8hf_0 ; break ; case E_V16HFmode : use_vector_set = TARGET_AVX512FP16 && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv16hf_0 ; break ; case E_V32HFmode : use_vector_set = TARGET_AVX512FP16 && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv32hf_0 ; break ; case E_V32HImode : use_vector_set = TARGET_AVX512FP16 && one_var == <NUM_LIT> ; gen_vec_set_0 = gen_vec_setv32hi_0 ; default : break ; } if ( use_vector_set ) { if ( gen_vec_set_0 && one_var == <NUM_LIT> ) { var = force_reg ( GET_MODE_INNER ( mode ) , var ) ; emit_insn ( gen_vec_set_0 ( target , CONST0_RTX ( mode ) , var ) ) ; return true ; } emit_insn ( gen_rtx_SET ( target , CONST0_RTX ( mode ) ) ) ; var = force_reg ( GET_MODE_INNER ( mode ) , var ) ; ix86_expand_vector_set ( mmx_ok , target , var , one_var ) ; return true ; } switch ( mode ) { case E_V2SFmode : case E_V2SImode : if ( ! mmx_ok ) return false ; case E_V2DFmode : case E_V2DImode : if ( one_var != <NUM_LIT> ) return false ; var = force_reg ( GET_MODE_INNER ( mode ) , var ) ; x = gen_rtx_VEC_CONCAT ( mode , var , CONST0_RTX ( GET_MODE_INNER ( mode ) ) ) ; emit_insn ( gen_rtx_SET ( target , x ) ) ;


<s> case E_V4QImode : if ( TARGET_SSE4_1 ) break ; wmode = V2HImode ; widen : x = XVECEXP ( vals , <NUM_LIT> , one_var ^ <NUM_LIT> ) ; if ( one_var & <NUM_LIT> ) { var = convert_modes ( HImode , QImode , var , true ) ; var = expand_simple_binop ( HImode , ASHIFT , var , GEN_INT ( <NUM_LIT> ) , NULL_RTX , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; x = GEN_INT ( INTVAL ( x ) & <NUM_LIT> ) ; } else { var = convert_modes ( HImode , QImode , var , true ) ; x = gen_int_mode ( UINTVAL ( x ) << <NUM_LIT> , HImode ) ; } if ( x != const0_rtx ) var = expand_simple_binop ( HImode , IOR , var , x , var , <NUM_LIT> , OPTAB_LIB_WIDEN ) ; x = gen_reg_rtx ( wmode ) ; emit_move_insn ( x , gen_lowpart ( wmode , const_vec ) ) ; ix86_expand_vector_set ( mmx_ok , x , var , one_var >> <NUM_LIT> ) ; emit_move_insn ( target , gen_lowpart ( mode , x ) ) ; return true ; default : return false ; }


<s> case E_V2DFmode : case E_V4DFmode : case E_V8DFmode : dst = gen_reg_rtx ( GET_MODE ( SUBREG_REG ( op1 ) ) ) ; if ( GET_CODE ( op2 ) == CONST_VECTOR ) { op2 = gen_lowpart ( GET_MODE ( dst ) , op2 ) ; op2 = force_reg ( GET_MODE ( dst ) , op2 ) ; } else { op1 = operands [ <NUM_LIT> ] ; op2 = SUBREG_REG ( operands [ <NUM_LIT> ] ) ; if ( ! vector_operand ( op2 , GET_MODE ( dst ) ) ) op2 = force_reg ( GET_MODE ( dst ) , op2 ) ; } op1 = SUBREG_REG ( op1 ) ; if ( ! vector_operand ( op1 , GET_MODE ( dst ) ) ) op1 = force_reg ( GET_MODE ( dst ) , op1 ) ; emit_insn ( gen_rtx_SET ( dst , gen_rtx_fmt_ee ( code , GET_MODE ( dst ) , op1 , op2 ) ) ) ; emit_move_insn ( operands [ <NUM_LIT> ] , gen_lowpart ( mode , dst ) ) ;


<s> if ( tmp == nullptr ) op1 = validize_mem ( force_const_mem ( mode , op1 ) ) ; else op1 = tmp ; } } if ( can_create_pseudo_p ( ) && GET_MODE_SIZE ( mode ) >= <NUM_LIT> && VECTOR_MODE_P ( mode ) && ( MEM_P ( op1 ) && SYMBOL_REF_P ( XEXP ( op1 , <NUM_LIT> ) ) && CONSTANT_POOL_ADDRESS_P ( XEXP ( op1 , <NUM_LIT> ) ) ) ) { rtx first = ix86_broadcast_from_constant ( mode , op1 ) ; if ( first != nullptr ) { op1 = gen_reg_rtx ( mode ) ; if ( FLOAT_MODE_P ( mode ) || ( ! TARGET_64BIT && GET_MODE_INNER ( mode ) == DImode ) ) first = force_const_mem ( GET_MODE_INNER ( mode ) , first ) ; bool ok = ix86_expand_vector_init_duplicate ( false , mode , op1 , first ) ; gcc_assert ( ok ) ; emit_move_insn ( op0 , op1 ) ; return ; } } if ( can_create_pseudo_p ( ) && SSE_REG_MODE_P ( mode ) && ( ( MEM_P ( op0 ) && ( MEM_ALIGN ( op0 ) < align ) ) || ( MEM_P ( op1 ) && ( MEM_ALIGN ( op1 ) < align ) ) ) ) { rtx tmp [ <NUM_LIT> ] ; if ( ! register_operand ( op0 , mode ) && ! register_operand ( op1 , mode ) ) { rtx scratch = ix86_gen_scratch_sse_rtx ( mode ) ; emit_move_insn ( scratch , op1 ) ; op1 = scratch ; } tmp [ <NUM_LIT> ] = op0 ; tmp [ <NUM_LIT> ] = op1 ; ix86_expand_vector_move_misalign ( mode , tmp ) ; return ; }

if ( mode == V1TImode && SUBREG_P ( op1 ) && GET_MODE ( SUBREG_REG ( op1 ) ) == TImode && TARGET_64BIT && TARGET_SSE && can_create_pseudo_p ( ) ) {


<s> emit_insn ( gen_sse_loadlps ( t , t , m ) ) ; m = adjust_address ( op1 , V2SFmode , <NUM_LIT> ) ; emit_insn ( gen_sse_loadhps ( t , t , m ) ) ; if ( mode != V4SFmode ) emit_move_insn ( op0 , gen_lowpart ( mode , t ) ) ; } } else if ( MEM_P ( op0 ) ) { if ( TARGET_SSE2 && mode == V2DFmode ) { m = adjust_address ( op0 , DFmode , <NUM_LIT> ) ; emit_insn ( gen_sse2_storelpd ( m , op1 ) ) ; m = adjust_address ( op0 , DFmode , <NUM_LIT> ) ; emit_insn ( gen_sse2_storehpd ( m , op1 ) ) ; } else { if ( mode != V4SFmode ) op1 = gen_lowpart ( V4SFmode , op1 ) ; m = adjust_address ( op0 , V2SFmode , <NUM_LIT> ) ; emit_insn ( gen_sse_storelps ( m , op1 ) ) ; m = adjust_address ( op0 , V2SFmode , <NUM_LIT> ) ; emit_insn ( gen_sse_storehps ( m , copy_rtx ( op1 ) ) ) ; } } else gcc_unreachable ( ) ;


<s> extract_hi = gen_vec_extract_hi_v32hf ; extract_lo = gen_vec_extract_lo_v32hf ; } else { half_mode = V32QImode ; extract_hi = gen_vec_extract_hi_v64qi ; extract_lo = gen_vec_extract_lo_v64qi ; } vhi = gen_reg_rtx ( half_mode ) ; vlo = gen_reg_rtx ( half_mode ) ; idx_hi = gen_reg_rtx ( GET_MODE ( idx ) ) ; emit_insn ( extract_hi ( vhi , target ) ) ; emit_insn ( extract_lo ( vlo , target ) ) ; vec [ <NUM_LIT> ] = idx_hi ; vec [ <NUM_LIT> ] = idx ; vec [ <NUM_LIT> ] = GEN_INT ( n_elts / <NUM_LIT> ) ; ix86_expand_binary_operator ( MINUS , GET_MODE ( idx ) , vec ) ; ix86_expand_vector_set_var ( vhi , val , idx_hi ) ; ix86_expand_vector_set_var ( vlo , val , idx ) ; emit_insn ( gen_rtx_SET ( target , gen_rtx_VEC_CONCAT ( mode , vlo , vhi ) ) ) ; return ; } if ( FLOAT_MODE_P ( GET_MODE_INNER ( mode ) ) ) { switch ( mode ) { case E_V2DFmode : cmp_mode = V2DImode ; break ; case E_V4DFmode : cmp_mode = V4DImode ; break ; case E_V8DFmode : cmp_mode = V8DImode ; break ; case E_V2SFmode : cmp_mode = V2SImode ; break ; case E_V4SFmode : cmp_mode = V4SImode ; break ; case E_V8SFmode : cmp_mode = V8SImode ; break ;