<s> default : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : llvm_unreachable ( <STR_LIT> ) ; case <NUM_LIT> : * ( data + <NUM_LIT> ) = uint8_t ( Value ) ; * ( data + <NUM_LIT> ) = uint8_t ( Value >> <NUM_LIT> ) ; * ( data + <NUM_LIT> ) = uint8_t ( Value >> <NUM_LIT> ) ; * ( data + <NUM_LIT> ) = uint8_t ( Value >> <NUM_LIT> ) ; break ; case <NUM_LIT> : * ( data + <NUM_LIT> ) = uint8_t (


<s> bool <ISA_LIT>AsmBackend :: fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCInstFragment * DF , const MCAsmLayout & Layout ) const { return int64_t ( Value ) != int64_t ( int8_t ( Value


<s> return int64_t ( Value ) != int64_t ( int8_t ( Value


<s> static unsigned getFixupKindSize ( unsigned Kind ) { switch ( Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case FK_Data_1 : return <NUM_LIT> ; case FK_PCRel_2 : case FK_Data_2 : return <NUM_LIT> ; case FK_PCRel_4 : case FK_Data_4 :


<s> unsigned getPointerSize ( ) const { return <NUM_LIT>


<s> bool hasExprOrImm = false ; for ( unsigned i = <NUM_LIT> ; i < Inst . getNumOperands ( ) ; ++ i ) hasExprOrImm |= Inst . getOperand ( i ) . isExpr ( ) ; return


<s> Res . setOpcode ( getRelaxedOpcode ( Inst . getOpcode ( )


<s> Res . setOpcode ( getRelaxedOpcode ( Inst . getOpcode ( ) )


<s> if ( ( Count % <NUM_LIT> ) != <NUM_LIT> ) return false ; for ( uint64_t i = <NUM_LIT> ; i < Count ; i

+= <NUM_LIT> ) OW -> Write32 ( <NUM_LIT> ) ;


<s> if ( TheTriple . isOSDarwin ( ) ) assert ( <NUM_LIT> && <STR_LIT> ) ; if ( TheTriple . isOSWindows ( ) ) assert ( <NUM_LIT> && <STR_LIT> ) ; return new ELF<ISA_LIT>AsmBackend ( T , TheTriple .


<s> return createELFObjectWriter ( new <ISA_LIT>ELFObjectWriter ( OSType ) , OS ,


<s> MCObjectWriter * createObjectWriter ( raw_ostream & OS ) const { return createELFObjectWriter ( new <ISA_LIT>ELFObjectWriter ( OSType )


<s> case FK_Data_1 : return <NUM_LIT> ; case FK_PCRel_2 : case FK_Data_2 : return <NUM_LIT> ; case FK_PCRel_4 : case FK_Data_4 : return


<s> static unsigned getFixupKindSize ( unsigned Kind ) { switch ( Kind ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case FK_Data_1 :


<s> bool <ISA_LIT>AsmBackend :: MayNeedRelaxation ( const MCInst & Inst ) const { if ( getRelaxedOpcode ( Inst . getOpcode ( ) ) == Inst . getOpcode ( ) ) return false ; bool hasExprOrImm =


<s> for ( unsigned i = <NUM_LIT> ; i < Inst . getNumOperands ( ) ; ++ i ) hasExprOrImm |= Inst . getOperand ( i ) . isExpr ( ) ; return


<s> void <ISA_LIT>AsmBackend :: RelaxInstruction ( const MCInst & Inst , MCInst & Res ) const { Res = Inst


<s> Res = Inst ; Res . setOpcode ( getRelaxedOpcode ( Inst . getOpcode


<s> if ( ( Count % <NUM_LIT> ) != <NUM_LIT> ) return false ; for ( uint64_t i = <NUM_LIT> ; i < Count ; i += <NUM_LIT> ) OW -> Write32 ( <NUM_LIT> ) ; return true


<s> switch ( Triple ( TT ) . getOS ( ) ) { case Triple :: Darwin : assert ( <NUM_LIT> && <STR_LIT> ) ; case Triple :: MinGW32 : case Triple :: Cygwin : case Triple ::


<s> return createELFObjectWriter ( OS , false , OSType , ELF ::


<s> ELF<ISA_LIT>AsmBackend ( const Target & T , Triple :: OSType _OSType ) : <ISA_LIT>AsmBackend ( T ) , OSType ( _OSType ) { HasScatteredSymbols =


<s> ELF<ISA_LIT>AsmBackend ( const Target & T , Triple :: OSType _OSType ) : <ISA_LIT>AsmBackend (


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( const Target & T , StringRef TT ) { Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) assert ( <NUM_LIT> && <STR_LIT> ) ; if ( TheTriple . isOSWindows ( ) ) assert


<s> uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TheTriple . getOS ( ) ) ; return new ELF<ISA_LIT>AsmBackend ( T


<s> if ( TheTriple . isOSWindows ( ) ) assert ( <NUM_LIT> && <STR_LIT> ) ; return new ELF<ISA_LIT>AsmBackend ( T , TheTriple . getOS ( )


<s> const char * regName = info -> getName ( i ) ; if ( regName ) RegisterMap [ regName ]


<s> switch ( lexedToken . getKind ( ) ) { default : return AsmToken ( lexedToken ) ; case AsmToken :: Error : SetError ( Lexer -> getErrLoc ( ) , Lexer -> getErr


<s> const AsmToken & lexedToken = lexDefinite ( ) ; switch ( lexedToken . getKind ( ) ) { default : return AsmToken ( lexedToken ) ; case AsmToken :: Error : SetError ( Lexer -> getErrLoc ( ) , Lexer -> getErr ( ) ) ; return AsmToken ( lexedToken ) ; case AsmToken :: Identifier : { unsigned regID = MatchRegisterName ( lexedToken . getString ( ) . lower ( ) ) ; if ( regID ) { return AsmToken ( AsmToken :: Register , lexedToken . getString ( ) , static_cast < int64_t > ( regID ) ) ; } else { return AsmToken ( lexedToken


<s> void LLVMInitialize<ISA_LIT>AsmLexer ( )


<s> <ISA_LIT>AsmLexer ( const Target & T , const MCRegisterInfo & MRI , const MCAsmInfo

& MAI ) : <ISA_LIT>BaseAsmLexer ( T , MAI ) {


<s> <ISA_LIT>AsmLexer ( const Target & T , const MCRegisterInfo & MRI , const MCAsmInfo & MAI ) : <ISA_LIT>BaseAsmLexer ( T ,


<s> unsigned numRegs = info -> getNumRegs ( ) ; for ( unsigned i = <NUM_LIT> ; i < numRegs ; ++ i ) { const char * regName = info ->


<s> const AsmToken & lexDefinite ( ) { return getLexer ( )


<s> default : SetError ( SMLoc ( ) , <STR_LIT> ) ; return AsmToken ( AsmToken :: Error , <STR_LIT> , <NUM_LIT> ) ; case <NUM_LIT>


<s> AsmToken <STR_LIT> ( ) { const AsmToken & lexedToken = lexDefinite ( ) ; switch ( lexedToken . getKind ( ) ) { default : return AsmToken ( lexedToken ) ; case AsmToken :: Error : SetError ( Lexer -> getErrLoc ( ) , Lexer -> getErr ( ) ) ; return AsmToken ( lexedToken ) ; case AsmToken :: Identifier : { std :: string upperCase = lexedToken . getString ( ) . str ( ) ; std :: string lowerCase = LowercaseString ( upperCase ) ; StringRef lowerRef ( lowerCase ) ; unsigned regID = MatchRegisterName ( lowerRef ) ; if ( regID ) { return AsmToken ( AsmToken :: Register , lexedToken . getString ( ) , static_cast < int64_t > ( regID ) ) ; } else { return AsmToken ( lexedToken )


<s> rmap_ty :: iterator iter = RegisterMap . find ( Name . str ( ) ) ; if ( iter != RegisterMap . end ( ) ) return iter -> second ; else return <NUM_LIT>


<s> rmap_ty :: iterator iter = RegisterMap . find ( Name . str (


<s> <ISA_LIT>AsmLexer ( const Target & T , const MCAsmInfo & MAI


<s> std :: string featureString ; OwningPtr < const TargetMachine > targetMachine ( T . createTargetMachine ( tripleString , featureString ) ) ; InitRegisterMap ( targetMachine -> getRegisterInfo (


<s> case Match_MissingFeature : return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_ConversionFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) return Error ( IDLoc , <STR_LIT> ) ; ErrorLoc = ( ( <ISA_LIT>Operand * ) Operands [ ErrorInfo


<s> if ( ! ParseOperand ( Operands ) ) return true ; } if ( Name . startswith ( <STR_LIT> ) || Name . startswith ( <STR_LIT> ) || Name . startswith ( <STR_LIT> ) || Name . startswith ( <STR_LIT>

) || Name . startswith ( <STR_LIT> ) || Name . startswith ( <STR_LIT> ) ) return ( ParseMemory ( Operands ) == NULL ) ;


<s> ParseInstruction ( StringRef Name , SMLoc NameLoc , SmallVectorImpl < MCParsedAsmOperand * > & Operands ) { size_t dotLoc = Name . find ( '.' ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( Name . substr ( <NUM_LIT> , dotLoc ) , NameLoc ) ) ; if ( dotLoc < Name . size ( ) ) Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( Name . substr ( dotLoc ) , NameLoc ) ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) return false ; if ( ! ParseOperand ( Operands ) ) return true ; while ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) && getLexer ( ) .


<s> bool <ISA_LIT>AsmParser :: MatchAndEmitInstruction ( SMLoc IDLoc , SmallVectorImpl < MCParsedAsmOperand * > & Operands , MCStreamer & Out ) { MCInst Inst ; SMLoc ErrorLoc ; unsigned ErrorInfo ; switch ( MatchInstructionImpl ( Operands , Inst , ErrorInfo ) ) { default : break ; case Match_Success : Out . EmitInstruction ( Inst ) ; return


<s> void addExpr ( MCInst & Inst , const MCExpr * Expr ) const { if ( Expr == <NUM_LIT> ) Inst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; else if ( const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( Expr ) ) Inst . addOperand ( MCOperand :: CreateImm ( CE -> getValue ( ) ) ) ; else Inst . addOperand ( MCOperand :: CreateExpr


<s> void addImmOperands ( MCInst & Inst , unsigned N )


<s> if ( RegOff ) Inst . addOperand ( MCOperand :: CreateReg ( RegOff ) ) ; else addExpr ( Inst , getMemOff


<s> Inst . addOperand ( MCOperand :: CreateReg


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: CreateReg


<s> static <ISA_LIT>Operand * CreateFslImm ( const MCExpr * Val , SMLoc S , SMLoc E ) { <ISA_LIT>Operand * Op = new <ISA_LIT>Operand ( Fsl ) ; Op -> Imm . Val = Val ; Op -> StartLoc = S ; Op -> EndLoc = E ; return Op


<s> static <ISA_LIT>Operand * CreateImm ( const MCExpr * Val , SMLoc S , SMLoc E ) { <ISA_LIT>Operand * Op = new <ISA_LIT>Operand


<s> <ISA_LIT>Operand * Op = new <ISA_LIT>Operand ( Memory ) ; Op -> Mem . Base = Base ; Op -> Mem . OffReg = Off ; Op -> Mem . Off = <NUM_LIT> ; Op -> StartLoc = S ; Op -> EndLoc =


<s> Op -> Tok . Data = Str . data ( ) ; Op -> Tok . Length = Str . size ( ) ; Op -> StartLoc =


<s> Op -> Tok . Data = Str . data ( ) ; Op -> Tok . Length = Str . size ( ) ; Op -> StartLoc


<s> bool Error ( SMLoc L , const Twine & Msg ) { return Parser . Error (


<s> assert ( Kind == Fsl && <STR_LIT> ) ; return FslImm .


<s> assert ( Kind == Immediate && <STR_LIT> ) ; return Imm .


<s> assert ( Kind == Memory && <STR_LIT> ) ; return Mem .


<s> const MCExpr * getMemOff ( ) const { assert ( Kind == Memory && <STR_LIT> ) ; return Mem .


<s> assert ( Kind == Memory && <STR_LIT>


<s> unsigned getMemOffReg ( ) const { assert ( Kind == Memory && <STR_LIT> ) ; return Mem


<s> unsigned getReg ( ) const { assert ( Kind == Register && <STR_LIT> ) ; return Reg .


<s> switch ( MatchInstructionImpl ( Operands , Inst , ErrorInfo , MatchingInlineAsm ) ) { default : break ; case Match_Success : Out . EmitInstruction ( Inst ) ; return false ; case Match_MissingFeature : return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) return Error ( IDLoc , <STR_LIT> ) ; ErrorLoc = ( ( <ISA_LIT>Operand * ) Operands [ ErrorInfo ] ) -> getStartLoc ( ) ; if ( ErrorLoc == SMLoc ( ) ) ErrorLoc = IDLoc ; } return Error ( ErrorLoc , <STR_LIT> ) ; } } llvm_unreachable ( <STR_LIT>


<s> if ( ! String . startswith ( <STR_LIT> ) ) return - <NUM_LIT> ; unsigned regNum ; if ( String . substr ( <NUM_LIT> ) . getAsInteger ( <NUM_LIT> , regNum ) ) return - <NUM_LIT> ; return


<s> case Immediate : Imm = o . Imm ; break ; case Token : Tok = o . Tok ; break ; case Memory : Mem = o . Mem ; break ; case Fsl


<s> bool <ISA_LIT>AsmParser :: ParseDirective ( AsmToken DirectiveID ) { StringRef IDVal = DirectiveID . getIdentifier ( ) ; if ( IDVal == <STR_LIT> ) return ParseDirectiveWord ( <NUM_LIT> , DirectiveID . getLoc


<s> for ( ; ; ) { const MCExpr * Value ; if ( getParser ( ) . ParseExpression ( Value ) ) return true ; getParser ( ) . getStreamer ( ) . EmitValue ( Value , Size , <NUM_LIT> ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) break ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) return Error ( L


<s> default : return <NUM_LIT> ; case AsmToken :: LParen : case AsmToken :: Plus : case AsmToken :: Minus : case AsmToken :: Integer : case AsmToken :: Identifier : if ( getParser ( ) . ParseExpression ( EVal ) )


<s> size_t dotLoc = Name . find ( '.' ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( Name . substr ( <NUM_LIT> , dotLoc ) , NameLoc ) ) ; if ( dotLoc < Name . size ( ) ) Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( Name . substr ( dotLoc ) , NameLoc ) ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) return false ; if ( ! ParseOperand ( Operands ) ) return true ; while ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) && getLexer ( ) . is ( AsmToken :: Comma ) ) { getLexer ( ) . Lex ( )


<s> if ( ! Base . isReg ( ) ) { Error ( S , <STR_LIT> ) ; return <NUM_LIT> ; } if ( ! Offset . isReg ( ) && ! Offset . isImm ( ) ) { Error ( O , <STR_LIT> ) ; return <NUM_LIT> ; } <ISA_LIT>Operand * Op ; if ( Offset . isReg ( ) ) Op = <ISA_LIT>Operand :: CreateMem ( Base . getReg ( ) , Offset . getReg ( ) , S , E ) ; else Op = <ISA_LIT>Operand :: CreateMem ( Base . getReg ( ) , Offset


<s> <ISA_LIT>Operand * Op ; if ( Offset . isReg ( ) ) Op = <ISA_LIT>Operand :: CreateMem ( Base . getReg ( ) , Offset . getReg ( ) , S , E ) ; else Op = <ISA_LIT>Operand :: CreateMem ( Base . getReg ( ) , Offset . getImm ( ) , S , E ) ; delete Operands .


<s> SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ; switch ( getLexer ( ) . getKind ( ) ) { default : return <NUM_LIT> ; case AsmToken :: Identifier : RegNo = MatchRegisterName ( getLexer ( ) . getTok ( ) . getIdentifier ( ) ) ; if ( RegNo ==


<s> void Warning ( SMLoc L , const Twine & Msg ) { Parser . Warning ( L , Msg


<s> void LLVMInitialize<ISA_LIT>AsmParser ( ) { RegisterMCAsmParser < <ISA_LIT>AsmParser > X (


<s> void LLVMInitialize<ISA_LIT>AsmParser ( ) { RegisterMCAsmParser < <ISA_LIT>AsmParser > X


<s> const MCExpr * Value ; if ( getParser ( ) . parseExpression ( Value ) ) return true ; getParser ( ) . getStreamer ( ) . EmitValue ( Value , Size ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) break ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) return Error ( L , <STR_LIT> ) ; Parser . Lex (


<s> default : return <NUM_LIT> ; case AsmToken :: Identifier : unsigned reg = MatchFslRegister ( getLexer ( ) . getTok ( ) . getIdentifier ( ) ) ; if ( reg >= <NUM_LIT> ) return <NUM_LIT> ; getLexer ( ) . Lex ( ) ; const MCExpr * EVal = MCConstantExpr :: Create ( reg


<s> const MCExpr * EVal ; switch ( getLexer ( ) . getKind ( ) ) { default : return <NUM_LIT> ; case AsmToken :: LParen : case AsmToken :: Plus : case AsmToken ::


<s> <ISA_LIT>Operand * <ISA_LIT>AsmParser :: ParseImmediate ( ) { SMLoc S = Parser . getTok ( ) . getLoc ( ) ; SMLoc E = Parser . getTok ( ) . getEndLoc ( ) ; const MCExpr * EVal ; switch ( getLexer ( ) . getKind ( ) ) { default : return <NUM_LIT> ; case AsmToken ::


<s> ParseOperand ( SmallVectorImpl < MCParsedAsmOperand * > & Operands ) { <ISA_LIT>Operand * Op ; Op = ParseRegister ( ) ; if ( ! Op ) Op = ParseFsl ( ) ; if ( ! Op ) Op = ParseImmediate


<s> Op = ParseRegister ( ) ; if ( ! Op ) Op = ParseFsl ( ) ; if ( ! Op ) Op = ParseImmediate ( ) ; if ( ! Op ) { Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return <NUM_LIT> ; } Operands . push_back ( Op ) ; return Op


<s> <ISA_LIT>Operand * <ISA_LIT>AsmParser :: ParseRegister ( SMLoc & StartLoc , SMLoc & EndLoc ) { StartLoc = Parser . getTok ( ) . getLoc ( ) ; EndLoc = Parser . getTok ( ) . getEndLoc ( ) ; if ( getLexer ( ) . getKind ( ) != AsmToken :: Identifier )


<s> RegisterAsmParser < <ISA_LIT>AsmParser > X ( The<ISA_LIT>Target ) ; LLVMInitialize<ISA_LIT>AsmLexer ( )


<s> switch ( MatchInstructionImpl ( Operands , Inst , ErrorInfo ) ) { case Match_Success : Out . EmitInstruction ( Inst ) ; return false ; case Match_MissingFeature : return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) return Error ( IDLoc , <STR_LIT> ) ; ErrorLoc = ( ( <ISA_LIT>Operand * ) Operands [ ErrorInfo ] ) -> getStartLoc ( ) ; if ( ErrorLoc == SMLoc ( ) ) ErrorLoc = IDLoc ; } return Error ( ErrorLoc , <STR_LIT>


<s> if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { for ( ; ; ) { const MCExpr * Value ; if ( getParser ( ) . ParseExpression ( Value ) ) return true ; getParser ( ) . getStreamer ( ) . EmitValue ( Value , Size ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) break ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) return Error ( L , <STR_LIT> ) ; Parser . Lex ( ) ; } } Parser . Lex ( ) ; return false


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter >


<s> for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( Reg ) ; if ( <STR_LIT> -> contains ( Reg ) ) CPUBitmask |= ( <NUM_LIT> << RegNum ) ; } if ( TFI -> hasFP ( * MF )

) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo ::


<s> unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( Reg ) ; if ( <STR_LIT> -> contains ( Reg ) ) CPUBitmask |= ( <NUM_LIT> << RegNum ) ; } if ( TFI -> hasFP ( * MF ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getFrameRegister ( * MF ) ) ) ; if ( MFI -> adjustsStack ( ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getRARegister


<s> <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ; MCInst TmpInst ; MCInstLowering . Lower ( MI , TmpInst


<s> void <ISA_LIT>AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { <ISA_LIT>MCInstLower MCInstLowering ( OutContext , * this ) ; MCInst TmpInst ; MCInstLowering . Lower ( MI


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) if ( ExtraCode [ <NUM_LIT> ] != <NUM_LIT> ) return true ; switch ( ExtraCode [ <NUM_LIT> ] ) { default : return AsmPrinter :: PrintAsmOperand ( MI , OpNo , AsmVariant , ExtraCode , O ) ; } printOperand ( MI , OpNo , O ) ; return false


<s> O << <STR_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) O . write_hex ( ( Value & ( <NUM_LIT> << ( i * <NUM_LIT>


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned RegNum = get<ISA_LIT>RegisterNumbering ( Reg


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyEnd


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyStart ( ) { emitFrameDirective ( ) ; printSavedRegsBitmask (


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionEntryLabel ( ) { O << <STR_LIT> << *


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionEntryLabel ( ) { O << <STR_LIT> <<


<s> void EmitInstruction ( const MachineInstr * MI ) { printInstruction ( MI )


<s> explicit <ISA_LIT>AsmPrinter ( formatted_raw_ostream & O , TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( O , TM , Streamer ) { Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget


<s> explicit <ISA_LIT>AsmPrinter ( formatted_raw_ostream & O , TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( O , TM , Streamer ) { Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > (


<s> bool <ISA_LIT>AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode ) { if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) return true ; printOperand ( MI , OpNo ) ; return false


<s> printFCCOperand ( const MachineInstr * MI , int opNum , const


<s> void <ISA_LIT>AsmPrinter :: printFCCOperand ( const MachineInstr * MI , int opNum , const char * Modifier ) { const MachineOperand & MO = MI -> getOperand (


<s> O << <STR_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) O << utohexstr ( ( Value & ( <NUM_LIT>


<s> for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) O << utohexstr ( ( Value &


<s> printOperand ( MI , opNum + <NUM_LIT> ) ; O << <STR_LIT>


<s> printOperand ( MI , opNum + <NUM_LIT> ) ; O << <STR_LIT> ; printOperand ( MI , opNum


<s> O << * GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : O << MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : O << MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << getFunctionNumber ( ) << <STR_LIT> << MO . getIndex ( ) ; if ( MO . getOffset ( ) ) O


<s> const <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned int CPUBitmask = <NUM_LIT> ; const MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( CSI [ i ] . getReg ( ) ) ; if ( CSI [ i ] . getRegClass ( ) == <STR_LIT> ) CPUBitmask |= ( <NUM_LIT> << RegNum ) ; } if ( RI . hasFP ( * MF ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getFrameRegister ( * MF ) ) ) ; if ( MFI -> hasCalls ( ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getRARegister


<s> void <ISA_LIT>AsmPrinter :: printUnsignedImm ( const MachineInstr * MI , int opNum ) { const MachineOperand & MO = MI -> getOperand


<s> const TargetRegisterInfo & RI = * TM . getRegisterInfo ( ) ; unsigned stackReg = RI . getFrameRegister ( * MF ) ; unsigned returnReg = RI . getRARegister ( ) ; unsigned stackSize = MF -> getFrameInfo ( ) -> getStackSize ( ) ; OutStreamer . EmitRawText ( <STR_LIT> + Twine ( getRegisterName ( stackReg ) ) + <STR_LIT> + Twine ( stackSize ) + <STR_LIT> +

Twine ( getRegisterName ( returnReg ) ) ) ;


<s> void <ISA_LIT>AsmPrinter :: emitFrameDirective ( ) { const TargetRegisterInfo & RI = * TM . getRegisterInfo ( ) ; unsigned stackReg = RI . getFrameRegister ( * MF ) ; unsigned returnReg = RI . getRARegister ( ) ; unsigned stackSize = MF -> getFrameInfo (


<s> OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym


<s> SmallString < <NUM_LIT> > Str ; raw_svector_ostream OS ( Str ) ; printSavedRegsBitmask ( OS


<s> void EmitInstruction ( const MachineInstr * MI ) { SmallString < <NUM_LIT> > Str ; raw_svector_ostream OS ( Str ) ; printInstruction ( MI , OS ) ; OutStreamer . EmitRawText ( OS .


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; O << <STR_LIT> ( ( <STR_LIT> ) MO . getImm (


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . getType ( ) == MachineOperand :: MO_Immediate ) O << <STR_LIT> << (


<s> } if ( RI . hasFP ( * MF ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getFrameRegister ( * MF ) ) ) ; if ( MFI -> hasCalls ( ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getRARegister ( ) ) ) ; O << <STR_LIT> ; printHex32 ( CPUBitmask , O ) ; O << ',' << <ISA_LIT>FI -> getCPUTopSavedRegOff ( )


<s> for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( CSI [ i ] . getReg ( ) ) ; if ( CSI [ i ] . getRegClass ( ) == <STR_LIT> ) CPUBitmask |= ( <NUM_LIT> << RegNum ) ; } if ( RI . hasFP ( * MF ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getFrameRegister ( * MF


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . getType ( ) == MachineOperand :: MO_Immediate ) O << ( unsigned int ) MO . getImm ( ) ; else printOperand ( MI ,


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . getType ( ) == MachineOperand :: MO_Immediate ) O << ( unsigned int ) MO . getImm ( ) ; else printOperand ( MI , opNum , O


<s> if ( MO . isImm ( ) ) O << ( unsigned int


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . isImm ( ) ) O << ( unsigned


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , TargetMachine & TM , unsigned SyntaxVariant , const MCAsmInfo & MAI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( TM , MAI


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned RegNum = <ISA_LIT>RegisterInfo :: getRegisterNumbering ( Reg ) ; if ( <STR_LIT> -> contains ( Reg ) ) CPUBitmask |= ( <NUM_LIT> << RegNum ) ; } if ( TFI -> hasFP ( * MF ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getFrameRegister ( * MF ) ) ) ; if ( MFI -> adjustsStack ( ) ) CPUBitmask |= ( <NUM_LIT> << <ISA_LIT>RegisterInfo :: getRegisterNumbering ( RI . getRARegister ( ) ) ) ; OutStreamer . EmitRawText ( <STR_LIT> + Twine :: utohexstr


<s> case MachineOperand :: MO_MachineBasicBlock : O << * MO . getMBB ( ) -> getSymbol ( OutContext ) ; return ; case MachineOperand :: MO_GlobalAddress : O << * GetGlobalValueSymbol ( MO . getGlobal ( ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : O << * GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : O << MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : O << MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << getFunctionNumber ( ) << <STR_LIT> << MO . getIndex


<s> const TargetRegisterInfo & RI = * TM . getRegisterInfo ( ) ; unsigned stkReg = RI . getFrameRegister ( * MF ) ; unsigned retReg = RI . getRARegister ( ) ; unsigned stkSze = MF -> getFrameInfo


<s> const TargetRegisterInfo & RI = * TM . getRegisterInfo ( ) ; unsigned stkReg = RI . getFrameRegister ( * MF ) ; unsigned retReg = RI . getRARegister ( ) ; unsigned stkSze = MF -> getFrameInfo (


<s> if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym -> getName (


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyEnd ( ) { if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( <STR_LIT>

+ Twine ( CurrentFnSym -> getName ( ) ) ) ;


<s> if ( ! OutStreamer . hasRawTextSupport ( ) ) return ; emitFrameDirective ( )


<s> if ( ! OutStreamer . hasRawTextSupport ( ) )


<s> MCInstLowering . Lower ( MI , TmpInst ) ; OutStreamer . EmitInstruction (


<s> if ( MBB -> isLandingPad ( ) || MBB -> pred_empty ( ) ) return false ; MachineBasicBlock :: const_pred_iterator PI = MBB -> pred_begin ( ) , PI2 = PI ; ++ PI2 ; if ( PI2 != MBB -> pred_end ( ) ) return false ; const MachineBasicBlock * Pred = * PI ; if ( ! Pred -> isLayoutSuccessor ( MBB ) ) return false ; if ( Pred -> empty ( ) ) return true ; MachineBasicBlock :: const_iterator I = Pred -> end (


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X (


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( TM , Streamer ) { Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > (


<s> if ( ExtraCode && ExtraCode [ <NUM_LIT> ] ) return true ; printOperand ( MI , OpNo ,


<s> void <ISA_LIT>AsmPrinter :: printFSLImm ( const MachineInstr * MI , int opNum , raw_ostream & O ) { const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . isImm ( ) ) O << <STR_LIT> << ( unsigned int ) MO . getImm ( ) ; else printOperand ( MI , opNum ,


<s> static void printHex32 ( unsigned int Value , raw_ostream & O ) { O << <STR_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) O << utohexstr ( ( Value & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ) >>


<s> void <ISA_LIT>AsmPrinter :: printMemOperand ( const MachineInstr * MI , int opNum , raw_ostream & O , const


<s> const MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] .


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned RegNum = get<ISA_LIT>RegisterNumbering ( Reg


<s> const MachineOperand & MO = MI -> getOperand ( opNum ) ; if ( MO . isImm ( ) ) O << ( uint32_t ) MO .


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; default : llvm_unreachable ( <STR_LIT>


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> :


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> static inline bool isSpecial<ISA_LIT>Register ( unsigned Reg ) { switch ( Reg ) { case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : return true ; default : return false ; } return


<s> BuildMI ( MBB , J , I -> getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) ; ++ FilledSlots ; Changed = true ; } return


<s> if ( a_is_memory && m -> getDesc ( ) . mayStore ( ) ) return true ; } for ( unsigned aop = <NUM_LIT> , aend = a -> getNumOperands ( ) ; aop < aend ; ++ aop ) { if ( a -> getOperand ( aop ) . isReg ( ) ) { unsigned aop_reg = a -> getOperand ( aop ) . getReg ( ) ; for ( unsigned bop = <NUM_LIT> , bend = b -> getNumOperands ( ) ; bop < bend ; ++ bop ) { if ( b -> getOperand ( bop ) . isReg ( ) && ( ! b -> getOperand ( bop ) . isImplicit ( ) ) ) { unsigned bop_reg = b -> getOperand ( bop ) . getReg


<s> if ( I == MBB . begin ( ) ) break ; -- I ; TargetInstrDesc desc = I -> getDesc ( ) ; if ( desc . hasDelaySlot ( ) || desc . isBranch ( ) || isDelayFiller ( MBB , I ) || desc . isCall ( ) || desc . isReturn ( ) || desc . isBarrier ( ) || desc . hasUnmodeledSideEffects ( ) ) break ; if ( hasImmInstruction ( I ) || delayHasHazard ( I , slot ) ) continue ; return I ; } return MBB . end


<s> if ( desc . hasDelaySlot ( ) || desc . isBranch ( ) || isDelayFiller ( MBB , I ) || desc . isCall ( ) || desc . isReturn ( ) || desc . isBarrier ( ) || desc . hasUnmodeledSideEffects ( ) ) break ; if ( hasImmInstruction ( I ) || delayHasHazard


<s> static bool isDelayFiller ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator candidate ) { if ( candidate == MBB . begin ( ) ) return false ; TargetInstrDesc brdesc = ( -- candidate ) -> getDesc ( ) ; return ( brdesc .


<s> static bool isDelayFiller ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator candidate ) { if ( candidate == MBB . begin ( ) ) return false ; TargetInstrDesc brdesc = ( -- candidate ) -> getDesc


<s> TargetInstrDesc desc = I -> getDesc ( ) ; if ( desc . hasDelaySlot ( ) || desc . isBranch ( ) || isDelayFiller ( MBB , I ) || desc . isCall ( ) || desc . isReturn ( ) || desc . isBarrier ( ) || hasUnknownSideEffects ( I ) ) break ; if ( hasImmInstruction ( I ) || delayHasHazard ( I , slot ) ) continue ; return I ; } return MBB . end


<s> } } if ( a_is_memory && m -> getDesc ( ) . mayStore ( ) ) return true ; } for ( unsigned aop = <NUM_LIT> ; aop < aend ; ++ aop ) { if ( a -> getOperand ( aop ) . isReg ( ) ) { unsigned aop_reg = a -> getOperand ( aop ) . getReg ( ) ; for ( unsigned bop = <NUM_LIT> ; bop < bend ; ++ bop ) { if ( b -> getOperand ( bop ) . isReg ( ) && ! b -> getOperand ( bop ) . isImplicit ( ) ) { unsigned bop_reg = b -> getOperand ( bop )


<s> MachineBasicBlock :: iterator I = slot ; while ( true ) { if ( I == MBB . begin ( ) ) break ; -- I ; MCInstrDesc desc = I -> getDesc ( ) ; if ( desc . hasDelaySlot ( ) || desc . isBranch ( ) || isDelayFiller ( MBB , I ) || desc . isCall ( ) || desc . isReturn ( ) || desc . isBarrier ( ) || hasUnknownSideEffects ( I ) ) break ; if ( hasImmInstruction ( I ) || delayHasHazard ( I , slot ) ) continue ; return I


<s> if ( candidate == MBB . begin ( ) ) return false ; MCInstrDesc brdesc = ( -- candidate ) -> getDesc ( ) ; return ( brdesc . hasDelaySlot ( )


<s> MachineBasicBlock :: iterator J = I ; if ( ! MBDisableDelaySlotFiller ) D = findDelayInstr ( MBB , I ) ; ++ FilledSlots ; Changed = true ; if ( D == MBB . end ( ) ) BuildMI ( MBB , ++ J , I -> getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) ; else MBB . splice ( ++ J , & MBB , D ) ; } return Changed


<s> if ( ! MBDisableDelaySlotFiller ) D = findDelayInstr ( MBB , I ) ; ++ FilledSlots ; Changed = true ; if ( D == MBB . end ( ) ) BuildMI ( MBB , ++ J , I -> getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) ; else MBB . splice ( ++ J , & MBB


<s> FunctionPass * llvm :: create<ISA_LIT>DelaySlotFillerPass (


<s> bool a_is_memory = candidate -> mayLoad ( ) || candidate -> mayStore ( ) ; const unsigned aend = getLastRealOperand ( a ) ; const unsigned bend = getLastRealOperand ( b ) ; MachineBasicBlock :: iterator m = a ; for ( ++ m ; m != b ; ++ m ) { for ( unsigned aop = <NUM_LIT> ; aop < aend ; ++ aop ) { bool aop_is_reg = a -> getOperand ( aop ) . isReg ( ) ; if ( ! aop_is_reg ) continue ; bool aop_is_def = a -> getOperand ( aop ) . isDef ( ) ; unsigned aop_reg = a -> getOperand ( aop ) . getReg ( ) ; const unsigned mend = getLastRealOperand ( m ) ; for ( unsigned mop = <NUM_LIT> ; mop < mend ; ++ mop ) { bool mop_is_reg = m -> getOperand ( mop ) . isReg ( ) ; if ( ! mop_is_reg


<s> static MachineBasicBlock :: iterator findDelayInstr ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator slot ) { MachineBasicBlock :: iterator I = slot ; while ( true ) { if ( I == MBB . begin ( )


<s> if ( mop . isImm ( ) && ( mop . getImm ( ) < - <NUM_LIT> || mop . getImm ( ) > <NUM_LIT> ) ) return true ; if ( mop . isGlobal ( ) || mop . isSymbol ( ) || mop . isJTI ( ) || mop . isCPI ( ) ) return true ; if ( mop . isFPImm ( )


<s> unsigned numOper = candidate -> getNumOperands ( ) ; for ( unsigned op = <NUM_LIT> ; op < numOper ; ++ op ) { MachineOperand & mop = candidate -> getOperand ( op ) ; if ( mop . isImm ( ) && ( mop . getImm ( ) < - <NUM_LIT> || mop . getImm ( ) > <NUM_LIT> ) ) return true ; if ( mop . isGlobal ( ) || mop . isSymbol ( ) || mop . isJTI ( ) || mop . isCPI ( ) ) return true ; if ( mop . isFPImm ( ) ) return true ; } return false


<s> for ( MachineBasicBlock :: iterator I = MBB . begin ( ) ; I != MBB . end ( ) ; ++ I ) if ( I -> hasDelaySlot ( ) ) { MachineBasicBlock :: iterator D = MBB . end ( ) ; MachineBasicBlock :: iterator J = I ; if ( ! MBDisableDelaySlotFiller ) D = findDelayInstr ( MBB , I ) ; ++ FilledSlots ; Changed = true


<s> for ( MachineFunction :: iterator FI = F . begin ( ) , FE = F . end ( ) ; FI != FE ; ++ FI ) Changed |= runOnMachineBasicBlock ( * FI ) ; return Changed


<s> switch ( insn & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> const EDInstInfo * <ISA_LIT>Disassembler :: getEDInfo ( ) const { return instInfo<ISA_LIT>


<s> return <ISA_LIT>RegisterInfo :: getSpecialRegisterFromNumbering ( insn & <NUM_LIT>


<s> case <STR_LIT> : case <STR_LIT> : instr . addOperand ( MCOperand :: CreateImm ( insn & <NUM_LIT> ) ) ; break ; } break ; case <STR_LIT> : if ( RA == UNSUPPORTED || RB == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RA ) ) ; instr . addOperand ( MCOperand :: CreateReg ( RB ) ) ; break ; case <STR_LIT> : if ( RA == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RA ) ) ; instr . addOperand ( MCOperand :: CreateImm ( getIMM ( insn ) ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED || RB == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateReg ( RB ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateImm ( getIMM ( insn ) ) ) ; break ; case <STR_LIT> : if ( RB == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RB ) ) ; break ; case <STR_LIT> : instr . addOperand ( MCOperand :: CreateImm ( getIMM ( insn ) ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED || RA == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateReg ( RA ) ) ; instr . addOperand ( MCOperand :: CreateImm ( getSHT ( insn ) ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED || RA == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateReg ( RA ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateImm ( getFSL ( insn ) ) ) ; break ; case <STR_LIT> : if ( RD == UNSUPPORTED || RS == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RD ) ) ; instr . addOperand ( MCOperand :: CreateReg ( RS ) ) ; break ; case <STR_LIT> : if ( RS == UNSUPPORTED || RA == UNSUPPORTED ) return Fail ; instr . addOperand ( MCOperand :: CreateReg ( RS ) ) ; instr . addOperand ( MCOperand :: CreateReg (


<s> static unsigned decodeANDN ( uint32_t insn ) { switch ( getFLAGS ( insn ) ) { default : return UNSUPPORTED ; case <NUM_LIT> :


<s> switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> static unsigned decodeBR ( uint32_t insn ) { switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT>


<s> switch ( insn & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> :


<s> static unsigned decodeMFS ( uint32_t insn ) { switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; } case


<s> case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> static unsigned decodeRTSD ( uint32_t insn ) { switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return


<s> static unsigned decodeSB ( uint32_t insn ) { switch ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT>


<s> static unsigned decodeSEXT ( uint32_t insn ) { switch ( insn & <NUM_LIT> ) { default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> :


<s> static unsigned decodeSH ( uint32_t insn ) { switch ( ( insn >> <NUM_LIT>


<s> default : return UNSUPPORTED ; case <NUM_LIT> : return <STR_LIT> ; case <NUM_LIT> : return


<s> switch ( getFLAGS ( insn ) ) { default : return UNSUPPORTED ; case <NUM_LIT> :


<s> EDInstInfo * <ISA_LIT>Disassembler :: getEDInfo


<s> EDInstInfo * <ISA_LIT>Disassembler :: getEDInfo ( )


<s> static int64_t getFSL ( uint32_t insn )


<s> case <STR_LIT> : return decodeBRI ( insn ) ; case <STR_LIT> : return decodeBSRL ( insn ) ; case <STR_LIT> : return decodeBSRLI ( insn ) ; case <STR_LIT> : return decodeRSUBK ( insn ) ; case <STR_LIT> : return decodeFADD ( insn ) ; case <STR_LIT> : return decodeGET ( insn ) ; case <STR_LIT> : return decodeGETD ( insn ) ; case <STR_LIT> : return decodeIDIV ( insn ) ; case <STR_LIT> : return decodeLBU ( insn ) ; case <STR_LIT> : return decodeLHU ( insn ) ; case <STR_LIT> : return decodeLW ( insn ) ; case <STR_LIT> : return decodeSB


<s> static unsigned getRB ( uint32_t insn ) { if ( ! get<ISA_LIT>RegisterFromNumbering ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) )


<s> if ( ! is<ISA_LIT>Register ( ( insn >> <NUM_LIT> ) & <NUM_LIT> ) ) return UNSUPPORTED ; return get<ISA_LIT>RegisterFromNumbering ( ( insn >> <NUM_LIT> ) &


<s> return get<ISA_LIT>RegisterFromNumbering ( ( insn >>


<s> if ( ! isSpecial<ISA_LIT>Register ( insn & <NUM_LIT> ) )


<s> static int64_t getSHT ( uint32_t insn


<s> TargetRegistry :: RegisterMCDisassembler ( The<ISA_LIT>Target ,


<s> <ISA_LIT>Disassembler ( const MCSubtargetInfo & STI


<s> MCObjectWriter * llvm :: create<ISA_LIT>ELFObjectWriter ( raw_ostream &


<s> MCObjectWriter * llvm :: create<ISA_LIT>ELFObjectWriter ( raw_ostream & OS ,


<s> long int <ISA_LIT>ELFWriterInfo :: computeRelocation ( unsigned SymOffset , unsigned RelOffset


<s> if ( RelTy == ELF :: R_MICROBLAZE_32_PCREL || ELF :: R_MICROBLAZE_64_PCREL )

return SymOffset - ( RelOffset + <NUM_LIT> ) ;


<s> return ELF :: R_MICROBLAZE_64_PCREL ; case <STR_LIT> : return ELF :: R_MICROBLAZE_NONE ; default : llvm_unreachable ( <STR_LIT> )


<s> if ( RelTy == ELF :: R_MICROBLAZE_32_PCREL || ELF :: R_MICROBLAZE_64_PCREL ) return SymOffset - ( RelOffset + <NUM_LIT> ) ; else assert ( <NUM_LIT> && <STR_LIT> )


<s> assert ( ( RelTy == ELF :: R_MICROBLAZE_32_PCREL || RelTy == ELF :: R_MICROBLAZE_64_PCREL ) && <STR_LIT> ) ; return SymOffset - ( RelOffset +


<s> long int <ISA_LIT>ELFWriterInfo :: computeRelocation ( unsigned SymOffset , unsigned RelOffset , unsigned RelTy ) const { if ( RelTy == ELF :: R_MICROBLAZE_32_PCREL || ELF :: R_MICROBLAZE_64_PCREL )


<s> case <STR_LIT> : return ELF :: R_MICROBLAZE_NONE ; default : llvm_unreachable ( <STR_LIT>


<s> case ELF :: R_MICROBLAZE_SRO32 : case ELF :: R_MICROBLAZE_SRW32 : case ELF :: R_MICROBLAZE_32_SYM_OP_SYM : case ELF :: R_MICROBLAZE_GOTOFF_32 : return <NUM_LIT> ; case ELF :: R_MICROBLAZE_64_PCREL : case ELF :: R_MICROBLAZE_64 : case ELF :: R_MICROBLAZE_GOTPC_64 : case ELF ::


<s> case ELF :: R_MICROBLAZE_32_PCREL : case ELF :: R_MICROBLAZE_32_PCREL_LO : case ELF :: R_MICROBLAZE_32_LO : case ELF :: R_MICROBLAZE_SRO32 : case ELF :: R_MICROBLAZE_SRW32 : case ELF :: R_MICROBLAZE_32_SYM_OP_SYM : case ELF :: R_MICROBLAZE_GOTOFF_32 : return <NUM_LIT> ; case ELF :: R_MICROBLAZE_64_PCREL : case ELF :: R_MICROBLAZE_64 : case ELF :: R_MICROBLAZE_GOTPC_64 : case ELF :: R_MICROBLAZE_GOT_64 : case ELF :: R_MICROBLAZE_PLT_64 : case ELF :: R_MICROBLAZE_GOTOFF_64 : return <NUM_LIT>


<s> switch ( RelTy ) { case ELF :: R_MICROBLAZE_32_PCREL : case ELF :: R_MICROBLAZE_64_PCREL : case ELF :: R_MICROBLAZE_32_PCREL_LO : case ELF ::


<s> <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; const <ISA_LIT>InstrInfo & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; if ( hasFP ( MF ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT>

) . addReg ( <STR_LIT> ) . addImm ( FPOffset ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( FPOffset ) ; } if ( MFI -> adjustsStack ( ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) .

addReg ( <STR_LIT> ) . addImm ( RAOffset ) ;


<s> <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; DebugLoc DL = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; <ISA_LIT>FI -> adjustLoadArgsFI ( MFI ) ; <ISA_LIT>FI -> adjustStoreVarArgsFI ( MFI ) ; unsigned StackSize = MFI -> getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI -> adjustsStack ( ) ) return ; int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - StackSize ) ; if ( MFI ->


<s> BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( RAOffset ) ; } if ( hasFP ( MF ) ) { BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( FPOffset ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT>


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return DisableFramePointerElim ( MF ) ||


<s> bool targetHandlesStackFrameRounding (


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( FPOffset ) ; } if ( MFI -> adjustsStack ( ) || requiresRA ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( RAOffset ) ; } int StackSize = ( int ) MFI -> getStackSize ( ) ; if ( StackSize ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> )

, <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( StackSize ) ;


<s> llvm :: CallingConv :: ID CallConv = MF . getFunction ( ) -> getCallingConv ( ) ; bool requiresRA = CallConv == llvm :: CallingConv :: MBLAZE_INTR ; determineFrameLayout ( MF ) ; unsigned StackSize = MFI -> getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI -> adjustsStack ( ) && ! requiresRA ) return ; int FPOffset = <ISA_LIT>FI -> getFPStackOffset ( ) ; int RAOffset = <ISA_LIT>FI -> getRAStackOffset ( ) ; BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg

( <STR_LIT> ) . addImm ( - StackSize ) ;


<s> if ( isIntr ) { int MSRFI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( MSRFI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MEXT , MEXTI , EXTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( MSRFI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MEXT , MEXTI , EXTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; } BuildMI ( MEXT , MEXTI , EXTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R18FI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MEXT , MEXTI , EXTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R17FI ) . addImm ( <NUM_LIT> ) ; for ( unsigned r = <STR_LIT> , i = VFI . size ( ) ; r >= <STR_LIT> ; -- r ) { if ( ! MRI . isPhysRegUsed ( r


<s> BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , r ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; } int R17FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; int R18FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R17FI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R18FI ) . addImm ( <NUM_LIT> ) ; if ( isIntr ) { int MSRFI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( MSRFI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MEXT , MEXTI , EXTDL , TII . get ( <STR_LIT> ) , <STR_LIT>


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; llvm :: CallingConv :: ID CallConv = MF . getFunction ( ) -> getCallingConv ( ) ; bool requiresRA = CallConv == llvm :: CallingConv :: MBLAZE_INTR ; if ( MFI -> adjustsStack ( ) || requiresRA ) { <ISA_LIT>FI -> setRAStackOffset ( <NUM_LIT> ) ; MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; } if ( hasFP ( MF ) ) { <ISA_LIT>FI -> setFPStackOffset (


<s> if ( I -> getOpcode ( ) != <STR_LIT> || I -> getNumOperands ( ) != <NUM_LIT> || ! I -> getOperand ( <NUM_LIT> ) . isFI ( ) || ! I -> getOperand ( <NUM_LIT> ) . isReg ( ) || I -> getOperand ( <NUM_LIT> ) . getIndex ( ) != LiveInFI [ i ] ) continue ; unsigned FIReg = I -> getOperand ( <NUM_LIT> ) . getReg ( ) ; MachineBasicBlock :: iterator SI = I ; for ( SI ++ ; SI != MIE ; ++ SI ) { if ( ! SI -> getOperand ( <NUM_LIT> ) . isReg ( ) || ! SI -> getOperand ( <NUM_LIT> ) . isFI ( ) || SI -> getOpcode ( ) != <STR_LIT> ) continue ; int FI = SI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; if ( SI -> getOperand ( <NUM_LIT> ) . getReg ( ) != FIReg || MFI -> isFixedObjectIndex ( FI ) || MFI -> getObjectSize ( FI ) != <NUM_LIT> ) continue ; if ( SI -> getOperand ( <NUM_LIT> ) . isDef ( ) ) break ; if ( SI -> getOperand ( <NUM_LIT> ) . isKill ( ) ) { DEBUG ( dbgs ( ) << <STR_LIT> << I -> getOperand ( <NUM_LIT> ) . getIndex ( ) << <STR_LIT> ) ; EraseInstr . push_back ( I ) ; } EraseInstr . push_back ( SI ) ; DEBUG ( dbgs ( ) << <STR_LIT> << FI << <STR_LIT> ) ; FrameRelocate . push_back ( std :: make_pair ( FI , StackOffset ) ) ; DEBUG ( dbgs ( ) << <STR_LIT> << FI << <STR_LIT> << StackOffset << <STR_LIT> ) ; StackOffset -= <NUM_LIT> ; StackAdjust += <NUM_LIT> ; break ; } } } for ( MachineRegisterInfo :: livein_iterator LI = LII ; LI != LIE ; ++ LI ) { for ( MachineBasicBlock :: iterator I = MIB ; I != MIE ; ++ I ) { if ( I -> definesRegister ( LI -> first ) ) break ; if ( I -> getOpcode ( ) != <STR_LIT> || I -> getNumOperands ( ) != <NUM_LIT> || ! I -> getOperand ( <NUM_LIT> ) . isFI ( ) || ! I -> getOperand ( <NUM_LIT> ) . isReg ( ) || I -> getOperand ( <NUM_LIT> ) . getIndex ( ) < <NUM_LIT> ) continue ; if ( I -> getOperand ( <NUM_LIT> ) . getReg ( ) ==


<s> int NFI = MFI -> CreateFixedObject ( <NUM_LIT> , FRI -> second , true ) ; <ISA_LIT>FI -> recordReplacement ( FRI -> first , NFI ) ; for ( MachineFunction :: iterator MB = MF . begin ( ) , ME = MF . end ( ) ; MB != ME ; ++ MB ) { MachineBasicBlock :: iterator MBB = MB -> begin ( ) ; const MachineBasicBlock :: iterator MBE = MB -> end ( ) ; for ( ; MBB != MBE ; ++ MBB ) { MachineInstr :: mop_iterator MIB = MBB -> operands_begin ( ) ; const MachineInstr :: mop_iterator MIE = MBB -> operands_end ( ) ; for ( MachineInstr :: mop_iterator MII = MIB ; MII != MIE ; ++ MII ) { if ( ! MII -> isFI ( ) || MII -> getIndex ( ) != FRI -> first ) continue ; DEBUG ( dbgs ( ) << <STR_LIT> << MII -> getIndex ( ) << <STR_LIT>


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return DisableFramePointerElim ( MF ) || MFI ->


<s> if ( I -> definesRegister ( LI -> first ) ) break ; if ( I -> getOpcode ( ) != <STR_LIT> || I -> getNumOperands ( ) != <NUM_LIT> || ! I -> getOperand ( <NUM_LIT> ) . isFI ( ) || ! I -> getOperand ( <NUM_LIT> ) . isReg ( ) || I -> getOperand ( <NUM_LIT> ) . getIndex ( ) < <NUM_LIT> ) continue ; if ( I -> getOperand ( <NUM_LIT> ) . getReg ( ) == LI -> first ) { int FI = I -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; int FILoc = <NUM_LIT> ; switch ( LI -> first ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; case <STR_LIT> : FILoc = - <NUM_LIT> ; break ; } StackAdjust += <NUM_LIT> ; FrameRelocate . push_back ( std :: make_pair ( FI , FILoc ) ) ; DEBUG ( dbgs ( ) << <STR_LIT> << FI << <STR_LIT> << FILoc << <STR_LIT> ) ; break ; } } } for ( int i = <NUM_LIT> , e = EraseInstr . size ( ) ; i < e

; ++ i ) MBB -> erase ( EraseInstr [ i ] ) ;


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; <ISA_LIT>FI -> adjustLoadArgsFI ( MFI ) ; <ISA_LIT>FI -> adjustStoreVarArgsFI ( MFI ) ; unsigned FrameSize = MFI -> getStackSize ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << FrameSize << <STR_LIT> ) ; unsigned TargetAlign = MF . getTarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; unsigned AlignMask = TargetAlign


<s> <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; <ISA_LIT>FI -> adjustLoadArgsFI ( MFI ) ; <ISA_LIT>FI -> adjustStoreVarArgsFI ( MFI ) ; unsigned FrameSize = MFI -> getStackSize ( ) ; DEBUG ( dbgs ( ) << <STR_LIT> << FrameSize << <STR_LIT> ) ; unsigned TargetAlign = MF . getTarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; unsigned AlignMask = TargetAlign


<s> if ( ! hasReservedCallFrame ( MF ) ) { MachineInstr * Old = I ; int Amount = Old -> getOperand ( <NUM_LIT> ) . getImm ( ) + <NUM_LIT> ; if ( Amount != <NUM_LIT> ) { unsigned Align = getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; MachineInstr * New ; if ( Old -> getOpcode ( ) == <STR_LIT> ) { New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ; } else


<s> return MF . getTarget ( ) . Options . DisableFramePointerElim

( MF ) || MFI -> hasVarSizedObjects ( ) ;


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF


<s> CallingConv :: ID CallConv = F -> getCallingConv ( ) ; if ( CallConv != CallingConv :: MBLAZE_INTR && CallConv != CallingConv :: MBLAZE_SVOL ) return ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; const <ISA_LIT>InstrInfo & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; bool isIntr = CallConv == CallingConv :: MBLAZE_INTR ; MachineBasicBlock & MENT = MF . front ( ) ; MachineBasicBlock & MEXT = MF . back ( ) ; MachineBasicBlock :: iterator MENTI = MENT . begin ( ) ; MachineBasicBlock :: iterator MEXTI = prior ( MEXT . end ( ) ) ; DebugLoc ENTDL = MENTI != MENT . end ( ) ? MENTI -> getDebugLoc ( ) : DebugLoc ( ) ; DebugLoc EXTDL = MEXTI != MEXT . end ( ) ? MEXTI -> getDebugLoc ( ) : DebugLoc ( ) ; SmallVector < int , <NUM_LIT> > VFI ; for ( unsigned r = <STR_LIT> ; r <= <STR_LIT> ; ++ r ) { if ( ! MRI . isPhysRegUsed ( r ) && ! ( isIntr && r == <STR_LIT> ) ) continue ; int FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; VFI . push_back ( FI ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , r ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; } int R17FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; int R18FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R17FI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R18FI ) . addImm ( <NUM_LIT> ) ; if ( isIntr ) { int MSRFI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) ,


<s> static void interruptFrameLayout ( MachineFunction & MF ) { const Function * F = MF . getFunction ( ) ; CallingConv :: ID CallConv = F -> getCallingConv ( ) ; if ( CallConv != CallingConv :: MBLAZE_INTR && CallConv != CallingConv :: MBLAZE_SVOL ) return ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; const <ISA_LIT>InstrInfo & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; bool isIntr = CallConv == CallingConv :: MBLAZE_INTR ; MachineBasicBlock & MENT = MF . front ( ) ; MachineBasicBlock & MEXT = MF . back ( ) ; MachineBasicBlock :: iterator MENTI = MENT . begin ( ) ; MachineBasicBlock :: iterator MEXTI = prior ( MEXT . end ( ) ) ; DebugLoc ENTDL = MENTI != MENT . end ( ) ? MENTI -> getDebugLoc ( ) : DebugLoc ( ) ; DebugLoc EXTDL = MEXTI != MEXT . end ( ) ? MEXTI -> getDebugLoc ( ) : DebugLoc ( ) ; SmallVector < int , <NUM_LIT> > VFI ; for ( unsigned r = <STR_LIT> ; r <= <STR_LIT> ; ++ r ) { if ( ! MRI . isPhysRegUsed ( r ) && ! ( isIntr && r == <STR_LIT> ) ) continue ; int FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; VFI . push_back ( FI ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , r ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; } int R17FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; int R18FI = MFI -> CreateStackObject ( <NUM_LIT> , <NUM_LIT> , false , false ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R17FI ) . addImm ( <NUM_LIT> ) ; BuildMI ( MENT , MENTI , ENTDL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( R18FI ) .


<s> <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; CallingConv :: ID CallConv = MF . getFunction ( ) -> getCallingConv ( ) ; bool requiresRA = CallConv == CallingConv :: MBLAZE_INTR ; if ( MFI -> adjustsStack ( ) || requiresRA ) { <ISA_LIT>FI -> setRAStackOffset ( <NUM_LIT> ) ; MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; } if ( hasFP ( MF ) ) { <ISA_LIT>FI -> setFPStackOffset


<s> <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; const SmallVectorImpl < std :: pair < int , int64_t > > :: iterator FRB = FR . begin ( ) ; const SmallVectorImpl < std :: pair < int , int64_t > > :: iterator FRE = FR . end ( ) ; SmallVectorImpl < std :: pair < int , int64_t > > :: iterator FRI = FRB ; for ( ; FRI != FRE ; ++ FRI ) { MFI -> RemoveStackObject ( FRI


<s> if ( MO . isImm ( ) ) O << <STR_LIT> << MO . getImm ( ) ; else printOperand ( MI , OpNo ,


<s> void <ISA_LIT>InstPrinter :: printFSLImm ( const MCInst * MI , int OpNo , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNo


<s> void <ISA_LIT>InstPrinter :: printOperand ( const MCInst * MI , unsigned OpNo , raw_ostream & O , const char * Modifier ) { assert ( ( Modifier == <NUM_LIT> || Modifier [ <NUM_LIT> ] == <NUM_LIT> ) && <STR_LIT> ) ; const MCOperand & Op = MI -> getOperand ( OpNo ) ; if ( Op . isReg ( ) ) { O << getRegisterName ( Op . getReg ( ) ) ; } else if ( Op . isImm


<s> unsigned <ISA_LIT>InstrInfo :: getGlobalBaseReg ( MachineFunction * MF ) const { <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned GlobalBaseReg = <ISA_LIT>FI -> getGlobalBaseReg ( ) ; if ( GlobalBaseReg != <NUM_LIT> ) return GlobalBaseReg ; MachineBasicBlock & FirstMBB = MF -> front ( ) ; MachineBasicBlock :: iterator MBBI = FirstMBB . begin ( ) ; MachineRegisterInfo & RegInfo = MF


<s> MachineBasicBlock :: iterator I = MBB . end ( ) ; if ( I == MBB . begin ( ) ) return false ; -- I ; while ( I -> isDebugValue ( ) ) { if ( I == MBB . begin ( ) ) return false ; -- I ; } if ( ! isUnpredicatedTerminator ( I ) ) return false ; MachineInstr * LastInst = I ; unsigned LastOpc = LastInst -> getOpcode ( ) ; if ( I == MBB . begin ( ) || ! isUnpredicatedTerminator ( -- I ) ) { if ( <STR_LIT> ( LastOpc ) ) { TBB = LastInst -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; return false ; } if ( <STR_LIT> ( LastOpc ) ) { TBB = LastInst -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; Cond . push_back ( MachineOperand :: CreateImm ( LastInst -> getOpcode ( ) ) ) ; Cond . push_back ( LastInst -> getOperand ( <NUM_LIT> ) ) ; return false ; } return true ; } MachineInstr * SecondLastInst = I ; if ( SecondLastInst && I != MBB . begin ( ) && isUnpredicatedTerminator ( -- I ) ) return true ; if ( <STR_LIT> ( SecondLastInst -> getOpcode ( ) ) && <STR_LIT> ( LastInst -> getOpcode ( ) ) ) { TBB = SecondLastInst -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; Cond . push_back ( MachineOperand :: CreateImm ( SecondLastInst -> getOpcode ( ) ) ) ; Cond . push_back ( SecondLastInst -> getOperand ( <NUM_LIT> ) ) ; FBB = LastInst -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; return false ; } if ( <STR_LIT> ( SecondLastInst -> getOpcode ( ) ) && <STR_LIT> ( LastInst -> getOpcode ( ) ) ) { TBB = SecondLastInst -> getOperand ( <NUM_LIT> ) . getMBB ( ) ; I = LastInst ; if ( AllowModify ) I -> eraseFromParent ( ) ; return false


<s> switch ( CC ) { default : llvm_unreachable ( <STR_LIT> ) ; case COND_EQ : return <STR_LIT> ; case COND_NE : return <STR_LIT> ; case COND_GT : return <STR_LIT> ; case COND_GE : return <STR_LIT> ; case COND_LT :


<s> MachineBasicBlock :: iterator MBBI = FirstMBB . begin ( ) ; MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetInstrInfo * TII = MF -> getTarget ( ) . getInstrInfo ( ) ; GlobalBaseReg = RegInfo . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( FirstMBB , MBBI , DebugLoc ( ) , TII -> get ( TargetOpcode :: COPY ) , GlobalBaseReg ) . addReg ( <STR_LIT> ) ; RegInfo . addLiveIn ( <STR_LIT> ) ; <ISA_LIT>FI -> setGlobalBaseReg ( GlobalBaseReg ) ; return GlobalBaseReg


<s> insertNoop ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const { DebugLoc DL ; BuildMI ( MBB , MI , DL , get ( <STR_LIT>


<s> if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) .


<s> isStoreToStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } } return <NUM_LIT>


<s> void <ISA_LIT>InstrInfo :: loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , int FI

, const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const {


<s> MachineBasicBlock :: iterator I = MBB . end ( ) ; if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; while ( I -> isDebugValue ( ) ) { if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; } if ( ! <STR_LIT> ( I -> getOpcode ( ) ) && ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ; I -> eraseFromParent ( ) ; I = MBB .


<s> } if ( ! <STR_LIT> ( I -> getOpcode ( ) ) && ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ; I -> eraseFromParent ( ) ; I = MBB . end ( ) ; if ( I == MBB . begin ( ) ) return <NUM_LIT> ; -- I ; if ( ! <STR_LIT> ( I -> getOpcode ( ) ) ) return <NUM_LIT> ; I -> eraseFromParent


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FI ) .


<s> llvm :: BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc )


<s> InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand >


<s> assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ; BuildMI ( & MBB , DL , get ( <STR_LIT> ) ) . addMBB


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass *

RC , const TargetRegisterInfo * TRI ) const {


<s> storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; BuildMI ( MBB , I , DL , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) )

. addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ;


<s> virtual MachineInstr * foldMemoryOperandImpl ( MachineFunction & MF , MachineInstr * MI , const

SmallVectorImpl < unsigned > & Ops , MachineInstr * LoadMI ) const {


<s> llvm :: BuildMI ( MBB , I , dl , get ( <STR_LIT> ) , DestReg ) .

addReg ( SrcReg ) . addReg ( <STR_LIT> ) ;


<s> copyRegToReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , unsigned SrcReg , const TargetRegisterClass * DestRC , const TargetRegisterClass * SrcRC ) const { DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; llvm :: BuildMI ( MBB , I , dl , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg ) . addReg ( <STR_LIT> ) ; return


<s> DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; assert ( Cond . empty ( ) && ! FBB && TBB &&


<s> if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; BuildMI ( MBB , MI , DL , get ( <STR_LIT>


<s> BuildMI ( MBB , I , dl , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT>


<s> storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill ,

int FI , const TargetRegisterClass * RC ) const {


<s> BuildMI ( MBB , I , dl , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addImm ( <NUM_LIT> )


<s> bool <ISA_LIT>InstrInfo :: copyRegToReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned DestReg , unsigned SrcReg

, const TargetRegisterClass * DestRC , const TargetRegisterClass * SrcRC ) const {


<s> DebugLoc DL ; llvm :: BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg ) . addReg ( <STR_LIT> ) ; return true


<s> case <STR_LIT> : if ( ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) == <STR_LIT> ) && ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) ) ) { if ( Ops [ <NUM_LIT> ] == <NUM_LIT> ) { unsigned SrcReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool isKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } else { unsigned DstReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool isDead = MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ; bool isUndef = MI -> getOperand ( <NUM_LIT> ) . isUndef ( ) ; NewMI = BuildMI ( MF , MI -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( isDead ) | getUndefRegState ( isUndef ) ) . addImm ( <NUM_LIT> ) . addFrameIndex ( FI ) ; } } break ; } return NewMI


<s> MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetInstrInfo * TII = MF -> getTarget ( ) . getInstrInfo ( ) ; GlobalBaseReg = RegInfo . createVirtualRegister ( <STR_LIT> ) ; bool Ok = TII -> copyRegToReg ( FirstMBB , MBBI

, GlobalBaseReg , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> unsigned <ISA_LIT>InstrInfo :: InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond ) const { assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ; BuildMI ( & MBB , DebugLoc ( ) , get ( <STR_LIT> ) ) .


<s> InsertBranch ( MachineBasicBlock & MBB , MachineBasicBlock * TBB , MachineBasicBlock * FBB , const SmallVectorImpl < MachineOperand > & Cond ) const { assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ; BuildMI ( & MBB , DebugLoc ( ) , get ( <STR_LIT> ) ) . addMBB ( TBB ) ; return


<s> DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; BuildMI ( MBB , MI , DL , get


<s> insertNoop ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI ) const { DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI ->


<s> if ( MI -> getOpcode ( ) == <STR_LIT> ) { if ( ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) && ( MI -> getOperand ( <NUM_LIT> ) . isImm ( ) ) && ( isZeroImm ( MI -> getOperand ( <NUM_LIT> ) ) ) ) { FrameIndex = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; return MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; } } return <NUM_LIT>


<s> BuildMI ( MBB , I , DL , get ( <STR_LIT> ) , DestReg ) . addImm ( <NUM_LIT>


<s> case FCOND_OR : return <STR_LIT> ; case FCOND_EQ : case FCOND_NEQ : return <STR_LIT> ; case FCOND_UEQ : case FCOND_OGL : return <STR_LIT> ; case FCOND_OLT : case FCOND_UGE : return <STR_LIT> ; case FCOND_ULT : case FCOND_OGE : return <STR_LIT> ; case FCOND_OLE : case FCOND_UGT : return <STR_LIT> ; case FCOND_ULE : case FCOND_OGT : return <STR_LIT> ; case FCOND_SF


<s> case FCOND_F : case FCOND_T : return <STR_LIT> ; case FCOND_UN : case FCOND_OR : return <STR_LIT> ; case FCOND_EQ : case FCOND_NEQ : return <STR_LIT> ; case FCOND_UEQ : case FCOND_OGL : return <STR_LIT> ; case FCOND_OLT : case FCOND_UGE : return <STR_LIT> ; case FCOND_ULT : case FCOND_OGE : return <STR_LIT> ; case FCOND_OLE : case FCOND_UGT : return <STR_LIT> ; case FCOND_ULE : case FCOND_OGT : return <STR_LIT> ; case FCOND_SF


<s> assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; AttributeSet AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> ) IntrID ) ; return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( )


<s> bool IsVarArg = false ; return FunctionType :: get ( ResultTy , ArgTys ,


<s> AttrListPtr AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> ) IntrID ) ; return cast < Function > ( M -> getOrInsertFunction ( getName ( IntrID ) , getType ( M -> getContext ( ) ,


<s> assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; AttrListPtr AList = getAttributes ( M -> getContext ( ) , ( <STR_LIT> )


<s> Type * ResultTy = NULL ; std :: vector < Type * > ArgTys ; bool IsVarArg


<s> } ; assert ( ! isOverloaded ( IntrID ) && <STR_LIT> ) ; if ( IntrID < <STR_LIT> ) return <NUM_LIT> ; assert ( IntrID < <STR_LIT> && <STR_LIT> ) ; std :: string Result ( names [ IntrID - <STR_LIT> ] ) ; return Result


<s> std :: string <ISA_LIT>IntrinsicInfo :: getName ( unsigned IntrID , const Type * * Tys , unsigned numTys ) const { static const char * const names [ ] = { } ; assert ( ! isOverloaded ( IntrID )


<s> static const FunctionType * getType ( LLVMContext & Context , unsigned id ) { const Type * ResultTy = NULL ; std :: vector < const Type * > ArgTys ; bool IsVarArg = false ; return FunctionType :: get ( ResultTy ,


<s> bool <ISA_LIT>IntrinsicInfo :: isOverloaded ( unsigned IntrID ) const { const bool OTable [ ] = { } ; if ( IntrID == <NUM_LIT> )


<s> lookupGCCName ( const char * Name ) const { return <STR_LIT> ( <STR_LIT>


<s> if ( Len < <NUM_LIT> || Name [ <NUM_LIT> ] != '.' || Name [ <NUM_LIT> ] != 'l' || Name [ <NUM_LIT> ] != 'l' || Name [ <NUM_LIT> ] != 'v' || Name [ <NUM_LIT> ] != 'm' ) return <NUM_LIT> ; return <NUM_LIT>


<s> return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = {


<s> SDNode * <ISA_LIT>DAGToDAGISel :: Select ( SDNode * Node ) { unsigned Opcode = Node -> getOpcode ( ) ; DebugLoc dl = Node -> getDebugLoc ( ) ; DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; if ( Node -> isMachineOpcode ( ) ) { DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; return NULL ; } switch ( Opcode ) { default : break ; case <STR_LIT> : return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ; Chain = SDValue ( ResNode ,


<s> } else { if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) ) return false ; } if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { if ( isUInt < <NUM_LIT> > ( CN -> getZExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; } else { Base = Addr . getOperand ( <NUM_LIT> ) ; } Offset = CurDAG -> getTargetConstant ( CN -> getZExtValue ( ) , <STR_LIT> ) ; return true ; } } } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; return


<s> return true ; } } else if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( N ) ) { uint32_t Imm = CN -> getZExtValue ( ) ; Disp = CurDAG -> getTargetConstant ( Imm , CN -> getValueType ( <NUM_LIT> ) ) ; Base = CurDAG -> getRegister ( <STR_LIT> , CN -> getValueType ( <NUM_LIT> ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; return true ; } Disp = CurDAG -> getTargetConstant ( <NUM_LIT> , TM . getTargetLowering ( ) -> getPointerTy ( ) ) ; if ( FrameIndexSDNode * FI = dyn_cast < FrameIndexSDNode > ( N ) ) Base = CurDAG -> getTargetFrameIndex ( FI ->


<s> unsigned Opcode = Node -> getOpcode ( ) ; DebugLoc dl = Node -> getDebugLoc ( ) ; if ( Node -> isMachineOpcode ( ) ) return NULL ; switch ( Opcode ) { default : break ; case <STR_LIT> : return getGlobalBaseReg ( ) ; case <STR_LIT> : { SDValue imm = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; int FI = dyn_cast < FrameIndexSDNode > ( Node ) -> getIndex ( ) ; EVT VT = Node -> getValueType ( <NUM_LIT> ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , VT ) ; unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = Load .


<s> unsigned Opc = <STR_LIT> ; if ( Node -> hasOneUse ( ) ) return CurDAG -> SelectNodeTo ( Node , Opc , VT , TFI , imm ) ; return CurDAG -> getMachineNode ( Opc , dl , VT , TFI , imm ) ; } case <STR_LIT> : { if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ; Chain = SDValue ( ResNode , <NUM_LIT> ) ; InFlag = SDValue ( ResNode , <NUM_LIT> ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , Chain ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , InFlag ) ; return ResNode ; } } } SDNode * ResNode = SelectCode ( Node ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; if ( ResNode == NULL || ResNode == Node ) DEBUG ( Node -> dump ( CurDAG ) ) ; else DEBUG ( ResNode -> dump ( CurDAG ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; return ResNode


<s> } if ( Addr . getOpcode ( ) == <STR_LIT> ) { if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { if ( Predicate_immSExt16 ( CN ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , <STR_LIT> ) ; } else { Base = Addr . getOperand ( <NUM_LIT> ) ; } Offset = CurDAG -> getTargetConstant ( CN -> getZExtValue ( ) , <STR_LIT> ) ; return true ; } } } Base = Addr ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; return


<s> SDNode * <ISA_LIT>DAGToDAGISel :: getGlobalBaseReg ( ) { unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ; return CurDAG -> getRegister ( GlobalBaseReg , TLI -> getPointerTy ( )


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) { return new <ISA_LIT>DAGToDAGISel


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) { return new <ISA_LIT>DAGToDAGISel ( TM


<s> unsigned GlobalBaseReg = getInstrInfo ( ) -> getGlobalBaseReg ( MF ) ; return CurDAG -> getRegister ( GlobalBaseReg , getTargetLowering ( ) -> getPointerTy ( ) ) .


<s> virtual const char * getPassName ( ) const { return <STR_LIT>


<s> return static_cast < const <ISA_LIT>TargetMachine & > (


<s> const <ISA_LIT>TargetMachine & getTargetMachine ( ) { return static_cast < const <ISA_LIT>TargetMachine & > ( TM


<s> static bool isIntS32Immediate ( SDValue Op , int32_t &


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & tm ) : SelectionDAGISel ( tm ) , TM ( tm ) , Subtarget ( tm . getSubtarget


<s> if ( TM . getRelocationModel ( ) == Reloc :: PIC_ ) { SDValue Chain = Node -> getOperand ( <NUM_LIT> ) ; SDValue Callee = Node -> getOperand ( <NUM_LIT> ) ; SDValue R20Reg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue InFlag ( <NUM_LIT> , <NUM_LIT> ) ; if ( ( isa < GlobalAddressSDNode > ( Callee ) ) || ( isa < ExternalSymbolSDNode > ( Callee ) ) ) { SDValue GPReg = CurDAG -> getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue Ops [ ] = { Callee , GPReg , Chain } ; SDValue Load = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , Ops ) , <NUM_LIT> ) ; Chain = Load . getValue ( <NUM_LIT> ) ; Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Load , InFlag ) ; } else Chain = CurDAG -> getCopyToReg ( Chain , dl , R20Reg , Callee , InFlag ) ; SDNode * ResNode = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , R20Reg , Chain ) ; Chain = SDValue ( ResNode , <NUM_LIT> ) ; InFlag = SDValue ( ResNode , <NUM_LIT> ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , Chain ) ; ReplaceUses ( SDValue ( Node , <NUM_LIT> ) , InFlag ) ; return ResNode ; } } } SDNode * ResNode = SelectCode ( Node ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; if ( ResNode == NULL || ResNode == Node ) DEBUG ( Node -> dump ( CurDAG ) ) ; else DEBUG ( ResNode -> dump ( CurDAG ) ) ; DEBUG ( errs ( ) << <STR_LIT> ) ; return ResNode


<s> if ( N . getOpcode ( ) == <STR_LIT> || N . getOpcode ( ) == <STR_LIT> ) { if ( isIntS32Immediate ( N . getOperand ( <NUM_LIT> ) , imm ) ) return false ; if ( N . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> || N . getOperand ( <NUM_LIT> ) . getOpcode ( ) == <STR_LIT> ) return false ; Base = N . getOperand ( <NUM_LIT> ) ; Index = N . getOperand ( <NUM_LIT> ) ; return true


<s> std :: pair < unsigned , const TargetRegisterClass * > <ISA_LIT>TargetLowering :: getRegForInlineAsmConstraint ( const std :: string & Constraint , EVT VT ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { case 'r' : return std :: make_pair ( <NUM_LIT> ,


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( EVT VT ) const { return <STR_LIT>


<s> LowerConstantPool ( SDValue Op , SelectionDAG & DAG ) const { SDValue ResNode ; ConstantPoolSDNode * N = cast < ConstantPoolSDNode > ( Op ) ; const Constant * C = N -> getConstVal


<s> std :: vector < SDValue > OutChains ; unsigned ArgRegEnd = <NUM_LIT> ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; SDValue StackPtr ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( VA . isRegLoc ( ) ) { MVT RegVT = VA . getLocVT ( ) ; ArgRegEnd = VA . getLocReg ( ) ; const TargetRegisterClass * RC ; if ( RegVT == <STR_LIT> ) RC = & <STR_LIT> ; else if ( RegVT == <STR_LIT> ) RC = & <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; unsigned Reg = MF . addLiveIn ( ArgRegEnd , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , Reg , RegVT ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) /


<s> LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl ,


<s> LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GA


<s> JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ; SDValue JTI = DAG . getTargetJumpTable ( JT -> getIndex ( )


<s> if ( DAG . getMachineFunction ( ) . getRegInfo ( ) . liveout_empty ( ) ) { for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) if ( RVLocs [ i ] . isRegLoc ( ) ) DAG . getMachineFunction ( ) . getRegInfo ( ) . addLiveOut ( RVLocs [ i ] . getLocReg ( ) ) ; } SDValue Flag ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; } unsigned Ret = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; unsigned Reg = ( CallConv == CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; SDValue DReg = DAG . getRegister


<s> SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueVal = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseVal = Op . getOperand ( <NUM_LIT> ) ; DebugLoc dl = Op . getDebugLoc ( ) ; unsigned Opc ; SDValue CompareFlag


<s> const unsigned NumArgRegs = array_lengthof ( ArgRegs ) ; unsigned Reg = State . AllocateReg ( ArgRegs , NumArgRegs ) ; if ( ! Reg ) return false ; unsigned SizeInBytes = ValVT . getSizeInBits ( ) >> <NUM_LIT> ; State . AllocateStack ( SizeInBytes , SizeInBytes ) ; State . addLoc ( CCValAssign :: getReg ( ValNo , ValVT , Reg ,


<s> const unsigned NumArgRegs = array_lengthof ( ArgRegs ) ; unsigned Reg = State . AllocateReg ( ArgRegs , NumArgRegs ) ; if ( ! Reg ) return false ; unsigned SizeInBytes = ValVT . getSizeInBits ( ) >> <NUM_LIT> ; State . AllocateStack ( SizeInBytes , SizeInBytes ) ; State . addLoc ( CCValAssign :: getReg ( ValNo , ValVT , Reg , LocVT ,


<s> MachineBasicBlock * finish = F -> CreateMachineBasicBlock ( LLVM_BB ) ; F -> insert ( It , loop ) ; F -> insert ( It , finish ) ; finish -> splice ( finish -> begin ( ) , MBB , llvm :: next ( MachineBasicBlock :: iterator ( MI ) ) , MBB -> end ( ) ) ; finish -> transferSuccessorsAndUpdatePHIs ( MBB ) ; MBB -> addSuccessor ( loop ) ; MBB -> addSuccessor ( finish ) ; loop -> addSuccessor ( finish ) ; loop -> addSuccessor ( loop ) ; unsigned IAMT = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) , IAMT ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; unsigned IVAL = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) , IVAL ) . addReg ( MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , dl , TII -> get ( <STR_LIT> ) ) . addReg ( IAMT ) . addMBB ( finish ) ; unsigned DST = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NDST = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , DST ) . addReg ( IVAL ) . addMBB ( MBB ) . addReg ( NDST ) . addMBB ( loop ) ; unsigned SAMT = R . createVirtualRegister ( <STR_LIT> ) ; unsigned NAMT = R . createVirtualRegister ( <STR_LIT> ) ; BuildMI ( loop , dl , TII -> get ( <STR_LIT> ) , SAMT ) . addReg (

IAMT ) . addMBB ( MBB ) . addReg ( NAMT ) . addMBB ( loop ) ;


<s> MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; } } if ( needsRegArgSlots && TFI . hasReservedCallFrame ( MF ) ) MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = DAG . getCopyToReg ( Chain , dl , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } if ( GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ) Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> , <NUM_LIT> ) ; else if ( ExternalSymbolSDNode * S = dyn_cast < ExternalSymbolSDNode > ( Callee ) ) Callee = DAG . getTargetExternalSymbol ( S -> getSymbol ( ) , getPointerTy ( ) , <NUM_LIT> ) ; SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Ops . push_back ( DAG . getRegister ( RegsToPass [ i ] . first , RegsToPass [ i ] . second . getValueType ( ) ) ) ; } if ( InFlag . getNode ( ) )


<s> if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; TargetRegisterClass * RC = <STR_LIT> ; unsigned Begin = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned Start = get<ISA_LIT>RegisterNumbering ( ArgRegEnd + <NUM_LIT> ) ; unsigned End = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned StackLoc = Start - Begin + <NUM_LIT> ; for ( ; Start <= End ; ++ Start , ++ StackLoc ) { unsigned Reg = get<ISA_LIT>RegisterFromNumbering ( Start ) ; unsigned LiveReg = MF . addLiveIn ( Reg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , LiveReg , <STR_LIT> ) ; int FI = MFI -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordStoreVarArgsFI ( FI , - ( StackLoc * <NUM_LIT> ) ) ; SDValue PtrOff = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; OutChains . push_back ( DAG . getStore ( Chain , dl , ArgValue , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; if ( ! <ISA_LIT>FI -> getVarArgsFrameIndex ( ) ) <ISA_LIT>FI -> setVarArgsFrameIndex


<s> LowerGlobalTLSAddress ( SDValue Op , SelectionDAG & DAG ) const { llvm_unreachable ( <STR_LIT> ) ; return SDValue


<s> llvm_unreachable ( <STR_LIT> ) ; return SDValue


<s> SDValue Flag ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; } unsigned Ret = ( CallConv == llvm :: CallingConv :: MBLAZE_INTR ) ? <STR_LIT> : <STR_LIT> ; unsigned Reg = ( CallConv == llvm :: CallingConv :: MBLAZE_INTR )


<s> if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; TargetRegisterClass * RC = <STR_LIT> ; unsigned Begin = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned Start = get<ISA_LIT>RegisterNumbering ( ArgRegEnd + <NUM_LIT> ) ; unsigned End = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; unsigned StackLoc = Start - Begin + <NUM_LIT> ; for ( ; Start <= End ; ++ Start , ++ StackLoc ) { unsigned Reg = get<ISA_LIT>RegisterFromNumbering ( Start ) ; unsigned LiveReg = MF . addLiveIn ( Reg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , LiveReg , <STR_LIT> ) ; int FI = MFI -> CreateFixedObject ( <NUM_LIT> ,


<s> unsigned StackReg = MF . getTarget ( ) . getRegisterInfo ( ) -> getFrameRegister ( MF ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( <NUM_LIT> ) ; std :: vector < SDValue > OutChains ; unsigned ArgRegEnd = <NUM_LIT> ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; SDValue StackPtr ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( VA . isRegLoc ( ) ) { MVT RegVT = VA . getLocVT ( ) ; ArgRegEnd = VA . getLocReg ( ) ; const TargetRegisterClass * RC ; if ( RegVT == <STR_LIT> ) RC = <STR_LIT> ; else if ( RegVT == <STR_LIT> ) RC = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; unsigned Reg = MF . addLiveIn ( ArgRegEnd , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , dl , Reg , RegVT ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , dl , RegVT , ArgValue , DAG . getValueType ( VA . getValVT ( ) ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , dl , VA . getValVT ( ) , ArgValue ) ; } InVals . push_back ( ArgValue ) ; } else { assert ( VA . isMemLoc ( ) ) ; ArgRegEnd = <NUM_LIT> ; unsigned ArgSize = VA . getLocVT ( ) . getSizeInBits ( ) / <NUM_LIT> ; unsigned StackLoc = VA . getLocMemOffset ( ) + <NUM_LIT> ; int FI = MFI -> CreateFixedObject ( ArgSize , <NUM_LIT> , true ) ; <ISA_LIT>FI -> recordLoadArgsFI ( FI , - StackLoc ) ; <ISA_LIT>FI -> recordLiveIn ( FI ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( FI ) , false , false , false , <NUM_LIT> ) ) ; } } if ( ( isVarArg ) && ArgRegEnd ) { if ( StackPtr . getNode ( ) == <NUM_LIT> ) StackPtr = DAG . getRegister ( StackReg , getPointerTy ( ) ) ; const TargetRegisterClass * RC =