<s> } if ( needsLowering && Addr . BaseType == Address :: FrameIndexBase ) { const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; unsigned ResultReg = createResultReg ( RC ) ; unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) . addFrameIndex ( Addr . Base . FI ) . addImm ( <NUM_LIT> ) ) ; Addr . Base . Reg = ResultReg ; Addr . BaseType = Address :: RegBase ; } if ( needsLowering ) { Addr . Base . Reg = fastEmit_ri_ ( <STR_LIT> , <STR_LIT> , Addr . Base . Reg , false , Addr . Offset , <STR_LIT> ) ; Addr . Offset = <NUM_LIT>


<s> } } bool RV ; unsigned ResultReg ; RV = <ISA_LIT>EmitLoad ( VT , ResultReg , Src ) ; assert ( RV && <STR_LIT> ) ; RV = <ISA_LIT>EmitStore ( VT , ResultReg , Dest ) ; assert ( RV && <STR_LIT> ) ; ( void ) RV ; unsigned Size = VT .


<s> else if ( Len >= <NUM_LIT> ) VT = <STR_LIT> ; else { assert ( Len == <NUM_LIT> && <STR_LIT> ) ; VT = <STR_LIT> ; } } else { if ( Len >= <NUM_LIT> && Alignment == <NUM_LIT> ) VT = <STR_LIT> ; else { VT = <STR_LIT> ; } } bool RV ; unsigned ResultReg ; RV = <ISA_LIT>EmitLoad ( VT , ResultReg , Src ) ; assert ( RV && <STR_LIT> ) ; RV = <ISA_LIT>EmitStore ( VT , ResultReg , Dest ) ; assert ( RV && <STR_LIT> ) ; ( void ) RV ; unsigned Size = VT . getSizeInBits ( ) / <NUM_LIT> ; Len -= Size ; Dest . Offset += Size ; Src . Offset +=


<s> if ( Subtarget -> hasVFP2 ( ) && ! isVarArg ) { if ( ! Subtarget -> isAAPCS_ABI ( ) ) return ( Return ? RetFastCC_<ISA_LIT>_APCS : FastCC_<ISA_LIT>_APCS ) ; return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; } LLVM_FALLTHROUGH ; case CallingConv :: C : case CallingConv :: CXX_FAST_TLS : if ( Subtarget -> isAAPCS_ABI ( ) ) { if ( Subtarget -> hasVFP2 ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ?


<s> CCAssignFn * <ISA_LIT>FastISel :: CCAssignFnForCall ( CallingConv :: ID CC , bool Return , bool isVarArg ) { switch ( CC ) { default : report_fatal_error ( <STR_LIT> ) ; case CallingConv :: Fast : if ( Subtarget -> hasVFP2 ( ) && ! isVarArg ) { if ( ! Subtarget -> isAAPCS_ABI ( ) ) return ( Return ? RetFastCC_<ISA_LIT>_APCS : FastCC_<ISA_LIT>_APCS ) ; return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; } LLVM_FALLTHROUGH ; case CallingConv :: C : case CallingConv :: CXX_FAST_TLS : if ( Subtarget -> isAAPCS_ABI ( ) ) { if ( Subtarget -> hasVFP2 ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; } else { return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; } case CallingConv :: <ISA_LIT>_AAPCS_VFP : case CallingConv


<s> FastISel * <STR_LIT> ( FunctionLoweringInfo & funcInfo , const TargetLibraryInfo *


<s> if ( funcInfo . MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) . useFastISel ( ) ) return

new <ISA_LIT>FastISel ( funcInfo , libInfo ) ;


<s> if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; if ( MO . getReg ( ) == <STR_LIT> ) * CPSR = true ; } return


<s> AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addImm ( Imm ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [


<s> const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) ) ; } else


<s> unsigned <ISA_LIT>FastISel :: fastEmitInst_rr ( unsigned MachineInstOpcode , const TargetRegisterClass * RC , unsigned Op0 , bool Op0IsKill , unsigned Op1 , bool Op1IsKill ) { unsigned ResultReg = createResultReg ( RC ) ; const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; Op1 = constrainOperandRegClass ( II , Op1 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill

* RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) ) ;


<s> EVT CEVT = TLI . getValueType ( DL , C -> getType ( ) , true ) ; if ( ! CEVT . isSimple ( ) ) return <NUM_LIT> ; MVT VT = CEVT . getSimpleVT ( ) ; if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( C ) ) return <ISA_LIT>MaterializeFP ( CFP , VT ) ; else if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( C ) ) return <ISA_LIT>MaterializeGV ( GV ,


<s> unsigned <ISA_LIT>FastISel :: getLibcallReg ( const Twine & Name ) { Type * GVTy = Type :: getInt32PtrTy ( * Context , <NUM_LIT> ) ; EVT LCREVT = TLI . getValueType ( DL , GVTy ) ; if ( ! LCREVT . isSimple ( ) ) return <NUM_LIT> ; GlobalValue * GV = new GlobalVariable ( M , Type :: getInt32Ty ( * Context ) , false , GlobalValue :: ExternalLinkage , nullptr , Name ) ; assert ( GV -> getType ( ) == GVTy && <STR_LIT> ) ; return <ISA_LIT>MaterializeGV ( GV , LCREVT .


<s> bool <ISA_LIT>FastISel :: is<ISA_LIT>NEONPred ( const MachineInstr * MI ) { const MCInstrDesc & MCID = MI -> getDesc ( ) ; if ( ( MCID . TSFlags & <STR_LIT> ) != <STR_LIT> || AFI -> isThumb2Function ( ) ) return MI -> isPredicable ( ) ; for ( const MCOperandInfo & opInfo : MCID . operands ( ) ) if ( opInfo


<s> if ( evt == <STR_LIT> || ! evt . isSimple ( ) ) return false ; VT = evt . getSimpleVT


<s> Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; break ; } unsigned SrcReg1 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; unsigned SrcReg2 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; unsigned ResultReg = createResultReg ( & <STR_LIT> ) ; SrcReg1 = constrainOperandRegClass ( TII . get ( Opc ) , SrcReg1 , <NUM_LIT> ) ; SrcReg2 = constrainOperandRegClass ( TII . get ( Opc ) , SrcReg2 , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) ,

ResultReg ) . addReg ( SrcReg1 ) . addReg ( SrcReg2 ) ) ;


<s> } else if ( TruncInst * TI = dyn_cast < TruncInst > ( BI -> getCondition ( ) ) ) { MVT SourceVT ; if ( TI -> hasOneUse ( ) && TI -> getParent ( ) == I -> getParent ( ) && ( isLoadTypeLegal ( TI -> getOperand ( <NUM_LIT> ) -> getType ( ) , SourceVT ) ) ) { unsigned TstOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; unsigned OpReg = getRegForValue ( TI -> getOperand ( <NUM_LIT> ) ) ; OpReg = constrainOperandRegClass ( TII . get ( TstOpc ) , OpReg , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TstOpc ) ) . addReg ( OpReg ) . addImm ( <NUM_LIT> ) ) ; unsigned CCMode = <STR_LIT> ; if ( FuncInfo . MBB -> isLayoutSuccessor ( TBB ) ) { std :: swap ( TBB , FBB ) ; CCMode = <STR_LIT> ; } unsigned BrOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( BrOpc ) ) . addMBB ( TBB ) . addImm ( CCMode ) . addReg ( <STR_LIT> ) ; finishCondBranch ( BI -> getParent ( ) , TBB , FBB ) ; return true ; } } else if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( BI -> getCondition ( ) ) ) { uint64_t Imm = CI -> getZExtValue ( ) ; MachineBasicBlock * Target = ( Imm == <NUM_LIT> ) ? FBB : TBB ; fastEmitBranch ( Target , DbgLoc ) ; return true ; } unsigned CmpReg = getRegForValue ( BI -> getCondition ( ) ) ; if ( CmpReg == <NUM_LIT> ) return false ; unsigned TstOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; CmpReg = constrainOperandRegClass ( TII . get ( TstOpc ) ,


<s> unsigned arg_size = CS . arg_size ( ) ; Args . reserve ( arg_size ) ; ArgRegs . reserve ( arg_size ) ; ArgVTs . reserve ( arg_size ) ; ArgFlags . reserve ( arg_size ) ; for ( ImmutableCallSite :: arg_iterator i = CS . arg_begin ( ) , e = CS . arg_end ( ) ; i != e ; ++ i ) { if ( IntrMemName && e - i <= <NUM_LIT> ) break ; <STR_LIT> Flags ; unsigned ArgIdx = i - CS . arg_begin ( ) ; if ( CS . paramHasAttr ( ArgIdx , Attribute :: SExt ) ) Flags . setSExt ( ) ; if ( CS . paramHasAttr ( ArgIdx , Attribute :: ZExt ) ) Flags . setZExt ( ) ; if ( CS . paramHasAttr ( ArgIdx , Attribute :: InReg ) || CS . paramHasAttr ( ArgIdx , Attribute :: StructRet ) || CS . paramHasAttr ( ArgIdx , Attribute :: SwiftSelf ) || CS . paramHasAttr ( ArgIdx , Attribute :: SwiftError ) || CS . paramHasAttr ( ArgIdx , Attribute :: Nest ) || CS . paramHasAttr ( ArgIdx , Attribute :: ByVal ) ) return false ; Type * ArgTy = ( * i ) -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> ) return false ; unsigned Arg = getRegForValue ( * i ) ; if ( Arg == <NUM_LIT> ) return false ; unsigned OriginalAlignment = DL . getABITypeAlignment ( ArgTy ) ; Flags . setOrigAlign ( OriginalAlignment ) ; Args . push_back ( * i ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < unsigned , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , isVarArg ) ) return false ; bool UseReg = false ; const GlobalValue * GV = dyn_cast < GlobalValue > ( Callee ) ; if ( ! GV || Subtarget -> genLongCalls ( ) ) UseReg = true ; unsigned CalleeReg = <NUM_LIT> ; if ( UseReg ) { if ( IntrMemName ) CalleeReg = getLibcallReg ( IntrMemName ) ; else CalleeReg = getRegForValue ( Callee ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( UseReg ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; if ( isThumb2 ) MIB . add ( predOps ( <STR_LIT> ) ) ; if ( UseReg ) MIB . addReg ( CalleeReg ) ; else if ( ! IntrMemName ) MIB . addGlobalAddress ( GV ,


<s> bool <ISA_LIT>FastISel :: SelectCmp ( const Instruction * I ) { const CmpInst * CI = cast < CmpInst > ( I ) ; <STR_LIT> <ISA_LIT>Pred = getComparePred ( CI -> getPredicate ( ) ) ; if ( <ISA_LIT>Pred == <STR_LIT> ) return false ; if ( ! <ISA_LIT>EmitCmp ( CI -> getOperand ( <NUM_LIT> ) , CI -> getOperand ( <NUM_LIT> ) , CI -> isUnsigned ( ) , CI -> isEquality ( ) ) ) return false ; unsigned MovCCOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; unsigned DestReg = createResultReg ( RC ) ; Constant * Zero = ConstantInt :: get ( Type :: getInt32Ty ( * Context ) , <NUM_LIT> ) ; unsigned ZeroReg = fastMaterializeConstant ( Zero ) ; BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( MovCCOpc ) , DestReg ) . addReg ( ZeroReg ) . addImm ( <NUM_LIT> ) . addImm ( <ISA_LIT>Pred ) . addReg ( <STR_LIT> ) ; updateValueMap ( I , DestReg ) ; return


<s> else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I32 : RTLIB :: UDIV_I32 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I64 : RTLIB :: UDIV_I64 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I128 : RTLIB :: UDIV_I128 ; assert ( LC != RTLIB :: UNKNOWN_LIBCALL && <STR_LIT> ) ; return <ISA_LIT>EmitLibcall ( I


<s> if ( ! Subtarget -> hasVFP2 ( ) || Subtarget -> isFPOnlySP ( ) ) return false ; Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! I -> getType ( ) -> isDoubleTy ( ) || ! V -> getType ( ) ->


<s> if ( ! Subtarget -> hasVFP2 ( ) ) return false ; MVT DstVT ; Type * RetTy = I -> getType ( ) ; if ( ! isTypeLegal ( RetTy , DstVT ) ) return false ; unsigned Op = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Opc ; Type * OpTy = I -> getOperand ( <NUM_LIT> ) -> getType ( ) ; if ( OpTy -> isFloatTy ( ) ) Opc =


<s> if ( ! ( I -> getType ( ) -> isFloatTy ( ) && V -> getType ( ) -> isDoubleTy ( ) ) ) return false ; unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Result = createResultReg ( & <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , Result ) . addReg ( Op ) ) ; updateValueMap ( I , Result ) ; return true


<s> bool <ISA_LIT>FastISel :: SelectIndirectBr ( const Instruction * I ) { unsigned AddrReg = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( AddrReg == <NUM_LIT> ) return false ; unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; assert ( isThumb2 || Subtarget -> hasV4TOps ( ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) ) . addReg ( AddrReg ) ) ; const IndirectBrInst * IB = cast < IndirectBrInst


<s> Type * Ty = I -> getType ( ) ; if ( ! isTypeLegal ( Ty , DstVT ) ) return false ; Value * Src = I -> getOperand ( <NUM_LIT> ) ; EVT SrcEVT = TLI . getValueType ( DL , Src -> getType ( ) , true ) ; if ( ! SrcEVT . isSimple ( ) ) return false ; MVT SrcVT = SrcEVT . getSimpleVT ( ) ; if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> && SrcVT != <STR_LIT> ) return false ; unsigned SrcReg = getRegForValue ( Src ) ; if ( SrcReg == <NUM_LIT> ) return false ; if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) { SrcReg = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg , <STR_LIT> , ! isSigned ) ; if ( SrcReg == <NUM_LIT> ) return false ; } unsigned FP = <ISA_LIT>MoveToFPReg ( <STR_LIT> , SrcReg ) ; if ( FP == <NUM_LIT> ) return false ; unsigned Opc ; if ( Ty -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( Ty -> isDoubleTy ( ) && ! Subtarget -> isFPOnlySP ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return false ; unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( DstVT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII

. get ( Opc ) , ResultReg ) . addReg ( FP ) ) ;


<s> if ( ! SrcEVT . isSimple ( ) ) return false ; MVT SrcVT = SrcEVT . getSimpleVT ( ) ; if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> && SrcVT != <STR_LIT> ) return false ; unsigned SrcReg = getRegForValue ( Src ) ; if ( SrcReg == <NUM_LIT> ) return false ; if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) { SrcReg = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg , <STR_LIT> , ! isSigned ) ; if ( SrcReg == <NUM_LIT> ) return false ; } unsigned FP = <ISA_LIT>MoveToFPReg ( <STR_LIT> , SrcReg ) ; if ( FP == <NUM_LIT> ) return false ; unsigned Opc ; if ( Ty -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( Ty -> isDoubleTy ( ) && ! Subtarget -> isFPOnlySP ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return false ; unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( DstVT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII


<s> if ( ! isTypeLegal ( Ty , VT ) ) return false ; if ( ! TLI . hasStandaloneRem ( VT ) ) { return false ; } RTLIB :: Libcall LC = RTLIB :: UNKNOWN_LIBCALL ; if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I8 : RTLIB :: UREM_I8 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I16 : RTLIB :: UREM_I16 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I32 : RTLIB :: UREM_I32 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I64 : RTLIB :: UREM_I64 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I128 :


<s> return false ; } RTLIB :: Libcall LC = RTLIB :: UNKNOWN_LIBCALL ; if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I8 : RTLIB :: UREM_I8 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I16 : RTLIB :: UREM_I16 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I32


<s> unsigned Reg = getRegForValue ( RV ) ; if ( Reg == <NUM_LIT> ) return false ; if ( ValLocs . size ( ) != <NUM_LIT> ) return false ; CCValAssign & VA = ValLocs [ <NUM_LIT> ] ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) return false ; if ( ! VA . isRegLoc ( ) ) return false ; unsigned SrcReg = Reg + VA . getValNo ( ) ; EVT RVEVT = TLI . getValueType ( DL , RV -> getType ( ) ) ; if ( ! RVEVT . isSimple ( ) ) return false ; MVT RVVT = RVEVT . getSimpleVT ( ) ; MVT DestVT = VA . getValVT ( ) ; if ( RVVT != DestVT ) { if ( RVVT != <STR_LIT> && RVVT != <STR_LIT> && RVVT != <STR_LIT> ) return false ; assert ( DestVT == <STR_LIT> && <STR_LIT> ) ; if ( Outs [ <NUM_LIT> ] . Flags . isZExt ( ) || Outs [ <NUM_LIT> ] . Flags . isSExt ( ) ) { SrcReg = <ISA_LIT>EmitIntExt ( RVVT , SrcReg , DestVT , Outs [ <NUM_LIT> ] . Flags . isZExt ( ) ) ; if ( SrcReg == <NUM_LIT> ) return false ; } } unsigned DstReg = VA .


<s> bool UseImm = false ; bool isNegativeImm = false ; if ( const ConstantInt * ConstInt = dyn_cast < ConstantInt > ( I -> getOperand ( <NUM_LIT> ) ) ) { assert ( VT == <STR_LIT> && <STR_LIT> ) ; Imm = ( int ) ConstInt -> getValue ( ) . getZExtValue ( ) ; if ( Imm < <NUM_LIT> ) { isNegativeImm = true ; Imm = ~ Imm ; } UseImm = isThumb2 ? ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) : ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) ; } unsigned Op2Reg = <NUM_LIT> ; if ( ! UseImm ) { Op2Reg = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op2Reg == <NUM_LIT> ) return false ; } unsigned TstOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; CondReg = constrainOperandRegClass ( TII . get ( TstOpc ) , CondReg , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TstOpc ) ) . addReg ( CondReg ) .


<s> EVT SrcVT , DestVT ; SrcVT = TLI . getValueType ( DL , Op -> getType ( ) , true ) ; DestVT = TLI . getValueType ( DL , I -> getType ( ) , true ) ; if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> &&


<s> if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> && SrcVT != <STR_LIT> ) return false ; if ( DestVT != <STR_LIT> && DestVT != <STR_LIT> && DestVT != <STR_LIT> ) return false ; unsigned SrcReg = getRegForValue


<s> bool isICmp = true ; bool needsExt = false ; switch ( SrcVT . SimpleTy ) { default : return false ; case <STR_LIT> : isICmp = false ; if ( isEquality ) CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; else CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : isICmp = false ; if ( isEquality ) CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; else CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : needsExt = true ; case <STR_LIT> : if ( isThumb2 ) { if ( ! UseImm ) CmpOpc = <STR_LIT> ; else CmpOpc = isNegativeImm ? <STR_LIT> : <STR_LIT> ; } else { if ( ! UseImm ) CmpOpc = <STR_LIT> ; else CmpOpc = isNegativeImm ? <STR_LIT> : <STR_LIT> ; } break ; } unsigned SrcReg1 = getRegForValue ( Src1Value ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; unsigned SrcReg2 = <NUM_LIT> ; if ( ! UseImm ) { SrcReg2 = getRegForValue ( Src2Value ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; } if ( needsExt ) { SrcReg1 = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg1 , <STR_LIT> , isZExt ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; if ( ! UseImm ) { SrcReg2 = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg2 , <STR_LIT> , isZExt ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; } } const MCInstrDesc & II = TII . get ( CmpOpc ) ; SrcReg1 = constrainOperandRegClass ( II , SrcReg1 , <NUM_LIT> ) ; if ( ! UseImm ) { SrcReg2 = constrainOperandRegClass ( II , SrcReg2 , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( SrcReg1 ) . addReg ( SrcReg2 ) ) ; } else { MachineInstrBuilder MIB ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( SrcReg1 ) ; if ( isICmp ) MIB . addImm ( Imm ) ; AddOptionalDefs ( MIB ) ; } if ( Ty -> isFloatTy ( ) || Ty -> isDoubleTy ( ) ) AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc


<s> bool UseGOT_PREL = ! TM . shouldAssumeDSOLocal ( * GV -> getParent ( ) , GV ) ; LLVMContext * Context = & MF -> getFunction ( ) -> getContext ( ) ; unsigned <ISA_LIT>PCLabelIndex = AFI -> createPICLabelUId ( ) ; unsigned PCAdj = Subtarget -> isThumb ( ) ? <NUM_LIT> : <NUM_LIT> ; <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GV , <ISA_LIT>PCLabelIndex , <STR_LIT> , PCAdj , UseGOT_PREL ? <STR_LIT> : <STR_LIT> , UseGOT_PREL ) ; unsigned ConstAlign = MF -> getDataLayout ( ) . getPrefTypeAlignment ( Type :: getInt32PtrTy ( * Context ) ) ; unsigned Idx = MF -> getConstantPool ( ) -> getConstantPoolIndex ( CPV , ConstAlign ) ; unsigned TempReg = MF -> getRegInfo ( ) . createVirtualRegister ( & <STR_LIT> ) ; unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc

) , TempReg ) . addConstantPoolIndex ( Idx ) ;


<s> if ( Subtarget -> hasVFP2 ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; } else { return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; } case CallingConv :: <ISA_LIT>_AAPCS_VFP : case CallingConv :: Swift : if ( ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_AAPCS : return ( Return ? RetCC_<ISA_LIT>_AAPCS :


<s> if ( Subtarget -> isAAPCS_ABI ( ) ) { if ( Subtarget -> hasVFP2 ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; } else { return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; } case CallingConv :: <ISA_LIT>_AAPCS_VFP : case CallingConv :: Swift : if ( ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_AAPCS : return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; case CallingConv :: <ISA_LIT>_APCS : return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; case CallingConv :: GHC


<s> } for ( const Argument & Arg : F -> args ( ) ) { if ( Arg . getArgNo ( ) >= <NUM_LIT> ) return false ; if ( Arg . hasAttribute ( Attribute :: InReg ) || Arg . hasAttribute ( Attribute :: StructRet ) || Arg . hasAttribute ( Attribute :: SwiftSelf ) || Arg . hasAttribute ( Attribute :: SwiftError ) || Arg . hasAttribute ( Attribute :: ByVal ) ) return false ; Type * ArgTy = Arg . getType ( ) ; if ( ArgTy -> isStructTy ( ) || ArgTy -> isArrayTy ( ) || ArgTy -> isVectorTy ( ) ) return false ; EVT ArgVT = TLI . getValueType ( DL , ArgTy ) ; if ( ! ArgVT . isSimple ( ) ) return false ; switch ( ArgVT . getSimpleVT ( ) . SimpleTy ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : break ; default : return false ; } } static const MCPhysReg GPRArgRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const TargetRegisterClass * RC = & <STR_LIT> ; for ( const Argument & Arg : F -> args ( ) ) { unsigned ArgNo = Arg . getArgNo ( ) ; unsigned SrcReg = GPRArgRegs [ ArgNo ] ; unsigned DstReg = FuncInfo . MF -> addLiveIn ( SrcReg , RC


<s> const IndirectBrInst * IB = cast < IndirectBrInst > ( I ) ; for ( const BasicBlock * SuccBB : IB -> successors ( ) ) FuncInfo . MBB -> addSuccessor ( FuncInfo . MBBMap [ SuccBB ] ) ; return true


<s> bool CPSR = false ; if ( DefinesOptionalPredicate ( MI , & CPSR ) ) { if ( CPSR ) AddDefaultT1CC ( MIB ) ; else AddDefaultCC ( MIB


<s> if ( is<ISA_LIT>NEONPred ( MI ) ) AddDefaultPred ( MIB ) ; bool CPSR = false ; if ( DefinesOptionalPredicate ( MI , & CPSR ) ) { if ( CPSR ) AddDefaultT1CC


<s> switch ( Opcode ) { default : break ; case Instruction :: BitCast : return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; case Instruction :: IntToPtr : if ( TLI . getValueType ( U -> getOperand ( <NUM_LIT> ) -> getType ( ) ) == TLI . getPointerTy ( ) ) return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; break ; case Instruction :: PtrToInt : if ( TLI . getValueType ( U -> getType ( ) ) == TLI . getPointerTy ( ) ) return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; break ; case Instruction :: GetElementPtr : { Address SavedAddr = Addr ; int TmpOffset = Addr . Offset ; gep_type_iterator GTI = gep_type_begin ( U ) ; for ( User :: const_op_iterator i = U -> op_begin ( ) + <NUM_LIT> , e = U -> op_end ( ) ; i != e ; ++ i , ++ GTI ) { const Value * Op = * i ; if ( StructType * STy = dyn_cast < StructType > ( * GTI ) ) { const StructLayout * SL = DL . getStructLayout ( STy ) ; unsigned Idx = cast < ConstantInt > ( Op ) -> getZExtValue ( ) ; TmpOffset += SL -> getElementOffset ( Idx ) ; } else { uint64_t S = DL . getTypeAllocSize ( GTI . getIndexedType ( ) ) ; for ( ; ; ) { if ( const ConstantInt * CI = dyn_cast < ConstantInt > ( Op ) ) { TmpOffset += CI -> getSExtValue ( ) * S ; break ; } if ( canFoldAddIntoGEP ( U , Op ) ) { ConstantInt * CI = cast < ConstantInt > ( cast < AddOperator > ( Op ) ->


<s> } else if ( const ConstantExpr * C = dyn_cast < ConstantExpr > ( Obj ) ) { Opcode = C -> getOpcode ( ) ; U = C ; } if ( PointerType * Ty = dyn_cast < PointerType > ( Obj -> getType ( ) ) ) if ( Ty -> getAddressSpace ( ) > <NUM_LIT> ) return false ; switch ( Opcode ) { default : break ; case Instruction :: BitCast : return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; case Instruction :: IntToPtr : if ( TLI . getValueType ( U -> getOperand ( <NUM_LIT> ) -> getType ( ) ) == TLI . getPointerTy ( ) ) return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; break ; case Instruction :: PtrToInt : if ( TLI . getValueType ( U -> getType ( ) ) == TLI . getPointerTy ( ) ) return <ISA_LIT>ComputeAddress ( U -> getOperand ( <NUM_LIT> ) , Addr ) ; break ; case Instruction :: GetElementPtr : { Address SavedAddr = Addr ; int TmpOffset = Addr . Offset ; gep_type_iterator GTI = gep_type_begin ( U ) ; for ( User :: const_op_iterator i = U -> op_begin ( ) + <NUM_LIT> , e = U -> op_end ( ) ; i != e ; ++ i , ++ GTI ) { const Value * Op = * i ; if ( StructType * STy = dyn_cast < StructType > ( * GTI ) ) { const StructLayout * SL = DL . getStructLayout ( STy ) ; unsigned Idx = cast < ConstantInt > ( Op ) -> getZExtValue ( ) ; TmpOffset += SL -> getElementOffset ( Idx ) ; } else


<s> for ( unsigned i = <NUM_LIT> ; i < I -> getNumOperands ( ) ; ++ i ) { Value * Op = I -> getOperand ( i ) ; unsigned Arg = getRegForValue ( Op ) ; if ( Arg == <NUM_LIT> ) return false ; Type * ArgTy = Op -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) ) return false ; <STR_LIT> Flags ; unsigned OriginalAlignment = DL . getABITypeAlignment ( ArgTy ) ; Flags . setOrigAlign ( OriginalAlignment ) ; Args . push_back ( Op ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < unsigned , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , false ) ) return false ; unsigned CalleeReg = <NUM_LIT> ; if ( Enable<ISA_LIT>LongCalls ) { CalleeReg = getLibcallReg ( TLI . getLibcallName ( Call ) ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( Enable<ISA_LIT>LongCalls ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; if ( isThumb2 ) AddDefaultPred ( MIB ) ; if ( Enable<ISA_LIT>LongCalls ) MIB . addReg ( CalleeReg ) ; else MIB . addExternalSymbol ( TLI . getLibcallName ( Call ) ) ; for ( unsigned i = <NUM_LIT> , e = RegArgs . size ( ) ; i != e ; ++ i ) MIB . addReg ( RegArgs [ i ] , RegState :: Implicit ) ; MIB . addRegMask ( TRI . getCallPreservedMask ( CC ) ) ; SmallVector < unsigned , <NUM_LIT> > UsedRegs ; if ( ! FinishCall ( RetVT , UsedRegs , I , CC , NumBytes , false ) ) return false ; static_cast < MachineInstr * > ( MIB ) -> setPhysRegsDeadExcept ( UsedRegs , TRI ) ; return true


<s> break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = isZExt ? <STR_LIT> : <STR_LIT> ; else Opc = isZExt ? <STR_LIT> : <STR_LIT> ; } else { Opc = isZExt ? <STR_LIT> : <STR_LIT> ; useAM3 = true ; } RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = <STR_LIT> ; else Opc = <STR_LIT> ; } else { Opc = <STR_LIT> ; } RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) { needVMOV = true ; VT = <STR_LIT> ; Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; } else { Opc = <STR_LIT> ; RC = TLI . getRegClassFor ( VT ) ; } break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) return false ; Opc = <STR_LIT> ; RC = TLI . getRegClassFor ( VT ) ; break ; } <ISA_LIT>SimplifyAddress ( Addr , VT , useAM3 ) ; if ( allocReg ) ResultReg = createResultReg ( RC ) ; assert ( ResultReg > <NUM_LIT> && <STR_LIT> ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) ; AddLoadStoreOperands ( VT , Addr , MIB , MachineMemOperand :: MOLoad , useAM3 ) ; if ( needVMOV ) { unsigned MoveReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , MoveReg ) . addReg ( ResultReg ) ) ; ResultReg = MoveReg ; } return


<s> } else { StrOpc = <STR_LIT> ; } break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) StrOpc = <STR_LIT> ; else StrOpc = <STR_LIT> ; } else { StrOpc = <STR_LIT> ; useAM3 = true ; } break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) StrOpc = <STR_LIT> ; else StrOpc = <STR_LIT> ; } else { StrOpc = <STR_LIT> ; } break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) { unsigned MoveReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , MoveReg ) . addReg ( SrcReg ) ) ; SrcReg = MoveReg ; VT = <STR_LIT> ; StrOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; } else { StrOpc = <STR_LIT> ; } break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) return false ; StrOpc = <STR_LIT> ; break ; } <ISA_LIT>SimplifyAddress ( Addr , VT , useAM3 ) ; SrcReg = constrainOperandRegClass ( TII . get ( StrOpc ) , SrcReg , <NUM_LIT> ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( StrOpc ) ) .


<s> explicit <ISA_LIT>FastISel ( FunctionLoweringInfo & funcInfo , const TargetLibraryInfo * libInfo ) : FastISel ( funcInfo , libInfo ) , M ( const_cast < Module & > ( * funcInfo . Fn -> getParent ( ) ) ) , TM ( funcInfo . MF -> getTarget ( ) ) , TII ( * TM . getInstrInfo ( ) ) , TLI ( * TM . getTargetLowering ( ) ) { Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; AFI = funcInfo . MF -> getInfo < <ISA_LIT>FunctionInfo > ( ) ; isThumb2 = AFI -> isThumbFunction ( ) ; Context = & funcInfo . Fn ->


<s> MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , DestReg ) . addConstantPoolIndex ( Idx ) ; if ( RelocM == Reloc :: PIC_ ) MIB . addImm ( Id ) ; AddOptionalDefs ( MIB ) ; } else { DestReg = constrainOperandRegClass ( TII . get ( <STR_LIT> ) , DestReg , <NUM_LIT> ) ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ; AddOptionalDefs ( MIB ) ; if ( RelocM == Reloc :: PIC_ ) { unsigned Opc = IsIndirect ? <STR_LIT> : <STR_LIT> ; unsigned NewDestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , NewDestReg ) . addReg ( DestReg ) . addImm ( Id ) ; AddOptionalDefs ( MIB ) ; return NewDestReg ; } } } if ( IsIndirect ) { MachineInstrBuilder MIB ; unsigned NewDestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; if ( isThumb2 ) MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , NewDestReg ) . addReg ( DestReg ) .


<s> ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) ; if ( UseImm ) { unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; unsigned ImmReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ImmReg ) . addImm ( Imm ) ) ; return ImmReg ; } } if ( VT != <STR_LIT> ) return false ; unsigned DestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; unsigned Align = DL . getPrefTypeAlignment ( C -> getType ( ) ) ; if ( Align == <NUM_LIT> ) { Align = DL . getTypeAllocSize ( C -> getType ( ) ) ; } unsigned Idx = MCP . getConstantPoolIndex ( C , Align ) ; if ( isThumb2 ) AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) ) ; else { DestReg = constrainOperandRegClass ( TII . get ( <STR_LIT> ) , DestReg , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , DestReg )

. addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ) ;


<s> unsigned <ISA_LIT>FastISel :: <ISA_LIT>MoveToFPReg ( MVT VT , unsigned SrcReg ) { if ( VT == <STR_LIT> ) return <NUM_LIT> ; unsigned MoveReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get (

<STR_LIT> ) , MoveReg ) . addReg ( SrcReg ) ) ;


<s> if ( UseReg ) return isThumb2 ? <STR_LIT> : <STR_LIT> ; else return isThumb2 ? <STR_LIT> :


<s> case <STR_LIT> : if ( ! useAM3 ) { needsLowering = ( ( Addr . Offset & <NUM_LIT> ) != Addr . Offset ) ; if ( needsLowering && isThumb2 ) needsLowering = ! ( Subtarget -> hasV6T2Ops ( ) && Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> ) ; } else { needsLowering = ( Addr . Offset > <NUM_LIT> || Addr . Offset < - <NUM_LIT> ) ; } break ; case <STR_LIT> : case <STR_LIT> : needsLowering = ( ( Addr . Offset & <NUM_LIT> ) != Addr . Offset ) ; break ; } if ( needsLowering && Addr . BaseType == Address :: FrameIndexBase ) { const TargetRegisterClass * RC = isThumb2 ? ( const TargetRegisterClass * ) & <STR_LIT> : ( const TargetRegisterClass * ) & <STR_LIT> ; unsigned ResultReg = createResultReg ( RC ) ; unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) . addFrameIndex ( Addr . Base . FI ) . addImm ( <NUM_LIT> ) ) ; Addr . Base . Reg = ResultReg ; Addr . BaseType = Address :: RegBase


<s> unsigned <ISA_LIT>FastISel :: constrainOperandRegClass ( const MCInstrDesc & II , unsigned Op , unsigned OpNum ) { if ( TargetRegisterInfo :: isVirtualRegister ( Op ) ) { const TargetRegisterClass * RegClass = TII . getRegClass ( II , OpNum , & TRI , * FuncInfo . MF ) ; if ( ! MRI . constrainRegClass ( Op , RegClass )


<s> const <ISA_LIT>Subtarget * Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; bool UseFastISel = false ; UseFastISel |= Subtarget -> isTargetMachO ( ) && ! Subtarget -> isThumb1Only ( ) ; UseFastISel |= Subtarget -> isTargetLinux ( ) && ! Subtarget -> isThumb ( ) ; UseFastISel |= Subtarget -> isTargetNaCl ( ) && ! Subtarget -> isThumb ( ) ; if ( UseFastISel ) { TM . Options . NoFramePointerElim = true ; return new <ISA_LIT>FastISel ( funcInfo , libInfo ) ; } return <NUM_LIT>


<s> UseFastISel |= Subtarget -> isTargetMachO ( ) && ! Subtarget -> isThumb1Only ( ) ; UseFastISel |= Subtarget -> isTargetLinux ( ) && ! Subtarget -> isThumb ( ) ; UseFastISel |= Subtarget -> isTargetNaCl ( ) && ! Subtarget


<s> AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ,


<s> unsigned <ISA_LIT>FastISel :: FastEmitInst_extractsubreg ( MVT RetVT , unsigned Op0 , bool Op0IsKill , uint32_t Idx ) { unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( RetVT ) ) ; assert ( TargetRegisterInfo :: isVirtualRegister ( Op0 ) && <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg )

. addReg ( Op0 , getKillRegState ( Op0IsKill ) , Idx ) ) ;


<s> unsigned ResultReg = createResultReg ( RC ) ; const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addImm ( Imm ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc


<s> if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addImm ( Imm1 ) . addImm ( Imm2 ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addImm ( Imm1 ) . addImm ( Imm2 ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get (

TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ;


<s> if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addImm ( Imm1 ) . addImm ( Imm2 ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addImm ( Imm1 ) . addImm ( Imm2 ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ; } return ResultReg


<s> if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY )

, ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ;


<s> } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ; } return ResultReg


<s> } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ; } return


<s> AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ; } return


<s> AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg


<s> const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; Op1 = constrainOperandRegClass ( II , Op1 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill )


<s> UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UpdateValueMap ( I , ResultReg ) ; } else { assert ( RVLocs . size ( ) == <NUM_LIT> && <STR_LIT> ) ; MVT CopyVT = RVLocs [ <NUM_LIT> ] . getValVT ( ) ; if ( RetVT == <STR_LIT> || RetVT == <STR_LIT> || RetVT == <STR_LIT> ) CopyVT = <STR_LIT> ; const TargetRegisterClass * DstRC = TLI . getRegClassFor ( CopyVT ) ; unsigned ResultReg = createResultReg ( DstRC ) ; BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UpdateValueMap ( I , ResultReg ) ; } } return


<s> unsigned AdjStackUp = TII . getCallFrameDestroyOpcode ( ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( AdjStackUp ) ) . addImm ( NumBytes ) . addImm ( <NUM_LIT> ) ) ; if ( RetVT != <STR_LIT> ) { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CC , isVarArg , * FuncInfo . MF , TM , RVLocs , * Context ) ; CCInfo . AnalyzeCallResult ( RetVT , CCAssignFnForCall ( CC , true , isVarArg ) ) ; if ( RVLocs . size ( ) == <NUM_LIT> && RetVT == <STR_LIT> ) { MVT DestVT = RVLocs [ <NUM_LIT> ] . getValVT ( ) ; const TargetRegisterClass * DstRC = TLI . getRegClassFor ( DestVT ) ; unsigned ResultReg = createResultReg ( DstRC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , ResultReg ) . addReg ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) . addReg ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ) ; UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UpdateValueMap ( I ,


<s> unsigned <ISA_LIT>FastISel :: getLibcallReg ( const Twine & Name ) { Type * GVTy = Type :: getInt32PtrTy ( * Context , <NUM_LIT> ) ; EVT LCREVT = TLI . getValueType ( GVTy ) ; if ( ! LCREVT . isSimple ( ) ) return <NUM_LIT> ; GlobalValue * GV = new GlobalVariable ( M , Type :: getInt32Ty ( * Context ) , false , GlobalValue :: ExternalLinkage , <NUM_LIT> , Name ) ; assert ( GV -> getType ( ) == GVTy && <STR_LIT>


<s> const MCInstrDesc & MCID = MI -> getDesc ( ) ; if ( ( MCID . TSFlags & <STR_LIT> ) != <STR_LIT> || AFI -> isThumb2Function ( ) ) return MI -> isPredicable ( ) ; for ( unsigned i = <NUM_LIT> , e = MCID . getNumOperands ( ) ; i != e ; ++ i ) if ( MCID . OpInfo [ i ] . isPredicate ( ) ) return true ; return false


<s> bool <ISA_LIT>FastISel :: is<ISA_LIT>NEONPred ( const MachineInstr * MI ) { const MCInstrDesc & MCID = MI -> getDesc ( ) ; if ( ( MCID . TSFlags & <STR_LIT> ) != <STR_LIT> || AFI ->

isThumb2Function ( ) ) return MI -> isPredicable ( ) ;


<s> if ( VT == <STR_LIT> || VT == <STR_LIT> || VT == <STR_LIT> ) return true ; return false


<s> EVT evt = TLI . getValueType ( Ty , true ) ; if ( evt == <STR_LIT> || ! evt . isSimple ( ) ) return false ; VT = evt . getSimpleVT


<s> if ( evt == <STR_LIT> || ! evt . isSimple ( ) ) return false ; VT = evt .


<s> break ; } } } NumBytes = CCInfo . getNextStackOffset ( ) ; unsigned AdjStackDown = TII . getCallFrameSetupOpcode ( ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( AdjStackDown ) ) . addImm ( NumBytes ) ) ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; unsigned Arg = ArgRegs [ VA . getValNo ( ) ] ; MVT ArgVT = ArgVTs [ VA . getValNo ( ) ] ; assert ( ( ! ArgVT . isVector ( ) && ArgVT . getSizeInBits ( ) <= <NUM_LIT> ) && <STR_LIT> ) ; switch ( VA . getLocInfo ( ) ) { case CCValAssign :: Full : break ; case CCValAssign :: SExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , false ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: AExt : case CCValAssign :: ZExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , true ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: BCvt : { unsigned BC = FastEmit_r ( ArgVT , VA . getLocVT ( ) , <STR_LIT> , Arg , false ) ; assert ( BC != <NUM_LIT> && <STR_LIT> ) ; Arg = BC ; ArgVT = VA . getLocVT ( ) ; break ; } default : llvm_unreachable ( <STR_LIT> ) ; } if ( VA . isRegLoc ( ) && ! VA . needsCustom ( ) ) { BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , VA . getLocReg ( ) ) . addReg ( Arg ) ; RegArgs . push_back ( VA . getLocReg ( ) ) ; } else if ( VA .


<s> bool is64bit = VT == <STR_LIT> || VT == <STR_LIT> ; switch ( ISDOpcode ) { default : return false ; case <STR_LIT> : Opc = is64bit ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : Opc = is64bit ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : Opc = is64bit ? <STR_LIT> : <STR_LIT> ; break ; } unsigned Op1 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op1 == <NUM_LIT> ) return false ; unsigned Op2 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op2 == <NUM_LIT> )


<s> } unsigned SrcReg1 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; unsigned SrcReg2 = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; unsigned ResultReg = createResultReg ( & <STR_LIT> ) ; SrcReg1 = constrainOperandRegClass ( TII . get ( Opc ) , SrcReg1 , <NUM_LIT> ) ; SrcReg2 = constrainOperandRegClass ( TII . get ( Opc ) , SrcReg2 , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) . addReg ( SrcReg1 ) . addReg ( SrcReg2 ) ) ; UpdateValueMap ( I ,


<s> if ( CS . paramHasAttr ( AttrInd , Attribute :: SExt ) ) Flags . setSExt ( ) ; if ( CS . paramHasAttr ( AttrInd , Attribute :: ZExt ) ) Flags . setZExt ( ) ; if ( CS . paramHasAttr ( AttrInd , Attribute :: InReg ) || CS . paramHasAttr ( AttrInd , Attribute :: StructRet ) || CS . paramHasAttr ( AttrInd , Attribute :: Nest ) || CS . paramHasAttr ( AttrInd , Attribute :: ByVal ) ) return false ; Type * ArgTy = ( * i ) -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> ) return false ; unsigned Arg = getRegForValue ( * i ) ; if ( Arg == <NUM_LIT> ) return false ; unsigned OriginalAlignment = DL . getABITypeAlignment ( ArgTy ) ; Flags . setOrigAlign ( OriginalAlignment ) ; Args . push_back ( * i ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < unsigned , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , isVarArg ) ) return false ; bool UseReg = false ; const GlobalValue * GV = dyn_cast < GlobalValue > ( Callee ) ; if ( ! GV || Enable<ISA_LIT>LongCalls ) UseReg = true ; unsigned CalleeReg = <NUM_LIT> ; if ( UseReg ) { if ( IntrMemName ) CalleeReg = getLibcallReg ( IntrMemName ) ; else CalleeReg = getRegForValue ( Callee ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( UseReg ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; unsigned char OpFlags = <NUM_LIT> ; if ( Subtarget -> isTargetELF ( ) && TM . getRelocationModel ( ) == Reloc ::


<s> else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I32 : RTLIB :: UDIV_I32 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I64 : RTLIB :: UDIV_I64 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I128 : RTLIB :: UDIV_I128 ; assert ( LC != RTLIB :: UNKNOWN_LIBCALL &&


<s> RTLIB :: Libcall LC = RTLIB :: UNKNOWN_LIBCALL ; if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I8 : RTLIB :: UDIV_I8 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I16 : RTLIB :: UDIV_I16 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I32 : RTLIB :: UDIV_I32 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I64 : RTLIB :: UDIV_I64 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SDIV_I128 :


<s> Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! I -> getType ( ) -> isDoubleTy ( ) || ! V -> getType ( ) -> isFloatTy ( ) ) return false ; unsigned Op = getRegForValue


<s> MVT DstVT ; Type * RetTy = I -> getType ( ) ; if ( ! isTypeLegal ( RetTy , DstVT ) ) return false ; unsigned Op = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Opc ; Type * OpTy = I -> getOperand ( <NUM_LIT> ) -> getType ( ) ; if ( OpTy -> isFloatTy ( ) )

Opc = isSigned ? <STR_LIT> : <STR_LIT> ;


<s> if ( ! isTypeLegal ( RetTy , DstVT ) ) return false ; unsigned Op = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Opc ; Type * OpTy = I -> getOperand ( <NUM_LIT> ) -> getType ( ) ; if ( OpTy -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( OpTy -> isDoubleTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return false ; unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc )


<s> if ( ! Subtarget -> hasVFP2 ( ) ) return false ; Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! ( I -> getType ( ) -> isFloatTy ( ) && V -> getType ( ) -> isDoubleTy ( ) ) ) return false ; unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT>


<s> bool <ISA_LIT>FastISel :: SelectIndirectBr ( const Instruction * I ) { unsigned AddrReg = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( AddrReg == <NUM_LIT> ) return false ; unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) ) . addReg ( AddrReg ) ) ; const IndirectBrInst * IB = cast < IndirectBrInst > (


<s> DestReg = createResultReg ( RC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( LdrOpc ) , DestReg ) . addReg ( SrcReg ) . addImm ( <NUM_LIT> ) ) ; SrcReg = DestReg ; } UpdateValueMap ( & I , SrcReg ) ; return true ; } case <STR_LIT> : case <STR_LIT> : { const MemTransferInst & MTI = cast < MemTransferInst > ( I ) ; if ( MTI . isVolatile ( ) ) return false ; bool isMemCpy = ( I . getIntrinsicID ( ) == <STR_LIT> ) ; if ( isa < ConstantInt > ( MTI . getLength ( ) ) && isMemCpy ) { uint64_t Len = cast < ConstantInt > ( MTI . getLength ( ) ) -> getZExtValue ( ) ; if ( <ISA_LIT>IsMemCpySmall ( Len ) ) { Address Dest , Src ; if ( ! <ISA_LIT>ComputeAddress ( MTI . getRawDest ( ) , Dest ) || ! <ISA_LIT>ComputeAddress ( MTI . getRawSource ( ) , Src ) ) return false ; unsigned Alignment = MTI . getAlignment ( ) ; if ( <ISA_LIT>TryEmitSmallMemCpy ( Dest , Src , Len ,


<s> if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> && SrcVT != <STR_LIT> ) return false ; unsigned SrcReg = getRegForValue ( Src ) ; if ( SrcReg == <NUM_LIT> ) return false ; if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) { SrcReg = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg , <STR_LIT> , ! isSigned ) ; if ( SrcReg == <NUM_LIT> ) return false ; } unsigned FP = <ISA_LIT>MoveToFPReg ( <STR_LIT> , SrcReg ) ; if ( FP == <NUM_LIT> ) return false ; unsigned Opc ; if ( Ty -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( Ty -> isDoubleTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return


<s> bool <ISA_LIT>FastISel :: SelectLoad ( const Instruction * I ) { if ( cast < LoadInst > ( I ) -> isAtomic ( ) ) return false ; MVT VT ; if ( ! isLoadTypeLegal ( I -> getType ( ) , VT ) ) return false ; Address Addr ; if ( ! <ISA_LIT>ComputeAddress ( I -> getOperand ( <NUM_LIT> ) , Addr ) ) return false ; unsigned ResultReg ; if ( ! <ISA_LIT>EmitLoad ( VT , ResultReg , Addr , cast < LoadInst > ( I ) -> getAlignment


<s> MVT VT ; Type * Ty = I -> getType ( ) ; if ( ! isTypeLegal ( Ty , VT ) ) return false ; RTLIB :: Libcall LC = RTLIB :: UNKNOWN_LIBCALL ; if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I8 : RTLIB :: UREM_I8 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I16 :


<s> if ( ! isTypeLegal ( Ty , VT ) ) return false ; RTLIB :: Libcall LC = RTLIB :: UNKNOWN_LIBCALL ; if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I8 : RTLIB :: UREM_I8 ; else if ( VT == <STR_LIT> ) LC = isSigned ? RTLIB :: SREM_I16 : RTLIB :: UREM_I16 ; else if ( VT == <STR_LIT> ) LC = isSigned

? RTLIB :: SREM_I32 : RTLIB :: UREM_I32 ;


<s> unsigned Reg = getRegForValue ( RV ) ; if ( Reg == <NUM_LIT> ) return false ; if ( ValLocs . size ( ) != <NUM_LIT> ) return false ; CCValAssign & VA = ValLocs [ <NUM_LIT> ] ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) return false ; if ( ! VA . isRegLoc ( ) ) return false ; unsigned SrcReg = Reg + VA . getValNo ( ) ; EVT RVEVT = TLI . getValueType ( RV -> getType ( ) ) ; if ( ! RVEVT . isSimple ( ) ) return false ; MVT RVVT = RVEVT . getSimpleVT ( ) ; MVT DestVT = VA . getValVT ( ) ; if ( RVVT != DestVT ) { if ( RVVT != <STR_LIT> && RVVT != <STR_LIT> && RVVT != <STR_LIT> ) return false ; assert ( DestVT == <STR_LIT> && <STR_LIT> ) ; if ( Outs [ <NUM_LIT> ] . Flags . isZExt ( ) || Outs [ <NUM_LIT> ] .


<s> unsigned MovCCOpc ; const TargetRegisterClass * RC ; if ( ! UseImm ) { RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; MovCCOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; } else { RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; if ( ! isNegativeImm ) MovCCOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; else MovCCOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; } unsigned ResultReg = createResultReg ( RC ) ; if ( ! UseImm ) { Op2Reg = constrainOperandRegClass ( TII . get ( MovCCOpc ) , Op2Reg , <NUM_LIT> ) ; Op1Reg = constrainOperandRegClass ( TII . get ( MovCCOpc ) , Op1Reg , <NUM_LIT> ) ; BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( MovCCOpc ) , ResultReg ) . addReg ( Op2Reg ) . addReg ( Op1Reg ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; } else { Op1Reg = constrainOperandRegClass ( TII . get ( MovCCOpc ) , Op1Reg , <NUM_LIT> ) ; BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( MovCCOpc ) , ResultReg ) . addReg ( Op1Reg ) . addImm ( Imm ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; } UpdateValueMap ( I , ResultReg ) ; return


<s> if ( SrcReg == <NUM_LIT> ) return false ; Address Addr ; if ( ! <ISA_LIT>ComputeAddress ( I -> getOperand ( <NUM_LIT> ) , Addr ) ) return false ; if ( ! <ISA_LIT>EmitStore ( VT , SrcReg , Addr , cast < StoreInst > (

I ) -> getAlignment ( ) ) ) return false ;


<s> MVT VT = CEVT . getSimpleVT ( ) ; if ( const ConstantFP * CFP = dyn_cast < ConstantFP > ( C ) ) return <ISA_LIT>MaterializeFP ( CFP , VT ) ; else if ( const GlobalValue * GV = dyn_cast < GlobalValue > ( C ) ) return <ISA_LIT>MaterializeGV ( GV , VT ) ; else if ( isa < ConstantInt > ( C ) ) return


<s> if ( Addr . BaseType == Address :: FrameIndexBase ) { int FI = Addr . Base . FI ; int Offset = Addr . Offset ; MachineMemOperand * MMO = FuncInfo . MF -> getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( * FuncInfo . MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlignment ( FI ) ) ; MIB . addFrameIndex ( FI ) ; if ( useAM3 ) { signed Imm = ( Addr . Offset < <NUM_LIT> ) ? ( <NUM_LIT> | - Addr . Offset ) : Addr . Offset ; MIB . addReg ( <NUM_LIT> ) ; MIB . addImm ( Imm ) ; } else { MIB . addImm ( Addr . Offset ) ; } MIB . addMemOperand (


<s> CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : isICmp = false ; CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : needsExt = true ; case <STR_LIT> : if ( isThumb2 ) { if ( ! UseImm ) CmpOpc = <STR_LIT> ; else CmpOpc = isNegativeImm ? <STR_LIT> : <STR_LIT> ; } else { if ( ! UseImm ) CmpOpc = <STR_LIT> ; else CmpOpc = isNegativeImm ? <STR_LIT> : <STR_LIT> ; } break ; } unsigned SrcReg1 = getRegForValue ( Src1Value ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; unsigned SrcReg2 = <NUM_LIT> ; if ( ! UseImm ) { SrcReg2 = getRegForValue ( Src2Value ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; } if ( needsExt ) { SrcReg1 = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg1 , <STR_LIT> , isZExt ) ; if ( SrcReg1 == <NUM_LIT> ) return false ; if ( ! UseImm ) { SrcReg2 = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg2 , <STR_LIT> , isZExt ) ; if ( SrcReg2 == <NUM_LIT> ) return false ; } } const MCInstrDesc & II = TII . get ( CmpOpc ) ; SrcReg1 = constrainOperandRegClass ( II , SrcReg1 , <NUM_LIT> ) ; if ( ! UseImm ) { SrcReg2 = constrainOperandRegClass ( II , SrcReg2 , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( SrcReg1 ) . addReg ( SrcReg2 ) ) ; } else { MachineInstrBuilder


<s> CalleeReg = getLibcallReg ( TLI . getLibcallName ( Call ) ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( Subtarget -> genLongCalls ( ) ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; if ( isThumb2 ) AddDefaultPred ( MIB ) ; if ( Subtarget -> genLongCalls ( ) ) MIB . addReg ( CalleeReg ) ; else MIB . addExternalSymbol ( TLI . getLibcallName ( Call ) ) ; for ( unsigned i = <NUM_LIT> , e = RegArgs . size ( ) ; i != e ; ++ i ) MIB . addReg ( RegArgs [ i ] , RegState :: Implicit ) ; MIB . addRegMask ( TRI . getCallPreservedMask ( * FuncInfo . MF , CC ) ) ; SmallVector < unsigned , <NUM_LIT> > UsedRegs ; if ( ! FinishCall ( RetVT , UsedRegs , I , CC , NumBytes , false ) ) return false ; static_cast < MachineInstr * > ( MIB ) -> setPhysRegsDeadExcept ( UsedRegs , TRI ) ; return true


<s> Type * ArgTy = Op -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) ) return false ; <STR_LIT> Flags ; unsigned OriginalAlignment = DL . getABITypeAlignment ( ArgTy ) ; Flags . setOrigAlign ( OriginalAlignment ) ; Args . push_back ( Op ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < unsigned , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , false ) ) return false ; unsigned CalleeReg = <NUM_LIT> ; if ( Subtarget -> genLongCalls ( ) ) { CalleeReg = getLibcallReg ( TLI . getLibcallName ( Call ) ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( Subtarget -> genLongCalls ( ) ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; if ( isThumb2 ) AddDefaultPred ( MIB ) ; if ( Subtarget -> genLongCalls ( ) ) MIB . addReg ( CalleeReg ) ; else MIB . addExternalSymbol ( TLI . getLibcallName ( Call ) ) ; for ( unsigned i = <NUM_LIT> , e = RegArgs . size ( ) ; i != e ; ++ i ) MIB . addReg ( RegArgs [ i ] , RegState :: Implicit ) ; MIB . addRegMask ( TRI . getCallPreservedMask ( * FuncInfo . MF , CC ) ) ; SmallVector < unsigned ,


<s> if ( ! Subtarget -> isAAPCS_ABI ( ) ) return ( Return ? RetFastCC_<ISA_LIT>_APCS : FastCC_<ISA_LIT>_APCS ) ; return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; } case CallingConv :: C : if ( Subtarget -> isAAPCS_ABI ( ) ) { if ( Subtarget -> hasVFP2 ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ? RetCC_<ISA_LIT>_AAPCS :


<s> const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; Op1 = constrainOperandRegClass ( II , Op1 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , ResultReg ) . addReg ( II . ImplicitDefs [ <NUM_LIT> ] ) ) ; } return


<s> const MCInstrDesc & II = TII . get ( MachineInstOpcode ) ; Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; Op1 = constrainOperandRegClass ( II , Op1 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) . addReg ( Op1 , Op1IsKill * RegState :: Kill ) . addImm ( Imm ) ) ; } else


<s> switch ( ArgVT . SimpleTy ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; break ; } } } NumBytes = CCInfo . getNextStackOffset ( ) ; unsigned AdjStackDown = TII . getCallFrameSetupOpcode ( ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( AdjStackDown ) ) . addImm ( NumBytes ) ) ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; const Value * ArgVal = Args [ VA . getValNo ( ) ] ; unsigned Arg = ArgRegs [ VA . getValNo ( ) ] ; MVT ArgVT = ArgVTs [ VA . getValNo ( ) ] ; assert ( ( ! ArgVT . isVector ( ) && ArgVT . getSizeInBits ( ) <= <NUM_LIT> ) && <STR_LIT> ) ; switch ( VA . getLocInfo ( ) ) { case CCValAssign :: Full : break ; case CCValAssign :: SExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , false ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: AExt : case CCValAssign :: ZExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , true ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: BCvt : { unsigned BC = fastEmit_r ( ArgVT , VA . getLocVT ( ) , <STR_LIT> , Arg , false ) ; assert ( BC != <NUM_LIT> && <STR_LIT>


<s> unsigned AttrInd = i - CS . arg_begin ( ) + <NUM_LIT> ; if ( CS . paramHasAttr ( AttrInd , Attribute :: SExt ) ) Flags . setSExt ( ) ; if ( CS . paramHasAttr ( AttrInd , Attribute :: ZExt ) ) Flags . setZExt ( ) ; if ( CS . paramHasAttr ( AttrInd , Attribute :: InReg ) || CS . paramHasAttr ( AttrInd , Attribute :: StructRet ) || CS . paramHasAttr ( AttrInd , Attribute :: Nest ) || CS . paramHasAttr ( AttrInd , Attribute :: ByVal ) ) return false ; Type * ArgTy = ( * i ) -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> && ArgVT != <STR_LIT> ) return false ; unsigned Arg = getRegForValue ( * i ) ; if ( Arg == <NUM_LIT> ) return false ; unsigned OriginalAlignment = DL . getABITypeAlignment ( ArgTy ) ; Flags . setOrigAlign ( OriginalAlignment ) ; Args . push_back ( * i ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < unsigned , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , isVarArg ) ) return false ; bool UseReg = false ; const GlobalValue * GV = dyn_cast < GlobalValue > ( Callee ) ; if ( ! GV || Subtarget -> genLongCalls ( ) ) UseReg = true ; unsigned CalleeReg = <NUM_LIT> ; if ( UseReg ) { if ( IntrMemName ) CalleeReg = getLibcallReg


<s> if ( <ISA_LIT>Pred == <STR_LIT> ) return false ; if ( ! <ISA_LIT>EmitCmp ( CI -> getOperand ( <NUM_LIT> ) , CI -> getOperand ( <NUM_LIT> ) , CI -> isUnsigned ( ) ) ) return false ; unsigned MovCCOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; unsigned DestReg = createResultReg ( RC ) ; Constant * Zero = ConstantInt :: get ( Type :: getInt32Ty ( *


<s> Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! I -> getType ( ) -> isDoubleTy ( ) || ! V -> getType ( ) -> isFloatTy ( ) ) return false ; unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Result = createResultReg ( & <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , Result )


<s> bool <ISA_LIT>FastISel :: SelectFPExt ( const Instruction * I ) { if ( ! Subtarget -> hasVFP2 ( ) ) return false ; Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! I -> getType ( ) -> isDoubleTy ( ) || ! V -> getType ( ) -> isFloatTy ( ) ) return false ; unsigned Op = getRegForValue (


<s> MVT DstVT ; Type * RetTy = I -> getType ( ) ; if ( ! isTypeLegal ( RetTy , DstVT ) ) return false ; unsigned Op = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Opc ; Type * OpTy = I -> getOperand ( <NUM_LIT> ) -> getType ( ) ; if ( OpTy -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( OpTy -> isDoubleTy ( ) ) Opc = isSigned


<s> if ( Op == <NUM_LIT> ) return false ; unsigned Result = createResultReg ( & <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , Result ) . addReg ( Op ) ) ; updateValueMap ( I


<s> if ( ! Subtarget -> hasVFP2 ( ) ) return false ; Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! ( I -> getType ( ) -> isFloatTy ( ) && V -> getType ( ) -> isDoubleTy ( ) ) ) return false ; unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT> )


<s> const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; const <ISA_LIT>BaseRegisterInfo * RegInfo = static_cast < const <ISA_LIT>BaseRegisterInfo * > ( Subtarget -> getRegisterInfo ( ) ) ; unsigned FramePtr = RegInfo -> getFrameRegister ( * ( FuncInfo . MF ) ) ; unsigned SrcReg = FramePtr ; unsigned DestReg ; unsigned Depth = cast < ConstantInt > ( I . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; while ( Depth -- ) { DestReg = createResultReg ( RC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( LdrOpc ) , DestReg ) . addReg ( SrcReg ) . addImm ( <NUM_LIT> ) ) ; SrcReg = DestReg ; } updateValueMap ( & I , SrcReg ) ; return true ; } case <STR_LIT> : case <STR_LIT> : { const MemTransferInst & MTI = cast < MemTransferInst > ( I ) ; if ( MTI . isVolatile ( ) ) return false ; bool isMemCpy = ( I . getIntrinsicID ( ) == <STR_LIT> ) ; if ( isa < ConstantInt > ( MTI . getLength ( ) ) && isMemCpy ) { uint64_t Len = cast < ConstantInt > ( MTI . getLength ( ) ) -> getZExtValue ( ) ; if ( <ISA_LIT>IsMemCpySmall ( Len ) ) { Address Dest , Src ; if ( ! <ISA_LIT>ComputeAddress ( MTI . getRawDest ( ) , Dest ) || ! <ISA_LIT>ComputeAddress ( MTI . getRawSource ( ) , Src ) ) return false ; unsigned Alignment = MTI . getAlignment ( ) ; if ( <ISA_LIT>TryEmitSmallMemCpy ( Dest , Src , Len , Alignment ) ) return true ; } } if ( ! MTI . getLength ( ) -> getType ( ) ->

isIntegerTy ( <NUM_LIT> ) ) return false ;


<s> bool <ISA_LIT>FastISel :: SelectIntrinsicCall ( const IntrinsicInst & I ) { switch ( I . getIntrinsicID ( ) ) { default : return false ; case <STR_LIT> : { MachineFrameInfo * MFI = FuncInfo . MF -> getFrameInfo ( ) ; MFI -> setFrameAddressIsTaken ( true ) ; unsigned LdrOpc = isThumb2 ? <STR_LIT> : <STR_LIT> ; const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; const <ISA_LIT>BaseRegisterInfo * RegInfo = static_cast < const <ISA_LIT>BaseRegisterInfo * > ( Subtarget -> getRegisterInfo ( ) ) ; unsigned FramePtr = RegInfo -> getFrameRegister ( * ( FuncInfo . MF ) ) ; unsigned SrcReg = FramePtr ; unsigned DestReg ; unsigned Depth = cast < ConstantInt > ( I . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; while ( Depth -- ) { DestReg = createResultReg ( RC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( LdrOpc ) , DestReg ) . addReg ( SrcReg ) . addImm ( <NUM_LIT> ) ) ; SrcReg = DestReg ; } updateValueMap ( & I , SrcReg ) ; return true ; } case <STR_LIT> : case <STR_LIT> : { const MemTransferInst & MTI = cast < MemTransferInst > ( I ) ; if ( MTI . isVolatile ( ) ) return false ; bool isMemCpy = ( I . getIntrinsicID ( )


<s> MVT SrcVT = SrcEVT . getSimpleVT ( ) ; if ( SrcVT != <STR_LIT> && SrcVT != <STR_LIT> && SrcVT != <STR_LIT> ) return false ; unsigned SrcReg = getRegForValue ( Src ) ; if ( SrcReg == <NUM_LIT> ) return false ; if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) { SrcReg = <ISA_LIT>EmitIntExt ( SrcVT , SrcReg , <STR_LIT> , ! isSigned ) ; if ( SrcReg == <NUM_LIT> ) return false ; } unsigned FP = <ISA_LIT>MoveToFPReg ( <STR_LIT> , SrcReg ) ; if ( FP == <NUM_LIT> ) return false ; unsigned Opc ; if ( Ty -> isFloatTy ( ) ) Opc = isSigned ?


<s> bool <ISA_LIT>FastISel :: SelectLoad ( const Instruction * I ) { if ( cast < LoadInst > ( I ) -> isAtomic ( ) ) return false ; MVT VT ; if ( ! isLoadTypeLegal ( I -> getType ( ) , VT ) ) return false ; Address Addr


<s> if ( ValLocs . size ( ) != <NUM_LIT> ) return false ; CCValAssign & VA = ValLocs [ <NUM_LIT> ] ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) return false ; if ( ! VA . isRegLoc ( ) ) return false ; unsigned SrcReg = Reg + VA . getValNo ( ) ; EVT RVEVT = TLI . getValueType ( DL , RV -> getType ( ) ) ; if ( ! RVEVT . isSimple ( ) ) return false ; MVT RVVT = RVEVT . getSimpleVT ( ) ; MVT DestVT = VA . getValVT ( ) ; if ( RVVT != DestVT ) { if ( RVVT != <STR_LIT> && RVVT != <STR_LIT> && RVVT != <STR_LIT> ) return false ; assert ( DestVT == <STR_LIT> && <STR_LIT> ) ; if ( Outs [ <NUM_LIT> ] . Flags . isZExt ( ) || Outs [ <NUM_LIT> ] . Flags . isSExt ( ) ) { SrcReg = <ISA_LIT>EmitIntExt ( RVVT , SrcReg , DestVT , Outs [


<s> MVT VT ; if ( ! isTypeLegal ( I -> getType ( ) , VT ) ) return false ; if ( VT != <STR_LIT> ) return false ; unsigned CondReg = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( CondReg == <NUM_LIT> ) return false ; unsigned Op1Reg = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op1Reg == <NUM_LIT> ) return false ; int Imm = <NUM_LIT> ; bool UseImm = false ; bool isNegativeImm = false ; if ( const ConstantInt * ConstInt = dyn_cast < ConstantInt > ( I -> getOperand ( <NUM_LIT> ) ) ) { assert ( VT == <STR_LIT> && <STR_LIT> ) ; Imm = ( int ) ConstInt -> getValue ( ) . getZExtValue ( ) ; if ( Imm < <NUM_LIT> ) { isNegativeImm = true ; Imm = ~ Imm ; } UseImm = isThumb2 ? ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) : ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) ; } unsigned Op2Reg = <NUM_LIT> ; if ( ! UseImm


<s> bool <ISA_LIT>FastISel :: SelectRet ( const Instruction * I ) { const ReturnInst * Ret = cast < ReturnInst > ( I ) ; const Function & F = * I -> getParent ( ) -> getParent ( ) ; if ( ! FuncInfo . CanLowerReturn ) return false ; if ( TLI . supportSplitCSR ( FuncInfo . MF ) ) return false ; SmallVector < unsigned , <NUM_LIT> > RetRegs ; CallingConv :: ID CC = F . getCallingConv ( ) ; if ( Ret -> getNumOperands ( ) > <NUM_LIT> ) { SmallVector < <STR_LIT> , <NUM_LIT> > Outs ; GetReturnInfo ( F . getReturnType ( ) , F . getAttributes ( ) , Outs , TLI , DL ) ; SmallVector < CCValAssign , <NUM_LIT> > ValLocs ; CCState CCInfo ( CC , F . isVarArg ( ) , * FuncInfo . MF , ValLocs , I -> getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , CCAssignFnForCall ( CC , true , F . isVarArg ( ) ) ) ; const Value * RV = Ret -> getOperand ( <NUM_LIT> ) ; unsigned Reg = getRegForValue ( RV ) ; if ( Reg == <NUM_LIT> )


<s> int Offset = Addr . Offset ; MachineMemOperand * MMO = FuncInfo . MF -> getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( * FuncInfo . MF , FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlign ( FI ) ) ; MIB . addFrameIndex ( FI ) ; if ( useAM3 ) { int Imm = ( Addr . Offset < <NUM_LIT> ) ? ( <NUM_LIT> | - Addr . Offset ) : Addr . Offset ; MIB . addReg ( <NUM_LIT> ) ; MIB . addImm ( Imm ) ; } else { MIB . addImm ( Addr . Offset ) ; } MIB . addMemOperand ( MMO ) ; } else { MIB . addReg ( Addr . Base . Reg ) ; if ( useAM3 ) { int Imm = ( Addr . Offset < <NUM_LIT> ) ? ( <NUM_LIT> | - Addr . Offset ) : Addr . Offset ; MIB . addReg ( <NUM_LIT> )


<s> if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> || SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) { const APInt & CIVal = ConstInt -> getValue ( ) ; Imm = ( isZExt ) ? ( int ) CIVal . getZExtValue ( ) : ( int ) CIVal . getSExtValue ( ) ; if ( Imm < <NUM_LIT> && Imm != ( int ) <NUM_LIT> ) { isNegativeImm = true ; Imm = - Imm ; } UseImm = isThumb2 ? ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) : ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) ; } } else if ( const ConstantFP * ConstFP = dyn_cast < ConstantFP > ( Src2Value ) ) { if ( SrcVT == <STR_LIT> || SrcVT == <STR_LIT> ) if ( ConstFP -> isZero ( ) && ! ConstFP -> isNegative ( ) ) UseImm = true ; } unsigned CmpOpc ; bool isICmp = true ; bool needsExt = false ; switch ( SrcVT . SimpleTy ) { default : return false ; case <STR_LIT> : isICmp = false ; CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : isICmp = false ; CmpOpc = UseImm ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : needsExt = true ; LLVM_FALLTHROUGH ; case <STR_LIT> : if ( isThumb2 ) { if ( ! UseImm )


<s> SmallVector < <STR_LIT> , <NUM_LIT> > ArgFlags ; Args . reserve ( I -> getNumOperands ( ) ) ; ArgRegs . reserve ( I -> getNumOperands ( ) ) ; ArgVTs . reserve ( I -> getNumOperands ( ) ) ; ArgFlags . reserve ( I -> getNumOperands ( ) ) ; for ( Value * Op : I -> operands ( ) ) { unsigned Arg = getRegForValue ( Op ) ; if ( Arg == <NUM_LIT> ) return false ; Type * ArgTy = Op -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) ) return false ; <STR_LIT> Flags ; Flags . setOrigAlign ( Align ( DL . getABITypeAlignment ( ArgTy ) ) ) ; Args . push_back ( Op ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < Register , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , false ) ) return false ; Register CalleeReg ; if ( Subtarget -> genLongCalls ( ) ) { CalleeReg = getLibcallReg ( TLI . getLibcallName ( Call ) ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( Subtarget


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CC , false , * FuncInfo . MF , RVLocs , * Context ) ; CCInfo . AnalyzeCallResult ( RetVT , CCAssignFnForCall ( CC , true , false ) ) ; if ( RVLocs . size ( ) >= <NUM_LIT> && RetVT != <STR_LIT> ) return false ; } SmallVector < Value * , <NUM_LIT> > Args ; SmallVector < Register , <NUM_LIT> > ArgRegs ; SmallVector < MVT , <NUM_LIT> > ArgVTs ; SmallVector < <STR_LIT> , <NUM_LIT> > ArgFlags ; Args . reserve ( I -> getNumOperands ( ) ) ; ArgRegs . reserve ( I -> getNumOperands ( ) ) ; ArgVTs . reserve ( I -> getNumOperands ( ) ) ; ArgFlags . reserve ( I -> getNumOperands ( ) ) ; for ( Value * Op : I -> operands ( ) ) { unsigned Arg = getRegForValue ( Op ) ; if ( Arg == <NUM_LIT> ) return false ; Type * ArgTy = Op -> getType ( ) ; MVT ArgVT ; if ( ! isTypeLegal ( ArgTy , ArgVT ) ) return false ; <STR_LIT> Flags ; Flags . setOrigAlign ( Align ( DL . getABITypeAlignment ( ArgTy ) ) ) ; Args . push_back ( Op ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT


<s> bool is64bit = VT == <STR_LIT> ; if ( TLI . isFPImmLegal ( Val , VT ) ) { int Imm ; unsigned Opc ; if ( is64bit ) { Imm = <STR_LIT> ( Val ) ; Opc = <STR_LIT> ; } else { Imm = <STR_LIT> ( Val ) ; Opc = <STR_LIT> ; } unsigned DestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc )


<s> } else { Imm = <STR_LIT> ( Val ) ; Opc = <STR_LIT> ; } unsigned DestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , DestReg ) . addImm ( Imm ) ) ; return DestReg ; } if ( ! Subtarget -> hasVFP2Base ( ) ) return false ; unsigned Align = DL . getPrefTypeAlignment ( CFP -> getType ( ) ) ; if ( Align == <NUM_LIT> ) { Align = DL . getTypeAllocSize ( CFP -> getType ( ) ) ; } unsigned Idx = MCP . getConstantPoolIndex ( cast < Constant > ( CFP )


<s> bool IsPositionIndependent = isPositionIndependent ( ) ; if ( Subtarget -> useMovt ( ) && ( Subtarget -> isTargetMachO ( ) || ! IsPositionIndependent ) ) { unsigned Opc ; unsigned char TF = <NUM_LIT> ; if ( Subtarget -> isTargetMachO ( ) ) TF = <STR_LIT> ; if ( IsPositionIndependent ) Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; else Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , DestReg ) . addGlobalAddress ( GV , <NUM_LIT> , TF ) ) ; } else { Align Alignment = DL . getPrefTypeAlign ( GV -> getType ( ) ) ; if ( Subtarget -> isTargetELF ( ) && IsPositionIndependent ) return <ISA_LIT>LowerPICELF ( GV , VT ) ; unsigned PCAdj = IsPositionIndependent ? ( Subtarget -> isThumb ( ) ? <NUM_LIT> : <NUM_LIT> ) : <NUM_LIT> ; unsigned Id = AFI -> createPICLabelUId ( ) ; <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GV , Id , <STR_LIT> , PCAdj ) ; unsigned Idx = MCP . getConstantPoolIndex ( CPV , Alignment . value ( ) ) ; MachineInstrBuilder MIB ; if ( isThumb2 ) { unsigned Opc = IsPositionIndependent ? <STR_LIT> :


<s> if ( Subtarget -> isTargetELF ( ) && IsPositionIndependent ) return <ISA_LIT>LowerPICELF ( GV , VT ) ; unsigned PCAdj = IsPositionIndependent ? ( Subtarget -> isThumb ( ) ? <NUM_LIT> : <NUM_LIT> ) : <NUM_LIT> ; unsigned Id = AFI -> createPICLabelUId ( ) ; <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GV , Id , <STR_LIT> , PCAdj ) ; unsigned Idx = MCP . getConstantPoolIndex ( CPV , Alignment . value ( ) ) ; MachineInstrBuilder MIB ; if ( isThumb2 ) { unsigned Opc = IsPositionIndependent ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , DestReg ) . addConstantPoolIndex ( Idx ) ; if ( IsPositionIndependent ) MIB . addImm ( Id ) ; AddOptionalDefs ( MIB ) ; } else { DestReg = constrainOperandRegClass ( TII . get ( <STR_LIT> ) , DestReg , <NUM_LIT> ) ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ; AddOptionalDefs ( MIB ) ; if ( IsPositionIndependent ) { unsigned Opc = IsIndirect ? <STR_LIT> :


<s> unsigned Imm = ( unsigned ) ~ ( CI -> getSExtValue ( ) ) ; bool UseImm = isThumb2 ? ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) : ( <STR_LIT> ( Imm ) != - <NUM_LIT> ) ; if ( UseImm ) { unsigned Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; const TargetRegisterClass * RC = isThumb2 ? & <STR_LIT> : & <STR_LIT> ; unsigned ImmReg = createResultReg ( RC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ImmReg ) . addImm ( Imm ) ) ; return ImmReg ; } } unsigned ResultReg = <NUM_LIT> ; if ( Subtarget -> useMovt ( ) ) ResultReg = fastEmit_i ( VT , VT , <STR_LIT> , CI -> getZExtValue ( ) ) ; if ( ResultReg ) return ResultReg ; if ( VT != <STR_LIT> ) return <NUM_LIT> ; unsigned Align = DL . getPrefTypeAlignment ( C -> getType ( ) ) ; if ( Align == <NUM_LIT> ) { Align = DL . getTypeAllocSize ( C -> getType ( ) ) ; } unsigned Idx = MCP . getConstantPoolIndex ( C , Align ) ; ResultReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; if ( isThumb2 ) AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , ResultReg ) . addConstantPoolIndex ( Idx ) ) ; else { ResultReg = constrainOperandRegClass ( TII . get ( <STR_LIT> ) , ResultReg , <NUM_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) ,

ResultReg ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ) ;


<s> VT = <STR_LIT> ; } } else { if ( Len >= <NUM_LIT> && Alignment == <NUM_LIT> ) VT = <STR_LIT> ; else { VT = <STR_LIT> ; } } bool RV ; Register ResultReg ; RV = <ISA_LIT>EmitLoad ( VT , ResultReg , Src ) ; assert ( RV && <STR_LIT> ) ; RV = <ISA_LIT>EmitStore ( VT , ResultReg , Dest ) ; assert ( RV &&


<s> case CallingConv :: CXX_FAST_TLS : if ( Subtarget -> isAAPCS_ABI ( ) ) { if ( Subtarget -> hasVFP2Base ( ) && TM . Options . FloatABIType == FloatABI :: Hard && ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; else return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; } else { return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; } case CallingConv :: <ISA_LIT>_AAPCS_VFP : case CallingConv :: Swift : if ( ! isVarArg ) return ( Return ? RetCC_<ISA_LIT>_AAPCS_VFP : CC_<ISA_LIT>_AAPCS_VFP ) ; LLVM_FALLTHROUGH ; case CallingConv :: <ISA_LIT>_AAPCS : return ( Return ? RetCC_<ISA_LIT>_AAPCS : CC_<ISA_LIT>_AAPCS ) ; case CallingConv :: <ISA_LIT>_APCS : return ( Return ? RetCC_<ISA_LIT>_APCS : CC_<ISA_LIT>_APCS ) ; case CallingConv :: GHC : if ( Return ) report_fatal_error ( <STR_LIT> ) ; else return


<s> Op0 = constrainOperandRegClass ( II , Op0 , <NUM_LIT> ) ; if ( II . getNumDefs ( ) >= <NUM_LIT> ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II , ResultReg ) . addReg ( Op0 , Op0IsKill * RegState :: Kill ) ) ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , II ) . addReg


<s> bool <ISA_LIT>FastISel :: FinishCall ( MVT RetVT , SmallVectorImpl < Register > & UsedRegs , const Instruction * I , CallingConv :: ID CC , unsigned & NumBytes , bool isVarArg ) { unsigned AdjStackUp = TII . getCallFrameDestroyOpcode ( ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( AdjStackUp ) ) . addImm ( NumBytes ) . addImm ( <NUM_LIT> ) ) ; if ( RetVT != <STR_LIT> ) { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CC , isVarArg , * FuncInfo . MF , RVLocs , * Context ) ; CCInfo . AnalyzeCallResult ( RetVT , CCAssignFnForCall ( CC , true , isVarArg ) ) ; if ( RVLocs . size ( ) == <NUM_LIT> && RetVT == <STR_LIT> ) { MVT DestVT = RVLocs [ <NUM_LIT> ] . getValVT ( ) ; const TargetRegisterClass * DstRC = TLI .


<s> if ( RetVT != <STR_LIT> ) { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CC , isVarArg , * FuncInfo . MF , RVLocs , * Context ) ; CCInfo . AnalyzeCallResult ( RetVT , CCAssignFnForCall ( CC , true , isVarArg ) ) ; if ( RVLocs . size ( ) == <NUM_LIT> && RetVT == <STR_LIT> ) { MVT DestVT = RVLocs [ <NUM_LIT> ] . getValVT ( ) ; const TargetRegisterClass * DstRC = TLI . getRegClassFor ( DestVT ) ; Register ResultReg = createResultReg ( DstRC ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , ResultReg ) . addReg ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) . addReg ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ) ; UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; UsedRegs . push_back ( RVLocs [ <NUM_LIT> ] . getLocReg ( ) ) ; updateValueMap ( I , ResultReg ) ; } else { assert ( RVLocs . size ( ) == <NUM_LIT> && <STR_LIT>


<s> MVT ArgVT = ArgVTs [ VA . getValNo ( ) ] ; assert ( ( ! ArgVT . isVector ( ) && ArgVT . getSizeInBits ( ) <= <NUM_LIT> ) && <STR_LIT> ) ; switch ( VA . getLocInfo ( ) ) { case CCValAssign :: Full : break ; case CCValAssign :: SExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , false ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: AExt : case CCValAssign :: ZExt : { MVT DestVT = VA . getLocVT ( ) ; Arg = <ISA_LIT>EmitIntExt ( ArgVT , Arg , DestVT , true ) ; assert ( Arg != <NUM_LIT> && <STR_LIT> ) ; ArgVT = DestVT ; break ; } case CCValAssign :: BCvt : { unsigned BC = fastEmit_r ( ArgVT , VA . getLocVT ( ) , <STR_LIT> , Arg , false ) ; assert ( BC != <NUM_LIT> && <STR_LIT> ) ; Arg = BC ; ArgVT = VA . getLocVT ( ) ; break ; } default : llvm_unreachable ( <STR_LIT> ) ; } if ( VA . isRegLoc ( ) && ! VA . needsCustom ( ) ) { BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( TargetOpcode :: COPY ) , VA . getLocReg ( ) ) . addReg ( Arg ) ; RegArgs . push_back ( VA . getLocReg ( ) ) ; } else if ( VA . needsCustom ( ) ) { assert ( VA . getLocVT ( ) == <STR_LIT> && <STR_LIT> ) ; CCValAssign & NextVA = ArgLocs [ ++ i ] ; assert ( VA . isRegLoc ( ) && NextVA . isRegLoc ( ) && <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , VA . getLocReg ( ) ) . addReg ( NextVA . getLocReg ( ) , RegState :: Define ) . addReg ( Arg ) ) ; RegArgs . push_back ( VA . getLocReg ( ) ) ; RegArgs . push_back ( NextVA . getLocReg ( ) ) ; } else


<s> Register Arg = getRegForValue ( * i ) ; if ( ! Arg . isValid ( ) ) return false ; Flags . setOrigAlign ( Align ( DL . getABITypeAlignment ( ArgTy ) ) ) ; Args . push_back ( * i ) ; ArgRegs . push_back ( Arg ) ; ArgVTs . push_back ( ArgVT ) ; ArgFlags . push_back ( Flags ) ; } SmallVector < Register , <NUM_LIT> > RegArgs ; unsigned NumBytes ; if ( ! ProcessCallArgs ( Args , ArgRegs , ArgVTs , ArgFlags , RegArgs , CC , NumBytes , isVarArg ) ) return false ; bool UseReg = false ; const GlobalValue * GV = dyn_cast < GlobalValue > ( Callee ) ; if ( ! GV || Subtarget -> genLongCalls ( ) ) UseReg = true ; Register CalleeReg ; if ( UseReg ) { if ( IntrMemName ) CalleeReg = getLibcallReg ( IntrMemName ) ; else CalleeReg = getRegForValue ( Callee ) ; if ( CalleeReg == <NUM_LIT> ) return false ; } unsigned CallOpc = <ISA_LIT>SelectCallOp ( UseReg ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( CallOpc ) ) ; if ( isThumb2 ) MIB . add ( predOps ( <STR_LIT> ) ) ; if ( UseReg ) MIB . addReg ( CalleeReg ) ; else if ( ! IntrMemName ) MIB . addGlobalAddress ( GV , <NUM_LIT> , <NUM_LIT> ) ; else MIB . addExternalSymbol ( IntrMemName , <NUM_LIT> ) ; for ( Register R : RegArgs ) MIB . addReg ( R , RegState :: Implicit ) ; MIB . addRegMask ( TRI . getCallPreservedMask ( * FuncInfo . MF , CC ) ) ; SmallVector < Register , <NUM_LIT> > UsedRegs ; if ( ! FinishCall ( RetVT , UsedRegs , I , CC , NumBytes , isVarArg ) ) return false ; static_cast < MachineInstr * > ( MIB ) -> setPhysRegsDeadExcept ( UsedRegs , TRI ) ; return


<s> bool <ISA_LIT>FastISel :: SelectFPExt ( const Instruction * I ) { if ( ! Subtarget -> hasVFP2Base ( ) || ! Subtarget -> hasFP64 ( ) ) return false ; Value * V = I -> getOperand ( <NUM_LIT> ) ; if ( ! I -> getType ( ) -> isDoubleTy ( ) || ! V -> getType ( ) -> isFloatTy ( ) ) return false ; unsigned Op = getRegForValue ( V )


<s> Type * RetTy = I -> getType ( ) ; if ( ! isTypeLegal ( RetTy , DstVT ) ) return false ; unsigned Op = getRegForValue ( I -> getOperand ( <NUM_LIT> ) ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Opc ; Type * OpTy = I -> getOperand ( <NUM_LIT> ) -> getType ( ) ; if ( OpTy -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( OpTy -> isDoubleTy ( ) && Subtarget -> hasFP64 ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return false ; unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) . addReg ( Op ) ) ; unsigned IntReg = <ISA_LIT>MoveToIntReg ( DstVT , ResultReg ) ; if ( IntReg == <NUM_LIT> ) return false ; updateValueMap ( I , IntReg ) ; return


<s> unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Result = createResultReg ( & <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , Result ) . addReg ( Op ) ) ; updateValueMap ( I ,


<s> unsigned Op = getRegForValue ( V ) ; if ( Op == <NUM_LIT> ) return false ; unsigned Result = createResultReg ( & <STR_LIT> ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( <STR_LIT> ) , Result ) . addReg ( Op ) ) ; updateValueMap ( I , Result ) ; return


<s> unsigned Opc ; if ( Ty -> isFloatTy ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else if ( Ty -> isDoubleTy ( ) && Subtarget -> hasFP64 ( ) ) Opc = isSigned ? <STR_LIT> : <STR_LIT> ; else return false ; unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( DstVT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DbgLoc , TII . get ( Opc ) , ResultReg ) . addReg ( FP ) ) ; updateValueMap ( I , ResultReg ) ; return true


<s> if ( ! isLoadTypeLegal ( I -> getType ( ) , VT ) ) return false ; Address Addr ; if ( ! <ISA_LIT>ComputeAddress ( I -> getOperand ( <NUM_LIT> ) , Addr ) ) return false ; Register ResultReg ; if ( ! <ISA_LIT>EmitLoad ( VT , ResultReg , Addr , cast < LoadInst > ( I ) -> getAlignment ( ) ) ) return false ; updateValueMap ( I ,


<s> Address Addr ; if ( ! <ISA_LIT>ComputeAddress ( I -> getOperand ( <NUM_LIT> ) , Addr ) ) return false ; Register ResultReg ; if ( ! <ISA_LIT>EmitLoad ( VT , ResultReg , Addr , cast < LoadInst > ( I ) -> getAlignment ( ) ) ) return false ; updateValueMap ( I , ResultReg ) ; return true


<s> bool <ISA_LIT>FastISel :: SelectRet ( const Instruction * I ) { const ReturnInst * Ret = cast < ReturnInst > ( I ) ; const Function & F = * I -> getParent ( ) -> getParent ( ) ; if ( ! FuncInfo . CanLowerReturn ) return false ; if ( TLI . supportSwiftError ( ) && F . getAttributes ( ) . hasAttrSomewhere ( Attribute :: SwiftError ) ) return false ; if ( TLI . supportSplitCSR ( FuncInfo . MF ) ) return false ; SmallVector < unsigned , <NUM_LIT> > RetRegs ; CallingConv :: ID CC = F . getCallingConv ( ) ; if ( Ret -> getNumOperands ( ) > <NUM_LIT> ) { SmallVector < <STR_LIT> , <NUM_LIT> > Outs ; GetReturnInfo ( CC , F . getReturnType ( ) , F . getAttributes ( ) , Outs , TLI , DL ) ; SmallVector < CCValAssign , <NUM_LIT> > ValLocs ; CCState CCInfo ( CC , F . isVarArg ( ) , * FuncInfo . MF , ValLocs , I -> getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , CCAssignFnForCall ( CC , true , F . isVarArg ( ) ) ) ; const Value * RV = Ret -> getOperand ( <NUM_LIT> ) ; unsigned Reg = getRegForValue ( RV ) ; if ( Reg == <NUM_LIT> ) return false ; if ( ValLocs . size ( ) != <NUM_LIT> ) return false ; CCValAssign & VA = ValLocs [ <NUM_LIT> ] ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) return false ; if ( ! VA . isRegLoc


<s> case CallingConv :: Fast : case CallingConv :: C : case CallingConv :: <ISA_LIT>_AAPCS_VFP : case CallingConv :: <ISA_LIT>_AAPCS : case CallingConv :: <ISA_LIT>_APCS : break ; } unsigned Idx = <NUM_LIT> ; for ( Function :: const_arg_iterator I = F -> arg_begin ( ) , E = F -> arg_end ( ) ; I != E ; ++ I , ++ Idx ) { if ( Idx > <NUM_LIT> ) return false ; if ( F -> getAttributes ( ) . hasAttribute ( Idx , Attribute :: InReg ) || F -> getAttributes ( ) . hasAttribute ( Idx , Attribute :: StructRet ) || F -> getAttributes ( ) . hasAttribute ( Idx , Attribute :: ByVal ) ) return false ; Type * ArgTy = I -> getType ( ) ; if ( ArgTy -> isStructTy ( ) || ArgTy -> isArrayTy ( ) || ArgTy -> isVectorTy ( ) ) return false ; EVT ArgVT = TLI . getValueType ( DL , ArgTy ) ; if ( ! ArgVT . isSimple ( ) ) return false ; switch ( ArgVT . getSimpleVT ( ) . SimpleTy ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : break ; default : return false ; } } static const uint16_t GPRArgRegs [


<s> MachineMemOperand * MMO = FuncInfo . MF -> getMachineMemOperand ( MachinePointerInfo :: getFixedStack ( FI , Offset ) , Flags , MFI . getObjectSize ( FI ) , MFI . getObjectAlignment ( FI ) ) ; MIB . addFrameIndex ( FI ) ; if ( useAM3 ) { signed Imm = ( Addr . Offset < <NUM_LIT> ) ? ( <NUM_LIT> | - Addr . Offset ) : Addr . Offset ; MIB . addReg ( <NUM_LIT> ) ; MIB . addImm ( Imm ) ; } else { MIB . addImm ( Addr . Offset ) ; } MIB . addMemOperand


<s> else Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : if ( ! Subtarget -> hasV6Ops ( ) ) return <NUM_LIT> ; if ( isZExt ) Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; else Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : if ( isZExt ) { Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; isBoolZext = true ; break ; } return <NUM_LIT> ; } unsigned ResultReg = createResultReg ( TLI . getRegClassFor ( <STR_LIT> ) ) ; MachineInstrBuilder MIB ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( Opc ) , ResultReg ) . addReg ( SrcReg ) ; if ( isBoolZext ) MIB . addImm (


<s> const TargetRegisterClass * RC ; switch ( VT . getSimpleVT ( ) . SimpleTy ) { default : return false ; case <STR_LIT> : case <STR_LIT> : if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = isZExt ? <STR_LIT> : <STR_LIT> ; else Opc = isZExt ? <STR_LIT> : <STR_LIT> ; } else { if ( isZExt ) { Opc = <STR_LIT> ; } else { Opc = <STR_LIT> ; useAM3 = true ; } } RC = & <STR_LIT> ; break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = isZExt ? <STR_LIT> : <STR_LIT> ; else Opc = isZExt ? <STR_LIT> : <STR_LIT> ; } else { Opc = isZExt ? <STR_LIT> : <STR_LIT> ; useAM3 = true ; } RC = & <STR_LIT> ; break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = <STR_LIT> ; else Opc


<s> default : return false ; case <STR_LIT> : case <STR_LIT> : if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = isZExt ? <STR_LIT> : <STR_LIT> ; else Opc = isZExt ? <STR_LIT> : <STR_LIT> ; } else { if ( isZExt ) { Opc = <STR_LIT> ; } else { Opc = <STR_LIT> ; useAM3 = true ; } } RC = & <STR_LIT> ; break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = isZExt ? <STR_LIT> : <STR_LIT> ; else Opc = isZExt ? <STR_LIT> : <STR_LIT> ; } else { Opc = isZExt ? <STR_LIT> : <STR_LIT> ; useAM3 = true ; } RC = & <STR_LIT> ; break ; case <STR_LIT> : if ( Alignment && Alignment < <NUM_LIT> && ! Subtarget -> allowsUnalignedMem ( ) ) return false ; if ( isThumb2 ) { if ( Addr . Offset < <NUM_LIT> && Addr . Offset > - <NUM_LIT> && Subtarget -> hasV6T2Ops ( ) ) Opc = <STR_LIT> ; else Opc = <STR_LIT> ; } else { Opc = <STR_LIT> ; } RC = & <STR_LIT> ; break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) { needVMOV = true ; VT = <STR_LIT> ; Opc = isThumb2 ? <STR_LIT> : <STR_LIT> ; RC = & <STR_LIT> ; } else { Opc = <STR_LIT> ; RC = TLI . getRegClassFor ( VT ) ; } break ; case <STR_LIT> : if ( ! Subtarget -> hasVFP2 ( ) ) return false ; if ( Alignment && Alignment < <NUM_LIT> ) return false ; Opc = <STR_LIT>


<s> unsigned DestReg1 = createResultReg ( TLI . getRegClassFor ( VT ) ) ; if ( isThumb2 ) { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( <STR_LIT> ) , DestReg1 ) . addConstantPoolIndex ( Idx ) ) ; Opc = UseGOTOFF ? <STR_LIT> : <STR_LIT> ; } else { AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( <STR_LIT> ) , DestReg1 ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ) ; Opc = UseGOTOFF ? <STR_LIT> : <STR_LIT> ; } unsigned GlobalBaseReg = AFI -> getGlobalBaseReg ( ) ; if ( GlobalBaseReg == <NUM_LIT> ) { GlobalBaseReg = MRI . createVirtualRegister ( TLI . getRegClassFor ( VT ) ) ; AFI -> setGlobalBaseReg ( GlobalBaseReg ) ; } unsigned DestReg2 = createResultReg ( TLI . getRegClassFor ( VT ) ) ; MachineInstrBuilder MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( Opc ) , DestReg2 ) . addReg ( DestReg1 ) . addReg ( GlobalBaseReg ) ; if ( ! UseGOTOFF ) MIB . addImm ( <NUM_LIT> ) ; AddOptionalDefs ( MIB )


<s> Opc = <STR_LIT> ; } unsigned DestReg = createResultReg ( TLI . getRegClassFor ( VT ) ) ; AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( Opc ) , DestReg ) . addImm ( Imm ) ) ; return DestReg ; } if ( ! Subtarget -> hasVFP2 ( ) ) return false ; unsigned Align = TD . getPrefTypeAlignment ( CFP -> getType ( ) ) ; if ( Align ==


<s> break ; } AddOptionalDefs ( BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( Opc ) , DestReg ) . addGlobalAddress ( GV ) ) ; } else { unsigned Align = TD . getPrefTypeAlignment ( GV -> getType ( ) ) ; if ( Align == <NUM_LIT> ) { Align = TD . getTypeAllocSize ( GV -> getType ( ) ) ; } if ( Subtarget -> isTargetELF ( ) && RelocM == Reloc :: PIC_ ) return <ISA_LIT>LowerPICELF ( GV , Align , VT ) ; unsigned PCAdj = ( RelocM != Reloc :: PIC_ ) ? <NUM_LIT> : ( Subtarget -> isThumb ( ) ? <NUM_LIT> : <NUM_LIT> ) ; unsigned Id = AFI -> createPICLabelUId ( ) ; <ISA_LIT>ConstantPoolValue * CPV = <ISA_LIT>ConstantPoolConstant :: Create ( GV , Id , <STR_LIT> , PCAdj ) ; unsigned Idx = MCP . getConstantPoolIndex ( CPV , Align ) ; MachineInstrBuilder MIB ; if ( isThumb2 ) { unsigned Opc = ( RelocM != Reloc :: PIC_ ) ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( Opc ) , DestReg ) . addConstantPoolIndex ( Idx ) ; if ( RelocM == Reloc :: PIC_ ) MIB . addImm ( Id ) ; AddOptionalDefs ( MIB ) ; } else { MIB = BuildMI ( * FuncInfo . MBB , FuncInfo . InsertPt , DL , TII . get ( <STR_LIT> ) , DestReg ) . addConstantPoolIndex ( Idx ) . addImm ( <NUM_LIT> ) ; AddOptionalDefs ( MIB ) ; if ( RelocM == Reloc :: PIC_ ) { unsigned Opc = IsIndirect ? <STR_LIT>