<s> unsigned ThumbBit = <NUM_LIT> ; unsigned MovtBit = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : break ; case <STR_LIT> : MovtBit = <NUM_LIT> ; if ( A_SD -> getFlags ( ) & SF_ThumbFunc ) FixedValue &= <NUM_LIT> ; break ; case <STR_LIT> : if ( A_SD -> getFlags ( ) & SF_ThumbFunc ) FixedValue &= <NUM_LIT> ; MovtBit = <NUM_LIT> ; case <STR_LIT> : ThumbBit = <NUM_LIT> ; break ; } if ( Type == MachO :: <ISA_LIT>_RELOC_HALF_SECTDIFF ) { uint32_t OtherHalf = MovtBit ? ( FixedValue & <NUM_LIT> ) : ( ( FixedValue & <NUM_LIT> ) >> <NUM_LIT> ) ; MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( OtherHalf << <NUM_LIT> ) | ( MachO :: <ISA_LIT>_RELOC_PAIR << <NUM_LIT> ) | ( MovtBit << <NUM_LIT> ) | ( ThumbBit << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1 = Value2 ; Writer -> addRelocation ( Fragment -> getParent ( ) , MRE ) ; } MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( FixupOffset << <NUM_LIT> ) | ( Type << <NUM_LIT> ) | ( MovtBit << <NUM_LIT> ) | ( ThumbBit << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1 = Value ; Writer -> addRelocation ( Fragment -> getParent


<s> return true ; case FK_Data_8 : Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Branch24Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_ThumbBranch22Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_ThumbBranch22Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return


<s> uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned IsPCRel = Writer -> isFixupKindPCRel ( Asm , Fixup . getKind ( ) ) ; unsigned Type = macho :: RIT_Vanilla ; const MCSymbol * A = & Target . getSymA ( ) -> getSymbol ( ) ; MCSymbolData * A_SD = & Asm . getSymbolData ( * A ) ; if ( ! A_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + A -> getName ( ) + <STR_LIT> ) ; uint32_t Value = Writer -> getSymbolAddress ( A_SD , Layout ) ; uint64_t SecAddr = Writer -> getSectionAddress ( A_SD -> getFragment ( ) -> getParent ( ) ) ; FixedValue += SecAddr ; uint32_t Value2 = <NUM_LIT> ; if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = macho :: RIT_Difference ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( )


<s> if ( IsPCRel && RelocType == macho :: RIT_Vanilla ) Offset += <NUM_LIT> << Log2Size ; if ( Offset && SD && ! Writer -> doesSymbolRequireExternRelocation ( SD ) ) return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , Log2Size , FixedValue ) ; uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned Index = <NUM_LIT> ; unsigned IsExtern = <NUM_LIT> ; unsigned Type = <NUM_LIT> ; if ( Target . isAbsolute ( ) ) { report_fatal_error ( <STR_LIT> <STR_LIT> ) ; } else { if ( SD -> getSymbol ( ) . isVariable ( ) ) { int64_t Res ; if ( SD -> getSymbol ( ) . getVariableValue ( ) -> EvaluateAsAbsolute ( Res , Layout , Writer -> getSectionAddressMap ( ) ) ) { FixedValue = Res ; return ; } } if ( Writer -> doesSymbolRequireExternRelocation


<s> std :: unique_ptr < MCObjectWriter > llvm :: create<ISA_LIT>MachObjectWriter ( raw_pwrite_stream & OS , bool Is64Bit , uint32_t CPUType , uint32_t CPUSubtype ) { return createMachObjectWriter ( llvm :: make_unique < <ISA_LIT>MachObjectWriter > ( Is64Bit , CPUType , CPUSubtype ) , OS


<s> return createMachObjectWriter ( llvm :: make_unique < <ISA_LIT>MachObjectWriter > ( Is64Bit , CPUType , CPUSubtype ) , OS


<s> const MCSymbol * SB = & B -> getSymbol ( ) ; if ( ! SB -> getFragment ( ) ) Asm . getContext ( ) . reportFatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = MachO :: <ISA_LIT>_RELOC_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B -> getSymbol ( ) , Layout ) ; FixedValue -= Writer -> getSectionAddress ( SB -> getFragment ( ) -> getParent ( ) ) ; } if ( Type == MachO :: <ISA_LIT>_RELOC_SECTDIFF || Type == MachO :: <ISA_LIT>_RELOC_LOCAL_SECTDIFF ) { MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( <NUM_LIT> << <NUM_LIT> ) | ( MachO :: <ISA_LIT>_RELOC_PAIR << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1 = Value2 ; Writer -> addRelocation ( nullptr , Fragment -> getParent ( ) , MRE ) ; } MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( FixupOffset << <NUM_LIT> ) | ( Type << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1


<s> unsigned IsPCRel = Writer -> isFixupKindPCRel ( Asm , Fixup . getKind ( ) ) ; const MCSymbol * A = & Target . getSymA ( ) -> getSymbol ( ) ; if ( ! A -> getFragment ( ) ) Asm . getContext ( ) . reportFatalError ( Fixup . getLoc ( ) , <STR_LIT> + A -> getName ( ) + <STR_LIT> ) ; uint32_t Value = Writer -> getSymbolAddress ( * A , Layout ) ; uint64_t SecAddr = Writer -> getSectionAddress ( A -> getFragment ( ) -> getParent ( ) ) ; FixedValue += SecAddr ; uint32_t Value2 = <NUM_LIT> ; if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { assert ( Type == MachO :: <ISA_LIT>_RELOC_VANILLA && <STR_LIT> ) ; const MCSymbol * SB = & B -> getSymbol ( ) ; if ( ! SB -> getFragment ( ) ) Asm . getContext ( ) . reportFatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = MachO :: <ISA_LIT>_RELOC_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B -> getSymbol ( ) , Layout ) ; FixedValue -= Writer -> getSectionAddress ( SB -> getFragment ( ) -> getParent ( ) ) ; } if ( Type == MachO :: <ISA_LIT>_RELOC_SECTDIFF || Type == MachO :: <ISA_LIT>_RELOC_LOCAL_SECTDIFF ) { MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( <NUM_LIT> << <NUM_LIT> ) | ( MachO :: <ISA_LIT>_RELOC_PAIR << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1 = Value2 ; Writer -> addRelocation ( nullptr , Fragment -> getParent ( ) , MRE ) ; } MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( FixupOffset << <NUM_LIT> ) | ( Type << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | MachO :: R_SCATTERED ) ; MRE . r_word1 =


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Branch24Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_ThumbBranch22Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_ThumbBranch22Bit ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Half ) ; Log2Size = <NUM_LIT> ; return true ; case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Half ) ; Log2Size = <NUM_LIT> ; return true ; case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Half ) ; Log2Size = <NUM_LIT> ; return true ; case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( macho :: RIT_<ISA_LIT>_Half


<s> MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) report_fatal_error ( <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = macho :: RIT_Difference ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( ) -> getParent ( ) ) ; } if ( Type == macho :: RIT_Difference || Type == macho :: RIT_Generic_LocalDifference ) { macho :: RelocationEntry MRE ; MRE . Word0 = ( ( <NUM_LIT> << <NUM_LIT> ) | ( macho :: RIT_Pair << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | macho :: RF_Scattered ) ; MRE . Word1 = Value2 ; Writer -> addRelocation ( Fragment -> getParent ( ) , MRE ) ; } macho :: RelocationEntry MRE ; MRE . Word0 = ( ( FixupOffset << <NUM_LIT> ) | ( Type << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | macho :: RF_Scattered ) ; MRE . Word1 = Value ; Writer -> addRelocation ( Fragment -> getParent ( )


<s> report_fatal_error ( <STR_LIT> ) ; return ; } if ( Target . getSymB ( ) ) { if ( RelocType == macho :: RIT_<ISA_LIT>_Half || RelocType == macho :: RIT_<ISA_LIT>_HalfDifference ) return Record<ISA_LIT>MovwMovtRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , FixedValue ) ; return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , Log2Size , FixedValue ) ; } MCSymbolData * SD = <NUM_LIT> ; if ( Target . getSymA ( ) ) SD = & Asm . getSymbolData ( Target . getSymA ( ) -> getSymbol ( ) ) ; uint32_t Offset = Target . getConstant ( ) ; if ( IsPCRel && RelocType == macho :: RIT_Vanilla ) Offset += <NUM_LIT> << Log2Size ; if ( Offset && SD && ! Writer -> doesSymbolRequireExternRelocation ( SD ) ) return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , Log2Size , FixedValue ) ; uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned Index = <NUM_LIT> ; unsigned IsExtern = <NUM_LIT> ; unsigned Type = <NUM_LIT> ; if ( Target . isAbsolute ( ) ) { report_fatal_error ( <STR_LIT> <STR_LIT> ) ; } else { if ( SD -> getSymbol ( ) . isVariable ( ) ) { int64_t Res ; if ( SD -> getSymbol ( ) . getVariableValue ( ) -> EvaluateAsAbsolute ( Res , Layout ,

Writer -> getSectionAddressMap ( ) ) ) {


<s> uint32_t Value2 = <NUM_LIT> ; uint64_t SecAddr = Writer -> getSectionAddress ( A_SD -> getFragment ( ) -> getParent ( ) ) ; FixedValue += SecAddr ; if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) report_fatal_error ( <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = macho :: RIT_<ISA_LIT>_HalfDifference ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( ) -> getParent ( ) ) ; } unsigned ThumbBit = <NUM_LIT> ; unsigned MovtBit = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : break ; case <STR_LIT> : case <STR_LIT> : MovtBit = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : MovtBit = <NUM_LIT> ; case


<s> Type = MachO :: <ISA_LIT>_RELOC_HALF_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B -> getSymbol ( ) , Layout ) ; FixedValue -= Writer -> getSectionAddress ( SB -> getFragment ( ) -> getParent ( ) ) ; } unsigned ThumbBit = <NUM_LIT> ; unsigned MovtBit = <NUM_LIT> ; switch ( Fixup . getTargetKind ( ) ) { default : break ; case <STR_LIT> : MovtBit = <NUM_LIT> ; if ( Asm . isThumbFunc ( A ) ) FixedValue &= <NUM_LIT> ; break ; case <STR_LIT> : if ( Asm . isThumbFunc ( A ) ) FixedValue &= <NUM_LIT> ; MovtBit = <NUM_LIT> ; LLVM_FALLTHROUGH ; case <STR_LIT> : ThumbBit = <NUM_LIT> ; break ; } if ( Type == MachO :: <ISA_LIT>_RELOC_HALF_SECTDIFF ) { uint32_t OtherHalf = MovtBit ? ( FixedValue & <NUM_LIT> ) : ( ( FixedValue & <NUM_LIT> ) >> <NUM_LIT> ) ; MachO :: any_relocation_info MRE ; MRE . r_word0 = ( ( OtherHalf << <NUM_LIT> ) | ( MachO :: <ISA_LIT>_RELOC_PAIR << <NUM_LIT> ) | ( MovtBit << <NUM_LIT> ) | ( ThumbBit << <NUM_LIT> ) | ( IsPCRel

<< <NUM_LIT> ) | MachO :: R_SCATTERED ) ;


<s> uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned IsPCRel = Writer -> isFixupKindPCRel ( Asm , Fixup . getKind ( ) ) ; unsigned Type = MachO :: <ISA_LIT>_RELOC_VANILLA ; const MCSymbol * A = & Target . getSymA ( ) -> getSymbol ( ) ; MCSymbolData * A_SD = & Asm . getSymbolData ( * A ) ; if ( ! A_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + A -> getName ( ) + <STR_LIT> ) ; uint32_t Value = Writer -> getSymbolAddress ( A_SD , Layout ) ; uint64_t SecAddr = Writer -> getSectionAddress ( A_SD ->


<s> } } if ( requiresExternRelocation ( Writer , Asm , * Fragment , RelocType , SD , FixedValue ) ) { IsExtern = <NUM_LIT> ; Index = SD -> getIndex ( ) ; if ( ! SD -> Symbol -> isUndefined ( ) ) FixedValue -= Layout . getSymbolOffset ( SD ) ; } else { const MCSectionData & SymSD = Asm . getSectionData ( SD -> getSymbol ( ) . getSection ( ) ) ; Index = SymSD . getOrdinal ( ) + <NUM_LIT> ; FixedValue += Writer -> getSectionAddress ( & SymSD ) ; } if ( IsPCRel ) FixedValue -= Writer -> getSectionAddress ( Fragment -> getParent ( ) ) ; Type = RelocType ; } MachO :: any_relocation_info MRE ; MRE . r_word0 = FixupOffset ; MRE . r_word1 = ( ( Index << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsExtern << <NUM_LIT> ) | ( Type << <NUM_LIT> ) ) ; if ( Type == MachO :: <ISA_LIT>_RELOC_HALF ) { uint32_t Value = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Value = ( FixedValue >> <NUM_LIT> ) & <NUM_LIT> ; break ; case


<s> } MCSymbolData * SD = <NUM_LIT> ; if ( Target . getSymA ( ) ) SD = & Asm . getSymbolData ( Target . getSymA ( ) -> getSymbol ( ) ) ; uint32_t Offset = Target . getConstant ( ) ; if ( IsPCRel && RelocType == macho :: RIT_Vanilla ) Offset += <NUM_LIT> << Log2Size ; if ( Offset && SD && ! Writer -> doesSymbolRequireExternRelocation ( SD ) ) return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , Log2Size , FixedValue ) ; uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned Index = <NUM_LIT> ; unsigned IsExtern = <NUM_LIT> ; unsigned Type = <NUM_LIT> ; if ( Target . isAbsolute ( ) ) { report_fatal_error ( <STR_LIT> <STR_LIT> ) ; } else { if ( SD -> getSymbol ( ) . isVariable ( ) ) { int64_t Res ; if ( SD -> getSymbol ( ) . getVariableValue ( ) -> EvaluateAsAbsolute ( Res , Layout , Writer -> getSectionAddressMap ( ) ) ) { FixedValue = Res


<s> return createMachObjectWriter ( new <ISA_LIT>MachObjectWriter ( Is64Bit , CPUType , CPUSubtype


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_RELOC_BR24 ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_THUMB_RELOC_BR22 ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_THUMB_RELOC_BR22 ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_RELOC_HALF ) ; Log2Size = <NUM_LIT> ; return true ; case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_RELOC_HALF ) ; Log2Size = <NUM_LIT> ; return true


<s> return true ; case FK_Data_2 : Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case FK_Data_4 : Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case FK_Data_8 : Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : RelocType = unsigned ( MachO :: <ISA_LIT>_RELOC_BR24 ) ; Log2Size = llvm :: Log2_32 ( <NUM_LIT> ) ; return true ; case


<s> unsigned Type = MachO :: <ISA_LIT>_RELOC_HALF ; const MCSymbol * A = & Target . getSymA ( ) -> getSymbol ( ) ; const MCSymbolData * A_SD = & Asm . getSymbolData ( * A ) ; if ( ! A_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + A -> getName ( ) + <STR_LIT> ) ; uint32_t Value = Writer -> getSymbolAddress ( A_SD , Layout ) ; uint32_t Value2 = <NUM_LIT> ; uint64_t SecAddr = Writer -> getSectionAddress ( A_SD -> getFragment ( ) -> getParent ( ) ) ; FixedValue += SecAddr ; if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { const MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = MachO :: <ISA_LIT>_RELOC_HALF_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( ) -> getParent ( ) ) ; } unsigned ThumbBit = <NUM_LIT> ; unsigned MovtBit = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : break ; case <STR_LIT> : MovtBit = <NUM_LIT> ; if ( Asm . isThumbFunc ( A ) ) FixedValue &= <NUM_LIT> ; break ; case <STR_LIT> : if ( Asm . isThumbFunc ( A ) ) FixedValue &= <NUM_LIT> ; MovtBit = <NUM_LIT> ; case


<s> const MCSymbolData * A_SD = & Asm . getSymbolData ( * A ) ; if ( ! A_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + A -> getName ( ) + <STR_LIT> ) ; uint32_t Value = Writer -> getSymbolAddress ( A_SD , Layout ) ; uint64_t SecAddr = Writer -> getSectionAddress ( A_SD -> getFragment ( ) -> getParent ( ) ) ; FixedValue += SecAddr ; uint32_t Value2 = <NUM_LIT> ; if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { assert ( Type == MachO :: <ISA_LIT>_RELOC_VANILLA && <STR_LIT> ) ; const MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = MachO :: <ISA_LIT>_RELOC_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( ) -> getParent ( ) ) ; } if ( Type == MachO :: <ISA_LIT>_RELOC_SECTDIFF || Type == MachO :: <ISA_LIT>_RELOC_LOCAL_SECTDIFF ) { MachO :: any_relocation_info


<s> if ( const MCSymbolRefExpr * B = Target . getSymB ( ) ) { assert ( Type == MachO :: <ISA_LIT>_RELOC_VANILLA && <STR_LIT> ) ; const MCSymbolData * B_SD = & Asm . getSymbolData ( B -> getSymbol ( ) ) ; if ( ! B_SD -> getFragment ( ) ) Asm . getContext ( ) . FatalError ( Fixup . getLoc ( ) , <STR_LIT> + B -> getSymbol ( ) . getName ( ) + <STR_LIT> ) ; Type = MachO :: <ISA_LIT>_RELOC_SECTDIFF ; Value2 = Writer -> getSymbolAddress ( B_SD , Layout ) ; FixedValue -= Writer -> getSectionAddress ( B_SD -> getFragment ( ) -> getParent ( ) ) ; } if ( Type == MachO :: <ISA_LIT>_RELOC_SECTDIFF || Type == MachO


<s> return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , RelocType , Log2Size , FixedValue ) ; } const MCSymbolData * SD = nullptr ; if ( Target . getSymA ( ) ) SD = & Asm . getSymbolData ( Target . getSymA ( ) -> getSymbol ( ) ) ; uint32_t Offset = Target . getConstant ( ) ; if ( IsPCRel && RelocType == MachO :: <ISA_LIT>_RELOC_VANILLA ) Offset += <NUM_LIT> << Log2Size ; if ( Offset && SD && ! Writer -> doesSymbolRequireExternRelocation ( SD ) ) return Record<ISA_LIT>ScatteredRelocation ( Writer , Asm , Layout , Fragment , Fixup , Target , RelocType , Log2Size , FixedValue ) ; uint32_t FixupOffset = Layout . getFragmentOffset ( Fragment ) + Fixup . getOffset ( ) ; unsigned Index = <NUM_LIT> ; unsigned IsExtern = <NUM_LIT> ; unsigned Type = <NUM_LIT> ; if ( Target . isAbsolute ( ) ) { report_fatal_error ( <STR_LIT> <STR_LIT> ) ; } else { if ( SD -> getSymbol ( ) . isVariable ( ) ) { int64_t Res ; if ( SD -> getSymbol ( ) . getVariableValue ( ) -> EvaluateAsAbsolute ( Res , Layout , Writer -> getSectionAddressMap ( ) ) ) { FixedValue = Res ; return ; } } if ( requiresExternRelocation ( Writer , Asm , * Fragment , RelocType , SD , FixedValue ) ) { IsExtern = <NUM_LIT> ; Index = SD -> getIndex ( ) ; if ( ! SD -> Symbol -> isUndefined ( ) ) FixedValue -= Layout . getSymbolOffset ( SD ) ; } else { const MCSectionData & SymSD = Asm . getSectionData ( SD -> getSymbol ( ) . getSection ( ) ) ; Index = SymSD . getOrdinal ( ) + <NUM_LIT> ; FixedValue += Writer -> getSectionAddress ( & SymSD ) ; } if ( IsPCRel ) FixedValue -= Writer -> getSectionAddress ( Fragment -> getParent ( ) ) ; Type = RelocType ; } MachO :: any_relocation_info MRE ; MRE . r_word0 = FixupOffset ; MRE . r_word1 = ( ( Index << <NUM_LIT> ) | ( IsPCRel << <NUM_LIT> ) | ( Log2Size << <NUM_LIT> ) | ( IsExtern << <NUM_LIT> ) | ( Type << <NUM_LIT> ) ) ; if ( Type == MachO :: <ISA_LIT>_RELOC_HALF ) { uint32_t Value = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : break ; case <STR_LIT> : case <STR_LIT> : Value = ( FixedValue >> <NUM_LIT> ) & <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : Value = FixedValue & <NUM_LIT> ; break ; } MachO :: any_relocation_info MREPair ; MREPair . r_word0


<s> Range = <NUM_LIT> ; break ; case MachO :: <ISA_LIT>_THUMB_RELOC_BR22 : Value -= <NUM_LIT> ; Range = <NUM_LIT> ; } const MCSectionData & SymSD = Asm . getSectionData ( SD -> getSymbol ( ) . getSection ( ) ) ; Value += Writer -> getSectionAddress ( & SymSD ) ; Value -= Writer -> getSectionAddress ( Fragment


<s> MCRelocationInfo * llvm :: create<ISA_LIT>MachORelocationInfo ( MCContext & Ctx ) { return new <ISA_LIT>MachORelocationInfo (


<s> MCRelocationInfo * llvm :: create<ISA_LIT>MachORelocationInfo (


<s> unsigned FirstOpcode = FirstMI ? FirstMI -> getOpcode ( ) : static_cast < unsigned > ( <STR_LIT> ) ; unsigned SecondOpcode = SecondMI . getOpcode ( ) ; if ( ST . hasFuseAES ( ) ) switch (


<s> std :: unique_ptr < ScheduleDAGMutation

> create<ISA_LIT>MacroFusionDAGMutation ( ) {


<s> return createMacroFusionDAGMutation (


<s> case <STR_LIT> : return FirstOpcode == <STR_LIT> || FirstOpcode == <STR_LIT> ; case <STR_LIT> : return FirstOpcode == <STR_LIT> || FirstOpcode == <STR_LIT> ; } return false


<s> static bool isLiteralsPair ( const MachineInstr * FirstMI , const MachineInstr & SecondMI ) { unsigned FirstOpcode = FirstMI ? FirstMI -> getOpcode ( ) : static_cast < unsigned > ( <STR_LIT> ) ; unsigned SecondOpcode = SecondMI .


<s> static bool shouldScheduleAdjacent ( const TargetInstrInfo & TII , const TargetSubtargetInfo & TSI , const

MachineInstr * FirstMI , const MachineInstr & SecondMI ) {


<s> static bool shouldScheduleAdjacent ( const TargetInstrInfo & TII , const TargetSubtargetInfo & TSI , const MachineInstr * FirstMI , const MachineInstr & SecondMI ) { const <ISA_LIT>Subtarget & ST = static_cast < const <ISA_LIT>Subtarget & > ( TSI ) ; if ( ST . hasFuseAES ( ) && isAESPair ( FirstMI , SecondMI ) ) return true ; if ( ST . hasFuseLiterals ( ) && isLiteralsPair ( FirstMI , SecondMI ) ) return true ; return


<s> if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( ) == Triple :: thumbeb ) ) IsLittleEndian = false ; AlignmentIsInBytes = false ; Data64bitsDirective = nullptr ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; SupportsDebugInformation = true ; switch ( TheTriple . getOS ( ) ) { case Triple :: Bitrig : case Triple :: NetBSD : ExceptionsType = ExceptionHandling ::


<s> <ISA_LIT>MCAsmInfoDarwin :: <ISA_LIT>MCAsmInfoDarwin ( const Triple & TheTriple ) { if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( ) == Triple :: thumbeb ) ) IsLittleEndian = false ; Data64bitsDirective = nullptr ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive =


<s> <ISA_LIT>MCAsmInfoDarwin :: <ISA_LIT>MCAsmInfoDarwin ( const Triple & TheTriple ) { if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( )

== Triple :: thumbeb ) ) IsLittleEndian = false ;


<s> void <ISA_LIT>ELFMCAsmInfo :: setUseIntegratedAssembler ( bool Value ) { UseIntegratedAssembler =


<s> <ISA_LIT>COFFMCAsmInfoMicrosoft :: <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) { AlignmentIsInBytes =


<s> void setExceptionsType ( ExceptionHandling ::


<s> CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; HasLEB128 = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling ::


<s> Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; HasLEB128 = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: <ISA_LIT> ; UseParensForSymbolVariant =


<s> UseDataRegionDirectives = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling


<s> UseDataRegionDirectives = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling ::


<s> <ISA_LIT>ELFMCAsmInfo :: <ISA_LIT>ELFMCAsmInfo ( ) { AlignmentIsInBytes = false ; Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; LCOMMDirectiveType = LCOMM :: NoAlignment ; HasLEB128 = true ; SupportsDebugInformation = true ; if ( Enable<ISA_LIT>EHABI ) ExceptionsType =


<s> if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( ) == Triple :: thumbeb ) ) IsLittleEndian = false ; Data64bitsDirective = nullptr ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT>


<s> <ISA_LIT>COFFMCAsmInfoMicrosoft :: <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) { AlignmentIsInBytes = false ; ExceptionsType = ExceptionHandling :: WinEH ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; CommentString =


<s> Data64bitsDirective = nullptr ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; SupportsDebugInformation = true ; MaxInstLength = <NUM_LIT> ; switch ( TheTriple . getOS ( ) ) { case Triple :: NetBSD : ExceptionsType = ExceptionHandling ::


<s> SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: WinEH ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT>


<s> AlignmentIsInBytes = false ; Data64bitsDirective = nullptr ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; HasLEB128 = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: <ISA_LIT> ; UseParensForSymbolVariant = true


<s> AlignmentIsInBytes = false ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: WinEH ; WinEHEncodingType = WinEH :: EncodingType :: Itanium ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; CommentString =


<s> CommentString = <STR_LIT> ; HasLEB128 = true ; AbsoluteDebugSectionOffsets = true ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; HasLCOMMDirective = true ; DwarfRequiresFrameSection = false ; SupportsDebugInformation = true


<s> Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: SjLj ; AbsoluteEHSectionOffsets =


<s> <ISA_LIT>MCAsmInfoDarwin :: <ISA_LIT>MCAsmInfoDarwin ( ) { AsmTransCBE = arm_asm_table ; Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling ::


<s> AlignmentIsInBytes = false ; HasSingleParameterDotFile = true ; CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; HasLEB128 = true ; SupportsDebugInformation = true


<s> <ISA_LIT>COFFMCAsmInfoMicrosoft :: <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) { AlignmentIsInBytes =


<s> <ISA_LIT>COFFMCAsmInfoMicrosoft :: <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) { AlignmentIsInBytes = false ; PrivateGlobalPrefix =


<s> Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; UseDataRegionDirectives = true ; SupportsDebugInformation = true ; ExceptionsType = TheTriple . isWatchOS ( ) ? ExceptionHandling :: DwarfCFI : ExceptionHandling :: SjLj ; UseIntegratedAssembler =


<s> WeakRefDirective = <STR_LIT> ; HasLCOMMDirective = true ; DwarfRequiresFrameSection = false ; SupportsDebugInformation =


<s> <ISA_LIT>ELFMCAsmInfo :: <ISA_LIT>ELFMCAsmInfo ( ) { AlignmentIsInBytes = false ; Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; HasLEB128 = true ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective =


<s> AsmTransCBE = arm_asm_table ; Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling


<s> Data64bitsDirective = <NUM_LIT> ; CommentString = <STR_LIT> ; HasLEB128 = true ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; HasLCOMMDirective = true ; DwarfRequiresFrameSection = false ; SupportsDebugInformation = true


<s> CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; SupportsDebugInformation = true ; switch ( TheTriple . getOS ( ) ) { case Triple :: Bitrig : case Triple :: NetBSD : case Triple :: NaCl : ExceptionsType = ExceptionHandling :: DwarfCFI ; break ; default : ExceptionsType = ExceptionHandling ::


<s> Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: DwarfCFI ; UseParensForSymbolVariant = true ; UseIntegratedAssembler = true ; DwarfRegNumForCFI = false


<s> <ISA_LIT>COFFMCAsmInfoMicrosoft :: <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) { AlignmentIsInBytes = false ; ExceptionsType = ExceptionHandling :: WinEH ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT>


<s> CommentString = <STR_LIT> ; Code16Directive = <STR_LIT> ; Code32Directive = <STR_LIT> ; SupportsDebugInformation = true ; switch ( TheTriple . getOS ( ) ) { case Triple :: NetBSD : ExceptionsType = ExceptionHandling :: DwarfCFI ; break ; default : ExceptionsType = ExceptionHandling :: <ISA_LIT> ; break ; } UseParensForSymbolVariant = true ; UseIntegratedAssembler = true


<s> <ISA_LIT>ELFMCAsmInfo :: <ISA_LIT>ELFMCAsmInfo ( const Triple & TheTriple ) { if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( ) == Triple :: thumbeb ) ) IsLittleEndian = false ; AlignmentIsInBytes = false ; Data64bitsDirective =


<s> if ( ( TheTriple . getArch ( ) == Triple :: armeb ) || ( TheTriple . getArch ( ) == Triple :: thumbeb ) ) IsLittleEndian = false ; Data64bitsDirective = nullptr


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; int32_t SImm = MO1 . getImm ( ) ; bool isAdd = true


<s> int Size ; if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize ( ) == <NUM_LIT> ) Size = Desc . getSize ( ) ; else llvm_unreachable ( <STR_LIT> ) ; uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups ) ; if ( isThumb ( ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> , <NUM_LIT> , OS ) ; EmitConstant ( Binary & <NUM_LIT> , <NUM_LIT> , OS ) ; } else EmitConstant ( Binary


<s> unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; uint32_t Binary = getAddrMode2OffsetOpValue ( MI , OpIdx + <NUM_LIT> ,


<s> getAddrMode2OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; uint32_t Binary = getAddrMode2OffsetOpValue ( MI , OpIdx + <NUM_LIT> , Fixups ) ; Binary |= Rn << <NUM_LIT> ; return


<s> bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = get<ISA_LIT>RegisterNumbering ( MO . getReg (


<s> getAddrMode3OffsetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Imm = MO1 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; return Imm8 | ( isAdd << <NUM_LIT> ) | (


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) { unsigned Rn = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = get<ISA_LIT>RegisterNumbering ( MO1 . getReg (


<s> getAddrMode5OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm8 ; bool isAdd ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind (


<s> unsigned <ISA_LIT>MCCodeEmitter :: getAddrMode6AddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg . getReg ( ) ) ; unsigned Align


<s> const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT>


<s> getAddrMode6OffsetOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand (


<s> const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( )


<s> getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd = false ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI ,


<s> const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> <<


<s> getAddrModeISOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned Imm5 = MO1


<s> unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned Imm5 = MO1 . getImm ( ) ; return ( ( Imm5 & <NUM_LIT> ) << <NUM_LIT> ) |


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModePCOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeThumbSPOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI .


<s> assert ( MI . getOperand ( OpIdx ) . getReg ( ) == <STR_LIT> && <STR_LIT> ) ; return MO1 . getImm ( )


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; if ( offset < <NUM_LIT> ) { Val = <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; } Val |=


<s> uint32_t <ISA_LIT>MCCodeEmitter :: get<ISA_LIT>BLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; } return MO . getImm ( )


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx


<s> uint32_t <ISA_LIT>MCCodeEmitter :: get<ISA_LIT>BranchTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx


<s> get<ISA_LIT>BranchTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; } return MO . getImm ( ) >>


<s> const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = CountTrailingZeros_32 ( v ) ; uint32_t msb = ( <NUM_LIT> - CountLeadingZeros_32


<s> if ( isThumb2 ( ) ) return :: getBranchTargetOpValue ( MI


<s> if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind (


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getLdStSORegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned Rm = get<ISA_LIT>RegisterNumbering ( MO1 . getReg ( ) ) ; unsigned ShImm = <STR_LIT> ( MO2 . getImm ( ) ) ; bool isAdd = <STR_LIT> ( MO2 . getImm ( ) ) == <STR_LIT> ; <STR_LIT> ShOp = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned SBits = getShiftOp ( ShOp ) ; uint32_t Binary = Rm ; Binary |= Rn << <NUM_LIT> ; Binary |= SBits << <NUM_LIT> ; Binary |= ShImm << <NUM_LIT> ; if ( isAdd ) Binary


<s> return <NUM_LIT> - MI . getOperand ( Op ) . getImm


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( )


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm


<s> return <NUM_LIT> - MI . getOperand ( Op ) .


<s> getShiftRight32Imm ( const MCInst & MI , unsigned Op ,

SmallVectorImpl < MCFixup > & Fixups ) const {


<s> return <NUM_LIT> - MI . getOperand ( Op


<s> return <NUM_LIT> - MI . getOperand (


<s> int SoImmVal = <STR_LIT> ( SoImm ) ; assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ; unsigned Binary = ( <STR_LIT> ( ( unsigned ) SoImmVal ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= <STR_LIT> ( ( unsigned ) SoImmVal ) ; return


<s> <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> ; return Binary ; } Binary |= SBits << <NUM_LIT> ; unsigned Offset = <STR_LIT> ( MO1 . getImm


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT>


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Binary = get<ISA_LIT>RegisterNumbering ( MO


<s> if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp &


<s> getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = get<ISA_LIT>RegisterNumbering ( MO1 . getReg (


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm8 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT>


<s> assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return


<s> unsigned Value = get<ISA_LIT>RegisterNumbering ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; Value |= get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; Value <<= <NUM_LIT> ; Value |= MO3 . getImm ( ) ; return Value


<s> unsigned <ISA_LIT>MCCodeEmitter :: getT2AddrModeSORegOpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = get<ISA_LIT>RegisterNumbering ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm ( ) ; bool isAdd = Imm8 >= <NUM_LIT> ; if ( Imm8 < <NUM_LIT> ) Imm8 = - Imm8 ; Imm8 /= <NUM_LIT> ; uint32_t Binary = Imm8 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; return


<s> unsigned getT2SOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned SoImm = MI . getOperand ( Op ) . getImm ( ) ; unsigned Encoded = <STR_LIT> ( SoImm


<s> getT2SORegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits


<s> const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO1 . getReg ( ) ) ; unsigned Rm = get<ISA_LIT>RegisterNumbering ( MO2 . getReg ( ) ) ; return ( Rm << <NUM_LIT> ) |


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return MO . getImm


<s> getThumbBCCTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return ( MO . getImm ( )


<s> getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLXTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return encodeThumbBLOffset ( MO . getImm ( )


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBRTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI


<s> if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; return


<s> Triple :: OSType OS = TT . getOS ( ) ; return OS == Triple :: Darwin || OS == Triple ::


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2DupPostEncoder ( const MCInst & MI , unsigned EncodedValue ) const { if ( isThumb2 ( ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return EncodedValue


<s> if ( isThumb2 ( ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return EncodedValue


<s> VFPThumb2PostEncoder ( const MCInst & MI , unsigned EncodedValue ) const { if ( isThumb2 ( )


<s> MCCodeEmitter * llvm :: create<ISA_LIT>BEMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo


<s> MCCodeEmitter * llvm :: create<ISA_LIT>LEMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI ,


<s> MCCodeEmitter * llvm :: create<ISA_LIT>LEMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext &


<s> const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t TSFlags = Desc . TSFlags ; if ( ( TSFlags & <STR_LIT> ) == <STR_LIT> ) return ; int Size ; if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize ( ) == <NUM_LIT> ) Size = Desc . getSize ( ) ; else llvm_unreachable ( <STR_LIT> ) ; uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; if ( isThumb ( STI ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> ,


<s> getAddrMode3OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) { unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind (


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; isAdd = <STR_LIT> ( Imm8 ) == <STR_LIT> ; } uint32_t Binary = <STR_LIT> (


<s> Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; isAdd = <STR_LIT> ( Imm8 ) == <STR_LIT> ; } uint32_t Binary = <STR_LIT> ( Imm8 ) ; if ( isAdd ) Binary |= ( <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr =


<s> const MCExpr * E = MO . getExpr ( ) ; MCFixupKind Kind ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE -> getValue ( ) ; if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable (


<s> if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT>


<s> unsigned getModImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & ST ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind ,


<s> bool SPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; bool DPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |=


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr (


<s> Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } unsigned SoImm = MO . getImm ( ) ; int SoImmVal = <STR_LIT> ( SoImm ) ; assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ; unsigned Binary = ( <STR_LIT> ( ( unsigned ) SoImmVal ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= <STR_LIT> ( ( unsigned ) SoImmVal ) ; return


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg , Imm8 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind (


<s> unsigned Val = <NUM_LIT> ; const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ; bool I = ( Val & <NUM_LIT> ) ; bool J1 = ( Val & <NUM_LIT> ) ; bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; return


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ; bool I = ( Val & <NUM_LIT> ) ; bool J1 = ( Val & <NUM_LIT> ) ; bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &=


<s> const Triple & TT = STI . getTargetTriple ( ) ; return TT . isOSBinFormatMachO


<s> bool isTargetMachO ( const MCSubtargetInfo & STI ) const { const Triple & TT = STI . getTargetTriple


<s> bool isThumb ( const MCSubtargetInfo &


<s> bool isThumb2 ( const MCSubtargetInfo & STI ) const { return isThumb ( STI ) && STI .


<s> return isThumb ( STI ) && STI . getFeatureBits ( ) [


<s> return new <ISA_LIT>MCCodeEmitter ( TM ,


<s> EncodeAddrModeOpValues ( const MCInst & MI , unsigned OpIdx , unsigned & Reg , unsigned & Imm , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = get<ISA_LIT>RegisterNumbering ( MO .


<s> case <STR_LIT> : Size = <NUM_LIT> ; break ; } uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups ) ; if ( Subtarget . isThumb ( ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> , <NUM_LIT> , OS ) ; EmitConstant ( Binary & <NUM_LIT> , <NUM_LIT> , OS ) ; } else EmitConstant ( Binary , Size ,


<s> int Size ; switch ( ( TSFlags & <STR_LIT> ) >> <STR_LIT> ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Size = <NUM_LIT> ; break ; case <STR_LIT> : Size = <NUM_LIT> ; break ; } uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups ) ; if ( Subtarget . isThumb ( ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> , <NUM_LIT> , OS ) ; EmitConstant ( Binary & <NUM_LIT> , <NUM_LIT> , OS ) ; } else EmitConstant ( Binary ,


<s> const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = get<ISA_LIT>RegisterNumbering ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT>


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; }


<s> if ( MO . getReg ( ) == <NUM_LIT> ) return <NUM_LIT> ; return MO . getReg


<s> else Expr = MO2 . getExpr ( ) ; const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; MCFixupKind Kind ; if ( Subtarget . isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg <<


<s> unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) || ( MO . getReg ( ) == <STR_LIT> && MO2 . isExpr ( ) ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd =


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand (


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups


<s> getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { assert ( MI . getOperand ( OpIdx ) . isExpr (


<s> const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT>


<s> { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , } ; if ( Kind < FirstTargetFixupKind ) return MCCodeEmitter :: getFixupKindInfo ( Kind ) ; assert ( unsigned ( Kind - FirstTargetFixupKind )


<s> const MCFixupKindInfo & getFixupKindInfo ( MCFixupKind Kind ) const { const static MCFixupKindInfo Infos [ ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel | MCFixupKindInfo :: FKF_IsAligned } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , } ; if ( Kind < FirstTargetFixupKind ) return MCCodeEmitter :: getFixupKindInfo (


<s> unsigned getImmMinusOneOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { return MI . getOperand ( Op ) . getImm


<s> switch ( Mode ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> :


<s> uint32_t getLdStmModeOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { <STR_LIT> Mode = ( <STR_LIT> ) MI . getOperand ( OpIdx ) . getImm ( ) ; switch ( Mode ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; } llvm_unreachable ( <STR_LIT> ) ; return <NUM_LIT>


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( const MCSymbolRefExpr * Expr = dyn_cast < MCSymbolRefExpr > ( MO . getExpr ( ) ) ) { MCFixupKind


<s> unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands


<s> unsigned getRotImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { switch ( MI . getOperand ( Op ) . getImm ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> : return <NUM_LIT> ; case <NUM_LIT> :


<s> unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; } } else { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT>


<s> MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return Binary


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups


<s> return :: getBranchTargetOpValue ( MI , OpIdx


<s> getThumbCBTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup >


<s> if ( Subtarget . isThumb2 ( ) ) { unsigned Bit24 = EncodedValue & <NUM_LIT> ; unsigned Bit28 = Bit24 <<


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2DupPostEncoder ( const MCInst & MI , unsigned EncodedValue ) const { const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) { EncodedValue &= <NUM_LIT>


<s> const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isThumb2 ( ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return


<s> if ( TM . getSubtarget < <ISA_LIT>Subtarget > ( ) . isThumb2 ( ) ) { EncodedValue &=


<s> bool <ISA_LIT>MCCodeEmitter :: EncodeAddrModeOpValues ( const MCInst & MI , unsigned OpIdx , unsigned & Reg , unsigned & Imm , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; int32_t SImm = MO1 . getImm ( ) ; bool isAdd = true ; if ( SImm == INT32_MIN


<s> getAddrMode2OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI .


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrMode3OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( ! MO . isReg ( ) ) { unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ; return ( Rn << <NUM_LIT> ) | Imm8 | ( isAdd <<


<s> const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align << <NUM_LIT>


<s> const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . getReg ( ) == <NUM_LIT>


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd = false ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind (


<s> unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm5 = MO1 . getImm ( ) ; return ( ( Imm5 & <NUM_LIT> ) << <NUM_LIT> )


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeISOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue


<s> getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ; offset =


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; if ( offset ==


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Rm = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ; unsigned ShImm = <STR_LIT> ( MO2 . getImm ( ) ) ; bool isAdd = <STR_LIT> ( MO2 . getImm ( )


<s> unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg ) ; switch ( Reg ) { default : return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm (


<s> bool SPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; bool DPRRegs = <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( MI . getOperand ( I ) . getReg (


<s> unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) . getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; } } return


<s> getSORegImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT>


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; unsigned Rs = MO1 . getReg ( ) ; if ( Rs ) { switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits


<s> unsigned Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm8 = MO1 . getImm (


<s> unsigned <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI .


<s> unsigned <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum +


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) . getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) &


<s> assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx ,


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI .


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int32_t Val = MO . getImm ( ) ; if ( Val == INT32_MIN ) Val = <NUM_LIT> ; else if ( Val < <NUM_LIT> ) { Val *= -


<s> int32_t Val = MO . getImm ( ) ; if ( Val == INT32_MIN ) Val = <NUM_LIT> ; else if ( Val < <NUM_LIT> ) { Val *= - <NUM_LIT> ; Val |= <NUM_LIT> ; } return Val


<s> getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm (


<s> case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT> ) return Binary ; return Binary | <STR_LIT> ( MO1 . getImm


<s> unsigned Rn = CTX . getRegisterInfo ( ) . getEncodingValue ( MO1 . getReg ( ) ) ; unsigned Rm = CTX . getRegisterInfo ( ) . getEncodingValue ( MO2 . getReg (


<s> MCCodeEmitter * llvm :: create<ISA_LIT>BEMCCodeEmitter ( const MCInstrInfo & MCII , MCContext


<s> MCCodeEmitter * llvm :: create<ISA_LIT>BEMCCodeEmitter ( const MCInstrInfo & MCII ,


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg = <NUM_LIT> , Imm12 = <NUM_LIT> ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isReg ( ) ) { const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; if ( MO1 . isImm ( ) ) { isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups , STI ) ; } else if ( MO1 . isExpr ( ) ) { assert ( ! isThumb ( STI ) && ! isThumb2 ( STI ) && <STR_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; isAdd = false ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO1 . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; } } else if ( MO . isExpr ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; }


<s> assert ( ! isThumb ( STI ) && ! isThumb2 ( STI ) && <STR_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; isAdd = false ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO1 . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; } } else if ( MO . isExpr ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MO . getExpr ( ) , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false


<s> Fixups . push_back ( llvm :: MCFixup :: create ( <NUM_LIT> , DiffExpr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } assert ( MO . isImm ( ) && BranchMO . isImm ( ) ) ; int Diff = MO . getImm ( ) - BranchMO . getImm ( ) ; assert ( Diff == <NUM_LIT> || Diff ==


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; const MCOperand BranchMO = MI . getOperand ( <NUM_LIT> ) ; if ( MO . isExpr ( ) ) { assert ( BranchMO . isExpr ( ) ) ; const MCExpr * DiffExpr = MCBinaryExpr :: createSub ( MO . getExpr ( ) , BranchMO . getExpr ( ) , CTX ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( llvm :: MCFixup :: create ( <NUM_LIT> , DiffExpr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getBFTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI .


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , fixup , Fixups , STI ) ; return isNeg ? - ( MO . getImm ( ) >> <NUM_LIT> )


<s> getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> && <STR_LIT> ) ; return lsb | ( msb << <NUM_LIT>


<s> unsigned <ISA_LIT>MCCodeEmitter :: getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT>


<s> return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO .


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isDFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( bit_cast < double > ( MO . getDFPImm ( ) ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; } llvm_unreachable ( <STR_LIT>


<s> unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; int32_t Imm = M1 . getImm ( ) ; bool isAdd = Imm >= <NUM_LIT> ; Imm >>= shift ; if ( ! isAdd ) Imm = - ( uint32_t ) Imm ; Imm &= <NUM_LIT> ; if ( isAdd ) Imm


<s> Imm >>= shift ; if ( ! isAdd ) Imm = - ( uint32_t ) Imm ; Imm &= <NUM_LIT> ; if ( isAdd ) Imm |= <NUM_LIT> ; assert ( Qm < <NUM_LIT> && <STR_LIT> ) ; return ( Qm << <NUM_LIT> )


<s> const MCOperand & M0 = MI . getOperand ( OpIdx ) ; const MCOperand & M1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M1 . getReg ( ) ) ; assert ( Qm < <NUM_LIT> &&


<s> getMveAddrModeRQOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & M0 = MI . getOperand ( OpIdx ) ; const MCOperand & M1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( M0 . getReg ( ) ) ; unsigned Qm = CTX . getRegisterInfo ( ) -> getEncodingValue ( M1 . getReg ( ) ) ; assert ( Qm < <NUM_LIT> && <STR_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getMVEPairVectorIndexOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT>


<s> getPowerTwoOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; return countTrailingZeros ( ( uint64_t ) MO


<s> bool isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm7 , Fixups , STI ) ; uint32_t Binary = ( Imm7 >> <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm7s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned Reg , Imm7 ; bool isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm7 , Fixups , STI ) ; uint32_t Binary = ( Imm7 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg <<


<s> bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; assert ( ( ( Imm8 & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg


<s> int32_t Imm = MI . getOperand ( OpIdx ) . getImm ( ) ; bool isAdd = Imm >= <NUM_LIT> ; if ( Imm < <NUM_LIT> ) Imm = - ( uint32_t ) Imm ; Imm >>=


<s> unsigned Bit = ( Value >> i ) & <NUM_LIT> ; if ( ( Value & ~ ( ~ <NUM_LIT> << i ) ) == <NUM_LIT> ) { Imm |= ( <NUM_LIT> << i ) ; break ; } if ( Bit != PrevBit ) Imm |= ( <NUM_LIT> << i ) ; PrevBit = Bit ; } return Imm


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getVPTMaskOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; int Value = MO . getImm ( ) ; int Imm = <NUM_LIT> ; unsigned PrevBit = <NUM_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; -- i ) { unsigned Bit = ( Value >> i ) & <NUM_LIT> ; if ( ( Value & ~ ( ~ <NUM_LIT> << i ) ) == <NUM_LIT> ) { Imm |= ( <NUM_LIT> <<


<s> unsigned getExpandedImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { static_assert ( shift <= <NUM_LIT> , <STR_LIT> ) ; const MCOperand MO = MI . getOperand ( Op ) ; return ( invert ? ( MO . getImm ( ) ^ <NUM_LIT>


<s> unsigned getExpandedImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { static_assert ( shift <= <NUM_LIT> , <STR_LIT>


<s> } else { const MCRegisterInfo & MRI = * CTX . getRegisterInfo ( ) ; if ( ! CLRMRegs ) { assert ( std :: is_sorted ( MI . begin ( ) + Op , MI . end ( ) , [ & ] ( const MCOperand & LHS , const MCOperand & RHS ) { return MRI . getEncodingValue ( LHS . getReg ( ) ) < MRI . getEncodingValue ( RHS . getReg ( ) ) ; } ) ) ; } for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo ; if ( CLRMRegs && MI . getOperand ( I ) . getReg ( )


<s> unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= ( Bits + <NUM_LIT> ) ; int32_t tmp = ( int32_t ) MO2 . getImm


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; int32_t SImm = MO1 . getImm ( ) ; bool isAdd = true ; if ( SImm == INT32_MIN ) { SImm = <NUM_LIT> ; isAdd = false ; } if ( SImm < <NUM_LIT> )


<s> int Size ; if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize ( ) == <NUM_LIT> ) Size = Desc . getSize ( ) ; else llvm_unreachable ( <STR_LIT> ) ; uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; if ( isThumb ( STI ) && Size == <NUM_LIT> ) { EmitConstant ( Binary >> <NUM_LIT> , <NUM_LIT> , OS ) ; EmitConstant ( Binary & <NUM_LIT> , <NUM_LIT> , OS


<s> void <ISA_LIT>MCCodeEmitter :: EncodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t TSFlags = Desc . TSFlags ; if ( ( TSFlags & <STR_LIT> ) == <STR_LIT> ) return ; int Size ; if ( Desc . getSize ( ) == <NUM_LIT> || Desc . getSize (

) == <NUM_LIT> ) Size = Desc . getSize ( ) ;


<s> uint32_t S = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t J1 = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; uint32_t J2 = ( offset & <NUM_LIT> ) >> <NUM_LIT> ; J1 = ( ~ J1 & <NUM_LIT> ) ; J2 = ( ~ J2 & <NUM_LIT> ) ; J1 ^= S ; J2 ^= S ; offset &= ~


<s> switch ( Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCExpr :: SymbolRef : return false ; case MCExpr :: Binary


<s> getAddrMode2OffsetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Imm = MO1 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isReg = MO . getReg ( ) != <NUM_LIT> ; uint32_t Binary = <STR_LIT> ( Imm ) ; if ( isReg ) { <STR_LIT> ShOp = <STR_LIT> ( Imm ) ; Binary <<= <NUM_LIT> ; Binary |= getShiftOp ( ShOp


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getAddrMode2OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI


<s> Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; return ( Rn << <NUM_LIT> ) | ( <NUM_LIT> << <NUM_LIT> ) ; } unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm = MO2 . getImm ( ) ; bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO1 . getReg


<s> getAddrMode6AddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg (


<s> getAddrMode6DupAddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ;


<s> getAddrMode6OffsetOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . getReg ( ) == <NUM_LIT> )


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups , STI ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> )


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( STI ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm5 = MO1 .


<s> } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } } else { SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> (


<s> get<ISA_LIT>BLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx


<s> if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; } return MO . getImm ( ) >>


<s> getBitfieldInvertedMaskOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v


<s> const MCOperand & MO = MI . getOperand ( Op ) ; uint32_t v = ~ MO . getImm ( ) ; uint32_t lsb = countTrailingZeros ( v ) ; uint32_t msb = ( <NUM_LIT> - countLeadingZeros ( v ) ) - <NUM_LIT> ; assert ( v != <NUM_LIT> && lsb < <NUM_LIT> && msb < <NUM_LIT> &&


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getBranchTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup >

& Fixups , const MCSubtargetInfo & STI ) const {


<s> unsigned getCCOutOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return MI . getOperand ( Op ) . getReg ( )


<s> unsigned Rm = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; unsigned ShImm = <STR_LIT> ( MO2 . getImm ( ) ) ; bool isAdd = <STR_LIT> ( MO2 . getImm ( ) ) == <STR_LIT> ; <STR_LIT> ShOp = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned SBits = getShiftOp


<s> unsigned Reg = MO . getReg ( ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; switch ( Reg ) { default : return RegNo ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO .


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * RegNo ; } } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; } llvm_unreachable (


<s> return <NUM_LIT> - MI . getOperand ( Op )


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ; return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) )


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; bool isAdd = MO1 . getImm ( ) != <NUM_LIT> ; return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) | ( isAdd


<s> unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> <<


<s> getShiftRight16Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> - MI . getOperand ( Op ) . getImm (


<s> getShiftRight16Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> - MI . getOperand ( Op ) . getImm


<s> return <NUM_LIT> - MI . getOperand ( Op ) .


<s> unsigned <ISA_LIT>MCCodeEmitter :: getShiftRight32Imm ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { return <NUM_LIT> - MI . getOperand ( Op


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { unsigned SoImm = MI . getOperand ( Op ) . getImm ( ) ; int SoImmVal = <STR_LIT> ( SoImm ) ; assert ( SoImmVal != - <NUM_LIT> && <STR_LIT> ) ; unsigned Binary = ( <STR_LIT> ( ( unsigned ) SoImmVal ) >> <NUM_LIT> ) << <STR_LIT> ; Binary |= <STR_LIT> ( ( unsigned )


<s> getT2AddrModeImm0_1020s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm8 = MO1 . getImm ( ) ; return ( Reg << <NUM_LIT> )


<s> getT2AddrModeImm12OffsetOpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; unsigned Value = <NUM_LIT> ; int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; unsigned Value = <NUM_LIT> ; int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value


<s> int32_t tmp = ( int32_t ) MO1 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp & <NUM_LIT> ; return Value


<s> getT2AddrModeImm8OpValue ( const MCInst & MI , unsigned OpNum , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp


<s> assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm8 , Fixups , STI ) ; uint32_t Binary = ( Imm8 >> <NUM_LIT> ) & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg << <NUM_LIT> ) ; return


<s> int32_t Imm8 = MI . getOperand ( OpIdx ) . getImm ( ) ; bool isAdd = Imm8 >= <NUM_LIT> ; if ( Imm8 < <NUM_LIT> ) Imm8 = - ( uint32_t ) Imm8 ; Imm8 /= <NUM_LIT> ; uint32_t Binary = Imm8 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; return


<s> getT2Imm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { int32_t Imm8 = MI . getOperand ( OpIdx )


<s> unsigned SoImm = MI . getOperand ( Op ) . getImm ( ) ; unsigned Encoded = <STR_LIT> ( SoImm


<s> unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits << <NUM_LIT>


<s> getT2SORegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits


<s> const MCOperand & MO1 = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) ->


<s> getThumbAddrModeRegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & , const MCSubtargetInfo & STI ) const { const MCOperand & MO1 = MI . getOperand ( OpIdx ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; unsigned Rm = CTX . getRegisterInfo ( ) ->