<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbAdrLabelOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup

> & Fixups , const MCSubtargetInfo & STI ) const {


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI ,


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return ( MO . getImm (


<s> getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return encodeThumbBLOffset ( MO .


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getThumbBLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx


<s> getThumbBLXTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue (

MI , OpIdx , <STR_LIT> , Fixups , STI ) ;


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return encodeThumbBLOffset ( MO .


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue (


<s> if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx ,


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return ( MO . getImm ( )


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; return ( MO . getImm ( ) >> <NUM_LIT>


<s> bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; return


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups , STI ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ; bool I = ( Val & <NUM_LIT> ) ; bool J1 = ( Val & <NUM_LIT> ) ; bool J2 = ( Val & <NUM_LIT> ) ; if ( I ^ J1 ) Val &= ~ <NUM_LIT> ; else Val |= <NUM_LIT> ; if ( I ^ J2 ) Val &= ~ <NUM_LIT> ; else Val |=


<s> for ( int i = <NUM_LIT> ; i < NumOp - <NUM_LIT> ; ++ i ) { const MCOperand & MCOp1 = MI . getOperand ( i ) ; const MCOperand & MCOp2 = MI . getOperand ( i + <NUM_LIT> ) ; if ( MCOp1 . isImm ( ) && MCOp2 . isReg ( ) && ( MCOp2 . getReg ( ) == <NUM_LIT> || MCOp2 . getReg ( ) == <STR_LIT> ) ) { if ( <STR_LIT> ( MCOp1 . getImm ( ) ) != <STR_LIT> ) return true ; } } } return


<s> bool isThumb ( const MCSubtargetInfo & STI ) const { return ( STI . getFeatureBits ( ) & <STR_LIT> )


<s> return ( STI . getFeatureBits ( ) & <STR_LIT> ) !=


<s> return isThumb ( STI ) && ( STI . getFeatureBits ( ) &


<s> unsigned <ISA_LIT>MCCodeEmitter :: NEONThumb2LoadStorePostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI )


<s> if ( isThumb2 ( STI ) ) { EncodedValue |= <NUM_LIT> ; } return EncodedValue


<s> VFPThumb2PostEncoder ( const MCInst & MI , unsigned EncodedValue , const MCSubtargetInfo & STI ) const { if ( isThumb2 ( STI ) ) { EncodedValue &= <NUM_LIT> ; EncodedValue |= <NUM_LIT> ; } return EncodedValue


<s> MCCodeEmitter * llvm :: create<ISA_LIT>LEMCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ,


<s> if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE -> getValue ( ) ; if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT>


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT>


<s> unsigned getSOImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr


<s> if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } llvm_unreachable (


<s> const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind ( FK_Data_4 ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } return MO .


<s> unsigned getModImmOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & ST ) const { const MCOperand & MO = MI . getOperand ( Op ) ; if ( MO . isExpr


<s> case MCExpr :: SymbolRef : return false ; case MCExpr :: Binary :


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) { if ( HasConditionalBranch ( MI ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; } return MO . getImm ( )


<s> switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind =


<s> MCFixupKind Kind ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : if ( ! isTargetDarwin ( ) && EvaluateAsPCRel ( E ) ) Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; else Kind = MCFixupKind ( isThumb2 ( ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return


<s> bool DPRRegs = llvm :: <ISA_LIT>MCRegisterClasses [ <STR_LIT> ] . contains ( Reg ) ; unsigned Binary = <NUM_LIT> ; if ( SPRRegs || DPRRegs ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg ) ; unsigned NumRegs = ( MI . getNumOperands ( ) - Op ) & <NUM_LIT> ; Binary |= ( RegNo & <NUM_LIT> ) << <NUM_LIT> ; if ( SPRRegs ) Binary |= NumRegs ; else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = get<ISA_LIT>RegisterNumbering ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> << RegNo ; } } return Binary


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : Binary |= <NUM_LIT> ; return Binary ; } Binary |= SBits << <NUM_LIT> ; unsigned Offset = <STR_LIT> ( MO1 . getImm ( ) ) ; assert ( Offset && <STR_LIT> ) ; if ( Offset == <NUM_LIT> ) Offset = <NUM_LIT> ; return Binary | ( Offset << <NUM_LIT> )


<s> return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : Kind = MCFixupKind ( isThumb2 ( STI ) ? <STR_LIT> : <STR_LIT> ) ; break ; } Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , E , Kind , MI . getLoc ( ) ) ) ; return <NUM_LIT> ; } llvm_unreachable ( <STR_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getHiLo16ImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; MCFixupKind Kind ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE -> getValue ( ) ; if ( Value > UINT32_MAX ) report_fatal_error ( <STR_LIT> ) ; switch ( <ISA_LIT>16Expr -> getKind ( ) ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16 : return ( int32_t ( Value ) & <NUM_LIT> ) >> <NUM_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_LO16 : return ( int32_t ( Value ) & <NUM_LIT> ) ; default : llvm_unreachable ( <STR_LIT> ) ; } } switch ( <ISA_LIT>16Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_HI16


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; MCFixupKind Kind ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; if ( const MCConstantExpr * MCE = dyn_cast < MCConstantExpr > ( E ) ) { const int64_t Value = MCE


<s> EncodeAddrModeOpValues ( const MCInst & MI , unsigned OpIdx , unsigned & Reg , unsigned & Imm , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg (


<s> const MCOperand & MO = MI . getOperand ( OpIdx ) ; unsigned Rn = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; uint32_t Binary = getAddrMode2OffsetOpValue ( MI , OpIdx +


<s> uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; return Imm8 | ( isAdd << <NUM_LIT> ) | ( isImm


<s> bool isAdd = <STR_LIT> ( Imm ) == <STR_LIT> ; bool isImm = MO . getReg ( ) == <NUM_LIT> ; uint32_t Imm8 = <STR_LIT> ( Imm ) ; if ( ! isImm ) Imm8 = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO


<s> unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align << <NUM_LIT>


<s> unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT>


<s> unsigned <ISA_LIT>MCCodeEmitter :: getAddrMode6OffsetOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups


<s> getAddrMode6OneLane32AddressOpValue ( const MCInst & MI , unsigned Op , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & Reg = MI . getOperand ( Op ) ; const MCOperand & Imm = MI . getOperand ( Op + <NUM_LIT> ) ; unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ; break ; } return RegNo | ( Align


<s> int SoImmVal ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ; SoImmVal = <NUM_LIT> ; } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } }


<s> else Binary |= NumRegs * <NUM_LIT> ; } else { for ( unsigned I = Op , E = MI . getNumOperands ( ) ; I < E ; ++ I ) { unsigned RegNo = CTX . getRegisterInfo ( ) -> getEncodingValue ( MI . getOperand ( I ) . getReg ( ) ) ; Binary |= <NUM_LIT> <<


<s> unsigned <ISA_LIT>MCCodeEmitter :: getSORegImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits =


<s> getSORegRegOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; const MCOperand & MO2 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; <STR_LIT> SOpc = <STR_LIT> ( MO2 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO .


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm0_1020s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; const MCOperand & MO1 = MI . getOperand ( OpIdx + <NUM_LIT> ) ; unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg (


<s> unsigned Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned Imm8 = MO1 . getImm ( ) ; return ( Reg << <NUM_LIT> )


<s> const MCOperand & MO1 = MI . getOperand ( OpNum ) ; const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT> ; int32_t tmp = ( int32_t ) MO2 . getImm ( ) ; if ( tmp < <NUM_LIT> ) tmp = abs ( tmp ) ; else Value |= <NUM_LIT> ; Value |= tmp


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getT2AddrModeImm8s4OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm8 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO .


<s> const MCOperand & MO2 = MI . getOperand ( OpNum + <NUM_LIT> ) ; const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<=


<s> const MCOperand & MO3 = MI . getOperand ( OpNum + <NUM_LIT> ) ; unsigned Value = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO1 . getReg ( ) ) ; Value <<= <NUM_LIT>


<s> <STR_LIT> SOpc = <STR_LIT> ( MO1 . getImm ( ) ) ; unsigned Binary = CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; unsigned SBits = <NUM_LIT> ; switch ( SOpc ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : SBits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : SBits = <NUM_LIT> ; break ; } Binary |= SBits << <NUM_LIT> ; if ( SOpc == <STR_LIT>


<s> if ( isThumb2 ( ) ) { EncodedValue |=


<s> if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT>


<s> if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations


<s> unsigned RegNo = get<ISA_LIT>RegisterNumbering ( Reg . getReg ( ) ) ; unsigned Align = <NUM_LIT> ; switch ( Imm . getImm ( ) ) { default : break ; case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : case <NUM_LIT> : Align = <NUM_LIT> ; break ; case <NUM_LIT> : Align = <NUM_LIT> ;


<s> getAddrModeImm12OpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { unsigned Reg , Imm12 ; bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; isAdd = false ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd = false ; } Imm12 = Offset ; } } else isAdd = EncodeAddrModeOpValues ( MI , OpIdx , Reg , Imm12 , Fixups ) ; uint32_t Binary = Imm12 & <NUM_LIT> ; if ( isAdd ) Binary |= ( <NUM_LIT> << <NUM_LIT> ) ; Binary |= ( Reg <<


<s> uint32_t <ISA_LIT>MCCodeEmitter :: getHiLo16ImmOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( MO . isImm ( ) ) return static_cast < unsigned > ( MO . getImm ( ) ) ; const MCExpr * E = MO . getExpr ( ) ; if ( E -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>16Expr = cast < <ISA_LIT>MCExpr > ( E ) ; E = <ISA_LIT>16Expr -> getSubExpr ( ) ; MCFixupKind Kind


<s> bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind


<s> bool isAdd = true ; const MCOperand & MO = MI . getOperand ( OpIdx ) ; if ( ! MO . isReg ( ) ) { Reg = get<ISA_LIT>RegisterNumbering ( <STR_LIT> ) ; Imm8 = <NUM_LIT> ; isAdd = false ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCFixupKind Kind = MCFixupKind (


<s> Reg = CTX . getRegisterInfo ( ) -> getEncodingValue ( <STR_LIT> ) ; Imm12 = <NUM_LIT> ; if ( MO . isExpr ( ) ) { const MCExpr * Expr = MO . getExpr ( ) ; isAdd = false ; MCFixupKind Kind ; if ( isThumb2 ( ) ) Kind = MCFixupKind ( <STR_LIT> ) ; else Kind = MCFixupKind ( <STR_LIT> ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , Kind , MI . getLoc ( ) ) ) ; ++ MCNumCPRelocations ; } else { Reg = <STR_LIT> ; int32_t Offset = MO . getImm ( ) ; if ( Offset == INT32_MIN ) { Offset = <NUM_LIT> ; isAdd = false ; } else if ( Offset < <NUM_LIT> ) { Offset *= - <NUM_LIT> ; isAdd =


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) return :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; int64_t offset = MO . getImm ( ) ; uint32_t Val = <NUM_LIT> ; int SoImmVal ; if ( offset == INT32_MIN ) { Val = <NUM_LIT> ; SoImmVal = <NUM_LIT> ; } else if ( offset < <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } } else { SoImmVal = <STR_LIT> ( offset ) ; if ( SoImmVal == - <NUM_LIT> ) { Val = <NUM_LIT> ; offset *= - <NUM_LIT> ; SoImmVal = <STR_LIT> ( offset ) ; } } assert ( SoImmVal != - <NUM_LIT>


<s> const MCOperand MO = MI . getOperand ( OpIdx ) ; if ( MO . isExpr ( ) ) Val = :: getBranchTargetOpValue ( MI , OpIdx , <STR_LIT> , Fixups ) ; else Val = MO . getImm ( ) >> <NUM_LIT> ; bool I = ( Val & <NUM_LIT>


<s> uint32_t <ISA_LIT>MCCodeEmitter :: get<ISA_LIT>BLTargetOpValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand MO = MI . getOperand


<s> return new ( Ctx ) <ISA_LIT>MCExpr (


<s> Streamer . visitUsedExpr ( * getSubExpr (


<s> bool EvaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout , const MCFixup


<s> bool EvaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout ,

const MCFixup * Fixup ) const override {


<s> void <ISA_LIT>MCExpr :: AddValueSymbols ( MCAssembler * Asm ) const { AddValueSymbols_ ( getSubExpr ( )


<s> break ; case MCExpr :: Binary : { const MCBinaryExpr * BE = cast < MCBinaryExpr > ( Value ) ; AddValueSymbols_ ( BE -> getLHS ( ) , Asm ) ; AddValueSymbols_ ( BE -> getRHS


<s> AddValueSymbols_ ( BE -> getRHS ( ) , Asm ) ; break ; } case MCExpr :: SymbolRef : Asm -> getOrCreateSymbolData ( cast < MCSymbolRefExpr > ( Value ) -> getSymbol ( ) ) ; break ; case MCExpr ::


<s> static bool classof ( const <ISA_LIT>MCExpr *


<s> return getSubExpr ( ) -> FindAssociatedSection ( )


<s> const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ; Expr -> print (


<s> case VK_<ISA_LIT>_HI16 : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_LO16 : OS << <STR_LIT> ; break ; } const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS << '(' ; Expr -> print


<s> static const <ISA_LIT>MCExpr * createLower16 ( const MCExpr * Expr , MCContext & Ctx ) { return create ( VK_<ISA_LIT>_LO16 , Expr ,


<s> return create ( VK_<ISA_LIT>_HI16 , Expr , Ctx


<s> bool evaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout , const MCFixup * Fixup ) const override { return


<s> return new ( Ctx ) <ISA_LIT>MCExpr ( Kind , Expr


<s> static const <ISA_LIT>MCExpr * CreateLower16 ( const MCExpr *


<s> return Create ( VK_<ISA_LIT>_HI16 , Expr


<s> static const <ISA_LIT>MCExpr * CreateUpper16 ( const MCExpr * Expr , MCContext & Ctx ) { return Create ( VK_<ISA_LIT>_HI16 , Expr


<s> VariantKind getKind ( ) const { return


<s> default : llvm_unreachable ( <STR_LIT> ) ; case VK_<ISA_LIT>_HI16 : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_LO16 : OS << <STR_LIT> ; break ; } const MCExpr * Expr = getSubExpr ( ) ; if ( Expr -> getKind ( ) != MCExpr :: SymbolRef ) OS


<s> MCInst Noop ; Subtarget -> getInstrInfo ( ) -> getNoop ( Noop ) ; for ( int8_t I = <NUM_LIT> ; I < NoopsInSledCount ; I ++ ) OutStreamer -> EmitInstruction ( Noop , getSubtargetInfo ( ) ) ; OutStreamer -> EmitLabel ( Target ) ; recordSled ( CurSled , MI , Kind


<s> auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> EmitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; MCInst Noop


<s> MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : if ( Subtarget -> genExecuteOnly ( ) ) llvm_unreachable ( <STR_LIT> ) ; MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble ( ) , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: createFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask : return false


<s> EmitSled ( MI , SledKind :: FUNCTION_ENTER


<s> void <ISA_LIT>AsmPrinter :: LowerPATCHABLE_FUNCTION_EXIT ( const MachineInstr


<s> EmitSled ( MI , SledKind :: FUNCTION_EXIT


<s> void <ISA_LIT>AsmPrinter :: LowerPATCHABLE_TAIL_CALL ( const MachineInstr & MI ) { EmitSled ( MI , SledKind


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_PLT , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr ::

create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;


<s> auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; MCInst Noop ; Subtarget -> getInstrInfo ( ) -> getNoopForElfTarget ( Noop ) ; for ( int8_t I = <NUM_LIT> ; I < NoopsInSledCount ; I ++ ) { OutStreamer -> EmitInstruction ( Noop , getSubtargetInfo ( ) ) ; } OutStreamer -> EmitLabel ( Target ) ; recordSled ( CurSled , MI , Kind


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createLower16 ( Expr , OutContext ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: createUpper16 ( Expr , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , OutContext ) , OutContext ) ; return MCOperand :: createExpr ( Expr


<s> MCOp = GetSymbolRef ( MO , AP . Mang -> getSymbol ( MO . getGlobal ( ) ) , AP ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , AP . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) , AP ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , AP . GetJTISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , AP . GetCPISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , AP . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) , AP ) ; break ; case MachineOperand :: MO_FPImmediate : APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; } OutMI . addOperand (


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT>


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : EncodeImms = true ; break ; } for ( const MachineOperand & MO : MI -> operands


<s> switch ( MO . getType ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) return false ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : if ( Subtarget -> genExecuteOnly ( ) ) llvm_unreachable


<s> <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO )


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_PLT , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , OutContext ) , OutContext ) ; return MCOperand :: CreateExpr (


<s> const MCExpr * AdjExpr = MCConstantExpr :: Create ( PCAdjustment , Ctx ) ; PCRelExpr = MCBinaryExpr :: CreateAdd ( PCRelExpr , AdjExpr , Ctx ) ; } const MachineOperand & MOImm = MI -> getOperand ( ImmIndex ) ; MCOperand SymOp ; bool DidLower = AP . lowerOperand ( MOImm , SymOp ) ; assert ( DidLower && <STR_LIT> ) ; const MCExpr * Expr = SymOp . getExpr ( ) ; <ISA_LIT>MCExpr :: VariantKind TargetKind = <ISA_LIT>MCExpr :: VK_<ISA_LIT>_None ; if ( Expr -> getKind ( ) == MCExpr :: Target ) { const <ISA_LIT>MCExpr * TargetExpr = cast <


<s> case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF ( ) ; bool ignored ; Val . convert ( APFloat :: IEEEdouble , APFloat :: rmTowardZero , & ignored ) ; MCOp = MCOperand :: CreateFPImm ( Val . convertToDouble ( ) ) ; break ; } case MachineOperand :: MO_RegisterMask


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> emitLabel (


<s> OutStreamer -> emitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> emitLabel ( Target


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetGlobalAddressSymbol ( const MachineOperand & MO ) const { switch ( MO . getTargetFlags ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; } return Printer . GetGlobalValueSymbol ( MO . getGlobal


<s> MCOperand MCOp ; switch ( MO . getType ( ) ) { default : MI -> dump ( ) ; assert ( <NUM_LIT> && <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( Ctx ) , Ctx ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = LowerSymbolOperand ( MO , GetJumpTableSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex


<s> MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , Get<ISA_LIT>GVSymbol ( MO . getGlobal ( ) , MO . getTargetFlags ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO


<s> case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , OutContext ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , OutContext ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_PLT , OutContext ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr

, MCConstantExpr :: Create ( MO . getOffset ( ) , OutContext ) , OutContext ) ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags (


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber


<s> return AsmPrinter . MMI -> getObjFileInfo <


<s> return AsmPrinter . MMI -> getObjFileInfo < MachineModuleInfoMachO


<s> for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; switch ( MO . getType ( ) ) { default : MI -> dump ( ) ; assert ( <NUM_LIT> && <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; assert ( ! MO . getSubReg ( ) && <STR_LIT> ) ; MCOp = MCOperand :: CreateReg ( MO . getReg ( ) ) ; break ; case MachineOperand ::


<s> MCOperand <ISA_LIT>MCInstLower :: LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const { const MCExpr * Expr = MCSymbolRefExpr :: Create ( Sym , Ctx ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; case <NUM_LIT> : break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; Expr = <ISA_LIT>MCExpr :: CreateLower16 ( Expr , Ctx ) ; break ; case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; Expr = <ISA_LIT>MCExpr :: CreateUpper16 ( Expr , Ctx ) ; break ; } break ; } case <STR_LIT> : Expr = MCSymbolRefExpr :: Create ( Symbol , MCSymbolRefExpr :: VK_<ISA_LIT>_PLT , Ctx ) ; break ; } if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: CreateAdd ( Expr , MCConstantExpr :: Create ( MO . getOffset ( ) , Ctx ) , Ctx ) ; return MCOperand :: CreateExpr


<s> MCOp = GetSymbolRef ( MO , AP . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) , AP ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , AP . GetJTISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , AP . GetCPISymbol ( MO . getIndex ( ) ) , AP ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , AP . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) , AP ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm (


<s> OutStreamer -> emitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> emitLabel ( Target ) ; recordSled ( CurSled , MI , Kind ,


<s> MCOp = MCOperand :: CreateImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: CreateExpr ( MCSymbolRefExpr :: Create ( MO . getMBB ( ) -> getSymbol ( ) , OutContext ) ) ; break ; case MachineOperand :: MO_GlobalAddress : MCOp = GetSymbolRef ( MO , getSymbol ( MO . getGlobal ( ) ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = GetSymbolRef ( MO , GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = GetSymbolRef ( MO , GetJTISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : MCOp = GetSymbolRef ( MO , GetCPISymbol ( MO . getIndex ( ) ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = GetSymbolRef ( MO , GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ) ; break ; case MachineOperand :: MO_FPImmediate : { APFloat Val = MO . getFPImm ( ) -> getValueAPF (


<s> SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; switch ( MO . getTargetFlags ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; } return Ctx . GetOrCreateTemporarySymbol ( Name . str ( )


<s> EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount ) ; OutStreamer -> EmitLabel ( Target ) ; recordSled ( CurSled , MI


<s> void <ISA_LIT>AsmPrinter :: EmitSled ( const MachineInstr & MI , SledKind Kind ) { if ( MI . getParent ( ) -> getParent ( ) -> getInfo < <ISA_LIT>FunctionInfo > ( ) -> isThumbFunction ( ) ) { MI . emitError ( <STR_LIT> <STR_LIT> ) ; return ; } static const int8_t NoopsInSledCount = <NUM_LIT> ; OutStreamer -> EmitCodeAlignment ( <NUM_LIT> ) ; auto CurSled = OutContext . createTempSymbol ( <STR_LIT> , true ) ; OutStreamer -> EmitLabel ( CurSled ) ; auto Target = OutContext . createTempSymbol ( ) ; EmitToStreamer ( * OutStreamer , MCInstBuilder ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addImm ( <STR_LIT> ) . addReg ( <NUM_LIT> ) ) ; emitNops ( NoopsInSledCount )


<s> public : <ISA_LIT>MCInstLower ( MCContext & ctx , Mangler & mang , AsmPrinter & printer ) : Ctx ( ctx ) , Mang ( mang ) , Printer ( printer ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp ; if ( AP . lowerOperand ( MO , MCOp )


<s> if ( ( State . I == <NUM_LIT> ) && ( State . SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : State . SaveCount = <NUM_LIT> ; break ; } } if ( State . I < State . SaveCount ) { assert ( State . I < State . MaxSaved && <STR_LIT> ) ; State . Saved [ State . I ++ ] = Inst ; if ( State . I < State . SaveCount ) return true ; } assert ( State . I == State . SaveCount && State . SaveCount > <NUM_LIT> && <STR_LIT> ) ; State . RecursiveCall = true ; switch ( State . Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardReturn ( State . I , State . Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStore ( State . I , State . Saved


<s> BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ; BICInst . addOperand ( MCOperand :: CreateReg


<s> TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ; TSTInst . addOperand ( MCOperand ::


<s> MCInst BICInst ; const int32_t EncodedMask = <STR_LIT> ( Mask ) ; assert ( EncodedMask != - <NUM_LIT> ) ; BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( EncodedMask


<s> static void EmitBICMask ( const MCSubtargetInfo & STI , MCStreamer & Out , unsigned Addr , int64_t Pred , unsigned Mask ) { MCInst BICInst ; const int32_t EncodedMask = <STR_LIT> ( Mask ) ; assert ( EncodedMask != - <NUM_LIT> ) ; BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( EncodedMask ) ) ; BICInst . addOperand ( MCOperand :: CreateImm


<s> unsigned Addr = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == Addr ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ; EmitBICMask ( STI , Out , Addr , Pred ,


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; Out . EmitBundleLock (


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( STI , Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ; Out . EmitBundleUnlock


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( STI , Out , Reg ) ; Out . EmitInstruction ( Saved [ <NUM_LIT>


<s> static void EmitGuardLoadOrStoreTst ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( STI , Out , Reg ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ; Out . EmitBundleUnlock (


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( STI , Out , <STR_LIT> ,


<s> unsigned AddrReg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SpReg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == SpReg ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( STI , Out , AddrReg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] , STI ) ; EmitBICMask ( STI , Out , SpReg , Pred , <NUM_LIT> ) ; Out . EmitBundleUnlock (


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock (


<s> static void EmitIndirectGuardCall ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock (


<s> static void EmitIndirectGuardJmp ( const MCSubtargetInfo & STI , int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT>


<s> TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( ( int64_t ) <STR_LIT> ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm (


<s> BICInst . setOpcode ( <STR_LIT> ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; BICInst . addOperand ( MCOperand :: CreateImm (


<s> BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( Addr ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; BICInst . addOperand ( MCOperand :: CreateImm ( Pred ) ) ; BICInst . addOperand ( MCOperand :: CreateReg ( <STR_LIT> ) ) ; BICInst . addOperand ( MCOperand ::


<s> TSTInst . setOpcode ( <STR_LIT> ) ; TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm ( Mask ) ) ; TSTInst . addOperand ( MCOperand :: CreateImm (


<s> static MCInst getAddrInstr ( const MCInst & Inst , const MCInstrInfo & II , int MemIdx , unsigned Target ) { assert ( Inst . getOperand ( MemIdx ) . isReg ( ) ) ; unsigned AM2Opc = Inst . getOperand ( MemIdx + <NUM_LIT> ) . getImm ( ) ; unsigned Offset = <STR_LIT> ( AM2Opc ) ; <STR_LIT> ShOp = <STR_LIT> ( <STR_LIT> ( AM2Opc ) ) ; unsigned PredReg ; <STR_LIT> Pred = getPredicate ( Inst , II , PredReg ) ; MCInst Add


<s> static MCInst getConditionalBranch ( unsigned Reg , const MCInst & Inst , const MCInstrInfo & II ) { unsigned PredReg ; <STR_LIT> Pred = getPredicate ( Inst , II , PredReg ) ; MCInst


<s> unsigned Opc = Inst . getOpcode ( ) ; const MCOperandInfo * OpInfo = InstInfo . get ( Opc ) . OpInfo ; for ( int i = <NUM_LIT> , e = Inst . getNumOperands ( ) ; i < e ; i ++ ) { if ( OpInfo [ i ] . OperandType == MCOI :: OPERAND_MEMORY ) { return


<s> static void sandboxBaseDisp ( const MCInst & Inst , const MCInstrInfo & II , unsigned BaseReg , MCStreamer & Out , const MCSubtargetInfo & STI ) { switch ( BaseReg ) { case


<s> sandboxBaseDisp ( Inst , II , Inst . getOperand ( MemIdx ) . getReg ( ) , Out , STI ) ; } else { Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( getAddrInstr ( Inst , II , MemIdx , Target ) , STI ) ; emitBicMask ( kSandboxMask , Target , Pred , PredReg , Out , STI ) ; MCInst SandboxedInst ; SandboxedInst . setOpcode ( sandboxOpcode ( Inst . getOpcode ( ) ) ) ; SandboxedInst . addOperand ( Inst . getOperand (


<s> sandboxBaseDisp ( Inst , II , Inst . getOperand ( MemIdx ) . getReg ( ) , Out , STI ) ; } else { Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( getAddrInstr ( Inst , II , MemIdx , Target ) , STI ) ; emitBicMask ( kSandboxMask , Target , Pred , PredReg , Out , STI ) ; MCInst SandboxedInst ; SandboxedInst . setOpcode ( sandboxOpcode ( Inst . getOpcode ( ) ) ) ; SandboxedInst . addOperand ( Inst . getOperand ( RegIdx ) ) ; SandboxedInst . addOperand ( MCOperand ::


<s> return Opcode ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case


<s> static int I = <NUM_LIT> ; if ( Out . hasRawTextSupport ( ) ) { return false ; } static bool RecurseGuard = false ; if ( RecurseGuard ) return false ; DEBUG ( dbgs ( ) << <STR_LIT> ; Inst . dump ( ) ; dbgs ( ) << <STR_LIT> ) ; if ( ( I == <NUM_LIT> ) && ( SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; } } if ( I < SaveCount ) { assert ( I < MaxSaved && <STR_LIT> ) ; Saved [ I ++ ] = Inst ; if ( I < SaveCount ) return true ; } assert ( I == SaveCount && SaveCount > <NUM_LIT> && <STR_LIT> ) ; RecurseGuard = true ; switch ( Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( I , Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardReturn ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStore ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitGuardLoadOrStoreTst ( I , Saved , Out ) ; break ; case


<s> DEBUG ( dbgs ( ) << <STR_LIT> ; Inst . dump ( ) ; dbgs ( ) << <STR_LIT> ) ; if ( ( I == <NUM_LIT> ) && ( SaveCount == <NUM_LIT> ) ) { switch ( Inst . getOpcode ( ) ) { default : return false ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; case <STR_LIT> : SaveCount = <NUM_LIT> ; break ; } } if ( I < SaveCount ) { assert ( I < MaxSaved && <STR_LIT> ) ; Saved [ I ++ ] = Inst ; if ( I < SaveCount ) return true ; } assert ( I == SaveCount && SaveCount > <NUM_LIT> && <STR_LIT> ) ; RecurseGuard = true ; switch ( Saved [ <NUM_LIT> ] . getOpcode ( ) ) { default : break ; case <STR_LIT> : EmitDataMask ( I , Saved , Out ) ; break ; case <STR_LIT> : assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : EmitDirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardCall ( I , Saved , Out ) ; break ; case <STR_LIT> : EmitIndirectGuardJmp ( I , Saved , Out ) ; break ; case <STR_LIT>


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; assert ( ( <STR_LIT> == Addr ) && <STR_LIT> ) ; Out . EmitBundleLock ( false ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; EmitBICMask ( Out , Addr , Pred , <NUM_LIT> ) ; Out . EmitBundleUnlock


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; Out . EmitBundleLock ( true ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; Out . EmitBundleUnlock


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; Out . EmitBundleLock ( true


<s> int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT>


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [


<s> assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; Out . EmitBundleLock ( false ) ; EmitTST ( Out , Reg ) ; Out . EmitInstruction ( Saved


<s> static void EmitGuardReturn ( int I , MCInst Saved [ ] , MCStreamer & Out ) { assert ( I == <NUM_LIT> && ( <STR_LIT> == Saved [ <NUM_LIT> ] . getOpcode ( ) ) && <STR_LIT> ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock ( false


<s> Out . EmitBundleLock ( true ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; Out . EmitBundleUnlock (


<s> unsigned Reg = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getReg ( ) ; int64_t Pred = Saved [ <NUM_LIT> ] . getOperand ( <NUM_LIT> ) . getImm ( ) ; Out . EmitBundleLock (


<s> Out . EmitBundleLock ( false ) ; EmitBICMask ( Out , Reg , Pred , <NUM_LIT> ) ; Out . EmitInstruction ( Saved [ <NUM_LIT> ] ) ; Out . EmitBundleUnlock (


<s> TSTInst . setOpcode ( <STR_LIT> ) ; TSTInst . addOperand ( MCOperand :: CreateReg ( Reg ) ) ; if ( FlagSfiZeroMask ) { TSTInst . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ; } else { TSTInst . addOperand ( MCOperand ::


<s> return createMachOStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter


<s> else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TheTriple ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: cfiDefCfa ( nullptr


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; <ISA_LIT>_MC :: initLLVMToCVRegMapping (


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; } return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , CPU , ArchFS


<s> if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; } return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , CPU , ArchFS


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) { return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb || T . getArch ( )

== Triple :: thumbeb ) , T . isAndroid ( ) ) ;


<s> return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb

|| T . getArch ( ) == Triple :: thumbeb ) , T . isAndroid ( ) ) ;


<s> const MCInstrDesc & Desc = Info -> get ( Inst . getOpcode ( ) ) ; for ( unsigned OpNum = <NUM_LIT> ; OpNum < Desc . getNumOperands ( ) ; ++ OpNum ) { if ( Inst . getOperand ( OpNum ) . isImm ( ) && Desc . OpInfo [

OpNum ] . OperandType == MCOI :: OPERAND_PCREL ) {


<s> uint64_t Offset = ( ( InstDesc . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; if ( InstDesc . getOpcode ( )


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || MO2 . getReg ( ) || ! MO3 . isImm ( ) ) return None ; unsigned ImmOffs = <STR_LIT> ( MO3 . getImm ( ) ) ; <STR_LIT> Op = <STR_LIT> ( MO3 . getImm ( ) ) ; if ( Op == <STR_LIT> ) return


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrMode3 ( const MCInst & Inst , const MCInstrDesc & Desc , unsigned MemOpIndex , uint64_t Addr ) { if ( MemOpIndex + <NUM_LIT> >= Desc . getNumOperands ( ) ) return None ; const MCOperand & MO1 = Inst . getOperand ( MemOpIndex ) ; const MCOperand & MO2 = Inst . getOperand ( MemOpIndex + <NUM_LIT> ) ; const MCOperand & MO3 = Inst . getOperand


<s> if ( MemOpIndex + <NUM_LIT> >= Desc . getNumOperands ( ) ) return None ; const MCOperand & MO1 = Inst . getOperand ( MemOpIndex ) ; const MCOperand & MO2 = Inst . getOperand ( MemOpIndex + <NUM_LIT> ) ; if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ; unsigned ImmOffs = <STR_LIT> ( MO2 . getImm ( ) ) ; <STR_LIT> Op = <STR_LIT> ( MO2 . getImm ( ) ) ; if ( Op == <STR_LIT> ) return Addr -


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrModeT1_s ( const MCInst & Inst , const MCInstrDesc & Desc , unsigned MemOpIndex , uint64_t


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrModeT1_s ( const MCInst & Inst , const MCInstrDesc & Desc , unsigned MemOpIndex , uint64_t Addr ) { return evaluateMemOpAddrForAddrModeT2_pc ( Inst , Desc , MemOpIndex


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ; int32_t OffImm = ( int32_t ) MO2 . getImm ( ) ; assert ( ( ( OffImm & <NUM_LIT> ) == <NUM_LIT> ) && <STR_LIT> ) ; if ( OffImm == INT32_MIN ) OffImm = <NUM_LIT> ; return Addr +


<s> static Optional < uint64_t > evaluateMemOpAddrForAddrModeT2_pc ( const MCInst & Inst , const MCInstrDesc & Desc ,


<s> if ( ! MO1 . isReg ( ) || MO1 . getReg ( ) != <STR_LIT> || ! MO2 . isImm ( ) ) return None ; int32_t OffImm = ( int32_t ) MO2 .


<s> switch ( Desc . TSFlags & <STR_LIT> ) { default : Addr += <NUM_LIT> ; break ; case <STR_LIT> : Addr += <NUM_LIT> ; break ; case <STR_LIT> : Addr += STI -> getFeatureBits ( ) [ <STR_LIT> ] ? <NUM_LIT> : <NUM_LIT> ; break ; } unsigned AddrMode = ( TSFlags & <STR_LIT> ) ; switch ( AddrMode ) { default : return None ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode_i12 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode3 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode5 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrMode5FP16 ( Inst , Desc , OpIndex , Addr ) ; case <STR_LIT> : return evaluateMemOpAddrForAddrModeT2_i8s4 ( Inst , Desc


<s> static bool get<ISA_LIT>StoreDeprecationInfo ( MCInst & MI , const MCSubtargetInfo & STI , std :: string & Info ) { assert ( ! STI . getFeatureBits ( ) [ llvm


<s> if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) { Info =


<s> static bool getMRCDeprecationInfo ( MCInst & MI , const MCSubtargetInfo & STI , std :: string & Info ) { if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && ( ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) || ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) ) { Info = <STR_LIT> <STR_LIT> ; return true ; } return


<s> bool <ISA_LIT>_MC :: isPredicated ( const MCInst & MI , const MCInstrInfo * MCII ) { const MCInstrDesc & Desc = MCII -> get (


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>TargetMC ( ) { for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>LEAsmBackend ) ; } for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T ,


<s> std :: string <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSWindows ( ) ) { if ( ! <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature += <STR_LIT> ; <ISA_LIT>ArchFeature += <STR_LIT> ; } return <ISA_LIT>ArchFeature


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , MCAsmBackend & MAB , raw_pwrite_stream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) { return createMachOStreamer ( Ctx , MAB , OS ,

Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> RM = TT . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; } X -> initMCCodeGenInfo ( RM , CM


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { RM = TT . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; } X -> initMCCodeGenInfo ( RM , CM , OL ) ; return


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII ,


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ; return nullptr


<s> static MCInstrAnalysis * create<ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) { return new <ISA_LIT>MCInstrAnalysis ( Info )


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X


<s> MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ; return X


return create<ISA_LIT>MachORelocationInfo ( Ctx ) ;


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> +


<s> MCSubtargetInfo * <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = FS ; } return create<ISA_LIT>MCSubtargetInfoImpl ( TT ,


<s> assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; bool ListContainsPC = false , ListContainsLR = false ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) { assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ; switch ( MI . getOperand ( OI ) . getReg ( )


<s> assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ; if ( MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> || MI . getOperand ( OI )


<s> if ( STI . getFeatureBits ( ) [ llvm :: <STR_LIT> ] && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) != <NUM_LIT> ) { Info = <STR_LIT> <STR_LIT> ; return true ; } return false


<s> if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return false ; return MCInstrAnalysis :: isConditionalBranch


<s> bool isUnconditionalBranch ( const MCInst & Inst ) const override { if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT>

) . getImm ( ) == <STR_LIT> ) return true ;


<s> TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & The<ISA_LIT>LETarget , & TheThumbLETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & The<ISA_LIT>BETarget , & TheThumbBETarget } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend (


<s> if ( ArchID != <STR_LIT> && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } return <ISA_LIT>ArchFeature


<s> unsigned ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature =


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { Triple TheTriple ( TT ) ; RM = TheTriple . isOSDarwin ( ) ? Reloc :: PIC_ : Reloc :: DynamicNoPIC ; } X -> InitMCCodeGenInfo ( RM , CM ,


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII ,


<s> if ( TheTriple . isOSDarwin ( ) ) return createMachOStreamer ( Ctx , MAB , OS , Emitter , false ) ; if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; } return createELFStreamer ( Ctx , MAB , OS , Emitter , false


<s> inline bool isVpred ( uint8_t op ) { return isVpred ( static_cast < OperandType > ( op


<s> bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU )


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , std ::

unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ OpId ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; Target = Addr + Inst . getOperand ( OpId ) . getImm


<s> TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , createThumbMCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>LEAsmBackend ) ; } for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( ) } ) { TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( * T , create<ISA_LIT>BEAsmBackend


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Imm +


<s> return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , ( T . getArch (

) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) , & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createELFStreamer ) ; TargetRegistry :: RegisterCOFFStreamer ( * T , create<ISA_LIT>WinCOFFStreamer ) ; TargetRegistry :: RegisterMachOStreamer ( * T , create<ISA_LIT>MachOStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( * T , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>TargetAsmStreamer ) ; TargetRegistry :: RegisterNullTargetStreamer ( * T , create<ISA_LIT>NullTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCRelocationInfo ( * T ,


<s> TargetRegistry :: RegisterMCRelocationInfo ( * T , create<ISA_LIT>MCRelocationInfo ) ; } for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getThe<ISA_LIT>BETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; for ( Target * T : { & getTheThumbLETarget ( ) , & getTheThumbBETarget ( ) } ) TargetRegistry :: RegisterMCInstrAnalysis ( * T , createThumbMCInstrAnalysis ) ; for ( Target * T : { & getThe<ISA_LIT>LETarget ( ) , & getTheThumbLETarget ( ) } ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>LEMCCodeEmitter ) ; for ( Target * T : { & getThe<ISA_LIT>BETarget ( ) , & getTheThumbBETarget ( )

} ) TargetRegistry :: RegisterMCCodeEmitter ( * T , create<ISA_LIT>BEMCCodeEmitter ) ;


<s> std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( )


<s> std :: string <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ; <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } return <ISA_LIT>ArchFeature


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) { return createMachOStreamer ( Ctx , MAB , OS

, Emitter , false , DWARFMustBeAtTheEnd ) ;


<s> else MAI = new <ISA_LIT>ELFMCAsmInfo ( TT ) ; unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr , Reg , <NUM_LIT> ) ) ; return MAI


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( StringRef Triple ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; return


<s> static MCRelocationInfo * create<ISA_LIT>MCRelocationInfo ( StringRef TT , MCContext & Ctx ) { Triple TheTriple ( TT ) ; if ( TheTriple . isOSBinFormatMachO ( ) ) return create<ISA_LIT>MachORelocationInfo ( Ctx ) ; return llvm :: createMCRelocationInfo ( TT , Ctx


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = FS ; } MCSubtargetInfo * X =


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , MCAsmBackend &

MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll ) {


<s> assert ( ( ~ STI . getFeatureBits ( ) & llvm :: <STR_LIT> ) && <STR_LIT> ) ; assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; for ( unsigned OI = <NUM_LIT> , OE = MI . getNumOperands ( ) ; OI < OE ; ++ OI ) { assert ( MI . getOperand ( OI ) . isReg ( ) && <STR_LIT> ) ; if ( MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> || MI . getOperand ( OI ) . getReg ( ) == <STR_LIT> ) { Info = <STR_LIT> ; return


<s> return true ; } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) { Info = <STR_LIT> ; return true ; } } if ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> && ( MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand ( <NUM_LIT> ) . getImm ( ) == <NUM_LIT> ) ) { Info =


<s> if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7s : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v7 : if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6t2 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6k : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6m : isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v6 : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple :: <ISA_LIT>SubArch_v5te : <ISA_LIT>ArchFeature = <STR_LIT> ; break ; case Triple


<s> std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS


<s> if ( ! ArchFS . empty ( ) ) ArchFS = ( Twine ( ArchFS ) + <STR_LIT> + FS ) . str ( ) ; else ArchFS = std :: string ( FS ) ; } return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : OpId = <NUM_LIT> ; break ; case <STR_LIT> : OpId = <NUM_LIT> ; break ; } if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ OpId ] . OperandType != MCOI :: OPERAND_PCREL ) return false ; Target = Addr + Inst . getOperand ( OpId ) . getImm ( ) + <NUM_LIT> ; return true


<s> if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin ( ) ; return new <ISA_LIT>ELFMCAsmInfo (


<s> Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) return new <ISA_LIT>MCAsmInfoDarwin (


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) { Triple TheTriple ( TT ) ; RM = TheTriple . isOSDarwin ( ) ? Reloc ::


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCSubtargetInfo & STI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant

, const MCAsmInfo & MAI , const MCSubtargetInfo & STI ) {


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X ,


<s> std :: string ArchFS = <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( TT ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; else ArchFS = FS


<s> Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) return createMachOStreamer ( Ctx , MAB , OS , Emitter , RelaxAll ) ; if ( TheTriple . isOSWindows ( ) ) { llvm_unreachable ( <STR_LIT> ) ; return NULL ; } return createELFStreamer ( Ctx , MAB , OS , Emitter , RelaxAll


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool NoExecStack ) { Triple TheTriple ( TT )


<s> uint64_t evaluateBranch ( const MCInst & Inst , uint64_t Addr , uint64_t Size ) const { if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL ) return - <NUM_LIT> ; int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType != MCOI :: OPERAND_PCREL )


<s> if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) .


<s> virtual bool isUnconditionalBranch ( const MCInst & Inst ) const { if ( Inst . getOpcode ( ) == <STR_LIT> && Inst . getOperand ( <NUM_LIT> ) . getImm ( ) == <STR_LIT> ) return true ; return MCInstrAnalysis :: isUnconditionalBranch (


<s> RegisterMCAsmInfoFn A ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbTarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbTarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbTarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbTarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbTarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbTarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCCodeEmitter ( TheThumbTarget , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCAsmBackend ( TheThumbTarget , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCObjectStreamer ( TheThumbTarget , createMCStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCInstPrinter ( TheThumbTarget , create<ISA_LIT>MCInstPrinter


<s> } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature =


<s> unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature


<s> } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' &&

TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature +=


<s> return createMachOStreamer ( Ctx , std :: move ( MAB ) , OS

, std :: move ( Emitter ) , false , DWARFMustBeAtTheEnd ) ;


<s> static MCStreamer * create<ISA_LIT>MachOStreamer ( MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , raw_pwrite_stream

& OS , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll , bool DWARFMustBeAtTheEnd ) {


<s> return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , OS , std :: move ( Emitter ) , false , ( T . getArch ( ) == Triple :: thumb ||

T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> static MCStreamer * createELFStreamer ( const Triple & T , MCContext & Ctx , std :: unique_ptr < MCAsmBackend > && MAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) { return create<ISA_LIT>ELFStreamer ( Ctx , std :: move ( MAB ) , OS , std :: move ( Emitter ) , false , ( T

. getArch ( ) == Triple :: thumb || T . getArch ( ) == Triple :: thumbeb ) ) ;


<s> <STR_LIT> ArchID = <STR_LIT> ( TT . getArchName ( ) ) ; if ( ArchID != <STR_LIT> :: INVALID && ( CPU . empty ( ) || CPU == <STR_LIT> ) ) <ISA_LIT>ArchFeature = ( <ISA_LIT>ArchFeature + <STR_LIT> + <STR_LIT> ( ArchID ) ) . str ( ) ; if ( TT . isThumb ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSNaCl ( ) ) { if ( <ISA_LIT>ArchFeature . empty ( ) ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature += <STR_LIT> ; } if ( TT . isOSWindows (


<s> MCAsmInfo * MAI ; if ( TheTriple . isOSDarwin ( ) || TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TheTriple ) ; else if ( TheTriple . isWindowsMSVCEnvironment ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; else if ( TheTriple . isOSWindows ( ) ) MAI = new <ISA_LIT>COFFMCAsmInfoGNU ( ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo (


<s> MAI = new <ISA_LIT>COFFMCAsmInfoMicrosoft ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } break ; default : if ( TheTriple . isOSBinFormatMachO ( ) ) MAI = new <ISA_LIT>MCAsmInfoDarwin ( TT ) ; else MAI = new <ISA_LIT>ELFMCAsmInfo ( TT ) ; break ; } unsigned Reg = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MAI -> addInitialFrameState ( MCCFIInstruction :: createDefCfa ( nullptr


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI , STI ) ; return nullptr


<s> Triple TheTriple ( TT ) ; switch ( TheTriple . getObjectFormat ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case Triple :: MachO : { MCStreamer * S = createMachOStreamer ( Ctx , MAB , OS , Emitter , false ) ; new <ISA_LIT>TargetStreamer ( * S ) ; return S ; } case Triple :: COFF : assert ( TheTriple . isOSWindows ( ) && <STR_LIT> ) ; return create<ISA_LIT>WinCOFFStreamer ( Ctx , MAB , * Emitter , OS ) ; case Triple :: ELF : return create<ISA_LIT>ELFStreamer ( Ctx , MAB , OS , Emitter , false , NoExecStack , TheTriple . getArch ( )


<s> if ( STI . getFeatureBits ( ) & llvm :: <STR_LIT> && MI . getOperand ( <NUM_LIT> ) . isImm ( ) && MI . getOperand (

<NUM_LIT> ) . getImm ( ) != <NUM_LIT> ) {


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>LETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn Y ( The<ISA_LIT>BETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn A ( TheThumbLETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbBETarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbLETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbBETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbLETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbBETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbLETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbBETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>LETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>BETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbLETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbBETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbLETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbBETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>LETarget , create<ISA_LIT>LEMCCodeEmitter


<s> RegisterMCAsmInfoFn A ( TheThumbLETarget , create<ISA_LIT>MCAsmInfo ) ; RegisterMCAsmInfoFn B ( TheThumbBETarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbLETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( TheThumbBETarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbLETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( TheThumbBETarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>LETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>BETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbLETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( TheThumbBETarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>LETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>BETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbLETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( TheThumbBETarget , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>LETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>BETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbLETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstrAnalysis ( TheThumbBETarget , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>LETarget , create<ISA_LIT>LEMCCodeEmitter ) ; TargetRegistry :: RegisterMCCodeEmitter (


<s> if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ]

== 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ;


<s> unsigned Idx = <NUM_LIT> ; bool isThumb = false ; if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) Idx = <NUM_LIT> ; else if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) { isThumb = true ; if ( Len >= <NUM_LIT> && TT [ <NUM_LIT> ] == 'v' ) Idx = <NUM_LIT> ; } bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer >= '7' && SubVer <= '9' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'e' && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 's' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } } else if ( SubVer == '6' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == '2' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '5' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' && TT [ Idx + <NUM_LIT> ] == 'e' ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '4' && Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 't' ) <ISA_LIT>ArchFeature = <STR_LIT> ; } if ( isThumb ) { if ( <ISA_LIT>ArchFeature . empty ( ) )


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( const Triple & TT , const MCTargetOptions & Options ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ,


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> ,


<s> if ( Inst . getOperand ( OpNum ) . isImm ( ) && Desc . OpInfo [ OpNum ] . OperandType == MCOI :: OPERAND_PCREL ) { Imm = Inst . getOperand ( OpNum ) . getImm ( ) ; FoundImm = true ; } } if ( ! FoundImm ) return false ; uint64_t Offset = ( ( Desc . TSFlags & <STR_LIT> ) == <STR_LIT> ) ? <NUM_LIT> : <NUM_LIT> ; Target = Addr + Imm + Offset ; return


<s> Triple TheTriple ( TT ) ; if ( TheTriple . isOSDarwin ( ) ) return


<s> static MCRelocationInfo * create<ISA_LIT>MCRelocationInfo ( StringRef TT , MCContext & Ctx ) { Triple TheTriple ( TT ) ; if ( TheTriple . isEnvironmentMachO ( ) ) return create<ISA_LIT>MachORelocationInfo ( Ctx ) ; return llvm :: createMCRelocationInfo ( TT , Ctx


<s> unsigned Idx = <NUM_LIT> ; bool isThumb = false ; if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) Idx = <NUM_LIT> ; else if ( Len >= <NUM_LIT> && TT . substr ( <NUM_LIT> , <NUM_LIT> ) == <STR_LIT> ) { isThumb = true ; if ( Len >= <NUM_LIT> && TT [ <NUM_LIT> ] == 'v' ) Idx = <NUM_LIT> ; } bool NoCPU = CPU == <STR_LIT> || CPU . empty ( ) ; std :: string <ISA_LIT>ArchFeature ; if ( Idx ) { unsigned SubVer = TT [ Idx ] ; if ( SubVer == '8' ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( SubVer == '7' ) { if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ] == 'm' ) { isThumb = true ; if ( NoCPU ) <ISA_LIT>ArchFeature = <STR_LIT> ; else <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( Len >= Idx + <NUM_LIT> && TT [ Idx + <NUM_LIT> ]


<s> static ALFWriter * createALFWriter ( const MCInstrInfo * mii , const MCRegisterInfo * mri ) { return new <ISA_LIT>ALFWriter ( mii ,