<s> } assert ( ( Opcodes . size ( ) % <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I != Opcodes . size ( ) ; I += <NUM_LIT> ) { uint64_t Intval = Opcodes [ I ] | Opcodes [ I + <NUM_LIT> ] << <NUM_LIT> | Opcodes [ I + <NUM_LIT> ] << <NUM_LIT> | Opcodes [


<s> UnwindOpAsm . EmitSPOffset ( LastRegSaveSPOffset - FPOffset ) ; UnwindOpAsm . EmitSetSP ( MRI -> getEncodingValue ( FPReg ) ) ; } else { FlushPendingOffset ( ) ; } UnwindOpAsm . Finalize ( PersonalityIndex , Opcodes ) ; if ( NoHandlerData && PersonalityIndex == <STR_LIT> :: AEABI_UNWIND_CPP_PR0 ) return ; SwitchToExTabSection ( * FnStart ) ; assert ( ! ExTab ) ; ExTab = getContext ( ) . CreateTempSymbol ( ) ; EmitLabel (


<s> static const char * GetFPUName ( unsigned ID ) { switch ( ID ) { default : llvm_unreachable ( <STR_LIT> ) ; break ; } return nullptr


<s> OS << <STR_LIT> << S -> getSymbol ( ) . getName ( )


<s> OS << <STR_LIT> << S -> getSymbol ( )


<s> <ISA_LIT>ELFStreamer ( MCContext & Context , std :: unique_ptr < MCAsmBackend > TAB , std :: unique_ptr < MCObjectWriter > OW , std :: unique_ptr < MCCodeEmitter > Emitter , bool IsThumb , bool IsAndroid ) : MCELFStreamer ( Context , std :: move ( TAB ) , std :: move ( OW ) , std :: move ( Emitter ) ) , IsThumb ( IsThumb ) , IsAndroid ( IsAndroid ) { EHReset ( )


<s> auto LastMappingSymbol = LastMappingSymbols . find ( Section ) ; if ( LastMappingSymbol != LastMappingSymbols . end ( ) ) { LastEMSInfo = std :: move ( LastMappingSymbol ->


<s> Reg = MRI . getEncodingValue ( Reg ) ; assert ( Reg < ( IsVector ? <NUM_LIT> : <NUM_LIT> ) && <STR_LIT> ) ; unsigned Bit = ( <NUM_LIT> << Reg ) ; if ( ( Mask & Bit ) == <NUM_LIT> ) { Mask |= Bit ; ++ Count ; } -- Idx ; } Mask_ = Mask ; return { Idx ,


<s> <ISA_LIT>ELFStreamer * S = new <ISA_LIT>ELFStreamer ( Context , std :: move ( TAB ) , std :: move ( OW ) , std :: move ( Emitter ) , IsThumb , IsAndroid ) ; S -> getAssembler ( ) . setELFHeaderEFlags (


<s> MCTargetStreamer * create<ISA_LIT>ObjectTargetELFStreamer ( MCStreamer


<s> void <ISA_LIT>TargetELFStreamer :: emitArchDefaultAttributes ( ) { using namespace <ISA_LIT>BuildAttrs ; <ISA_LIT>ELFStreamer & S = getStreamer ( ) ; S . setAttributeItem ( CPU_name , <STR_LIT> ( Arch ) , false ) ; if ( EmittedArch == <STR_LIT> :: INVALID ) S . setAttributeItem ( CPU_arch , <STR_LIT> ( Arch ) , false ) ; else S . setAttributeItem ( CPU_arch , <STR_LIT> ( EmittedArch ) , false ) ; switch ( Arch ) { case <STR_LIT> :: <ISA_LIT>V2 : case <STR_LIT> :: <ISA_LIT>V2A : case <STR_LIT> :: <ISA_LIT>V3 : case <STR_LIT> :: <ISA_LIT>V3M : case <STR_LIT> :: <ISA_LIT>V4 : S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V4T : case <STR_LIT> :: <ISA_LIT>V5T : case <STR_LIT> :: XSCALE : case <STR_LIT> :: <ISA_LIT>V5TE : case <STR_LIT> :: <ISA_LIT>V6 : S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; S . setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V6T2 : S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; S . setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V6K : case <STR_LIT> :: <ISA_LIT>V6KZ : S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; S . setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; S . setAttributeItem ( Virtualization_use , AllowTZ , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V6M : S . setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V7A : S . setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; S . setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V7R : S . setAttributeItem ( CPU_arch_profile , RealTimeProfile , false ) ; S . setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; S . setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> :: <ISA_LIT>V7EM : case <STR_LIT> :: <ISA_LIT>V7M : S . setAttributeItem ( CPU_arch_profile , MicroControllerProfile , false ) ; S . setAttributeItem ( THUMB_ISA_use ,


<s> OS << <STR_LIT> << <STR_LIT> ( ArchExt


<s> void <ISA_LIT>TargetAsmStreamer :: emit<ISA_LIT>WinCFIAllocStack ( unsigned Size , bool


( ( Opcode >> ( <NUM_LIT> * I ) ) & <NUM_LIT> ) ;


<s> for ( I = <NUM_LIT> ; I > <NUM_LIT> ; I -- ) if ( Opcode & ( <NUM_LIT>


<s> else OS << <STR_LIT> << <ISA_LIT>CondCodeToString ( static_cast < <STR_LIT> >


<s> if ( First != Last ) OS << <STR_LIT> << First << <STR_LIT> << Last << <STR_LIT> ; else OS << <STR_LIT> << First


<s> void <ISA_LIT>TargetAsmStreamer :: emit<ISA_LIT>WinCFISaveSP ( unsigned Reg


<s> void <ISA_LIT>TargetELFStreamer :: emitAttribute ( unsigned Attribute , unsigned Value ) { getStreamer ( ) . setAttributeItem (


<s> void emitFill ( const MCExpr & NumBytes , uint64_t FillValue , SMLoc Loc ) override { emitDataMappingSymbol (


<s> } else { assert ( PersonalityIndex == <STR_LIT> :: AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) == <NUM_LIT> && <STR_LIT> ) ; uint64_t Intval = Opcodes [ <NUM_LIT> ] | Opcodes [ <NUM_LIT> ] << <NUM_LIT> | Opcodes [ <NUM_LIT> ] << <NUM_LIT> | Opcodes [ <NUM_LIT> ] << <NUM_LIT> ; emitIntValue ( Intval , Opcodes . size ( ) ) ; } SwitchSection ( & FnStart -> getSection ( ) ) ; EHReset (


<s> if ( PersonalityIndex < <STR_LIT> :: NUM_PERSONALITY_INDEX && ! IsAndroid ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; emitValue ( FnStartRef , <NUM_LIT> ) ; if ( CantUnwind ) { emitInt32 ( <STR_LIT> :: EXIDX_CANTUNWIND ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: create ( ExTab , MCSymbolRefExpr ::


<s> assert ( FnStart == nullptr ) ; FnStart = getContext ( ) . createTempSymbol ( ) ; emitLabel ( FnStart


<s> FnStart = getContext ( ) . createTempSymbol (


<s> break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; S . setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : S . setAttributeItem ( <STR_LIT> , <STR_LIT>


<s> if ( IsThumb ) EmitThumbMappingSymbol ( ) ; else Emit<ISA_LIT>MappingSymbol (


<s> void <ISA_LIT>TargetELFStreamer :: emitIntTextAttribute ( unsigned Attribute , unsigned IntValue ,


<s> void <ISA_LIT>TargetELFStreamer :: emitIntTextAttribute ( unsigned Attribute , unsigned IntValue , StringRef StringValue ) { getStreamer ( ) . setAttributeItems ( Attribute , IntValue ,


<s> Streamer . getAssembler ( ) . registerSymbol ( * Symbol ) ; unsigned Type = cast < MCSymbolELF > ( Symbol


<s> void <ISA_LIT>TargetELFStreamer :: emitLabel ( MCSymbol * Symbol ) { <ISA_LIT>ELFStreamer & Streamer = getStreamer ( ) ; if ( ! Streamer . IsThumb ) return ; Streamer . getAssembler ( ) . registerSymbol ( * Symbol ) ; unsigned Type = cast < MCSymbolELF > ( Symbol ) -> getType ( ) ; if ( Type == ELF :: STT_FUNC || Type ==

ELF :: STT_GNU_IFUNC ) Streamer . emitThumbFunc ( Symbol ) ;


<s> void EmitMappingSymbol ( StringRef Name , SMLoc Loc , MCFragment * F , uint64_t Offset ) { auto * Symbol = cast < MCSymbolELF > ( getContext ( ) . getOrCreateSymbol ( Name + <STR_LIT> + Twine ( MappingSymbolCounter ++ ) ) ) ; emitLabelAtPos ( Symbol , Loc , F , Offset ) ; Symbol -> setType ( ELF :: STT_NOTYPE ) ; Symbol -> setBinding ( ELF :: STB_LOCAL


<s> FlushPendingOffset ( ) ; if ( IsVector ) UnwindOpAsm . EmitVFPRegSave ( Mask ) ; else UnwindOpAsm . EmitRegSave ( Mask ) ; } else if ( Idx > <NUM_LIT> && RegList [ Idx - <NUM_LIT> ] == <STR_LIT> ) { -- Idx ; SPOffset -= <NUM_LIT> ; FlushPendingOffset ( )


<s> if ( ! IsThumb ) return Val ; unsigned Type = cast < MCSymbolELF > ( Symbol ) -> getType ( ) ; if ( ( Type == ELF :: STT_FUNC || Type == ELF :: STT_GNU_IFUNC ) && Symbol -> isDefined ( ) ) getAssembler ( ) . setIsThumbFunc ( Symbol ) ; return Val


<s> getStreamer ( ) . setAttributeItem ( Attribute , Value ,


<s> void <ISA_LIT>TargetELFStreamer :: emitTextAttribute ( unsigned


<s> getAssembler ( ) . setIsThumbFunc ( Func ) ; emitSymbolAttribute ( Func , MCSA_ELF_TypeFunction


<s> void emitValueImpl ( const MCExpr * Value , unsigned Size , SMLoc Loc ) override { if ( const MCSymbolRefExpr * SRE = dyn_cast_or_null < MCSymbolRefExpr > ( Value ) ) { if ( SRE -> getKind ( ) == MCSymbolRefExpr :: VK_<ISA_LIT>_SBREL && ! ( Size == <NUM_LIT> ) ) { getContext ( ) . reportError ( Loc , <STR_LIT> ) ; return ; } getOrCreateDataFragment ( ) ; } emitDataMappingSymbol ( ) ; MCELFStreamer :: emitValueImpl ( Value , Size , Loc


<s> void <ISA_LIT>TargetELFStreamer :: finishAttributeSection ( ) { <ISA_LIT>ELFStreamer & S = getStreamer ( ) ; if ( FPU != <STR_LIT> ) emitFPUDefaultAttributes ( ) ; if ( Arch != <STR_LIT> :: INVALID ) emitArchDefaultAttributes ( ) ; if ( S . Contents . empty ( ) ) return ; auto LessTag = [ ] ( const MCELFStreamer :: AttributeItem & LHS , const MCELFStreamer :: AttributeItem & RHS ) -> bool { return ( RHS . Tag != <STR_LIT> ) && ( ( LHS . Tag == <STR_LIT> ) || ( LHS . Tag < RHS . Tag ) ) ; } ; llvm :: sort ( S .


<s> MCTargetStreamer & TS = * getTargetStreamer ( ) ; <ISA_LIT>TargetStreamer & ATS = static_cast < <ISA_LIT>TargetStreamer


<s> static void printRegs ( formatted_raw_ostream & OS , ListSeparator & LS , int First ,


<s> SmallString < <NUM_LIT> > EHSecName ( Prefix ) ; if ( FnSecName != <STR_LIT> ) { EHSecName += FnSecName ; } const MCSymbolELF * Group = FnSection . getGroup ( ) ; if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , true , FnSection . getUniqueID ( ) , static_cast < const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection ) ; emitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> ,


<s> MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , true , FnSection . getUniqueID ( ) , static_cast < const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection ) ; emitValueToAlignment ( <NUM_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT>


<s> assert ( getStreamer ( ) . Contents . empty ( ) && <STR_LIT> ) ; CurrentVendor =


<s> assert ( getStreamer ( ) . Contents . empty ( ) && <STR_LIT> ) ; CurrentVendor = Vendor


<s> StringRef Name = ELFAttrs :: attrTypeAsString ( Attribute , <STR_LIT> ) ; if ( ! Name . empty ( ) ) OS


<s> void setAttributeItem ( unsigned Attribute , StringRef Value , bool OverwriteExisting ) { if ( AttributeItem * Item = getAttributeItem ( Attribute ) ) { if ( ! OverwriteExisting ) return ; Item -> Type = AttributeItem :: TextAttribute ; Item -> StringValue = std :: string ( Value


<s> Item -> Type = AttributeItem :: NumericAndTextAttributes ; Item -> IntValue = IntValue ; Item -> StringValue = std :: string ( StringValue ) ; return ; } AttributeItem Item = { AttributeItem :: NumericAndTextAttributes , Attribute , IntValue , std :: string


<s> void setAttributeItems ( unsigned Attribute , unsigned IntValue , StringRef StringValue , bool OverwriteExisting ) { if ( AttributeItem * Item = getAttributeItem ( Attribute ) ) { if ( ! OverwriteExisting ) return ; Item -> Type = AttributeItem ::


<s> } const MCSymbolELF * Group = FnSection . getGroup ( ) ; if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , true , FnSection . getUniqueID ( ) , static_cast < const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection )


<s> EHSecName += FnSecName ; } const MCSymbolELF * Group = FnSection . getGroup ( ) ; if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , true , FnSection . getUniqueID ( ) , static_cast < const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection


<s> SwitchToExIdxSection ( * FnStart ) ; if ( PersonalityIndex < <STR_LIT> :: NUM_PERSONALITY_INDEX && ! IsAndroid ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( FnStartRef , <NUM_LIT> ) ; if ( CantUnwind ) { EmitIntValue ( <STR_LIT> :: EXIDX_CANTUNWIND , <NUM_LIT> ) ; } else if ( ExTab


<s> void <ISA_LIT>ELFStreamer :: emitFnEnd ( ) { assert ( FnStart && <STR_LIT> ) ; if ( ! ExTab && ! CantUnwind ) FlushUnwindOpcodes ( true ) ; SwitchToExIdxSection ( * FnStart ) ; if ( PersonalityIndex < <STR_LIT> :: NUM_PERSONALITY_INDEX && ! IsAndroid ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( FnStartRef , <NUM_LIT> ) ; if ( CantUnwind ) { EmitIntValue ( <STR_LIT> :: EXIDX_CANTUNWIND , <NUM_LIT> ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( ExTabEntryRef , <NUM_LIT> ) ; } else { assert ( PersonalityIndex == <STR_LIT> :: AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) == <NUM_LIT> && <STR_LIT> ) ; uint64_t Intval = Opcodes [ <NUM_LIT> ] | Opcodes [ <NUM_LIT> ] << <NUM_LIT> | Opcodes [ <NUM_LIT> ] << <NUM_LIT> | Opcodes [ <NUM_LIT> ] << <NUM_LIT> ; EmitIntValue ( Intval , Opcodes . size (


<s> void EmitInstruction ( const MCInst & Inst , const MCSubtargetInfo & STI ) override { if ( IsThumb ) EmitThumbMappingSymbol


<s> auto * Symbol = cast < MCSymbolELF > ( getContext ( ) . getOrCreateSymbol ( Name +

<STR_LIT> + Twine ( MappingSymbolCounter ++ ) ) ) ;


<s> void EmitMappingSymbol ( StringRef Name , SMLoc Loc , MCFragment * F , uint64_t Offset ) { auto * Symbol = cast < MCSymbolELF > ( getContext ( ) . getOrCreateSymbol ( Name + <STR_LIT> + Twine ( MappingSymbolCounter ++ ) ) ) ; EmitLabelAtPos ( Symbol , Loc , F , Offset ) ; Symbol -> setType ( ELF ::


<s> void EmitValueImpl ( const MCExpr * Value , unsigned Size , const SMLoc & Loc ) override { if ( const MCSymbolRefExpr * SRE = dyn_cast_or_null < MCSymbolRefExpr > ( Value ) ) if ( SRE -> getKind ( ) == MCSymbolRefExpr :: VK_<ISA_LIT>_SBREL && ! ( Size == <NUM_LIT> ) ) getContext ( ) . FatalError ( Loc , <STR_LIT> ) ; EmitDataMappingSymbol ( ) ; MCELFStreamer :: EmitValueImpl ( Value , Size


<s> const size_t VendorHeaderSize = <NUM_LIT> + CurrentVendor . size ( ) + <NUM_LIT> ; const size_t TagHeaderSize = <NUM_LIT> + <NUM_LIT> ; const size_t ContentsSize = calculateContentSize ( ) ; Streamer . EmitIntValue ( VendorHeaderSize + TagHeaderSize + ContentsSize , <NUM_LIT> ) ; Streamer . EmitBytes ( CurrentVendor ) ; Streamer . EmitIntValue ( <NUM_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( <STR_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( TagHeaderSize + ContentsSize , <NUM_LIT> ) ; for ( size_t i = <NUM_LIT> ; i < Contents . size ( ) ; ++ i ) { AttributeItem item = Contents [ i ] ; Streamer . EmitULEB128IntValue ( item . Tag ) ; switch ( item . Type ) { default : llvm_unreachable ( <STR_LIT> ) ; case AttributeItem :: NumericAttribute : Streamer . EmitULEB128IntValue ( item . IntValue ) ; break ; case AttributeItem :: TextAttribute : Streamer . EmitBytes ( item . StringValue ) ; Streamer . EmitIntValue ( <NUM_LIT> , <NUM_LIT>


<s> if ( FnSecName != <STR_LIT> ) { EHSecName += FnSecName ; } const MCSectionELF * EHSection = nullptr ; if ( const MCSymbol * Group = FnSection . getGroup ( ) ) { EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags | ELF :: SHF_GROUP , FnSection . getEntrySize ( ) , Group -> getName ( ) ) ; } else


<s> SmallString < <NUM_LIT> > EHSecName ( Prefix ) ; if ( FnSecName != <STR_LIT> ) { EHSecName += FnSecName ; } const MCSectionELF * EHSection = nullptr ; if ( const MCSymbol * Group = FnSection . getGroup ( ) ) { EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags | ELF :: SHF_GROUP , FnSection . getEntrySize ( ) , Group -> getName ( ) ) ; }


<s> const MCSymbolData & SD = Streamer . getOrCreateSymbolData ( Symbol ) ; if ( MCELF :: GetType ( SD ) & ( ELF :: STT_FUNC << ELF_STT_Shift ) ) Streamer


<s> auto * Symbol = cast < MCSymbolELF > ( getContext ( ) . getOrCreateSymbol ( Name + <STR_LIT> + Twine ( MappingSymbolCounter ++ ) ) ) ; emitLabelAtPos ( Symbol , Loc


<s> const MCSymbolELF * Group = FnSection . getGroup ( ) ; if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , FnSection . getUniqueID ( ) , static_cast < const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection )


<s> MCELFStreamer * create<ISA_LIT>ELFStreamer ( MCContext & Context , MCAsmBackend & TAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool IsThumb ) { <ISA_LIT>ELFStreamer * S = new <ISA_LIT>ELFStreamer ( Context , TAB , OS


<s> MCELFStreamer * create<ISA_LIT>ELFStreamer ( MCContext & Context , MCAsmBackend & TAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool RelaxAll , bool IsThumb ) { <ISA_LIT>ELFStreamer * S = new <ISA_LIT>ELFStreamer ( Context , TAB , OS , Emitter , IsThumb ) ; S -> getAssembler ( ) . setELFHeaderEFlags ( ELF :: EF_<ISA_LIT>_EABI_VER5


<s> setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; setAttributeItem ( Virtualization_use , AllowTZ , false ) ; break ; case <STR_LIT> : setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> : setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , RealTimeProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , MicroControllerProfile , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; setAttributeItem ( MPextension_use , Allowed , false ) ; setAttributeItem ( Virtualization_use , AllowTZVirtualization , false ) ; break ; case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; setAttributeItem ( WMMX_arch , AllowWMMXv1 , false ) ; break ; case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed


<s> void <ISA_LIT>TargetAsmStreamer :: emitArchExtension ( unsigned ArchExt


<s> case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false )


<s> switch ( ID ) { default : llvm_unreachable ( <STR_LIT> ) ; break ; case <STR_LIT> : \


<s> FlushPendingOffset ( ) ; } UnwindOpAsm . Finalize ( PersonalityIndex , Opcodes ) ; if ( NoHandlerData && PersonalityIndex == <STR_LIT> :: AEABI_UNWIND_CPP_PR0 ) return ; SwitchToExTabSection ( * FnStart ) ; assert ( ! ExTab ) ; ExTab = getContext ( ) . createTempSymbol ( ) ; emitLabel ( ExTab ) ; if ( Personality ) { const MCSymbolRefExpr * PersonalityRef = MCSymbolRefExpr :: create ( Personality , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; emitValue ( PersonalityRef , <NUM_LIT> ) ; } assert ( ( Opcodes . size ( ) % <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; for ( unsigned I = <NUM_LIT> ; I != Opcodes . size ( ) ; I += <NUM_LIT> ) { uint64_t Intval = Opcodes [ I ] | Opcodes [ I + <NUM_LIT> ] << <NUM_LIT> | Opcodes [ I

+ <NUM_LIT> ] << <NUM_LIT> | Opcodes [ I + <NUM_LIT> ] << <NUM_LIT> ;


<s> <ISA_LIT>ELFStreamer ( MCContext & Context , std :: unique_ptr < MCAsmBackend > TAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > Emitter , bool IsThumb ) : MCELFStreamer ( Context , std

:: move ( TAB ) , OS , std :: move ( Emitter ) ) , IsThumb ( IsThumb ) {


<s> <ISA_LIT>ELFStreamer ( MCContext & Context , std :: unique_ptr < MCAsmBackend > TAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > Emitter , bool IsThumb ) : MCELFStreamer ( Context , std :: move ( TAB ) , OS , std :: move ( Emitter


<s> <ISA_LIT>ELFStreamer * S = new <ISA_LIT>ELFStreamer ( Context , std :: move ( TAB ) , OS , std :: move ( Emitter ) , IsThumb ) ; S -> getAssembler ( ) . setELFHeaderEFlags ( ELF :: EF_<ISA_LIT>_EABI_VER5 ) ; if ( RelaxAll ) S -> getAssembler ( ) . setRelaxAll ( true ) ; return


<s> case <STR_LIT> : setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , RealTimeProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , MicroControllerProfile , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; setAttributeItem ( MPextension_use , Allowed , false ) ; setAttributeItem ( Virtualization_use , AllowTZVirtualization ,


<s> <ISA_LIT>ELFStreamer ( MCContext & Context , MCAsmBackend & TAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool IsThumb ) : MCELFStreamer ( SK_<ISA_LIT>ELFStreamer , Context , TAB , OS , Emitter ) , IsThumb ( IsThumb ) , MappingSymbolCounter ( <NUM_LIT> ) , LastEMS ( EMS_None ) { Reset (


<s> LastMappingSymbols [ getPreviousSection ( ) . first ] = LastEMS ; LastEMS = LastMappingSymbols . lookup ( Section


<s> virtual void EmitBytes ( StringRef Data ) { EmitDataMappingSymbol ( ) ; MCELFStreamer :: EmitBytes


<s> } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: Create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( ExTabEntryRef , <NUM_LIT> ) ; } else { assert ( PersonalityIndex == AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) == <NUM_LIT> && <STR_LIT> ) ; EmitBytes ( StringRef ( reinterpret_cast < const char * > ( Opcodes . data ( ) ) , Opcodes . size ( ) ) ) ; } SwitchSection ( & FnStart -> getSection ( ) ) ; Reset (


<s> if ( CantUnwind ) { EmitIntValue ( EXIDX_CANTUNWIND , <NUM_LIT> ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: Create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( ExTabEntryRef , <NUM_LIT> ) ; } else { assert ( PersonalityIndex == AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) ==


<s> void <ISA_LIT>ELFStreamer :: EmitHandlerData ( ) { FlushUnwindOpcodes (


<s> void <ISA_LIT>ELFStreamer :: EmitPad ( int64_t Offset ) { SPOffset -=


<s> void <ISA_LIT>ELFStreamer :: EmitPersonality ( const MCSymbol * Per ) { Personality = Per


<s> const MCRegisterInfo * MRI = getContext ( ) . getRegisterInfo ( ) ; for ( size_t i = <NUM_LIT> ; i < RegList . size ( ) ; ++ i ) { unsigned Reg = MRI -> getEncodingValue ( RegList [ i ] ) ; assert ( Reg < ( IsVector ? <NUM_LIT> : <NUM_LIT> ) && <STR_LIT> ) ; unsigned Bit = ( <NUM_LIT> << Reg ) ; if ( ( Mask & Bit ) == <NUM_LIT> ) { Mask |= Bit ; ++ Count ; } } SPOffset -= Count * ( IsVector ? <NUM_LIT> : <NUM_LIT> ) ; FlushPendingOffset ( ) ; if ( IsVector ) UnwindOpAsm . EmitVFPRegSave ( Mask ) ; else UnwindOpAsm . EmitRegSave (


<s> assert ( ( NewSPReg == <STR_LIT> || NewSPReg == FPReg ) && <STR_LIT> ) ; UsedFP = true ; FPReg =


<s> virtual void EmitValueImpl ( const MCExpr *


<s> if ( UsedFP ) { const MCRegisterInfo * MRI = getContext ( ) . getRegisterInfo ( ) ; int64_t LastRegSaveSPOffset = SPOffset - PendingOffset ; UnwindOpAsm . EmitSPOffset ( LastRegSaveSPOffset - FPOffset ) ; UnwindOpAsm . EmitSetSP ( MRI -> getEncodingValue ( FPReg ) ) ; } else { FlushPendingOffset ( ) ; } UnwindOpAsm . Finalize ( PersonalityIndex , Opcodes ) ; if ( NoHandlerData && PersonalityIndex == AEABI_UNWIND_CPP_PR0 ) return ; SwitchToExTabSection ( * FnStart ) ; assert ( ! ExTab ) ; ExTab = getContext ( ) . CreateTempSymbol ( ) ; EmitLabel ( ExTab ) ; if ( Personality ) { const MCSymbolRefExpr * PersonalityRef = MCSymbolRefExpr :: Create ( Personality , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( PersonalityRef , <NUM_LIT> ) ; } EmitBytes ( StringRef ( reinterpret_cast < const char * > ( Opcodes . data ( ) ) , Opcodes . size (


<s> assert ( Index < NUM_PERSONALITY_INDEX && <STR_LIT> ) ; return ( Twine ( <STR_LIT> ) + Twine ( Index ) ) . str (


<s> PendingOffset = <NUM_LIT> ; UsedFP = false ; CantUnwind = false ; Opcodes . clear ( ) ; UnwindOpAsm . Reset (


<s> SmallString < <NUM_LIT> > EHSecName ( Prefix ) ; if ( FnSecName != <STR_LIT> ) { EHSecName += FnSecName ; } const MCSectionELF * EHSection = NULL ; if ( const MCSymbol * Group = FnSection . getGroup ( ) ) { EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags | ELF :: SHF_GROUP , Kind , FnSection . getEntrySize ( ) , Group -> getName ( ) ) ; } else { EHSection = getContext ( ) . getELFSection ( EHSecName ,


<s> MCELFStreamer :: EmitAssemblerFlag ( Flag ) ; switch ( Flag ) { case MCAF_SyntaxUnified : return ; case MCAF_Code16 : IsThumb =


<s> void <ISA_LIT>TargetAsmStreamer :: emitArch ( unsigned Arch ) { OS << <STR_LIT> << <STR_LIT> (


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; setAttributeItem ( Virtualization_use , AllowTZ , false ) ; break ; case <STR_LIT> : setAttributeItem ( THUMB_ISA_use , Allowed , false ) ; break ; case <STR_LIT> : setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , RealTimeProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : setAttributeItem ( CPU_arch_profile , MicroControllerProfile , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false ) ; break ; case <STR_LIT> : case <STR_LIT> : setAttributeItem ( CPU_arch_profile , ApplicationProfile , false ) ; setAttributeItem ( <ISA_LIT>_ISA_use , Allowed , false ) ; setAttributeItem ( THUMB_ISA_use , AllowThumb32 , false


<s> OS << <STR_LIT> << <STR_LIT> ( ArchExt )


<s> void <ISA_LIT>TargetAsmStreamer :: emitArchExtension ( unsigned ArchExt ) { OS << <STR_LIT> << <STR_LIT> ( ArchExt


<s> Symbol -> setExternal ( false ) ; AssignSection ( Symbol , getCurrentSection ( ) . first ) ; const MCExpr * Value = MCSymbolRefExpr :: create ( Start , getContext ( ) ) ; Symbol -> setVariableValue (


<s> OS << <STR_LIT> << <STR_LIT> ( Arch )


<s> void EmitValueImpl ( const MCExpr * Value , unsigned Size , const SMLoc & Loc ) override { if ( const MCSymbolRefExpr * SRE = dyn_cast_or_null < MCSymbolRefExpr > ( Value ) ) if ( SRE -> getKind ( ) == MCSymbolRefExpr :: VK_<ISA_LIT>_SBREL && ! ( Size == <NUM_LIT> )

) getContext ( ) . reportFatalError ( Loc , <STR_LIT> ) ;


<s> if ( AttributeSection ) { Streamer . SwitchSection ( AttributeSection ) ; } else { AttributeSection = Streamer . getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_<ISA_LIT>_ATTRIBUTES , <NUM_LIT> , SectionKind :: getMetadata ( ) ) ; Streamer . SwitchSection ( AttributeSection ) ; Streamer . EmitIntValue ( <NUM_LIT> , <NUM_LIT> ) ; } const size_t VendorHeaderSize = <NUM_LIT> + CurrentVendor . size ( ) + <NUM_LIT> ; const size_t TagHeaderSize = <NUM_LIT> + <NUM_LIT> ; const size_t ContentsSize = calculateContentSize ( ) ; Streamer . EmitIntValue ( VendorHeaderSize + TagHeaderSize + ContentsSize , <NUM_LIT> ) ; Streamer . EmitBytes ( CurrentVendor ) ; Streamer . EmitIntValue ( <NUM_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( <STR_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( TagHeaderSize + ContentsSize , <NUM_LIT> ) ; for ( size_t i = <NUM_LIT> ; i < Contents . size ( ) ; ++ i ) { AttributeItem item = Contents [


<s> <ISA_LIT>ELFStreamer ( MCContext & Context , MCTargetStreamer * TargetStreamer , MCAsmBackend & TAB , raw_ostream & OS , MCCodeEmitter * Emitter , bool IsThumb ) : MCELFStreamer ( Context , TargetStreamer , TAB

, OS , Emitter ) , IsThumb ( IsThumb ) , MappingSymbolCounter ( <NUM_LIT> ) , LastEMS ( EMS_None ) {


<s> AttributeItem item = Contents [ i ] ; switch ( item . Type ) { case AttributeItem :: HiddenAttribute : break ; case AttributeItem :: NumericAttribute : Result += getULEBSize ( item . Tag


<s> <ISA_LIT>TargetELFStreamer * TS = new <ISA_LIT>TargetELFStreamer ( ) ; <ISA_LIT>ELFStreamer * S = new <ISA_LIT>ELFStreamer ( Context , TS , TAB , OS , Emitter , IsThumb ) ; S -> getAssembler ( ) . setELFHeaderEFlags ( ELF :: EF_<ISA_LIT>_EABI_VER5 ) ; if ( RelaxAll ) S -> getAssembler ( ) . setRelaxAll ( true ) ; if ( NoExecStack ) S -> getAssembler ( ) . setNoExecStack (


<s> S -> getAssembler ( ) . setELFHeaderEFlags ( ELF :: EF_<ISA_LIT>_EABI_VER5 ) ; if ( RelaxAll ) S -> getAssembler ( ) . setRelaxAll ( true ) ; if ( NoExecStack ) S -> getAssembler ( ) . setNoExecStack


<s> return llvm :: createAsmStreamer ( Ctx , S , OS , isVerboseAsm , useLoc , useCFI , useDwarfDirectory , InstPrint , CE


<s> if ( PersonalityIndex < NUM_PERSONALITY_INDEX ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: Create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( FnStartRef , <NUM_LIT> ) ; if ( CantUnwind ) { EmitIntValue ( EXIDX_CANTUNWIND , <NUM_LIT> ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: Create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 ,


<s> if ( ! ExTab && ! CantUnwind ) FlushUnwindOpcodes ( true ) ; SwitchToExIdxSection ( * FnStart ) ; if ( PersonalityIndex < NUM_PERSONALITY_INDEX ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: Create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( FnStartRef , <NUM_LIT> ) ; if ( CantUnwind ) { EmitIntValue ( EXIDX_CANTUNWIND , <NUM_LIT> ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: Create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( ExTabEntryRef , <NUM_LIT> ) ; } else { assert ( PersonalityIndex == AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) == <NUM_LIT> && <STR_LIT> ) ; EmitBytes ( StringRef ( reinterpret_cast < const char * > ( Opcodes . data ( ) ) , Opcodes . size ( ) ) ) ; } SwitchSection ( & FnStart -> getSection (


<s> setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT>


<s> case <STR_LIT> : case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT> : setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; setAttributeItem ( <STR_LIT> , <STR_LIT> , false ) ; break ; case <STR_LIT>


<s> } const size_t VendorHeaderSize = <NUM_LIT> + CurrentVendor . size ( ) + <NUM_LIT> ; const size_t TagHeaderSize = <NUM_LIT> + <NUM_LIT> ; const size_t ContentsSize = calculateContentSize ( ) ; Streamer . EmitIntValue ( VendorHeaderSize + TagHeaderSize + ContentsSize , <NUM_LIT> ) ; Streamer . EmitBytes ( CurrentVendor ) ; Streamer . EmitIntValue ( <NUM_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( <STR_LIT> , <NUM_LIT> ) ; Streamer . EmitIntValue ( TagHeaderSize + ContentsSize , <NUM_LIT> ) ; for ( size_t i = <NUM_LIT> ; i < Contents . size ( ) ; ++ i ) { AttributeItem item = Contents [ i ] ; Streamer . EmitULEB128IntValue ( item . Tag ) ; switch ( item . Type


<s> void <ISA_LIT>ELFStreamer :: FinishImpl ( ) { MCTargetStreamer & TS = getTargetStreamer ( ) ; <ISA_LIT>TargetStreamer & ATS = static_cast < <ISA_LIT>TargetStreamer


<s> <ISA_LIT>ELFStreamer * S = static_cast < <ISA_LIT>ELFStreamer * > (


<s> size_t Size = <NUM_LIT> ; do { Value >>= <NUM_LIT> ; Size += sizeof ( int8_t


<s> if ( FnSecName != <STR_LIT> ) { EHSecName += FnSecName ; } const MCSymbolELF * Group = FnSection . getGroup ( ) ; if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , FnSection . getUniqueID ( ) , static_cast <

const MCSymbolELF * > ( FnSection . getBeginSymbol ( ) ) ) ;


<s> void ChangeSection ( MCSection * Section , const MCExpr * Subsection ) override { LastMappingSymbols [ getPreviousSection ( ) . first ] =


<s> if ( ! ExTab && ! CantUnwind ) FlushUnwindOpcodes ( true ) ; SwitchToExIdxSection ( * FnStart ) ; if ( PersonalityIndex < NUM_PERSONALITY_INDEX ) EmitPersonalityFixup ( GetAEABIUnwindPersonalityName ( PersonalityIndex ) ) ; const MCSymbolRefExpr * FnStartRef = MCSymbolRefExpr :: Create ( FnStart , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( FnStartRef , <NUM_LIT> , <NUM_LIT> ) ; if ( CantUnwind ) { EmitIntValue ( EXIDX_CANTUNWIND , <NUM_LIT> , <NUM_LIT> ) ; } else if ( ExTab ) { const MCSymbolRefExpr * ExTabEntryRef = MCSymbolRefExpr :: Create ( ExTab , MCSymbolRefExpr :: VK_<ISA_LIT>_PREL31 , getContext ( ) ) ; EmitValue ( ExTabEntryRef , <NUM_LIT> , <NUM_LIT> ) ; } else { assert ( PersonalityIndex == AEABI_UNWIND_CPP_PR0 && <STR_LIT> ) ; assert ( Opcodes . size ( ) == <NUM_LIT> && <STR_LIT> ) ; EmitBytes ( StringRef ( reinterpret_cast < const char * > ( Opcodes . data ( ) ) , Opcodes . size (


<s> if ( Group ) Flags |= ELF :: SHF_GROUP ; MCSectionELF * EHSection = getContext ( ) . getELFSection ( EHSecName , Type , Flags , <NUM_LIT> , Group , FnSection . getUniqueID ( ) , & FnSection ) ; assert ( EHSection && <STR_LIT> ) ; SwitchSection ( EHSection


<s> void EmitValueImpl ( const MCExpr * Value , unsigned Size , SMLoc Loc ) override { if ( const MCSymbolRefExpr * SRE = dyn_cast_or_null < MCSymbolRefExpr > ( Value ) ) if ( SRE -> getKind ( ) == MCSymbolRefExpr

:: VK_<ISA_LIT>_SBREL && ! ( Size == <NUM_LIT> ) ) getContext ( ) . reportFatalError ( Loc , <STR_LIT> ) ;


<s> SwitchToEHSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_ALLOC , SectionKind :: getDataRel


<s> long int <ISA_LIT>ELFWriterInfo :: computeRelocation ( unsigned SymOffset , unsigned RelOffset , unsigned RelTy ) const { llvm_unreachable ( <STR_LIT>


<s> long int <ISA_LIT>ELFWriterInfo :: getDefaultAddendForRelTy ( unsigned RelTy , long int Modifier ) const { llvm_unreachable ( <STR_LIT> <STR_LIT>


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_CALL ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_MOVT_ABS ; case <STR_LIT> : return ELF


<s> switch ( MachineRelTy ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : llvm_unreachable ( <STR_LIT>


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; return


<s> long int <ISA_LIT>ELFWriterInfo :: getDefaultAddendForRelTy ( unsigned RelTy , long int Modifier


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; break ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_CALL ; break ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_MOVT_ABS ; break ; case <STR_LIT> : return ELF :: R_<ISA_LIT>_MOVW_ABS_NC ;


<s> return false ; } if ( pConfig . targets ( ) . triple ( ) . isOSWindows ( ) ) { assert ( <NUM_LIT> && <STR_LIT> ) ; return


<s> pConfig . attribute ( ) . constraint ( ) . enableAsNeeded ( ) ; pConfig . attribute ( ) . constraint ( ) . setSharedSystem ( ) ; pConfig . attribute ( ) . predefined ( ) . unsetWholeArchive ( ) ; pConfig . attribute ( ) . predefined ( ) . unsetAsNeeded ( ) ; pConfig . attribute ( ) . predefined ( ) . setDynamic ( ) ; if ( pConfig . options ( ) . getScriptList ( ) . empty ( ) && pConfig . codeGenType ( ) != LinkerConfig :: Object ) { pScript . sectionMap ( ) . insert ( <STR_LIT> , <STR_LIT> ) ; pScript . sectionMap ( ) . insert ( <STR_LIT> , <STR_LIT> ) ; pScript . sectionMap ( ) . insert ( <STR_LIT> , <STR_LIT> ) ; } return


<s> mcld :: TargetRegistry :: RegisterEmulation ( mcld ::

TheThumbTarget , mcld :: emulate<ISA_LIT>LD ) ;


<s> <ISA_LIT>ExSectionTuple * exTuple = it -> second . get ( ) ; LDSection * const text = exTuple -> getTextSection ( ) ; LDSection * const exIdx = exTuple -> getExIdxSection ( ) ; if ( ( text -> kind ( ) == LDFileFormat :: Ignore ) || ( text -> kind ( ) == LDFileFormat :: Folded ) ) { exIdx -> setKind ( LDFileFormat :: Ignore ) ; <STR_LIT> deadIt = it ++ ; exMap -> erase ( deadIt ) ; continue ; } RegionFragment * textFrag = findRegionFragment ( * text ) ; RegionFragment * exIdxFrag = findRegionFragment ( * exIdx ) ; exTuple -> setTextFragment ( textFrag ) ; exTuple -> setExIdxFragment ( exIdxFrag ) ; if ( exIdxFrag == NULL ) { <STR_LIT> deadIt = it ++


<s> SectMap :: const_iterator it = m_SectToExData . find ( & pSect ) ; if ( it == m_SectToExData . end ( ) ) { return


<s> RegionFragment * getExIdxFragment ( ) const { return m_pExIdxFragment


<s> LDSection * getTextSection ( ) const


<s> if ( it == m_ExIdxToTuple . end ( ) ) { return NULL


<s> void setExIdxFragment ( RegionFragment *


<s> void setTextFragment ( RegionFragment *


<s> MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ; Modified |= ExpandMI ( MBB


<s> MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; unsigned SrcOpIdx = <NUM_LIT> ; if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc ) SrcOpIdx = OpIdx ++ ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcOpIdx != <NUM_LIT> ) { MachineOperand MO = MI . getOperand ( SrcOpIdx ) ; MO . setImplicit ( true ) ; MIB . addOperand (


<s> if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; unsigned SrcOpIdx = <NUM_LIT> ; if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc ) SrcOpIdx = OpIdx ++ ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcOpIdx != <NUM_LIT> ) { MachineOperand MO = MI . getOperand ( SrcOpIdx ) ; MO . setImplicit ( true ) ; MIB . addOperand ( MO )


<s> NEONRegSpacing RegSpc = ( NEONRegSpacing ) TableEntry -> RegSpacing ; unsigned NumRegs = TableEntry -> NumRegs ; MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( TableEntry -> RealOpc ) ) ; unsigned OpIdx = <NUM_LIT> ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; bool SrcIsUndef = MI . getOperand ( OpIdx ) . isUndef ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , getUndefRegState ( SrcIsUndef ) ) ; MIB . addOperand ( MI . getOperand


<s> MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( Opc ) ) ; unsigned OpIdx = <NUM_LIT> ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( IsExt ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addReg ( SrcReg , RegState :: Implicit | getKillRegState ( SrcIsKill ) ) ; TransferImpOps ( MI , MIB


<s> D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; } else { assert ( RegSpc == OddDblSpc && <STR_LIT> ) ; D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg


<s> case MachineOperand :: MO_Register : case MachineOperand :: MO_Immediate : case MachineOperand :: MO_CImmediate : case MachineOperand :: MO_FPImmediate : return false ; case MachineOperand :: MO_MachineBasicBlock : return true ; case MachineOperand :: MO_FrameIndex : return false ; case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_TargetIndex : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress : return true ; case MachineOperand :: MO_RegisterMask : case MachineOperand :: MO_RegisterLiveOut : return false ; case MachineOperand :: MO_Metadata : case MachineOperand


<s> case MachineOperand :: MO_Immediate : case MachineOperand :: MO_CImmediate : case MachineOperand :: MO_FPImmediate : return false ; case MachineOperand :: MO_MachineBasicBlock : return true ; case MachineOperand :: MO_FrameIndex : return false ; case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_TargetIndex : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ExternalSymbol : case MachineOperand ::


<s> assert ( std :: is_sorted ( std :: begin ( NEONLdStTable ) , std :: end ( NEONLdStTable ) ) && <STR_LIT> ) ; TableChecked = true ; } auto I = std :: lower_bound ( std :: begin ( NEONLdStTable ) , std :: end


<s> auto I = std :: lower_bound ( std :: begin ( NEONLdStTable ) , std :: end ( NEONLdStTable ) , Opcode ) ; if ( I != std :: end ( NEONLdStTable ) && I -> PseudoOpc == Opcode ) return I ; return nullptr


<s> bool <ISA_LIT>ExpandPseudo :: runOnMachineFunction ( MachineFunction & MF ) { STI = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; TII = STI -> getInstrInfo ( ) ; TRI = STI -> getRegisterInfo ( ) ; AFI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; bool Modified = false ; for ( MachineFunction :: iterator MFI = MF . begin ( ) , E = MF . end ( ) ; MFI != E ; ++ MFI ) Modified |= ExpandMBB ( * MFI ) ; if ( Verify<ISA_LIT>Pseudo ) MF . verify ( this , <STR_LIT> ) ; return Modified


<s> unsigned DstReg = <NUM_LIT> ; bool DstIsDead = false ; if ( TableEntry -> IsLoad ) { DstIsDead = MI . getOperand ( OpIdx ) . isDead ( ) ; DstReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; } if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MachineOperand MO = MI .


<s> bool <ISA_LIT>ExpandPseudo :: ExpandMBB ( MachineBasicBlock & MBB ) { bool Modified = false ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = llvm :: next ( MBBI ) ; Modified |= ExpandMI ( MBB , MBBI ) ; MBBI =


<s> MachineInstr & MI = * MBBI ; unsigned Opcode = MI . getOpcode ( ) ; unsigned PredReg = <NUM_LIT> ; <STR_LIT> Pred = llvm :: getInstrPredicate ( & MI , PredReg ) ; unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; bool DstIsDead = MI . getOperand ( <NUM_LIT> ) . isDead ( ) ; bool isCC = Opcode == <STR_LIT> || Opcode == <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( isCC ? <NUM_LIT> : <NUM_LIT> ) ; MachineInstrBuilder LO16 , HI16 ; if ( ! STI -> hasV6T2Ops ( ) && ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ) { LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; unsigned ImmVal = ( unsigned ) MO . getImm ( ) ; unsigned SOImmValV1 = <STR_LIT> ( ImmVal ) ; unsigned SOImmValV2 = <STR_LIT> ( ImmVal ) ; LO16 = LO16 . addImm ( SOImmValV1 ) ; HI16 = HI16 . addImm ( SOImmValV2 ) ; LO16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; HI16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; LO16 . addImm ( Pred ) . addReg ( PredReg ) . addReg (


<s> return ; } unsigned LO16Opc = <NUM_LIT> ; unsigned HI16Opc = <NUM_LIT> ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } else { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( LO16Opc ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( HI16Opc ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; if ( MO . isImm ( ) ) { unsigned Imm = MO . getImm ( ) ; unsigned Lo16 = Imm & <NUM_LIT> ; unsigned Hi16 = ( Imm >> <NUM_LIT> ) & <NUM_LIT> ; LO16 = LO16 . addImm ( Lo16 ) ; HI16 = HI16 . addImm ( Hi16 ) ; } else { const GlobalValue * GV = MO . getGlobal ( ) ; unsigned TF = MO . getTargetFlags ( ) ; LO16 = LO16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; HI16 = HI16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; } LO16 -> setMemRefs ( MI . memoperands_begin ( )


<s> GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; unsigned SrcOpIdx = <NUM_LIT> ; if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc ) SrcOpIdx = OpIdx ++ ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcOpIdx


<s> unsigned DstReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; unsigned SrcOpIdx = <NUM_LIT> ; if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc ) SrcOpIdx = OpIdx ++ ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcOpIdx != <NUM_LIT> ) { MachineOperand MO = MI . getOperand ( SrcOpIdx ) ; MO . setImplicit ( true ) ; MIB . addOperand ( MO ) ; } MIB . addReg ( DstReg , RegState :: ImplicitDefine | getDeadRegState ( DstIsDead )


<s> unsigned OpIdx = <NUM_LIT> ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs


<s> bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcIsKill ) MIB -> addRegisterKilled


<s> unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) . addReg ( D1 ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D2 ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D3 ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand


<s> void <ISA_LIT>ExpandPseudo :: ExpandVTBL ( MachineBasicBlock :: iterator & MBBI , unsigned Opc , bool IsExt , unsigned NumRegs ) { MachineInstr & MI = * MBBI ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( Opc ) ) ; unsigned OpIdx = <NUM_LIT> ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( IsExt ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) . addReg ( D1 ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D2 ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg (


<s> static void addExclusiveRegPair ( MachineInstrBuilder & MIB , MachineOperand & Reg , unsigned Flags , bool IsThumb , const TargetRegisterInfo * TRI ) { if ( IsThumb ) { Register RegLo = TRI -> getSubReg ( Reg . getReg ( ) , <STR_LIT> ) ; Register RegHi = TRI -> getSubReg ( Reg . getReg ( ) , <STR_LIT> ) ; MIB . addReg ( RegLo , Flags ) ; MIB . addReg ( RegHi , Flags ) ; } else MIB . addReg ( Reg . getReg (


<s> Register RegHi = TRI -> getSubReg ( Reg . getReg ( ) , <STR_LIT> ) ; MIB . addReg ( RegLo , Flags ) ; MIB . addReg ( RegHi ,


<s> if ( LdrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; MIB . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( Dest . getReg ( ) , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredReg ) . add ( predOps ( <STR_LIT> ) ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; MIB = BuildMI ( StoreBB , DL , TII -> get ( StrexOp ) , TempReg ) . addReg ( NewReg ) . addReg ( AddrReg ) ; if ( StrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; MIB . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( TempReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB


<s> if ( TableEntry -> isUpdating ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MachineOperand MO = MI . getOperand ( OpIdx ++ ) ; if ( ! TableEntry -> IsLoad ) GetDSubRegs ( MO . getReg ( ) , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; unsigned SrcFlags = ( getUndefRegState ( MO . isUndef ( ) ) | getKillRegState ( MO . isKill ( ) ) ) ; MIB . addReg ( D0 , SrcFlags ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D1 , SrcFlags ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D2 , SrcFlags ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D3 , SrcFlags ) ; MIB . addImm ( Lane ) ; OpIdx += <NUM_LIT> ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MO . setImplicit ( true ) ; MIB . add ( MO


<s> } else { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( LO16Opc ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( HI16Opc ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; LO16 . setMIFlags ( MIFlags ) ; HI16 . setMIFlags ( MIFlags ) ; switch ( MO . getType ( ) ) { case MachineOperand :: MO_Immediate : { unsigned Imm = MO . getImm ( ) ; unsigned Lo16 = Imm & <NUM_LIT> ; unsigned Hi16 = ( Imm >> <NUM_LIT> ) & <NUM_LIT> ; LO16 = LO16 . addImm ( Lo16 ) ; HI16 = HI16 . addImm ( Hi16 ) ; break ; } case MachineOperand :: MO_ExternalSymbol : { const char * ES = MO . getSymbolName ( ) ; unsigned TF = MO . getTargetFlags ( ) ; LO16 = LO16 . addExternalSymbol ( ES , TF | <STR_LIT> ) ; HI16 = HI16 . addExternalSymbol ( ES , TF | <STR_LIT> ) ; break ; } default : { const GlobalValue * GV = MO . getGlobal ( ) ; unsigned TF = MO . getTargetFlags ( ) ; LO16 = LO16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; HI16 = HI16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; break ; } } LO16 . cloneMemRefs ( MI ) ; HI16 . cloneMemRefs ( MI ) ; LO16 . addImm ( Pred ) . addReg ( PredReg ) ; HI16 . addImm ( Pred ) . addReg ( PredReg ) ; if ( RequiresBundling ) finalizeBundle ( MBB , LO16 -> getIterator ( ) , MBBI -> getIterator ( ) ) ; if ( isCC ) LO16 . add ( makeImplicit ( MI .


<s> } if ( TableEntry -> isUpdating ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) { const MachineOperand & AM6Offset = MI . getOperand ( OpIdx ++ ) ; if ( TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> ) { assert ( AM6Offset . getReg ( ) == <NUM_LIT> && <STR_LIT> <STR_LIT> ) ; } else { MIB . add ( AM6Offset ) ; } } unsigned SrcOpIdx = <NUM_LIT> ; if ( TableEntry -> RealOpc != <STR_LIT> && TableEntry -> RealOpc != <STR_LIT> && TableEntry -> RealOpc != <STR_LIT> ) { if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc || RegSpc == SingleLowSpc || RegSpc == SingleHighQSpc || RegSpc == SingleHighTSpc ) SrcOpIdx = OpIdx ++ ; } MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( SrcOpIdx != <NUM_LIT> ) { MachineOperand MO = MI . getOperand ( SrcOpIdx ) ; MO . setImplicit ( true ) ; MIB . add ( MO ) ; } MIB . addReg ( DstReg , RegState :: ImplicitDefine | getDeadRegState ( DstIsDead ) ) ; TransferImpOps ( MI , MIB ,


<s> MachineOperand VdSrc ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( VdSrc ) ; } bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; Register SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; MachineOperand VmSrc ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( VmSrc ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++


<s> MIB . addReg ( D0 ) ; MachineOperand VmSrc ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( VmSrc ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addReg ( SrcReg , RegState :: Implicit | getKillRegState ( SrcIsKill ) ) ; TransferImpOps ( MI , MIB , MIB ) ; MI . eraseFromParent ( )


<s> } else if ( RegSpc == SingleHighTSpc ) { D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; } else if ( RegSpc == EvenDblSpc ) { D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; } else { assert ( RegSpc == OddDblSpc && <STR_LIT> ) ; D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT>


<s> } else if ( RegSpc == SingleHighTSpc ) { D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; } else if ( RegSpc == EvenDblSpc ) { D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; } else { assert ( RegSpc == OddDblSpc && <STR_LIT> ) ; D0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D1 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D2 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; D3 = TRI -> getSubReg


<s> case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress : return true ; case MachineOperand :: MO_RegisterMask : case MachineOperand :: MO_RegisterLiveOut : return false ; case MachineOperand :: MO_Metadata : case MachineOperand :: MO_MCSymbol : return true ; case MachineOperand :: MO_CFIIndex : return false ; case MachineOperand :: MO_IntrinsicID : case MachineOperand ::


<s> case MachineOperand :: MO_CImmediate : case MachineOperand :: MO_FPImmediate : case MachineOperand :: MO_ShuffleMask : return false ; case MachineOperand :: MO_MachineBasicBlock : return true ; case MachineOperand :: MO_FrameIndex : return false ; case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_TargetIndex : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress : return true


<s> static std :: atomic < bool > TableChecked ( false ) ; if ( ! TableChecked . load ( std :: memory_order_relaxed ) ) { assert ( std :: is_sorted ( std :: begin ( NEONLdStTable ) , std :: end ( NEONLdStTable ) ) && <STR_LIT> ) ; TableChecked . store ( true , std :: memory_order_relaxed ) ; } auto I = llvm :: lower_bound ( NEONLdStTable ,


<s> MachineOperand NewMO = MO ; NewMO . setImplicit ( ) ; return


<s> static MachineOperand makeImplicit ( const MachineOperand & MO ) { MachineOperand NewMO = MO ; NewMO . setImplicit ( ) ; return NewMO


<s> for ( unsigned i = Desc . getNumOperands ( ) , e = OldMI . getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = OldMI . getOperand (


<s> bool isCC = Opcode == <STR_LIT> || Opcode == <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( isCC ? <NUM_LIT> : <NUM_LIT> ) ; bool RequiresBundling = STI -> isTargetWindows ( ) && IsAnAddressOperand ( MO ) ; MachineInstrBuilder LO16 , HI16 ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; MI . dump ( ) ) ; if ( ! STI -> hasV6T2Ops ( ) && ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ) { assert ( ! STI -> isTargetWindows ( ) && <STR_LIT> ) ; LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; unsigned ImmVal = ( unsigned ) MO . getImm ( ) ; unsigned SOImmValV1 = <STR_LIT> ( ImmVal ) ; unsigned SOImmValV2 = <STR_LIT> ( ImmVal ) ; LO16 = LO16 . addImm ( SOImmValV1 ) ; HI16 = HI16 . addImm ( SOImmValV2 ) ; LO16 . cloneMemRefs ( MI ) ; HI16 . cloneMemRefs ( MI ) ; LO16 . addImm ( Pred ) . addReg ( PredReg ) . add ( condCodeOp ( ) ) ; HI16 . addImm ( Pred ) . addReg ( PredReg ) . add ( condCodeOp ( ) ) ; if ( isCC ) LO16 . add ( makeImplicit ( MI . getOperand ( <NUM_LIT> ) ) ) ; TransferImpOps ( MI , LO16 , HI16 ) ; MI . eraseFromParent ( ) ; return ; } unsigned LO16Opc = <NUM_LIT> ; unsigned HI16Opc = <NUM_LIT> ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } else { LO16Opc = <STR_LIT> ; HI16Opc =


<s> unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestLo , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredLo ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestHi , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredHi ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; unsigned STREXD = IsThumb ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( StoreBB , DL , TII -> get ( STREXD ) , TempReg ) ; unsigned Flags = getKillRegState ( New . isDead ( ) ) ; addExclusiveRegPair ( MIB , New , Flags , IsThumb , TRI ) ; MIB . addReg ( AddrReg ) . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( TempReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB ) ; DoneBB -> splice ( DoneBB -> end ( ) , & MBB , MI , MBB . end ( ) ) ; DoneBB -> transferSuccessors ( & MBB ) ; MBB . addSuccessor ( LoadCmpBB ) ; NextMBBI = MBB . end


<s> unsigned SubRegIndex ; if ( RegSpc == EvenDblSpc ) { SubRegIndex = <STR_LIT> ; } else { assert ( RegSpc == OddDblSpc && <STR_LIT> ) ; SubRegIndex = <STR_LIT> ; } unsigned SubReg = TRI -> getSubReg ( DstReg , SubRegIndex ) ; unsigned DstRegPair = TRI -> getMatchingSuperReg ( SubReg , <STR_LIT> , & <STR_LIT> ) ; MIB . addReg ( DstRegPair , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; } else { unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; } if ( TableEntry -> isUpdating ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand


<s> if ( TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> || TableEntry -> RealOpc == <STR_LIT> ) { assert ( AM6Offset . getReg ( ) == <NUM_LIT> && <STR_LIT> <STR_LIT> ) ; } else { MIB . add ( AM6Offset ) ; } } bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; bool SrcIsUndef = MI . getOperand ( OpIdx ) . isUndef ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , getUndefRegState (


<s> GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; MachineOperand VmSrc ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( VmSrc ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addReg ( SrcReg , RegState :: Implicit | getKillRegState ( SrcIsKill ) ) ; TransferImpOps ( MI , MIB , MIB ) ; MI . eraseFromParent ( ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; MIB .


<s> case MachineOperand :: MO_Register : case MachineOperand :: MO_Immediate : case MachineOperand :: MO_CImmediate : case MachineOperand :: MO_FPImmediate : return false ; case MachineOperand :: MO_MachineBasicBlock : return true ; case MachineOperand :: MO_FrameIndex : return false ; case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_TargetIndex : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress : return true ; case MachineOperand :: MO_RegisterMask : case MachineOperand :: MO_RegisterLiveOut : return false ; case MachineOperand :: MO_Metadata : case MachineOperand :: MO_MCSymbol : return true


<s> unsigned OpIdx = <NUM_LIT> ; if ( TableEntry -> isUpdating ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; bool SrcIsUndef = MI . getOperand ( OpIdx ) . isUndef ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg

( D1 , getUndefRegState ( SrcIsUndef ) ) ;


<s> void <ISA_LIT>ExpandPseudo :: ExpandVTBL ( MachineBasicBlock :: iterator & MBBI , unsigned Opc , bool IsExt ) { MachineInstr & MI = * MBBI ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( Opc ) ) ; unsigned OpIdx = <NUM_LIT> ; MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; if ( IsExt ) MIB . addOperand ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2


<s> } const NEONLdStTableEntry * I = std :: lower_bound ( NEONLdStTable , NEONLdStTable + NumEntries , Opcode ) ; if ( I != NEONLdStTable + NumEntries && I -> PseudoOpc == Opcode ) return


<s> MIB = BuildMI ( LoadCmpBB , DL , TII -> get ( LdrexOp ) , Dest . getReg ( ) ) ; MIB . addReg ( AddrReg ) ; if ( LdrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; MIB . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( Dest . getReg ( ) , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredReg ) . add ( predOps ( <STR_LIT> ) ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; MIB = BuildMI ( StoreBB , DL , TII -> get ( StrexOp ) , TempReg ) . addReg ( NewReg ) . addReg ( AddrReg ) ; if ( StrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; MIB . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( TempReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB ) ; DoneBB -> splice ( DoneBB -> end ( ) , & MBB , MI , MBB . end ( ) ) ; DoneBB -> transferSuccessors ( & MBB ) ; MBB . addSuccessor ( LoadCmpBB ) ; NextMBBI = MBB . end ( ) ; MI . eraseFromParent ( ) ; const MachineRegisterInfo & MRI = MBB . getParent ( ) -> getRegInfo ( ) ; LivePhysRegs LiveRegs ; computeLiveIns ( LiveRegs , MRI , * DoneBB ) ; computeLiveIns ( LiveRegs , MRI , * StoreBB ) ; computeLiveIns ( LiveRegs , MRI , * LoadCmpBB ) ; StoreBB -> clearLiveIns ( ) ; computeLiveIns ( LiveRegs , MRI , * StoreBB ) ; LoadCmpBB -> clearLiveIns ( ) ; computeLiveIns ( LiveRegs , MRI


<s> MIB . addReg ( AddrReg ) . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestLo , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredLo ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestHi , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredHi ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; unsigned STREXD = IsThumb ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( StoreBB , DL , TII -> get ( STREXD ) , TempReg ) ; addExclusiveRegPair ( MIB , New , <NUM_LIT> , IsThumb , TRI ) ; MIB . addReg ( AddrReg ) . add ( predOps ( <STR_LIT> ) ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( TempReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB


<s> if ( TableEntry -> IsLoad ) { DstIsDead = MI . getOperand ( OpIdx ) . isDead ( ) ; DstReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; } if ( TableEntry -> isUpdating ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MachineOperand MO = MI . getOperand ( OpIdx


<s> bool RequiresBundling = STI -> isTargetWindows ( ) && IsAnAddressOperand ( MO ) ; MachineInstrBuilder LO16 , HI16 ; if ( ! STI -> hasV6T2Ops ( ) && ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ) { assert ( ! STI -> isTargetWindows ( ) && <STR_LIT> ) ; LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; unsigned ImmVal = ( unsigned ) MO . getImm ( ) ; unsigned SOImmValV1 = <STR_LIT> ( ImmVal ) ; unsigned SOImmValV2 = <STR_LIT> ( ImmVal ) ; LO16 = LO16 . addImm ( SOImmValV1 ) ; HI16 = HI16 . addImm ( SOImmValV2 ) ; LO16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; HI16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; LO16 . addImm ( Pred ) . addReg ( PredReg ) . add ( condCodeOp ( ) ) ; HI16 . addImm ( Pred ) . addReg ( PredReg ) . add ( condCodeOp ( ) ) ; TransferImpOps ( MI , LO16 , HI16 ) ; MI . eraseFromParent ( ) ; return ; } unsigned LO16Opc = <NUM_LIT> ; unsigned HI16Opc = <NUM_LIT> ; if ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } else { LO16Opc = <STR_LIT> ; HI16Opc = <STR_LIT> ; } LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( LO16Opc ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( HI16Opc ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; switch ( MO . getType ( ) ) { case MachineOperand :: MO_Immediate : { unsigned Imm = MO . getImm ( ) ; unsigned Lo16 = Imm & <NUM_LIT> ; unsigned Hi16 = ( Imm >> <NUM_LIT> ) & <NUM_LIT> ; LO16 = LO16 . addImm ( Lo16 ) ; HI16 = HI16 . addImm ( Hi16 ) ; break ; } case MachineOperand :: MO_ExternalSymbol : { const char * ES = MO . getSymbolName ( ) ; unsigned TF = MO . getTargetFlags ( ) ; LO16 = LO16 . addExternalSymbol ( ES , TF | <STR_LIT> ) ; HI16 = HI16 . addExternalSymbol ( ES , TF |


<s> unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( DstReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , RegState :: Define | getDeadRegState ( DstIsDead ) ) ; if ( TableEntry -> isUpdating ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; unsigned SrcOpIdx = <NUM_LIT> ; if ( RegSpc == EvenDblSpc || RegSpc == OddDblSpc ) SrcOpIdx = OpIdx ++ ; MIB . add ( MI . getOperand ( OpIdx ++


<s> MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; if ( TableEntry -> hasWritebackOperand ) MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; bool SrcIsKill = MI . getOperand ( OpIdx ) . isKill ( ) ; bool SrcIsUndef = MI . getOperand ( OpIdx ) . isUndef ( ) ; unsigned SrcReg = MI . getOperand ( OpIdx ++ ) . getReg ( ) ; unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , RegSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D1 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D2 , getUndefRegState ( SrcIsUndef ) ) ; if ( NumRegs > <NUM_LIT> && TableEntry -> copyAllListRegs ) MIB . addReg ( D3 , getUndefRegState ( SrcIsUndef ) ) ; MIB . add ( MI . getOperand ( OpIdx ++


<s> unsigned D0 , D1 , D2 , D3 ; GetDSubRegs ( SrcReg , SingleSpc , TRI , D0 , D1 , D2 , D3 ) ; MIB . addReg ( D0 ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . add ( MI . getOperand ( OpIdx ++ ) ) ; MIB . addReg ( SrcReg , RegState :: Implicit


<s> unsigned RegLo = TRI -> getSubReg ( Reg . getReg ( ) , <STR_LIT> ) ; unsigned RegHi = TRI -> getSubReg ( Reg . getReg ( ) , <STR_LIT> ) ; MIB . addReg ( RegLo , Flags | getKillRegState (


<s> for ( auto I = LiveRegs . begin ( ) ; I != LiveRegs . end ( ) ;


<s> MF -> insert ( ++ LoadCmpBB -> getIterator ( ) , StoreBB ) ; MF -> insert ( ++ StoreBB -> getIterator ( ) , DoneBB ) ; if ( UxtOp ) { MachineInstrBuilder MIB = BuildMI ( MBB , MBBI , DL , TII -> get ( UxtOp ) , Desired . getReg ( ) ) . addReg ( Desired . getReg ( ) , RegState :: Kill ) ; if ( ! IsThumb ) MIB . addImm ( <NUM_LIT> ) ; AddDefaultPred ( MIB ) ; } LoadCmpBB -> addLiveIn ( Addr . getReg ( ) ) ; LoadCmpBB -> addLiveIn ( Dest . getReg ( ) ) ; LoadCmpBB -> addLiveIn ( Desired . getReg ( ) ) ; addPostLoopLiveIns ( LoadCmpBB , LiveRegs ) ; MachineInstrBuilder MIB ; MIB = BuildMI ( LoadCmpBB , DL , TII -> get ( LdrexOp ) , Dest . getReg ( ) ) ; MIB . addReg ( Addr . getReg ( ) ) ; if ( LdrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; AddDefaultPred ( MIB ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( Dest . getReg ( ) , getKillRegState ( Dest . isDead ( ) ) ) . addOperand ( Desired ) ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; StoreBB -> addLiveIn ( Addr . getReg ( ) ) ; StoreBB -> addLiveIn ( New . getReg ( ) ) ; addPostLoopLiveIns ( StoreBB , LiveRegs ) ; MIB = BuildMI ( StoreBB , DL , TII -> get ( StrexOp ) , StatusReg ) ; MIB . addOperand ( New ) ; MIB . addOperand ( Addr ) ; if ( StrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; AddDefaultPred ( MIB ) ; unsigned CMPri = IsThumb ? <STR_LIT> :


<s> LoadCmpBB -> addLiveIn ( Addr . getReg ( ) ) ; LoadCmpBB -> addLiveIn ( Dest . getReg ( ) ) ; LoadCmpBB -> addLiveIn ( Desired . getReg ( ) ) ; addPostLoopLiveIns ( LoadCmpBB , LiveRegs ) ; MachineInstrBuilder MIB ; MIB = BuildMI ( LoadCmpBB , DL , TII -> get ( LdrexOp ) , Dest . getReg ( ) ) ; MIB . addReg ( Addr . getReg ( ) ) ; if ( LdrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; AddDefaultPred ( MIB ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( Dest . getReg ( ) , getKillRegState ( Dest . isDead ( ) ) ) . addOperand ( Desired ) ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; StoreBB -> addLiveIn ( Addr . getReg ( ) ) ; StoreBB -> addLiveIn ( New . getReg ( ) ) ; addPostLoopLiveIns ( StoreBB , LiveRegs ) ; MIB = BuildMI ( StoreBB , DL , TII -> get ( StrexOp ) , StatusReg ) ; MIB . addOperand ( New ) ; MIB . addOperand ( Addr ) ; if ( StrexOp == <STR_LIT> ) MIB . addImm ( <NUM_LIT> ) ; AddDefaultPred ( MIB ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( StatusReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState


<s> MachineInstrBuilder MIB ; MIB = BuildMI ( LoadCmpBB , DL , TII -> get ( LDREXD ) ) ; addExclusiveRegPair ( MIB , Dest , RegState :: Define , IsThumb , TRI ) ; MIB . addReg ( Addr . getReg ( ) ) ; AddDefaultPred ( MIB ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestLo , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredLo , getKillRegState ( Desired . isDead ( ) ) ) ) ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestHi , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredHi , getKillRegState ( Desired . isDead ( ) ) ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; StoreBB -> addLiveIn ( Addr . getReg ( ) ) ; StoreBB -> addLiveIn ( New . getReg ( ) ) ; addPostLoopLiveIns ( StoreBB , LiveRegs ) ; unsigned STREXD = IsThumb ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( StoreBB , DL , TII -> get ( STREXD ) , StatusReg ) ; addExclusiveRegPair ( MIB , New , <NUM_LIT> , IsThumb , TRI ) ; MIB . addOperand ( Addr ) ; AddDefaultPred ( MIB ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( StatusReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB ) ; DoneBB -> splice ( DoneBB -> end ( ) , & MBB , MI , MBB . end ( ) ) ; DoneBB -> transferSuccessors ( & MBB ) ; addPostLoopLiveIns ( DoneBB , LiveRegs ) ; MBB . addSuccessor ( LoadCmpBB ) ; NextMBBI = MBB . end ( ) ; MI . eraseFromParent ( )


<s> LoadCmpBB -> addLiveIn ( Desired . getReg ( ) ) ; addPostLoopLiveIns ( LoadCmpBB , LiveRegs ) ; unsigned LDREXD = IsThumb ? <STR_LIT> : <STR_LIT> ; MachineInstrBuilder MIB ; MIB = BuildMI ( LoadCmpBB , DL , TII -> get ( LDREXD ) ) ; addExclusiveRegPair ( MIB , Dest , RegState :: Define , IsThumb , TRI ) ; MIB . addReg ( Addr . getReg ( ) ) ; AddDefaultPred ( MIB ) ; unsigned CMPrr = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestLo , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredLo , getKillRegState ( Desired . isDead ( ) ) ) ) ; BuildMI ( LoadCmpBB , DL , TII -> get ( CMPrr ) ) . addReg ( DestHi , getKillRegState ( Dest . isDead ( ) ) ) . addReg ( DesiredHi , getKillRegState ( Desired . isDead ( ) ) ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; unsigned Bcc = IsThumb ? <STR_LIT> : <STR_LIT> ; BuildMI ( LoadCmpBB , DL , TII -> get ( Bcc ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; LoadCmpBB -> addSuccessor ( DoneBB ) ; LoadCmpBB -> addSuccessor ( StoreBB ) ; StoreBB -> addLiveIn ( Addr . getReg ( ) ) ; StoreBB -> addLiveIn ( New . getReg ( ) ) ; addPostLoopLiveIns ( StoreBB , LiveRegs ) ; unsigned STREXD = IsThumb ? <STR_LIT> : <STR_LIT> ; MIB = BuildMI ( StoreBB , DL , TII -> get ( STREXD ) , StatusReg ) ; addExclusiveRegPair ( MIB , New , <NUM_LIT> , IsThumb , TRI ) ; MIB . addOperand ( Addr ) ; AddDefaultPred ( MIB ) ; unsigned CMPri = IsThumb ? <STR_LIT> : <STR_LIT> ; AddDefaultPred ( BuildMI ( StoreBB , DL , TII -> get ( CMPri ) ) . addReg ( StatusReg , RegState :: Kill ) . addImm ( <NUM_LIT> ) ) ; BuildMI ( StoreBB , DL , TII -> get ( Bcc ) ) . addMBB ( LoadCmpBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; StoreBB -> addSuccessor ( LoadCmpBB ) ; StoreBB -> addSuccessor ( DoneBB ) ; DoneBB -> splice ( DoneBB -> end ( ) , & MBB , MI , MBB . end ( ) ) ; DoneBB -> transferSuccessors ( & MBB ) ; addPostLoopLiveIns ( DoneBB , LiveRegs ) ; MBB . addSuccessor (


<s> bool Modified = false ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) , E = MBB . end ( ) ; while ( MBBI != E ) { MachineBasicBlock :: iterator NMBBI = std :: next ( MBBI ) ; Modified |= ExpandMI ( MBB , MBBI , NMBBI ) ; MBBI =


<s> unsigned Opcode = MI . getOpcode ( ) ; unsigned PredReg = <NUM_LIT> ; <STR_LIT> Pred = getInstrPredicate ( MI , PredReg ) ; unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; bool DstIsDead = MI . getOperand ( <NUM_LIT> ) . isDead ( ) ; bool isCC = Opcode == <STR_LIT> || Opcode == <STR_LIT> ; const MachineOperand & MO = MI . getOperand ( isCC ? <NUM_LIT> : <NUM_LIT> ) ; bool RequiresBundling = STI -> isTargetWindows ( ) && IsAnAddressOperand ( MO ) ; MachineInstrBuilder LO16 , HI16 ; if ( ! STI -> hasV6T2Ops ( ) && ( Opcode == <STR_LIT> || Opcode == <STR_LIT> ) ) { assert ( ! STI -> isTargetWindows ( ) && <STR_LIT> ) ; LO16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) , DstReg ) ; HI16 = BuildMI ( MBB , MBBI , MI . getDebugLoc ( ) , TII -> get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; unsigned ImmVal = ( unsigned ) MO . getImm ( ) ; unsigned SOImmValV1 = <STR_LIT> ( ImmVal ) ; unsigned SOImmValV2 = <STR_LIT> ( ImmVal ) ; LO16 = LO16 . addImm ( SOImmValV1 ) ; HI16 = HI16 . addImm ( SOImmValV2 ) ; LO16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; HI16 -> setMemRefs ( MI . memoperands_begin ( ) , MI . memoperands_end ( ) ) ; LO16 . addImm ( Pred ) . addReg ( PredReg ) .


<s> const DebugLoc & DL = RetI . getDebugLoc ( ) ; MachineBasicBlock * ClearBB , * DoneBB ; if ( STI -> hasMinSize ( ) ) { ClearBB = DoneBB = & MBB ; } else { MachineFunction * MF = MBB . getParent ( ) ; ClearBB = MF -> CreateMachineBasicBlock ( MBB . getBasicBlock ( ) ) ; DoneBB = MF -> CreateMachineBasicBlock ( MBB . getBasicBlock ( ) ) ; MF -> insert ( ++ MBB . getIterator ( ) , ClearBB ) ; MF -> insert ( ++ ClearBB -> getIterator ( ) , DoneBB ) ; DoneBB -> splice ( DoneBB -> end ( ) , & MBB , MBBI , MBB . end ( ) ) ; DoneBB -> transferSuccessors ( & MBB ) ; MBB . addSuccessor ( ClearBB ) ; MBB . addSuccessor ( DoneBB ) ; ClearBB -> addSuccessor ( DoneBB ) ; for ( const MachineOperand & Op : RetI . operands ( ) ) { if ( ! Op . isReg ( ) ) continue ; Register Reg = Op . getReg ( ) ; if ( Reg == <STR_LIT> || Reg == <STR_LIT> ) continue ; assert ( Register :: isPhysicalRegister ( Reg ) && <STR_LIT> ) ; ClearBB -> addLiveIn ( Reg ) ; DoneBB -> addLiveIn ( Reg ) ; } ClearBB -> addLiveIn ( <STR_LIT> ) ; DoneBB -> addLiveIn ( <STR_LIT> ) ; BuildMI ( MBB , MBB . end ( ) , DL , TII -> get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( MBB , MBB . end ( ) , DL , TII -> get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; BuildMI ( MBB , MBB . end ( ) , DL , TII -> get ( <STR_LIT> ) ) . addMBB ( DoneBB ) . addImm ( <STR_LIT> ) . addReg ( <STR_LIT> , RegState :: Kill ) ; } for ( unsigned D = <NUM_LIT> ; D < <NUM_LIT> ; D ++ ) { if ( ClearRegs [ D * <NUM_LIT> + <NUM_LIT> ] && ClearRegs [ D * <NUM_LIT> + <NUM_LIT> ] ) { unsigned Reg = <STR_LIT> + D ; BuildMI ( ClearBB , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; } else { if ( ClearRegs [ D * <NUM_LIT> + <NUM_LIT> ] ) { unsigned Reg = <STR_LIT> + D * <NUM_LIT> ; BuildMI ( ClearBB , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; } if ( ClearRegs [ D * <NUM_LIT> + <NUM_LIT> ]


<s> void <ISA_LIT>ExpandPseudo :: CMSEClearGPRegs ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MBBI , const DebugLoc & DL , const SmallVectorImpl < unsigned > & ClearRegs , unsigned ClobberReg ) { if ( STI -> hasV8_1MMainlineOps ( ) ) { MachineInstrBuilder CLRM = BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . add ( predOps ( <STR_LIT> ) ) ; for ( unsigned R : ClearRegs ) CLRM . addReg ( R , RegState :: Define ) ; CLRM . addReg ( <STR_LIT> , RegState :: Define ) ; CLRM . addReg ( <STR_LIT> , RegState


<s> for ( int R = <NUM_LIT> ; R < <NUM_LIT> ; ++ R ) PopMIB2 . addReg ( <STR_LIT> + R , RegState :: Define ) ; } else { MachineInstrBuilder PopMIB = BuildMI ( MBB , MBBI , DL , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; for ( int Reg = <STR_LIT> ; Reg < <STR_LIT> ; ++ Reg ) PopMIB . addReg ( Reg ,


<s> else if ( STI -> hasV8MMainlineOps ( ) ) CMSERestoreFPRegsV8 (


<s> else if ( STI -> hasV8MMainlineOps ( ) ) CMSERestoreFPRegsV8 ( MBB ,


<s> if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . addReg ( Reg ) . addReg ( <STR_LIT> ) . addImm ( ( Reg - <STR_LIT> ) * <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; else if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . addReg ( Reg ) . addReg ( <STR_LIT> ) . addImm ( Reg - <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; } MachineInstrBuilder VLLDM = BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; if ( STI -> fixCMSE_CVE_2021_35465 ( ) ) { auto Bundler = MIBundleBuilder ( MBB , VLLDM ) ; Bundler . append ( BuildMI ( * MBB . getParent ( ) , DL , TII -> get ( <STR_LIT> ) ) . addReg ( ScratchReg , RegState :: Define ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ) ; Bundler . append ( BuildMI ( * MBB . getParent ( ) , DL , TII -> get ( <STR_LIT> ) ) . addReg ( ScratchReg ) . addImm ( <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ) ; Bundler . append ( BuildMI ( * MBB . getParent ( ) , DL , TII -> get ( <STR_LIT> ) ) . addImm ( <STR_LIT> ) . addImm ( <NUM_LIT> ) ) ; if ( STI -> hasFPRegs ( ) ) Bundler . append ( BuildMI ( * MBB . getParent ( ) , DL , TII -> get ( <STR_LIT> ) ) . addReg ( <STR_LIT> , RegState :: Define ) . addReg ( <STR_LIT> , RegState :: Undef ) . add ( predOps ( <STR_LIT> ) ) ) ; else Bundler . append ( BuildMI ( * MBB . getParent ( ) , DL , TII -> get ( <STR_LIT> ) ) . addExternalSymbol ( <STR_LIT> ) . addImm ( InlineAsm :: Extra_HasSideEffects ) ) ; finalizeBundle ( MBB , Bundler . begin ( ) , Bundler . end ( ) ) ; } for ( const auto & Regs : ClearedFPRegs ) { unsigned Reg , SaveReg1 , SaveReg2 ; std :: tie ( Reg , SaveReg1 , SaveReg2 ) = Regs ; if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( SaveReg1 ) . addReg ( SaveReg2 ) . add ( predOps ( <STR_LIT> ) ) ; else if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT>

) , Reg ) . addReg ( SaveReg1 ) . add ( predOps ( <STR_LIT> ) ) ;


<s> } else { NonclearedFPRegs . push_back ( Reg ) ; } } } } bool passesFPReg = ( ! NonclearedFPRegs . empty ( ) || ! ClearedFPRegs . empty ( ) ) ; if ( passesFPReg ) assert ( STI -> hasFPRegs ( ) && <STR_LIT> ) ; MachineInstrBuilder VLSTM = BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; for ( auto R : { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ) VLSTM . addReg ( R , RegState :: Implicit | ( LiveRegs . contains ( R ) ? <NUM_LIT> : RegState :: Undef ) ) ; for ( const auto & Regs : ClearedFPRegs ) { unsigned Reg , SaveReg1 , SaveReg2 ; std :: tie ( Reg , SaveReg1 , SaveReg2 ) = Regs ; if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( SaveReg1 ) . addReg ( SaveReg2 ) . add ( predOps ( <STR_LIT> ) ) ; else if ( <STR_LIT> . contains ( Reg ) ) BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( SaveReg1 ) . add ( predOps ( <STR_LIT> ) ) ; } for ( unsigned Reg : NonclearedFPRegs ) { if ( <STR_LIT> . contains ( Reg ) ) { if ( STI -> isLittle ( ) ) { BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( <STR_LIT> ) . addImm ( ( Reg - <STR_LIT> ) * <NUM_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; } else { unsigned SReg0 = TRI -> getSubReg ( Reg , <STR_LIT> ) ; BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) , SReg0 ) . addReg ( <STR_LIT> ) . addImm ( ( Reg - <STR_LIT> ) * <NUM_LIT> ) . add (


<s> MachineInstrBuilder VLSTM = BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ; for ( auto R : { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ) VLSTM . addReg ( R , RegState :: Implicit | ( LiveRegs . contains ( R ) ? <NUM_LIT> : RegState :: Undef ) ) ; } else { MachineInstrBuilder VPUSH = BuildMI ( MBB , MBBI , DL , TII -> get ( <STR_LIT> ) ,

<STR_LIT> ) . addReg ( <STR_LIT> ) . add ( predOps ( <STR_LIT> ) ) ;


<s> if ( ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) || ( Reg >= <STR_LIT> && Reg <= <STR_LIT> )

|| ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) ) return true ;


<s> if ( Op . isDef ( ) ) { if ( ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) || ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) || ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) ) DefFP = true ; continue ; } if ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) { int R = Reg - <STR_LIT> ; ClearRegs . reset ( R * <NUM_LIT> ,


<s> llvm :: sort ( OpRegs ) ; std :: set_difference ( Regs . begin ( ) , Regs . end ( ) , OpRegs . begin (

) , OpRegs . end ( ) , std :: back_inserter ( ClearRegs ) ) ;


<s> } llvm :: sort ( OpRegs ) ; std :: set_difference ( Regs . begin ( ) , Regs . end ( ) , OpRegs . begin ( ) , OpRegs . end ( ) , std :: back_inserter