<s> RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } else { assert ( VA . isMemLoc ( ) ) ; if ( StackPtr . getNode ( ) == nullptr ) StackPtr = DAG . getCopyFromReg ( Chain , DL , <STR_LIT> , getPointerTy ( DAG . getDataLayout ( ) ) ) ; SDValue PtrOff = DAG . getNode ( <STR_LIT> , DL , getPointerTy ( DAG . getDataLayout ( ) ) , StackPtr , DAG . getIntPtrConstant ( VA . getLocMemOffset ( ) , DL ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , DL , Arg , PtrOff , MachinePointerInfo ( ) ) ) ; } } if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , ArrayRef < SDValue > ( & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ) ; SDValue InFlag ; for ( unsigned I = <NUM_LIT> , E = RegsToPass . size ( ) ; I != E ; ++ I ) { Chain = DAG . getCopyToReg ( Chain , DL , RegsToPass [ I ] . first , RegsToPass [ I ] . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } uint8_t OpFlag = <STR_LIT> ; if ( G ) { Callee = DAG . getTargetGlobalAddress ( G -> getGlobal ( ) , DL , getPointerTy ( DAG . getDataLayout ( ) ) , <NUM_LIT> , OpFlag ) ; } else if ( ExternalSymbolSDNode * E = dyn_cast < ExternalSymbolSDNode > ( Callee ) ) { Callee = DAG . getTargetExternalSymbol ( E -> getSymbol ( ) , getPointerTy ( DAG . getDataLayout ( ) ) , OpFlag ) ; } SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; SmallVector < SDValue , <NUM_LIT> > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; const uint32_t * Mask = TRI -> getCallPreservedMask ( DAG . getMachineFunction ( ) , CallConv ) ; assert ( Mask && <STR_LIT> ) ; Ops . push_back ( DAG . getRegisterMask ( Mask ) ) ; for ( unsigned I = <NUM_LIT> , E = RegsToPass . size ( ) ; I != E ; ++ I ) Ops . push_back ( DAG . getRegister ( RegsToPass [ I ] . first , RegsToPass [ I ] . second . getValueType ( ) ) ) ; if ( InFlag . getNode ( ) ) Ops . push_back ( InFlag ) ;

Chain = DAG . getNode ( <STR_LIT> , DL , NodeTys , ArrayRef < SDValue > ( & Ops [ <NUM_LIT> ] , Ops . size ( ) ) ) ;


<s> SDValue Hi = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlign ( ) , N -> getOffset ( ) , OpFlagHi ) ; SDValue Lo = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlign ( ) , N -> getOffset ( ) , OpFlagLo ) ; Hi = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi ) ; Lo = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Lo ) ; SDValue Result = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi , Lo ) ;


<s> } else { uint8_t OpFlagHi = <STR_LIT> ; uint8_t OpFlagLo = <STR_LIT> ; SDValue Hi = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlign ( ) , N -> getOffset ( ) , OpFlagHi ) ; SDValue Lo = DAG . getTargetConstantPool ( C , <STR_LIT> , N -> getAlign ( ) , N -> getOffset ( ) , OpFlagLo ) ; Hi = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi ) ; Lo = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Lo ) ; SDValue Result = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi , Lo ) ; return Result ; }


<s> SDLoc DL ( Op ) ; Register SPReg = getStackPointerRegisterToSaveRestore ( ) ; SDValue StackPointer = DAG . getCopyFromReg ( Chain , DL , SPReg , <STR_LIT> ) ; SDValue Sub = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , StackPointer , Size ) ; SDValue ArgAdjust = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Sub ) ;

SDValue CopyChain = DAG . getCopyToReg ( Chain , DL , SPReg , Sub ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerFormalArguments ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , const SDLoc & DL , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { switch ( CallConv ) {


<s> SDValue <ISA_LIT>TargetLowering :: LowerFormalArguments ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , const SDLoc & DL , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { switch ( CallConv ) { case CallingConv :: C :


<s> SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , <STR_LIT> , VT ) ; unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; while ( Depth -- ) { const unsigned Offset = - <NUM_LIT> ; SDValue Ptr = DAG . getNode ( <STR_LIT> , DL , VT , FrameAddr , DAG . getIntPtrConstant ( Offset , DL ) ) ;

FrameAddr = DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , Ptr , MachinePointerInfo ( ) ) ;


<s> MFI . setFrameAddressIsTaken ( true ) ; EVT VT = Op . getValueType ( ) ; SDLoc DL ( Op ) ; SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , <STR_LIT> , VT ) ; unsigned Depth = cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; while ( Depth -- ) {


<s> int64_t Offset = cast < GlobalAddressSDNode > ( Op ) -> getOffset ( ) ; const <ISA_LIT>TargetObjectFile * TLOF = static_cast < const <ISA_LIT>TargetObjectFile * > ( getTargetMachine ( ) . getObjFileLowering ( ) ) ; const GlobalObject * GO = GV -> getAliaseeObject ( ) ; if ( TLOF -> isGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) { SDValue Small = DAG . getTargetGlobalAddress ( GV , DL , getPointerTy ( DAG . getDataLayout ( ) ) , Offset , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getRegister ( <STR_LIT> , <STR_LIT> ) , DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Small ) ) ;


<s> JumpTableSDNode * JT = cast < JumpTableSDNode > ( Op ) ; if ( getTargetMachine ( ) . getCodeModel ( ) == CodeModel :: Small ) { SDValue Small = DAG . getTargetJumpTable ( JT -> getIndex ( ) , getPointerTy ( DAG . getDataLayout ( ) ) , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , DAG . getRegister ( <STR_LIT> , <STR_LIT> ) , DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Small ) ) ; } else { uint8_t OpFlagHi = <STR_LIT> ; uint8_t OpFlagLo = <STR_LIT> ; SDValue Hi = DAG . getTargetJumpTable ( JT -> getIndex ( ) , getPointerTy ( DAG . getDataLayout ( ) ) , OpFlagHi ) ; SDValue Lo = DAG . getTargetJumpTable ( JT -> getIndex ( ) , getPointerTy ( DAG . getDataLayout ( ) ) , OpFlagLo ) ; Hi = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi ) ; Lo = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Lo ) ; SDValue Result = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Hi , Lo ) ;


<s> int32_t HighestOne = - <NUM_LIT> ; uint32_t NonzeroEntries = <NUM_LIT> ; int SignedDigit [ <NUM_LIT> ] = { <NUM_LIT> } ; int64_t E = std :: abs ( MulAmt ) ; int S = ( MulAmt < <NUM_LIT> ? - <NUM_LIT> : <NUM_LIT> ) ; int I = <NUM_LIT> ; while ( E > <NUM_LIT> ) { int ZI = <NUM_LIT> ; if ( E % <NUM_LIT> == <NUM_LIT> ) { ZI = <NUM_LIT> - ( E % <NUM_LIT> ) ; if ( ZI != <NUM_LIT> ) ++ NonzeroEntries ; } SignedDigit [ I ] = S * ZI ; if ( SignedDigit [ I ] == <NUM_LIT> ) HighestOne = I ; E = ( E - ZI ) / <NUM_LIT> ; ++ I ; }


<s> int I = <NUM_LIT> ; while ( E > <NUM_LIT> ) { int ZI = <NUM_LIT> ; if ( E % <NUM_LIT> == <NUM_LIT> ) { ZI = <NUM_LIT> - ( E % <NUM_LIT> ) ; if ( ZI != <NUM_LIT> ) ++ NonzeroEntries ; } SignedDigit [ I ] = S * ZI ; if ( SignedDigit [ I ] == <NUM_LIT> ) HighestOne = I ; E = ( E - ZI ) / <NUM_LIT> ; ++ I ; } int32_t InstrRequired = <NUM_LIT> * NonzeroEntries - <NUM_LIT> ; if ( std :: abs ( MulAmt ) % <NUM_LIT> == <NUM_LIT> ) -- InstrRequired ; if ( InstrRequired > <ISA_LIT>LowerConstantMulThreshold ) return SDValue ( ) ; SDValue Res ; SDLoc DL ( Op ) ; SDValue V = Op -> getOperand ( <NUM_LIT> ) ; if ( HighestOne == - <NUM_LIT> ) Res = DAG . getConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; else { Res = DAG . getNode ( <STR_LIT> , DL , VT , V , DAG . getConstant ( HighestOne , DL , <STR_LIT> ) ) ; SignedDigit [ HighestOne ] = <NUM_LIT> ; } for ( unsigned int I = <NUM_LIT> ; I < sizeof ( SignedDigit ) / sizeof ( SignedDigit [ <NUM_LIT> ] ) ; ++ I ) {

if ( SignedDigit [ I ] == <NUM_LIT> ) continue ;


<s> case <STR_LIT> : return LowerBlockAddress ( Op , DAG ) ; case <STR_LIT> : return LowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT_CC ( Op , DAG ) ; case <STR_LIT> : return LowerSETCC ( Op , DAG ) ; case <STR_LIT> : return LowerSHL_PARTS ( Op , DAG ) ; case <STR_LIT> : return LowerSRL_PARTS ( Op , DAG ) ; case <STR_LIT> : return LowerVASTART ( Op , DAG ) ; case <STR_LIT> : return LowerDYNAMIC_STACKALLOC ( Op , DAG ) ; case <STR_LIT> : return LowerRETURNADDR ( Op , DAG ) ; case <STR_LIT> : return LowerFRAMEADDR ( Op , DAG ) ; default :


<s> return LowerMUL ( Op , DAG ) ; case <STR_LIT> : return LowerBR_CC ( Op , DAG ) ; case <STR_LIT> : return LowerConstantPool ( Op , DAG ) ; case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return LowerBlockAddress ( Op , DAG ) ; case <STR_LIT> : return LowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return LowerSELECT_CC ( Op , DAG ) ; case <STR_LIT> : return LowerSETCC ( Op , DAG ) ; case <STR_LIT> : return LowerSHL_PARTS ( Op , DAG ) ; case <STR_LIT> : return LowerSRL_PARTS ( Op , DAG ) ; case <STR_LIT> : return LowerVASTART ( Op , DAG ) ; case <STR_LIT> : return LowerDYNAMIC_STACKALLOC ( Op , DAG ) ; case <STR_LIT> : return LowerRETURNADDR ( Op , DAG ) ; case <STR_LIT> : return LowerFRAMEADDR ( Op , DAG ) ;


<s> const unsigned Offset = - <NUM_LIT> ; SDValue Ptr = DAG . getNode ( <STR_LIT> , DL , VT , FrameAddr , DAG . getIntPtrConstant ( Offset , DL ) ) ; return DAG . getLoad ( VT , DL , DAG . getEntryNode ( ) , Ptr , MachinePointerInfo ( ) ) ; } unsigned Reg = MF . addLiveIn ( TRI -> getRARegister ( ) , getRegClassFor ( <STR_LIT> ) ) ;

return DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , Reg , VT ) ;


<s> SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ; SDValue TrueV = Op . getOperand ( <NUM_LIT> ) ; SDValue FalseV = Op . getOperand ( <NUM_LIT> ) ; SDValue Cond = Op . getOperand ( <NUM_LIT> ) ; SDLoc DL ( Op ) ; LPCC :: CondCode CC = IntCondCCodeToICC ( Cond , DL , RHS , DAG ) ; SDValue TargetCC = DAG . getConstant ( CC , DL , <STR_LIT> ) ; SDValue Flag = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , LHS , RHS , TargetCC ) ;

SDVTList VTs = DAG . getVTList ( Op . getValueType ( ) , <STR_LIT> ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerSETCC ( SDValue Op , SelectionDAG & DAG ) const { SDValue LHS = Op . getOperand ( <NUM_LIT> ) ; SDValue RHS = Op . getOperand ( <NUM_LIT> ) ;

SDValue Cond = Op . getOperand ( <NUM_LIT> ) ;


<s> SDValue Flag = DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , LHS , RHS , TargetCC ) ; return DAG . getNode ( <STR_LIT> , DL , Op . getValueType ( ) , TargetCC , Flag ) ;


<s> SDValue SetCC = DAG . getSetCC ( dl , <STR_LIT> , NegatedPlus32 , Zero , <STR_LIT> ) ; SDValue Hi = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , ShOpHi , ShAmt ) ; Hi = DAG . getSelect ( dl , <STR_LIT> , SetCC , Zero , Hi ) ; SDValue Lo = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , ShOpLo , ShAmt ) ; Lo = DAG . getSelect ( dl , <STR_LIT> , SetCC , Hi , Lo ) ; SDValue CarryBits = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , ShOpHi , NegatedPlus32 ) ; SDValue ShiftIsZero = DAG . getSetCC ( dl , <STR_LIT> , ShAmt , Zero , <STR_LIT> ) ; Lo = DAG . getSelect ( dl , <STR_LIT> , ShiftIsZero , Lo , DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Lo , CarryBits ) ) ; SDValue Ops [ <NUM_LIT> ] = { Lo , Hi } ;

return DAG . getMergeValues ( Ops , dl ) ;


<s> SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( DAG . getDataLayout ( ) ) ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , DL , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) ) ;


<s> SDLoc DL ( Op ) ; SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( DAG . getDataLayout ( ) ) ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , DL , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) ) ;


<s> default : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return combineSelectAndUseCommutative ( N , DCI , false ) ; case <STR_LIT> : return combineSelectAndUseCommutative ( N , DCI , true ) ; case <STR_LIT> : return PerformSUBCombine ( N , DCI ) ; }


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return combineSelectAndUseCommutative ( N , DCI , false ) ; case <STR_LIT> : return combineSelectAndUseCommutative ( N , DCI , true ) ; case <STR_LIT> : return PerformSUBCombine ( N , DCI ) ; } return SDValue ( ) ;


<s> Register <ISA_LIT>MachineFunctionInfo :: getGlobalBaseReg ( ) { if ( GlobalBaseReg ) return GlobalBaseReg ;

return GlobalBaseReg = MF . getRegInfo ( ) . createVirtualRegister ( & <STR_LIT> ) ;


<s> unsigned getSRetReturnReg ( ) const {


<s> explicit <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) {


<s> explicit <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) , VarArgsFrameIndex ( <NUM_LIT> ) {


<s> void <ISA_LIT>MachineFunctionInfo :: anchor ( ) {


<s> if ( GlobalBaseReg ) return GlobalBaseReg ;


<s> return GlobalBaseReg = MF . getRegInfo ( ) . createVirtualRegister ( & <STR_LIT> ) ;


<s> int getVarArgsFrameIndex ( ) const {


<s> explicit <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : VarArgsFrameIndex ( <NUM_LIT> ) {


<s> void setSRetReturnReg ( Register Reg ) { SRetReturnReg = Reg ;


<s> void setVarArgsFrameIndex ( int Index ) {


<s> void setVarArgsFrameIndex ( int Index ) { VarArgsFrameIndex = Index ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & , const MCTargetOptions & Options ) { IsLittleEndian = false ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ;

ExceptionsType = ExceptionHandling :: DwarfCFI ;


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & , const MCTargetOptions & Options ) {


<s> IsLittleEndian = false ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; ExceptionsType = ExceptionHandling :: DwarfCFI ; UsesELFSectionDirectiveForBSS = true ; UseIntegratedAssembler = true ; CommentString = <STR_LIT> ; SupportsDebugInformation = true ; MinInstAlignment = <NUM_LIT> ;


<s> IsLittleEndian = false ; PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ;


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> PrivateGlobalPrefix = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; ExceptionsType = ExceptionHandling :: DwarfCFI ; UsesELFSectionDirectiveForBSS = true ; UseIntegratedAssembler = true ; CommentString = <STR_LIT> ;


<s> unsigned AluCode = AluOp . getImm ( ) ; const MCOperand Op2 = Inst . getOperand ( <NUM_LIT> ) ; Value &= ~ ( <NUM_LIT> << PBitShift ) ; if ( ! LPAC :: isPostOp ( AluCode ) && ( ( Op2 . isImm ( ) && Op2 . getImm ( ) != <NUM_LIT> ) || ( Op2 . isReg ( ) && Op2 . getReg ( ) != <STR_LIT> ) || ( Op2 . isExpr ( ) ) ) ) Value |= ( <NUM_LIT> << PBitShift ) ; assert ( Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ;


<s> if ( ! LPAC :: isPostOp ( AluCode ) && ( ( Op2 . isImm ( ) && Op2 . getImm ( ) != <NUM_LIT> ) || ( Op2 . isReg ( ) && Op2 . getReg ( ) != <STR_LIT> ) || ( Op2 . isExpr ( ) ) ) ) Value |= ( <NUM_LIT> << PBitShift ) ; assert ( Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ;


<s> return adjustPqBits ( Inst , Value , <NUM_LIT> , <NUM_LIT> ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( InstrInfo , context ) ;


<s> llvm :: MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & InstrInfo , const MCRegisterInfo & , MCContext & context ) { return new <ISA_LIT>MCCodeEmitter ( InstrInfo , context ) ;


<s> void <ISA_LIT>MCCodeEmitter :: encodeInstruction ( const MCInst & Inst , raw_ostream & Ostream , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & SubtargetInfo ) const {

unsigned Value = getBinaryCodeForInstr ( Inst , Fixups , SubtargetInfo ) ;


<s> for ( int i = ( <NUM_LIT> - <NUM_LIT> ) * <NUM_LIT> ; i >= <NUM_LIT> ; i -= <NUM_LIT> ) Ostream << static_cast < char > ( ( Value >> i ) & <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getBranchTargetOpValue ( const MCInst & Inst , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & SubtargetInfo ) const { const MCOperand & MCOp = Inst . getOperand ( OpNo ) ; if ( MCOp . isReg ( ) || MCOp . isImm ( ) ) return getMachineOpValue ( Inst , MCOp , Fixups , SubtargetInfo ) ;

Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MCOp . getExpr ( ) , static_cast < MCFixupKind > ( <STR_LIT> ) ) ) ;


<s> if ( MCOp . isReg ( ) ) return get<ISA_LIT>RegisterNumbering ( MCOp . getReg ( ) ) ; if ( MCOp . isImm ( ) ) return static_cast < unsigned > ( MCOp . getImm ( ) ) ; assert ( MCOp . isExpr ( ) ) ; const MCExpr * Expr = MCOp . getExpr ( ) ; if ( Expr -> getKind ( ) == MCExpr :: Binary ) { const MCBinaryExpr * BinaryExpr = static_cast < const MCBinaryExpr * > ( Expr ) ; Expr = BinaryExpr -> getLHS ( ) ; } assert ( isa < <ISA_LIT>MCExpr > ( Expr ) || Expr -> getKind ( ) == MCExpr :: SymbolRef ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MCOp . getExpr ( ) , MCFixupKind ( FixupKind ( Expr ) ) ) ) ;


<s> Encoding = ( get<ISA_LIT>RegisterNumbering ( Op1 . getReg ( ) ) << <NUM_LIT> ) ; if ( Op2 . isImm ( ) ) { assert ( isInt < <NUM_LIT> > ( Op2 . getImm ( ) ) && <STR_LIT> ) ; Encoding |= ( Op2 . getImm ( ) & <NUM_LIT> ) ; if ( Op2 . getImm ( ) != <NUM_LIT> ) { if ( LPAC :: isPreOp ( AluOp . getImm ( ) ) ) Encoding |= ( <NUM_LIT> << <NUM_LIT> ) ; if ( LPAC :: isPostOp ( AluOp . getImm ( ) ) ) Encoding |= ( <NUM_LIT> << <NUM_LIT> ) ; } } else getMachineOpValue ( Inst , Op2 , Fixups , SubtargetInfo ) ;


<s> Encoding |= ( Op2 . getImm ( ) & <NUM_LIT> ) ; if ( Op2 . getImm ( ) != <NUM_LIT> ) { if ( LPAC :: isPreOp ( AluOp . getImm ( ) ) ) Encoding |= ( <NUM_LIT> << <NUM_LIT> ) ; if ( LPAC :: isPostOp ( AluOp . getImm ( ) ) ) Encoding |= ( <NUM_LIT> << <NUM_LIT> ) ; } } else getMachineOpValue ( Inst , Op2 , Fixups , SubtargetInfo ) ; return Encoding ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , MCContext & C ) {


<s> assert ( Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && Inst . getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; Value &= ~ ( <NUM_LIT> << QBitShift ) ; if ( LPAC :: modifiesOp ( AluCode ) && ( ( Op2 . isImm ( ) && Op2 . getImm ( ) != <NUM_LIT> ) || ( Op2 . isReg ( ) && Op2 . getReg ( ) != <STR_LIT> ) ) ) Value |= ( <NUM_LIT> << QBitShift ) ;


<s> <ISA_LIT>MCExpr :: VariantKind ExprKind = McExpr -> getKind ( ) ; switch ( ExprKind ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_None : return <STR_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_ABS_HI : return <STR_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_ABS_LO :


<s> if ( isa < MCSymbolRefExpr > ( Expr ) ) return <STR_LIT> ; if ( const <ISA_LIT>MCExpr * McExpr = dyn_cast < <ISA_LIT>MCExpr > ( Expr ) ) { <ISA_LIT>MCExpr :: VariantKind ExprKind = McExpr -> getKind ( ) ; switch ( ExprKind ) { case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_None : return <STR_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_ABS_HI : return <STR_LIT> ; case <ISA_LIT>MCExpr :: VK_<ISA_LIT>_ABS_LO :


<s> if ( MCOp . isReg ( ) || MCOp . isImm ( ) ) return getMachineOpValue ( Inst , MCOp , Fixups , SubtargetInfo ) ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , MCContext & C ) : InstrInfo ( MCII ) , Context ( C ) {


<s> ~ <ISA_LIT>MCCodeEmitter ( ) override {


<s> llvm :: MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & InstrInfo , MCContext & context ) { return new <ISA_LIT>MCCodeEmitter ( InstrInfo , context ) ;


<s> Expr = BinaryExpr -> getLHS ( ) ; } assert ( isa < <ISA_LIT>MCExpr > ( Expr ) || Expr -> getKind ( ) == MCExpr :: SymbolRef ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , MCOp . getExpr ( ) , MCFixupKind ( FixupKind ( Expr ) ) ) ) ;


<s> llvm :: MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & InstrInfo , const MCRegisterInfo & MRI , MCContext & context ) { return new <ISA_LIT>MCCodeEmitter ( InstrInfo , context ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( InstrInfo , context ) ;


<s> void fixELFSymbolsInTLSFixups ( MCAssembler & Asm ) const override {


<s> Res = MCValue :: get ( Res . getSymA ( ) , Res . getSymB ( ) , Res . getConstant ( ) , getKind ( ) ) ;


<s> bool <ISA_LIT>MCExpr :: evaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout , const MCFixup * Fixup ) const { if ( ! getSubExpr ( ) -> evaluateAsRelocatable ( Res , Layout , Fixup ) ) return false ;

Res = MCValue :: get ( Res . getSymA ( ) , Res . getSymB ( ) , Res . getConstant ( ) , getKind ( ) ) ;


<s> return getSubExpr ( ) -> findAssociatedFragment ( ) ;


<s> void fixELFSymbolsInTLSFixups ( MCAssembler & ) const override {


<s> const MCExpr * getSubExpr ( ) const { return Expr ;


<s> explicit <ISA_LIT>MCExpr ( VariantKind Kind , const MCExpr * Expr ) : Kind ( Kind ) , Expr ( Expr ) {


<s> void <ISA_LIT>MCExpr :: printImpl ( raw_ostream & OS , const MCAsmInfo * MAI ) const { if ( Kind == VK_<ISA_LIT>_None ) { Expr -> print ( OS , MAI ) ; return ; } switch ( Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case VK_<ISA_LIT>_ABS_HI : OS << <STR_LIT> ; break ; case VK_<ISA_LIT>_ABS_LO : OS << <STR_LIT> ; break ;


<s> void <ISA_LIT>MCExpr :: visitUsedExpr ( MCStreamer & Streamer ) const { Streamer . visitUsedExpr ( * getSubExpr ( ) ) ;


<s> Streamer . visitUsedExpr ( * getSubExpr ( ) ) ;


<s> void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ;

MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ;


<s> switch ( MO . getType ( ) ) { case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_RegisterMask : continue ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = LowerSymbolOperand ( MO , GetBlockAddressSymbol ( MO ) ) ;


<s> public : <ISA_LIT>MCInstLower ( MCContext & CTX , AsmPrinter & AP ) : Ctx ( CTX ) , Printer ( AP ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ;

MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetBlockAddressSymbol ( const MachineOperand & MO ) const {

return Printer . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ;


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ; return Ctx . getOrCreateSymbol ( Name . str ( ) ) ;


<s> void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ; MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ; MCSymbol * GetGlobalAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetBlockAddressSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetExternalSymbolSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetJumpTableSymbol ( const MachineOperand & MO ) const ; MCSymbol * GetConstantPoolIndexSymbol ( const MachineOperand & MO ) const ;


<s> public : <ISA_LIT>MCInstLower ( MCContext & CTX , Mangler & Mang , AsmPrinter & AP ) : Ctx ( CTX ) , Printer ( AP ) { } void Lower ( const MachineInstr * MI , MCInst & OutMI ) const ;

MCOperand LowerSymbolOperand ( const MachineOperand & MO , MCSymbol * Sym ) const ;


<s> MCSymbol * <ISA_LIT>MCInstLower :: GetJumpTableSymbol ( const MachineOperand & MO ) const { SmallString < <NUM_LIT> > Name ; raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ;

return Ctx . getOrCreateSymbol ( Name . str ( ) ) ;


<s> raw_svector_ostream ( Name ) << Printer . MAI -> getPrivateGlobalPrefix ( ) << <STR_LIT> << Printer . getFunctionNumber ( ) << '_' << MO . getIndex ( ) ;


<s> break ; case MachineOperand :: MO_RegisterMask : continue ; case MachineOperand :: MO_GlobalAddress : MCOp = LowerSymbolOperand ( MO , GetGlobalAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_BlockAddress : MCOp = LowerSymbolOperand ( MO , GetBlockAddressSymbol ( MO ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : MCOp = LowerSymbolOperand ( MO , GetExternalSymbolSymbol ( MO ) ) ; break ; case MachineOperand :: MO_JumpTableIndex : MCOp = LowerSymbolOperand ( MO , GetJumpTableSymbol ( MO ) ) ;


<s> MCOperand MCOp ; switch ( MO . getType ( ) ) { case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) continue ; MCOp = MCOperand :: createReg ( MO . getReg ( ) ) ; break ; case MachineOperand :: MO_Immediate : MCOp = MCOperand :: createImm ( MO . getImm ( ) ) ; break ; case MachineOperand :: MO_MachineBasicBlock : MCOp = MCOperand :: createExpr ( MCSymbolRefExpr :: create ( MO . getMBB ( ) -> getSymbol ( ) , Ctx ) ) ; break ; case MachineOperand :: MO_RegisterMask :


<s> } const MCExpr * Expr = MCSymbolRefExpr :: create ( Sym , MCSymbolRefExpr :: VK_None , Ctx ) ;

if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;


<s> break ; case <STR_LIT> : Kind = <ISA_LIT>MCExpr :: VK_<ISA_LIT>_ABS_LO ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } const MCExpr * Expr = MCSymbolRefExpr :: create ( Sym , MCSymbolRefExpr :: VK_None , Ctx ) ; if ( ! MO . isJTI ( ) && MO . getOffset ( ) ) Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( MO . getOffset ( ) , Ctx ) , Ctx ) ;

Expr = <ISA_LIT>MCExpr :: create ( Kind , Expr , Ctx ) ;


<s> if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ; return nullptr ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; return X ;


<s> static MCStreamer * createMCStreamer ( const Triple & T , MCContext & Context , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {

if ( ! T . isOSBinFormatELF ( ) ) llvm_unreachable ( <STR_LIT> ) ;


<s> static MCStreamer * createMCStreamer ( const Triple & T , MCContext & Context , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) { if ( ! T . isOSBinFormatELF ( ) ) llvm_unreachable ( <STR_LIT> ) ; return createELFStreamer ( Context , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , RelaxAll ) ;


<s> TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( getThe<ISA_LIT>Target ( ) , createMCStreamer ) ; TargetRegistry :: RegisterMCRelocationInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>ElfRelocation ) ; TargetRegistry :: RegisterMCInstrAnalysis ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>InstrAnalysis ) ;


<s> std :: string CPUName = std :: string ( CPU ) ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , CPUName , FS ) ;


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType == MCOI :: OPERAND_PCREL ) { int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Size + Imm ;


<s> if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType == MCOI :: OPERAND_PCREL ) { int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Size + Imm ; return true ; } else { int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , FS ) ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { std :: string CPUName = std :: string ( CPU ) ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;


<s> static MCStreamer * createMCStreamer ( const Triple & T , MCContext & Context , std :: unique_ptr < MCAsmBackend > && MAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) { if ( ! T . isOSBinFormatELF ( ) ) llvm_unreachable ( <STR_LIT> ) ; return createELFStreamer ( Context , std :: move ( MAB ) , OS , std :: move ( Emitter ) , RelaxAll ) ;


<s> if ( ! T . isOSBinFormatELF ( ) ) llvm_unreachable ( <STR_LIT> ) ;

return createELFStreamer ( Context , std :: move ( MAB ) , OS , std :: move ( Emitter ) , RelaxAll ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ;

TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( getThe<ISA_LIT>Target ( ) , createMCStreamer ) ; TargetRegistry :: RegisterMCRelocationInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>ElfRelocation ) ; TargetRegistry :: RegisterMCInstrAnalysis ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>InstrAnalysis ) ;


<s> TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfo < <ISA_LIT>MCAsmInfo > X ( The<ISA_LIT>Target ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , llvm :: create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;

TargetRegistry :: RegisterMCRelocationInfo ( The<ISA_LIT>Target , create<ISA_LIT>ElfRelocation ) ;


<s> MCRelocationInfo * create<ISA_LIT>ElfRelocation ( const Triple & TheTriple , MCContext & Ctx ) { return createMCRelocationInfo ( TheTriple , Ctx ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>InstrAnalysis ( const MCInstrInfo * Info ) { return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { if ( SyntaxVariant == <NUM_LIT> ) return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ;


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( const Triple & TT ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <STR_LIT> ) ; return X ;


if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;


<s> if ( ! T . isOSBinFormatELF ( ) ) llvm_unreachable ( <STR_LIT> ) ; return createELFStreamer ( Context , MAB , OS , Emitter , RelaxAll ) ;


return createELFStreamer ( Context , MAB , OS , Emitter , RelaxAll ) ;


<s> bool evaluateBranch ( const MCInst & Inst , uint64_t Addr , uint64_t Size , uint64_t & Target ) const override { if ( Inst . getNumOperands ( ) == <NUM_LIT> ) return false ; if ( Info -> get ( Inst . getOpcode ( ) ) . OpInfo [ <NUM_LIT> ] . OperandType == MCOI :: OPERAND_PCREL ) { int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; Target = Addr + Size + Imm ; return true ; } else { int64_t Imm = Inst . getOperand ( <NUM_LIT> ) . getImm ( ) ; if ( Imm == <NUM_LIT> ) return false ; Target = Imm ; return true ;


<s> explicit <ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) : MCInstrAnalysis ( Info ) {


<s> TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCRelocationInfo ( The<ISA_LIT>Target , create<ISA_LIT>ElfRelocation ) ;

TargetRegistry :: RegisterMCInstrAnalysis ( The<ISA_LIT>Target , create<ISA_LIT>InstrAnalysis ) ;


<s> TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , llvm :: create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCRelocationInfo ( The<ISA_LIT>Target , create<ISA_LIT>ElfRelocation ) ;


<s> unsigned NewOpc = mergedOpcode ( MemInstr -> getOpcode ( ) , AluOffset . isImm ( ) ) ; assert ( AluOpcode != LPAC :: UNKNOWN && <STR_LIT> ) ; assert ( NewOpc != <NUM_LIT> && <STR_LIT> ) ; MachineInstrBuilder InstrBuilder = BuildMI ( * BB , MemInstr , MemInstr -> getDebugLoc ( ) , TII -> get ( NewOpc ) ) ; InstrBuilder . addReg ( Dest . getReg ( ) , getDefRegState ( true ) ) ; InstrBuilder . addReg ( Base . getReg ( ) , getKillRegState ( true ) ) ; if ( AluOffset . isReg ( ) ) InstrBuilder . addReg ( AluOffset . getReg ( ) ) ;

else if ( AluOffset . isImm ( ) ) InstrBuilder . addImm ( AluOffset . getImm ( ) ) ;


<s> Decrement ? -- First : ++ First ; if ( First == Last ) break ; if ( First -> isDebugValue ( ) ) continue ; if ( isSuitableAluInstr ( IsSpls , First , * Base , * Offset ) ) { return First ; } if ( First != Last ) {

if ( InstrUsesReg ( First , Base ) ) break ;


<s> MbbIterator Last = Decrement ? BB -> begin ( ) : BB -> end ( ) ; while ( First != Last ) { Decrement ? -- First : ++ First ; if ( First == Last ) break ; if ( First -> isDebugValue ( ) ) continue ; if ( isSuitableAluInstr ( IsSpls , First , * Base , * Offset ) ) { return First ; } if ( First != Last ) { if ( InstrUsesReg ( First , Base ) ) break ; if ( Offset -> isReg ( ) && InstrUsesReg ( First , Offset ) ) break ; } } return MemInstr ;


<s> StringRef getPassName ( ) const override {


<s> if ( mergedOpcode ( MI . getOpcode ( ) , false ) == <NUM_LIT> ) return false ;

const MachineMemOperand * MemOperand = * MI . memoperands_begin ( ) ;


<s> TII = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ;


<s> if ( DisableMemAluCombiner ) return false ; TII = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ;


<s> for ( int Inc = <NUM_LIT> ; Inc <= <NUM_LIT> ; ++ Inc ) { MbbIterator AluIter = findClosestSuitableAluInstr ( BB , MBBIter , Inc == <NUM_LIT> ) ; if ( AluIter != MBBIter ) { insertMergedInstruction ( BB , MBBIter , AluIter , Inc == <NUM_LIT> ) ; ++ NumLdStAluCombined ; Modified = true ; BB -> erase ( AluIter ) ; BB -> erase ( MBBIter ++ ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>MemAluCombinerPass ( ) { return new <ISA_LIT>MemAluCombiner ( ) ;


<s> return new <ISA_LIT>MemAluCombiner ( ) ;


<s> Decrement ? -- First : ++ First ; if ( First -> isDebugValue ( ) ) continue ; if ( isSuitableAluInstr ( IsSpls , First , * Base , * Offset ) ) { return First ; } if ( First != Last ) { if ( InstrUsesReg ( First , Base ) ) break ;

if ( Offset -> isReg ( ) && InstrUsesReg ( First , Offset ) ) break ;


<s> const char * getPassName ( ) const override { return <STR_LIT> ;


<s> void <ISA_LIT>MemAluCombiner :: insertMergedInstruction ( MachineBasicBlock * BB , const MbbIterator & MemInstr , const MbbIterator & AluInstr , bool Before ) { MachineOperand Dest = MemInstr -> getOperand ( <NUM_LIT> ) ; MachineOperand Base = MemInstr -> getOperand ( <NUM_LIT> ) ; MachineOperand MemOffset = MemInstr -> getOperand ( <NUM_LIT> ) ; MachineOperand AluOffset = AluInstr -> getOperand ( <NUM_LIT> ) ; assert ( ( AluOffset . isReg ( ) || AluOffset . isImm ( ) ) && <STR_LIT> ) ; LPAC :: AluCode AluOpcode = mergedAluCode ( AluInstr -> getOpcode ( ) ) ; unsigned NewOpc = mergedOpcode ( MemInstr -> getOpcode ( ) , AluOffset . isImm ( ) ) ; assert ( AluOpcode != LPAC :: UNKNOWN && <STR_LIT> ) ; assert ( NewOpc != <NUM_LIT> && <STR_LIT> ) ; MachineInstrBuilder InstrBuilder = BuildMI ( * BB , MemInstr , MemInstr -> getDebugLoc ( ) , TII -> get ( NewOpc ) ) ; InstrBuilder . addReg ( Dest . getReg ( ) , getDefRegState ( true ) ) ; InstrBuilder . addReg ( Base . getReg ( ) , getKillRegState ( true ) ) ; if ( AluOffset . isReg ( ) ) InstrBuilder . addReg ( AluOffset . getReg ( ) ) ; else if ( AluOffset . isImm ( ) ) InstrBuilder . addImm ( AluOffset . getImm ( ) ) ; else llvm_unreachable ( <STR_LIT> ) ;

if ( Before || ! isZeroOperand ( MemOffset ) ) InstrBuilder . addImm ( LPAC :: makePreOp ( AluOpcode ) ) ;


<s> unsigned NewOpc = mergedOpcode ( MemInstr -> getOpcode ( ) , AluOffset . isImm ( ) ) ; assert ( AluOpcode != LPAC :: UNKNOWN && <STR_LIT> ) ; assert ( NewOpc != <NUM_LIT> && <STR_LIT> ) ; MachineInstrBuilder InstrBuilder = BuildMI ( * BB , MemInstr , MemInstr -> getDebugLoc ( ) , TII -> get ( NewOpc ) ) ; InstrBuilder . addReg ( Dest . getReg ( ) , getDefRegState ( true ) ) ; InstrBuilder . addReg ( Base . getReg ( ) , getKillRegState ( true ) ) ;

if ( AluOffset . isReg ( ) ) InstrBuilder . addReg ( AluOffset . getReg ( ) ) ;


<s> Mop != Instr -> operands_end ( ) ; ++ Mop ) {

if ( isSameOperand ( * Mop , * Reg ) ) return true ;


<s> Mop != Instr -> operands_end ( ) ; ++ Mop ) { if ( isSameOperand ( * Mop , * Reg ) ) return true ;


<s> if ( mergedOpcode ( MI . getOpcode ( ) , false ) == <NUM_LIT> ) return false ; const MachineMemOperand * MemOperand = * MI . memoperands_begin ( ) ; if ( MemOperand -> isVolatile ( ) ) return false ;


<s> if ( ! MI . hasOneMemOperand ( ) ) return false ; if ( mergedOpcode ( MI . getOpcode ( ) , false ) == <NUM_LIT> ) return false ; const MachineMemOperand * MemOperand = * MI . memoperands_begin ( ) ; if ( MemOperand -> isVolatile ( ) ) return false ;


<s> if ( Offset . isImm ( ) && ( ( Offset . getImm ( ) == <NUM_LIT> && ( ( IsSpls && isInt < <NUM_LIT> > ( Op2 . getImm ( ) ) ) || ( ! IsSpls && isInt < <NUM_LIT> > ( Op2 . getImm ( ) ) ) ) ) || Offset . getImm ( ) == Op2 . getImm ( ) ) ) return true ; } else if ( Op2 . isReg ( ) ) { if ( Offset . isReg ( ) && Op2 . getReg ( ) == Offset . getReg ( ) ) return true ; } else return false ; return false ;


<s> if ( Op2 . isImm ( ) ) { if ( AluIter -> getOpcode ( ) != <STR_LIT> ) return false ; if ( Offset . isReg ( ) && Offset . getReg ( ) == <STR_LIT> ) return true ; if ( Offset . isImm ( ) && ( ( Offset . getImm ( ) == <NUM_LIT> && ( ( IsSpls && isInt < <NUM_LIT> > ( Op2 . getImm ( ) ) ) || ( ! IsSpls && isInt < <NUM_LIT> > ( Op2 . getImm ( ) ) ) ) ) || Offset . getImm ( ) == Op2 . getImm ( ) ) ) return true ; } else if ( Op2 . isReg ( ) ) {

if ( Offset . isReg ( ) && Op2 . getReg ( ) == Offset . getReg ( ) ) return true ;


<s> bool isZeroOperand ( const MachineOperand & Op ) { return ( ( Op . isReg ( ) && Op . getReg ( ) == <STR_LIT> ) || ( Op . isImm ( ) && Op . getImm ( ) == <NUM_LIT> ) ) ;


<s> initialize<ISA_LIT>MemAluCombinerPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : return LPAC :: AND ; case <STR_LIT> : case <STR_LIT> : return LPAC :: OR ; case <STR_LIT> : case <STR_LIT> : return LPAC :: XOR ; case <STR_LIT> : return LPAC :: SHL ;


<s> return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ;


<s> unsigned mergedOpcode ( unsigned OldOpcode , bool ImmediateOffset ) { switch ( OldOpcode ) { case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> : case <STR_LIT> : if ( ImmediateOffset ) return <STR_LIT> ; return <STR_LIT> ; case <STR_LIT> :


<s> bool Modified = false ; for ( MfIterator MFI = MF . begin ( ) ; MFI != MF . end ( ) ; ++ MFI ) {

Modified |= combineMemAluInBasicBlock ( & * MFI ) ;


<s> if ( DisableMemAluCombiner ) return false ; TII = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ; bool Modified = false ; for ( MfIterator MFI = MF . begin ( ) ; MFI != MF . end ( ) ; ++ MFI ) {


<s> Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { BuildMI ( * MI . getParent ( ) , II , DL , HasNegOffset ? TII -> get ( <STR_LIT> ) : TII -> get ( <STR_LIT> ) , MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FrameReg ) . addReg ( Reg ) . addImm ( LPCC :: ICC_T ) ; MI . eraseFromParent ( ) ; return ; } if ( isSPLSOpcode ( MI . getOpcode ( ) ) || isRMOpcode ( MI . getOpcode ( ) ) ) { MI . setDesc ( TII -> get ( getRRMOpcodeVariant ( MI . getOpcode ( ) ) ) ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getBaseRegister ( ) const { return <STR_LIT> ;


<s> const uint16_t * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * ) const {


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( const MachineFunction & , CallingConv :: ID ) const { return CSR_RegMask ;


<s> unsigned <ISA_LIT>RegisterInfo :: getRARegister ( ) const { return <STR_LIT> ;


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; if ( hasBasePointer ( MF ) ) Reserved . set ( getBaseRegister ( ) ) ;


<s> return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; if ( needsStackRealignment ( MF ) && MFI . hasVarSizedObjects ( ) ) return true ; return false ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) {


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & ) const { return true ;


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & ) const {


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & ) const { return true ;


<s> assert ( SPAdj == <NUM_LIT> && <STR_LIT> ) ; MachineInstr & MI = * II ; MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; const TargetInstrInfo * TII = MF . getSubtarget ( ) . getInstrInfo ( ) ; const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; bool HasFP = TFI -> hasFP ( MF ) ; DebugLoc DL = MI . getDebugLoc ( ) ; int FrameIndex = MI . getOperand ( FIOperandNum ) . getIndex ( ) ; int Offset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIndex ) + MI . getOperand ( FIOperandNum + <NUM_LIT> ) . getImm ( ) ; if ( ! HasFP || ( hasStackRealignment ( MF ) && FrameIndex >= <NUM_LIT> ) ) Offset += MF . getFrameInfo ( ) . getStackSize ( ) ; Register FrameReg = getFrameRegister ( MF ) ; if ( FrameIndex >= <NUM_LIT> ) { if ( hasBasePointer ( MF ) ) FrameReg = getBaseRegister ( ) ; else if ( hasStackRealignment ( MF ) ) FrameReg = <STR_LIT> ; } if ( ( isSPLSOpcode ( MI . getOpcode ( ) ) && ! isInt < <NUM_LIT> > ( Offset ) ) || ! isInt < <NUM_LIT> > ( Offset ) ) { assert ( RS && <STR_LIT> ) ; unsigned Reg = RS -> FindUnusedReg ( & <STR_LIT> ) ; if ( ! Reg ) Reg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ; assert ( Reg && <STR_LIT> ) ; bool HasNegOffset = false ; if ( Offset < <NUM_LIT> ) { HasNegOffset = true ; Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { BuildMI ( * MI . getParent ( ) , II , DL , HasNegOffset ? TII -> get ( <STR_LIT> ) : TII -> get ( <STR_LIT> ) , MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FrameReg ) . addReg ( Reg ) . addImm ( LPCC :: ICC_T ) ; MI . eraseFromParent ( ) ;


<s> int FrameIndex = MI . getOperand ( FIOperandNum ) . getIndex ( ) ; int Offset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIndex ) + MI . getOperand ( FIOperandNum + <NUM_LIT> ) . getImm ( ) ; if ( ! HasFP || ( hasStackRealignment ( MF ) && FrameIndex >= <NUM_LIT> ) ) Offset += MF . getFrameInfo ( ) . getStackSize ( ) ; Register FrameReg = getFrameRegister ( MF ) ; if ( FrameIndex >= <NUM_LIT> ) { if ( hasBasePointer ( MF ) ) FrameReg = getBaseRegister ( ) ; else if ( hasStackRealignment ( MF ) ) FrameReg = <STR_LIT> ; } if ( ( isSPLSOpcode ( MI . getOpcode ( ) ) && ! isInt < <NUM_LIT> > ( Offset ) ) || ! isInt < <NUM_LIT> > ( Offset ) ) { assert ( RS && <STR_LIT> ) ; unsigned Reg = RS -> FindUnusedReg ( & <STR_LIT> ) ; if ( ! Reg ) Reg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ; assert ( Reg && <STR_LIT> ) ; bool HasNegOffset = false ; if ( Offset < <NUM_LIT> ) { HasNegOffset = true ; Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { BuildMI ( * MI . getParent ( ) , II , DL , HasNegOffset ? TII -> get ( <STR_LIT> ) : TII -> get ( <STR_LIT> ) , MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FrameReg ) . addReg ( Reg ) . addImm ( LPCC :: ICC_T ) ; MI . eraseFromParent ( ) ; return ; } if ( isSPLSOpcode ( MI . getOpcode ( ) ) || isRMOpcode ( MI . getOpcode ( ) ) ) { MI . setDesc ( TII -> get ( getRRMOpcodeVariant ( MI . getOpcode ( ) ) ) ) ; if ( HasNegOffset ) { assert ( ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) == LPAC :: ADD ) && <STR_LIT> ) ;

MI . getOperand ( <NUM_LIT> ) . setImm ( LPAC :: SUB ) ;


<s> Register <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & ) const {


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; if ( hasStackRealignment ( MF ) && MFI . hasVarSizedObjects ( ) ) return true ; return false ;


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;

if ( hasStackRealignment ( MF ) && MFI . hasVarSizedObjects ( ) ) return true ;


<s> int Offset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIndex ) + MI . getOperand ( FIOperandNum + <NUM_LIT> ) . getImm ( ) ; if ( ! HasFP || ( hasStackRealignment ( MF ) && FrameIndex >= <NUM_LIT> ) ) Offset += MF . getFrameInfo ( ) . getStackSize ( ) ; Register FrameReg = getFrameRegister ( MF ) ; if ( FrameIndex >= <NUM_LIT> ) { if ( hasBasePointer ( MF ) ) FrameReg = getBaseRegister ( ) ; else if ( hasStackRealignment ( MF ) ) FrameReg = <STR_LIT> ; } if ( ( isSPLSOpcode ( MI . getOpcode ( ) ) && ! isInt < <NUM_LIT> > ( Offset ) ) || ! isInt < <NUM_LIT> > ( Offset ) ) { assert ( RS && <STR_LIT> ) ; Register Reg = RS -> FindUnusedReg ( & <STR_LIT> ) ; if ( ! Reg ) Reg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ; assert ( Reg && <STR_LIT> ) ; bool HasNegOffset = false ; if ( Offset < <NUM_LIT> ) { HasNegOffset = true ; Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ;


<s> unsigned Reg = RS -> FindUnusedReg ( & <STR_LIT> ) ; if ( ! Reg ) Reg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ; assert ( Reg && <STR_LIT> ) ; bool HasNegOffset = false ; if ( Offset < <NUM_LIT> ) { HasNegOffset = true ; Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { if ( HasNegOffset ) MI . setDesc ( TII -> get ( <STR_LIT> ) ) ; else MI . setDesc ( TII -> get ( <STR_LIT> ) ) ; } else if ( isSPLSOpcode ( MI . getOpcode ( ) ) || isRMOpcode ( MI . getOpcode ( ) ) ) { MI . setDesc ( TII -> get ( getRRMOpcodeVariant ( MI . getOpcode ( ) ) ) ) ; if ( HasNegOffset ) { assert ( ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) == LPAC :: ADD ) && <STR_LIT> ) ; MI . getOperand ( <NUM_LIT> ) . setImm ( LPAC :: SUB ) ;


<s> bool <ISA_LIT>RegisterInfo :: canRealignStack ( const MachineFunction & MF ) const { if ( ! TargetRegisterInfo :: canRealignStack ( MF ) ) return false ; return true ;


<s> if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { BuildMI ( * MI . getParent ( ) , II , DL , HasNegOffset ? TII -> get ( <STR_LIT> ) : TII -> get ( <STR_LIT> ) , MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FrameReg ) . addReg ( Reg ) . addImm ( LPCC :: ICC_T ) ; MI . eraseFromParent ( ) ; return ; } if ( isSPLSOpcode ( MI . getOpcode ( ) ) || isRMOpcode ( MI . getOpcode ( ) ) ) { MI . setDesc ( TII -> get ( getRRMOpcodeVariant ( MI . getOpcode ( ) ) ) ) ; if ( HasNegOffset ) { assert ( ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) == LPAC :: ADD ) && <STR_LIT> ) ; MI . getOperand ( <NUM_LIT> ) . setImm ( LPAC :: SUB ) ; }


<s> if ( ! Reg ) Reg = RS -> scavengeRegister ( & <STR_LIT> , II , SPAdj ) ; assert ( Reg && <STR_LIT> ) ; bool HasNegOffset = false ; if ( Offset < <NUM_LIT> ) { HasNegOffset = true ; Offset = - Offset ; } if ( ! isInt < <NUM_LIT> > ( Offset ) ) { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( static_cast < uint32_t > ( Offset ) >> <NUM_LIT> ) ; BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addReg ( Reg ) . addImm ( Offset & <NUM_LIT> ) ; } else { BuildMI ( * MI . getParent ( ) , II , DL , TII -> get ( <STR_LIT> ) , Reg ) . addImm ( <NUM_LIT> ) . addImm ( Offset ) ; } if ( MI . getOpcode ( ) == <STR_LIT> ) { BuildMI ( * MI . getParent ( ) , II , DL , HasNegOffset ? TII -> get ( <STR_LIT> ) : TII -> get ( <STR_LIT> ) , MI . getOperand ( <NUM_LIT> ) . getReg ( ) ) . addReg ( FrameReg ) . addReg ( Reg ) . addImm ( LPCC :: ICC_T ) ; MI . eraseFromParent ( ) ; return ; } if ( isSPLSOpcode ( MI . getOpcode ( ) ) || isRMOpcode ( MI . getOpcode ( ) ) ) { MI . setDesc ( TII -> get ( getRRMOpcodeVariant ( MI . getOpcode ( ) ) ) ) ; if ( HasNegOffset ) { assert ( ( MI . getOperand ( <NUM_LIT> ) . getImm ( ) == LPAC :: ADD ) && <STR_LIT> ) ; MI . getOperand ( <NUM_LIT> ) . setImm ( LPAC :: SUB ) ; } } else llvm_unreachable ( <STR_LIT> ) ;

MI . getOperand ( FIOperandNum ) . ChangeToRegister ( FrameReg , false ) ;


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID CC ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getEHExceptionRegister ( ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getEHHandlerRegister ( ) const { llvm_unreachable ( <STR_LIT> ) ;


<s> const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

if ( needsStackRealignment ( MF ) && MFI -> hasVarSizedObjects ( ) ) return true ;


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const { return true ;


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const { return true ;


<s> ConstantSDNode * ConstantSize = dyn_cast < ConstantSDNode > ( Size ) ;

if ( ! ConstantSize ) return SDValue ( ) ;


<s> ConstantSDNode * ConstantSize = dyn_cast < ConstantSDNode > ( Size ) ; if ( ! ConstantSize ) return SDValue ( ) ;


<s> ConstantSDNode * ConstantSize = dyn_cast < ConstantSDNode > ( Size ) ; if ( ! ConstantSize ) return SDValue ( ) ; return SDValue ( ) ;


<s> const TargetInstrInfo * TII = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ; MbbIterator SetflagIter = BB -> begin ( ) ; MbbIterator End = BB -> end ( ) ; MbbIterator Begin = BB -> begin ( ) ; while ( SetflagIter != End ) { bool Replaced = false ; if ( isSuitableSetflag ( SetflagIter , End ) ) { MbbIterator AluIter = SetflagIter ; while ( AluIter != Begin ) { -- AluIter ; if ( AluIter -> isDebugValue ( ) ) continue ; if ( isFlagSettingInstruction ( AluIter ) ) break ; if ( AluIter -> getNumOperands ( ) > <NUM_LIT> && AluIter -> getOperand ( <NUM_LIT> ) . isReg ( ) && ( AluIter -> getOperand ( <NUM_LIT> ) . getReg ( ) == SetflagIter -> getOperand ( <NUM_LIT> ) . getReg ( ) ) ) { unsigned NewOpc = flagSettingOpcodeVariant ( AluIter -> getOpcode ( ) ) ; if ( NewOpc == kInvalid ) break ;

AluIter -> setDesc ( TII -> get ( NewOpc ) ) ;


<s> MbbIterator AluIter = SetflagIter ; while ( AluIter != Begin ) { -- AluIter ; if ( AluIter -> isDebugValue ( ) ) continue ; if ( isFlagSettingInstruction ( AluIter ) ) break ; if ( AluIter -> getNumOperands ( ) > <NUM_LIT> && AluIter -> getOperand ( <NUM_LIT> ) . isReg ( ) && ( AluIter -> getOperand ( <NUM_LIT> ) . getReg ( ) == SetflagIter -> getOperand ( <NUM_LIT> ) . getReg ( ) ) ) { unsigned NewOpc = flagSettingOpcodeVariant ( AluIter -> getOpcode ( ) ) ; if ( NewOpc == kInvalid ) break ; AluIter -> setDesc ( TII -> get ( NewOpc ) ) ; AluIter -> addImplicitDefUseOperands ( * MF ) ; Replaced = true ; ++ NumSetflagAluCombined ;


<s> FunctionPass * llvm :: create<ISA_LIT>SetflagAluCombinerPass ( ) { return new <ISA_LIT>SetflagAluCombiner ( ) ;


<s> switch ( OldOpcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> const char * getPassName ( ) const override { return <STR_LIT> ;


<s> return Instruction -> killsRegister ( <STR_LIT> ) ;


<s> int CCIndex = getCCOperandPosition ( SCCUserIter -> getOpcode ( ) ) ; if ( CCIndex != - <NUM_LIT> ) { LPCC :: CondCode CC = static_cast < LPCC :: CondCode > ( SCCUserIter -> getOperand ( CCIndex ) . getImm ( ) ) ; if ( CC != LPCC :: ICC_EQ && CC != LPCC :: ICC_NE && CC != LPCC :: ICC_PL && CC != LPCC :: ICC_MI ) return false ;


<s> bool Modified = false ; MfIterator End = MF . end ( ) ;

for ( MfIterator MFI = MF . begin ( ) ; MFI != End ; ++ MFI ) {


<s> if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ; ParseSubtargetFeatures ( CPUName , CPUName , FS ) ;


<s> std :: string CPUName = std :: string ( CPU ) ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ; ParseSubtargetFeatures ( CPUName , CPUName , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TargetTriple , StringRef Cpu , StringRef FeatureString , const TargetMachine & TM , const TargetOptions & , CodeModel :: Model , CodeGenOpt :: Level ) : <ISA_LIT>GenSubtargetInfo ( TargetTriple , Cpu , Cpu , FeatureString ) , FrameLowering ( initializeSubtargetDependencies ( Cpu , FeatureString ) ) , TLInfo ( TM , * this ) {


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TargetTriple , StringRef Cpu , StringRef FeatureString , const TargetMachine & TM , const TargetOptions & , CodeModel :: Model , CodeGenOpt :: Level ) : <ISA_LIT>GenSubtargetInfo ( TargetTriple , Cpu , Cpu , FeatureString ) , FrameLowering ( initializeSubtargetDependencies ( Cpu , FeatureString ) ) , InstrInfo ( ) , TLInfo ( TM , * this ) , TSInfo ( ) {


<s> void <ISA_LIT>Subtarget :: initSubtargetFeatures ( StringRef CPU , StringRef FS ) { std :: string CPUName = std :: string ( CPU ) ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ; ParseSubtargetFeatures ( CPUName , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TargetTriple , StringRef Cpu , StringRef FeatureString , const TargetMachine & TM , const TargetOptions & , CodeModel :: Model , CodeGenOpt :: Level ) : <ISA_LIT>GenSubtargetInfo ( TargetTriple , Cpu , FeatureString ) , FrameLowering ( initializeSubtargetDependencies ( Cpu , FeatureString ) ) , InstrInfo ( ) , TLInfo ( TM , * this ) , TSInfo ( ) {


<s> const TargetFrameLowering * getFrameLowering ( ) const override { return & FrameLowering ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override {


<s> initSubtargetFeatures ( CPU , FS ) ;


<s> void <ISA_LIT>Subtarget :: initSubtargetFeatures ( StringRef CPU , StringRef FS ) { std :: string CPUName = CPU ;

if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TargetTriple , StringRef Cpu , StringRef FeatureString , const TargetMachine & TM , const TargetOptions & Options , CodeModel :: Model CodeModel , CodeGenOpt :: Level OptLevel ) : <ISA_LIT>GenSubtargetInfo ( TargetTriple , Cpu , FeatureString ) , FrameLowering ( initializeSubtargetDependencies ( Cpu , FeatureString ) ) , InstrInfo ( ) , TLInfo ( TM , * this ) , TSInfo ( ) {


<s> Target & llvm :: getThe<ISA_LIT>Target ( ) {


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>TargetInfo ( ) {

RegisterTarget < Triple :: lanai > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) {

RegisterTarget < Triple :: lanai > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> ) ;


<s> RegisterTarget < Triple :: lanai > X ( The<ISA_LIT>Target , <STR_LIT> , <STR_LIT> ) ;


RegisterTarget < Triple :: lanai > X ( The<ISA_LIT>Target , <STR_LIT> , <STR_LIT> ) ;


<s> Target & getThe<ISA_LIT>Target ( ) { static Target The<ISA_LIT>Target ;


<s> RegisterTarget < Triple :: lanai > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef Cpu , StringRef FeatureString , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CodeModel , CodeGenOpt :: Level OptLevel , bool JIT ) : LLVMTargetMachine ( T , computeDataLayout ( ) , TT , Cpu , FeatureString , Options , getEffectiveRelocModel ( RM ) , getEffectiveCodeModel ( CodeModel ) , OptLevel ) , Subtarget ( TT , Cpu , FeatureString , * this , Options , getCodeModel ( ) , OptLevel ) , TLOF ( new <ISA_LIT>TargetObjectFile ( ) ) { initAsmInfo ( ) ;


<s> const <ISA_LIT>Subtarget * getSubtargetImpl ( const llvm :: Function & Fn ) const override { return & Subtarget ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef Cpu , StringRef FeatureString , const TargetOptions & Options , Optional < Reloc :: Model > RM , CodeModel :: Model CodeModel , CodeGenOpt :: Level OptLevel ) : LLVMTargetMachine ( T , computeDataLayout ( ) , TT , Cpu , FeatureString , Options , getEffectiveRelocModel ( RM ) , CodeModel , OptLevel ) , Subtarget ( TT , Cpu , FeatureString , * this , Options , CodeModel , OptLevel ) , TLOF ( new <ISA_LIT>TargetObjectFile ( ) ) {


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>TargetMachine > registered_target ( getThe<ISA_LIT>Target ( ) ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > registered_target ( getThe<ISA_LIT>Target ( ) ) ;


<s> static std :: string computeDataLayout ( const Triple & TT ) { return <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> ;


<s> return new <ISA_LIT>PassConfig ( this , & PassManager ) ;


<s> if ( ! RM . hasValue ( ) ) return Reloc :: PIC_ ;


<s> return TargetTransformInfo ( <ISA_LIT>TTIImpl ( this , F ) ) ; } ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase * PassManager ) : TargetPassConfig ( TM , * PassManager ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef Cpu , StringRef FeatureString , const TargetOptions & Options , Optional < Reloc :: Model > RM , CodeModel :: Model CodeModel , CodeGenOpt :: Level OptLevel ) : LLVMTargetMachine ( T , computeDataLayout ( TargetTriple ) , TT , Cpu , FeatureString , Options , getEffectiveRelocModel ( TT , RM ) , CodeModel , OptLevel ) , Subtarget ( TT , Cpu , FeatureString , * this , Options , CodeModel , OptLevel ) , TLOF ( new <ISA_LIT>TargetObjectFile ( ) ) { initAsmInfo ( ) ;


<s> RegisterTargetMachine < <ISA_LIT>TargetMachine > registered_target ( The<ISA_LIT>Target ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < Reloc :: Model > RM ) { return RM . getValueOr ( Reloc :: PIC_ ) ;


<s> return TargetTransformInfo ( <ISA_LIT>TTIImpl ( this , F ) ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ; return false ;


<s> addPass ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) {

addPass ( create<ISA_LIT>DelaySlotFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> addPass ( create<ISA_LIT>MemAluCombinerPass ( ) ) ;


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PassManager ) {

return new <ISA_LIT>PassConfig ( * this , & PassManager ) ;


<s> return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const {

return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> const <ISA_LIT>Subtarget * getSubtargetImpl ( const llvm :: Function & ) const override {


<s> TargetTransformInfo <ISA_LIT>TargetMachine :: getTargetTransformInfo ( const Function & F ) { return TargetTransformInfo ( <ISA_LIT>TTIImpl ( this , F ) ) ;


<s> bool isMachineVerifierClean ( ) const override {


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine & TM , PassManagerBase * PassManager ) : TargetPassConfig ( TM , * PassManager ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef Cpu , StringRef FeatureString , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CodeModel , CodeGenOpt :: Level OptLevel , bool JIT ) : LLVMTargetMachine ( T , computeDataLayout ( ) , TT , Cpu , FeatureString , Options , getEffectiveRelocModel ( RM ) , getEffectiveCodeModel ( CodeModel , CodeModel :: Medium ) , OptLevel ) , Subtarget ( TT , Cpu , FeatureString , * this , Options , getCodeModel ( ) , OptLevel ) , TLOF ( new <ISA_LIT>TargetObjectFile ( ) ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef Cpu , StringRef FeatureString , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CodeModel , CodeGenOpt :: Level OptLevel , bool JIT ) : LLVMTargetMachine ( T , computeDataLayout ( ) , TT , Cpu , FeatureString , Options , getEffectiveRelocModel ( RM ) , getEffectiveCodeModel ( CodeModel , CodeModel :: Medium ) , OptLevel ) , Subtarget ( TT , Cpu , FeatureString , * this , Options , getCodeModel ( ) , OptLevel ) , TLOF ( new <ISA_LIT>TargetObjectFile ( ) ) { initAsmInfo ( ) ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: getSectionForConstant ( const DataLayout & DL , SectionKind Kind , const Constant * C , Align & Alignment ) const { if ( isConstantInSmallSection ( DL , C ) ) return SmallDataSection ;

return TargetLoweringObjectFileELF :: getSectionForConstant ( DL , Kind , C , Alignment ) ;


<s> return ( isGlobalInSmallSectionImpl ( GV , TM ) && ( Kind . isData ( ) || Kind . isBSS ( ) || Kind . isCommon ( ) ) ) ;


<s> const GlobalVariable * GVA = dyn_cast < GlobalVariable > ( GV ) ; if ( ! GVA ) return false ; if ( GV -> hasLocalLinkage ( ) ) return false ; if ( ( ( GV -> hasExternalLinkage ( ) && GV -> isDeclaration ( ) ) || GV -> hasCommonLinkage ( ) ) ) return false ;

Type * Ty = GV -> getType ( ) -> getElementType ( ) ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler & Mang , const TargetMachine & TM ) const { if ( Kind . isBSS ( ) && isGlobalInSmallSection ( GV , TM , Kind ) ) return SmallBSSSection ; if ( Kind . isData ( ) && isGlobalInSmallSection ( GV , TM , Kind ) ) return SmallDataSection ; return TargetLoweringObjectFileELF :: SelectSectionForGlobal ( GV , Kind , Mang , TM ) ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler & Mang , const TargetMachine & TM ) const { if ( Kind . isBSS ( ) && isGlobalInSmallSection ( GV , TM , Kind ) ) return SmallBSSSection ;

if ( Kind . isData ( ) && isGlobalInSmallSection ( GV , TM , Kind ) ) return SmallDataSection ;


<s> SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ;


<s> if ( ! GVA ) return TM . getCodeModel ( ) == CodeModel :: Small ; if ( GVA -> getSection ( ) . startswith ( <STR_LIT> ) ) return false ; if ( TM . getCodeModel ( ) == CodeModel :: Small ) return true ;

if ( GVA -> hasLocalLinkage ( ) ) return false ;


<s> if ( GVA -> hasLocalLinkage ( ) ) return false ; if ( ( ( GVA -> hasExternalLinkage ( ) && GVA -> isDeclaration ( ) ) || GVA -> hasCommonLinkage ( ) ) ) return false ; Type * Ty = GVA -> getValueType ( ) ; return isInSmallSection ( GVA -> getParent ( ) -> getDataLayout ( ) . getTypeAllocSize ( Ty ) ) ;


<s> if ( isConstantInSmallSection ( DL , C ) ) return SmallDataSection ; return TargetLoweringObjectFileELF :: getSectionForConstant ( DL , Kind , C , Align , GO ) ;


<s> if ( ( ( GV -> hasExternalLinkage ( ) && GV -> isDeclaration ( ) ) || GV -> hasCommonLinkage ( ) ) ) return false ;


<s> if ( GV -> hasLocalLinkage ( ) ) return false ;

if ( ( ( GV -> hasExternalLinkage ( ) && GV -> isDeclaration ( ) ) || GV -> hasCommonLinkage ( ) ) ) return false ;


<s> void <ISA_LIT>TargetObjectFile :: Initialize ( MCContext & Ctx , const TargetMachine & TM ) { TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ; InitializeELF ( TM . Options . UseInitArray ) ;

SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ;


<s> void <ISA_LIT>TargetObjectFile :: Initialize ( MCContext & Ctx , const TargetMachine & TM ) { TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ;

InitializeELF ( TM . Options . UseInitArray ) ;


<s> return isInSmallSection ( DL . getTypeAllocSize ( CN -> getType ( ) ) ) ;


<s> bool <ISA_LIT>TargetObjectFile :: isGlobalInSmallSection ( const GlobalObject * GO , const TargetMachine & TM , SectionKind Kind ) const { return ( isGlobalInSmallSectionImpl ( GO , TM ) && ( Kind . isData ( ) || Kind . isBSS ( ) || Kind . isCommon ( ) ) ) ;


<s> if ( ( ( GVA -> hasExternalLinkage ( ) && GVA -> isDeclaration ( ) ) || GVA -> hasCommonLinkage ( ) ) ) return false ; Type * Ty = GVA -> getValueType ( ) ;

return isInSmallSection ( GVA -> getParent ( ) -> getDataLayout ( ) . getTypeAllocSize ( Ty ) ) ;


<s> if ( ( ( GVA -> hasExternalLinkage ( ) && GVA -> isDeclaration ( ) ) || GVA -> hasCommonLinkage ( ) ) ) return false ; Type * Ty = GVA -> getValueType ( ) ; return isInSmallSection ( GVA -> getParent ( ) -> getDataLayout ( ) . getTypeAllocSize ( Ty ) ) ;


<s> static bool isInSmallSection ( uint64_t Size ) { return Size > <NUM_LIT> && Size <= SSThreshold ;


<s> MCSection * <ISA_LIT>TargetObjectFile :: SelectSectionForGlobal ( const GlobalObject * GO , SectionKind Kind , const TargetMachine & TM ) const { if ( Kind . isBSS ( ) && isGlobalInSmallSection ( GO , TM , Kind ) ) return SmallBSSSection ; if ( Kind . isData ( ) && isGlobalInSmallSection ( GO , TM , Kind ) ) return SmallDataSection ;

return TargetLoweringObjectFileELF :: SelectSectionForGlobal ( GO , Kind , TM ) ;


<s> if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) return TTI :: TCC_Basic ; if ( isInt < <NUM_LIT> > ( Imm . getZExtValue ( ) ) ) return TTI :: TCC_Basic ; if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) {

if ( ( Imm . getSExtValue ( ) & <NUM_LIT> ) == <NUM_LIT> ) return TTI :: TCC_Basic ;


<s> int getIntImmCostInst ( unsigned Opc , unsigned Idx , const APInt & Imm , Type * Ty , TTI :: TargetCostKind CostKind ) { return getIntImmCost ( Imm , Ty , CostKind ) ;


<s> int getIntImmCostIntrin ( <STR_LIT> IID , unsigned Idx , const APInt & Imm , Type * Ty , TTI :: TargetCostKind CostKind ) { return getIntImmCost ( Imm , Ty , CostKind ) ;


<s> if ( Imm == <NUM_LIT> ) return TTI :: TCC_Free ; if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) return TTI :: TCC_Basic ;

if ( isInt < <NUM_LIT> > ( Imm . getZExtValue ( ) ) ) return TTI :: TCC_Basic ;


<s> InstructionCost getIntImmCostInst ( unsigned Opc , unsigned Idx , const APInt & Imm , Type * Ty , TTI :: TargetCostKind CostKind , Instruction * Inst = nullptr ) { return getIntImmCost ( Imm , Ty , CostKind ) ;


<s> InstructionCost getIntImmCostIntrin ( <STR_LIT> IID , unsigned Idx , const APInt & Imm , Type * Ty , TTI :: TargetCostKind CostKind ) {

return getIntImmCost ( Imm , Ty , CostKind ) ;


<s> unsigned BitSize = Ty -> getPrimitiveSizeInBits ( ) ; if ( BitSize == <NUM_LIT> ) return TTI :: TCC_Free ; if ( BitSize > <NUM_LIT> ) return TTI :: TCC_Free ; if ( Imm == <NUM_LIT> ) return TTI :: TCC_Free ; if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) return TTI :: TCC_Basic ; if ( isInt < <NUM_LIT> > ( Imm . getZExtValue ( ) ) ) return TTI :: TCC_Basic ;

if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) {


<s> if ( BitSize == <NUM_LIT> ) return TTI :: TCC_Free ; if ( BitSize > <NUM_LIT> ) return TTI :: TCC_Free ; if ( Imm == <NUM_LIT> ) return TTI :: TCC_Free ; if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) return TTI :: TCC_Basic ; if ( isInt < <NUM_LIT> > ( Imm . getZExtValue ( ) ) ) return TTI :: TCC_Basic ; if ( isInt < <NUM_LIT> > ( Imm . getSExtValue ( ) ) ) { if ( ( Imm . getSExtValue ( ) & <NUM_LIT> ) == <NUM_LIT> ) return TTI :: TCC_Basic ; return <NUM_LIT> * TTI :: TCC_Basic ; } return <NUM_LIT> * TTI :: TCC_Basic ;


<s> <ISA_LIT>TTIImpl ( <ISA_LIT>TTIImpl && Arg ) : BaseT ( std :: move ( static_cast < BaseT & > ( Arg ) ) ) , ST ( std :: move ( Arg . ST ) ) , TLI ( std :: move ( Arg . TLI ) ) {


<s> int ISD = TLI -> InstructionOpcodeToISD ( Opcode ) ; switch ( ISD ) { default : return BaseT :: getArithmeticInstrCost ( Opcode , Ty , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :

return <NUM_LIT> * BaseT :: getArithmeticInstrCost ( Opcode , Ty , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ;


<s> int getIntImmCostInst ( unsigned Opc , unsigned Idx , const APInt & Imm , Type * Ty , TTI :: TargetCostKind CostKind , Instruction * Inst = nullptr ) { return getIntImmCost ( Imm , Ty , CostKind ) ;


<s> unsigned getArithmeticInstrCost ( unsigned Opcode , Type * Ty , TTI :: OperandValueKind Opd1Info = TTI :: OK_AnyValue , TTI :: OperandValueKind Opd2Info = TTI :: OK_AnyValue , TTI :: OperandValueProperties Opd1PropInfo = TTI :: OP_None , TTI :: OperandValueProperties Opd2PropInfo = TTI :: OP_None ) { int ISD = TLI -> InstructionOpcodeToISD ( Opcode ) ; switch ( ISD ) { default : return BaseT :: getArithmeticInstrCost ( Opcode , Ty , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * BaseT :: getArithmeticInstrCost ( Opcode , Ty , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ; }


<s> unsigned getArithmeticInstrCost ( unsigned Opcode , Type * Ty , TTI :: OperandValueKind Opd1Info = TTI :: OK_AnyValue , TTI :: OperandValueKind Opd2Info = TTI :: OK_AnyValue , TTI :: OperandValueProperties Opd1PropInfo = TTI :: OP_None , TTI :: OperandValueProperties Opd2PropInfo = TTI :: OP_None ) {

int ISD = TLI -> InstructionOpcodeToISD ( Opcode ) ;


<s> <ISA_LIT>TTIImpl ( <ISA_LIT>TTIImpl && Arg ) : BaseT ( std :: move ( static_cast < BaseT & > ( Arg ) ) ) , ST ( Arg . ST ) , TLI ( Arg . TLI ) {


<s> default : return BaseT :: getArithmeticInstrCost ( Opcode , Ty , CostKind , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return <NUM_LIT> * BaseT :: getArithmeticInstrCost ( Opcode , Ty , CostKind , Opd1Info , Opd2Info , Opd1PropInfo , Opd2PropInfo ) ; }


<s> int getIntImmCostIntrin ( <STR_LIT> IID , unsigned Idx , const APInt & Imm , Type * Ty ) {


<s> int getIntImmCost ( <STR_LIT> IID , unsigned Idx , const APInt & Imm , Type * Ty ) {


<s> TargetTransformInfo :: PopcntSupportKind getPopcntSupport ( unsigned TyWidth ) { if ( TyWidth == <NUM_LIT> ) return TTI :: PSK_FastHardware ; return TTI :: PSK_Software ;


<s> const <ISA_LIT>Subtarget * getST ( ) const { return ST ;


<s> const <ISA_LIT>Subtarget * getST ( ) const {


<s> const <ISA_LIT>TargetLowering * getTLI ( ) const { return TLI ;


<s> explicit <ISA_LIT>TTIImpl ( const <ISA_LIT>TargetMachine * TM , const Function & F ) : BaseT ( TM , F . getParent ( ) -> getDataLayout ( ) ) , ST ( TM -> getSubtargetImpl ( F ) ) , TLI ( ST -> getTargetLowering ( ) ) {


<s> bool shouldBuildLookupTables ( ) const {