<s> bool <ISA_LIT>FrameLowering :: expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ;


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ;

unsigned NeedAlign = RC -> getAlignment ( ) ;


<s> unsigned VandOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( VandOpc ) , TmpR1 ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . addReg ( TmpR0 , RegState :: Kill ) ; auto * HRI = B . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . storeRegToStackSlot ( B , It , TmpR1 , true , FI , RC , HRI ) ;

expandStoreVec ( B , std :: prev ( It ) , MRI , HII , NewRegs ) ;


<s> MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ;

unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ;


<s> for ( MachineInstr & I : B ) { MachineBasicBlock :: iterator It = I . getIterator ( ) ; if ( ! I . isBundle ( ) ) { if ( I . getOpcode ( ) == <STR_LIT> ) return std :: next ( It ) ; continue ; } bool HasCall = false , HasAllocFrame = false ; auto T = It . getInstrIterator ( ) ; while ( ++ T != End && T -> isBundled ( ) ) { if ( T -> getOpcode ( ) == <STR_LIT> ) HasAllocFrame = true ; else if ( T -> isCall ( ) ) HasCall = true ;


<s> void insertPrologueInBlock ( MachineBasicBlock & MBB ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool replacePredRegPseudoSpillCode ( MachineFunction & MF ) const ; bool replaceVecPredRegPseudoSpillCode ( MachineFunction & MF ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ; bool shouldInlineCSR ( llvm :: MachineFunction & , const CSIVect & ) const ; bool useSpillFunction ( MachineFunction & MF , const CSIVect & CSI ) const ;

bool useRestoreFunction ( MachineFunction & MF , const CSIVect & CSI ) const ;


<s> static_assert ( <STR_LIT> > <NUM_LIT> , <STR_LIT> ) ; if ( CSI . empty ( ) ) return <NUM_LIT> ;

unsigned Max = getMax32BitSubRegister ( CSI [ <NUM_LIT> ] . getReg ( ) , TRI ) ;


<s> for ( auto & I : MBB ) if ( I . isReturn ( ) ) return & I ; return nullptr ;


<s> for ( auto & I : MBB ) if ( I . isReturn ( ) ) return & I ;


<s> const char * V4SpillFromMemoryFunctions [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const char * V4SpillFromMemoryTailcallFunctions [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const char * * SpillFunc = nullptr ; switch ( SpillType ) { case SK_ToMem : SpillFunc = Stkchk ? V4SpillToMemoryStkchkFunctions : V4SpillToMemoryFunctions ; break ; case SK_FromMem : SpillFunc = V4SpillFromMemoryFunctions ; break ; case SK_FromMemTailcall : SpillFunc = V4SpillFromMemoryTailcallFunctions ; break ; } assert ( SpillFunc && <STR_LIT> ) ; switch ( MaxReg ) { case <STR_LIT> : return SpillFunc [ <NUM_LIT> ] ; case <STR_LIT> : return SpillFunc [ <NUM_LIT> ] ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; DebugLoc DL ; const MCInstrDesc & CFID = HII . get ( TargetOpcode :: CFI_INSTRUCTION ) ; MCSymbol * FrameLabel = MMI . getContext ( ) . createTempSymbol ( ) ; bool HasFP = hasFP ( MF ) ; if ( HasFP ) { unsigned DwFPReg = HRI . getDwarfRegNum ( HRI . getFrameRegister ( ) , true ) ; unsigned DwRAReg = HRI . getDwarfRegNum ( HRI . getRARegister ( ) , true ) ; auto DefCfa = MCCFIInstruction :: createDefCfa ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ;

auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( ) , IfR ) ;


<s> MachineFunction & MF = * MBB . getParent ( ) ; if ( ! hasFP ( MF ) ) return ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; unsigned SP = HRI . getStackRegister ( ) ; MachineInstr * RetI = getReturn ( MBB ) ; unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; MachineBasicBlock :: iterator InsertPt = MBB . getFirstTerminator ( ) ; DebugLoc DL ; if ( InsertPt != MBB . end ( ) ) DL = InsertPt -> getDebugLoc ( ) ; else if ( ! MBB . empty ( ) ) DL = std :: prev ( MBB . end ( ) ) -> getDebugLoc ( ) ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ;

if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) {


<s> inline bool isMinSize ( const MachineFunction & MF ) { return MF . getFunction ( ) -> optForMinSize ( ) ;


<s> return MF . getFunction ( ) -> hasFnAttribute ( Attribute :: OptimizeNone ) || MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ;


<s> const Function & F = * MF . getFunction ( ) ;

return F . optForSize ( ) && ! F . optForMinSize ( ) ;


<s> return F . optForSize ( ) && ! F . optForMinSize ( ) ;


<s> for ( auto & I : MBB ) { const MachineInstr * MI = & I ; if ( MI -> isCall ( ) ) return true ; unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : return true ;


<s> for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( MO . isFI ( ) ) return true ; if ( ! MO . isReg ( ) ) continue ; unsigned R = MO . getReg ( ) ;

if ( TargetRegisterInfo :: isVirtualRegister ( R ) ) return true ;


<s> SlotInfo ( ) : Map ( ) , Size ( <NUM_LIT> ) , RC ( nullptr ) {


<s> unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; }


<s> unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned TargetAlign = MF . getSubtarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ;

unsigned maxCallFrameSize = MFI -> getMaxCallFrameSize ( ) ;


<s> const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; return ; } if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : std :: prev ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ;


<s> } if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : std :: prev ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ; } else { MachineBasicBlock :: iterator Term = MBB . getFirstTerminator ( ) ;

MachineBasicBlock :: iterator I = Term == MBB . begin ( ) ? MBB . end ( ) : std :: prev ( Term ) ;


<s> const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , HEXAGON_RESERVED_REG_1 ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , QRI -> getStackRegister ( ) ) . addReg ( QRI -> getStackRegister ( ) ) . addReg ( HEXAGON_RESERVED_REG_1 ) ; } else {

BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( NumBytes ) ;


<s> MachineBasicBlock & MBB = MF . front ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; const <ISA_LIT>RegisterInfo * QRI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; determineFrameLayout ( MF ) ; int NumBytes = ( int ) MFI -> getStackSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const std :: vector < MachineInstr * > & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( std :: vector < MachineInstr * > :: const_iterator i = AdjustRegs . begin ( ) , e = AdjustRegs . end ( ) ; i != e ; ++ i ) { MachineInstr * MI = * i ; assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ;

assert ( MO . isImm ( ) && <STR_LIT> ) ;


<s> unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; const TargetRegisterClass * SuperRegClass = nullptr ; bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblLoad = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ;


<s> bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = nullptr ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblStore = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ;


<s> if ( CSI . empty ( ) ) { return false ; } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = nullptr ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblStore = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . storeRegToStackSlot ( MBB , MI , Reg , true , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg ) ; }


<s> break ; case <NUM_LIT> : LDOpc = <STR_LIT> ; STOpc = <STR_LIT> ; break ; case <NUM_LIT> : default : LDOpc = <STR_LIT> ; STOpc = <STR_LIT> ; break ; } unsigned RegUsed = LDOpc == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; int LoadStoreCount = ObjSize / OpcodeChecker ; if ( ObjSize % OpcodeChecker ) ++ LoadStoreCount ; if ( NumBytes != <NUM_LIT> ) NumBytes = alignTo ( NumBytes , ObjAlign ) ; int Count = <NUM_LIT> ; while ( Count < LoadStoreCount ) { BuildMI ( MBB , InsertPt , dl , HII . get ( LDOpc ) , RegUsed ) . addReg ( SP ) . addImm ( RegisterSavedAreaSizePlusPadding + ObjAlign * Count + NumBytes ) . setMIFlag ( MachineInstr :: FrameSetup ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( STOpc ) ) . addReg ( SP ) . addImm ( ObjAlign * Count + NumBytes ) . addReg ( RegUsed ) . setMIFlag ( MachineInstr :: FrameSetup ) ; Count ++ ; } NumBytes += MFI . getObjectSize ( i ) ; } NumBytes = alignTo ( NumBytes , <NUM_LIT> ) ; NumBytes = ( NumVarArgRegs % <NUM_LIT> == <NUM_LIT> ) ? NumBytes : NumBytes + <NUM_LIT> ; for ( int j = FirstVarArgSavedReg , i = <NUM_LIT> ; j < <NUM_LIT> ; ++ j , ++ i ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addReg ( SP ) . addImm ( NumBytes + <NUM_LIT> * i ) . addReg ( <STR_LIT> + j ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } } } if ( hasFP ( MF ) ) { insertAllocframe ( MBB , InsertPt , NumBytes ) ;


<s> bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool NeedsAlign = ( MFI . getMaxAlign ( ) > getStackAlign ( ) ) ; if ( ! HasAlloca || ! NeedsAlign ) return ; SmallSet < int , <NUM_LIT> > DealignSlots ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; unsigned A = std :: max ( MFI . getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI . setObjectAlignment ( i , <NUM_LIT> ) ; LFS = alignTo ( LFS + S , A ) ; MFI . mapLocalFrameObject ( i , - static_cast < int64_t > ( LFS ) ) ; DealignSlots . insert ( i ) ; } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI : BB ) { bool KeepOld = true ; ArrayRef < MachineMemOperand * > memops = MI . memoperands ( ) ; SmallVector < MachineMemOperand * , <NUM_LIT> > new_memops ; for ( MachineMemOperand * MMO : memops ) { auto * PV = MMO -> getPseudoValue ( ) ; if ( auto * FS = dyn_cast_or_null < FixedStackPseudoSourceValue > ( PV ) ) { int FI = FS -> getFrameIndex ( ) ; if ( DealignSlots . count ( FI ) ) { unsigned A = MFI . getObjectAlignment ( FI ) ; auto * NewMMO = MF . getMachineMemOperand ( MMO -> getPointerInfo ( ) , MMO -> getFlags ( ) , MMO -> getSize ( ) , A , MMO -> getAAInfo ( ) , MMO -> getRanges ( ) , MMO -> getSyncScopeID ( ) , MMO -> getOrdering ( ) , MMO -> getFailureOrdering ( ) ) ; new_memops . push_back ( NewMMO ) ; KeepOld = false ; continue ; } } new_memops . push_back ( MMO ) ; } if ( ! KeepOld ) MI . setMemRefs ( MF , new_memops ) ; } } } unsigned AP = <NUM_LIT> ; if ( const MachineInstr * AI = getAlignaInstr ( MF ) ) AP = AI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; HMFI . setStackAlignBasePhysReg ( AP ) ;


<s> void <ISA_LIT>FrameLowering :: processFunctionBeforeFrameFinalized ( MachineFunction & MF , RegScavenger * RS ) const { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool NeedsAlign = ( MFI . getMaxAlign ( ) > getStackAlign ( ) ) ; if ( ! HasAlloca || ! NeedsAlign ) return ; SmallSet < int , <NUM_LIT> > DealignSlots ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; unsigned A = std :: max ( MFI . getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI . setObjectAlignment ( i , <NUM_LIT> ) ; LFS = alignTo ( LFS + S , A ) ; MFI . mapLocalFrameObject ( i , - static_cast < int64_t > ( LFS ) ) ; DealignSlots . insert ( i ) ; } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI : BB ) { bool KeepOld = true ; ArrayRef < MachineMemOperand * > memops = MI . memoperands ( ) ; SmallVector < MachineMemOperand * , <NUM_LIT> > new_memops ; for ( MachineMemOperand * MMO : memops ) { auto * PV = MMO -> getPseudoValue ( ) ; if ( auto * FS = dyn_cast_or_null < FixedStackPseudoSourceValue > ( PV ) ) { int FI = FS -> getFrameIndex ( ) ; if ( DealignSlots . count ( FI ) ) { unsigned A = MFI . getObjectAlignment ( FI ) ; auto * NewMMO = MF . getMachineMemOperand ( MMO -> getPointerInfo ( ) , MMO -> getFlags ( ) , MMO -> getSize ( ) , A , MMO -> getAAInfo ( ) , MMO -> getRanges ( ) , MMO -> getSyncScopeID ( ) , MMO -> getOrdering ( ) , MMO -> getFailureOrdering ( ) ) ; new_memops . push_back ( NewMMO ) ; KeepOld = false ; continue ; } } new_memops . push_back ( MMO ) ; } if ( ! KeepOld ) MI . setMemRefs ( MF , new_memops ) ; } } }


<s> Register DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ;

BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ;


<s> unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; B . erase ( It ) ;


<s> unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; LoadOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . cloneMemRefs ( * MI ) ; B . erase ( It ) ; return true ;


<s> if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; Register DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; Register DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ;

unsigned HasAlign = MFI . getObjectAlignment ( FI ) ;


<s> Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ;


<s> bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ;


<s> LPR . addLiveIns ( B ) ; SmallVector < std :: pair < MCPhysReg , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; Register SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; } if ( LPR . contains ( SrcHi ) ) { StoreOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( Size ) . addReg ( SrcHi , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; } B . erase ( It ) ; return true ;


<s> if ( ! HasAlloca || ! NeedsAlign ) return ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; unsigned A = std :: max ( MFI . getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI . setObjectAlignment ( i , <NUM_LIT> ) ;


<s> if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ; int RealOffset = Offset ; if ( ! UseFP && ! UseAP ) RealOffset = FrameSize + Offset ;

return StackOffset :: getFixed ( RealOffset ) ;


<s> bool <ISA_LIT>FrameLowering :: hasTailCall ( MachineBasicBlock & MBB ) const {

MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ;


<s> MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ; unsigned RetOpcode = MBBI -> getOpcode ( ) ;

return RetOpcode == <STR_LIT> || RetOpcode == <STR_LIT> ; }


<s> void <ISA_LIT>FrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; SavedRegs . resize ( HRI . getNumRegs ( ) ) ; if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) for ( const MCPhysReg * R = HRI . getCalleeSavedRegs ( & MF ) ; * R ; ++ R ) SavedRegs . set ( * R ) ; SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) ) { MachineFrameInfo & MFI = * MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto * RC : SpillRCs ) {

if ( ! needToReserveScavengingSpillSlots ( MF , HRI , RC ) ) continue ;


<s> SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) ) { MachineFrameInfo & MFI = * MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto * RC : SpillRCs ) { if ( ! needToReserveScavengingSpillSlots ( MF , HRI , RC ) ) continue ; unsigned Num = RC == & <STR_LIT> ? NumberScavengerSlots : <NUM_LIT> ; unsigned S = RC -> getSize ( ) , A = RC -> getAlignment ( ) ;

for ( unsigned i = <NUM_LIT> ; i < Num ; i ++ ) {


<s> auto & HST = static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; auto & HRI = * HST . getRegisterInfo ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; bool PrologueStubs = false ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI , PrologueStubs ) ; insertPrologueInBlock ( * PrologB , PrologueStubs ) ; if ( EpilogB ) { insertCSRRestoresInBlock ( * EpilogB , CSI , HRI ) ; insertEpilogueInBlock ( * EpilogB ) ; } else { for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertCSRRestoresInBlock ( B , CSI , HRI ) ; for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertEpilogueInBlock ( B ) ; for ( auto & B : MF ) { if ( B . empty ( ) ) continue ; MachineInstr * RetI = getReturn ( B ) ; if ( ! RetI || isRestoreCall ( RetI -> getOpcode ( ) ) ) continue ; for ( auto & R : CSI ) RetI -> addOperand ( MachineOperand :: CreateReg ( R . getReg ( ) , false , true ) ) ; } } if ( EpilogB ) { unsigned MaxBN = <NUM_LIT> ; for ( auto & B : MF ) if ( B . getNumber ( ) >= <NUM_LIT> ) MaxBN = std :: max ( MaxBN , unsigned ( B . getNumber ( ) ) ) ; BitVector DoneT ( MaxBN + <NUM_LIT> ) , DoneF ( MaxBN + <NUM_LIT> ) , Path ( MaxBN + <NUM_LIT> ) ; updateExitPaths ( * EpilogB , EpilogB , DoneT , DoneF , Path ) ;


<s> unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ;


<s> assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ;


<s> MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ;

else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ;


<s> else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ;

BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ;


<s> auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = * MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ;


<s> if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( Size ) . addReg ( SrcHi , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return true ;


<s> unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ;


<s> MDT . runOnMachineFunction ( MF ) ; MachinePostDominatorTree MPT ; MPT . runOnMachineFunction ( MF ) ; typedef DenseMap < unsigned , unsigned > UnsignedMap ; UnsignedMap RPO ; typedef ReversePostOrderTraversal < const MachineFunction * > RPOTType ; RPOTType RPOT ( & MF ) ; unsigned RPON = <NUM_LIT> ; for ( RPOTType :: rpo_iterator I = RPOT . begin ( ) , E = RPOT . end ( ) ; I != E ; ++ I ) RPO [ ( * I ) -> getNumber ( ) ] = RPON ++ ; for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber ( ) ] ;

for ( auto SI = I . succ_begin ( ) , SE = I . succ_end ( ) ; SI != SE ; ++ SI ) {


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; int Offset = MFI . getObjectOffset ( FI ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; unsigned SP = HRI . getStackRegister ( ) , FP = HRI . getFrameRegister ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AP = HMFI . getStackAlignBasePhysReg ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ;


<s> auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AP = HMFI . getStackAlignBasePhysReg ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ;


<s> bool HasPrealloc = const_cast < MachineFrameInfo & > ( MFI ) . getLocalFrameObjectCount ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) return true ; if ( ( HasFixed || HasPrealloc ) && ( HasAlloca || HasExtraAlign ) ) return true ; if ( MFI . getStackSize ( ) > <NUM_LIT> ) { if ( EnableStackOVFSanitizer || UseAllocframe ) return true ; } if ( MFI . hasCalls ( ) || MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasClobberLR ( ) ) return true ; return false ;


<s> static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( ) , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ;

BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffReg ) ) ;


<s> BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( ) , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffReg ) ) ; } else { unsigned HiReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned LoReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned HiDwarfReg = HRI . getDwarfRegNum ( HiReg , true ) ; unsigned LoDwarfReg = HRI . getDwarfRegNum ( LoReg , true ) ; auto OffHi = MCCFIInstruction :: createOffset ( FrameLabel , HiDwarfReg , Offset + <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffHi ) ) ;

auto OffLo = MCCFIInstruction :: createOffset ( FrameLabel , LoDwarfReg , Offset ) ;


<s> SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . getRelocationModel ( ) == Reloc :: PIC_ ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : MBB . getLastNonDebugInstr ( ) -> getDebugLoc ( ) ; MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ;

DeallocCall -> copyImplicitOps ( MF , * It ) ;


<s> } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , CSI , true , false ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; HII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC , & HRI ) ;


<s> unsigned MaxReg = getMaxCalleeSavedReg ( CSI , HRI ) ; bool StkOvrFlowEnabled = EnableStackOVFSanitizer ; const char * SpillFun = getSpillFunctionFor ( MaxReg , SK_ToMem , StkOvrFlowEnabled ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . getRelocationModel ( ) == Reloc :: PIC_ ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; unsigned SpillOpc ; if ( StkOvrFlowEnabled ) SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; MachineInstr * SaveRegsCall = BuildMI ( MBB , MI , DL , HII . get ( SpillOpc ) ) . addExternalSymbol ( SpillFun ) ; addCalleeSaveRegistersAsImpOperand ( SaveRegsCall , CSI , false , true ) ; for ( unsigned I = <NUM_LIT> ; I < CSI . size ( ) ; ++ I ) MBB . addLiveIn ( CSI [ I ] . getReg ( ) ) ; return true ;


<s> if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> || COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ; NewI -> copyImplicitOps ( MF , * RetI ) ;


<s> auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; DebugLoc dl ; unsigned MaxAlign = std :: max ( MFI -> getMaxAlignment ( ) , getStackAlignment ( ) ) ; unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned MaxCFA = alignTo ( MFI -> getMaxCallFrameSize ( ) , MaxAlign ) ; MFI -> setMaxCallFrameSize ( MaxCFA ) ; FrameSize = MaxCFA + alignTo ( FrameSize , MaxAlign ) ; MFI -> setStackSize ( FrameSize ) ; bool AlignStack = ( MaxAlign > getStackAlignment ( ) ) ; unsigned NumBytes = MFI -> getStackSize ( ) ; unsigned SP = HRI . getStackRegister ( ) ; unsigned MaxCF = MFI -> getMaxCallFrameSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; auto * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; auto & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( auto MI : AdjustRegs ) { assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; expandAlloca ( MI , HII , SP , MaxCF ) ; MI -> eraseFromParent ( ) ; }


<s> switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ; } return false ;


<s> unsigned LFS = MFI -> getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI -> getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI -> isSpillSlotObjectIndex ( i ) || MFI -> isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI -> getObjectSize ( i ) ; unsigned A = std :: max ( MFI -> getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI -> setObjectAlignment ( i , <NUM_LIT> ) ; LFS = alignTo ( LFS + S , A ) ; MFI -> mapLocalFrameObject ( i , - LFS ) ;


<s> Path [ BN ] = true ; bool ReachedExit = false ; for ( auto & SB : MBB . successors ( ) ) ReachedExit |= updateExitPaths ( * SB , RestoreB , DoneT , DoneF , Path ) ; if ( ! MBB . empty ( ) && MBB . back ( ) . isReturn ( ) ) { MachineInstr & RetI = MBB . back ( ) ; if ( ! isRestoreCall ( RetI . getOpcode ( ) ) ) for ( auto & R : CSI ) RetI . addOperand ( MachineOperand :: CreateReg ( R . getReg ( ) , false , true ) ) ; ReachedExit = true ;


<s> bool HasReplacedPseudoInst = replacePseudoRegTransferCode ( MF ) ; if ( HasReplacedPseudoInst && needToReserveScavengingSpillSlots ( MF , HRI ) ) { MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; for ( int i = <NUM_LIT> ; i < NumberScavengerSlots ; i ++ ) RS -> addScavengingFrameIndex ( MFI -> CreateSpillStackObject ( RC . getSize ( ) , RC . getAlignment ( ) ) ) ;


<s> static bool findAvailableReg ( int FI , MachineBasicBlock :: iterator It , MachineBasicBlock :: iterator End , unsigned * AvailReg , unsigned * NumUses , const TargetRegisterInfo * TRI , RegScavenger * Scavenger ) { assert ( Scavenger -> getCurrentPosition ( ) == It && <STR_LIT> ) ; BitVector Avail ( Scavenger -> getRegsAvailable ( & <STR_LIT> ) ) ; if ( Avail . none ( ) ) return false ; BitVector AvailByLastLoad ( Avail . size ( ) ) ; while ( ++ It != End ) { MachineInstr * MI = It ; if ( MI -> isDebugValue ( ) ) continue ; int Reg = Avail . find_first ( ) ; while ( Reg != - <NUM_LIT> ) { if ( MI -> modifiesRegister ( Reg , TRI ) ) Avail [ Reg ] = false ; else assert ( ! MI -> readsRegister ( Reg , TRI ) && <STR_LIT> ) ; Reg = Avail . find_next ( Reg ) ; } int Opc = MI -> getOpcode ( ) ; if ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) == FI ) break ; if ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) == FI && ! MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ) { AvailByLastLoad = Avail ; ++ ( * NumUses ) ; } if ( AvailByLastLoad . none ( ) && Avail . none ( ) ) break ; } if ( AvailByLastLoad . none ( ) ) return false ; * AvailReg = ( unsigned ) AvailByLastLoad . find_first ( ) ;


<s> expandAlloca ( MI , HII , SP , MaxCF ) ; MI -> eraseFromParent ( ) ; } if ( ! hasFP ( MF ) ) return ; const unsigned int ALLOCFRAME_MAX = <NUM_LIT> ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo ( ) , MachineMemOperand :: MOStore , <NUM_LIT> , <NUM_LIT> ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ; unsigned CallerSavedReg = HRI . getFirstCallerSavedNonParamReg ( ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , CallerSavedReg ) . addImm ( NumBytes ) ;

BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( CallerSavedReg ) ;


<s> bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { const unsigned * SuperRegNext = TRI -> getSuperRegisters ( CSI [ i + <NUM_LIT> ] . getReg ( ) ) ; assert ( SuperRegNext [ <NUM_LIT> ] && ! SuperRegNext [ <NUM_LIT> ] && <STR_LIT> ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg [ <NUM_LIT> ] ) ; CanUseDblLoad = ( SuperRegNext [ <NUM_LIT> ] == SuperReg [ <NUM_LIT> ] ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg [ <NUM_LIT> ] , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg [ <NUM_LIT> ] ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . loadRegFromStackSlot ( MBB , MI , Reg , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg ) ; }


<s> assert ( SuperRegNext [ <NUM_LIT> ] && ! SuperRegNext [ <NUM_LIT> ] && <STR_LIT> ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg [ <NUM_LIT> ] ) ; CanUseDblStore = ( SuperRegNext [ <NUM_LIT> ] == SuperReg [ <NUM_LIT> ] ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg [ <NUM_LIT> ] , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg [ <NUM_LIT> ] ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . storeRegToStackSlot ( MBB , MI , Reg , true , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg ) ; } } return true ;


<s> bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandSpillMacros ( MachineFunction & MF , SmallVectorImpl < unsigned > & NewRegs ) const ; unsigned findPhysReg ( MachineFunction & MF , <ISA_LIT>BlockRanges :: IndexRange & FIR , <ISA_LIT>BlockRanges :: InstrIndexMap & IndexMap , <ISA_LIT>BlockRanges :: RegToRangeMap & DeadMap , const TargetRegisterClass * RC ) const ; void optimizeSpillSlots ( MachineFunction & MF , SmallVectorImpl < unsigned > & VRegs ) const ;

void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ;


<s> } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; } if ( LPR . contains ( SrcHi ) ) {

StoreOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ;


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { auto & HST = static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; auto & HRI = * HST . getRegisterInfo ( ) ; assert ( & MF . front ( ) == & MBB && <STR_LIT> ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI ) ; insertPrologueInBlock ( * PrologB ) ; if ( EpilogB ) { insertCSRRestoresInBlock ( * EpilogB , CSI , HRI ) ;


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI ) ; insertPrologueInBlock ( * PrologB ) ; if ( EpilogB ) {

insertCSRRestoresInBlock ( * EpilogB , CSI , HRI ) ;


<s> inline static bool isMinSize ( const MachineFunction & MF ) {

AttributeSet AF = MF . getFunction ( ) -> getAttributes ( ) ;


<s> bool IsCurrentRegUsed = false ; for ( MCRegAliasIterator AI ( FreeReg , & HRI , false ) ; AI . isValid ( ) ; ++ AI ) if ( MRI . isPhysRegUsed ( * AI ) ) {


<s> MCPhysReg FreeReg = * CallerSavedRegs ; if ( MRI . isPhysRegUsed ( FreeReg ) ) continue ; bool IsCurrentRegUsed = false ; for ( MCRegAliasIterator AI ( FreeReg , & HRI , false ) ; AI . isValid ( ) ; ++ AI ) if ( MRI . isPhysRegUsed ( * AI ) ) { IsCurrentRegUsed = true ; break ; } if ( IsCurrentRegUsed ) continue ; return false ; }


<s> ++ CSRegs ) if ( ! MRI . isPhysRegUsed ( * CSRegs ) ) MRI . setPhysRegUsed ( * CSRegs ) ; } const TargetRegisterClass & RC = <STR_LIT> ; bool HasReplacedPseudoInst = replacePredRegPseudoSpillCode ( MF ) ; if ( HasReplacedPseudoInst && needToReserveScavengingSpillSlots ( MF , HRI ) ) { MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; for ( int i = <NUM_LIT> ; i < NumberScavengerSlots ; i ++ ) RS -> addScavengingFrameIndex ( MFI -> CreateSpillStackObject ( RC . getSize ( ) , RC . getAlignment ( ) ) ) ; }


<s> if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ; } else { MachineBasicBlock :: iterator Term = MBB . getFirstTerminator ( ) ; MachineBasicBlock :: iterator I = Term == MBB . begin ( ) ? MBB . end ( ) : std :: prev ( Term ) ; if ( I != MBB . end ( ) && I -> getOpcode ( ) == <STR_LIT> ) return ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ;


<s> bool <ISA_LIT>FrameLowering :: hasTailCall ( MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ;

unsigned RetOpcode = MBBI -> getOpcode ( ) ;


<s> MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ;

unsigned HasAlign = MFI . getObjectAlignment ( FI ) ;


<s> if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ;


<s> unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( Size ) . addReg ( SrcHi , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return true ;


<s> bool hasTailCall ( const MachineBasicBlock & MBB ) { MachineBasicBlock :: const_iterator I = MBB . getLastNonDebugInstr ( ) ;


<s> <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = find_if ( CSI , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffReg ) ) ; } else { unsigned HiReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned LoReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned HiDwarfReg = HRI . getDwarfRegNum ( HiReg , true ) ; unsigned LoDwarfReg = HRI . getDwarfRegNum ( LoReg , true ) ; auto OffHi = MCCFIInstruction :: createOffset ( FrameLabel , HiDwarfReg , Offset + <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffHi ) ) ;


<s> if ( MI -> isCall ( ) ) return true ; unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : return true ; default : break ; } for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( MO . isFI ( ) ) return true ; if ( ! MO . isReg ( ) ) continue ; unsigned R = MO . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( R ) ) return true ; for ( MCSubRegIterator S ( R , & HRI , true ) ; S . isValid ( ) ; ++ S ) if ( CSR [ * S ] ) return true ; }


<s> unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; } if ( LPR . contains ( SrcHi ) ) { StoreOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( Size ) . addReg ( SrcHi , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; }


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; LivePhysRegs LPR ( HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < unsigned , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ;

unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ;


<s> DebugLoc dl = MBBI -> getDebugLoc ( ) ; if ( hasFP ( MF ) || MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) { MachineBasicBlock :: iterator MBBI = prior ( MBB . end ( ) ) ; MachineBasicBlock :: iterator MBBI_end = MBB . end ( ) ; const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; return ; } if ( STI . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : prior ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ;

MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ;


<s> unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned TargetAlign = MF . getTarget ( ) . getSubtargetImpl ( ) -> getFrameLowering ( ) -> getStackAlignment ( ) ; unsigned maxCallFrameSize = MFI -> getMaxCallFrameSize ( ) ; if ( MFI -> hasVarSizedObjects ( ) ) maxCallFrameSize = RoundUpToAlignment ( maxCallFrameSize , TargetAlign ) ;

MFI -> setMaxCallFrameSize ( maxCallFrameSize ) ;


<s> DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; determineFrameLayout ( MF ) ; int NumBytes = ( int ) MFI -> getStackSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const std :: vector < MachineInstr * > & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( std :: vector < MachineInstr * > :: const_iterator i = AdjustRegs . begin ( ) , e = AdjustRegs . end ( ) ; i != e ; ++ i ) { MachineInstr * MI = * i ;

assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ;


<s> bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; Register SP = HRI . getStackRegister ( ) ; Register FP = HRI . getFrameRegister ( ) ; Register AP = HMFI . getStackAlignBasePhysReg ( ) ; if ( AP == <NUM_LIT> ) AP = FP ;


<s> auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = find_if ( CSI , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { Register FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ;

if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) {


<s> } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( llvm :: Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; unsigned AP = <NUM_LIT> ; if ( const MachineInstr * AI = getAlignaInstr ( MF ) ) AP = AI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;

HMFI . setStackAlignBasePhysReg ( AP ) ;


<s> } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( llvm :: Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; unsigned AP = <NUM_LIT> ; if ( const MachineInstr * AI = getAlignaInstr ( MF ) ) AP = AI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; HMFI . setStackAlignBasePhysReg ( AP ) ;


<s> MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , CSI , true , false ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; HII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC , & HRI ) ;


<s> if ( CSI . empty ( ) ) return false ; MachineBasicBlock :: iterator MI = MBB . getFirstTerminator ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; auto & HII = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ; if ( useRestoreFunction ( MF , CSI ) ) { bool HasTC = hasTailCall ( MBB ) || ! hasReturn ( MBB ) ; unsigned MaxR = getMaxCalleeSavedReg ( CSI , HRI ) ; SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ;

bool IsPIC = HTM . isPositionIndependent ( ) ;


<s> else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; MachineInstr * SaveRegsCall = BuildMI ( MBB , MI , DL , HII . get ( SpillOpc ) ) . addExternalSymbol ( SpillFun ) ; addCalleeSaveRegistersAsImpOperand ( SaveRegsCall , CSI , false , true ) ; for ( unsigned I = <NUM_LIT> ; I < CSI . size ( ) ; ++ I ) MBB . addLiveIn ( CSI [ I ] . getReg ( ) ) ; return true ; } for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; bool IsKill = ! HRI . isEHReturnCalleeSaveReg ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ;

HII . storeRegToStackSlot ( MBB , MI , Reg , IsKill , FI , RC , & HRI ) ;


<s> for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; MachineFrameInfo & MFI = * MF . getFrameInfo ( ) ; const TargetRegisterClass & IntRC = <STR_LIT> ; if ( SpillRCs . count ( & IntRC ) ) { for ( int i = <NUM_LIT> ; i < NumberScavengerSlots ; i ++ ) { int NewFI = MFI . CreateSpillStackObject ( IntRC . getSize ( ) , IntRC . getAlignment ( ) ) ; RS -> addScavengingFrameIndex ( NewFI ) ; } } for ( auto * RC : SpillRCs ) { if ( RC == & IntRC ) continue ; int NewFI = MFI . CreateSpillStackObject ( RC -> getSize ( ) , RC -> getAlignment ( ) ) ; RS -> addScavengingFrameIndex ( NewFI ) ; } } TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ;


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI ) ; insertPrologueInBlock ( * PrologB ) ; if ( EpilogB ) { insertCSRRestoresInBlock ( * EpilogB , CSI , HRI ) ; insertEpilogueInBlock ( * EpilogB ) ; } else { for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertCSRRestoresInBlock ( B , CSI , HRI ) ; for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertEpilogueInBlock ( B ) ; }


<s> insertEpilogueInBlock ( * EpilogB ) ; } else { for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertCSRRestoresInBlock ( B , CSI , HRI ) ; for ( auto & B : MF ) if ( B . isReturnBlock ( ) ) insertEpilogueInBlock ( B ) ; }


<s> MachineInstr * MI = & * I ; NextI = std :: next ( I ) ; unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case TargetOpcode :: COPY : Changed = expandCopy ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandStoreInt ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandLoadInt ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandStoreVecPred ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandLoadVecPred ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandLoadVec2 ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandStoreVec2 ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandStoreVec ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed = expandLoadVec ( B , I , MRI , HII , NewRegs ) ; break ; }


<s> unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , MaxR , true ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; HII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC , & HRI ) ; } return true ;


<s> MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , MaxR , true ) ;


<s> else if ( ! MBB . empty ( ) ) DL = std :: prev ( MBB . end ( ) ) -> getDebugLoc ( ) ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ; NewI -> copyImplicitOps ( MF , * RetI ) ; MBB . erase ( RetI ) ;


<s> ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ;

NewI -> copyImplicitOps ( MF , * RetI ) ;


<s> void <ISA_LIT>FrameLowering :: emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = std :: prev ( MBB . end ( ) ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; if ( hasFP ( MF ) || MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) { MachineBasicBlock :: iterator MBBI = std :: prev ( MBB . end ( ) ) ; MachineBasicBlock :: iterator MBBI_end = MBB . end ( ) ; const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ;


<s> int NumBytes = ( int ) MFI -> getStackSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const std :: vector < MachineInstr * > & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( std :: vector < MachineInstr * > :: const_iterator i = AdjustRegs . begin ( ) , e = AdjustRegs . end ( ) ; i != e ; ++ i ) { MachineInstr * MI = * i ; assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; MO . setImm ( MFI -> getMaxCallFrameSize ( ) ) ; } if ( hasFP ( MF ) ) { const int ALLOCFRAME_MAX = <NUM_LIT> ; const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , HEXAGON_RESERVED_REG_1 ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , QRI -> getStackRegister ( ) ) . addReg ( QRI -> getStackRegister ( ) ) . addReg ( HEXAGON_RESERVED_REG_1 ) ; } else { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( NumBytes ) ; } }


<s> } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const uint16_t * SuperReg = TRI -> getSuperRegisters ( Reg ) ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; assert ( SuperReg [ <NUM_LIT> ] && ! SuperReg [ <NUM_LIT> ] && <STR_LIT> ) ; bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { const uint16_t * SuperRegNext = TRI -> getSuperRegisters ( CSI [ i + <NUM_LIT> ] . getReg ( ) ) ; assert ( SuperRegNext [ <NUM_LIT> ] && ! SuperRegNext [ <NUM_LIT> ] && <STR_LIT> ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg [ <NUM_LIT> ] ) ; CanUseDblLoad = ( SuperRegNext [ <NUM_LIT> ] == SuperReg [ <NUM_LIT> ] ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg [ <NUM_LIT> ] , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg [ <NUM_LIT> ] ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . loadRegFromStackSlot ( MBB , MI , Reg , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg ) ; } } return true ;


<s> const TargetInstrInfo & TII = * MF -> getTarget ( ) . getInstrInfo ( ) ; if ( CSI . empty ( ) ) { return false ; } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const uint16_t * SuperReg = TRI -> getSuperRegisters ( Reg ) ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; assert ( SuperReg [ <NUM_LIT> ] && ! SuperReg [ <NUM_LIT> ] && <STR_LIT> ) ; bool CanUseDblLoad = false ;

if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) {


<s> for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const uint16_t * SuperReg = TRI -> getSuperRegisters ( Reg ) ; assert ( SuperReg [ <NUM_LIT> ] && ! SuperReg [ <NUM_LIT> ] && <STR_LIT> ) ; bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { const uint16_t * SuperRegNext = TRI -> getSuperRegisters ( CSI [ i + <NUM_LIT> ] . getReg ( ) ) ; assert ( SuperRegNext [ <NUM_LIT> ] && ! SuperRegNext [ <NUM_LIT> ] && <STR_LIT> ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg [ <NUM_LIT> ] ) ; CanUseDblStore = ( SuperRegNext [ <NUM_LIT> ] == SuperReg [ <NUM_LIT> ] ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg [ <NUM_LIT> ] , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg [ <NUM_LIT> ] ) ; ++ i ; } else { ContiguousRegs = false ;

const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ;


<s> if ( HasFP ) { unsigned DwFPReg = HRI . getDwarfRegNum ( HRI . getFrameRegister ( ) , true ) ; unsigned DwRAReg = HRI . getDwarfRegNum ( HRI . getRARegister ( ) , true ) ; auto DefCfa = MCCFIInstruction :: createDefCfa ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ;

auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool {


<s> bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void updateEntryPaths ( MachineFunction & MF , MachineBasicBlock & SaveB ) const ; bool updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock & RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandSpillMacros ( MachineFunction & MF , SmallVectorImpl < unsigned > & NewRegs ) const ; unsigned findPhysReg ( MachineFunction & MF , <ISA_LIT>BlockRanges :: IndexRange & FIR , <ISA_LIT>BlockRanges :: InstrIndexMap & IndexMap , <ISA_LIT>BlockRanges :: RegToRangeMap & DeadMap , const TargetRegisterClass * RC ) const ; void optimizeSpillSlots ( MachineFunction & MF , SmallVectorImpl < unsigned > & VRegs ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ; void addCalleeSaveRegistersAsImpOperand ( MachineInstr * MI , const CSIVect & CSI , bool IsDef , bool IsKill ) const ; bool shouldInlineCSR ( const MachineFunction & MF , const CSIVect & CSI ) const ; bool useSpillFunction ( const MachineFunction & MF , const CSIVect & CSI ) const ; bool useRestoreFunction ( const MachineFunction & MF , const CSIVect & CSI ) const ;

bool mayOverflowFrameOffset ( MachineFunction & MF ) const ;


<s> NumEntries = array_lengthof ( Offsets ) ; return Offsets ; } bool assignCalleeSavedSpillSlots ( MachineFunction & MF , const TargetRegisterInfo * TRI , std :: vector < CalleeSavedInfo > & CSI ) const override ; bool needsAligna ( const MachineFunction & MF ) const ; const MachineInstr * getAlignaInstr ( const MachineFunction & MF ) const ; void insertCFIInstructions ( MachineFunction & MF ) const ; private : typedef std :: vector < CalleeSavedInfo > CSIVect ; void expandAlloca ( MachineInstr * AI , const <ISA_LIT>InstrInfo & TII , unsigned SP , unsigned CF ) const ; void insertPrologueInBlock ( MachineBasicBlock & MBB , bool PrologueStubs ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; void insertAllocframe ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator InsertPt , unsigned NumBytes ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI , bool & PrologueStubs ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void updateEntryPaths ( MachineFunction & MF , MachineBasicBlock & SaveB ) const ; bool updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock & RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ;

bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ;


<s> MachineInstr * <ISA_LIT>FrameLowering :: getAlignaInstr ( MachineFunction & MF ) const {

for ( auto & B : MF ) for ( auto & I : B ) if ( I . getOpcode ( ) == <STR_LIT> ) return & I ;


<s> FrameReg = RI -> getFrameRegister ( MF ) ;

return MF . getFrameInfo ( ) -> getObjectOffset ( FI ) ;


<s> return MFI -> hasCalls ( ) || MFI -> getStackSize ( ) > <NUM_LIT> || FuncInfo -> hasClobberLR ( ) ;


<s> const <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;

return MFI -> hasCalls ( ) || MFI -> getStackSize ( ) > <NUM_LIT> || FuncInfo -> hasClobberLR ( ) ;


<s> explicit <ISA_LIT>FrameLowering ( ) : TargetFrameLowering ( StackGrowsDown , <NUM_LIT> , <NUM_LIT> ) {


<s> SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : MBB . getLastNonDebugInstr ( ) -> getDebugLoc ( ) ; MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , TII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , TII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , MaxR , true ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ;

TII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC , & HRI ) ;


<s> } for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; bool IsKill = ! HRI . isEHReturnCalleeSaveReg ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; TII . storeRegToStackSlot ( MBB , MI , Reg , IsKill , FI , RC , & HRI ) ; if ( IsKill ) MBB . addLiveIn ( Reg ) ; } return true ;


<s> MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ; NewI -> copyImplicitOps ( MF , RetI ) ; MBB . erase ( RetI ) ;


<s> bool HasAligna = ( MFI -> getMaxAlignment ( ) > getStackAlignment ( ) ) ; if ( ! HasAlloca || ! HasAligna ) return ; unsigned LFS = MFI -> getLocalFrameSize ( ) ; int Offset = - LFS ; for ( int i = <NUM_LIT> , e = MFI -> getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI -> isSpillSlotObjectIndex ( i ) || MFI -> isDeadObjectIndex ( i ) ) continue ; int S = MFI -> getObjectSize ( i ) ; LFS += S ; Offset -= S ; MFI -> mapLocalFrameObject ( i , Offset ) ; } MFI -> setLocalFrameSize ( LFS ) ; unsigned A = MFI -> getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI -> setLocalFrameMaxAlign ( <NUM_LIT> ) ; MFI -> setUseLocalStackAllocationBlock ( true ) ;


<s> unsigned LFS = MFI -> getLocalFrameSize ( ) ; int Offset = - LFS ; for ( int i = <NUM_LIT> , e = MFI -> getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI -> isSpillSlotObjectIndex ( i ) || MFI -> isDeadObjectIndex ( i ) ) continue ; int S = MFI -> getObjectSize ( i ) ; LFS += S ; Offset -= S ; MFI -> mapLocalFrameObject ( i , Offset ) ; } MFI -> setLocalFrameSize ( LFS ) ; unsigned A = MFI -> getLocalFrameMaxAlign ( ) ;

assert ( A <= <NUM_LIT> && <STR_LIT> ) ;


<s> MachineBasicBlock :: iterator NextII ; for ( MachineBasicBlock :: iterator MII = MBB -> begin ( ) ; MII != MBB -> end ( ) ; MII = NextII ) { MachineInstr * MI = MII ; NextII = std :: next ( MII ) ; int Opc = MI -> getOpcode ( ) ; if ( Opc == <STR_LIT> ) { HasReplacedPseudoInst = true ; unsigned VirtReg = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned SrcReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsOrigSrcRegKilled = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; assert ( <STR_LIT> . contains ( SrcReg ) && <STR_LIT> ) ; BuildMI ( * MBB , MII , MI -> getDebugLoc ( ) , HII . get ( <STR_LIT> ) , VirtReg ) . addReg ( SrcReg , getKillRegState ( IsOrigSrcRegKilled ) ) ; MI -> setDesc ( HII . get ( <STR_LIT> ) ) ; MI -> getOperand ( <NUM_LIT> ) . setReg ( VirtReg ) ; MI -> getOperand ( <NUM_LIT> ) . setIsKill ( ) ; } else if ( Opc == <STR_LIT> ) { MachineOperand & M0 = MI -> getOperand ( <NUM_LIT> ) ; if ( M0 . isDead ( ) ) { MBB -> erase ( MII ) ; continue ; } unsigned VirtReg = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned DestReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; assert ( <STR_LIT> . contains ( DestReg ) && <STR_LIT> ) ; MI -> setDesc ( HII . get ( <STR_LIT> ) ) ; MI -> getOperand ( <NUM_LIT> ) . setReg ( VirtReg ) ;

const MCInstrDesc & D = HII . get ( <STR_LIT> ) ;


<s> if ( ! EnableGatherPacketize ) return false ; auto & ST = Fn . getSubtarget < <ISA_LIT>Subtarget > ( ) ; bool HasV65 = ST . hasV65TOps ( ) ; bool UseHVX = ST . useHVXOps ( ) ; if ( ! ( HasV65 & UseHVX ) ) return false ; for ( auto & MBB : Fn ) { bool VtmpDef = false ; MachineBasicBlock :: iterator MII , MIE , DefMII ; for ( MII = MBB . begin ( ) , MIE = MBB . end ( ) ; MII != MIE ; ++ MII ) { MachineInstr & MI = * MII ; if ( VtmpDef ) { if ( ! isVtmpUse ( MI ) ) continue ; MBB . splice ( std :: next ( DefMII ) , & MBB , MII ) ; finalizeBundle ( MBB , DefMII . getInstrIterator ( ) , std :: next ( MII ) . getInstrIterator ( ) ) ; VtmpDef = false ; continue ; } if ( ! ( isVtmpDef ( MI ) ) ) continue ; VtmpDef = true ; DefMII = MII ; } assert ( ! VtmpDef && <STR_LIT> ) ; } return true ;


<s> FunctionPass * llvm :: create<ISA_LIT>GatherPacketize ( ) { return new <ISA_LIT>GatherPacketize ( ) ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> PassRegistry & Registry = * PassRegistry :: getPassRegistry ( ) ; initialize<ISA_LIT>GatherPacketizePass ( Registry ) ;


<s> static inline bool isVtmpDef ( const MachineInstr & MI ) {

for ( const MachineOperand & MO : MI . operands ( ) ) if ( MO . isReg ( ) && MO . isDef ( ) && MO . isImplicit ( ) && ( MO . getReg ( ) == <STR_LIT> ) ) {


<s> return ( MI . mayStore ( ) && ( MI . getOperand ( <NUM_LIT> ) ) . isReg ( ) && ( ( MI . getOperand ( <NUM_LIT> ) ) . getReg ( ) == <STR_LIT> ) ) ;


<s> for ( MII = MBB . begin ( ) , MIE = MBB . end ( ) ; MII != MIE ; ++ MII ) { MachineInstr & MI = * MII ; if ( VtmpDef ) { if ( ! isVtmpUse ( MI ) ) continue ; MBB . splice ( std :: next ( DefMII ) , & MBB , MII ) ;

finalizeBundle ( MBB , DefMII . getInstrIterator ( ) , std :: next ( MII ) . getInstrIterator ( ) ) ;


<s> virtual void getAnalysisUsage ( AnalysisUsage & AU ) const override { AU . addRequired < DominatorTreeWrapperPass > ( ) ; AU . addPreserved < DominatorTreeWrapperPass > ( ) ; AU . addPreserved < MachineFunctionAnalysis > ( ) ;

FunctionPass :: getAnalysisUsage ( AU ) ;


<s> virtual const char * getPassName ( ) const override { return <STR_LIT> ;


<s> bool Changed ; BasicBlock * Entry = GraphTraits < Function * > :: getEntryNode ( & F ) ; Changed = visitBlock ( Entry ) ; return Changed ;


<s> typedef GraphTraits < DomTreeNode * > GTN ; typedef GTN :: ChildIteratorType Iter ; for ( Iter I = GTN :: child_begin ( DTN ) , E = GTN :: child_end ( DTN ) ; I != E ; ++ I ) visitBlock ( ( * I ) -> getBlock ( ) ) ; bool HasCutoff = ExtractCutoff . getPosition ( ) ; unsigned Cutoff = ExtractCutoff ; bool Changed = false ; BasicBlock :: iterator I = std :: prev ( B -> end ( ) ) , NextI , Begin = B -> begin ( ) ; while ( true ) { if ( HasCutoff && ( ExtractCount >= Cutoff ) ) return Changed ; bool Last = ( I == Begin ) ;

if ( ! Last ) NextI = std :: prev ( I ) ;


<s> LogicalSR = false ; Match = match ( In , m_And ( m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = true ; CSR = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_Shl ( m_Value ( BF ) , m_ConstantInt ( CSL ) ) , m_ConstantInt ( CM ) ) ) ; if ( Match && NoSR0 ) return false ; } if ( ! Match ) { LogicalSR = true ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ;


<s> } if ( ! Match ) { LogicalSR = true ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ; CM = ConstantInt :: get ( Ctx , A ) ; } APInt M = CM -> getValue ( ) . lshr ( SL ) ; uint32_t T = M . countTrailingOnes ( ) ; uint32_t U = BW - std :: max ( SL , SR ) ; uint32_t W = std :: min ( U , T ) ; if ( W == <NUM_LIT> ) return false ; if ( ! LogicalSR ) { APInt C = APInt :: getHighBitsSet ( BW , BW - U ) ; if ( M . intersects ( C ) || ! M . isMask ( W ) ) return false ;


<s> BasicBlock :: iterator I = std :: prev ( B -> end ( ) ) , NextI , Begin = B -> begin ( ) ; while ( true ) { if ( HasCutoff && ( ExtractCount >= Cutoff ) ) return Changed ; bool Last = ( I == Begin ) ; if ( ! Last ) NextI = std :: prev ( I ) ;


<s> } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ; CM = ConstantInt :: get ( Ctx , A ) ; } APInt M = CM -> getValue ( ) . lshr ( SL ) ; uint32_t T = M . countTrailingOnes ( ) ; uint32_t U = BW - std :: max ( SL , SR ) ; uint32_t W = std :: min ( U , T ) ;


<s> AU . addPreserved < DominatorTreeWrapperPass > ( ) ;


<s> <ISA_LIT>GenExtract ( ) : FunctionPass ( ID ) {

initialize<ISA_LIT>GenExtractPass ( * PassRegistry :: getPassRegistry ( ) ) ;