<s> SDNode * IsIntrinsic = N -> getOperand ( <NUM_LIT> ) . getNode ( ) ; if ( ( IsIntrinsic -> getOpcode ( ) == <STR_LIT> ) ) { unsigned ID = cast < ConstantSDNode > ( IsIntrinsic -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( doesIntrinsicReturnPredicate ( ID ) ) { if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ;

SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ;


<s> inline SDValue XformSToSM2Imm ( unsigned Imm ) { return CurDAG -> getTargetConstant ( Imm - <NUM_LIT> , <STR_LIT> ) ;


<s> inline SDValue XformSToSM3Imm ( unsigned Imm ) {

return CurDAG -> getTargetConstant ( Imm - <NUM_LIT> , <STR_LIT> ) ;


<s> static bool Compare ( const WeightedLeaf & A , const WeightedLeaf & B ) { assert ( A . Value . getNode ( ) && B . Value . getNode ( ) ) ; return A . Weight == B . Weight ? ( A . InsertionOrder > B . InsertionOrder ) :


<s> EVT T = Opc == <STR_LIT> ? N . getOperand ( <NUM_LIT> ) . getValueType ( ) : cast < VTSDNode > ( N . getOperand ( <NUM_LIT> ) ) -> getVT ( ) ; unsigned SW = T . getSizeInBits ( ) ; if ( SW == <NUM_LIT> ) R = N . getOperand ( <NUM_LIT> ) ; else if ( SW < <NUM_LIT> ) R = N ; else return false ; break ; } case <STR_LIT> : { LoadSDNode * L = cast < LoadSDNode > ( N ) ; if ( L -> getExtensionType ( ) != <STR_LIT> ) return false ; if ( L -> getMemoryVT ( ) . getSizeInBits ( ) > <NUM_LIT> ) return false ; R = N ; break ; } case <STR_LIT> : { auto * S = dyn_cast < ConstantSDNode > ( N . getOperand ( <NUM_LIT> ) ) ; if ( ! S || S -> getZExtValue ( ) != <NUM_LIT> ) return false ; R = N ; break ; } default : return false ; } EVT RT = R . getValueType ( ) ; if ( RT == <STR_LIT> ) return true ; assert ( RT == <STR_LIT> ) ; const SDLoc & dl ( N ) ; SDValue Ops [ ] = {

CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) , R , CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) , R , CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) } ;


<s> MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ;

Align EntryMaxA = MFI . getMaxAlign ( ) ;


<s> auto & HST = MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HFI = * HST . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ; MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; Align EntryMaxA = MFI . getMaxAlign ( ) ;

BuildMI ( EntryBB , DebugLoc ( ) , HII -> get ( <STR_LIT> ) , AR ) . addImm ( EntryMaxA . value ( ) ) ;


<s> return ( ! HaveConst && Q . empty ( ) ) ;


<s> SDValue <ISA_LIT>DAGToDAGISel :: factorOutPowerOf2 ( SDValue V , unsigned Power ) { SDValue Ops [ ] = { V . getOperand ( <NUM_LIT> ) , V . getOperand ( <NUM_LIT> ) } ; if ( V . getOpcode ( ) == <STR_LIT> ) { for ( int i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) { if ( isa < ConstantSDNode > ( Ops [ i ] . getNode ( ) ) && V . getConstantOperandVal ( i ) % ( ( uint64_t ) <NUM_LIT> << Power ) == <NUM_LIT> ) { uint64_t NewConst = V . getConstantOperandVal ( i ) >> Power ; if ( NewConst == <NUM_LIT> ) return Ops [ ! i ] ; Ops [ i ] = CurDAG -> getConstant ( NewConst , SDLoc ( V ) , V . getValueType ( ) ) ; break ; } } } else if ( V . getOpcode ( ) == <STR_LIT> ) { uint64_t ShiftAmount = V . getConstantOperandVal ( <NUM_LIT> ) ;

if ( ShiftAmount == Power ) return Ops [ <NUM_LIT> ] ;


<s> if ( Val . getOpcode ( ) != <STR_LIT> || ! isa < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) || Val . getConstantOperandVal ( <NUM_LIT> ) > <NUM_LIT> ) continue ; if ( ! Result . Value . getNode ( ) || Result . Weight > L . Weight || ( Result . Weight == L . Weight && Result . InsertionOrder > L . InsertionOrder ) ) { Result = L ; ResultPos = Pos ; } } if ( Result . Value . getNode ( ) ) { Q . erase ( & Q [ ResultPos ] ) ; std :: make_heap ( Q . begin ( ) , Q . end ( ) , WeightedLeaf :: Compare ) ; } return Result ;


<s> const WeightedLeaf & L = Q [ Pos ] ; const SDValue & Val = L . Value ; if ( Val . getOpcode ( ) != <STR_LIT> || ! isa < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) || Val . getConstantOperandVal ( <NUM_LIT> ) > MaxAmount ) continue ; if ( ! Result . Value . getNode ( ) || Result . Weight > L . Weight || ( Result . Weight == L . Weight && Result . InsertionOrder > L . InsertionOrder ) ) { Result = L ; ResultPos = Pos ; } } if ( Result . Value . getNode ( ) ) { Q . erase ( & Q [ ResultPos ] ) ; std :: make_heap ( Q . begin ( ) , Q . end ( ) , WeightedLeaf :: Compare ) ; }


<s> if ( ! isOpcodeHandled ( N ) ) return <NUM_LIT> ;

assert ( RootWeights . count ( N ) && RootWeights [ N ] >= <NUM_LIT> && <STR_LIT> ) ;


<s> uint64_t MulFactor = <NUM_LIT> << N -> getConstantOperandVal ( <NUM_LIT> ) ;

return CurDAG -> getConstant ( MulFactor , SDLoc ( N ) , N -> getOperand ( <NUM_LIT> ) . getValueType ( ) ) ;


<s> unsigned <ISA_LIT>DAGToDAGISel :: getUsesInFunction ( const Value * V ) { if ( GAUsesInFunction . count ( V ) ) return GAUsesInFunction [ V ] ; unsigned Result = <NUM_LIT> ; const Function & CurF = CurDAG -> getMachineFunction ( ) . getFunction ( ) ; for ( const User * U : V -> users ( ) ) {

if ( isa < Instruction > ( U ) && cast < Instruction > ( U ) -> getParent ( ) -> getParent ( ) == & CurF ) ++ Result ;


<s> return ! CheckSingleUse || N -> hasOneUse ( ) ;


<s> SDNode * UUse = * U -> use_begin ( ) ; if ( UUse -> getNumValues ( ) != <NUM_LIT> ) return false ; SDNode * SYNode = SY . getNode ( ) ; if ( UUse -> getOpcode ( ) == <STR_LIT> && SYNode -> getOpcode ( ) == <STR_LIT> ) { SDValue LDBasePtr = cast < MemSDNode > ( SYNode ) -> getBasePtr ( ) ;

SDValue STBasePtr = cast < MemSDNode > ( UUse ) -> getBasePtr ( ) ;


<s> return true ; case <STR_LIT> : return isa < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ;


<s> } if ( N -> getOpcode ( ) == <STR_LIT> ) {

const VTSDNode * VN = dyn_cast < const VTSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ;


<s> static bool isTargetConstant ( const SDValue & V ) { return V . getOpcode ( ) == <STR_LIT> || V . getOpcode ( ) == <STR_LIT> ;


<s> } break ; } case <STR_LIT> : case <STR_LIT> : { uint64_t Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( ( C -> getZExtValue ( ) & Mask ) == <NUM_LIT> ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( ( C -> getZExtValue ( ) & Mask ) == <NUM_LIT> ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } break ; } default : break ; }


<s> HaveConst ( false ) , Opcode ( Opcode ) {


<s> static std :: map < unsigned , unsigned > LoadPciMap = { { <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> } , { <STR_LIT> , <STR_LIT> } , } ; auto FLC = LoadPciMap . find ( IntNo ) ; if ( FLC != LoadPciMap . end ( ) ) { EVT ValTy = ( IntNo == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; EVT RTys [ ] = { ValTy , <STR_LIT> , <STR_LIT> } ; auto Inc = cast < ConstantSDNode > ( IntN -> getOperand ( <NUM_LIT> ) ) ; SDValue I = CurDAG -> getTargetConstant ( Inc -> getSExtValue ( ) , dl , <STR_LIT> ) ; MachineSDNode * Res = CurDAG -> getMachineNode ( FLC -> second , dl , RTys , { IntN -> getOperand ( <NUM_LIT> ) , I , IntN -> getOperand ( <NUM_LIT> ) , IntN -> getOperand ( <NUM_LIT> ) } ) ; return Res ;


<s> } std :: pop_heap ( Q . begin ( ) , Q . end ( ) , WeightedLeaf :: Compare ) ;


<s> HaveConst = false ; return ConstElt ; }

std :: pop_heap ( Q . begin ( ) , Q . end ( ) , WeightedLeaf :: Compare ) ;


<s> if ( Off . getOpcode ( ) != <STR_LIT> ) continue ; SDValue T0 = Off . getOperand ( <NUM_LIT> ) ; if ( T0 . getOpcode ( ) != <STR_LIT> ) continue ; SDValue T1 = T0 . getOperand ( <NUM_LIT> ) ; SDValue T2 = T0 . getOperand ( <NUM_LIT> ) ; if ( T1 . getOpcode ( ) != <STR_LIT> ) continue ; SDValue C = T1 . getOperand ( <NUM_LIT> ) ; ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( C . getNode ( ) ) ; if ( CN == nullptr ) continue ; unsigned CV = CN -> getZExtValue ( ) ; if ( CV > <NUM_LIT> ) continue ; ConstantSDNode * EN = dyn_cast < ConstantSDNode > ( T2 . getNode ( ) ) ; if ( EN == nullptr ) continue ; unsigned EV = EN -> getZExtValue ( ) ; if ( EV % ( <NUM_LIT> << CV ) != <NUM_LIT> ) continue ;

unsigned DV = EV / ( <NUM_LIT> << CV ) ;


<s> ConstantSDNode * SN = dyn_cast < ConstantSDNode > ( S . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; if ( SN == nullptr ) continue ; if ( SN -> getAPIntValue ( ) . getBitWidth ( ) != <NUM_LIT> ) continue ; uint32_t CV = SN -> getZExtValue ( ) ; ConstantSDNode * MN = dyn_cast < ConstantSDNode > ( T0 . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; if ( MN == nullptr ) continue ; if ( MN -> getAPIntValue ( ) . getBitWidth ( ) != <NUM_LIT> ) continue ; uint32_t Mask = MN -> getZExtValue ( ) ; uint32_t TZ = countTrailingZeros ( Mask ) ; uint32_t M1 = countTrailingOnes ( Mask >> TZ ) ; uint32_t LZ = countLeadingZeros ( Mask ) ; if ( TZ + M1 + LZ != <NUM_LIT> ) continue ;


<s> EVT BVT = Ops [ I1N ] . getValueType ( ) ; const SDLoc & dl ( U ) ; SDValue C0 = DAG . getConstant ( <NUM_LIT> , dl , BVT ) ; SDValue C1 = DAG . getConstant ( <NUM_LIT> , dl , BVT ) ; SDValue If0 , If1 ; if ( isa < MachineSDNode > ( U ) ) { unsigned UseOpc = U -> getMachineOpcode ( ) ; Ops [ I1N ] = C0 ; If0 = SDValue ( DAG . getMachineNode ( UseOpc , dl , UVT , Ops ) , <NUM_LIT> ) ; Ops [ I1N ] = C1 ; If1 = SDValue ( DAG . getMachineNode ( UseOpc , dl , UVT , Ops ) , <NUM_LIT> ) ; } else { unsigned UseOpc = U -> getOpcode ( ) ; Ops [ I1N ] = C0 ; If0 = DAG . getNode ( UseOpc , dl , UVT , Ops ) ; Ops [ I1N ] = C1 ; If1 = DAG . getNode ( UseOpc , dl , UVT , Ops ) ; } unsigned UW = UVT . getSizeInBits ( ) ; EVT SVT = ( UW == <NUM_LIT> || UW == <NUM_LIT> ) ? <STR_LIT> ( UW ) : UVT ; SDValue Sel = DAG . getNode ( <STR_LIT> , dl , SVT , OpI1 , DAG . getBitcast ( SVT , If1 ) , DAG . getBitcast ( SVT , If0 ) ) ; SDValue Ret = DAG . getBitcast ( UVT , Sel ) ; DAG . ReplaceAllUsesWith ( U , Ret . getNode ( ) ) ; }


<s> return false ; } ; auto IsSelect0 = [ IsZero ] ( const SDValue & Op ) -> bool { if ( Op . getOpcode ( ) != <STR_LIT> ) return false ; return IsZero ( Op . getOperand ( <NUM_LIT> ) ) || IsZero ( Op . getOperand ( <NUM_LIT> ) ) ; } ; SDValue N0 = I -> getOperand ( <NUM_LIT> ) , N1 = I -> getOperand ( <NUM_LIT> ) ; EVT VT = I -> getValueType ( <NUM_LIT> ) ; bool SelN0 = IsSelect0 ( N0 ) ; SDValue SOp = SelN0 ? N0 : N1 ; SDValue VOp = SelN0 ? N1 : N0 ; if ( SOp . getOpcode ( ) == <STR_LIT> && SOp . getNode ( ) -> hasOneUse ( ) ) { SDValue SC = SOp . getOperand ( <NUM_LIT> ) ; SDValue SX = SOp . getOperand ( <NUM_LIT> ) ; SDValue SY = SOp . getOperand ( <NUM_LIT> ) ; SDLoc DLS = SOp ; if ( IsZero ( SY ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SX , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , NewOr , VOp ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ; } else if ( IsZero ( SX ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SY , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , VOp , NewOr ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ;


<s> void <ISA_LIT>DAGToDAGISel :: PreprocessISelDAG ( ) { auto getNodes = [ this ] ( ) -> std :: vector < SDNode * > { std :: vector < SDNode * > T ; T . reserve ( CurDAG -> allnodes_size ( ) ) ; for ( SDNode & N : CurDAG -> allnodes ( ) ) T . push_back ( & N ) ; return T ; } ; ppSimplifyOrSelect0 ( getNodes ( ) ) ; ppAddrReorderAddShl ( getNodes ( ) ) ; ppAddrRewriteAndSrl ( getNodes ( ) ) ; ppHoistZextI1 ( getNodes ( ) ) ; DEBUG_WITH_TYPE ( <STR_LIT> , {


<s> void push ( WeightedLeaf L , bool SeparateConst = true ) { if ( ! HaveConst && SeparateConst && isa < ConstantSDNode > ( L . Value ) ) { if ( Opcode == <STR_LIT> && cast < ConstantSDNode > ( L . Value ) -> getSExtValue ( ) == <NUM_LIT> ) return ; if ( Opcode == <STR_LIT> && cast < ConstantSDNode > ( L . Value ) -> getSExtValue ( ) == <NUM_LIT> ) return ; HaveConst = true ; ConstElt = L ; } else { Q . push_back ( L ) ;

std :: push_heap ( Q . begin ( ) , Q . end ( ) , WeightedLeaf :: Compare ) ;


<s> if ( ! HaveConst && SeparateConst && isa < ConstantSDNode > ( L . Value ) ) {

if ( Opcode == <STR_LIT> && cast < ConstantSDNode > ( L . Value ) -> getSExtValue ( ) == <NUM_LIT> ) return ;


<s> L . Weight = <NUM_LIT> ; push ( L , false ) ;


<s> SDValue NewBasePtr = balanceSubTree ( BasePtr . getNode ( ) , true ) ; if ( N -> getOpcode ( ) == <STR_LIT> ) N = CurDAG -> UpdateNodeOperands ( N , N -> getOperand ( <NUM_LIT> ) , NewBasePtr , N -> getOperand ( <NUM_LIT> ) ) ; else N = CurDAG -> UpdateNodeOperands ( N , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , NewBasePtr , N -> getOperand ( <NUM_LIT> ) ) ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( N -> dump ( CurDAG ) ) ; } CurDAG -> RemoveDeadNodes ( ) ; GAUsesInFunction . clear ( ) ; RootHeights . clear ( ) ; RootWeights . clear ( ) ;


<s> if ( BasePtr . getOpcode ( ) != <STR_LIT> ) continue ; if ( RootWeights . count ( BasePtr . getNode ( ) ) ) continue ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ) ; LLVM_DEBUG ( N -> dump ( CurDAG ) ) ; SmallVector < SDNode * , <NUM_LIT> > Worklist ; Worklist . push_back ( BasePtr . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; Worklist . push_back ( BasePtr . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; while ( ! Worklist . empty ( ) ) { SDNode * N = Worklist . pop_back_val ( ) ; unsigned Opcode = N -> getOpcode ( ) ; if ( ! isOpcodeHandled ( N ) ) continue ; Worklist . push_back ( N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; Worklist . push_back ( N -> getOperand ( <NUM_LIT> ) . getNode ( ) ) ; if ( N -> hasOneUse ( ) && Opcode == N -> use_begin ( ) -> getOpcode ( ) ) continue ; if ( RootWeights . count ( N ) ) continue ;


<s> case <STR_LIT> : return SelectConstantFP ( N ) ; case <STR_LIT> : return SelectFrameIndex ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectIntrinsicWChain ( N ) ; case <STR_LIT> : return SelectIntrinsicWOChain ( N ) ; case <STR_LIT> : case <STR_LIT> : return SelectAddSubCarry ( N ) ; case <STR_LIT> : return SelectVAlign ( N ) ; case <STR_LIT> : return SelectVAlignAddr ( N ) ; case <STR_LIT> : return SelectTypecast ( N ) ; case <STR_LIT> : return SelectP2D ( N ) ; case <STR_LIT> : return SelectD2P ( N ) ; case <STR_LIT> : return SelectQ2V ( N ) ; case <STR_LIT> : return SelectV2Q ( N ) ; } if ( HST -> useHVXOps ( ) ) { switch ( N -> getOpcode ( ) ) { case <STR_LIT> : return SelectHvxShuffle ( N ) ; case <STR_LIT> : return SelectHvxRor ( N ) ;


<s> int FX = cast < FrameIndexSDNode > ( N ) -> getIndex ( ) ;

if ( ! MFI . isFixedObjectIndex ( FX ) && HFI . needsAligna ( * MF ) ) return false ;


<s> return SelectGlobalAddress ( N , R , false , Align ( <NUM_LIT> ) ) ;


<s> SDNode * C = CurDAG -> getMachineNode ( OpcCarry , SDLoc ( N ) , N -> getVTList ( ) , { N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) } ) ;


<s> unsigned OpcCarry = N -> getOpcode ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; SDNode * C = CurDAG -> getMachineNode ( OpcCarry , SDLoc ( N ) , N -> getVTList ( ) , { N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) } ) ;


<s> return SelectAnyImmediate ( N , R , Align ( <NUM_LIT> ) ) ;


<s> inline bool <ISA_LIT>DAGToDAGISel :: SelectAnyImm1 ( SDValue & N , SDValue & R ) { return SelectAnyImmediate ( N , R , Align ( <NUM_LIT> ) ) ;


<s> inline bool <ISA_LIT>DAGToDAGISel :: SelectAnyImm2 ( SDValue & N , SDValue & R ) {

return SelectAnyImmediate ( N , R , Align ( <NUM_LIT> ) ) ;


<s> inline bool <ISA_LIT>DAGToDAGISel :: SelectAnyImm3 ( SDValue & N , SDValue & R ) { return SelectAnyImmediate ( N , R , Align ( <NUM_LIT> ) ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectAnyImmediate ( SDValue & N , SDValue & R , Align Alignment ) { switch ( N . getOpcode ( ) ) { case <STR_LIT> : { if ( N . getValueType ( ) != <STR_LIT> ) return false ; int32_t V = cast < const ConstantSDNode > ( N ) -> getZExtValue ( ) ; if ( ! isAligned ( Alignment , V ) ) return false ;

R = CurDAG -> getTargetConstant ( V , SDLoc ( N ) , N . getValueType ( ) ) ;


<s> inline bool <ISA_LIT>DAGToDAGISel :: SelectAnyInt ( SDValue & N , SDValue & R ) { EVT T = N . getValueType ( ) ; if ( ! T . isInteger ( ) || T . getSizeInBits ( ) != <NUM_LIT> || ! isa < ConstantSDNode > ( N ) ) return false ; R = N ; return true ;


<s> auto FLI = LoadBrevMap . find ( IntNo ) ; if ( FLI != LoadBrevMap . end ( ) ) { EVT ValTy = ( IntNo == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; EVT RTys [ ] = { ValTy , <STR_LIT> , <STR_LIT> } ; MachineSDNode * Res = CurDAG -> getMachineNode ( FLI -> second , dl , RTys , { IntN -> getOperand ( <NUM_LIT> ) , IntN -> getOperand ( <NUM_LIT> ) , IntN -> getOperand ( <NUM_LIT> ) } ) ; MachineMemOperand * MemOp = cast < MemIntrinsicSDNode > ( IntN ) -> getMemOperand ( ) ; CurDAG -> setNodeMemRefs ( Res , { MemOp } ) ; ReplaceUses ( SDValue ( IntN , <NUM_LIT> ) , SDValue ( Res , <NUM_LIT> ) ) ; ReplaceUses ( SDValue ( IntN , <NUM_LIT> ) , SDValue ( Res , <NUM_LIT> ) ) ; ReplaceUses ( SDValue ( IntN , <NUM_LIT> ) , SDValue ( Res , <NUM_LIT> ) ) ; CurDAG -> RemoveDeadNode ( IntN ) ; return true ; } return false ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectConstant ( SDNode * N ) { if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { assert ( ! ( cast < ConstantSDNode > ( N ) -> getZExtValue ( ) >> <NUM_LIT> ) ) ; unsigned Opc = ( cast < ConstantSDNode > ( N ) -> getSExtValue ( ) != <NUM_LIT> ) ? <STR_LIT> : <STR_LIT> ; ReplaceNode ( N , CurDAG -> getMachineNode ( Opc , SDLoc ( N ) , <STR_LIT> ) ) ;


<s> SDValue V = CurDAG -> getTargetConstant ( A . getZExtValue ( ) , dl , <STR_LIT> ) ; ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , V ) ) ; return ; } if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) {


<s> void <ISA_LIT>DAGToDAGISel :: SelectConstantFP ( SDNode * N ) { SDLoc dl ( N ) ; auto * CN = cast < ConstantFPSDNode > ( N ) ; APInt A = CN -> getValueAPF ( ) . bitcastToAPInt ( ) ;

if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) {


<s> void <ISA_LIT>DAGToDAGISel :: SelectD2P ( SDNode * N ) { const SDLoc & dl ( N ) ;

MVT ResTy = N -> getValueType ( <NUM_LIT> ) . getSimpleVT ( ) ;


<s> MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; const <ISA_LIT>FrameLowering * HFI = HST -> getFrameLowering ( ) ; int FX = cast < FrameIndexSDNode > ( N ) -> getIndex ( ) ; Align StkA = HFI -> getStackAlign ( ) ; Align MaxA = MFI . getMaxAlign ( ) ; SDValue FI = CurDAG -> getTargetFrameIndex ( FX , <STR_LIT> ) ; SDLoc DL ( N ) ; SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SDNode * R = nullptr ; if ( FX < <NUM_LIT> || MaxA <= StkA || ! MFI . hasVarSizedObjects ( ) ) { R = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , FI , Zero ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectGlobalAddress ( SDValue & N , SDValue & R , bool UseGP , Align Alignment ) { switch ( N . getOpcode ( ) ) { case <STR_LIT> : { SDValue N0 = N . getOperand ( <NUM_LIT> ) ; SDValue N1 = N . getOperand ( <NUM_LIT> ) ; unsigned GAOpc = N0 . getOpcode ( ) ; if ( UseGP && GAOpc != <STR_LIT> ) return false ; if ( ! UseGP && GAOpc != <STR_LIT> ) return false ; if ( ConstantSDNode * Const = dyn_cast < ConstantSDNode > ( N1 ) ) { if ( ! isAligned ( Alignment , Const -> getZExtValue ( ) ) ) return false ; SDValue Addr = N0 . getOperand ( <NUM_LIT> ) ; if ( GlobalAddressSDNode * GA = dyn_cast < GlobalAddressSDNode > ( Addr ) ) { if ( GA -> getOpcode ( ) == <STR_LIT> ) { uint64_t NewOff = GA -> getOffset ( ) + ( uint64_t ) Const -> getSExtValue ( ) ; R = CurDAG -> getTargetGlobalAddress ( GA -> getGlobal ( ) , SDLoc ( Const ) , N . getValueType ( ) , NewOff ) ; return true ; } } } break ; } case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :

if ( ! UseGP ) R = N . getOperand ( <NUM_LIT> ) ;


<s> else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : if ( IsZeroExt ) Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( isAlignedMemNode ( LD ) ) { if ( LD -> isNonTemporal ( ) ) Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } else { Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } break ; default : llvm_unreachable ( <STR_LIT> ) ; } SDValue IncV = CurDAG -> getTargetConstant ( Inc , dl , <STR_LIT> ) ; MachineMemOperand * MemOp = LD -> getMemOperand ( ) ; auto getExt64 = [ this , ExtType ] ( MachineSDNode * N , const SDLoc & dl ) -> MachineSDNode * { if ( ExtType == <STR_LIT> || ExtType == <STR_LIT> ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; return CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Zero , SDValue ( N , <NUM_LIT> ) ) ; } if ( ExtType == <STR_LIT> ) return CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( N , <NUM_LIT> ) ) ; return N ; } ; SDValue From [ <NUM_LIT> ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ;


<s> case <STR_LIT> : case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( isAlignedMemNode ( ST ) ) { if ( ST -> isNonTemporal ( ) ) Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } else { Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } break ; default : llvm_unreachable ( <STR_LIT> ) ; } if ( ST -> isTruncatingStore ( ) && ValueVT . getSizeInBits ( ) == <NUM_LIT> ) { assert ( StoredVT . getSizeInBits ( ) < <NUM_LIT> && <STR_LIT> ) ; Value = CurDAG -> getTargetExtractSubreg ( <STR_LIT> , dl , <STR_LIT> , Value ) ; } SDValue IncV = CurDAG -> getTargetConstant ( Inc , dl , <STR_LIT> ) ; MachineMemOperand * MemOp = ST -> getMemOperand ( ) ; SDValue From [ <NUM_LIT> ] = { SDValue ( ST , <NUM_LIT> ) , SDValue ( ST , <NUM_LIT> ) } ; SDValue To [ <NUM_LIT> ] ; if ( IsValidInc ) { SDValue Ops [ ] = { Base , IncV , Value , Chain } ; MachineSDNode * S = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops ) ; CurDAG -> setNodeMemRefs ( S , { MemOp } ) ; To [ <NUM_LIT> ] = SDValue ( S , <NUM_LIT> ) ; To [ <NUM_LIT> ] = SDValue ( S , <NUM_LIT> ) ; } else { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDValue Ops [ ] = { Base , Zero , Value , Chain } ;

MachineSDNode * S = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops ) ;


<s> SelectInlineAsmMemoryOperand ( const SDValue & Op , unsigned ConstraintID , std :: vector < SDValue > & OutOps ) { SDValue Inp = Op , Res ; switch ( ConstraintID ) { default : return true ; case InlineAsm :: Constraint_o : case InlineAsm :: Constraint_v : case InlineAsm :: Constraint_m : if ( SelectAddrFI ( Inp , Res ) ) OutOps . push_back ( Res ) ; else OutOps . push_back ( Inp ) ; break ; }

OutOps . push_back ( CurDAG -> getTargetConstant ( <NUM_LIT> , SDLoc ( Op ) , <STR_LIT> ) ) ;


<s> if ( SelectBrevLdIntrinsic ( N ) ) return ; if ( SelectNewCircIntrinsic ( N ) ) return ; unsigned IntNo = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> ) { SelectV65Gather ( N ) ; return ; } if ( IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> || IntNo == <STR_LIT> ) {


<s> void <ISA_LIT>DAGToDAGISel :: SelectIntrinsicWOChain ( SDNode * N ) { unsigned IID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; unsigned Bits ; switch ( IID ) { case <STR_LIT> : Bits = <NUM_LIT> ; break ; case <STR_LIT> : Bits = <NUM_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> if ( AM != <STR_LIT> ) { SelectIndexedLoad ( LD , dl ) ; return ; } if ( tryLoadOfLoadIntrinsic ( LD ) ) return ;


<s> SDLoc dl ( N ) ; LoadSDNode * LD = cast < LoadSDNode > ( N ) ; <STR_LIT> AM = LD -> getAddressingMode ( ) ; if ( AM != <STR_LIT> ) { SelectIndexedLoad ( LD , dl ) ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectP2D ( SDNode * N ) { MVT ResTy = N -> getValueType ( <NUM_LIT> ) . getSimpleVT ( ) ;

SDNode * T = CurDAG -> getMachineNode ( <STR_LIT> , SDLoc ( N ) , ResTy , N -> getOperand ( <NUM_LIT> ) ) ;


<s> SDNode * T = CurDAG -> getMachineNode ( <STR_LIT> , SDLoc ( N ) , ResTy , N -> getOperand ( <NUM_LIT> ) ) ; ReplaceNode ( N , T ) ;


<s> assert ( HST -> getVectorLength ( ) * <NUM_LIT> == ResTy . getSizeInBits ( ) ) ; SDValue C = CurDAG -> getTargetConstant ( - <NUM_LIT> , dl , <STR_LIT> ) ; SDNode * R = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , C ) ;

SDNode * T = CurDAG -> getMachineNode ( <STR_LIT> , dl , ResTy , N -> getOperand ( <NUM_LIT> ) , SDValue ( R , <NUM_LIT> ) ) ;


<s> } return Default ( ) ; } if ( Shl_0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sub_0 = Shl_0 . getOperand ( <NUM_LIT> ) ; SDValue Sub_1 = Shl_0 . getOperand ( <NUM_LIT> ) ; if ( ConstantSDNode * C1 = dyn_cast < ConstantSDNode > ( Sub_0 ) ) { if ( C1 -> getSExtValue ( ) != <NUM_LIT> || Sub_1 . getOpcode ( ) != <STR_LIT> ) return Default ( ) ; SDValue Shl2_0 = Sub_1 . getOperand ( <NUM_LIT> ) ; SDValue Shl2_1 = Sub_1 . getOperand ( <NUM_LIT> ) ; if ( ConstantSDNode * C2 = dyn_cast < ConstantSDNode > ( Shl2_1 ) ) { int32_t ValConst = <NUM_LIT> << ( ShlConst + C2 -> getSExtValue ( ) ) ; if ( isInt < <NUM_LIT> > ( - ValConst ) ) { SDValue Val = CurDAG -> getTargetConstant ( - ValConst , dl , <STR_LIT> ) ;

SDNode * Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Shl2_0 , Val ) ;


<s> <STR_LIT> AM = ST -> getAddressingMode ( ) ; if ( AM != <STR_LIT> ) { SelectIndexedStore ( ST , dl ) ; return ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectStore ( SDNode * N ) { SDLoc dl ( N ) ; StoreSDNode * ST = cast < StoreSDNode > ( N ) ;

<STR_LIT> AM = ST -> getAddressingMode ( ) ;


<s> SDValue Op = N -> getOperand ( <NUM_LIT> ) ;

MVT OpTy = Op . getValueType ( ) . getSimpleVT ( ) ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectTypecast ( SDNode * N ) { SDValue Op = N -> getOperand ( <NUM_LIT> ) ; MVT OpTy = Op . getValueType ( ) . getSimpleVT ( ) ; SDNode * T = CurDAG -> MorphNodeTo ( N , N -> getOpcode ( ) , CurDAG -> getVTList ( OpTy ) , { Op } ) ; ReplaceNode ( T , Op . getNode ( ) ) ;


<s> SDNode * R = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , C ) ;


<s> MVT ResTy = N -> getValueType ( <NUM_LIT> ) . getSimpleVT ( ) ; MVT OpTy = N -> getOperand ( <NUM_LIT> ) . getValueType ( ) . getSimpleVT ( ) ; ( void ) OpTy ;

assert ( HST -> getVectorLength ( ) * <NUM_LIT> == OpTy . getSizeInBits ( ) ) ;


<s> MVT ResTy = N -> getValueType ( <NUM_LIT> ) . getSimpleVT ( ) ; if ( HST -> isHVXVectorType ( ResTy , true ) ) return SelectHvxVAlign ( N ) ; const SDLoc & dl ( N ) ; unsigned VecLen = ResTy . getSizeInBits ( ) ; if ( VecLen == <NUM_LIT> ) { SDValue Ops [ ] = { CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) , N -> getOperand ( <NUM_LIT> ) , CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) } ; SDNode * R = CurDAG -> getMachineNode ( TargetOpcode :: REG_SEQUENCE , dl , <STR_LIT> , Ops ) ; SDNode * C ; SDValue M0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDValue M1 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; if ( HST -> useCompound ( ) ) { C = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , M0 , N -> getOperand ( <NUM_LIT> ) , M1 ) ; } else { SDNode * T = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , M1 ) ; C = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( T , <NUM_LIT> ) , M0 ) ; } SDNode * S = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( R , <NUM_LIT> ) , SDValue ( C , <NUM_LIT> ) ) ; SDValue E = CurDAG -> getTargetExtractSubreg ( <STR_LIT> , dl , ResTy , SDValue ( S , <NUM_LIT> ) ) ; ReplaceNode ( N , E . getNode ( ) ) ; } else { assert ( VecLen == <NUM_LIT> ) ; SDNode * Pu = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) ) ; SDNode * VA = CurDAG -> getMachineNode ( <STR_LIT> , dl , ResTy , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , SDValue ( Pu , <NUM_LIT> ) ) ; ReplaceNode ( N , VA ) ; }


<s> SDValue A = N -> getOperand ( <NUM_LIT> ) ; int Mask = - cast < ConstantSDNode > ( A . getNode ( ) ) -> getSExtValue ( ) ; assert ( isPowerOf2_32 ( - Mask ) ) ; SDValue M = CurDAG -> getTargetConstant ( Mask , dl , <STR_LIT> ) ;

SDNode * AA = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , M ) ;


<s> int Mask = - cast < ConstantSDNode > ( A . getNode ( ) ) -> getSExtValue ( ) ; assert ( isPowerOf2_32 ( - Mask ) ) ; SDValue M = CurDAG -> getTargetConstant ( Mask , dl , <STR_LIT> ) ; SDNode * AA = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , M ) ;


<s> MachinePointerInfo PI ; SDValue TS ; SDValue Loc = IntN -> getOperand ( <NUM_LIT> ) ; if ( Size >= <NUM_LIT> ) TS = CurDAG -> getStore ( SDValue ( LoadN , <NUM_LIT> ) , dl , SDValue ( LoadN , <NUM_LIT> ) , Loc , PI , Align ( Size ) ) ; else TS = CurDAG -> getTruncStore ( SDValue ( LoadN , <NUM_LIT> ) , dl , SDValue ( LoadN , <NUM_LIT> ) , Loc , PI , <STR_LIT> ( Size * <NUM_LIT> ) , Align ( Size ) ) ; SDNode * StoreN ; { HandleSDNode Handle ( TS ) ; SelectStore ( TS . getNode ( ) ) ; StoreN = Handle . getValue ( ) . getNode ( ) ; } ReplaceUses ( SDValue ( IntN , <NUM_LIT> ) , SDValue ( LoadN , <NUM_LIT> ) ) ; ReplaceUses ( SDValue ( IntN , <NUM_LIT> ) , SDValue ( StoreN , <NUM_LIT> ) ) ;


<s> else TS = CurDAG -> getTruncStore ( SDValue ( LoadN , <NUM_LIT> ) , dl , SDValue ( LoadN , <NUM_LIT> ) , Loc , PI , <STR_LIT> ( Size * <NUM_LIT> ) , Align ( Size ) ) ; SDNode * StoreN ; { HandleSDNode Handle ( TS ) ; SelectStore ( TS . getNode ( ) ) ; StoreN = Handle . getValue ( ) . getNode ( ) ;


<s> if ( HaveConst ) return ConstElt ; return Q . front ( ) ;


<s> break ; case <STR_LIT> : case <STR_LIT> : IntExt = <STR_LIT> ; break ; default : IntExt = <STR_LIT> ; break ; } if ( N -> getExtensionType ( ) != IntExt ) return false ; if ( C -> getNumOperands ( ) < <NUM_LIT> || Loc . getNode ( ) != C -> getOperand ( <NUM_LIT> ) . getNode ( ) ) return false ; if ( MachineSDNode * L = LoadInstrForLoadIntrinsic ( C ) ) { SDNode * S = StoreInstrForLoadIntrinsic ( L , C ) ; SDValue F [ ] = { SDValue ( N , <NUM_LIT> ) , SDValue ( N , <NUM_LIT> ) , SDValue ( C , <NUM_LIT> ) , SDValue ( C , <NUM_LIT> ) } ; SDValue T [ ] = { SDValue ( L , <NUM_LIT> ) , SDValue ( S , <NUM_LIT> ) , SDValue ( L , <NUM_LIT> ) , SDValue ( S , <NUM_LIT> ) } ;

ReplaceUses ( F , T , array_lengthof ( T ) ) ;


<s> if ( C -> getOpcode ( ) != <STR_LIT> ) return false ; <STR_LIT> IntExt ; switch ( cast < ConstantSDNode > ( C -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ) { case <STR_LIT> : case <STR_LIT> : IntExt = <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : IntExt = <STR_LIT> ; break ; default : IntExt = <STR_LIT> ; break ; } if ( N -> getExtensionType ( ) != IntExt ) return false ; if ( C -> getNumOperands ( ) < <NUM_LIT> || Loc . getNode ( ) != C -> getOperand ( <NUM_LIT> ) . getNode ( ) ) return false ; if ( MachineSDNode * L = LoadInstrForLoadIntrinsic ( C ) ) { SDNode * S = StoreInstrForLoadIntrinsic ( L , C ) ; SDValue F [ ] = { SDValue ( N , <NUM_LIT> ) , SDValue ( N , <NUM_LIT> ) , SDValue ( C , <NUM_LIT> ) , SDValue ( C , <NUM_LIT> ) } ; SDValue T [ ] = { SDValue ( L , <NUM_LIT> ) , SDValue ( S , <NUM_LIT> ) , SDValue ( L , <NUM_LIT> ) , SDValue ( S , <NUM_LIT> ) } ; ReplaceUses ( F , T , array_lengthof ( T ) ) ;


<s> auto & HFI = * MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ; auto * AlignaI = const_cast < MachineInstr * > ( HFI . getAlignaInstr ( * MF ) ) ; assert ( AlignaI != nullptr ) ;

unsigned MaxA = MF -> getFrameInfo ( ) . getMaxAlign ( ) . value ( ) ;


<s> WeightedLeaf ( SDValue Value , int Weight , int InsertionOrder ) :

Value ( Value ) , Weight ( Weight ) , InsertionOrder ( InsertionOrder ) {


<s> Value ( Value ) , Weight ( Weight ) , InsertionOrder ( InsertionOrder ) {

assert ( Weight >= <NUM_LIT> && <STR_LIT> ) ;


<s> SDValue Ops [ ] = { V . getOperand ( <NUM_LIT> ) , V . getOperand ( <NUM_LIT> ) } ; for ( int i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) if ( isa < ConstantSDNode > ( Ops [ i ] . getNode ( ) ) && V . getConstantOperandVal ( i ) % ( <NUM_LIT> << Amount ) == <NUM_LIT> ) { uint64_t NewConst = V . getConstantOperandVal ( i ) >> Amount ; return ( NewConst == <NUM_LIT> ) ; } } else if ( V . getOpcode ( ) == <STR_LIT> ) { return ( Amount == V . getConstantOperandVal ( <NUM_LIT> ) ) ; }


<s> for ( int i = <NUM_LIT> ; i < <NUM_LIT> ; ++ i ) if ( isa < ConstantSDNode > ( Ops [ i ] . getNode ( ) ) && V . getConstantOperandVal ( i ) % ( <NUM_LIT> << Amount ) == <NUM_LIT> ) { uint64_t NewConst = V . getConstantOperandVal ( i ) >> Amount ; return ( NewConst == <NUM_LIT> ) ; }

} else if ( V . getOpcode ( ) == <STR_LIT> ) {


<s> case <STR_LIT> : return SelectAdd ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectSelect ( N ) ; case <STR_LIT> : return SelectTruncate ( N ) ; case <STR_LIT> : return SelectMul ( N ) ; case <STR_LIT> :


<s> else Opcode = zextval ? <STR_LIT> : <STR_LIT> ; } else llvm_unreachable ( <STR_LIT> ) ; if ( LD -> getValueType ( <NUM_LIT> ) == <STR_LIT> && LD -> getExtensionType ( ) == <STR_LIT> ) { return SelectIndexedLoadZeroExtend64 ( LD , Opcode , dl ) ; } if ( LD -> getValueType ( <NUM_LIT> ) == <STR_LIT> && LD -> getExtensionType ( ) == <STR_LIT> ) { return SelectIndexedLoadSignExtend64 ( LD , Opcode , dl ) ; } if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , LD -> getValueType ( <NUM_LIT> ) , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ; return Result ; } else { SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , LD -> getValueType ( <NUM_LIT> ) , <STR_LIT> , Base , TargetConst0 , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ;

cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ;


<s> EVT LoadedVT = LD -> getMemoryVT ( ) ; SDValue Base = LD -> getBasePtr ( ) ; SDValue Offset = LD -> getOffset ( ) ; SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; SDValue N1 = LD -> getOperand ( <NUM_LIT> ) ; SDValue CPTmpN1_0 ; SDValue CPTmpN1_1 ; if ( SelectADDRriS11_2 ( N1 , CPTmpN1_0 , CPTmpN1_1 ) && N1 . getNode ( ) -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { const <ISA_LIT>InstrInfo * TII = Subtarget -> getInstrInfo ( ) ; if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConst = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConst , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ;

const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ;


<s> SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; SDValue N1 = LD -> getOperand ( <NUM_LIT> ) ; SDValue CPTmpN1_0 ; SDValue CPTmpN1_1 ; if ( SelectADDRriS11_2 ( N1 , CPTmpN1_0 , CPTmpN1_1 ) && N1 . getNode ( ) -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { const <ISA_LIT>InstrInfo * TII = Subtarget -> getInstrInfo ( ) ; if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ;

MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ;


<s> SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; SDValue N1 = LD -> getOperand ( <NUM_LIT> ) ; SDValue CPTmpN1_0 ; SDValue CPTmpN1_1 ; if ( SelectADDRriS11_2 ( N1 , CPTmpN1_0 , CPTmpN1_1 ) && N1 . getNode ( ) -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { const <ISA_LIT>InstrInfo * TII = Subtarget -> getInstrInfo ( ) ; if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result_3 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ; return Result_3 ; } SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Base , TargetConst0 , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; SDNode * Result_4 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ;


<s> ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) ) ; return Result ; } SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) , Value , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ;

MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ;


<s> auto & HFI = * HST . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ; MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; Register AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; Align EntryMaxA = MFI . getMaxAlign ( ) ; BuildMI ( EntryBB , DebugLoc ( ) , HII -> get ( <STR_LIT> ) , AR ) . addImm ( EntryMaxA . value ( ) ) ;

MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> setStackAlignBaseVReg ( AR ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( Val . getOperand ( <NUM_LIT> ) . getValueType ( ) . isInteger ( ) ) { VTSDNode * T = cast < VTSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ; if ( T -> getVT ( ) . getSizeInBits ( ) == NumBits ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } break ; case <STR_LIT> : { uint64_t Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( C -> getZExtValue ( ) == Mask ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( C -> getZExtValue ( ) == Mask ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } break ; } case <STR_LIT> : case <STR_LIT> : { uint64_t Mask = ( <NUM_LIT> << NumBits ) - <NUM_LIT> ; if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( ( C -> getZExtValue ( ) & Mask ) == <NUM_LIT> ) { Src = Val . getOperand ( <NUM_LIT> ) ; return true ; } } if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Val . getOperand ( <NUM_LIT> ) ) ) { if ( ( C -> getZExtValue ( ) & Mask ) == <NUM_LIT> ) {


<s> SelectionDAG & DAG = * CurDAG ; for ( SDNode * N : Nodes ) { unsigned Opc = N -> getOpcode ( ) ; if ( Opc != <STR_LIT> ) continue ; SDValue OpI1 = N -> getOperand ( <NUM_LIT> ) ; EVT OpVT = OpI1 . getValueType ( ) ; if ( ! OpVT . isSimple ( ) || OpVT . getSimpleVT ( ) != <STR_LIT> ) continue ; for ( auto I = N -> use_begin ( ) , E = N -> use_end ( ) ; I != E ; ++ I ) { SDNode * U = * I ; if ( U -> getNumValues ( ) != <NUM_LIT> ) continue ; EVT UVT = U -> getValueType ( <NUM_LIT> ) ; if ( ! UVT . isSimple ( ) || ! UVT . isInteger ( ) || UVT . getSimpleVT ( ) == <STR_LIT> ) continue ; if ( UVT . isVector ( ) && UVT . getVectorElementType ( ) == <STR_LIT> ) continue ; if ( isMemOPCandidate ( N , U ) ) continue ; unsigned I1N = I . getOperandNo ( ) ; SmallVector < SDValue , <NUM_LIT> > Ops ( U -> getNumOperands ( ) ) ; for ( unsigned i = <NUM_LIT> , n = U -> getNumOperands ( ) ; i != n ; ++ i ) Ops [ i ] = U -> getOperand ( i ) ; EVT BVT = Ops [ I1N ] . getValueType ( ) ; const SDLoc & dl ( U ) ; SDValue C0 = DAG . getConstant ( <NUM_LIT> , dl , BVT ) ; SDValue C1 = DAG . getConstant ( <NUM_LIT> , dl , BVT ) ; SDValue If0 , If1 ; if ( isa < MachineSDNode > ( U ) ) { unsigned UseOpc = U -> getMachineOpcode ( ) ; Ops [ I1N ] = C0 ; If0 = SDValue ( DAG . getMachineNode ( UseOpc , dl , UVT , Ops ) , <NUM_LIT> ) ; Ops [ I1N ] = C1 ; If1 = SDValue ( DAG . getMachineNode ( UseOpc , dl , UVT , Ops ) , <NUM_LIT> ) ; } else { unsigned UseOpc = U -> getOpcode ( ) ; Ops [ I1N ] = C0 ; If0 = DAG . getNode ( UseOpc , dl , UVT , Ops ) ; Ops [ I1N ] = C1 ; If1 = DAG . getNode ( UseOpc , dl , UVT , Ops ) ; } unsigned UW = UVT . getSizeInBits ( ) ;

EVT SVT = ( UW == <NUM_LIT> || UW == <NUM_LIT> ) ? <STR_LIT> ( UW ) : UVT ;


<s> if ( ! HFI . needsAligna ( * MF ) ) return ; MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; unsigned EntryMaxA = MFI . getMaxAlignment ( ) ;

BuildMI ( EntryBB , DebugLoc ( ) , HII -> get ( <STR_LIT> ) , AR ) . addImm ( EntryMaxA ) ;


<s> if ( ! HFI . needsAligna ( * MF ) ) return ; MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; unsigned EntryMaxA = MFI . getMaxAlignment ( ) ; BuildMI ( EntryBB , DebugLoc ( ) , HII -> get ( <STR_LIT> ) , AR ) . addImm ( EntryMaxA ) ; MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> setStackAlignBaseVReg ( AR ) ;


<s> if ( ! HFI . needsAligna ( * MF ) ) return ; auto * AlignaI = const_cast < MachineInstr * > ( HFI . getAlignaInstr ( * MF ) ) ;


<s> void <ISA_LIT>DAGToDAGISel :: updateAligna ( ) { auto & HFI = * MF -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ; auto * AlignaI = const_cast < MachineInstr * > ( HFI . getAlignaInstr ( * MF ) ) ; assert ( AlignaI != nullptr ) ; unsigned MaxA = MF -> getFrameInfo ( ) . getMaxAlignment ( ) ; if ( AlignaI -> getOperand ( <NUM_LIT> ) . getImm ( ) < MaxA ) AlignaI -> getOperand ( <NUM_LIT> ) . setImm ( MaxA ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: foldGlobalAddressImpl ( SDValue & N , SDValue & R , bool ShouldLookForGP ) { if ( N . getOpcode ( ) == <STR_LIT> ) { SDValue N0 = N . getOperand ( <NUM_LIT> ) ; SDValue N1 = N . getOperand ( <NUM_LIT> ) ; if ( ( ShouldLookForGP && ( N0 . getOpcode ( ) == <STR_LIT> ) ) || ( ! ShouldLookForGP && ( N0 . getOpcode ( ) == <STR_LIT> ) ) ) { ConstantSDNode * Const = dyn_cast < ConstantSDNode > ( N1 ) ;

GlobalAddressSDNode * GA = dyn_cast < GlobalAddressSDNode > ( N0 . getOperand ( <NUM_LIT> ) ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & targetmachine , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( targetmachine , OptLevel ) , Subtarget ( targetmachine . getSubtarget < <ISA_LIT>Subtarget > ( ) ) , TM ( targetmachine ) , TII ( static_cast < const <ISA_LIT>InstrInfo * > ( TM . getInstrInfo ( ) ) ) { initialize<ISA_LIT>DAGToDAGISelPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( Val , <STR_LIT> ) , Value , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( ST , Result ) ; ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) ) ; return Result ; } SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) , Value , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops , <NUM_LIT> ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result_2 , <NUM_LIT> ) ) ; ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ;


<s> return <NUM_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> } if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , LD -> getValueType ( <NUM_LIT> ) , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ; return Result ; } else { SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , LD -> getValueType ( <NUM_LIT> ) , <STR_LIT> , Base , TargetConst0 , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ;


<s> SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Base , TargetConst0 , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Result_1 , <NUM_LIT> ) ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_3 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ; return Result_2 ;


<s> SDValue N1 = LD -> getOperand ( <NUM_LIT> ) ; SDValue CPTmpN1_0 ; SDValue CPTmpN1_1 ; if ( SelectADDRriS11_2 ( N1 , CPTmpN1_0 , CPTmpN1_1 ) && N1 . getNode ( ) -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( TM . getSubtargetImpl ( ) -> getInstrInfo ( ) ) ; if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConst = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConst , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ; return Result_2 ; } SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Base , TargetConst0 , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Result_1 , <NUM_LIT> ) ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Base , TargetConstVal , SDValue ( Result_1 , <NUM_LIT> ) ) ;


<s> if ( SelectADDRriS11_2 ( N1 , CPTmpN1_0 , CPTmpN1_1 ) && N1 . getNode ( ) -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( TM . getSubtargetImpl ( ) -> getInstrInfo ( ) ) ; if ( TII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; const SDValue Tos [ ] = { SDValue ( Result_3 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) } ; ReplaceUses ( Froms , Tos , <NUM_LIT> ) ;


<s> const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( TM . getSubtargetImpl ( ) -> getInstrInfo ( ) ) ; if ( TII -> isValidAutoIncImm ( StoredVT , Val ) ) { SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( Val , <STR_LIT> ) , Value , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else llvm_unreachable ( <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( ST , Result ) ; ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) ) ; return Result ; } SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) , Value , Chain } ;


<s> unsigned ID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; unsigned IntrinsicWithPred = doesIntrinsicContainPredicate ( ID ) ; if ( IntrinsicWithPred ) { SmallVector < SDValue , <NUM_LIT> > Ops ; const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( TM . getSubtargetImpl ( ) -> getInstrInfo ( ) ) ; const MCInstrDesc & MCID = TII -> get ( IntrinsicWithPred ) ; const TargetRegisterInfo * TRI = TM . getSubtargetImpl ( ) -> getRegisterInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i < N -> getNumOperands ( ) ; ++ i ) { SDNode * Arg = N -> getOperand ( i ) . getNode ( ) ; const TargetRegisterClass * RC = TII -> getRegClass ( MCID , i , TRI , * MF ) ; if ( RC == & <STR_LIT> || RC == & <STR_LIT> ) { Ops . push_back ( SDValue ( Arg , <NUM_LIT> ) ) ; } else if ( RC == & <STR_LIT> ) { SDNode * PdRs = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Arg , <NUM_LIT> ) ) ; Ops . push_back ( SDValue ( PdRs , <NUM_LIT> ) ) ; } else if ( ! RC && ( dyn_cast < ConstantSDNode > ( Arg ) != nullptr ) ) { int32_t Val = cast < ConstantSDNode > ( Arg ) -> getSExtValue ( ) ; SDValue SDVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; Ops . push_back ( SDVal ) ; } else { llvm_unreachable ( <STR_LIT> ) ; }


<s> if ( CV > <NUM_LIT> ) continue ; ConstantSDNode * EN = dyn_cast < ConstantSDNode > ( T2 . getNode ( ) ) ; if ( EN == nullptr ) continue ; unsigned EV = EN -> getZExtValue ( ) ; if ( EV % ( <NUM_LIT> << CV ) != <NUM_LIT> ) continue ; unsigned DV = EV / ( <NUM_LIT> << CV ) ; SDLoc DL = SDLoc ( I ) ; EVT VT = T0 . getValueType ( ) ; SDValue D = DAG . getConstant ( DV , DL , VT ) ; SDValue NewAdd = DAG . getNode ( <STR_LIT> , DL , VT , T1 . getOperand ( <NUM_LIT> ) , D ) ; SDValue NewShl = DAG . getNode ( <STR_LIT> , DL , VT , NewAdd , C ) ; ReplaceNode ( T0 . getNode ( ) , NewShl . getNode ( ) ) ; } for ( SDNode * N : Nodes ) { unsigned Opc = N -> getOpcode ( ) ; if ( Opc != <STR_LIT> && Opc != <STR_LIT> ) continue ; SDValue Addr = Opc == <STR_LIT> ? N -> getOperand ( <NUM_LIT> ) : N -> getOperand ( <NUM_LIT> ) ; if ( Addr . getOpcode ( ) != <STR_LIT> ) continue ; SDValue T0 = Addr . getOperand ( <NUM_LIT> ) ; if ( T0 . getOpcode ( ) != <STR_LIT> ) continue ; SDValue S = T0 . getOperand ( <NUM_LIT> ) ; if ( S . getOpcode ( ) != <STR_LIT> ) continue ; ConstantSDNode * SN = dyn_cast < ConstantSDNode > ( S . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; if ( SN == nullptr ) continue ; if ( SN -> getAPIntValue ( ) . getBitWidth ( ) != <NUM_LIT> ) continue ; uint32_t CV = SN -> getZExtValue ( ) ; ConstantSDNode * MN = dyn_cast < ConstantSDNode > ( T0 . getOperand ( <NUM_LIT> ) . getNode ( ) ) ; if ( MN == nullptr ) continue ; if ( MN -> getAPIntValue ( ) . getBitWidth ( ) != <NUM_LIT> ) continue ; uint32_t Mask = MN -> getZExtValue ( ) ; uint32_t TZ = countTrailingZeros ( Mask ) ; uint32_t M1 = countTrailingOnes ( Mask >> TZ ) ; uint32_t LZ = countLeadingZeros ( Mask ) ; if ( TZ + M1 + LZ != <NUM_LIT> ) continue ; if ( TZ > <NUM_LIT> ) continue ; if ( LZ > CV ) continue ; SDValue Y = S . getOperand ( <NUM_LIT> ) ; EVT VT = Addr . getValueType ( ) ;


<s> case <STR_LIT> : return SelectFrameIndex ( N ) ; case <STR_LIT> : return SelectBitcast ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectMul ( N ) ; case <STR_LIT> : return SelectZeroExtend ( N ) ; case <STR_LIT> : return SelectIntrinsicWChain ( N ) ;

case <STR_LIT> : return SelectIntrinsicWOChain ( N ) ;


<s> case <STR_LIT> : return SelectFrameIndex ( N ) ; case <STR_LIT> : return SelectBitcast ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectMul ( N ) ;

case <STR_LIT> : return SelectZeroExtend ( N ) ;


<s> MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; int FX = cast < FrameIndexSDNode > ( N ) -> getIndex ( ) ; if ( ! MFI . isFixedObjectIndex ( FX ) && HFI . needsAligna ( * MF ) ) return false ;

R = CurDAG -> getTargetFrameIndex ( FX , <STR_LIT> ) ;


<s> break ; default : SelectCode ( N ) ; return ; } SDValue V = N -> getOperand ( <NUM_LIT> ) ; SDValue U ; if ( isValueExtension ( V , Bits , U ) ) { SDValue R = CurDAG -> getNode ( N -> getOpcode ( ) , SDLoc ( N ) , N -> getValueType ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) , U ) ; ReplaceNode ( N , R . getNode ( ) ) ; SelectCode ( R . getNode ( ) ) ; return ; }


<s> SDValue OP0 ; SDValue OP1 ; if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sext0 = MulOp0 . getOperand ( <NUM_LIT> ) ; if ( Sext0 . getNode ( ) -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } OP0 = Sext0 ; } else if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { LoadSDNode * LD = cast < LoadSDNode > ( MulOp0 . getNode ( ) ) ; if ( LD -> getMemoryVT ( ) != <STR_LIT> || LD -> getExtensionType ( ) != <STR_LIT> || LD -> getAddressingMode ( ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } SDValue Chain = LD -> getChain ( ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; OP0 = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , LD -> getBasePtr ( ) , TargetConst0 , Chain ) , <NUM_LIT> ) ; } else { SelectCode ( N ) ; return ; } if ( MulOp1 . getOpcode ( ) == <STR_LIT> ) { SDValue Sext1 = MulOp1 . getOperand ( <NUM_LIT> ) ; if ( Sext1 . getNode ( ) -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } OP1 = Sext1 ; } else if ( MulOp1 . getOpcode ( ) == <STR_LIT> ) { LoadSDNode * LD = cast < LoadSDNode > ( MulOp1 . getNode ( ) ) ; if ( LD -> getMemoryVT ( ) != <STR_LIT> || LD -> getExtensionType ( ) != <STR_LIT> || LD -> getAddressingMode ( ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } SDValue Chain = LD -> getChain ( ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; OP1 = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , LD -> getBasePtr ( ) , TargetConst0 , Chain ) , <NUM_LIT> ) ; } else { SelectCode ( N ) ; return ; } SDNode * Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , OP0 , OP1 ) ; ReplaceNode ( N , Result ) ; return ;


<s> if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDValue MulOp0 = N -> getOperand ( <NUM_LIT> ) ; SDValue MulOp1 = N -> getOperand ( <NUM_LIT> ) ; SDValue OP0 ; SDValue OP1 ; if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sext0 = MulOp0 . getOperand ( <NUM_LIT> ) ; if ( Sext0 . getNode ( ) -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } OP0 = Sext0 ; } else if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { LoadSDNode * LD = cast < LoadSDNode > ( MulOp0 . getNode ( ) ) ; if ( LD -> getMemoryVT ( ) != <STR_LIT> || LD -> getExtensionType ( ) != <STR_LIT> || LD -> getAddressingMode ( ) != <STR_LIT> ) { SelectCode ( N ) ; return ; } SDValue Chain = LD -> getChain ( ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; OP0 = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , LD -> getBasePtr ( ) , TargetConst0 , Chain ) , <NUM_LIT> ) ; } else { SelectCode ( N ) ; return ; } if ( MulOp1 . getOpcode ( ) == <STR_LIT> ) {

SDValue Sext1 = MulOp1 . getOperand ( <NUM_LIT> ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: SelectIntrinsicWOChain ( SDNode * N ) { SDLoc dl ( N ) ; unsigned ID = cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; unsigned IntrinsicWithPred = doesIntrinsicContainPredicate ( ID ) ; if ( IntrinsicWithPred ) { SmallVector < SDValue , <NUM_LIT> > Ops ; const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( TM . getInstrInfo ( ) ) ; const MCInstrDesc & MCID = TII -> get ( IntrinsicWithPred ) ; const TargetRegisterInfo * TRI = TM . getRegisterInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i < N -> getNumOperands ( ) ; ++ i ) { SDNode * Arg = N -> getOperand ( i ) . getNode ( ) ; const TargetRegisterClass * RC = TII -> getRegClass ( MCID , i , TRI , * MF ) ; if ( RC == & <STR_LIT> || RC == & <STR_LIT> ) { Ops . push_back ( SDValue ( Arg , <NUM_LIT> ) ) ; } else if ( RC == & <STR_LIT> ) { SDNode * PdRs = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Arg , <NUM_LIT> ) ) ; Ops . push_back ( SDValue ( PdRs , <NUM_LIT> ) ) ; } else if ( ! RC && ( dyn_cast < ConstantSDNode > ( Arg ) != nullptr ) ) { int32_t Val = cast < ConstantSDNode > ( Arg ) -> getSExtValue ( ) ; SDValue SDVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ; Ops . push_back ( SDVal ) ; } else { llvm_unreachable ( <STR_LIT> ) ; } } EVT ReturnValueVT = N -> getValueType ( <NUM_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( IntrinsicWithPred , dl , ReturnValueVT , Ops ) ; ReplaceUses ( N , Result ) ; return Result ; } return SelectCode ( N ) ;


<s> inline bool <ISA_LIT>DAGToDAGISel :: SelectAnyInt ( SDValue & N , SDValue & R ) { EVT T = N . getValueType ( ) ;

if ( ! T . isInteger ( ) || T . getSizeInBits ( ) != <NUM_LIT> || ! isa < ConstantSDNode > ( N ) ) return false ;


<s> auto * C = dyn_cast < ConstantSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ; if ( ! C ) return false ; if ( auto * FN = dyn_cast < FrameIndexSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ) { MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; unsigned A = MFI . getObjectAlignment ( FN -> getIndex ( ) ) ; assert ( isPowerOf2_32 ( A ) ) ; int32_t Off = C -> getSExtValue ( ) ; return ( Off >= <NUM_LIT> ) && ( ( ( A - <NUM_LIT> ) & Off ) == unsigned ( Off ) ) ; }


<s> unsigned A = MFI . getObjectAlignment ( FN -> getIndex ( ) ) ; assert ( isPowerOf2_32 ( A ) ) ; int32_t Off = C -> getSExtValue ( ) ; return ( Off >= <NUM_LIT> ) && ( ( ( A - <NUM_LIT> ) & Off ) == unsigned ( Off ) ) ; }


<s> MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; unsigned MaxA = MFI -> getMaxAlignment ( ) ; auto & HII = * HST . getInstrInfo ( ) ; BuildMI ( EntryBB , DebugLoc ( ) , HII . get ( <STR_LIT> ) , AR ) . addImm ( MaxA ) ;


<s> auto & HST = static_cast < const <ISA_LIT>Subtarget & > ( MF -> getSubtarget ( ) ) ; auto & HFI = * HST . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ;

MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ;


<s> bool SelN0 = IsSelect0 ( N0 ) ; SDValue SOp = SelN0 ? N0 : N1 ; SDValue VOp = SelN0 ? N1 : N0 ; if ( SOp . getOpcode ( ) == <STR_LIT> && SOp . getNode ( ) -> hasOneUse ( ) ) { SDValue SC = SOp . getOperand ( <NUM_LIT> ) ; SDValue SX = SOp . getOperand ( <NUM_LIT> ) ; SDValue SY = SOp . getOperand ( <NUM_LIT> ) ; SDLoc DLS = SOp ; if ( IsZero ( SY ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SX , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , NewOr , VOp ) ;

DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( isAlignedMemNode ( LD ) ) { if ( LD -> isNonTemporal ( ) ) Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } else { Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } break ; default : llvm_unreachable ( <STR_LIT> ) ; } SDValue IncV = CurDAG -> getTargetConstant ( Inc , dl , <STR_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; auto getExt64 = [ this , ExtType ] ( MachineSDNode * N , const SDLoc & dl ) -> MachineSDNode * { if ( ExtType == <STR_LIT> || ExtType == <STR_LIT> ) { SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; return CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Zero , SDValue ( N , <NUM_LIT> ) ) ; } if ( ExtType == <STR_LIT> ) return CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( N , <NUM_LIT> ) ) ; return N ; } ; SDValue From [ <NUM_LIT> ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ; SDValue To [ <NUM_LIT> ] ; EVT ValueVT = LD -> getValueType ( <NUM_LIT> ) ; if ( ValueVT == <STR_LIT> && ExtType != <STR_LIT> ) { assert ( LoadedVT . getSizeInBits ( ) <= <NUM_LIT> ) ; ValueVT = <STR_LIT> ; } if ( IsValidInc ) {

MachineSDNode * L = CurDAG -> getMachineNode ( Opcode , dl , ValueVT , <STR_LIT> , <STR_LIT> , Base , IncV , Chain ) ;


<s> void <ISA_LIT>DAGToDAGISel :: EmitFunctionEntryCode ( ) { auto & HST = static_cast < const <ISA_LIT>Subtarget & > ( MF -> getSubtarget ( ) ) ; auto & HFI = * HST . getFrameLowering ( ) ; if ( ! HFI . needsAligna ( * MF ) ) return ; MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ; MachineBasicBlock * EntryBB = & MF -> front ( ) ; unsigned AR = FuncInfo -> CreateReg ( <STR_LIT> ) ; unsigned MaxA = MFI -> getMaxAlignment ( ) ; BuildMI ( EntryBB , DebugLoc ( ) , HII -> get ( <STR_LIT> ) , AR ) . addImm ( MaxA ) ;


<s> if ( SOp . getOpcode ( ) == <STR_LIT> && SOp . getNode ( ) -> hasOneUse ( ) ) { SDValue SC = SOp . getOperand ( <NUM_LIT> ) ; SDValue SX = SOp . getOperand ( <NUM_LIT> ) ; SDValue SY = SOp . getOperand ( <NUM_LIT> ) ; SDLoc DLS = SOp ; if ( IsZero ( SY ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SX , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , NewOr , VOp ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ; } else if ( IsZero ( SX ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SY , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , VOp , NewOr ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ; } }


<s> } ; auto IsSelect0 = [ IsZero ] ( const SDValue & Op ) -> bool { if ( Op . getOpcode ( ) != <STR_LIT> ) return false ; return IsZero ( Op . getOperand ( <NUM_LIT> ) ) || IsZero ( Op . getOperand ( <NUM_LIT> ) ) ; } ; SDValue N0 = I -> getOperand ( <NUM_LIT> ) , N1 = I -> getOperand ( <NUM_LIT> ) ; EVT VT = I -> getValueType ( <NUM_LIT> ) ; bool SelN0 = IsSelect0 ( N0 ) ; SDValue SOp = SelN0 ? N0 : N1 ; SDValue VOp = SelN0 ? N1 : N0 ; if ( SOp . getOpcode ( ) == <STR_LIT> && SOp . getNode ( ) -> hasOneUse ( ) ) { SDValue SC = SOp . getOperand ( <NUM_LIT> ) ; SDValue SX = SOp . getOperand ( <NUM_LIT> ) ; SDValue SY = SOp . getOperand ( <NUM_LIT> ) ; SDLoc DLS = SOp ; if ( IsZero ( SY ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SX , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , NewOr , VOp ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ; } else if ( IsZero ( SX ) ) { SDValue NewOr = DAG . getNode ( <STR_LIT> , DLS , VT , SY , VOp ) ; SDValue NewSel = DAG . getNode ( <STR_LIT> , DLS , VT , SC , VOp , NewOr ) ; DAG . ReplaceAllUsesWith ( I , NewSel . getNode ( ) ) ; } }


<s> return ; case <STR_LIT> : SelectLoad ( N ) ; return ; case <STR_LIT> : SelectStore ( N ) ; return ; case <STR_LIT> : SelectMul ( N ) ; return ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : SelectBitOp ( N ) ; return ; case <STR_LIT> : SelectZeroExtend ( N ) ; return ; case <STR_LIT> : SelectIntrinsicWChain ( N ) ; return ; case <STR_LIT> : SelectIntrinsicWOChain ( N ) ; return ;


<s> if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , CurDAG -> getTargetConstantFP ( APF . convertToFloat ( ) , dl , <STR_LIT> ) ) ) ; return ; }

else if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) {


<s> SDValue Zero = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , <STR_LIT> ) ; SDNode * R = <NUM_LIT> ; if ( FX < <NUM_LIT> || MaxA <= StkA || ! MFI -> hasVarSizedObjects ( ) ) { R = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , FI , Zero ) ; } else { auto & HMFI = * MF -> getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AR = HMFI . getStackAlignBaseVReg ( ) ; SDValue CH = CurDAG -> getEntryNode ( ) ; SDValue Ops [ ] = { CurDAG -> getCopyFromReg ( CH , DL , AR , <STR_LIT> ) , FI , Zero } ; R = CurDAG -> getMachineNode ( <STR_LIT> , DL , <STR_LIT> , Ops ) ; } if ( N -> getHasDebugValue ( ) ) CurDAG -> TransferDbgValues ( SDValue ( N , <NUM_LIT> ) , SDValue ( R , <NUM_LIT> ) ) ; ReplaceNode ( N , R ) ;


<s> SDValue Base = LD -> getBasePtr ( ) ; SDValue Offset = LD -> getOffset ( ) ; SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; EVT LoadedVT = LD -> getMemoryVT ( ) ; unsigned Opcode = <NUM_LIT> ; <STR_LIT> ExtType = LD -> getExtensionType ( ) ; bool IsZeroExt = ( ExtType == <STR_LIT> || ExtType == <STR_LIT> ) ; bool HasVecOffset = false ; if ( LoadedVT == <STR_LIT> ) { if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = <STR_LIT> ; else Opcode = <STR_LIT> ; } else if ( LoadedVT == <STR_LIT> ) { if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = <STR_LIT> ; else Opcode = <STR_LIT> ; } else if ( LoadedVT == <STR_LIT> ) { if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = IsZeroExt ? <STR_LIT> : <STR_LIT> ; else Opcode = IsZeroExt ? <STR_LIT> : <STR_LIT> ; } else if ( LoadedVT == <STR_LIT> ) { if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = IsZeroExt ? <STR_LIT> : <STR_LIT> ; else Opcode = IsZeroExt ? <STR_LIT> : <STR_LIT> ; } else if ( LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> ) { HasVecOffset = true ; bool Aligned = isAlignedMemNode ( LD ) ; if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = Aligned ? <STR_LIT> : <STR_LIT> ; else Opcode = Aligned ? <STR_LIT> : <STR_LIT> ; } else if ( LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> || LoadedVT == <STR_LIT> ) { if ( HST -> useHVXOps ( ) ) { bool Aligned = isAlignedMemNode ( LD ) ; HasVecOffset = true ; if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) Opcode = Aligned ? <STR_LIT> : <STR_LIT> ; else Opcode = Aligned ? <STR_LIT> : <STR_LIT> ; } } else llvm_unreachable ( <STR_LIT> ) ; if ( LD -> getValueType ( <NUM_LIT> ) == <STR_LIT> && IsZeroExt ) { SelectIndexedLoadZeroExtend64 ( LD , Opcode , dl ) ; return ; } if ( LD -> getValueType ( <NUM_LIT> ) == <STR_LIT> && ExtType == <STR_LIT> ) { SelectIndexedLoadSignExtend64 ( LD , Opcode , dl ) ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectIndexedLoadZeroExtend64 ( LoadSDNode * LD , unsigned Opcode , SDLoc dl ) { SDValue Chain = LD -> getChain ( ) ; EVT LoadedVT = LD -> getMemoryVT ( ) ; SDValue Base = LD -> getBasePtr ( ) ; SDValue Offset = LD -> getOffset ( ) ; SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; if ( HII -> isValidAutoIncImm ( LoadedVT , Val ) ) { SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , dl , <STR_LIT> ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , <STR_LIT> , Base , TargetConstVal , Chain ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , TargetConst0 , SDValue ( Result_1 , <NUM_LIT> ) ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = LD -> getMemOperand ( ) ; cast < MachineSDNode > ( Result_1 ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; const SDValue Froms [ ] = { SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) , SDValue ( LD , <NUM_LIT> ) } ;

const SDValue Tos [ ] = { SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) } ;


<s> else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> ) { if ( isAlignedMemNode ( ST ) ) Opcode = <STR_LIT> ; else Opcode = <STR_LIT> ; } else if ( StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> ) { if ( HST -> useHVXOps ( ) ) Opcode = isAlignedMemNode ( ST ) ? <STR_LIT> : <STR_LIT> ; } else llvm_unreachable ( <STR_LIT> ) ; if ( ST -> isTruncatingStore ( ) && ValueVT . getSizeInBits ( ) == <NUM_LIT> ) { assert ( StoredVT . getSizeInBits ( ) < <NUM_LIT> && <STR_LIT> ) ; Value = CurDAG -> getTargetExtractSubreg ( <STR_LIT> , dl , <STR_LIT> , Value ) ; } SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( Val , dl , <STR_LIT> ) , Value , Chain } ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( ST , Result ) ; ReplaceUses ( SDValue ( ST , <NUM_LIT> ) , SDValue ( Result , <NUM_LIT> ) ) ; CurDAG -> RemoveDeadNode ( ST ) ; return ; } SDValue Ops [ ] = { Base , CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) , Value , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> ) { if ( isAlignedMemNode ( ST ) ) Opcode = <STR_LIT> ; else Opcode = <STR_LIT> ; } else if ( StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> || StoredVT == <STR_LIT> ) { if ( isAlignedMemNode ( ST ) ) Opcode = <STR_LIT> ; else Opcode = <STR_LIT> ; } else llvm_unreachable ( <STR_LIT> ) ; SDValue TargetConstVal = CurDAG -> getTargetConstant ( Val , dl , <STR_LIT> ) ;

SDNode * Result_1 = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops ) ;


<s> } } } else if ( Shl_0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sub_0 = Shl_0 . getOperand ( <NUM_LIT> ) ; SDValue Sub_1 = Shl_0 . getOperand ( <NUM_LIT> ) ; if ( Sub_0 . getOpcode ( ) == <STR_LIT> ) { int32_t SubConst = cast < ConstantSDNode > ( Sub_0 . getNode ( ) ) -> getSExtValue ( ) ; if ( SubConst == <NUM_LIT> ) { if ( Sub_1 . getOpcode ( ) == <STR_LIT> ) { SDValue Shl2_0 = Sub_1 . getOperand ( <NUM_LIT> ) ; SDValue Shl2_1 = Sub_1 . getOperand ( <NUM_LIT> ) ; if ( Shl2_1 . getOpcode ( ) == <STR_LIT> ) { int32_t ShlConst = cast < ConstantSDNode > ( Shl_1 . getNode ( ) ) -> getSExtValue ( ) ; int32_t Shl2Const = cast < ConstantSDNode > ( Shl2_1 . getNode ( ) ) -> getSExtValue ( ) ; int32_t ValConst = <NUM_LIT> << ( ShlConst + Shl2Const ) ; SDValue Val = CurDAG -> getTargetConstant ( - ValConst , dl , <STR_LIT> ) ; if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Val . getNode ( ) ) ) if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { SDNode * Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Shl2_0 , Val ) ; ReplaceNode ( N , Result ) ; return ; } } } } } }


<s> SDValue Shl_0 = N -> getOperand ( <NUM_LIT> ) ; SDValue Shl_1 = N -> getOperand ( <NUM_LIT> ) ; if ( Shl_1 . getOpcode ( ) == <STR_LIT> ) { if ( Shl_0 . getOpcode ( ) == <STR_LIT> ) { SDValue Mul_0 = Shl_0 . getOperand ( <NUM_LIT> ) ; SDValue Mul_1 = Shl_0 . getOperand ( <NUM_LIT> ) ; if ( Mul_1 . getOpcode ( ) == <STR_LIT> ) { int32_t ShlConst = cast < ConstantSDNode > ( Shl_1 . getNode ( ) ) -> getSExtValue ( ) ; int32_t MulConst = cast < ConstantSDNode > ( Mul_1 . getNode ( ) ) -> getSExtValue ( ) ; int32_t ValConst = MulConst << ShlConst ; SDValue Val = CurDAG -> getTargetConstant ( ValConst , dl , <STR_LIT> ) ; if ( ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Val . getNode ( ) ) ) if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { SDNode * Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Mul_0 , Val ) ; ReplaceNode ( N , Result ) ; return ; } } } else if ( Shl_0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sub_0 = Shl_0 . getOperand ( <NUM_LIT> ) ; SDValue Sub_1 = Shl_0 . getOperand ( <NUM_LIT> ) ; if ( Sub_0 . getOpcode ( ) == <STR_LIT> ) { int32_t SubConst = cast < ConstantSDNode > ( Sub_0 . getNode ( ) ) -> getSExtValue ( ) ; if ( SubConst == <NUM_LIT> ) { if ( Sub_1 . getOpcode ( ) == <STR_LIT> ) {

SDValue Shl2_0 = Sub_1 . getOperand ( <NUM_LIT> ) ;


<s> SDNode * Mask = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Op0 ) ; unsigned NE = OpVT . getVectorNumElements ( ) ; EVT ExVT = N -> getValueType ( <NUM_LIT> ) ; unsigned ES = ExVT . getVectorElementType ( ) . getSizeInBits ( ) ; uint64_t MV = <NUM_LIT> , Bit = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NE ; ++ i ) { MV |= Bit ; Bit <<= ES ; } SDValue Ones = CurDAG -> getTargetConstant ( MV , dl , <STR_LIT> ) ; SDNode * OnesReg = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Ones ) ; if ( ExVT . getSizeInBits ( ) == <NUM_LIT> ) { SDNode * And = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Mask , <NUM_LIT> ) , SDValue ( OnesReg , <NUM_LIT> ) ) ; SDValue SubR = CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) ; ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , ExVT , SDValue ( And , <NUM_LIT> ) , SubR ) ) ; return ; } ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , ExVT , SDValue ( Mask , <NUM_LIT> ) , SDValue ( OnesReg , <NUM_LIT> ) ) ) ; return ; } SDNode * IsIntrinsic = N -> getOperand ( <NUM_LIT> ) . getNode ( ) ; if ( ( IsIntrinsic -> getOpcode ( ) == <STR_LIT> ) ) { unsigned ID = cast < ConstantSDNode > ( IsIntrinsic -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( doesIntrinsicReturnPredicate ( ID ) ) { if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; ReplaceNode ( N , Result_3 ) ; return ; } if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDNode * RsPd = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ;


<s> EVT ExVT = N -> getValueType ( <NUM_LIT> ) ; unsigned ES = ExVT . getVectorElementType ( ) . getSizeInBits ( ) ; uint64_t MV = <NUM_LIT> , Bit = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NE ; ++ i ) { MV |= Bit ; Bit <<= ES ; } SDValue Ones = CurDAG -> getTargetConstant ( MV , dl , <STR_LIT> ) ; SDNode * OnesReg = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , Ones ) ; if ( ExVT . getSizeInBits ( ) == <NUM_LIT> ) { SDNode * And = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Mask , <NUM_LIT> ) , SDValue ( OnesReg , <NUM_LIT> ) ) ; SDValue SubR = CurDAG -> getTargetConstant ( <STR_LIT> , dl , <STR_LIT> ) ; ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , ExVT , SDValue ( And , <NUM_LIT> ) , SubR ) ) ; return ; } ReplaceNode ( N , CurDAG -> getMachineNode ( <STR_LIT> , dl , ExVT , SDValue ( Mask , <NUM_LIT> ) , SDValue ( OnesReg , <NUM_LIT> ) ) ) ; return ; } SDNode * IsIntrinsic = N -> getOperand ( <NUM_LIT> ) . getNode ( ) ; if ( ( IsIntrinsic -> getOpcode ( ) == <STR_LIT> ) ) { unsigned ID = cast < ConstantSDNode > ( IsIntrinsic -> getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) ; if ( doesIntrinsicReturnPredicate ( ID ) ) { if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , dl , <STR_LIT> ) ; SDNode * Result_1 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ; SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; ReplaceNode ( N , Result_3 ) ; return ; } if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDNode * RsPd = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ; ReplaceNode ( N , RsPd ) ; return ; }


<s> unsigned SizeBits = ( F >> <STR_LIT> ) & <STR_LIT> ; unsigned Size = <NUM_LIT> << ( SizeBits - <NUM_LIT> ) ; SDLoc dl ( IntN ) ; MachinePointerInfo PI ; SDValue TS ; SDValue Loc = IntN -> getOperand ( <NUM_LIT> ) ; if ( Size >= <NUM_LIT> ) TS = CurDAG -> getStore ( SDValue ( LoadN , <NUM_LIT> ) , dl , SDValue ( LoadN , <NUM_LIT> ) , Loc , PI , false , false , Size ) ; else TS = CurDAG -> getTruncStore ( SDValue ( LoadN , <NUM_LIT> ) , dl , SDValue ( LoadN , <NUM_LIT> ) , Loc , PI , <STR_LIT> ( Size * <NUM_LIT> ) , false , false , Size ) ;


<s> inline SDValue XformM5ToU5Imm ( signed Imm , SDLoc DL ) { assert ( ( Imm >= - <NUM_LIT> && Imm <= - <NUM_LIT> ) && <STR_LIT> ) ;

return CurDAG -> getTargetConstant ( - Imm , DL , <STR_LIT> ) ;


<s> return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectSelect ( N ) ; case <STR_LIT> : return SelectTruncate ( N ) ; case <STR_LIT> : return SelectMul ( N ) ; case <STR_LIT> : return SelectZeroExtend ( N ) ; case <STR_LIT> : return SelectIntrinsicWOChain ( N ) ;


<s> } SDNode * Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , Src1 -> getOperand ( <NUM_LIT> ) , Src1 -> getOperand ( <NUM_LIT> ) ) ;


<s> SDValue Base = Const32 -> getOperand ( <NUM_LIT> ) ; EVT LoadedVT = LD -> getMemoryVT ( ) ; int64_t Offset = cast < GlobalAddressSDNode > ( Base ) -> getOffset ( ) ; if ( Offset != <NUM_LIT> && OffsetFitsS11 ( LoadedVT , Offset ) ) { MVT PointerTy = TLI . getPointerTy ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Base ) -> getGlobal ( ) ; SDValue TargAddr = CurDAG -> getTargetGlobalAddress ( GV , dl , PointerTy , <NUM_LIT> ) ; SDNode * NewBase = CurDAG -> getMachineNode ( <STR_LIT> , dl , PointerTy , TargAddr ) ; if ( LoadedVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( LoadedVT == <STR_LIT> ) Opcode = <STR_LIT> ;


<s> unsigned Opcode = <NUM_LIT> ; if ( ( Const32 -> getOpcode ( ) == <STR_LIT> ) && ! ( Value . getValueType ( ) == <STR_LIT> && ST -> isTruncatingStore ( ) ) ) { SDValue Base = Const32 -> getOperand ( <NUM_LIT> ) ; if ( Base . getOpcode ( ) == <STR_LIT> ) { EVT StoredVT = ST -> getMemoryVT ( ) ; int64_t Offset = cast < GlobalAddressSDNode > ( Base ) -> getOffset ( ) ; if ( Offset != <NUM_LIT> && OffsetFitsS11 ( StoredVT , Offset ) ) { MVT PointerTy = TLI . getPointerTy ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Base ) -> getGlobal ( ) ; SDValue TargAddr = CurDAG -> getTargetGlobalAddress ( GV , dl , PointerTy , <NUM_LIT> ) ; SDNode * NewBase = CurDAG -> getMachineNode ( <STR_LIT> , dl , PointerTy , TargAddr ) ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else assert ( <NUM_LIT> && <STR_LIT> ) ; SDValue Ops [ ] = { SDValue ( NewBase , <NUM_LIT> ) , CurDAG -> getTargetConstant ( Offset , PointerTy ) , Value , Chain } ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops , <NUM_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( ST , Result ) ; return Result ;


<s> if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else assert ( <NUM_LIT> && <STR_LIT> ) ; SDValue Ops [ ] = { SDValue ( NewBase , <NUM_LIT> ) , CurDAG -> getTargetConstant ( Offset , PointerTy ) , Value , Chain } ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , Ops , <NUM_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ; ReplaceUses ( ST , Result ) ; return Result ; } } }


<s> SDNode * <ISA_LIT>DAGToDAGISel :: SelectConstant ( SDNode * N ) { DebugLoc dl = N -> getDebugLoc ( ) ; if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDNode * Result ; int32_t Val = cast < ConstantSDNode > ( N ) -> getSExtValue ( ) ; if ( Val == - <NUM_LIT> ) { SDNode * IntRegTFR = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ) ; SDNode * Pd = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IntRegTFR , <NUM_LIT> ) ) ; SDNode * NotPd = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Pd , <NUM_LIT> ) ) ; Result = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Pd , <NUM_LIT> ) , SDValue ( NotPd , <NUM_LIT> ) ) ; ReplaceUses ( N , Result ) ; return Result ; } }


<s> int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; EVT StoredVT = ST -> getMemoryVT ( ) ; if ( TII -> isValidAutoIncImm ( StoredVT , Val ) ) { SDValue Ops [ ] = { Value , Base , CurDAG -> getTargetConstant ( Val , <STR_LIT> ) , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else assert ( <NUM_LIT> && <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ;

cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: SelectIndexedStore ( StoreSDNode * ST , DebugLoc dl ) { SDValue Chain = ST -> getChain ( ) ; SDValue Base = ST -> getBasePtr ( ) ; SDValue Offset = ST -> getOffset ( ) ; SDValue Value = ST -> getValue ( ) ; SDNode * OffsetNode = Offset . getNode ( ) ; int32_t Val = cast < ConstantSDNode > ( OffsetNode ) -> getSExtValue ( ) ; EVT StoredVT = ST -> getMemoryVT ( ) ; if ( TII -> isValidAutoIncImm ( StoredVT , Val ) ) { SDValue Ops [ ] = { Value , Base , CurDAG -> getTargetConstant ( Val , <STR_LIT> ) , Chain } ; unsigned Opcode = <NUM_LIT> ; if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else if ( StoredVT == <STR_LIT> ) Opcode = <STR_LIT> ; else assert ( <NUM_LIT> && <STR_LIT> ) ; SDNode * Result = CurDAG -> getMachineNode ( Opcode , dl , <STR_LIT> , <STR_LIT> , Ops , <NUM_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ; MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ; cast < MachineSDNode > ( Result ) -> setMemRefs ( MemOp , MemOp + <NUM_LIT> ) ;


<s> if ( IntrinsicWithPred ) { SmallVector < SDValue , <NUM_LIT> > Ops ; const MCInstrDesc & MCID = TII -> get ( IntrinsicWithPred ) ; const TargetRegisterInfo * TRI = TM . getRegisterInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i < N -> getNumOperands ( ) ; ++ i ) { SDNode * Arg = N -> getOperand ( i ) . getNode ( ) ; const TargetRegisterClass * RC = TII -> getRegClass ( MCID , i , TRI ) ; if ( RC == <STR_LIT> || RC == <STR_LIT> ) { Ops . push_back ( SDValue ( Arg , <NUM_LIT> ) ) ; } else if ( RC == <STR_LIT> ) { SDNode * PdRs = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Arg , <NUM_LIT> ) ) ; Ops . push_back ( SDValue ( PdRs , <NUM_LIT> ) ) ;

} else if ( RC == NULL && ( dyn_cast < ConstantSDNode > ( Arg ) != NULL ) ) {


<s> SDNode * Arg = N -> getOperand ( i ) . getNode ( ) ; const TargetRegisterClass * RC = TII -> getRegClass ( MCID , i , TRI ) ; if ( RC == <STR_LIT> || RC == <STR_LIT> ) { Ops . push_back ( SDValue ( Arg , <NUM_LIT> ) ) ; } else if ( RC == <STR_LIT> ) { SDNode * PdRs = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( Arg , <NUM_LIT> ) ) ; Ops . push_back ( SDValue ( PdRs , <NUM_LIT> ) ) ; } else if ( RC == NULL && ( dyn_cast < ConstantSDNode > ( Arg ) != NULL ) ) { int32_t Val = cast < ConstantSDNode > ( Arg ) -> getSExtValue ( ) ;

SDValue SDVal = CurDAG -> getTargetConstant ( Val , <STR_LIT> ) ;


<s> SDValue OP0 ; SDValue OP1 ; if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { SDValue Sext0 = MulOp0 . getOperand ( <NUM_LIT> ) ; if ( Sext0 . getNode ( ) -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) { SelectCode ( N ) ; } OP0 = Sext0 ; } else if ( MulOp0 . getOpcode ( ) == <STR_LIT> ) { LoadSDNode * LD = cast < LoadSDNode > ( MulOp0 . getNode ( ) ) ; if ( LD -> getMemoryVT ( ) != <STR_LIT> || LD -> getExtensionType ( ) != <STR_LIT> || LD -> getAddressingMode ( ) != <STR_LIT> ) { SelectCode ( N ) ; } SDValue Chain = LD -> getChain ( ) ; SDValue TargetConst0 = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; OP0 = SDValue ( CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , LD -> getBasePtr ( ) , TargetConst0 , Chain ) , <NUM_LIT> ) ; } else { return SelectCode ( N ) ; } if ( MulOp1 . getOpcode ( ) == <STR_LIT> ) { SDValue Sext1 = MulOp1 . getOperand ( <NUM_LIT> ) ; if ( Sext1 . getNode ( ) -> getValueType ( <NUM_LIT> ) != <STR_LIT> ) { return SelectCode ( N ) ; } OP1 = Sext1 ; } else if ( MulOp1 . getOpcode ( ) == <STR_LIT> ) { LoadSDNode * LD = cast < LoadSDNode > ( MulOp1 . getNode ( ) ) ; if ( LD -> getMemoryVT ( ) != <STR_LIT> || LD -> getExtensionType ( ) != <STR_LIT> || LD -> getAddressingMode ( ) != <STR_LIT> ) { return SelectCode ( N ) ; } SDValue Chain = LD -> getChain ( ) ;


<s> SDNode * Result_2 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , TargetConst0 ) ; SDNode * Result_3 = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , <STR_LIT> , SDValue ( Result_2 , <NUM_LIT> ) , SDValue ( Result_1 , <NUM_LIT> ) ) ; ReplaceUses ( N , Result_3 ) ; return Result_3 ; } if ( N -> getValueType ( <NUM_LIT> ) == <STR_LIT> ) { SDNode * RsPd = CurDAG -> getMachineNode ( <STR_LIT> , dl , <STR_LIT> , SDValue ( IsIntrinsic , <NUM_LIT> ) ) ; ReplaceUses ( N , RsPd ) ; return RsPd ; } assert ( <NUM_LIT> && <STR_LIT> ) ; } }


<s> case <STR_LIT> : return SelectBitcast ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectIntrinsicWChain ( N ) ; case <STR_LIT> : return SelectIntrinsicWOChain ( N ) ; case <STR_LIT> : return SelectVAlign ( N ) ; case <STR_LIT> : return SelectVAlignAddr ( N ) ; case <STR_LIT> : return SelectTypecast ( N ) ;

case <STR_LIT> : return SelectP2D ( N ) ;


<s> void <ISA_LIT>DAGToDAGISel :: SelectBitcast ( SDNode * N ) { EVT SVT = N -> getOperand ( <NUM_LIT> ) . getValueType ( ) ; EVT DVT = N -> getValueType ( <NUM_LIT> ) ; if ( ! SVT . isVector ( ) || ! DVT . isVector ( ) || SVT . getVectorElementType ( ) == <STR_LIT> || DVT . getVectorElementType ( ) == <STR_LIT> || SVT . getSizeInBits ( ) != DVT . getSizeInBits ( ) ) { SelectCode ( N ) ; return ; } ReplaceUses ( SDValue ( N , <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) ) ; CurDAG -> RemoveDeadNode ( N ) ;


<s> Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( isAlignedMemNode ( ST ) ) { if ( ST -> isNonTemporal ( ) ) Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; else Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } else { Opcode = IsValidInc ? <STR_LIT> : <STR_LIT> ; } break ; default : llvm_unreachable ( <STR_LIT> ) ; } if ( ST -> isTruncatingStore ( ) && ValueVT . getSizeInBits ( ) == <NUM_LIT> ) { assert ( StoredVT . getSizeInBits ( ) < <NUM_LIT> && <STR_LIT> ) ; Value = CurDAG -> getTargetExtractSubreg ( <STR_LIT> , dl , <STR_LIT> , Value ) ; } SDValue IncV = CurDAG -> getTargetConstant ( Inc , dl , <STR_LIT> ) ; MachineSDNode :: mmo_iterator MemOp = MF -> allocateMemRefsArray ( <NUM_LIT> ) ;

MemOp [ <NUM_LIT> ] = ST -> getMemOperand ( ) ;


<s> if ( N -> isMachineOpcode ( ) ) return N -> setNodeId ( - <NUM_LIT> ) ; switch ( N -> getOpcode ( ) ) { case <STR_LIT> : return SelectConstant ( N ) ; case <STR_LIT> : return SelectConstantFP ( N ) ; case <STR_LIT> : return SelectFrameIndex ( N ) ; case <STR_LIT> : return SelectBitcast ( N ) ;

case <STR_LIT> : return SelectSHL ( N ) ;


<s> void <ISA_LIT>DAGToDAGISel :: Select ( SDNode * N ) { if ( N -> isMachineOpcode ( ) ) return N -> setNodeId ( - <NUM_LIT> ) ; switch ( N -> getOpcode ( ) ) { case <STR_LIT> : return SelectConstant ( N ) ; case <STR_LIT> : return SelectConstantFP ( N ) ; case <STR_LIT> : return SelectFrameIndex ( N ) ; case <STR_LIT> : return SelectBitcast ( N ) ; case <STR_LIT> : return SelectSHL ( N ) ; case <STR_LIT> : return SelectLoad ( N ) ; case <STR_LIT> : return SelectStore ( N ) ; case <STR_LIT> : return SelectZeroExtend ( N ) ; case <STR_LIT> : return SelectIntrinsicWChain ( N ) ; case <STR_LIT> : return SelectIntrinsicWOChain ( N ) ; }


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & tm , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( tm , OptLevel ) , HTM ( tm ) , HST ( nullptr ) , HII ( nullptr ) , HRI ( nullptr ) {


<s> if ( auto * FN = dyn_cast < FrameIndexSDNode > ( N -> getOperand ( <NUM_LIT> ) ) ) { MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ; unsigned A = MFI -> getObjectAlignment ( FN -> getIndex ( ) ) ;