<s> bool <ISA_LIT>MCInstrInfo :: isPredicateLate ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ;


<s> bool <ISA_LIT>MCInstrInfo :: isPredicateLate ( MCInstrInfo const & MCII , MCInst const & MCI ) {

const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ;


<s> return ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isPredReg ( unsigned Reg ) { return ( Reg >= <STR_LIT> && Reg <= <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isPrefix ( MCInstrInfo const & MCII , MCInst const & MCI ) {

return <STR_LIT> == <ISA_LIT>MCInstrInfo :: getType ( MCII , MCI ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isRestrictNoSlot1Store ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isRestrictSlot1AOK ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ;

return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> const uint64_t F = MCII . get ( MCI . getOpcode ( ) ) . TSFlags ;


<s> bool <ISA_LIT>MCInstrInfo :: isSoloAX ( MCInstrInfo const & MCII , MCInst const & MCI ) {


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> if ( ( getType ( MCII , MCI ) <= <STR_LIT> ) && ( getType ( MCII , MCI ) >= <STR_LIT> ) ) return true ; return false ;


<s> if ( MCI . size ( ) <= Index ) return Sentinal ; MCOperand const & MCO = MCI . getOperand ( Index ) ; if ( ! MCO . isExpr ( ) ) return Sentinal ; int64_t Value ;

if ( ! MCO . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return Sentinal ;


<s> bool <ISA_LIT>MCInstrInfo :: mustExtend ( MCExpr const & Expr ) { <ISA_LIT>MCExpr const & HExpr = cast < <ISA_LIT>MCExpr > ( Expr ) ; return HExpr . mustExtend ( ) ;


<s> <ISA_LIT>MCExpr const & HExpr = cast < <ISA_LIT>MCExpr > ( Expr ) ;


<s> MCInst Nop ; Nop . setOpcode ( <STR_LIT> ) ; assert ( isBundle ( MCB ) ) ; while ( ( <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_INNER_SIZE ) ) || ( ( <ISA_LIT>MCInstrInfo :: isOuterLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_OUTER_SIZE ) ) ) ) MCB . addOperand ( MCOperand :: createInst ( new ( Context ) MCInst ( Nop ) ) ) ;


<s> if ( ! isPredicated ( MCII , MCI ) ) return { <NUM_LIT> , <NUM_LIT> , false } ; MCInstrDesc const & Desc = getDesc ( MCII , MCI ) ; for ( auto I = Desc . getNumDefs ( ) , N = Desc . getNumOperands ( ) ; I != N ; ++ I ) if ( Desc . OpInfo [ I ] . RegClass == <STR_LIT> ) return { MCI . getOperand ( I ) . getReg ( ) , I , isPredicatedTrue ( MCII , MCI ) } ;


<s> for ( auto I = Desc . getNumDefs ( ) , N = Desc . getNumOperands ( ) ; I != N ; ++ I ) if ( Desc . OpInfo [ I ] . RegClass == <STR_LIT> ) return { MCI . getOperand ( I ) . getReg ( ) , I , isPredicatedTrue ( MCII , MCI ) } ;


<s> bool <ISA_LIT>MCInstrInfo :: prefersSlot3 ( MCInstrInfo const & MCII , MCInst const & MCI ) {


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( F >> <STR_LIT> ) & <STR_LIT> ;


<s> MCInst * Duplex = deriveDuplex ( Context , Candidate . iClass , * MCB . getOperand ( Candidate . packetIndexJ ) . getInst ( ) , * MCB . getOperand ( Candidate . packetIndexI ) . getInst ( ) ) ; assert ( Duplex != nullptr ) ; MCB . getOperand ( Candidate . packetIndexI ) . setInst ( Duplex ) ;

MCB . erase ( MCB . begin ( ) + Candidate . packetIndexJ ) ;


<s> assert ( Candidate . packetIndexJ < MCB . size ( ) ) ; assert ( isBundle ( MCB ) ) ; MCInst * Duplex = deriveDuplex ( Context , Candidate . iClass , * MCB . getOperand ( Candidate . packetIndexJ ) . getInst ( ) , * MCB . getOperand ( Candidate . packetIndexI ) . getInst ( ) ) ; assert ( Duplex != nullptr ) ; MCB . getOperand ( Candidate . packetIndexI ) . setInst ( Duplex ) ;


<s> if ( ! HExpr ) return false ; return HExpr -> s27_2_reloc ( ) ;


<s> bool <ISA_LIT>MCInstrInfo :: s27_2_reloc ( MCExpr const & Expr ) { <ISA_LIT>MCExpr const * HExpr = dyn_cast < <ISA_LIT>MCExpr > ( & Expr ) ; if ( ! HExpr ) return false ;


<s> Operand . setImm ( Operand . getImm ( ) | innerLoopMask ) ;


<s> Operand . setImm ( Operand . getImm ( ) | memReorderDisabledMask ) ; assert ( isMemReorderDisabled ( MCI ) ) ;


MCOperand & Operand = MCI . getOperand ( <NUM_LIT> ) ;


<s> void <ISA_LIT>MCInstrInfo :: setMustExtend ( MCExpr const & Expr , bool Val ) {

<ISA_LIT>MCExpr & HExpr = const_cast < <ISA_LIT>MCExpr & > ( cast < <ISA_LIT>MCExpr > ( Expr ) ) ;


<s> void <ISA_LIT>MCInstrInfo :: setMustNotExtend ( MCExpr const & Expr , bool Val ) { <ISA_LIT>MCExpr & HExpr = const_cast < <ISA_LIT>MCExpr & > ( cast < <ISA_LIT>MCExpr > ( Expr ) ) ;


<s> if ( Producer >= <STR_LIT> && Producer <= <STR_LIT> ) if ( Consumer >= <STR_LIT> && Consumer <= <STR_LIT> ) return ( Consumer - <STR_LIT> ) & <NUM_LIT> ; if ( Producer2 != <STR_LIT> ) return Consumer == Producer ;


<s> PredicateInfo ( unsigned Register , unsigned Operand , bool PredicatedTrue ) : Register ( Register ) , Operand ( Operand ) , PredicatedTrue ( PredicatedTrue ) {


<s> assert ( IsVecRegPair ( VecRegPair ) && <STR_LIT> ) ; const bool IsRev = IsReverseVecRegPair ( VecRegPair ) ; const unsigned PairIndex = <NUM_LIT> * ( IsRev ? VecRegPair - <STR_LIT> : VecRegPair - <STR_LIT> ) ; return IsRev ? std :: make_pair ( PairIndex , PairIndex + <NUM_LIT> ) : std :: make_pair ( PairIndex + <NUM_LIT> , PairIndex ) ;


<s> bool <ISA_LIT>MCInstrInfo :: IsReverseVecRegPair ( unsigned VecReg ) {

return ( VecReg >= <STR_LIT> && VecReg <= <STR_LIT> ) ;


<s> const unsigned ProdPairIndex = IsReverseVecRegPair ( Producer ) ? Producer - <STR_LIT> : Producer - <STR_LIT> ; const unsigned ConsumerSingleIndex = ( Consumer - <STR_LIT> ) >> <NUM_LIT> ;

return ConsumerSingleIndex == ProdPairIndex ;


<s> return ( VecReg >= <STR_LIT> && VecReg <= <STR_LIT> ) || ( VecReg >= <STR_LIT> && VecReg <= <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: IsVecRegSingle ( unsigned VecReg ) {


<s> unsigned <ISA_LIT>MCInstrInfo :: SubregisterBit ( unsigned Consumer , unsigned Producer , unsigned Producer2 ) { if ( IsVecRegPair ( Producer ) && IsVecRegSingle ( Consumer ) ) return ( Consumer - <STR_LIT> ) & <NUM_LIT> ; if ( Producer2 != <STR_LIT> ) return Consumer == Producer ;


<s> if ( ! <ISA_LIT>DisableCompound ) <ISA_LIT>MCInstrInfo :: tryCompound ( MCII , STI , Context , MCB ) ; <ISA_LIT>MCShuffle ( Context , false , MCII , STI , MCB ) ; MCInst InstBundlePreDuplex = MCInst ( MCB ) ; if ( ! <ISA_LIT>DisableDuplex ) { SmallVector < DuplexCandidate , <NUM_LIT> > possibleDuplexes ; possibleDuplexes = <ISA_LIT>MCInstrInfo :: getDuplexPossibilties ( MCII , STI , MCB ) ; <ISA_LIT>MCShuffle ( Context , MCII , STI , MCB , possibleDuplexes ) ; } <ISA_LIT>MCInstrInfo :: padEndloop ( MCB , Context ) ;

if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) return false ;


<s> int <ISA_LIT>MCInstrInfo :: getMaxValue ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; bool S = ( F >> <STR_LIT> ) & <STR_LIT> ; assert ( <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) ; if ( S ) return ( <NUM_LIT> << ( <ISA_LIT>MCInstrInfo :: getExtentBits ( MCII , MCI ) - <NUM_LIT> ) ) - <NUM_LIT> ;

return ( <NUM_LIT> << <ISA_LIT>MCInstrInfo :: getExtentBits ( MCII , MCI ) ) - <NUM_LIT> ;


<s> assert ( <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) ;

if ( S ) return ( <NUM_LIT> << ( <ISA_LIT>MCInstrInfo :: getExtentBits ( MCII , MCI ) - <NUM_LIT> ) ) - <NUM_LIT> ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; bool S = ( F >> <STR_LIT> ) & <STR_LIT> ; assert ( <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) ;

if ( S ) return - ( <NUM_LIT> << ( <ISA_LIT>MCInstrInfo :: getExtentBits ( MCII , MCI ) - <NUM_LIT> ) ) ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; bool S = ( F >> <STR_LIT> ) & <STR_LIT> ;

assert ( <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) ;


<s> MCOperand const & MCO = MCI . getOperand ( O ) ;

assert ( ( <ISA_LIT>MCInstrInfo :: isNewValue ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: hasNewValue ( MCII , MCI ) ) && MCO . isReg ( ) ) ;


<s> assert ( ( <ISA_LIT>MCInstrInfo :: isNewValue ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: hasNewValue ( MCII , MCI ) ) && MCO . isReg ( ) ) ;


<s> for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCII , MCI ) ) { if ( <ISA_LIT>MCInstrInfo :: isDuplex ( MCII , I ) ) return true ; }


<s> bool <ISA_LIT>MCInstrInfo :: hasDuplex ( MCInstrInfo const & MCII , MCInst const & MCI ) { if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCI ) ) return false ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCII , MCI ) ) { if ( <ISA_LIT>MCInstrInfo :: isDuplex ( MCII , I ) ) return true ; } return false ;


<s> if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCI ) ) return false ; for ( const auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCI ) ) {

if ( isImmext ( * I . getInst ( ) ) ) return true ;


<s> unsigned <ISA_LIT>MCInstrInfo :: SubregisterBit ( unsigned Consumer , unsigned Producer , unsigned Producer2 ) {

if ( Producer >= <STR_LIT> && Producer <= <STR_LIT> ) if ( Consumer >= <STR_LIT> && Consumer <= <STR_LIT> ) return ( Consumer - <STR_LIT> ) & <NUM_LIT> ;


<s> iterator_range < MCInst :: const_iterator > <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCInst const & MCI ) { assert ( isBundle ( MCI ) ) ; return iterator_range < MCInst :: const_iterator > ( MCI . begin ( ) + bundleInstructionsOffset , MCI . end ( ) ) ;


<s> unsigned Shift = <ISA_LIT>MCInstrInfo :: getExtentAlignment ( MCII , MCI ) ; int64_t Bits = exOp . getImm ( ) ; exOp . setImm ( ( Bits & <NUM_LIT> ) << Shift ) ;


<s> MCOperand & exOp = MCI . getOperand ( <ISA_LIT>MCInstrInfo :: getExtendableOp ( MCII , MCI ) ) ; if ( exOp . isImm ( ) ) { unsigned Shift = <ISA_LIT>MCInstrInfo :: getExtentAlignment ( MCII , MCI ) ; int64_t Bits = exOp . getImm ( ) ; exOp . setImm ( ( Bits & <NUM_LIT> ) << Shift ) ;


<s> if ( <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) return true ; if ( ! <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) ) return false ; short ExtOpNum = <ISA_LIT>MCInstrInfo :: getCExtOpNum ( MCII , MCI ) ; int MinValue = <ISA_LIT>MCInstrInfo :: getMinValue ( MCII , MCI ) ; int MaxValue = <ISA_LIT>MCInstrInfo :: getMaxValue ( MCII , MCI ) ; MCOperand const & MO = MCI . getOperand ( ExtOpNum ) ; if ( MO . isExpr ( ) ) return true ; assert ( MO . isImm ( ) && <STR_LIT> ) ; int ImmValue = MO . getImm ( ) ; return ( ImmValue < MinValue || ImmValue > MaxValue ) ;


<s> int MaxValue = <ISA_LIT>MCInstrInfo :: getMaxValue ( MCII , MCI ) ; MCOperand const & MO = MCI . getOperand ( ExtOpNum ) ; if ( MO . isExpr ( ) ) return true ;

assert ( MO . isImm ( ) && <STR_LIT> ) ;


<s> assert ( isBundle ( MCB ) ) ; while ( ( <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_INNER_SIZE ) ) || ( ( <ISA_LIT>MCInstrInfo :: isOuterLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_OUTER_SIZE ) ) ) ) MCB . addOperand ( MCOperand :: createInst ( new MCInst ( Nop ) ) ) ;


<s> while ( ( <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_INNER_SIZE ) ) || ( ( <ISA_LIT>MCInstrInfo :: isOuterLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_OUTER_SIZE ) ) ) ) MCB . addOperand ( MCOperand :: createInst ( new MCInst ( Nop ) ) ) ;


<s> <ISA_LIT>MCExpr const * HExpr = llvm :: dyn_cast < <ISA_LIT>MCExpr > ( & Expr ) ; if ( ! HExpr ) return false ;


<s> if ( ! HExpr ) return false ; return HExpr -> s27_2_reloc ( ) ;


<s> <ISA_LIT>MCExpr & HExpr = const_cast < <ISA_LIT>MCExpr & > ( * llvm :: cast < <ISA_LIT>MCExpr > ( & Expr ) ) ; HExpr . setS27_2_reloc ( Val ) ;


<s> unsigned Shift = <ISA_LIT>MCInstrInfo :: getExtentAlignment ( MCII , MCI ) ; exOp . setExpr ( MCConstantExpr :: create ( ( Value & <NUM_LIT> ) << Shift , Context ) ) ;


<s> assert ( <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) ; MCOperand & exOp = MCI . getOperand ( <ISA_LIT>MCInstrInfo :: getExtendableOp ( MCII , MCI ) ) ; int64_t Value ; if ( exOp . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) { unsigned Shift = <ISA_LIT>MCInstrInfo :: getExtentAlignment ( MCII , MCI ) ; exOp . setExpr ( MCConstantExpr :: create ( ( Value & <NUM_LIT> ) << Shift , Context ) ) ;


<s> else if ( ! <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) ) return false ; MCOperand const & MO = <ISA_LIT>MCInstrInfo :: getExtendableOperand ( MCII , MCI ) ; assert ( ! MO . isImm ( ) ) ; int64_t Value ; if ( ! MO . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return true ; int MinValue = <ISA_LIT>MCInstrInfo :: getMinValue ( MCII , MCI ) ; int MaxValue = <ISA_LIT>MCInstrInfo :: getMaxValue ( MCII , MCI ) ;

return ( MinValue > Value || Value > MaxValue ) ;


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> <ISA_LIT>MCChecker PerfCheck ( * BaseCheck , STI , false ) ; if ( canonicalizePacketImpl ( MCII , STI , Context , MCB , & PerfCheck ) ) return true ; <ISA_LIT>MCChecker ArchCheck ( * BaseCheck , * ArchSTI , true ) ;

return canonicalizePacketImpl ( MCII , * ArchSTI , Context , MCB , & ArchCheck ) ;


<s> possibleDuplexes = <ISA_LIT>MCInstrInfo :: getDuplexPossibilties ( MCII , STI , MCB ) ; <ISA_LIT>MCShuffle ( Context , MCII , STI , MCB , possibleDuplexes ) ; } <ISA_LIT>MCInstrInfo :: padEndloop ( MCB , Context ) ; if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) { if ( Check ) Check -> reportError ( <STR_LIT> ) ; return false ; } CheckOk = Check ? Check -> check ( true ) : true ; if ( ! CheckOk ) return false ;

<ISA_LIT>MCShuffle ( Context , true , MCII , STI , MCB ) ;


<s> const InstrItinerary * II = STI . getSchedModel ( ) . InstrItineraries ; int SchedClass = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . getSchedClass ( ) ;

int Size = II [ SchedClass ] . LastStage - II [ SchedClass ] . FirstStage ;


<s> int Size = II [ SchedClass ] . LastStage - II [ SchedClass ] . FirstStage ; unsigned Stage = II [ SchedClass ] . LastStage - <NUM_LIT> ; if ( Size < <NUM_LIT> ) return <NUM_LIT> ;

return ( ( Stage + <ISA_LIT>Stages ) -> getUnits ( ) ) ;


<s> assert ( isBundle ( MCB ) ) ; assert ( Index < HEXAGON_PRESHUFFLE_PACKET_SIZE ) ; return * MCB . getOperand ( bundleInstructionsOffset + Index ) . getInst ( ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isNewValueStore ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( F >> <STR_LIT> ) & <STR_LIT> ;


<s> auto & PredRegClass = MRI . getRegClass ( <STR_LIT> ) ; return PredRegClass . contains ( Reg ) ;


<s> return Inst . getOperand ( I ) . isReg ( ) && Desc . OpInfo [ I ] . RegClass == <STR_LIT> ;


<s> MCInstrDesc const & Desc = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , Inst ) ;

return Inst . getOperand ( I ) . isReg ( ) && Desc . OpInfo [ I ] . RegClass == <STR_LIT> ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( F >> <STR_LIT> ) & <STR_LIT> ;


<s> return llvm :: StringSwitch < unsigned > ( CPU ) . Case ( <STR_LIT> , <NUM_LIT> ) . Default ( <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>MCInstrInfo :: packetSizeSlots ( MCSubtargetInfo const & STI ) {

const bool IsTiny = STI . getFeatureBits ( ) [ <STR_LIT> ] ;


<s> bool <ISA_LIT>MCInstrInfo :: requiresSlot ( MCSubtargetInfo const & STI , MCInst const & MCI ) { const unsigned OpCode = MCI . getOpcode ( ) ;


<s> MCInst const & MCI = * HMI . getInst ( ) ; if ( ! requiresSlot ( STI , MCI ) ) continue ; if ( isDuplex ( MCII , MCI ) ) slotsUsed += <NUM_LIT> ; else ++ slotsUsed ; }


<s> unsigned <ISA_LIT>MCInstrInfo :: slotsConsumed ( MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCInst const & MCI ) {


<s> if ( ! CheckOk ) return false ; if ( ! <ISA_LIT>DisableCompound ) <ISA_LIT>MCInstrInfo :: tryCompound ( MCII , STI , Context , MCB ) ; <ISA_LIT>MCShuffle ( false , MCII , STI , MCB ) ; MCInst InstBundlePreDuplex = MCInst ( MCB ) ; if ( ! <ISA_LIT>DisableDuplex ) { SmallVector < DuplexCandidate , <NUM_LIT> > possibleDuplexes ; possibleDuplexes = <ISA_LIT>MCInstrInfo :: getDuplexPossibilties ( MCII , STI , MCB ) ; <ISA_LIT>MCShuffle ( MCII , STI , Context , MCB , possibleDuplexes ) ; } <ISA_LIT>MCInstrInfo :: padEndloop ( MCB , Context ) ; if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) return false ;

CheckOk = Check ? Check -> check ( true ) : true ;


<s> <ISA_LIT>MCInstrInfo :: padEndloop ( MCB , Context ) ; if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) return false ; CheckOk = Check ? Check -> check ( true ) : true ; if ( ! CheckOk ) return false ; <ISA_LIT>MCShuffle ( true , MCII , STI , MCB ) ; return true ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; <STR_LIT> Target = static_cast < <STR_LIT> > ( ( F >> <STR_LIT> ) & <STR_LIT> ) ; switch ( Target ) { default : return <STR_LIT> ; case <STR_LIT> :


<s> for ( const auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCI ) ) { auto MI = I . getInst ( ) ; if ( <ISA_LIT>MCInstrInfo :: isDuplex ( MCII , * MI ) ) return true ; }


<s> for ( const auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCI ) ) {


<s> iterator_range < MCInst :: const_iterator > <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCInst const & MCI ) { assert ( isBundle ( MCI ) ) ; return drop_begin ( MCI , bundleInstructionsOffset ) ;


<s> switch ( MCI . getOpcode ( ) ) { default : return false ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : return true ;


<s> MCI . addOperand ( MCOperand :: CreateInst ( nullptr ) ) ;


<s> SanityCheckImplicitOperands ( MCI ) ; std :: bitset < <NUM_LIT> > Bits ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . getImm ( ) ) ;


<s> unsigned const O = ( F >> <STR_LIT> ) & <STR_LIT> ; MCOperand const & MCO = MCI . getOperand ( O ) ; assert ( ( <ISA_LIT>MCInstrInfo :: isNewValue ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: hasNewValue ( MCII , MCI ) ) && MCO . isReg ( ) ) ; return ( MCO ) ;


<s> uint64_t const F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; unsigned const O = ( F >> <STR_LIT> ) & <STR_LIT> ; MCOperand const & MCO = MCI . getOperand ( O ) ; assert ( ( <ISA_LIT>MCInstrInfo :: isNewValue ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: hasNewValue ( MCII , MCI ) ) && MCO . isReg ( ) ) ; return ( MCO ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isPacketBegin ( MCInst const & MCI ) {

std :: bitset < <NUM_LIT> > Bits ( GetImplicitBits ( MCI ) ) ;


<s> std :: bitset < <NUM_LIT> > Bits ( GetImplicitBits ( MCI ) ) ;


<s> void <ISA_LIT>MCInstrInfo :: resetPacket ( MCInst & MCI ) {


<s> setPacketBegin ( MCI , false ) ; setPacketEnd ( MCI , false ) ;


<s> void <ISA_LIT>MCInstrInfo :: SetImplicitBits ( MCInst & MCI , std :: bitset < <NUM_LIT> > Bits ) { SanityCheckImplicitOperands ( MCI ) ;

MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . setImm ( Bits . to_ulong ( ) ) ;


<s> MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . setImm ( Bits . to_ulong ( ) ) ;


<s> Bits . set ( packetBeginIndex , f ) ; SetImplicitBits ( MCI , Bits ) ;


<s> Bits . set ( packetEndIndex , f ) ; SetImplicitBits ( MCI , Bits ) ;


<s> void <ISA_LIT>MCInstrInfo :: setPacketEnd ( MCInst & MCI , bool f ) { std :: bitset < <NUM_LIT> > Bits ( GetImplicitBits ( MCI ) ) ;


<s> assert ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . isInst ( ) && <STR_LIT> ) ;

assert ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . isImm ( ) && <STR_LIT> ) ;


<s> inline void SanityCheckImplicitOperands ( MCInst const & MCI ) { assert ( MCI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; assert ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . isInst ( ) && <STR_LIT> ) ; assert ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . isImm ( ) && <STR_LIT> ) ;


<s> if ( ! CheckOk ) return false ; MCInst OrigMCB = MCB ; if ( ! <ISA_LIT>DisableCompound ) <ISA_LIT>MCInstrInfo :: tryCompound ( MCII , STI , Context , MCB ) ; <ISA_LIT>MCShuffle ( Context , false , MCII , STI , MCB ) ; const SmallVector < DuplexCandidate , <NUM_LIT> > possibleDuplexes = ( STI . getFeatureBits ( ) [ <STR_LIT> ] ) ? <ISA_LIT>MCInstrInfo :: getDuplexPossibilties ( MCII , STI , MCB ) : SmallVector < DuplexCandidate , <NUM_LIT> > ( ) ;

<ISA_LIT>MCShuffle ( Context , MCII , STI , MCB , possibleDuplexes ) ;


<s> assert ( ! <ISA_LIT>MCInstrInfo :: isBundle ( I ) ) ; MCInstrDesc const & Desc = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , I ) ; return ( Desc . isBranch ( ) || Desc . isCall ( ) || Desc . isReturn ( ) ) ;


<s> bool <ISA_LIT>MCInstrInfo :: LoopNeedsPadding ( MCInst const & MCB ) { return ( ( <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_INNER_SIZE ) ) || ( ( <ISA_LIT>MCInstrInfo :: isOuterLoop ( MCB ) && ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_OUTER_SIZE ) ) ) ) ;


<s> MCOperand const & MCO = MCI . getOperand ( Index ) ; if ( ! MCO . isExpr ( ) ) return Sentinel ; int64_t Value ; if ( ! MCO . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return Sentinel ;


while ( LoopNeedsPadding ( MCB ) ) MCB . addOperand ( MCOperand :: createInst ( new ( Context ) MCInst ( Nop ) ) ) ;


<s> MCInst * XMCI = new ( Context ) MCInst ( <ISA_LIT>MCInstrInfo :: deriveExtender ( MCII , MCI , exOp ) ) ;

MCB . addOperand ( MCOperand :: createInst ( XMCI ) ) ;


<s> bool <ISA_LIT>MCInstrInfo :: canonicalizePacket ( MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCContext & Context , MCInst & MCB , <ISA_LIT>MCChecker * Check ) { if ( ! <ISA_LIT>DisableCompound ) <ISA_LIT>MCInstrInfo :: tryCompound ( MCII , Context , MCB ) ; bool CheckOk = Check ? Check -> check ( ) : true ; if ( ! CheckOk ) return false ;

<ISA_LIT>MCShuffle ( MCII , STI , MCB ) ;


<s> MCInst InstBundlePreDuplex = MCInst ( MCB ) ; if ( ! <ISA_LIT>DisableDuplex ) { SmallVector < DuplexCandidate , <NUM_LIT> > possibleDuplexes ; possibleDuplexes = <ISA_LIT>MCInstrInfo :: getDuplexPossibilties ( MCII , MCB ) ; <ISA_LIT>MCShuffle ( MCII , STI , Context , MCB , possibleDuplexes ) ; } <ISA_LIT>MCInstrInfo :: padEndloop ( Context , MCB ) ; if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) return false ; <ISA_LIT>MCShuffle ( MCII , STI , MCB ) ; return true ;


<s> unsigned Shift = <ISA_LIT>MCInstrInfo :: getExtentAlignment ( MCII , MCI ) ; exOp . setExpr ( <ISA_LIT>MCExpr :: create ( MCConstantExpr :: create ( ( Value & <NUM_LIT> ) << Shift , Context ) , Context ) ) ;


<s> Result . setOpcode ( <STR_LIT> ) ; Result . addOperand ( MCOperand :: createImm ( <NUM_LIT> ) ) ;


<s> Result . addOperand ( MCOperand :: createImm ( <NUM_LIT> ) ) ;


<s> MCInst XMI ; XMI . setOpcode ( ( Desc . isBranch ( ) || Desc . isCall ( ) || <ISA_LIT>MCInstrInfo :: getType ( MCII , Inst ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ) ; if ( MO . isImm ( ) ) XMI . addOperand ( MCOperand :: createImm ( MO . getImm ( ) & ( ~ <NUM_LIT> ) ) ) ; else if ( MO . isExpr ( ) ) XMI . addOperand ( MCOperand :: createExpr ( MO . getExpr ( ) ) ) ; else llvm_unreachable ( <STR_LIT> ) ; return XMI ;


<s> XMI . setOpcode ( ( Desc . isBranch ( ) || Desc . isCall ( ) || <ISA_LIT>MCInstrInfo :: getType ( MCII , Inst ) == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ) ; if ( MO . isImm ( ) ) XMI . addOperand ( MCOperand :: createImm ( MO . getImm ( ) & ( ~ <NUM_LIT> ) ) ) ;

else if ( MO . isExpr ( ) ) XMI . addOperand ( MCOperand :: createExpr ( MO . getExpr ( ) ) ) ;


<s> DuplexCandidate ( unsigned i , unsigned j , unsigned iClass ) : packetIndexI ( i ) , packetIndexJ ( j ) , iClass ( iClass ) {


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( <STR_LIT> ( ( F >> <STR_LIT> ) & <STR_LIT> ) ) ;


<s> uint64_t const F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ;

return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> return ( MCII . get ( MCI . getOpcode ( ) ) ) ;


<s> int <ISA_LIT>MCInstrInfo :: getMaxValue ( MCInstrInfo const & MCII , MCInst const & MCI ) { uint64_t const F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; unsigned isSigned = ( F >> <STR_LIT> ) & <STR_LIT> ; unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ;

if ( isSigned ) return ~ ( - <NUM_LIT> << ( bits - <NUM_LIT> ) ) ;


<s> unsigned isSigned = ( F >> <STR_LIT> ) & <STR_LIT> ; unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ;


<s> unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ; if ( isSigned ) return - <NUM_LIT> << ( bits - <NUM_LIT> ) ;


<s> return MCII . getName ( MCI . getOpcode ( ) ) ;


<s> unsigned const O = ( F >> <STR_LIT> ) & <STR_LIT> ; MCOperand const & MCO = MCI . getOperand ( O ) ; assert ( ( <ISA_LIT>MCInstrInfo :: isNewValue ( MCII , MCI ) || <ISA_LIT>MCInstrInfo :: hasNewValue ( MCII , MCI ) ) && MCO . isReg ( ) ) ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: hasImmExt ( MCInst const & MCI ) { if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCI ) ) return false ; for ( const auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCI ) ) { auto MI = I . getInst ( ) ; if ( isImmext ( * MI ) ) return true ; } return false ;


<s> bool inRange ( MCInst const & MCI , size_t Index ) { return isUInt < N > ( minConstant ( MCI , Index ) ) ;


<s> return isUInt < N > ( minConstant ( MCI , Index ) ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isCanon ( MCInstrInfo const & MCII , MCInst const & MCI ) {

return ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . isPseudo ( ) && ! <ISA_LIT>MCInstrInfo :: isPrefix ( MCII , MCI ) && <ISA_LIT>MCInstrInfo :: getType ( MCII , MCI ) != <STR_LIT> ) ;


<s> return ( getType ( MCII , MCI ) == <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isConstExtended ( MCInstrInfo const & MCII , MCInst const & MCI ) { if ( <ISA_LIT>MCInstrInfo :: isExtended ( MCII , MCI ) ) return true ; if ( ! <ISA_LIT>MCInstrInfo :: isExtendable ( MCII , MCI ) ) return false ; MCOperand const & MO = <ISA_LIT>MCInstrInfo :: getExtendableOperand ( MCII , MCI ) ;

if ( isa < <ISA_LIT>MCExpr > ( MO . getExpr ( ) ) && <ISA_LIT>MCInstrInfo :: mustExtend ( * MO . getExpr ( ) ) ) return true ;


return ( Op == <STR_LIT> || Op == <STR_LIT> || Op == <STR_LIT> || Op == <STR_LIT> ) ;


<s> assert ( isBundle ( MCI ) ) ; auto Flags = MCI . getOperand ( <NUM_LIT> ) . getImm ( ) ; return ( Flags & memStoreReorderEnabledMask ) != <NUM_LIT> ;


<s> assert ( isBundle ( MCI ) ) ; auto Flags = MCI . getOperand ( <NUM_LIT> ) . getImm ( ) ;

return ( Flags & memStoreReorderEnabledMask ) != <NUM_LIT> ;


<s> uint64_t const F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( ( F >> <STR_LIT> ) & <STR_LIT> ) == OperandNum ;


<s> bool <ISA_LIT>MCInstrInfo :: isPrefix ( MCInstrInfo const & MCII , MCInst const & MCI ) {

return ( <ISA_LIT>MCInstrInfo :: getType ( MCII , MCI ) == <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInstrInfo :: isSolo ( MCInstrInfo const & MCII , MCInst const & MCI ) { const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ; return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> const uint64_t F = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . TSFlags ;


<s> if ( <ISA_LIT>MCInstrInfo :: getType ( MCII , MCI ) == <STR_LIT> ) return false ; unsigned SchedClass = <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MCI ) . getSchedClass ( ) ; switch ( SchedClass ) { case <STR_LIT> :: ALU32_3op_tc_2_SLOT0123 :


<s> void <ISA_LIT>MCInstrInfo :: setMemStoreReorderEnabled ( MCInst & MCI ) { assert ( isBundle ( MCI ) ) ; MCOperand & Operand = MCI . getOperand ( <NUM_LIT> ) ; Operand . setImm ( Operand . getImm ( ) | memStoreReorderEnabledMask ) ; assert ( isMemStoreReorderEnabled ( MCI ) ) ;


<s> assert ( isBundle ( MCI ) ) ; MCOperand & Operand = MCI . getOperand ( <NUM_LIT> ) ;

Operand . setImm ( Operand . getImm ( ) | memStoreReorderEnabledMask ) ;


<s> <ISA_LIT>MCExpr & HExpr = const_cast < <ISA_LIT>MCExpr & > ( * llvm :: cast < <ISA_LIT>MCExpr > ( & Expr ) ) ; HExpr . setS23_2_reloc ( Val ) ;


<s> MCI . addOperand ( MCOperand :: CreateImm ( <NUM_LIT> ) ) ;

MCI . addOperand ( MCOperand :: CreateInst ( nullptr ) ) ;


<s> return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> const uint64_t F = getDesc ( ) . TSFlags ;


<s> unsigned short <ISA_LIT>MCInst :: getCExtOpNum ( void ) const { const uint64_t F = getDesc ( ) . TSFlags ;


<s> SanityCheckImplicitOperands ( MCI ) ; std :: bitset < <NUM_LIT> > Bits ( MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . getImm ( ) ) ; return Bits ;


<s> unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ; if ( isSigned ) return ~ ( - <NUM_LIT> << ( bits - <NUM_LIT> ) ) ; else return ~ ( - <NUM_LIT> << bits ) ;


<s> const uint64_t F = getDesc ( ) . TSFlags ; unsigned isSigned = ( F >> <STR_LIT> ) & <STR_LIT> ; unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ; if ( isSigned ) return ~ ( - <NUM_LIT> << ( bits - <NUM_LIT> ) ) ; else return ~ ( - <NUM_LIT> << bits ) ;


<s> unsigned bits = ( F >> <STR_LIT> ) & <STR_LIT> ; if ( isSigned ) return - <NUM_LIT> << ( bits - <NUM_LIT> ) ;


<s> const uint64_t F = getDesc ( ) . TSFlags ; const unsigned O = ( F >> <STR_LIT> ) & <STR_LIT> ; const MCOperand & MCO = getOperand ( O ) ; assert ( ( isNewValue ( ) || hasNewValue ( ) ) && MCO . isReg ( ) ) ;


<s> const MCOperand & MCO = getOperand ( O ) ; assert ( ( isNewValue ( ) || hasNewValue ( ) ) && MCO . isReg ( ) ) ; return ( MCO ) ;


<s> const uint64_t F = getDesc ( ) . TSFlags ; return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> <ISA_LIT>MCInst ( const MCInstrDesc & mcid ) :

MCInst ( ) , MCID ( & mcid ) , packetStart ( <NUM_LIT> ) , packetEnd ( <NUM_LIT> ) { }


<s> bool <ISA_LIT>MCInst :: isCanon ( ) const {

return ( ! getDesc ( ) . isPseudo ( ) && ! isPrefix ( ) && getType ( ) != <STR_LIT> ) ;


<s> int MinValue = getMinValue ( ) ; int MaxValue = getMaxValue ( ) ; const MCOperand & MO = getOperand ( ExtOpNum ) ;


<s> bool <ISA_LIT>MCInst :: isConstExtended ( void ) const { if ( isExtended ( ) ) return true ; if ( ! isExtendable ( ) ) return false ; short ExtOpNum = getCExtOpNum ( ) ; int MinValue = getMinValue ( ) ; int MaxValue = getMaxValue ( ) ; const MCOperand & MO = getOperand ( ExtOpNum ) ; if ( MO . isExpr ( ) ) return true ; assert ( MO . isImm ( ) && <STR_LIT> ) ;


<s> return ( F >> <STR_LIT> ) & <STR_LIT> ;


<s> bool <ISA_LIT>MCInst :: isExtended ( void ) const { const uint64_t F = getDesc ( ) . TSFlags ;


return ( ( F >> <STR_LIT> ) & <STR_LIT> ) == OperandNum ;


<s> return ( ( F >> <STR_LIT> ) & <STR_LIT> ) == OperandNum ;


<s> std :: bitset < <NUM_LIT> > Bits ( GetImplicitBits ( * this ) ) ; return Bits . test ( packetBeginIndex ) ;


<s> bool <ISA_LIT>MCInst :: isPrefix ( ) const { return ( getType ( ) == <STR_LIT> ) ;


<s> return ( ( F >> <STR_LIT> ) & <STR_LIT> ) ;


<s> bool <ISA_LIT>MCInst :: isSolo ( ) const {

const uint64_t F = getDesc ( ) . TSFlags ;


<s> MCI . getOperand ( MCI . getNumOperands ( ) - <NUM_LIT> ) . setImm ( Bits . to_ulong ( ) ) ;


<s> std :: bitset < <NUM_LIT> > Bits ( GetImplicitBits ( * this ) ) ;


<s> MCB . clear ( ) ; MCB . addOperand ( MCOperand :: createImm ( BundleFlags ) ) ; for ( <ISA_LIT>Shuffler :: iterator I = begin ( ) ; I != end ( ) ; ++ I ) { MCInst const * MI = I -> getDesc ( ) ; MCInst const * Extender = I -> getExtender ( ) ; if ( Extender ) MCB . addOperand ( MCOperand :: createInst ( Extender ) ) ; MCB . addOperand ( MCOperand :: createInst ( MI ) ) ;


<s> } else { if ( bundleSize == HEXAGON_PACKET_SIZE - <NUM_LIT> && fixupCount ) return false ; } if ( DisableShuffle ) return false ; <ISA_LIT>MCShuffler MCS ( MCII , STI , MCB , AddMI ) ; if ( ! MCS . reshuffleTo ( MCB ) ) { unsigned shuffleError = MCS . getError ( ) ; switch ( shuffleError ) { default : return false ;


<s> } else if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { DEBUG ( dbgs ( ) << <STR_LIT> ) ; return <ISA_LIT>Shuffler :: SHUFFLE_SUCCESS ; } bool doneShuffling = false ; unsigned shuffleError ; while ( possibleDuplexes . size ( ) > <NUM_LIT> && ( ! doneShuffling ) ) { DuplexCandidate duplexToTry = possibleDuplexes . pop_back_val ( ) ; MCInst Attempt ( MCB ) ; <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ;

<ISA_LIT>MCShuffler MCS ( MCII , STI , Attempt ) ;


<s> MCB . setLoc ( Loc ) ; for ( auto & I : * this ) { MCInst const & MI = I . getDesc ( ) ; MCInst const * Extender = I . getExtender ( ) ; if ( Extender ) MCB . addOperand ( MCOperand :: createInst ( Extender ) ) ;

MCB . addOperand ( MCOperand :: createInst ( & MI ) ) ;


<s> <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , Attempt ) ; if ( MCS . size ( ) == <NUM_LIT> ) { MCS . copyTo ( MCB ) ; return false ; } doneShuffling = MCS . reshuffleTo ( MCB ) ; if ( doneShuffling ) break ; }


<s> bool doneShuffling = false ; while ( possibleDuplexes . size ( ) > <NUM_LIT> && ( ! doneShuffling ) ) { DuplexCandidate duplexToTry = possibleDuplexes . pop_back_val ( ) ; MCInst Attempt ( MCB ) ; <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , Attempt ) ; if ( MCS . size ( ) == <NUM_LIT> ) { MCS . copyTo ( MCB ) ; return false ; } doneShuffling = MCS . reshuffleTo ( MCB ) ; if ( doneShuffling ) break ; } if ( ! doneShuffling ) { <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , MCB ) ; doneShuffling = MCS . reshuffleTo ( MCB ) ; }


<s> void <ISA_LIT>MCShuffler :: copyTo ( MCInst & MCB ) { MCB . clear ( ) ; MCB . addOperand ( MCOperand :: createImm ( BundleFlags ) ) ;

for ( <ISA_LIT>Shuffler :: iterator I = begin ( ) ; I != end ( ) ; ++ I ) {


<s> MCB . clear ( ) ; MCB . addOperand ( MCOperand :: createImm ( BundleFlags ) ) ; for ( <ISA_LIT>Shuffler :: iterator I = begin ( ) ; I != end ( ) ; ++ I ) { MCInst const & MI = I -> getDesc ( ) ; MCInst const * Extender = I -> getExtender ( ) ; if ( Extender ) MCB . addOperand ( MCOperand :: createInst ( Extender ) ) ;


<s> } } else { if ( bundleSize == HEXAGON_PACKET_SIZE - <NUM_LIT> && fixupCount ) return false ; } if ( DisableShuffle ) return false ; unsigned maxBundleSize = ( <ISA_LIT>MCInstrInfo :: hasImmExt ( MCB ) ) ? HEXAGON_PACKET_SIZE : HEXAGON_PACKET_SIZE - <NUM_LIT> ; if ( bhasDuplex && bundleSize >= maxBundleSize ) return false ; <ISA_LIT>MCShuffler MCS ( MCII , STI , MCB , AddMI , false ) ; if ( ! MCS . reshuffleTo ( MCB ) ) { unsigned shuffleError = MCS . getError ( ) ;


<s> bool llvm :: <ISA_LIT>MCShuffle ( MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCInst & MCB , MCInst const & AddMI , int fixupCount ) { if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) return false ; unsigned int bundleSize = <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) ; if ( bundleSize >= HEXAGON_PACKET_SIZE ) return false ; bool bhasDuplex = <ISA_LIT>MCInstrInfo :: hasDuplex ( MCII , MCB ) ; if ( fixupCount >= <NUM_LIT> ) { if ( bhasDuplex ) { if ( bundleSize >= HEXAGON_PACKET_SIZE - <NUM_LIT> ) { return false ; }


<s> assert ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , * I . getInst ( ) ) . isPseudo ( ) ) ; MCInst & MI = * const_cast < MCInst * > ( I . getInst ( ) ) ; if ( ! <ISA_LIT>MCInstrInfo :: isImmext ( MI ) ) { append ( MI , Extender , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , MI ) ) ;


<s> if ( <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { if ( bInsertAtFront ) append ( AddMI , nullptr , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , AddMI ) ) ; MCInst const * Extender = nullptr ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCB ) ) {

assert ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , * I . getInst ( ) ) . isPseudo ( ) ) ;


<s> return false ; } else if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } bool doneShuffling = false ; while ( possibleDuplexes . size ( ) > <NUM_LIT> && ( ! doneShuffling ) ) { DuplexCandidate duplexToTry = possibleDuplexes . pop_back_val ( ) ; MCInst Attempt ( MCB ) ; <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , Attempt ) ;


<s> append ( MI , Extender , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , MI ) ) ; Extender = nullptr ; } else Extender = & MI ; } } Loc = MCB . getLoc ( ) ; BundleFlags = MCB . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> for ( const auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCB ) ) { MCInst & MI = * const_cast < MCInst * > ( I . getInst ( ) ) ; DEBUG ( dbgs ( ) << <STR_LIT> << MCII . getName ( MI . getOpcode ( ) ) << '\n' ) ; assert ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , MI ) . isPseudo ( ) ) ; if ( ! <ISA_LIT>MCInstrInfo :: isImmext ( MI ) ) { append ( MI , Extender , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , MI ) ) ; Extender = nullptr ; } else Extender = & MI ; }


<s> return true ; } DEBUG ( MCB . dump ( ) ) ;


<s> <ISA_LIT>MCShuffler ( MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCInst & MCB , const MCInst * AddMI , bool bInsertAtFront = false ) : <ISA_LIT>Shuffler ( MCII , STI ) {


<s> <ISA_LIT>MCShuffler ( MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCInst & MCB , MCInst const & AddMI , bool InsertAtFront ) : <ISA_LIT>Shuffler ( MCII , STI ) {


<s> <ISA_LIT>MCShuffler ( MCContext & Context , bool ReportErrors , MCInstrInfo const & MCII , MCSubtargetInfo const & STI , MCInst & MCB , MCInst const & AddMI , bool InsertAtFront ) : <ISA_LIT>Shuffler ( Context , ReportErrors , MCII , STI ) {


<s> return false ; } else if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { DEBUG ( dbgs ( ) << <STR_LIT> ) ; return false ; } bool doneShuffling = false ; while ( possibleDuplexes . size ( ) > <NUM_LIT> && ( ! doneShuffling ) ) { DuplexCandidate duplexToTry = possibleDuplexes . pop_back_val ( ) ; MCInst Attempt ( MCB ) ; <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , Attempt ) ; if ( MCS . size ( ) == <NUM_LIT> ) { MCS . copyTo ( MCB ) ; return false ; } doneShuffling = MCS . reshuffleTo ( MCB ) ; if ( doneShuffling ) break ;


<s> while ( possibleDuplexes . size ( ) > <NUM_LIT> && ( ! doneShuffling ) ) { DuplexCandidate duplexToTry = possibleDuplexes . pop_back_val ( ) ; MCInst Attempt ( MCB ) ; <ISA_LIT>MCInstrInfo :: replaceDuplex ( Context , Attempt , duplexToTry ) ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , Attempt ) ; if ( MCS . size ( ) == <NUM_LIT> ) { MCS . copyTo ( MCB ) ; return false ; } doneShuffling = MCS . reshuffleTo ( MCB ) ; if ( doneShuffling ) break ; }


<s> MCInst const * Extender = I -> getExtender ( ) ; if ( Extender ) MCB . addOperand ( MCOperand :: createInst ( Extender ) ) ; MCB . addOperand ( MCOperand :: createInst ( & MI ) ) ;


<s> MCB . addOperand ( MCOperand :: createImm ( BundleFlags ) ) ; MCB . setLoc ( Loc ) ; for ( <ISA_LIT>Shuffler :: iterator I = begin ( ) ; I != end ( ) ; ++ I ) { MCInst const & MI = I -> getDesc ( ) ; MCInst const * Extender = I -> getExtender ( ) ; if ( Extender ) MCB . addOperand ( MCOperand :: createInst ( Extender ) ) ;


<s> if ( bundleSize == HEXAGON_PACKET_SIZE - <NUM_LIT> && fixupCount ) return false ; } if ( DisableShuffle ) return false ; unsigned maxBundleSize = ( <ISA_LIT>MCInstrInfo :: hasImmExt ( MCB ) ) ? HEXAGON_PACKET_SIZE : HEXAGON_PACKET_SIZE - <NUM_LIT> ; if ( bhasDuplex && bundleSize >= maxBundleSize ) return false ; <ISA_LIT>MCShuffler MCS ( Context , false , MCII , STI , MCB , AddMI , false ) ; return MCS . reshuffleTo ( MCB ) ;


<s> if ( ! <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) return false ; unsigned int bundleSize = <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) ; if ( bundleSize >= HEXAGON_PACKET_SIZE ) return false ; bool bhasDuplex = <ISA_LIT>MCInstrInfo :: hasDuplex ( MCII , MCB ) ; if ( fixupCount >= <NUM_LIT> ) { if ( bhasDuplex ) { if ( bundleSize >= HEXAGON_PACKET_SIZE - <NUM_LIT> ) { return false ; } } else { return false ; } } else { if ( bundleSize == HEXAGON_PACKET_SIZE - <NUM_LIT> && fixupCount ) return false ; }


<s> if ( <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { if ( bInsertAtFront ) append ( AddMI , nullptr , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , AddMI ) ) ; MCInst const * Extender = nullptr ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCB ) ) { assert ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , * I . getInst ( ) ) . isPseudo ( ) ) ; MCInst & MI = * const_cast < MCInst * > ( I . getInst ( ) ) ; if ( ! <ISA_LIT>MCInstrInfo :: isImmext ( MI ) ) { append ( MI , Extender , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , MI ) ) ; Extender = nullptr ; } else Extender = & MI ; } if ( ! bInsertAtFront ) append ( AddMI , nullptr , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , AddMI ) ) ; } Loc = MCB . getLoc ( ) ;

BundleFlags = MCB . getOperand ( <NUM_LIT> ) . getImm ( ) ;


<s> if ( <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) { if ( bInsertAtFront ) append ( AddMI , nullptr , <ISA_LIT>MCInstrInfo :: getUnits ( MCII , STI , AddMI ) ) ; MCInst const * Extender = nullptr ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( MCB ) ) { assert ( ! <ISA_LIT>MCInstrInfo :: getDesc ( MCII , * I . getInst ( ) ) . isPseudo ( ) ) ; MCInst & MI = * const_cast < MCInst * > ( I . getInst ( ) ) ;

if ( ! <ISA_LIT>MCInstrInfo :: isImmext ( MI ) ) {


<s> bool <ISA_LIT>MCShuffler :: reshuffleTo ( MCInst & MCB ) { if ( shuffle ( ) ) {


<s> static bool LLVM_ATTRIBUTE_UNUSED checkFeature ( MCSubtargetInfo * STI , uint64_t F ) { uint64_t FB = STI -> getFeatureBits ( ) . to_ullong ( ) ;

return ( FB & ( <NUM_LIT> << F ) ) != <NUM_LIT> ;


<s> static void LLVM_ATTRIBUTE_UNUSED clearFeature ( MCSubtargetInfo * STI , uint64_t F ) {

uint64_t FB = STI -> getFeatureBits ( ) . to_ullong ( ) ;


<s> if ( FB & ( <NUM_LIT> << F ) ) STI -> ToggleFeature ( F ) ;


<s> for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 , ExtensionHVXV66 } ) { if ( ! FB . test ( F ) ) continue ; HasHvxVer = true ; UseHvx = true ; break ; } if ( ! UseHvx || HasHvxVer ) return FB ; switch ( CpuArch ) { case ArchV66 : FB . set ( ExtensionHVXV66 ) ; LLVM_FALLTHROUGH ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TT ) { MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , MRI . getDwarfRegNum ( <STR_LIT> , true ) , <NUM_LIT> ) ;


<s> MCSubtargetInfo * <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { std :: pair < std :: string , std :: string > Features = selectCPUAndFS ( CPU , FS ) ; StringRef CPUName = Features . first ; StringRef ArchFS = Features . second ; if ( ! isCPUValid ( CPUName . str ( ) ) ) { errs ( ) << <STR_LIT> << CPUName . str ( ) . c_str ( ) << <STR_LIT> ; return nullptr ; } MCSubtargetInfo * X = create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , ArchFS ) ; if ( <ISA_LIT>DisableDuplex ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ;

X -> setFeatureBits ( Features . set ( <STR_LIT> , false ) ) ;


<s> void EmitCommonSymbolSorted ( MCSymbol * Symbol , uint64_t Size , unsigned ByteAlignment , unsigned AccessSize ) override { <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ;

<ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ;

<ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitLocalCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ; <ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitLocalCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> assert ( Extended . isExpr ( ) ) ; int64_t Value ;

if ( ! Extended . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return false ;


<s> bool evaluateBranch ( MCInst const & Inst , uint64_t Addr , uint64_t Size , uint64_t & Target ) const override { if ( ! <ISA_LIT>MCInstrInfo :: isExtendable ( * Info , Inst ) ) return false ; auto const & Extended ( <ISA_LIT>MCInstrInfo :: getExtendableOperand ( * Info , Inst ) ) ; assert ( Extended . isExpr ( ) ) ; int64_t Value ; if ( ! Extended . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return false ;


<s> static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ; assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ; return F -> second ;


<s> static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ; assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ;


<s> if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ; if ( MV65 ) return <STR_LIT> ; if ( MV66 ) return <STR_LIT> ;


<s> static bool isCPUValid ( std :: string CPU ) { std :: vector < std :: string > table { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; return std :: find ( table . begin ( ) , table . end ( ) , CPU ) != table . end ( ) ;


<s> <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; return std :: find ( table . begin ( ) , table . end ( ) , CPU ) != table . end ( ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterMCInstrAnalysis ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterELFStreamer ( getThe<ISA_LIT>Target ( ) , createMCStreamer ) ; TargetRegistry :: RegisterObjectTargetStreamer ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>ObjectTargetStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( getThe<ISA_LIT>Target ( ) , createMCAsmTargetStreamer ) ; TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ;


<s> assert ( <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) <= HEXAGON_PACKET_SIZE ) ; std :: string Buffer ; { raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { StringRef InstTxt ; auto Duplex = HeadTail . first . split ( '\v' ) ; if ( ! Duplex . second . empty ( ) ) { OS << Indent << Duplex . first << Separator ; InstTxt = Duplex . second ; } else if ( ! HeadTail . first . trim ( ) . startswith ( <STR_LIT> ) ) { InstTxt = Duplex . first ; } if ( ! InstTxt . empty ( ) ) OS << Indent << InstTxt << Separator ; HeadTail = HeadTail . second . split ( '\n' ) ;


<s> void prettyPrintAsm ( MCInstPrinter & InstPrinter , raw_ostream & OS , const MCInst & Inst , const MCSubtargetInfo & STI ) override { assert ( <ISA_LIT>MCInstrInfo :: isBundle ( Inst ) ) ; assert ( <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) <= HEXAGON_PACKET_SIZE ) ; std :: string Buffer ; { raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) {


<s> std :: pair < std :: string , std :: string > Result ;

Result . first = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( CPU ) ;


<s> std :: pair < std :: string , std :: string > selectCPUAndFS ( StringRef CPU , StringRef FS ) { std :: pair < std :: string , std :: string > Result ; Result . first = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( CPU ) ; Result . second = select<ISA_LIT>FS ( Result . first , FS ) ;


<s> if ( ArchV . empty ( ) ) { if ( CPU . empty ( ) ) CPU = DefaultArch ; return CPU ;


<s> Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V66 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: Generic : { Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ; break ; } case <STR_LIT> :: NoArch :


<s> Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ; break ; } case <STR_LIT> :: NoArch : break ; }

return join ( Result . begin ( ) , Result . end ( ) , <STR_LIT> ) ;


<s> MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> if ( RM == Reloc :: Default ) RM = Reloc :: Static ; X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( RM == Reloc :: Default ) RM = Reloc :: Static ; X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { if ( SyntaxVariant == <NUM_LIT> ) return ( new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> MCInstrInfo * llvm :: create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ; return X ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { CPU = <STR_LIT> ( TT , CPU ) ; return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> static MCTargetStreamer * create<ISA_LIT>ObjectTargetStreamer ( MCStreamer & S , MCSubtargetInfo const & STI ) { return new <ISA_LIT>TargetELFStreamer ( S , STI ) ;


<s> static MCTargetStreamer * createMCAsmTargetStreamer ( MCStreamer & S , formatted_raw_ostream & OS , MCInstPrinter * InstPrint , bool IsVerboseAsm ) { return new <ISA_LIT>TargetAsmStreamer ( S , OS , IsVerboseAsm , * InstPrint ) ;


<s> static MCStreamer * createMCStreamer ( Triple const & T , MCContext & Context , MCAsmBackend & MAB , raw_pwrite_stream & OS , MCCodeEmitter * Emitter , bool RelaxAll ) {

return create<ISA_LIT>ELFStreamer ( Context , MAB , OS , Emitter ) ;


<s> <ISA_LIT>TargetAsmStreamer ( MCStreamer & S , formatted_raw_ostream & , bool , MCInstPrinter & ) : <ISA_LIT>TargetStreamer ( S ) {


<s> <ISA_LIT>TargetELFStreamer ( MCStreamer & S , MCSubtargetInfo const & STI ) : <ISA_LIT>TargetStreamer ( S ) { auto Bits = STI . getFeatureBits ( ) ; unsigned Flags ; if ( Bits . to_ullong ( ) & llvm :: <STR_LIT> ) Flags = ELF :: EF_HEXAGON_MACH_V5 ;

else Flags = ELF :: EF_HEXAGON_MACH_V4 ;


<s> if ( Bits . to_ullong ( ) & llvm :: <STR_LIT> ) Flags = ELF :: EF_HEXAGON_MACH_V5 ; else Flags = ELF :: EF_HEXAGON_MACH_V4 ; getStreamer ( ) . getAssembler ( ) . setELFHeaderEFlags ( Flags ) ;


<s> RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterELFStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;


<s> void prettyPrintAsm ( MCInstPrinter & InstPrinter , raw_ostream & OS , const MCInst & Inst , const MCSubtargetInfo & STI ) override { assert ( <ISA_LIT>MCInstrInfo :: isBundle ( Inst ) ) ; assert ( <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) <= HEXAGON_PACKET_SIZE ) ; std :: string Buffer ; { raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { StringRef InstTxt ; auto Duplex = HeadTail . first . split ( '\v' ) ; if ( ! Duplex . second . empty ( ) ) { OS << Indent << Duplex . first << Separator ; InstTxt = Duplex . second ; } else if ( ! HeadTail . first . trim ( ) . startswith ( <STR_LIT> ) ) { InstTxt = Duplex . first ; } if ( ! InstTxt . empty ( ) ) OS << Indent << InstTxt << Separator ; HeadTail = HeadTail . second . split ( '\n' ) ;


<s> raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { StringRef InstTxt ;

auto Duplex = HeadTail . first . split ( '\v' ) ;


<s> if ( CPU . empty ( ) ) CPU = <STR_LIT> ;


<s> MCELFStreamer * ES = new MCELFStreamer ( Context , MAB , OS , CE ) ;


<s> MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ; return MAI ;


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; X -> InitMCCodeGenInfo ( Reloc :: Static , CM , OL ) ; return X ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ; return X ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( StringRef TT , StringRef CPU , StringRef FS ) { MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ; return X ;


<s> Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ; return X ;


<s> MCStreamer * ES = create<ISA_LIT>ELFStreamer ( Context , MAB , OS , Emitter , RelaxAll ) ; new MCTargetStreamer ( * ES ) ;


<s> static MCStreamer * createMCStreamer ( Target const & T , StringRef TT , MCContext & Context , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , MCSubtargetInfo const & STI , bool RelaxAll ) { MCStreamer * ES = create<ISA_LIT>ELFStreamer ( Context , MAB , OS , Emitter , RelaxAll ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;

TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;


<s> TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;

TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ;


<s> CpuArch = F ; break ; } bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ; break ; } bool HasHvxVer = false ; for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 , ExtensionHVXV66 , ExtensionHVXV67 , ExtensionHVXV68 , ExtensionHVXV69 } ) { if ( ! FB . test ( F ) ) continue ; HasHvxVer = true ; UseHvx = true ; break ; } if ( ! UseHvx || HasHvxVer ) return FB ; switch ( CpuArch ) { case ArchV69 : FB . set ( ExtensionHVXV69 ) ; LLVM_FALLTHROUGH ; case ArchV68 : FB . set ( ExtensionHVXV68 ) ; LLVM_FALLTHROUGH ; case ArchV67 : FB . set ( ExtensionHVXV67 ) ; LLVM_FALLTHROUGH ; case ArchV66 : FB . set ( ExtensionHVXV66 ) ; LLVM_FALLTHROUGH ; case ArchV65 : FB . set ( ExtensionHVXV65 ) ; LLVM_FALLTHROUGH ; case ArchV62 : FB . set ( ExtensionHVXV62 ) ; LLVM_FALLTHROUGH ;


<s> bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ; break ; } bool HasHvxVer = false ; for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 , ExtensionHVXV66 , ExtensionHVXV67 , ExtensionHVXV68 , ExtensionHVXV69 } ) { if ( ! FB . test ( F ) ) continue ; HasHvxVer = true ; UseHvx = true ; break ; } if ( ! UseHvx || HasHvxVer ) return FB ; switch ( CpuArch ) { case ArchV69 : FB . set ( ExtensionHVXV69 ) ; LLVM_FALLTHROUGH ; case ArchV68 : FB . set ( ExtensionHVXV68 ) ; LLVM_FALLTHROUGH ; case ArchV67 : FB . set ( ExtensionHVXV67 ) ; LLVM_FALLTHROUGH ; case ArchV66 : FB . set ( ExtensionHVXV66 ) ; LLVM_FALLTHROUGH ; case ArchV65 : FB . set ( ExtensionHVXV65 ) ; LLVM_FALLTHROUGH ; case ArchV62 : FB . set ( ExtensionHVXV62 ) ; LLVM_FALLTHROUGH ; case ArchV60 :


<s> if ( ! isCPUValid ( CPUName . str ( ) ) ) { errs ( ) << <STR_LIT> << CPUName . str ( ) . c_str ( ) << <STR_LIT> ; return nullptr ; } if ( checkFeature ( X , <STR_LIT> ) && ArchFS . find ( <STR_LIT> , <NUM_LIT> ) == std :: string :: npos ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . set ( <STR_LIT> ) ) ; } if ( <ISA_LIT>DisableDuplex ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . reset ( <STR_LIT> ) ) ; } X -> setFeatureBits ( completeHVXFeatures ( X -> getFeatureBits ( ) ) ) ; const bool ZRegOnDefault = ( CPUName == <STR_LIT> ) || ( CPUName == <STR_LIT> ) ;


<s> if ( MV55 ) return <STR_LIT> ; if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ; if ( MV65 ) return <STR_LIT> ; if ( MV66 ) return <STR_LIT> ; if ( MV67 ) return <STR_LIT> ; if ( MV67T ) return <STR_LIT> ; if ( MV68 ) return <STR_LIT> ;


<s> static bool isCPUValid ( StringRef CPU ) {

return <STR_LIT> ( CPU ) . hasValue ( ) ;


<s> std :: string select<ISA_LIT>FS ( StringRef CPU , StringRef FS ) { SmallVector < StringRef , <NUM_LIT> > Result ; if ( ! FS . empty ( ) ) Result . push_back ( FS ) ; switch ( EnableHVX ) { case <STR_LIT> :: V5 : case <STR_LIT> :: V55 : break ; case <STR_LIT> :: V60 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V62 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V65 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V66 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V67 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V68 : Result . push_back ( <STR_LIT> ) ;


<s> break ; case <STR_LIT> :: V60 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V62 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V65 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V66 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V67 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V68 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V69 :


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> static MCTargetStreamer * createMCAsmTargetStreamer ( MCStreamer & S , formatted_raw_ostream & OS , MCInstPrinter * IP , bool IsVerboseAsm ) {

return new <ISA_LIT>TargetAsmStreamer ( S , OS , IsVerboseAsm , * IP ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;


<s> return nullptr ; } MCSubtargetInfo * X = create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , ArchFS ) ; if ( X -> getFeatureBits ( ) [ <STR_LIT> ] ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ;

X -> setFeatureBits ( Features . set ( <STR_LIT> ) ) ;


<s> static MCStreamer * createMCStreamer ( Triple const & T , MCContext & Context , std :: unique_ptr < MCAsmBackend > && MAB , raw_pwrite_stream & OS , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {

return create<ISA_LIT>ELFStreamer ( T , Context , std :: move ( MAB ) , OS , std :: move ( Emitter ) ) ;


<s> { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V4 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ;

assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V4 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , } ;

auto F = ElfFlags . find ( STI . getCPU ( ) ) ;


<s> if ( <ISA_LIT>V55ArchVariant ) return <STR_LIT> ;

if ( <ISA_LIT>V60ArchVariant ) return <STR_LIT> ;


<s> unsigned llvm :: <ISA_LIT>GetLastSlot ( ) {


<s> unsigned llvm :: <ISA_LIT>GetLastSlot ( ) { return <STR_LIT> ;


return std :: find ( table . begin ( ) , table . end ( ) , CPU ) != table . end ( ) ;


<s> static bool isCPUValid ( std :: string CPU ) { std :: vector < std :: string > table {


<s> StringRef <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) { StringRef CPUName = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( TT , CPU ) ;


<s> if ( ! ArchV . empty ( ) && ! CPU . empty ( ) ) { if ( ArchV != CPU ) report_fatal_error ( <STR_LIT> ) ; return CPU ; } if ( ArchV . empty ( ) ) {

if ( CPU . empty ( ) ) CPU = DefaultArch ;


<s> return CPU ; } if ( ArchV . empty ( ) ) {


<s> MCSubtargetInfo * X = create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , ArchFS ) ; if ( X -> getFeatureBits ( ) [ <STR_LIT> ] ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . set ( <STR_LIT> ) ) ; }


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( const Triple & TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; X -> initMCCodeGenInfo ( RM , CM , OL ) ; return X ;


<s> MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> if ( <ISA_LIT>V5ArchVariant ) return <STR_LIT> ;

if ( <ISA_LIT>V55ArchVariant ) return <STR_LIT> ;


<s> } if ( ArchV . empty ( ) ) { if ( CPU . empty ( ) ) CPU = DefaultArch ; return CPU ;


<s> StringRef ArchV = <ISA_LIT>GetArchVariant ( ) ; if ( ! ArchV . empty ( ) && ! CPU . empty ( ) ) { if ( ArchV != CPU ) report_fatal_error ( <STR_LIT> ) ; return CPU ; } if ( ArchV . empty ( ) ) { if ( CPU . empty ( ) ) CPU = DefaultArch ; return CPU ; } return ArchV ;


<s> MachineLocation Dst ( MachineLocation :: VirtualFP ) ; MachineLocation Src ( <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( <NUM_LIT> , Dst , Src ) ;


<s> if ( CPU . empty ( ) ) CPUName = <STR_LIT> ; return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , FS ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TT , const MCTargetOptions & Options ) {

MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ;


<s> MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ;


<s> MCSubtargetInfo * X = new MCSubtargetInfo ( ) ; Init<ISA_LIT>MCSubtargetInfo ( X , TT , CPU , FS ) ; return X ;


<s> TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> UseHvx = true ; break ; } if ( ! UseHvx || HasHvxVer ) return FB ; switch ( CpuArch ) { case ArchV67 : FB . set ( ExtensionHVXV67 ) ; LLVM_FALLTHROUGH ; case ArchV66 : FB . set ( ExtensionHVXV66 ) ; LLVM_FALLTHROUGH ; case ArchV65 : FB . set ( ExtensionHVXV65 ) ; LLVM_FALLTHROUGH ; case ArchV62 : FB . set ( ExtensionHVXV62 ) ; LLVM_FALLTHROUGH ; case ArchV60 : FB . set ( ExtensionHVXV60 ) ;


<s> if ( X != nullptr && ( CPUName == <STR_LIT> ) ) addArchSubtarget ( X , ArchFS ) ; if ( CPU . equals ( <STR_LIT> ) ) exit ( <NUM_LIT> ) ; if ( ! isCPUValid ( CPUName . str ( ) ) ) { errs ( ) << <STR_LIT> << CPUName . str ( ) . c_str ( ) << <STR_LIT> ; return nullptr ; } if ( <ISA_LIT>DisableDuplex ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . reset ( <STR_LIT> ) ) ; }

X -> setFeatureBits ( completeHVXFeatures ( X -> getFeatureBits ( ) ) ) ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67T } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ; assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ;


<s> if ( MV66 ) return <STR_LIT> ; if ( MV67 ) return <STR_LIT> ;


<s> if ( MV5 ) return <STR_LIT> ; if ( MV55 ) return <STR_LIT> ; if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ; if ( MV65 ) return <STR_LIT> ; if ( MV66 ) return <STR_LIT> ; if ( MV67 ) return <STR_LIT> ; if ( MV67T ) return <STR_LIT> ; return <STR_LIT> ;


<s> break ; case <STR_LIT> :: V65 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V66 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V67 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: Generic : { Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ; break ; }


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterELFStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) {

MCCodeGenInfo * X = new MCCodeGenInfo ( ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; X -> initMCCodeGenInfo ( Reloc :: Static , CM , OL ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> { raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; auto Preamble = <STR_LIT> ; auto Separator = <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { OS << Separator ; StringRef Inst ; auto Duplex = HeadTail . first . split ( '\v' ) ; if ( ! Duplex . second . empty ( ) ) { OS << Duplex . first << <STR_LIT> ; Inst = Duplex . second ;


<s> CPU = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( TT , CPU ) ; return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterELFStreamer ( getThe<ISA_LIT>Target ( ) , createMCStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( getThe<ISA_LIT>Target ( ) , createMCAsmTargetStreamer ) ;

TargetRegistry :: RegisterMCInstPrinter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstPrinter ) ;


<s> TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ; TargetRegistry :: RegisterELFStreamer ( getThe<ISA_LIT>Target ( ) , createMCStreamer ) ;

TargetRegistry :: RegisterAsmTargetStreamer ( getThe<ISA_LIT>Target ( ) , createMCAsmTargetStreamer ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , StringRef TT ) { MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ;

MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( <NUM_LIT> , <STR_LIT> , <NUM_LIT> ) ;


<s> MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( <NUM_LIT> , <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ;


<s> break ; } bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B , ExtensionHVXDbl } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ; break ; } bool HasHvxVer = false ; for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 } ) { if ( ! FB . test ( F ) ) continue ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = {

{ <STR_LIT> , ELF :: EF_HEXAGON_MACH_V4 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , } ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V4 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ;


<s> if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ;


<s> if ( MV5 ) return <STR_LIT> ; if ( MV55 ) return <STR_LIT> ; if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ;


<s> static bool isCPUValid ( std :: string CPU ) { std :: vector < std :: string > table {


<s> std :: vector < std :: string > table {


<s> std :: string Buffer ; { raw_string_ostream TempStream ( Buffer ) ; InstPrinter . printInst ( & Inst , TempStream , <STR_LIT> , STI ) ; } StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { StringRef InstTxt ; auto Duplex = HeadTail . first . split ( '\v' ) ; if ( ! Duplex . second . empty ( ) ) { OS << Indent << Duplex . first << Separator ; InstTxt = Duplex . second ; } else if ( ! HeadTail . first . trim ( ) . startswith ( <STR_LIT> ) ) { InstTxt = Duplex . first ; } if ( ! InstTxt . empty ( ) ) OS << Indent << InstTxt << Separator ; HeadTail = HeadTail . second . split ( '\n' ) ; } if ( <ISA_LIT>MCInstrInfo :: isMemReorderDisabled ( Inst ) ) OS << <STR_LIT> << PacketBundle . second ;

else OS << <STR_LIT> << PacketBundle . second ;


<s> break ; case <STR_LIT> :: V5 : { Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ; break ; } case <STR_LIT> :: V4 : break ; }

return join ( Result . begin ( ) , Result . end ( ) , <STR_LIT> ) ;


<s> unsigned CpuArch = ArchV4 ; for ( unsigned F : { ArchV65 , ArchV62 , ArchV60 , ArchV55 , ArchV5 , ArchV4 } ) { if ( ! FB . test ( F ) ) continue ; CpuArch = F ; break ; } bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ;


<s> if ( ! FB . test ( F ) ) continue ; CpuArch = F ; break ; } bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ; break ; } bool HasHvxVer = false ; for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 } ) { if ( ! FB . test ( F ) ) continue ; HasHvxVer = true ; UseHvx = true ; break ; } if ( ! UseHvx || HasHvxVer ) return FB ;


<s> static std :: map < StringRef , unsigned > ElfFlags = {

{ <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , } ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ; assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ;


<s> if ( MV55 ) return <STR_LIT> ; if ( MV60 ) return <STR_LIT> ; if ( MV62 ) return <STR_LIT> ; if ( MV65 ) return <STR_LIT> ;


<s> std :: vector < std :: string > table { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , } ; return std :: find ( table . begin ( ) , table . end ( ) , CPU ) != table . end ( ) ;


<s> SmallVector < StringRef , <NUM_LIT> > Result ; if ( ! FS . empty ( ) ) Result . push_back ( FS ) ; switch ( EnableHVX ) { case <STR_LIT> :: V5 : case <STR_LIT> :: V55 : break ; case <STR_LIT> :: V60 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V62 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V65 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: Generic : { Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ; break ; } case <STR_LIT> :: NoArch : break ;


<s> Init<ISA_LIT>MCInstrInfo ( X ) ; return X ;


<s> TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ;

TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = {

{ <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67T } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V68 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V69 } , } ;


<s> StringRef FS = <STR_LIT> ; if ( CPUName . equals_lower ( <STR_LIT> ) || CPUName . equals_lower ( <STR_LIT> ) ) FS = <STR_LIT> ; return FS ;


<s> StringRef <ISA_LIT>_MC :: Parse<ISA_LIT>Triple ( const Triple & TT , StringRef CPU ) {

StringRef CPUName = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( TT , CPU ) ;


<s> const std :: string CPU ( STI . getCPU ( ) . str ( ) ) ; auto F = ElfFlagsByCpuStr . find ( CPU ) ;

assert ( F != ElfFlagsByCpuStr . end ( ) && <STR_LIT> ) ;


<s> const std :: string CPU ( STI . getCPU ( ) . str ( ) ) ;

auto F = ElfFlagsByCpuStr . find ( CPU ) ;


<s> auto ArchSTI = create<ISA_LIT>MCSubtargetInfo ( STI -> getTargetTriple ( ) , STI -> getCPU ( ) . substr ( <NUM_LIT> , STI -> getCPU ( ) . size ( ) - <NUM_LIT> ) , FS ) ; std :: lock_guard < std :: mutex > Lock ( ArchSubtargetMutex ) ;

ArchSubtarget [ std :: string ( STI -> getCPU ( ) ) ] = std :: unique_ptr < MCSubtargetInfo const > ( ArchSTI ) ;


<s> static bool LLVM_ATTRIBUTE_UNUSED checkFeature ( MCSubtargetInfo * STI , uint64_t F ) { return STI -> getFeatureBits ( ) [ F ] ;


<s> static void LLVM_ATTRIBUTE_UNUSED clearFeature ( MCSubtargetInfo * STI , uint64_t F ) {

if ( STI -> getFeatureBits ( ) [ F ] ) STI -> ToggleFeature ( F ) ;


<s> CpuArch = F ; break ; } bool UseHvx = false ; for ( unsigned F : { ExtensionHVX , ExtensionHVX64B , ExtensionHVX128B } ) { if ( ! FB . test ( F ) ) continue ; UseHvx = true ; break ; } bool HasHvxVer = false ; for ( unsigned F : { ExtensionHVXV60 , ExtensionHVXV62 , ExtensionHVXV65 , ExtensionHVXV66 , ExtensionHVXV67 , ExtensionHVXV68 } ) { if ( ! FB . test ( F ) ) continue ;


<s> MCCFIInstruction Inst = MCCFIInstruction :: cfiDefCfa ( nullptr , MRI . getDwarfRegNum ( <STR_LIT> , true ) , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ; return MAI ;


<s> return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> static MCInstrAnalysis * create<ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) {

return new <ISA_LIT>MCInstrAnalysis ( Info ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ; return X ;


<s> } if ( <ISA_LIT>DisableDuplex ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . reset ( <STR_LIT> ) ) ; } X -> setFeatureBits ( completeHVXFeatures ( X -> getFeatureBits ( ) ) ) ; const bool ZRegOnDefault = ( CPUName == <STR_LIT> ) || ( CPUName == <STR_LIT> ) ; if ( ZRegOnDefault ) { llvm :: FeatureBitset Features = X -> getFeatureBits ( ) ; X -> setFeatureBits ( Features . set ( <STR_LIT> ) ) ; }


<s> return new <ISA_LIT>TargetELFStreamer ( S , STI ) ;


<s> static MCTargetStreamer * create<ISA_LIT>ObjectTargetStreamer ( MCStreamer & S , const MCSubtargetInfo & STI ) {

return new <ISA_LIT>TargetELFStreamer ( S , STI ) ;


<s> static MCStreamer * createMCStreamer ( Triple const & T , MCContext & Context , std :: unique_ptr < MCAsmBackend > && MAB , std :: unique_ptr < MCObjectWriter > && OW , std :: unique_ptr < MCCodeEmitter > && Emitter , bool RelaxAll ) {

return create<ISA_LIT>ELFStreamer ( T , Context , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) ) ;


<s> void emitCommonSymbolSorted ( MCSymbol * Symbol , uint64_t Size , unsigned ByteAlignment , unsigned AccessSize ) override { <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ; <ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ; <ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ; <ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitLocalCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> void emitLocalCommonSymbolSorted ( MCSymbol * Symbol , uint64_t Size , unsigned ByteAlignment , unsigned AccessSize ) override { <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ;

<ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitLocalCommonSymbol ( Symbol , Size , ByteAlignment , AccessSize ) ;


<s> bool evaluateBranch ( MCInst const & Inst , uint64_t Addr , uint64_t Size , uint64_t & Target ) const override { if ( ! ( isCall ( Inst ) || isUnconditionalBranch ( Inst ) || isConditionalBranch ( Inst ) ) ) return false ; if ( ! <ISA_LIT>MCInstrInfo :: isExtendable ( * Info , Inst ) ) return false ; auto const & Extended ( <ISA_LIT>MCInstrInfo :: getExtendableOperand ( * Info , Inst ) ) ; assert ( Extended . isExpr ( ) ) ; int64_t Value ; if ( ! Extended . getExpr ( ) -> evaluateAsAbsolute ( Value ) ) return false ; Target = Value ; return true ;


<s> if ( Existing == ArchSubtarget . end ( ) ) return nullptr ; return Existing -> second . get ( ) ;


<s> unsigned <ISA_LIT>_MC :: GetELFFlags ( const MCSubtargetInfo & STI ) { static std :: map < StringRef , unsigned > ElfFlags = {

{ <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67T } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V68 } , } ;


<s> static std :: map < StringRef , unsigned > ElfFlags = { { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V5 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V55 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V60 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V62 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V65 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V66 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67 } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V67T } , { <STR_LIT> , ELF :: EF_HEXAGON_MACH_V68 } , } ; auto F = ElfFlags . find ( STI . getCPU ( ) ) ;

assert ( F != ElfFlags . end ( ) && <STR_LIT> ) ;


<s> return static_cast < MCELFStreamer & > ( Streamer ) ;


<s> return makeArrayRef ( VectRegRev ) ;


<s> if ( ItinUnits == <STR_LIT> || ItinUnits == <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_XLANE ) ; else if ( ItinUnits & <STR_LIT> && ItinUnits & <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_XLANE | CVI_MPY0 ) ; else if ( ItinUnits & <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_MPY0 ) ; else if ( ItinUnits & <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_XLANE ) ; else if ( ItinUnits & <STR_LIT> && ItinUnits & <STR_LIT> && ItinUnits & <STR_LIT> && ItinUnits & <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_XLANE | CVI_SHIFT | CVI_MPY0 | CVI_MPY1 ) ;

else if ( ItinUnits & <STR_LIT> && ItinUnits & <STR_LIT> ) return ( * Lanes = <NUM_LIT> , CVI_XLANE | CVI_SHIFT ) ;


<s> if ( MV67 ) return <STR_LIT> ; if ( MV67T ) return <STR_LIT> ; if ( MV68 ) return <STR_LIT> ;


<s> <ISA_LIT>MCInstrAnalysis ( MCInstrInfo const * Info ) : MCInstrAnalysis ( Info ) {


<s> <ISA_LIT>TargetAsmStreamer ( MCStreamer & S , formatted_raw_ostream & OS , bool isVerboseAsm , MCInstPrinter & IP ) : <ISA_LIT>TargetStreamer ( S ) {


<s> MCAssembler & MCA = getStreamer ( ) . getAssembler ( ) ; MCA . setELFHeaderEFlags ( <ISA_LIT>_MC :: GetELFFlags ( STI ) ) ;


<s> MCA . setELFHeaderEFlags ( <ISA_LIT>_MC :: GetELFFlags ( STI ) ) ;


<s> return MCInstrAnalysis :: isUnconditionalBranch ( Inst ) ;


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , <ISA_LIT>_MC :: create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitter ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterMCInstrAnalysis ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrAnalysis ) ;


<s> StringRef Contents ( Buffer ) ; auto PacketBundle = Contents . rsplit ( '\n' ) ; auto HeadTail = PacketBundle . first . split ( '\n' ) ; StringRef Separator = <STR_LIT> ; StringRef Indent = <STR_LIT> ; OS << <STR_LIT> ; while ( ! HeadTail . first . empty ( ) ) { StringRef InstTxt ; auto Duplex = HeadTail . first . split ( '\v' ) ; if ( ! Duplex . second . empty ( ) ) { OS << Indent << Duplex . first << Separator ; InstTxt = Duplex . second ; } else if ( ! HeadTail . first . trim ( ) . startswith ( <STR_LIT> ) ) {


<s> std :: pair < std :: string , std :: string > selectCPUAndFS ( StringRef CPU , StringRef FS ) {

std :: pair < std :: string , std :: string > Result ;


<s> std :: pair < std :: string , std :: string > Result ; Result . first = std :: string ( <ISA_LIT>_MC :: select<ISA_LIT>CPU ( CPU ) ) ; Result . second = select<ISA_LIT>FS ( Result . first , FS ) ;


<s> std :: pair < StringRef , StringRef > CPUP = CPU . split ( 't' ) ; if ( ! ArchP . first . equals ( CPUP . first ) ) report_fatal_error ( <STR_LIT> ) ; return CPU ; } if ( ArchV . empty ( ) ) { if ( CPU . empty ( ) ) CPU = DefaultArch ; return CPU ;


<s> std :: string select<ISA_LIT>FS ( StringRef CPU , StringRef FS ) { SmallVector < StringRef , <NUM_LIT> > Result ; if ( ! FS . empty ( ) ) Result . push_back ( FS ) ; switch ( EnableHVX ) { case <STR_LIT> :: V5 : case <STR_LIT> :: V55 : break ; case <STR_LIT> :: V60 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V62 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V65 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V66 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V67 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: V68 : Result . push_back ( <STR_LIT> ) ; break ; case <STR_LIT> :: Generic : { Result . push_back ( StringSwitch < StringRef > ( CPU ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) . Case ( <STR_LIT> , <STR_LIT> ) ) ;


<s> if ( ! <STR_LIT> . contains ( Op . getReg ( ) ) ) return false ; } assert ( HadDef ) ; for ( unsigned i = <NUM_LIT> ; i < II -> getNumOperands ( ) ; ++ i ) { if ( II -> getOperand ( i ) . isReg ( ) && ( II -> getOperand ( i ) . isUse ( ) || II -> getOperand ( i ) . isDef ( ) ) ) { MachineBasicBlock :: iterator localII = II ; ++ localII ;

unsigned Reg = II -> getOperand ( i ) . getReg ( ) ;


<s> if ( secondReg && ! TargetRegisterInfo :: isPhysicalRegister ( cmpOp2 ) ) { MachineInstr * def = MRI . getVRegDef ( cmpOp2 ) ; if ( def -> getOpcode ( ) == TargetOpcode :: COPY ) return false ; } } ++ II ; for ( MachineBasicBlock :: iterator localII = II ; localII != end ; ++ localII ) { if ( localII -> isDebugInstr ( ) ) continue ; if ( ! commonChecksToProhibitNewValueJump ( optLocation , localII ) ) return false ; if ( localII -> modifiesRegister ( pReg , TRI ) || localII -> readsRegister ( pReg , TRI ) ) return false ; if ( localII -> modifiesRegister ( cmpReg1 , TRI ) || ( secondReg && localII -> modifiesRegister ( cmpOp2 , TRI ) ) ) return false ;


<s> if ( MII -> mayStore ( ) ) return false ; if ( MII -> isCall ( ) ) return false ; if ( ! afterRA ) { if ( MII -> getOpcode ( ) == TargetOpcode :: KILL || MII -> getOpcode ( ) == TargetOpcode :: PHI || MII -> getOpcode ( ) == TargetOpcode :: COPY ) return false ; if ( MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> ) return false ;


if ( MII -> getOpcode ( ) == TargetOpcode :: KILL || MII -> getOpcode ( ) == TargetOpcode :: PHI || MII -> getOpcode ( ) == TargetOpcode :: COPY ) return false ;


<s> <ISA_LIT>NewValueJump ( ) : MachineFunctionPass ( ID ) {


<s> switch ( MI . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> :


<s> if ( II -> getOpcode ( ) == TargetOpcode :: KILL ) return false ; for ( unsigned i = <NUM_LIT> ; i < II -> getNumOperands ( ) ; ++ i ) { if ( II -> getOperand ( i ) . isReg ( ) && ( II -> getOperand ( i ) . isUse ( ) || II -> getOperand ( i ) . isDef ( ) ) ) { MachineBasicBlock :: iterator localII = II ; ++ localII ; unsigned Reg = II -> getOperand ( i ) . getReg ( ) ; for ( MachineBasicBlock :: iterator localBegin = localII ; localBegin != end ; ++ localBegin ) { if ( localBegin == skip ) continue ; if ( localBegin -> modifiesRegister ( Reg , TRI ) || localBegin -> readsRegister ( Reg , TRI ) ) return false ; } } }


<s> if ( secondReg ) { cmpOp2 = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; if ( secondReg && ! TargetRegisterInfo :: isPhysicalRegister ( cmpOp2 ) ) { MachineInstr * def = MRI . getVRegDef ( cmpOp2 ) ; if ( def -> getOpcode ( ) == TargetOpcode :: COPY ) return false ; } } ++ II ; for ( MachineBasicBlock :: iterator localII = II ; localII != end ; ++ localII ) { if ( ! commonChecksToProhibitNewValueJump ( optLocation , localII ) ) return false ; if ( localII -> modifiesRegister ( pReg , TRI ) || localII -> readsRegister ( pReg , TRI ) ) return false ; if ( localII -> modifiesRegister ( cmpReg1 , TRI ) || ( secondReg && localII -> modifiesRegister ( cmpOp2 , TRI ) ) ) return false ; }


<s> FunctionPass * llvm :: create<ISA_LIT>NewValueJump ( ) {


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const override {

AU . addRequired < MachineBranchProbabilityInfo > ( ) ;


<s> AU . addRequired < MachineBranchProbabilityInfo > ( ) ; MachineFunctionPass :: getAnalysisUsage ( AU ) ;


<s> const char * getPassName ( ) const override { return <STR_LIT> ;


<s> <ISA_LIT>NewValueJump ( ) : MachineFunctionPass ( ID ) { initialize<ISA_LIT>NewValueJumpPass ( * PassRegistry :: getPassRegistry ( ) ) ;


initialize<ISA_LIT>NewValueJumpPass ( * PassRegistry :: getPassRegistry ( ) ) ;


<s> if ( II -> getOperand ( i ) . isReg ( ) && ( II -> getOperand ( i ) . isUse ( ) || II -> getOperand ( i ) . isDef ( ) ) ) { MachineBasicBlock :: iterator localII = II ; ++ localII ; unsigned Reg = II -> getOperand ( i ) . getReg ( ) ; for ( MachineBasicBlock :: iterator localBegin = localII ; localBegin != end ; ++ localBegin ) { if ( localBegin == skip ) continue ;

if ( localBegin -> modifiesRegister ( Reg , TRI ) || localBegin -> readsRegister ( Reg , TRI ) ) return false ;


<s> case <STR_LIT> : case <STR_LIT> : Valid = ( isUInt < <NUM_LIT> > ( v ) || v == - <NUM_LIT> ) ; break ; case <STR_LIT> : case <STR_LIT> : Valid = isUInt < <NUM_LIT> > ( v ) ; break ; case <STR_LIT> : case <STR_LIT> : Valid = ( v == <NUM_LIT> ) ; break ; } if ( ! Valid ) return false ; } unsigned cmpReg1 , cmpOp2 = <NUM_LIT> ; cmpReg1 = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( secondReg ) { cmpOp2 = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; if ( cmpReg1 == cmpOp2 ) return false ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; if ( secondReg && ! TargetRegisterInfo :: isPhysicalRegister ( cmpOp2 ) ) { MachineInstr * def = MRI . getVRegDef ( cmpOp2 ) ; if ( def -> getOpcode ( ) == TargetOpcode :: COPY ) return false ; } } ++ II ; for ( MachineBasicBlock :: iterator localII = II ; localII != end ; ++ localII ) { if ( localII -> isDebugValue ( ) ) continue ; if ( ! commonChecksToProhibitNewValueJump ( optLocation , localII ) ) return false ; if ( localII -> modifiesRegister ( pReg , TRI ) || localII -> readsRegister ( pReg , TRI ) ) return false ; if ( localII -> modifiesRegister ( cmpReg1 , TRI ) || ( secondReg && localII -> modifiesRegister ( cmpOp2 , TRI ) ) ) return false ; } return true ;


<s> if ( MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> ) return false ; }


<s> if ( MII -> getOpcode ( ) == <STR_LIT> ) return false ; if ( ! afterRA ) { if ( MII -> getOpcode ( ) == TargetOpcode :: KILL || MII -> getOpcode ( ) == TargetOpcode :: PHI || MII -> getOpcode ( ) == TargetOpcode :: COPY ) return false ;

if ( MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> || MII -> getOpcode ( ) == <STR_LIT> ) return false ;


<s> const BranchProbability Prediction = MBPI -> getEdgeProbability ( Src , jmpTarget ) ; if ( Prediction >= BranchProbability ( <NUM_LIT> , <NUM_LIT> ) ) taken = true ; switch ( MI -> getOpcode ( ) ) { case <STR_LIT> : return taken ? <STR_LIT> : <STR_LIT> ; case <STR_LIT> : { if ( reg >= <NUM_LIT> ) return taken ? <STR_LIT> : <STR_LIT> ; else return taken ? <STR_LIT> : <STR_LIT> ; } case <STR_LIT> : { if ( secondRegNewified ) return taken ? <STR_LIT> : <STR_LIT> ; else return taken ? <STR_LIT> : <STR_LIT> ; } case <STR_LIT> : { if ( reg >= <NUM_LIT> ) return taken ? <STR_LIT> : <STR_LIT> ; else return taken ? <STR_LIT> : <STR_LIT> ; } case <STR_LIT> : { if ( secondRegNewified ) return taken ? <STR_LIT> : <STR_LIT> ; else return taken ? <STR_LIT> : <STR_LIT> ; } case <STR_LIT> : return taken ? <STR_LIT> : <STR_LIT> ; default :


<s> if ( secondRegNewified ) return <STR_LIT> ; else return <STR_LIT> ; } case <STR_LIT> : { if ( reg >= <NUM_LIT> ) return <STR_LIT> ; else return <STR_LIT> ; } case <STR_LIT> : { if ( reg >= <NUM_LIT> ) return <STR_LIT> ; else return <STR_LIT> ; } case <STR_LIT> : case <STR_LIT> : { if ( secondRegNewified ) return <STR_LIT> ; else return <STR_LIT> ; } case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : { if ( reg == <NUM_LIT> ) return <STR_LIT> ; else return <STR_LIT> ; }


<s> if ( II -> getOpcode ( ) == TargetOpcode :: KILL ) return false ; if ( II -> isImplicitDef ( ) ) return false ; if ( QII -> isSolo ( * II ) ) return false ; if ( QII -> isFloat ( * II ) ) return false ; bool HadDef = false ; for ( const MachineOperand & Op : II -> operands ( ) ) { if ( ! Op . isReg ( ) || ! Op . isDef ( ) ) continue ; if ( HadDef ) return false ; HadDef = true ; if ( ! <STR_LIT> . contains ( Op . getReg ( ) ) ) return false ; } assert ( HadDef ) ; for ( unsigned i = <NUM_LIT> ; i < II -> getNumOperands ( ) ; ++ i ) { if ( II -> getOperand ( i ) . isReg ( ) && ( II -> getOperand ( i ) . isUse ( ) || II -> getOperand ( i ) . isDef ( ) ) ) { MachineBasicBlock :: iterator localII = II ; ++ localII ; Register Reg = II -> getOperand ( i ) . getReg ( ) ; for ( MachineBasicBlock :: iterator localBegin = localII ; localBegin != end ; ++ localBegin ) { if ( localBegin == skip ) continue ; if ( localBegin -> modifiesRegister ( Reg , TRI ) || localBegin -> readsRegister ( Reg , TRI ) ) return false ;


<s> } assert ( HadDef ) ; for ( unsigned i = <NUM_LIT> ; i < II -> getNumOperands ( ) ; ++ i ) { if ( II -> getOperand ( i ) . isReg ( ) && ( II -> getOperand ( i ) . isUse ( ) || II -> getOperand ( i ) . isDef ( ) ) ) { MachineBasicBlock :: iterator localII = II ; ++ localII ; Register Reg = II -> getOperand ( i ) . getReg ( ) ; for ( MachineBasicBlock :: iterator localBegin = localII ; localBegin != end ;