<s> void DCPU16AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) { DCPU16MCInstLower MCInstLowering ( OutContext , * Mang , * this ) ; MCInst TmpInst ; MCInstLowering . Lower ( MI , TmpInst ) ; OutStreamer . EmitInstruction ( TmpInst ) ; } </s>

EmitInstruction - This callback is invoked when an instruction is emitted , to advance the hazard state .


<s>
virtual
const
char
*
getPassName
(
)
const
{
return
"DCPU16 Assembly Printer"
;
}
</s>

getPassName - Return a nice clean name for a pass .


<s> bool DCPU16AsmPrinter :: PrintAsmMemoryOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { if ( ExtraCode && ExtraCode [ 0 ] ) { return true ; } printSrcMemOperand ( MI , OpNo , O ) ; return false ; } </s>

Print the specified operand of MI , an INLINEASM instruction , using the specified assembler variant as an address .


<s> bool DCPU16AsmPrinter :: PrintAsmOperand ( const MachineInstr * MI , unsigned OpNo , unsigned AsmVariant , const char * ExtraCode , raw_ostream & O ) { if ( ExtraCode && ExtraCode [ 0 ] ) return true ; printOperand ( MI , OpNo , O ) ; return false ; } </s>

PrintAsmOperand - Print out an operand for an inline asm expression .


"Can only insert epilog into returning blocks"


<s> void DCPU16FrameLowering :: emitPrologue ( MachineFunction & MF ) const { MachineBasicBlock & MBB = MF . front ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; DCPU16MachineFunctionInfo * DCPU16FI = MF . getInfo < DCPU16MachineFunctionInfo > ( ) ; const DCPU16InstrInfo & TII = * static_cast < const DCPU16InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; DebugLoc DL = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; uint64_t StackSize = MFI -> getStackSize ( ) ; uint64_t NumBytes = StackSize - DCPU16FI -> getCalleeSavedFrameSize ( ) ; if ( hasFP ( MF ) ) { MFI -> setOffsetAdjustment ( - NumBytes ) ; BuildMI ( MBB , MBBI , DL , TII . get ( DCPU16 :: PUSH16r ) ) . addReg ( DCPU16 :: J , RegState :: Kill ) ; BuildMI ( MBB , MBBI , DL , TII . get ( DCPU16 :: MOV16rr ) , DCPU16 :: J ) . addReg ( DCPU16 :: SP ) ; for ( MachineFunction :: iterator I = llvm :: next ( MF . begin ( ) ) , E = MF . end ( ) ; I != E ; ++ I ) I -> addLiveIn ( DCPU16 :: J ) ; } while ( MBBI != MBB . end ( ) && ( MBBI -> getOpcode ( ) == DCPU16 :: PUSH16r ) ) ++ MBBI ; if ( MBBI != MBB . end ( ) ) DL = MBBI -> getDebugLoc ( ) ; if ( NumBytes ) { if ( NumBytes ) { MachineInstr * MI = BuildMI ( MBB , MBBI , DL , TII . get ( DCPU16 :: SUB16ri ) , DCPU16 :: SP ) . addReg ( DCPU16 :: SP ) . addImm ( NumBytes ) ; MI -> getOperand ( 3 ) . setIsDead ( ) ; } } } </s>

emitProlog/emitEpilog - These methods insert prolog and epilog code into the function .


<s> bool DCPU16FrameLowering :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return ( MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) || MFI -> isFrameAddressTaken ( ) ) ; } </s>

hasFP - Return true if the specified function should have a dedicated frame pointer register .


<s> bool DCPU16FrameLowering :: hasReservedCallFrame ( const MachineFunction & MF ) const { return ! MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ; } </s>

hasReservedCallFrame - Under normal circumstances , when a frame pointer is not required , we reserve argument space for call sites in the function immediately on entry to the current function .


"Slot for J register must be last in order to be found!"

processFunctionBeforeFrameFinalized - This method is called immediately before the specified function 's frame layout ( MF.getFrameInfo ( ) ) is finalized .


<s> bool DCPU16FrameLowering :: restoreCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , const std :: vector < CalleeSavedInfo > & CSI , const TargetRegisterInfo * TRI ) const { if ( CSI . empty ( ) ) return false ; DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; for ( unsigned i = 0 , e = CSI . size ( ) ; i != e ; ++ i ) BuildMI ( MBB , MI , DL , TII . get ( DCPU16 :: POP16r ) , CSI [ i ] . getReg ( ) ) ; return true ; } </s>

restoreCalleeSavedRegisters - Issues instruction ( s ) to restore all callee saved registers and returns true if it is n't possible / profitable to do so by issuing a series of load instructions via loadRegToStackSlot ( ) .


<s> bool DCPU16FrameLowering :: spillCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , const std :: vector < CalleeSavedInfo > & CSI , const TargetRegisterInfo * TRI ) const { if ( CSI . empty ( ) ) return false ; DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; DCPU16MachineFunctionInfo * MFI = MF . getInfo < DCPU16MachineFunctionInfo > ( ) ; MFI -> setCalleeSavedFrameSize ( CSI . size ( ) ) ; for ( unsigned i = CSI . size ( ) ; i != 0 ; -- i ) { unsigned Reg = CSI [ i - 1 ] . getReg ( ) ; MBB . addLiveIn ( Reg ) ; BuildMI ( MBB , MI , DL , TII . get ( DCPU16 :: PUSH16r ) ) . addReg ( Reg , RegState :: Kill ) ; } return true ; } </s>

spillCalleeSavedRegisters - Issues instruction ( s ) to spill all callee saved registers and returns true if it is n't possible / profitable to do so by issuing a series of store instructions via storeRegToStackSlot ( ) .


<s> void DCPU16InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot ) { printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ; } </s>

Print the specified MCInst to the specified raw_ostream .


<s> void DCPU16InstrInfo :: copyPhysReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , DebugLoc DL , unsigned DestReg , unsigned SrcReg , bool KillSrc ) const { unsigned Opc = DCPU16 :: MOV16rr ; BuildMI ( MBB , I , DL , get ( Opc ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; } </s>


<s> virtual const TargetRegisterInfo & getRegisterInfo ( ) const { return RI ; } </s>

getRegisterInfo - TargetInstrInfo is a superset of MRegister info .


<s> unsigned DCPU16InstrInfo :: isLoadFromStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { if ( MI -> getOpcode ( ) == DCPU16 :: MOV16rm ) { if ( MI -> getOperand ( 1 ) . isFI ( ) ) { FrameIndex = MI -> getOperand ( 1 ) . getIndex ( ) ; return MI -> getOperand ( 0 ) . getReg ( ) ; } } return 0 ; } </s>

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot , return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot .


<s> unsigned DCPU16InstrInfo :: isStoreToStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { if ( MI -> getOpcode ( ) == DCPU16 :: MOV16mr ) { if ( MI -> getOperand ( 0 ) . isFI ( ) ) { FrameIndex = MI -> getOperand ( 0 ) . getIndex ( ) ; return MI -> getOperand ( 2 ) . getReg ( ) ; } } return 0 ; } </s>

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot , return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot .


<s> bool DCPU16InstrInfo :: isUnpredicatedTerminator ( const MachineInstr * MI ) const { if ( ! MI -> isTerminator ( ) ) return false ; if ( MI -> isBranch ( ) && ! MI -> isBarrier ( ) ) return true ; if ( ! MI -> isPredicable ( ) ) return true ; return ! isPredicated ( MI ) ; } </s>

Returns true if the instruction is a terminator instruction that has not been predicated .


"Cannot store this register to stack slot!"

Load the specified register of the given register class from the specified stack frame index .


Store the specified register of the given register class to the specified stack frame index .


<s>
void
dump
(
)
{
errs
(
)
<<
"DCPU16ISelAddressMode "
<<
this
<<
'\n'
;
if
(
BaseType
==
RegBase
&&
Base
.
Reg
.
getNode
(
)
!=
0
)
{
errs
(
)
<<
"Base.Reg "
;
Base
.
Reg
.
getNode
(
)
->
dump
(
)
;
}
else
if
(
BaseType
==
FrameIndexBase
)
{
errs
(
)
<<
" Base.FrameIndex "
<<
Base
.
FrameIndex
<<
'\n'
;
}
errs
(
)
<<
" Disp "
<<
Disp
<<
'\n'
;
if
(
GV
)
{
errs
(
)
<<
"GV "
;
GV
->
dump
(
)
;
}
else
if
(
CP
)
{
errs
(
)
<<
" CP "
;
CP
->
dump
(
)
;
errs
(
)
<<
" Align"
<<
Align
<<
'\n'
;
}
else
if
(
ES
)
{
errs
(
)
<<
"ES "
;
errs
(
)
<<
ES
<<
'\n'
;
}
else
if
(
JT
!=
1
)
errs
(
)
<<
" JT"
<<
JT
<<
" Align"
<<
Align
<<
'\n'
;
}
</s>

Dump the plan to stderr ( for debugging ) .

Dcpu16
"DCPU16ISelAddressMode "
0
"Base.Reg "
" Base.FrameIndex "
" Disp "
"GV "
" CP "
" Align"
"ES "
1
" JT"
" Align"


"DCPU16 DAG->DAG Pattern Instruction Selection"

getPassName - Return a nice clean name for a pass .


<s>
SDNode
*
DCPU16DAGToDAGISel
::
Select
(
SDNode
*
Node
)
{
DebugLoc
dl
=
Node
->
getDebugLoc
(
)
;
DEBUG
(
errs
(
)
<<
"Selecting: "
)
;
DEBUG
(
Node
->
dump
(
CurDAG
)
)
;
DEBUG
(
errs
(
)
<<
"\n"
)
;
if
(
Node
->
isMachineOpcode
(
)
)
{
DEBUG
(
errs
(
)
<<
"== "
;
Node
->
dump
(
CurDAG
)
;
errs
(
)
<<
"\n"
)
;
return
;
}
switch
(
Node
->
getOpcode
(
)
)
{
default
:
break
;
case
ISD
::
FrameIndex
:
{
assert
(
Node
->
getValueType
(
0
)
==
MVT
::
i16
)
;
int
FI
=
cast
<
FrameIndexSDNode
>
(
Node
)
->
getIndex
(
)
;
SDValue
TFI
=
CurDAG
->
getTargetFrameIndex
(
FI
,
MVT
::
i16
)
;
if
(
Node
->
hasOneUse
(
)
)
return
CurDAG
->
SelectNodeTo
(
Node
,
DCPU16
::
ADD16ri
,
MVT
::
i16
,
TFI
,
CurDAG
->
getTargetConstant
(
0
,
MVT
::
i16
)
)
;
return
CurDAG
->
getMachineNode
(
DCPU16
::
ADD16ri
,
dl
,
MVT
::
i16
,
TFI
,
CurDAG
->
getTargetConstant
(
0
,
MVT
::
i16
)
)
;
}
}
SDNode
*
ResNode
=
SelectCode
(
Node
)
;
DEBUG
(
errs
(
)
<<
"=> "
)
;
if
(
ResNode
==
||
ResNode
==
Node
)
DEBUG
(
Node
->
dump
(
CurDAG
)
)
;
else
DEBUG
(
ResNode
->
dump
(
CurDAG
)
)
;
DEBUG
(
errs
(
)
<<
"\n"
)
;
return
ResNode
;
}
</s>

Main hook for targets to transform nodes into machine nodes .


<s> bool DCPU16DAGToDAGISel :: SelectInlineAsmMemoryOperand ( const SDValue & Op , char ConstraintCode , std :: vector < SDValue > & OutOps ) { SDValue Op0 , Op1 ; switch ( ConstraintCode ) { default : return true ; case 'm' : if ( ! SelectAddr ( Op , Op0 , Op1 ) ) return true ; break ; } OutOps . push_back ( Op0 ) ; OutOps . push_back ( Op1 ) ; return false ; } </s>

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode , according to the specified constraint .


<s> TargetLowering :: ConstraintType DCPU16TargetLowering :: getConstraintType ( const std :: string & Constraint ) const { if ( Constraint . size ( ) == 1 ) { switch ( Constraint [ 0 ] ) { case 'r' : return C_RegisterClass ; default : break ; } } return TargetLowering :: getConstraintType ( Constraint ) ; } </s>

Given a constraint letter , return the type of constraint for this target .


<s> std :: pair < unsigned , const TargetRegisterClass * > DCPU16TargetLowering :: getRegForInlineAsmConstraint ( const std :: string & Constraint , EVT VT ) const { if ( Constraint . size ( ) == 1 ) { switch ( Constraint [ 0 ] ) { default : break ; case 'r' : return std :: make_pair ( 0U , & DCPU16 :: GR16RegClass ) ; } } return TargetLowering :: getRegForInlineAsmConstraint ( Constraint , VT ) ; } </s>

Given a physical register constraint ( e.g .


<s> virtual MVT getShiftAmountTy ( EVT LHSTy ) const { return MVT :: i16 ; } </s>

Returns the type for the shift amount of a shift opcode .


<s> const char * DCPU16TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { default : return NULL ; case DCPU16ISD :: RET_FLAG : return "DCPU16ISD::RET_FLAG" ; case DCPU16ISD :: RETI_FLAG : return "DCPU16ISD::RETI_FLAG" ; case DCPU16ISD :: CALL : return "DCPU16ISD::CALL" ; case DCPU16ISD :: Wrapper : return "DCPU16ISD::Wrapper" ; case DCPU16ISD :: BR_CC : return "DCPU16ISD::BR_CC" ; case DCPU16ISD :: SELECT_CC : return "DCPU16ISD::SELECT_CC" ; case DCPU16ISD :: SMUL : return "DCPU16ISD::SMUL" ; case DCPU16ISD :: UMUL : return "DCPU16ISD::UMUL" ; } } </s>

getTargetNodeName - This method returns the name of a target specific


<s>
SDValue
DCPU16TargetLowering
::
LowerCall
(
TargetLowering
::
CallLoweringInfo
&
CLI
,
SmallVectorImpl
<
SDValue
>
&
InVals
)
const
{
SelectionDAG
&
DAG
=
CLI
.
DAG
;
DebugLoc
&
dl
=
CLI
.
DL
;
SmallVector
<
ISD
::
OutputArg
,
32
>
&
Outs
=
CLI
.
Outs
;
SmallVector
<
SDValue
,
32
>
&
OutVals
=
CLI
.
OutVals
;
SmallVector
<
ISD
::
InputArg
,
32
>
&
Ins
=
CLI
.
Ins
;
SDValue
Chain
=
CLI
.
Chain
;
SDValue
Callee
=
CLI
.
Callee
;
bool
&
isTailCall
=
CLI
.
IsTailCall
;
CallingConv
::
ID
CallConv
=
CLI
.
CallConv
;
bool
isVarArg
=
CLI
.
IsVarArg
;
isTailCall
=
false
;
switch
(
CallConv
)
{
default
:
llvm_unreachable
(
"Unsupported calling convention"
)
;
case
CallingConv
::
Fast
:
case
CallingConv
::
C
:
return
LowerCCCCallTo
(
Chain
,
Callee
,
CallConv
,
isVarArg
,
isTailCall
,
Outs
,
OutVals
,
Ins
,
dl
,
DAG
,
InVals
)
;
case
CallingConv
::
DCPU16_INTR
:
report_fatal_error
(
"ISRs cannot be called directly"
)
;
}
}
</s>

This hook must be implemented to lower calls into the specified DAG .


<s> SDValue DCPU16TargetLowering :: LowerCallResult ( SDValue Chain , SDValue InFlag , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < ISD :: InputArg > & Ins , DebugLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { SmallVector < CCValAssign , 16 > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_DCPU16 ) ; for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( 1 ) ; InFlag = Chain . getValue ( 2 ) ; InVals . push_back ( Chain . getValue ( 0 ) ) ; } return Chain ; } </s>

LowerCallResult - Lower the result values of an ISD : :CALL into the appropriate copies out of appropriate physical registers .


"Interrupt handlers take exactly one integer or unsigned argument"

This hook must be implemented to lower the incoming ( formal ) arguments , described by the Ins array , into the specified DAG .


<s>
SDValue
DCPU16TargetLowering
::
LowerOperation
(
SDValue
Op
,
SelectionDAG
&
DAG
)
const
{
switch
(
Op
.
getOpcode
(
)
)
{
case
ISD
::
GlobalAddress
:
return
LowerGlobalAddress
(
Op
,
DAG
)
;
case
ISD
::
BlockAddress
:
return
LowerBlockAddress
(
Op
,
DAG
)
;
case
ISD
::
ExternalSymbol
:
return
LowerExternalSymbol
(
Op
,
DAG
)
;
case
ISD
::
BR_CC
:
return
LowerBR_CC
(
Op
,
DAG
)
;
case
ISD
::
SELECT_CC
:
return
LowerSELECT_CC
(
Op
,
DAG
)
;
case
ISD
::
SIGN_EXTEND
:
return
LowerSIGN_EXTEND
(
Op
,
DAG
)
;
case
ISD
::
RETURNADDR
:
return
LowerRETURNADDR
(
Op
,
DAG
)
;
case
ISD
::
FRAMEADDR
:
return
LowerFRAMEADDR
(
Op
,
DAG
)
;
case
ISD
::
ROTL
:
return
LowerROT
(
Op
,
DAG
,
true
)
;
case
ISD
::
ROTR
:
return
LowerROT
(
Op
,
DAG
,
false
)
;
case
ISD
::
SMUL_LOHI
:
return
LowerMUL_LOHI
(
Op
,
DAG
,
true
)
;
case
ISD
::
UMUL_LOHI
:
return
LowerMUL_LOHI
(
Op
,
DAG
,
false
)
;
case
ISD
::
JumpTable
:
return
LowerJumpTable
(
Op
,
DAG
)
;
default
:
llvm_unreachable
(
"unimplemented operand"
)
;
}
}
</s>

LowerOperation - Provide custom lowering hooks for some operations .


"Interrupt handlers cannot return any value"

This hook must be implemented to lower outgoing return values , described by the Outs array , into the specified DAG .


<s>
MCSymbol
*
DCPU16MCInstLower
::
GetBlockAddressSymbol
(
const
MachineOperand
&
MO
)
const
{
switch
(
MO
.
getTargetFlags
(
)
)
{
default
:
llvm_unreachable
(
"Unknown target flag on GV operand"
)
;
case
0
:
break
;
}
return
Printer
.
GetBlockAddressSymbol
(
MO
.
getBlockAddress
(
)
)
;
}
</s>

Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block .


<s>
MCSymbol
*
DCPU16MCInstLower
::
GetExternalSymbolSymbol
(
const
MachineOperand
&
MO
)
const
{
switch
(
MO
.
getTargetFlags
(
)
)
{
default
:
llvm_unreachable
(
"Unknown target flag on GV operand"
)
;
case
0
:
break
;
}
return
Printer
.
GetExternalSymbolSymbol
(
MO
.
getSymbolName
(
)
)
;
}
</s>

Return the MCSymbol for the specified ExternalSymbol .


<s> void getAnalysisUsage ( AnalysisUsage & AU ) const { MachineFunctionPass :: getAnalysisUsage ( AU ) ; } </s>

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this .


<s>
const
char
*
getPassName
(
)
const
{
return
"DCPU16 optimize conditional branches"
;
}
</s>


<s> bool DCPU16Peephole :: runOnMachineFunction ( MachineFunction & MF ) { QII = static_cast < const DCPU16InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; QRI = static_cast < const DCPU16RegisterInfo * > ( MF . getTarget ( ) . getRegisterInfo ( ) ) ; MRI = & MF . getRegInfo ( ) ; if ( DisableDCPU16Peephole ) return false ; for ( MachineFunction :: iterator mbbIter = MF . begin ( ) ; mbbIter != MF . end ( ) ; ++ mbbIter ) { MachineBasicBlock * mbb = mbbIter ; if ( ! DisableOptBrcc ) runOptBrcc ( mbb ) ; } return true ; } </s>

runOnMachineFunction - Emit the function body .


<s> const uint16_t * Dcpu16RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { static const uint16_t CalleeSavedRegs [ ] = { 0 } ; return CalleeSavedRegs ; } </s>


<s> void DCPU16RegisterInfo :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; if ( ! TFI -> hasReservedCallFrame ( MF ) ) { MachineInstr * Old = I ; uint64_t Amount = Old -> getOperand ( 0 ) . getImm ( ) ; if ( Amount != 0 ) { Amount = ( Amount + StackAlign - 1 ) / StackAlign * StackAlign ; MachineInstr * New = 0 ; if ( Old -> getOpcode ( ) == TII . getCallFrameSetupOpcode ( ) ) { New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( DCPU16 :: SUB16ri ) , DCPU16 :: SP ) . addReg ( DCPU16 :: SP ) . addImm ( Amount ) ; } else { assert ( Old -> getOpcode ( ) == TII . getCallFrameDestroyOpcode ( ) ) ; uint64_t CalleeAmt = Old -> getOperand ( 1 ) . getImm ( ) ; Amount -= CalleeAmt ; if ( Amount ) New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( DCPU16 :: ADD16ri ) , DCPU16 :: SP ) . addReg ( DCPU16 :: SP ) . addImm ( Amount ) ; } if ( New ) { New -> getOperand ( 3 ) . setIsDead ( ) ; MBB . insert ( I , New ) ; } } } else if ( I -> getOpcode ( ) == TII . getCallFrameDestroyOpcode ( ) ) { if ( uint64_t CalleeAmt = I -> getOperand ( 1 ) . getImm ( ) ) { MachineInstr * Old = I ; MachineInstr * New = BuildMI ( MF , Old -> getDebugLoc ( ) , TII . get ( DCPU16 :: SUB16ri ) , DCPU16 :: SP ) . addReg ( DCPU16 :: SP ) . addImm ( CalleeAmt ) ; New -> getOperand ( 3 ) . setIsDead ( ) ; MBB . insert ( I , New ) ; } } MBB . erase ( I ) ; } </s>

This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy pseudo instructions ( but only if the Target is using them ) .


"Instr doesn't have FrameIndex operand!"

This method must be overriden to eliminate abstract frame indices from instructions which may use them .


<s> const uint16_t * DCPU16RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { const Function * F = MF -> getFunction ( ) ; static const uint16_t CalleeSavedRegs [ ] = { DCPU16 :: X , DCPU16 :: Y , DCPU16 :: Z , DCPU16 :: I , DCPU16 :: J , 0 } ; static const uint16_t CalleeSavedRegsIntr [ ] = { DCPU16 :: EX , DCPU16 :: B , DCPU16 :: C , DCPU16 :: X , DCPU16 :: Y , DCPU16 :: Z , DCPU16 :: I , DCPU16 :: J , 0 } ; return ( F -> getCallingConv ( ) == CallingConv :: DCPU16_INTR ? CalleeSavedRegsIntr : CalleeSavedRegs ) ; } </s>


<s>
const
uint32_t
*
DCPU16RegisterInfo
::
getCallPreservedMask
(
CallingConv
::
ID
CallConv
)
const
{
switch
(
CallConv
)
{
default
:
llvm_unreachable
(
"Unsupported calling convention"
)
;
case
CallingConv
::
C
:
case
CallingConv
::
Fast
:
return
CSR_DCPU16_RegMask
;
}
}
</s>

Return a mask of call-preserved registers for the given calling convention on the current function .


<s> unsigned DCPU16RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; return TFI -> hasFP ( MF ) ? DCPU16 :: J : DCPU16 :: SP ; } </s>


<s> const TargetRegisterClass * DCPU16RegisterInfo :: getPointerRegClass ( const MachineFunction & MF , unsigned Kind ) const { return & DCPU16 :: GR16RegClass ; } </s>

getPointerRegClass - Returns a TargetRegisterClass used for pointer values .


<s> BitVector DCPU16RegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; Reserved . set ( DCPU16 :: EX ) ; Reserved . set ( DCPU16 :: SP ) ; if ( TFI -> hasFP ( MF ) ) Reserved . set ( DCPU16 :: J ) ; return Reserved ; } </s>

getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a special register that has particular uses and should be considered unavailable at all times , e.g .


<s> bool Dcpu16PassConfig :: addInstSelector ( ) { PM . add ( createDcpu16ISelDag ( getDcpu16TargetMachine ( ) ) ) ; return false ; } </s>

addInstSelector - This method should install an instruction selector pass , which converts from LLVM code to machine instructions .


<s> bool Dcpu16PassConfig :: addPreEmitPass ( ) { return false ; } </s>

This pass may be implemented by targets that want to run passes immediately before machine code is emitted .


<s> TargetPassConfig * Dcpu16TargetMachine :: createPassConfig ( PassManagerBase & PM ) { return new Dcpu16PassConfig ( this , PM ) ; } </s>

Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of CodeGen passes .


<s> virtual const Dcpu16InstrInfo * getInstrInfo ( ) const { return & InstrInfo ; } </s>


<s> virtual const Dcpu16RegisterInfo * getRegisterInfo ( ) const { return & InstrInfo . getRegisterInfo ( ) ; } </s>

getRegisterInfo - TargetInstrInfo is a superset of MRegister info .


<s> bool DCPU16PassConfig :: addInstSelector ( ) { addPass ( createDCPU16ISelDag ( getDCPU16TargetMachine ( ) , getOptLevel ( ) ) ) ; addPass ( createDCPU16Peephole ( ) ) ; return false ; } </s>


<s> TargetPassConfig * DCPU16TargetMachine :: createPassConfig ( PassManagerBase & PM ) { return new DCPU16PassConfig ( this , PM ) ; } </s>


<s> virtual const DCPU16InstrInfo * getInstrInfo ( ) const { return & InstrInfo ; } </s>


<s> virtual const TargetRegisterInfo * getRegisterInfo ( ) const { return & InstrInfo . getRegisterInfo ( ) ; } </s>


<s> virtual const DCPU16Subtarget * getSubtargetImpl ( ) const { return & Subtarget ; } </s>

Virtual method implemented by subclasses that returns a reference to that target 's TargetSubtargetInfo-derived member variable .