<s> MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; DebugLoc DL ; const MCInstrDesc & CFID = HII . get ( TargetOpcode :: CFI_INSTRUCTION ) ; MCSymbol * FrameLabel = MMI . getContext ( ) . createTempSymbol ( ) ; bool HasFP = hasFP ( MF ) ; if ( HasFP ) { unsigned DwFPReg = HRI . getDwarfRegNum ( HRI . getFrameRegister ( ) , true ) ; unsigned DwRAReg = HRI . getDwarfRegNum ( HRI . getRARegister ( ) , true ) ; auto DefCfa = MCCFIInstruction :: createDefCfa ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = find_if ( CSI , IfR ) ; if ( F == CSI . end ( )


<s> assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned RetOpc ; if ( LongCalls ) RetOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; else RetOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( RetOpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , CSI , true , false ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; HII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC , & HRI ) ; } return


<s> MachineBasicBlock :: iterator MI = MBB . begin ( ) ; PrologueStubs = false ; MachineFunction & MF = * MBB . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; if ( useSpillFunction ( MF , CSI ) ) { PrologueStubs = true ; unsigned MaxReg = getMaxCalleeSavedReg ( CSI , HRI ) ; bool StkOvrFlowEnabled = EnableStackOVFSanitizer ; const char * SpillFun = getSpillFunctionFor ( MaxReg , SK_ToMem , StkOvrFlowEnabled ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . isPositionIndependent ( ) ; bool LongCalls = HST . useLongCalls ( ) || EnableSaveRestoreLong ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : DebugLoc ( ) ; unsigned SpillOpc ; if ( StkOvrFlowEnabled ) { if ( LongCalls ) SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; } else { if ( LongCalls ) SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; } MachineInstr * SaveRegsCall = BuildMI ( MBB , MI , DL , HII . get ( SpillOpc ) ) . addExternalSymbol ( SpillFun ) ; addCalleeSaveRegistersAsImpOperand ( SaveRegsCall , CSI , false , true ) ; for ( unsigned I = <NUM_LIT> ; I < CSI . size ( ) ; ++ I ) MBB . addLiveIn ( CSI [ I ] . getReg ( ) ) ; return true ; } for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ;


<s> else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; } MachineInstr * SaveRegsCall = BuildMI ( MBB , MI , DL , HII . get ( SpillOpc ) ) . addExternalSymbol ( SpillFun ) ; addCalleeSaveRegistersAsImpOperand ( SaveRegsCall , CSI , false , true ) ; for ( unsigned I = <NUM_LIT> ; I < CSI . size ( ) ; ++ I ) MBB . addLiveIn ( CSI [ I ] . getReg ( ) ) ; return true ; } for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; bool IsKill = ! HRI . isEHReturnCalleeSaveReg ( Reg ) ; int FI = CSI [ i ] . getFrameIdx


<s> unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addDef ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . isEnvironmentMusl ( ) || ! MF . getFunction ( ) . isVarArg ( ) ) { if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addDef ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , dl , HII . get ( NewOpc ) ) . addDef ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; NewI -> copyImplicitOps ( MF , * RetI ) ; MBB . erase ( RetI ) ; } else { int NumVarArgRegs = <NUM_LIT> - FirstVarArgSavedReg ; int RegisterSavedAreaSizePlusPadding = ( NumVarArgRegs % <NUM_LIT> == <NUM_LIT> ) ? ( NumVarArgRegs * <NUM_LIT> ) : ( NumVarArgRegs * <NUM_LIT> + <NUM_LIT> ) ; MachineBasicBlock :: iterator Term = MBB . getFirstTerminator


<s> static inline bool isMinSize ( const MachineFunction &


<s> static inline bool isOptNone ( const MachineFunction & MF ) { return MF . getFunction ( ) . hasOptNone ( ) || MF . getTarget ( ) .


<s> static inline bool isOptSize ( const MachineFunction & MF ) { const Function & F = MF .


<s> switch ( MI . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : ++ LS ; LLVM_FALLTHROUGH ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : ++ LS ; LLVM_FALLTHROUGH ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( MI . getOperand ( <NUM_LIT> ) . isFI ( ) ) HasImmStack


<s> bool <ISA_LIT>FrameLowering :: needsAligna ( const MachineFunction & MF


<s> for ( MCRegAliasIterator AI ( Reg , & HRI , true ) ; AI . isValid ( ) ; ++ AI ) if ( MRI . isPhysRegUsed ( * AI ) ) return true ; return


<s> if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI : BB ) { bool KeepOld = true ; ArrayRef < MachineMemOperand * > memops = MI . memoperands ( ) ; SmallVector < MachineMemOperand * , <NUM_LIT> > new_memops ; for ( MachineMemOperand * MMO : memops ) { auto * PV = MMO -> getPseudoValue ( ) ; if ( auto * FS = dyn_cast_or_null < FixedStackPseudoSourceValue > ( PV ) ) { int FI = FS -> getFrameIndex ( ) ; if ( DealignSlots . count ( FI ) ) { unsigned A = MFI . getObjectAlignment ( FI ) ; auto * NewMMO = MF . getMachineMemOperand ( MMO -> getPointerInfo ( ) , MMO -> getFlags ( ) , MMO -> getSize ( ) , A , MMO -> getAAInfo ( ) , MMO -> getRanges ( ) , MMO -> getSyncScopeID ( ) , MMO -> getOrdering ( ) , MMO -> getFailureOrdering ( ) ) ; new_memops . push_back ( NewMMO ) ; KeepOld = false ; continue ; } } new_memops . push_back ( MMO ) ; } if ( ! KeepOld ) MI . setMemRefs ( MF , new_memops ) ; } } } unsigned AP = <NUM_LIT> ; if ( const MachineInstr * AI = getAlignaInstr ( MF ) ) AP = AI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo


<s> bool restoreCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , std :: vector < CalleeSavedInfo > &

CSI , const TargetRegisterInfo * TRI ) const override {


<s> bool restoreCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , std :: vector < CalleeSavedInfo > & CSI , const TargetRegisterInfo * TRI ) const override { return true


<s> bool NeedCFI = MF . needsFrameMoves ( ) ; if ( ! NeedCFI ) return false ; HFI . insertCFIInstructions ( MF ) ; return true


<s> if ( ! NeedCFI ) return false ; HFI . insertCFIInstructions ( MF ) ; return true


<s> for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ; ++ i ) { unsigned R = CSI [ i ] . getReg ( ) ; if ( ! <STR_LIT> . contains ( R ) ) return true ; Regs [ R ] = true ; } int F = Regs . find_first ( ) ; if ( F != <STR_LIT> ) return true ; while ( F >= <NUM_LIT> ) { int N = Regs . find_next ( F ) ; if ( N >= <NUM_LIT> && N != F + <NUM_LIT> ) return true ; F =


<s> void <ISA_LIT>FrameLowering :: updateEntryPaths ( MachineFunction & MF , MachineBasicBlock & SaveB ) const { SetVector < unsigned > Worklist ; MachineBasicBlock & EntryB = MF . front ( ) ; Worklist . insert ( EntryB . getNumber ( ) ) ; unsigned SaveN = SaveB . getNumber ( ) ; auto & CSI = MF . getFrameInfo ( ) . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i < Worklist . size ( ) ; ++ i ) { unsigned BN = Worklist [ i ] ; MachineBasicBlock & MBB = * MF . getBlockNumbered ( BN ) ; for ( auto & R : CSI ) if ( ! MBB . isLiveIn ( R . getReg ( ) ) ) MBB . addLiveIn ( R . getReg ( ) ) ; if ( BN != SaveN ) for ( auto & SB : MBB . successors ( ) ) Worklist . insert (


<s> SetVector < unsigned > Worklist ; MachineBasicBlock & EntryB = MF . front ( ) ; Worklist . insert ( EntryB . getNumber ( ) ) ; unsigned SaveN = SaveB . getNumber ( ) ; auto & CSI = MF . getFrameInfo ( ) . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; i < Worklist . size ( ) ; ++ i ) { unsigned BN = Worklist [ i ] ; MachineBasicBlock & MBB = * MF . getBlockNumbered ( BN ) ; for ( auto & R : CSI ) if ( ! MBB . isLiveIn ( R . getReg ( ) ) ) MBB . addLiveIn ( R . getReg ( ) ) ; if ( BN != SaveN ) for ( auto & SB : MBB . successors ( ) ) Worklist . insert (


<s> bool <ISA_LIT>FrameLowering :: updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock & RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const { assert ( MBB . getNumber ( ) >= <NUM_LIT> ) ; unsigned BN = MBB . getNumber ( ) ; if ( Path [ BN ] || DoneF [ BN ] ) return false ; if ( DoneT [ BN ] ) return true ; auto & CSI = MBB . getParent ( ) -> getFrameInfo ( ) . getCalleeSavedInfo ( ) ; Path [ BN ] = true ; bool ReachedExit = false ; for ( auto & SB : MBB . successors ( ) ) ReachedExit |= updateExitPaths ( * SB , RestoreB , DoneT , DoneF , Path ) ; if ( ! MBB . empty ( ) && MBB . back ( ) . isReturn ( ) ) { MachineInstr & RetI = MBB . back ( ) ; if ( ! isRestoreCall ( RetI . getOpcode ( ) ) ) for ( auto & R : CSI ) RetI . addOperand ( MachineOperand :: CreateReg ( R . getReg ( ) , false , true ) ) ; ReachedExit =


<s> bool <ISA_LIT>FrameLowering :: useRestoreFunction ( const MachineFunction & MF , const CSIVect & CSI ) const { if ( shouldInlineCSR ( MF , CSI ) ) return false ; if ( isMinSize ( MF ) ) return true ; unsigned NumCSI = CSI . size ( ) ; if ( NumCSI <= <NUM_LIT> ) return false ; unsigned Threshold = isOptSize ( MF )

? SpillFuncThresholdOs - <NUM_LIT> : SpillFuncThreshold ;


<s> if ( shouldInlineCSR ( MF , CSI ) ) return false ; if ( isMinSize ( MF ) ) return true ; unsigned NumCSI = CSI . size


<s> if ( NumCSI <= <NUM_LIT> ) return false ; unsigned Threshold = isOptSize ( MF

) ? SpillFuncThresholdOs : SpillFuncThreshold ;


<s> unsigned NumCSI = CSI . size ( ) ; if ( NumCSI <= <NUM_LIT> ) return false ; unsigned Threshold = isOptSize ( MF ) ? SpillFuncThresholdOs : SpillFuncThreshold ; return Threshold <


<s> if ( ! needToReserveScavengingSpillSlots ( MF , HRI , RC ) ) continue ; unsigned Num = RC == & <STR_LIT> ? NumberScavengerSlots : <NUM_LIT> ; unsigned S = HRI . getSpillSize ( * RC ) , A = HRI . getSpillAlignment ( * RC ) ; for ( unsigned i = <NUM_LIT> ; i < Num ; i ++ ) { int NewFI = MFI . CreateSpillStackObject ( S , A ) ; RS -> addScavengingFrameIndex ( NewFI ) ; } } } TargetFrameLowering :: determineCalleeSaves ( MF ,


<s> if ( ! <STR_LIT> . contains ( DstR ) || ! <STR_LIT> . contains ( SrcR ) ) return false ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( B , It , DL , HII . get ( TargetOpcode :: COPY ) , TmpR ) . add ( MI -> getOperand ( <NUM_LIT> ) ) ; BuildMI ( B , It , DL , HII . get ( TargetOpcode :: COPY ) , DstR ) . addReg ( TmpR , RegState :: Kill ) ; NewRegs . push_back (


<s> int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , DstR ) . addReg ( TmpR


<s> unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return


<s> bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister ( RC ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR0 ) . addImm ( <NUM_LIT> ) ; auto * HRI = B . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . loadRegFromStackSlot ( B , It , TmpR1 , FI , RC , HRI ) ; expandLoadVec ( B , std :: prev ( It ) , MRI , HII , NewRegs ) ; unsigned VandOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( VandOpc ) , DstR ) . addReg ( TmpR1 , RegState :: Kill ) . addReg ( TmpR0 , RegState :: Kill ) ; NewRegs . push_back ( TmpR0 ) ; NewRegs . push_back ( TmpR1


<s> unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , TmpR ) . addReg ( SrcR , getKillRegState ( IsKill ) ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( TmpR , RegState :: Kill

) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ;


<s> unsigned Opc = MI -> getOpcode ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , TmpR ) . addReg ( SrcR , getKillRegState ( IsKill ) ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( TmpR , RegState :: Kill ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; NewRegs . push_back ( TmpR ) ; B . erase ( It


<s> MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister ( RC ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR0 ) . addImm ( <NUM_LIT> ) ; unsigned VandOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( VandOpc ) , TmpR1 ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . addReg ( TmpR0 , RegState :: Kill ) ; auto * HRI = B . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . storeRegToStackSlot ( B , It , TmpR1 , true , FI , RC , HRI ) ; expandStoreVec ( B , std :: prev ( It ) , MRI , HII , NewRegs ) ; NewRegs . push_back ( TmpR0 ) ; NewRegs . push_back ( TmpR1 ) ; B . erase ( It


<s> bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; unsigned SP = HRI . getStackRegister ( ) , FP = HRI . getFrameRegister ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AP = HMFI . getStackAlignBasePhysReg ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ; int RealOffset = Offset


<s> bool HasFixed = MFI . getNumFixedObjects ( ) ; bool HasPrealloc = const_cast < MachineFrameInfo & > ( MFI ) . getLocalFrameObjectCount ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt ::


<s> auto & HRI = * HST . getRegisterInfo ( ) ; unsigned SP = HRI . getStackRegister ( ) ; MachineInstr * RetI = getReturn ( MBB ) ; unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; MachineBasicBlock :: iterator InsertPt = MBB . getFirstTerminator ( ) ; DebugLoc DL ; if ( InsertPt != MBB . end ( ) ) DL = InsertPt -> getDebugLoc ( ) ; else if ( ! MBB . empty ( ) ) DL = std :: prev ( MBB . end ( ) ) -> getDebugLoc ( ) ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc =


<s> MI -> eraseFromParent ( ) ; } if ( ! hasFP ( MF ) ) return ; const unsigned int ALLOCFRAME_MAX = <NUM_LIT> ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo ( ) , MachineMemOperand :: MOStore , <NUM_LIT> , <NUM_LIT> ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ; unsigned CallerSavedReg = HRI . getFirstCallerSavedNonParamReg ( ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , CallerSavedReg ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( CallerSavedReg ) ; } else { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addImm ( NumBytes ) . addMemOperand ( MMO ) ; } if ( AlignStack ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( -


<s> static inline bool isMinSize ( const


<s> static inline bool isOptSize ( const MachineFunction & MF ) { const Function & F = * MF . getFunction ( ) ; return F . optForSize ( ) && !


<s> if ( ! MFI . hasVarSizedObjects ( ) ) return false ; unsigned MaxA = MFI . getMaxAlignment ( ) ; if ( MaxA <= getStackAlignment ( ) ) return false ; return true


<s> unsigned MaxA = MFI . getMaxAlignment ( ) ; if ( MaxA <= getStackAlignment ( ) ) return


<s> } if ( MO . isRegMask ( ) ) { const uint32_t * BM = MO . getRegMask ( ) ; for ( int x = CSR . find_first ( ) ; x >= <NUM_LIT> ; x = CSR . find_next ( x ) ) { unsigned R = x ; if ( ! ( BM [ R / <NUM_LIT> ] & ( <NUM_LIT> << ( R % <NUM_LIT> ) ) ) ) return true ; } } } } return


<s> for ( auto & I : MBB ) { const MachineInstr * MI = & I ; if ( MI -> isCall ( ) ) return true ; unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : return true ; default : break ; } for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( MO . isFI ( ) ) return true ; if ( MO . isReg ( ) ) { unsigned R = MO . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( R ) ) return true ; for ( MCSubRegIterator S ( R , & HRI , true ) ; S . isValid ( ) ; ++ S ) if ( CSR [ * S ] ) return true ; continue ; } if ( MO . isRegMask ( ) ) { const uint32_t * BM = MO . getRegMask ( ) ; for ( int x = CSR . find_first ( ) ; x >= <NUM_LIT> ; x = CSR


<s> unsigned NumCSI = CSI . size ( ) ; if ( NumCSI <= <NUM_LIT> ) return false ; unsigned Threshold = isOptSize ( MF ) ? SpillFuncThresholdOs - <NUM_LIT> :


<s> if ( shouldInlineCSR ( MF , CSI ) ) return false ; if ( isMinSize ( MF ) ) return true ; unsigned NumCSI = CSI . size ( ) ; if ( NumCSI <= <NUM_LIT> )


<s> unsigned R = x ; for ( MCSubRegIterator SR ( R , TRI , true ) ; SR . isValid ( ) ; ++ SR ) { if ( ! Reserved [ * SR ] ) continue ; TmpSup [ R ] = false ; break ; } } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( TmpSup , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; SRegs |= TmpSup ; LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI ) ; SR . isValid ( ) ; ++ SR ) { if ( ! SRegs [ * SR ] ) continue ; SRegs [ R ] = false ; break ; } } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; CSI . clear ( ) ; using SpillSlot = TargetFrameLowering :: SpillSlot ; unsigned NumFixed ; int MinOffset = <NUM_LIT> ; const SpillSlot * FixedSlots = getCalleeSavedSpillSlots ( NumFixed ) ; for ( const SpillSlot * S = FixedSlots ; S != FixedSlots + NumFixed ; ++ S ) { if ( ! SRegs [ S -> Reg ] ) continue ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( S -> Reg ) ; int FI = MFI . CreateFixedSpillStackObject ( TRI -> getSpillSize ( * RC ) , S -> Offset ) ; MinOffset = std :: min ( MinOffset , S -> Offset ) ; CSI . push_back ( CalleeSavedInfo ( S -> Reg , FI ) ) ; SRegs [ S -> Reg ] = false ; } for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( R ) ; unsigned Size = TRI -> getSpillSize ( * RC ) ; int Off = MinOffset - Size ; Align Alignment = std :: min ( TRI -> getSpillAlign ( * RC ) , getStackAlign ( ) ) ; Off &= - Alignment . value ( ) ; int FI = MFI . CreateFixedSpillStackObject ( Size , Off ) ; MinOffset = std :: min ( MinOffset , Off ) ; CSI . push_back ( CalleeSavedInfo ( R , FI ) ) ; SRegs [ R ] =


<s> if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) for ( const MCPhysReg * R = HRI . getCalleeSavedRegs ( & MF ) ; * R ; ++ R ) SavedRegs . set ( * R ) ; SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) || mayOverflowFrameOffset ( MF ) ) { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * >


<s> if ( ! NewRegs . empty ( ) || mayOverflowFrameOffset ( MF ) ) { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto * RC : SpillRCs ) { if ( ! needToReserveScavengingSpillSlots ( MF , HRI , RC ) ) continue ; unsigned Num = <NUM_LIT> ; switch ( RC -> getID ( ) ) { case <STR_LIT> : Num = NumberScavengerSlots ; break ; case <STR_LIT> : Num = <NUM_LIT> ; break ; } unsigned S = HRI . getSpillSize ( * RC ) ; Align A = HRI . getSpillAlign ( * RC ) ; for ( unsigned i = <NUM_LIT> ; i < Num ; i ++ ) { int NewFI = MFI . CreateSpillStackObject ( S , A ) ; RS -> addScavengingFrameIndex (


<s> assert ( ! MFI . hasVarSizedObjects ( ) && ! HST . getRegisterInfo ( ) -> hasStackRealignment ( MF ) ) ; return F . hasFnAttribute ( Attribute :: NoReturn ) && F . hasFnAttribute ( Attribute :: NoUnwind ) && ! F . hasFnAttribute ( Attribute :: UWTable ) &&

HST . noreturnStackElim ( ) && MFI . getStackSize ( ) == <NUM_LIT> ;


<s> MachineFunction & MF = * B . getParent ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; Register DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; Register DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool NeedsAligna = needsAligna ( MF


<s> Align NeedAlign = HRI . getSpillAlign ( <STR_LIT> ) ; Align HasAlign = MFI . getObjectAlign ( FI ) ; unsigned LoadOpc ; auto UseAligned = [ & ] ( Align NeedAlign , Align HasAlign ) { return ! NeedsAligna && ( NeedAlign <= HasAlign ) ; } ; LoadOpc = UseAligned ( NeedAlign , HasAlign ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; LoadOpc = UseAligned ( NeedAlign , HasAlign ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex (

FI ) . addImm ( Size ) . cloneMemRefs ( * MI ) ;


<s> MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; bool NeedsAligna = needsAligna ( MF ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; Align NeedAlign = HRI . getSpillAlign


<s> MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; bool NeedsAligna = needsAligna ( MF ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) .


<s> bool <ISA_LIT>FrameLowering :: expandStoreVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineFunction & MF = * B . getParent ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; LivePhysRegs LPR ( HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < MCPhysReg , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; Register SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool NeedsAligna = needsAligna ( MF ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; Align NeedAlign = HRI . getSpillAlign ( <STR_LIT> ) ; Align HasAlign = MFI . getObjectAlign ( FI ) ; unsigned


<s> bool HasExtraAlign = HRI . hasStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; Register SP = HRI . getStackRegister ( ) ; Register FP = HRI . getFrameRegister ( ) ; Register AP = HMFI . getStackAlignBasePhysReg ( ) ; if ( AP == <NUM_LIT> ) AP = FP ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP


<s> static unsigned getMaxCalleeSavedReg ( ArrayRef < CalleeSavedInfo > CSI , const TargetRegisterInfo & TRI ) { static_assert ( <STR_LIT> > <NUM_LIT> , <STR_LIT> ) ; if ( CSI . empty ( ) ) return <NUM_LIT> ; unsigned Max = getMax32BitSubRegister ( CSI [ <NUM_LIT> ] . getReg ( ) , TRI ) ; for ( unsigned I = <NUM_LIT> , E = CSI . size ( ) ; I < E ; ++ I ) { unsigned Reg = getMax32BitSubRegister ( CSI [ I ]


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; bool HasExtraAlign = HRI . hasStackRealignment ( MF ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) return true ; if ( HasAlloca || HasExtraAlign ) return true ; if ( MFI . getStackSize ( ) > <NUM_LIT> ) { const TargetMachine & TM = MF . getTarget ( ) ; if ( TM . Options . DisableFramePointerElim ( MF ) || ! EliminateFramePointer ) return true ; if ( EnableStackOVFSanitizer ) return true ; } const auto & HMFI = * MF . getInfo <


<s> for ( const MachineInstr & MI : MBB . terminators ( ) ) if ( MI . isReturn ( ) ) return true ; return false


<s> auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; const unsigned int ALLOCFRAME_MAX = <NUM_LIT> ; auto * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getStack ( MF , <NUM_LIT> ) , MachineMemOperand :: MOStore , <NUM_LIT> , Align ( <NUM_LIT> ) ) ; DebugLoc dl = MBB . findDebugLoc ( InsertPt ) ; unsigned SP = HRI . getStackRegister (


<s> STOpc = <STR_LIT> ; break ; case <NUM_LIT> : default : LDOpc = <STR_LIT> ; STOpc = <STR_LIT> ; break ; } unsigned RegUsed = LDOpc == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; int LoadStoreCount = ObjSize / OpcodeChecker ; if ( ObjSize % OpcodeChecker ) ++ LoadStoreCount ; if ( NumBytes != <NUM_LIT> ) NumBytes = alignTo ( NumBytes , ObjAlign ) ; int Count = <NUM_LIT> ; while ( Count < LoadStoreCount ) { BuildMI ( MBB , InsertPt , dl , HII . get ( LDOpc ) , RegUsed ) . addReg ( SP ) . addImm ( RegisterSavedAreaSizePlusPadding + ObjAlign . value ( ) * Count + NumBytes ) . setMIFlag ( MachineInstr :: FrameSetup ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( STOpc ) ) . addReg ( SP ) . addImm ( ObjAlign . value ( ) * Count + NumBytes ) . addReg ( RegUsed ) . setMIFlag ( MachineInstr :: FrameSetup ) ; Count ++ ; } NumBytes += MFI . getObjectSize ( i ) ; } NumBytes = alignTo ( NumBytes , <NUM_LIT> ) ; NumBytes = ( NumVarArgRegs % <NUM_LIT> == <NUM_LIT> ) ? NumBytes : NumBytes + <NUM_LIT> ; for ( int j = FirstVarArgSavedReg , i = <NUM_LIT> ; j < <NUM_LIT> ; ++ j , ++ i ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addReg ( SP ) . addImm ( NumBytes + <NUM_LIT> * i ) . addReg ( <STR_LIT> + j ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } } } if ( hasFP ( MF ) ) { insertAllocframe ( MBB , InsertPt , NumBytes ) ; if ( AlignStack ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( - int64_t ( MaxAlign . value ( ) ) ) ; } if ( EnableStackOVFSanitizer && ! PrologueStubs ) BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addExternalSymbol ( <STR_LIT> ) ; } else if ( NumBytes > <NUM_LIT>


<s> Align A = std :: max ( MFI . getObjectAlign ( i ) , Align ( <NUM_LIT> ) ) ; MFI . setObjectAlignment ( i , Align ( <NUM_LIT> ) ) ; LFS = alignTo ( LFS + S , A ) ; MFI . mapLocalFrameObject ( i , - static_cast < int64_t > ( LFS ) ) ; DealignSlots . insert ( i ) ; } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI : BB ) { bool KeepOld = true ; ArrayRef < MachineMemOperand * > memops = MI . memoperands ( ) ; SmallVector < MachineMemOperand * , <NUM_LIT> > new_memops ; for ( MachineMemOperand * MMO : memops ) { auto * PV = MMO -> getPseudoValue ( ) ; if ( auto * FS = dyn_cast_or_null < FixedStackPseudoSourceValue > ( PV ) ) { int FI = FS -> getFrameIndex ( ) ; if ( DealignSlots . count


<s> int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , DstR ) . addReg ( TmpR , RegState :: Kill ) ; NewRegs . push_back (


<s> BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , DstR ) . addReg ( TmpR , RegState :: Kill ) ; NewRegs . push_back ( TmpR ) ; B . erase ( It


<s> int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; B . erase ( It ) ; return true


<s> unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; LoadOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . cloneMemRefs (


<s> auto * HRI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . loadRegFromStackSlot ( B , It , TmpR1 , FI , RC , HRI ) ; expandLoadVec ( B , std :: prev ( It ) , MRI , HII , NewRegs ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , DstR ) . addReg ( TmpR1 , RegState :: Kill ) . addReg ( TmpR0 , RegState :: Kill ) ; NewRegs . push_back ( TmpR0


<s> MachineFunction & MF = * B . getParent ( ) ; auto & MFI = MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; B . erase ( It


<s> MachineFunction & MF = * B . getParent ( ) ; auto & MFI = MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment


<s> MachineFunction & MF = * B . getParent ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; LivePhysRegs LPR ( HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < MCPhysReg , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains


<s> bool <ISA_LIT>FrameLowering :: expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; auto * RC = & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister ( RC


<s> bool <ISA_LIT>FrameLowering :: expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; auto * RC = & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister (


<s> for ( RPOTType :: rpo_iterator I = RPOT . begin ( ) , E = RPOT . end ( ) ; I != E ; ++ I ) RPO [ ( * I ) -> getNumber ( ) ] = RPON ++ ; for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber ( ) ] ; for ( auto SI = I . succ_begin ( ) , SE = I . succ_end ( ) ; SI != SE ; ++ SI ) { if ( RPO [ ( * SI ) -> getNumber ( ) ] <= BN ) return ; } } SmallVector < MachineBasicBlock * , <NUM_LIT> > SFBlocks ; BitVector CSR ( <STR_LIT> ) ; for ( const MCPhysReg * P = HRI . getCalleeSavedRegs ( & MF ) ; * P ; ++ P ) for ( MCSubRegIterator S ( * P , & HRI , true ) ; S . isValid ( ) ; ++ S ) CSR [ * S ] = true ; for ( auto & I : MF ) if ( needsStackFrame ( I , CSR , HRI ) ) SFBlocks . push_back ( & I ) ; LLVM_DEBUG ( { dbgs ( ) <<


<s> } MachineInstr * RetI = getReturn ( MBB ) ; unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addDef ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> || COpc

== <STR_LIT> || COpc == <STR_LIT> || COpc == <STR_LIT> ) NeedsDeallocframe = false ;


<s> } DebugLoc dl = MBB . findDebugLoc ( InsertPt ) ; if ( hasFP ( MF ) ) { insertAllocframe ( MBB , InsertPt , NumBytes ) ; if ( AlignStack ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( - int64_t ( MaxAlign ) ) ; } if ( EnableStackOVFSanitizer && ! PrologueStubs ) BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addExternalSymbol ( <STR_LIT> ) ; } else if ( NumBytes > <NUM_LIT> ) { assert ( alignTo ( NumBytes , <NUM_LIT> ) == NumBytes ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm


<s> static inline bool isMinSize ( const MachineFunction & MF ) { return MF . getFunction ( )


<s> return F . optForSize ( ) && ! F . optForMinSize (


<s> bool NeedCFI = MF . getMMI ( ) . hasDebugInfo ( ) || MF . getFunction ( ) . needsUnwindTableEntry ( ) ; if ( ! NeedCFI ) return


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { if ( MF . getFunction ( ) -> hasFnAttribute ( Attribute :: Naked ) ) return false ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) return true ; if ( HasAlloca || HasExtraAlign ) return true ; if ( MFI . getStackSize ( ) > <NUM_LIT> ) { const TargetMachine & TM = MF . getTarget ( ) ; if ( TM . Options . DisableFramePointerElim ( MF ) || ! EliminateFramePointer ) return true ; if ( EnableStackOVFSanitizer ) return true ; } const auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; if ( MFI . hasCalls ( ) || HMFI . hasClobberLR (


<s> } const auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; if ( MFI . hasCalls ( ) || HMFI . hasClobberLR ( ) ) return true ; assert ( MFI . isCalleeSavedInfoValid ( ) && <STR_LIT> ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( useSpillFunction ( MF , CSI ) || useRestoreFunction ( MF , CSI ) ) return true ; return


<s> auto * MMO = MF . getMachineMemOperand ( MachinePointerInfo :: getStack ( MF , <NUM_LIT> ) , MachineMemOperand :: MOStore , <NUM_LIT> , <NUM_LIT> ) ; DebugLoc dl = MBB . findDebugLoc ( InsertPt ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ; unsigned SP = HRI . getStackRegister ( ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP


<s> MachineBasicBlock :: iterator InsertPt = MBB . getFirstTerminator ( ) ; DebugLoc dl = MBB . findDebugLoc ( InsertPt ) ; if ( ! hasFP ( MF ) ) { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; if ( unsigned NumBytes = MFI . getStackSize ( ) ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addImm ( NumBytes ) ; } return ; } MachineInstr * RetI = getReturn ( MBB ) ; unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It


<s> unsigned NumFixed ; int MinOffset = <NUM_LIT> ; const SpillSlot * FixedSlots = getCalleeSavedSpillSlots ( NumFixed ) ; for ( const SpillSlot * S = FixedSlots ; S != FixedSlots + NumFixed ; ++ S ) { if ( ! SRegs [ S -> Reg ] ) continue ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( S -> Reg ) ; int FI = MFI . CreateFixedSpillStackObject ( TRI -> getSpillSize ( * RC ) , S -> Offset ) ; MinOffset = std :: min ( MinOffset , S -> Offset ) ; CSI . push_back ( CalleeSavedInfo ( S -> Reg , FI ) ) ; SRegs [ S -> Reg ] = false ; } for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( R ) ; unsigned Size = TRI -> getSpillSize ( * RC ) ; int Off = MinOffset - Size ; Align Alignment = std :: min ( TRI -> getSpillAlign ( * RC ) , getStackAlign ( ) ) ; Off &= - Alignment . value ( ) ; int FI = MFI . CreateFixedSpillStackObject ( Size , Off ) ; MinOffset = std :: min ( MinOffset , Off ) ; CSI . push_back ( CalleeSavedInfo ( R , FI ) ) ; SRegs [ R ] = false ; } LLVM_DEBUG ( { dbgs ( ) << <STR_LIT> ; for ( const CalleeSavedInfo & I : CSI ) { int FI = I .


<s> MachineBasicBlock :: iterator MI = MBB . getFirstTerminator ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; if ( useRestoreFunction ( MF , CSI ) ) { bool HasTC = hasTailCall ( MBB ) || ! hasReturn ( MBB ) ; unsigned MaxR = getMaxCalleeSavedReg ( CSI , HRI ) ; SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . isPositionIndependent ( ) ; bool LongCalls = HST . useLongCalls ( ) || EnableSaveRestoreLong ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : MBB . findDebugLoc ( MBB . end ( ) ) ; MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned


<s> if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . isEnvironmentMusl ( ) ) return true ; if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) return true ; if ( ! hasFP ( MF ) ) return true ; if ( ! isOptSize ( MF ) && ! isMinSize ( MF ) ) if ( MF . getTarget ( ) . getOptLevel ( ) > CodeGenOpt :: Default ) return true ; BitVector Regs ( <STR_LIT> ) ; for ( const CalleeSavedInfo & I : CSI ) { unsigned R = I . getReg ( ) ; if ( ! <STR_LIT> . contains ( R ) ) return true ; Regs [ R ] = true ; } int F = Regs . find_first ( ) ; if ( F != <STR_LIT> ) return true ; while ( F >= <NUM_LIT>


<s> auto & MFI = MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) ,


<s> unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; LoadOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return true


<s> int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase (


<s> MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> )


<s> LivePhysRegs LPR ( HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < unsigned , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; for ( auto & C : Clobbers ) if ( C . second -> isReg ( ) && C . second -> isDead ( ) ) LPR . removeReg ( C . first ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT>


<s> unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; } if ( LPR . contains ( SrcHi )


<s> } } SmallVector < MachineBasicBlock * , <NUM_LIT> > SFBlocks ; BitVector CSR ( <STR_LIT> ) ; for ( const MCPhysReg * P = HRI . getCalleeSavedRegs ( & MF ) ; * P ; ++ P ) for ( MCSubRegIterator S ( * P , & HRI , true ) ; S . isValid ( ) ; ++ S ) CSR [ * S ] = true ; for ( auto & I : MF ) if ( needsStackFrame ( I , CSR , HRI ) ) SFBlocks . push_back ( & I ) ; DEBUG ( { dbgs ( ) << <STR_LIT> ; for ( auto & B : SFBlocks ) dbgs ( ) << <STR_LIT> << B ->


<s> if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) return true ; if ( HasAlloca || HasExtraAlign ) return true ; if ( MFI . getStackSize ( ) > <NUM_LIT> ) { const TargetMachine & TM = MF . getTarget ( ) ; if ( TM . Options . DisableFramePointerElim ( MF ) || ! EliminateFramePointer ) return true ; if ( EnableStackOVFSanitizer )


<s> if ( MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) return true ; if ( HasAlloca || HasExtraAlign ) return true ; if ( MFI . getStackSize ( ) > <NUM_LIT> ) { const TargetMachine & TM = MF . getTarget ( ) ; if ( TM . Options . DisableFramePointerElim ( MF ) || ! EliminateFramePointer ) return true ; if ( EnableStackOVFSanitizer ) return true ; } const auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; if ( MFI . hasCalls ( ) || HMFI . hasClobberLR ( ) ) return true ; return false


<s> LPR . stepForward ( * R , Clobbers ) ; for ( auto & C : Clobbers ) if ( C . second -> isReg ( ) && C . second -> isDead ( ) ) LPR . removeReg ( C . first ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; const auto & RC = ! Is128B ? <STR_LIT> : <STR_LIT> ; unsigned Size = HRI . getSpillSize ( RC ) ; unsigned NeedAlign = HRI . getSpillAlignment ( RC ) ; unsigned HasAlign = MFI . getObjectAlignment


<s> bool restoreCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , MutableArrayRef < CalleeSavedInfo > CSI , const TargetRegisterInfo * TRI ) const override { return


<s> bool restoreCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , MutableArrayRef < CalleeSavedInfo > CSI ,

const TargetRegisterInfo * TRI ) const override {


<s> bool spillCalleeSavedRegisters ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , ArrayRef < CalleeSavedInfo > CSI , const TargetRegisterInfo * TRI ) const override { return


<s> unsigned maxCallFrameSize = MFI -> getMaxCallFrameSize ( ) ; if ( MFI -> hasVarSizedObjects ( ) ) maxCallFrameSize = RoundUpToAlignment ( maxCallFrameSize , TargetAlign ) ; MFI -> setMaxCallFrameSize ( maxCallFrameSize ) ; FrameSize += maxCallFrameSize ; FrameSize = RoundUpToAlignment ( FrameSize


<s> eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { MachineInstr & MI = * I ; if ( MI . getOpcode ( ) == <STR_LIT> ) { } else if ( MI . getOpcode ( ) == <STR_LIT> ) { }


<s> eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { MachineInstr & MI = * I ; if ( MI . getOpcode ( ) == <STR_LIT> ) { } else if ( MI . getOpcode ( ) == <STR_LIT> ) { } else { llvm_unreachable ( <STR_LIT> ) ; } MBB . erase (


<s> i != e ; ++ i ) { MachineInstr * MI = * i ; assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; MO . setImm ( MFI -> getMaxCallFrameSize ( ) ) ; } if ( hasFP ( MF ) ) { const int ALLOCFRAME_MAX = <NUM_LIT> ; const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , HEXAGON_RESERVED_REG_1 ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , QRI -> getStackRegister ( ) ) . addReg ( QRI -> getStackRegister ( ) ) . addReg ( HEXAGON_RESERVED_REG_1 ) ; } else { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) .


<s> int <ISA_LIT>FrameLowering :: getFrameIndexOffset ( const MachineFunction & MF ,


<s> unsigned RetOpcode = MBBI -> getOpcode ( ) ; return RetOpcode == <STR_LIT> || RetOpcode


<s> bool <ISA_LIT>FrameLowering :: hasTailCall ( MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ; unsigned RetOpcode = MBBI -> getOpcode ( ) ; return RetOpcode == <STR_LIT>


<s> CanUseDblLoad = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . loadRegFromStackSlot ( MBB , MI , Reg , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg ) ; } } return true


<s> const TargetInstrInfo & TII = * MF -> getTarget ( ) . getInstrInfo ( ) ; if ( CSI . empty ( ) ) { return false ; } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblStore = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . storeRegToStackSlot ( MBB , MI , Reg , true , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn (


<s> MachineFunction * MF = MBB . getParent ( ) ; const TargetInstrInfo & TII = * MF -> getTarget ( ) . getInstrInfo ( ) ; if ( CSI . empty ( ) ) { return false ; } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; if ( ContiguousRegs && ( i < CSI . size


<s> MCSuperRegIterator SRI ( Reg , TRI ) ; assert ( SRI . isValid ( ) && <STR_LIT> ) ; unsigned SuperReg = * SRI ; ++ SRI


<s> unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI , true ) ; SR . isValid ( ) ; ++ SR ) SRegs [ * SR ] = false ; } DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( Reserved , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; BitVector TmpSup ( <STR_LIT> ) ; for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI ) ; SR . isValid ( ) ; ++ SR ) TmpSup [ * SR ] = true ; } for ( int x = TmpSup . find_first ( ) ; x >= <NUM_LIT> ; x = TmpSup . find_next ( x ) ) { unsigned R = x ; for ( MCSubRegIterator SR ( R , TRI , true ) ; SR . isValid ( ) ; ++ SR ) { if ( ! Reserved [ * SR ] ) continue ; TmpSup [ R ] = false ; break ; } } DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( TmpSup , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; SRegs |= TmpSup ; DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI ) ; SR . isValid ( ) ; ++ SR ) { if ( ! SRegs [ * SR ] ) continue ; SRegs [ R ] = false ; break ; } } DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; CSI . clear ( ) ; typedef TargetFrameLowering ::


<s> MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size )


<s> bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return true


<s> MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; LivePhysRegs LPR ( & HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < unsigned , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) LPR . stepForward ( * R , Clobbers ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains


<s> unsigned Opc = MI -> getOpcode ( ) ; switch ( Opc ) { case <STR_LIT> : case <STR_LIT> : return true ; default : break ; } for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( MO . isFI ( ) ) return true ; if ( ! MO .


<s> LPR . stepForward ( * R , Clobbers ) ; for ( auto & C : Clobbers ) if ( C . second -> isDead ( ) ) LPR . removeReg ( C . first ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> :


<s> private : typedef std :: vector < CalleeSavedInfo > CSIVect ; void expandAlloca ( MachineInstr * AI , const <ISA_LIT>InstrInfo & TII , unsigned SP , unsigned CF ) const ; void insertPrologueInBlock ( MachineBasicBlock & MBB ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool replacePseudoRegTransferCode ( MachineFunction & MF ) const ; bool replaceVecPredRegPseudoSpillCode ( MachineFunction & MF ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ; bool shouldInlineCSR ( llvm :: MachineFunction & MF , const CSIVect & CSI ) const ; bool useSpillFunction ( MachineFunction & MF , const CSIVect & CSI ) const ; bool useRestoreFunction ( MachineFunction & MF , const CSIVect & CSI )


<s> if ( MF . getTarget ( ) . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : std :: prev ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ; }


<s> CanUseDblLoad = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . loadRegFromStackSlot ( MBB , MI , Reg , CSI [ i ] . getFrameIdx ( ) , RC


<s> unsigned Reg = CSI [ i ] . getReg ( ) ; unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; const TargetRegisterClass * SuperRegClass = nullptr ; bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblLoad = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs =


<s> const TargetRegisterClass * SuperRegClass = nullptr ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblStore = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( Reg ) ; TII . storeRegToStackSlot ( MBB , MI , Reg , true , CSI [ i ] . getFrameIdx ( ) , RC , TRI ) ; MBB . addLiveIn ( Reg


<s> const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; if ( STI . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MBB . erase ( MBBI ) ; BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) . addImm ( NumBytes ) ; } else


<s> static const SpillSlot Offsets [ ] = { { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> } , { <STR_LIT> , - <NUM_LIT> , { <STR_LIT> , - <NUM_LIT> , { <STR_LIT> , - <NUM_LIT> } } ; NumEntries = array_lengthof ( Offsets ) ; return Offsets ; } bool assignCalleeSavedSpillSlots ( MachineFunction & MF , const TargetRegisterInfo * TRI , std :: vector < CalleeSavedInfo > & CSI ) const override ; bool needsAligna ( const MachineFunction & MF ) const ; const MachineInstr * getAlignaInstr ( const MachineFunction & MF ) const ; void insertCFIInstructions ( MachineFunction & MF ) const ; private : typedef std :: vector < CalleeSavedInfo > CSIVect ; void expandAlloca ( MachineInstr * AI , const <ISA_LIT>InstrInfo & TII , unsigned SP , unsigned CF ) const ; void insertPrologueInBlock ( MachineBasicBlock & MBB , bool PrologueStubs ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI , bool & PrologueStubs ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock * RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned


<s>
if
(
!
SRegs
[
S
->
Reg
]
)
continue
;
const
TargetRegisterClass
*
RC
=
TRI
->
getMinimalPhysRegClass
(
S
->
Reg
)
;
int
FI
=
MFI
.
CreateFixedSpillStackObject
(
TRI
->
getSpillSize
(
*
RC
)
,
S
->
Offset
)
;
MinOffset
=
std
::
min
(
MinOffset
,
S
->
Offset
)
;
CSI
.
push_back
(
CalleeSavedInfo
(
S
->
Reg
,
FI
)
)
;
SRegs
[
S
->
Reg
]
=
false
;
}
for
(
int
x
=
SRegs
.
find_first
(
)
;
x
>=
<NUM_LIT>
;
x
=
SRegs
.
find_next
(
x
)
)
{
unsigned
R
=
x
;
const
TargetRegisterClass
*
RC
=
TRI
->
getMinimalPhysRegClass
(
R
)
;
unsigned
Size
=
TRI
->
getSpillSize
(
*
RC
)
;
int
Off
=
MinOffset
Size
;
Align
Alignment
=
std
::
min
(
TRI
->
getSpillAlign
(
*
RC
)
,
getStackAlign
(
)
)
;
Off
&=
Alignment
.
value
(
)
;
int
FI
=
MFI
.
CreateFixedSpillStackObject
(
Size
,
Off
)
;
MinOffset
=
std
::
min
(
MinOffset
,
Off
)
;
CSI
.
push_back
(
CalleeSavedInfo
(
R
,
FI
)
)
;
SRegs
[
R
]
=
false
;
}
LLVM_DEBUG
(
{
dbgs
(
)
<<
<STR_LIT>
;
for
(
const
CalleeSavedInfo
&
I
:
CSI
)
{
int
FI
=
I
.
getFrameIdx
(
)
;
int
Off
=
MFI
.
getObjectOffset
(
FI
)
;
dbgs
(
)
<<
' '
<<
printReg
(
I
.
getReg
(
)
,
TRI
)
<<
<STR_LIT>
<<
FI
<<
<STR_LIT>
;
if
(
Off
>=
<NUM_LIT>
)
dbgs
(
)
<<
'+'
;
dbgs
(
)
<<
Off
;
}
dbgs
(
)


<s> void <ISA_LIT>FrameLowering :: findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const { static unsigned ShrinkCounter = <NUM_LIT> ; if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . isEnvironmentMusl ( ) && MF . getFunction ( ) . isVarArg ( ) ) return ; if ( ShrinkLimit . getPosition ( ) ) { if ( ShrinkCounter >= ShrinkLimit ) return ; ShrinkCounter ++ ; } auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineDominatorTree MDT ; MDT . runOnMachineFunction ( MF ) ; MachinePostDominatorTree MPT ; MPT . runOnMachineFunction ( MF ) ; using UnsignedMap = DenseMap < unsigned , unsigned > ; using RPOTType = ReversePostOrderTraversal < const MachineFunction * > ; UnsignedMap RPO ; RPOTType RPOT ( & MF ) ; unsigned RPON = <NUM_LIT> ; for ( auto & I : RPOT ) RPO [ I -> getNumber ( ) ] = RPON ++ ; for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber ( )


<s> for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber ( ) ] ; for ( MachineBasicBlock * Succ : I . successors ( ) ) if ( RPO [ Succ -> getNumber ( ) ] <= BN ) return ; } SmallVector < MachineBasicBlock * , <NUM_LIT> > SFBlocks ; BitVector CSR ( <STR_LIT> ) ; for ( const MCPhysReg * P = HRI . getCalleeSavedRegs ( & MF ) ; * P ; ++ P ) for ( MCSubRegIterator S ( * P , & HRI , true ) ; S . isValid ( ) ; ++ S ) CSR [ * S ] = true ; for ( auto & I : MF ) if ( needsStackFrame ( I , CSR , HRI ) ) SFBlocks . push_back ( & I ) ; LLVM_DEBUG ( { dbgs ( ) << <STR_LIT> ; for ( auto & B : SFBlocks ) dbgs ( ) << <STR_LIT> << printMBBReference ( * B ) ; dbgs ( ) << <STR_LIT>


<s> if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . isEnvironmentMusl ( ) ) return true ; if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) return true ; if ( ! hasFP ( MF ) ) return true ; if ( ! isOptSize ( MF ) && ! isMinSize ( MF ) ) if ( MF . getTarget ( ) . getOptLevel ( ) > CodeGenOpt :: Default ) return true ; BitVector Regs ( <STR_LIT> ) ; for ( const CalleeSavedInfo & I


<s> BitVector TmpSup ( <STR_LIT> ) ; for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI ) ; SR . isValid ( ) ; ++ SR ) TmpSup [ * SR ] = true ; } for ( int x = TmpSup . find_first ( ) ; x >= <NUM_LIT> ; x = TmpSup . find_next ( x ) ) { unsigned R = x ; for ( MCSubRegIterator SR ( R , TRI , true ) ; SR . isValid ( ) ; ++ SR ) { if ( ! Reserved [ * SR ] ) continue ; TmpSup [ R ] = false ; break ; } } DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( TmpSup , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; SRegs |= TmpSup ; DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; for ( MCSuperRegIterator SR ( R , TRI ) ; SR . isValid ( ) ; ++ SR ) { if ( ! SRegs [ * SR ] ) continue ; SRegs [ R ] = false ; break ; } } DEBUG ( dbgs ( ) << <STR_LIT> ; dump_registers ( SRegs , * TRI ) ; dbgs ( ) << <STR_LIT> ) ; CSI . clear ( ) ; using SpillSlot = TargetFrameLowering :: SpillSlot ; unsigned NumFixed ; int MinOffset = <NUM_LIT> ; const SpillSlot * FixedSlots = getCalleeSavedSpillSlots ( NumFixed ) ; for ( const SpillSlot * S = FixedSlots ; S != FixedSlots + NumFixed ; ++ S ) { if ( ! SRegs [ S -> Reg ] ) continue ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( S -> Reg ) ; int FI = MFI . CreateFixedSpillStackObject ( TRI -> getSpillSize ( * RC ) , S -> Offset ) ; MinOffset = std :: min ( MinOffset , S -> Offset ) ; CSI . push_back ( CalleeSavedInfo ( S -> Reg , FI ) ) ; SRegs [ S -> Reg ] = false ; } for ( int x = SRegs . find_first ( ) ; x >= <NUM_LIT> ; x = SRegs . find_next ( x ) ) { unsigned R = x ; const TargetRegisterClass * RC = TRI -> getMinimalPhysRegClass ( R ) ; unsigned Size = TRI -> getSpillSize ( * RC ) ; int Off = MinOffset - Size ; unsigned Align = std :: min ( TRI -> getSpillAlignment ( * RC ) , getStackAlignment ( ) ) ; assert ( isPowerOf2_32 (


<s> void <ISA_LIT>FrameLowering :: findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const { static unsigned ShrinkCounter = <NUM_LIT> ; if ( ShrinkLimit . getPosition ( ) ) { if ( ShrinkCounter >= ShrinkLimit ) return ; ShrinkCounter ++ ; } auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineDominatorTree MDT ; MDT . runOnMachineFunction ( MF ) ; MachinePostDominatorTree MPT ; MPT . runOnMachineFunction ( MF ) ; using UnsignedMap = DenseMap < unsigned , unsigned > ; using RPOTType = ReversePostOrderTraversal < const MachineFunction * > ; UnsignedMap RPO ; RPOTType RPOT ( & MF ) ; unsigned RPON = <NUM_LIT> ; for ( RPOTType :: rpo_iterator I = RPOT . begin ( ) , E = RPOT . end ( ) ; I != E ; ++ I ) RPO [ ( * I ) -> getNumber ( ) ] = RPON ++ ; for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber


<s> if ( MFI . getStackSize ( ) > <NUM_LIT> ) { const TargetMachine & TM = MF . getTarget ( ) ; if ( TM . Options . DisableFramePointerElim ( MF ) || ! EliminateFramePointer ) return true ; if ( EnableStackOVFSanitizer ) return true ; } const auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo


<s> if ( ! HasAlloca || ! NeedsAlign ) return ; SmallSet < int , <NUM_LIT> > DealignSlots ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; Align A = std :: max ( MFI . getObjectAlign ( i ) , Align ( <NUM_LIT> ) ) ; MFI . setObjectAlignment ( i , Align ( <NUM_LIT> ) ) ; LFS = alignTo ( LFS + S , A ) ; MFI . mapLocalFrameObject ( i , - static_cast < int64_t > ( LFS ) ) ; DealignSlots . insert ( i ) ; } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI


<s> if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) for ( const MCPhysReg * R = HRI . getCalleeSavedRegs ( & MF ) ; * R ; ++ R ) SavedRegs . set ( * R ) ; SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) || mayOverflowFrameOffset ( MF ) ) { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto *


<s> BuildMI ( B , It , DL , HII . get ( TargetOpcode :: COPY ) , TmpR ) . addOperand ( MI -> getOperand ( <NUM_LIT> ) ) ; BuildMI ( B , It , DL , HII . get ( TargetOpcode :: COPY ) , DstR ) . addReg ( TmpR , RegState :: Kill ) ; NewRegs . push_back ( TmpR


<s> DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned Opc = MI -> getOpcode ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> :


<s> int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( TfrOpc ) , DstR ) . addReg ( TmpR , RegState :: Kill ) ; NewRegs . push_back ( TmpR ) ; B . erase


<s> unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It ) ; return true


<s> bool <ISA_LIT>FrameLowering :: expandLoadVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase (


<s> assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister ( RC ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> ) , TmpR0 ) . addImm ( <NUM_LIT> ) ; auto * HRI = B . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . loadRegFromStackSlot ( B , It , TmpR1 , FI , RC , HRI ) ; expandLoadVec ( B , std :: prev ( It ) , MRI , HII , NewRegs ) ; unsigned VandOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( VandOpc ) , DstR ) . addReg ( TmpR1 , RegState :: Kill ) . addReg ( TmpR0 , RegState :: Kill ) ; NewRegs . push_back ( TmpR0 ) ; NewRegs . push_back ( TmpR1 ) ; B . erase


<s> DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TmpR1 = MRI . createVirtualRegister ( RC ) ; BuildMI ( B , It , DL , HII . get ( <STR_LIT> )


<s> Changed |= expandStoreInt ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed |= expandLoadInt ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed |= expandStoreVecPred ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed |= expandLoadVecPred ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed |= expandLoadVec2 ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT> : case <STR_LIT> : Changed |= expandStoreVec2 ( B , I , MRI , HII , NewRegs ) ; break ; case <STR_LIT>


<s> bool <ISA_LIT>FrameLowering :: expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned Opc = MI -> getOpcode ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned TmpR = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned TfrOpc = ( Opc == <STR_LIT> ) ?


<s> unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It


<s> bool <ISA_LIT>FrameLowering :: expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const { MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment (


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment


<s> unsigned VandOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( VandOpc ) , TmpR1 ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . addReg ( TmpR0 , RegState :: Kill ) ; auto * HRI = B . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; HII . storeRegToStackSlot ( B , It , TmpR1 , true , FI , RC , HRI ) ; expandStoreVec ( B , std :: prev ( It ) ,


<s> MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned TmpR0 = MRI . createVirtualRegister ( & <STR_LIT>


<s> void insertPrologueInBlock ( MachineBasicBlock & MBB ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool replacePredRegPseudoSpillCode ( MachineFunction & MF ) const ; bool replaceVecPredRegPseudoSpillCode ( MachineFunction & MF ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ; bool shouldInlineCSR ( llvm :: MachineFunction & , const CSIVect & ) const ; bool useSpillFunction ( MachineFunction & MF , const CSIVect & CSI ) const ; bool useRestoreFunction ( MachineFunction & MF , const CSIVect & CSI


<s> static_assert ( <STR_LIT> > <NUM_LIT> , <STR_LIT> ) ; if ( CSI . empty ( ) ) return <NUM_LIT> ; unsigned Max = getMax32BitSubRegister ( CSI [ <NUM_LIT>


<s> for ( auto & I : MBB ) if ( I . isReturn ( ) ) return & I ; return nullptr


<s> const char * V4SpillFromMemoryFunctions [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const char * V4SpillFromMemoryTailcallFunctions [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const char * * SpillFunc = nullptr ; switch ( SpillType ) { case SK_ToMem : SpillFunc = Stkchk ? V4SpillToMemoryStkchkFunctions : V4SpillToMemoryFunctions ; break ; case SK_FromMem : SpillFunc = V4SpillFromMemoryFunctions ; break ; case SK_FromMemTailcall : SpillFunc = V4SpillFromMemoryTailcallFunctions ; break ; } assert ( SpillFunc && <STR_LIT> ) ; switch ( MaxReg ) { case <STR_LIT> : return SpillFunc [ <NUM_LIT> ] ; case <STR_LIT> : return SpillFunc [ <NUM_LIT> ] ; case <STR_LIT>


<s> MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MachineModuleInfo & MMI = MF . getMMI ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; DebugLoc DL ; const MCInstrDesc & CFID = HII . get ( TargetOpcode :: CFI_INSTRUCTION ) ; MCSymbol * FrameLabel = MMI . getContext ( ) . createTempSymbol ( ) ; bool HasFP = hasFP ( MF ) ; if ( HasFP ) { unsigned DwFPReg = HRI . getDwarfRegNum ( HRI . getFrameRegister ( ) , true ) ; unsigned DwRAReg = HRI . getDwarfRegNum ( HRI . getRARegister ( ) , true ) ; auto DefCfa = MCCFIInstruction :: createDefCfa ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( )


<s> MachineFunction & MF = * MBB . getParent ( ) ; if ( ! hasFP ( MF ) ) return ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; unsigned SP = HRI . getStackRegister ( ) ; MachineInstr * RetI = getReturn ( MBB ) ; unsigned RetOpc = RetI ? RetI -> getOpcode ( ) : <NUM_LIT> ; MachineBasicBlock :: iterator InsertPt = MBB . getFirstTerminator ( ) ; DebugLoc DL ; if ( InsertPt != MBB . end ( ) ) DL = InsertPt -> getDebugLoc ( ) ; else if ( ! MBB . empty ( ) ) DL = std :: prev ( MBB . end ( ) ) -> getDebugLoc ( ) ; if ( RetOpc == <STR_LIT> ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) , SP ) . addReg ( SP ) . addReg ( <STR_LIT> ) ; return ; } if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB .


<s> const Function & F = * MF . getFunction ( ) ; return F . optForSize ( ) && ! F . optForMinSize


<s> for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( MO . isFI ( ) ) return true ; if ( ! MO . isReg ( ) ) continue ; unsigned R = MO . getReg ( ) ; if ( TargetRegisterInfo :: isVirtualRegister ( R ) )


<s> unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; } if ( LPR . contains ( SrcHi


<s> unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned TargetAlign = MF . getSubtarget ( ) . getFrameLowering ( ) -> getStackAlignment ( ) ; unsigned maxCallFrameSize = MFI -> getMaxCallFrameSize


<s> const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; return ; } if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : std :: prev ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ; } else


<s> } if ( MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : std :: prev ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , & * MBBI ) ; MBB . erase ( MBBI ) ; } else { MachineBasicBlock :: iterator Term = MBB . getFirstTerminator ( ) ; MachineBasicBlock :: iterator I = Term == MBB . begin ( ) ? MBB . end ( ) : std :: prev


<s> const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , HEXAGON_RESERVED_REG_1 ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , TII . get ( <STR_LIT> ) , QRI -> getStackRegister ( ) ) . addReg ( QRI -> getStackRegister ( ) ) . addReg ( HEXAGON_RESERVED_REG_1 ) ; } else { BuildMI ( MBB , InsertPt , dl , TII .

get ( <STR_LIT> ) ) . addImm ( NumBytes ) ;


<s> MachineBasicBlock & MBB = MF . front ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; const <ISA_LIT>RegisterInfo * QRI = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; determineFrameLayout ( MF ) ; int NumBytes = ( int ) MFI -> getStackSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const std :: vector < MachineInstr * > & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( std :: vector < MachineInstr * > :: const_iterator i = AdjustRegs . begin ( ) , e = AdjustRegs . end ( ) ; i != e ; ++ i ) { MachineInstr * MI = * i ; assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ; assert ( MO . isImm (


<s> unsigned SuperReg = uniqueSuperReg ( Reg , TRI ) ; const TargetRegisterClass * SuperRegClass = nullptr ; bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblLoad = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblLoad ) { TII . loadRegFromStackSlot ( MBB , MI , SuperReg , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i ; } else


<s> bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = nullptr ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { unsigned SuperRegNext = uniqueSuperReg ( CSI [ i + <NUM_LIT> ] . getReg ( ) , TRI ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg ) ; CanUseDblStore = ( SuperRegNext == SuperReg ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg ) ; ++ i


<s> break ; case <NUM_LIT> : LDOpc = <STR_LIT> ; STOpc = <STR_LIT> ; break ; case <NUM_LIT> : default : LDOpc = <STR_LIT> ; STOpc = <STR_LIT> ; break ; } unsigned RegUsed = LDOpc == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; int LoadStoreCount = ObjSize / OpcodeChecker ; if ( ObjSize % OpcodeChecker ) ++ LoadStoreCount ; if ( NumBytes != <NUM_LIT> ) NumBytes = alignTo ( NumBytes , ObjAlign ) ; int Count = <NUM_LIT> ; while ( Count < LoadStoreCount ) { BuildMI ( MBB , InsertPt , dl , HII . get ( LDOpc ) , RegUsed ) . addReg ( SP ) . addImm ( RegisterSavedAreaSizePlusPadding + ObjAlign * Count + NumBytes ) . setMIFlag ( MachineInstr :: FrameSetup ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( STOpc ) ) . addReg ( SP ) . addImm ( ObjAlign * Count + NumBytes ) . addReg ( RegUsed ) . setMIFlag ( MachineInstr :: FrameSetup ) ; Count ++ ; } NumBytes += MFI . getObjectSize ( i ) ; } NumBytes = alignTo ( NumBytes , <NUM_LIT> ) ; NumBytes = ( NumVarArgRegs % <NUM_LIT> == <NUM_LIT> ) ? NumBytes : NumBytes + <NUM_LIT> ; for ( int j = FirstVarArgSavedReg , i = <NUM_LIT> ; j < <NUM_LIT> ; ++ j , ++ i ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addReg ( SP ) . addImm ( NumBytes + <NUM_LIT> * i ) . addReg ( <STR_LIT> + j ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } } } if ( hasFP ( MF ) ) { insertAllocframe ( MBB , InsertPt , NumBytes ) ; if ( AlignStack