<s> for ( const std :: pair < unsigned , RegisterCell > P : Map ) dbgs ( ) << printReg ( P . first , & ME . TRI ) << <STR_LIT> << P


<s> void BitTracker :: print_cells ( raw_ostream & OS ) const { for ( const std :: pair < unsigned , RegisterCell > P : Map ) dbgs ( ) << printReg ( P .

first , & ME . TRI ) << <STR_LIT> << P . second << <STR_LIT> ;


<s> int BN = B -> getNumber ( ) ; assert ( BN >= <NUM_LIT>


<s> assert ( FlowQ . empty ( ) ) ; using MachineFlowGraphTraits = GraphTraits < const MachineFunction * > ; const MachineBasicBlock * Entry = MachineFlowGraphTraits :: getEntryNode ( & MF ) ; unsigned MaxBN = <NUM_LIT> ; for ( const MachineBasicBlock & B : MF ) { assert ( B . getNumber ( ) >= <NUM_LIT> && <STR_LIT> ) ; unsigned BN = B . getNumber ( ) ; if ( BN > MaxBN ) MaxBN = BN ; } BitVector BlockScanned ( MaxBN + <NUM_LIT> ) ; int EntryN = Entry -> getNumber ( ) ; FlowQ . push ( CFGEdge ( - <NUM_LIT> , EntryN ) ) ; while ( ! FlowQ . empty ( ) || ! UseQ . empty (


<s> FlowQ . pop ( ) ; if ( EdgeExec . count ( Edge ) ) return ; EdgeExec . insert ( Edge ) ; ReachedBB . insert ( Edge . second ) ; const MachineBasicBlock & B = * MF . getBlockNumbered ( Edge . second ) ; MachineBasicBlock :: const_iterator It = B . begin ( ) , End = B . end ( ) ; while ( It != End && It -> isPHI ( ) ) { const MachineInstr & PI = * It ++ ; InstrExec . insert ( & PI ) ; visitPHI (


<s> uint16_t OMB = OM . first ( ) , OME = OM . last ( ) ; uint16_t NMB = NM . first ( ) , NME = NM . last ( ) ; ( void ) NME ; assert ( ( OME - OMB == NME - NMB ) && <STR_LIT> ) ; for ( std :: pair < const unsigned , RegisterCell > & P : Map ) { RegisterCell & RC = P . second ; for ( uint16_t i = <NUM_LIT> , w = RC .


<s> void BT :: visit ( const MachineInstr & MI ) { assert ( ! MI . isBranch ( ) && <STR_LIT> ) ; InstrExec . insert (


<s> } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; if ( B . mayHaveInlineAsmBr ( ) ) DefaultToAll = true ; if ( ! DefaultToAll ) { for ( const MachineBasicBlock * SB : B . successors ( ) ) { if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else { for ( const MachineBasicBlock * SB : B . successors ( ) ) Targets . insert ( SB ) ; } for ( const MachineBasicBlock * TB : Targets ) FlowQ . push ( CFGEdge ( ThisN , TB -> getNumber


<s> BTs . clear ( ) ; const MachineInstr & MI = * It ; if ( Trace ) dbgs ( ) << <STR_LIT> << printMBBReference ( B ) << <STR_LIT> << MI ; assert ( MI . isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( & MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << printMBBReference ( * BTs [ i ] ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) <<


<s> } for ( const MachineOperand & MO : MI . operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! RD . Reg . isVirtual ( ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell


<s> if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! RD . Reg . isVirtual ( ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap ) ; for ( uint16_t i = <NUM_LIT> , w = DefC . width ( ) ; i < w ; ++ i ) { BitValue & V = DefC [ i ] ; if ( V . Type == BitValue :: Ref && V . RefI . Reg == RD


<s> RegisterRef DefRR ( MD ) ; uint16_t DefBW = ME . getRegBitWidth ( DefRR ) ; RegisterCell DefC = ME . getCell ( DefRR , Map ) ; if ( DefC == RegisterCell :: self ( DefRR . Reg , DefBW ) ) return ; bool Changed = false ; for ( unsigned i = <NUM_LIT> , n = PI . getNumOperands ( ) ; i < n ; i += <NUM_LIT> ) { const MachineBasicBlock * PB = PI . getOperand ( i + <NUM_LIT> ) . getMBB ( ) ; int PredN = PB -> getNumber ( ) ; if ( Trace ) dbgs ( ) << <STR_LIT> << printMBBReference ( * PB ) << <STR_LIT> << printMBBReference ( * PI . getParent ( ) ) ; if ( ! EdgeExec . count ( CFGEdge ( PredN , ThisN ) ) ) { if ( Trace ) dbgs ( ) << <STR_LIT> ; continue ; } RegisterRef RU = PI . getOperand ( i ) ; RegisterCell ResC = ME . getCell ( RU , Map ) ; if ( Trace ) dbgs ( ) << <STR_LIT> << printReg ( RU . Reg , & ME . TRI , RU . Sub ) << <STR_LIT> << ResC << <STR_LIT> ; Changed |= DefC . meet ( ResC , DefRR . Reg ) ; } if ( Changed ) { if ( Trace ) dbgs ( ) << <STR_LIT> << printReg ( DefRR . Reg , & ME . TRI , DefRR . Sub ) << <STR_LIT> << DefC << <STR_LIT> ; ME . putCell ( DefRR ,


<s> for ( MachineInstr & UseI : MRI . use_nodbg_instructions ( Reg ) )


<s> void BT :: visitUsesOf ( Register Reg ) { if ( Trace ) dbgs ( ) << <STR_LIT> << printReg ( Reg , & ME . TRI ) << <STR_LIT>


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << printMBBReference ( B ) << <STR_LIT> << MI ; assert ( MI . isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( & MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << printMBBReference ( * BTs [ i ] ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; if ( ! DefaultToAll ) { for ( const MachineBasicBlock * SB : B . successors ( ) ) { if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else


<s> if ( ! MO . isReg ( ) || ! MO . isUse ( ) ) continue ; RegisterRef RU ( MO ) ; dbgs ( ) << <STR_LIT> << printReg ( RU . Reg , & ME . TRI , RU . Sub ) << <STR_LIT> << ME . getCell ( RU , Map ) << <STR_LIT> ; } dbgs ( ) << <STR_LIT> ; for ( const std :: pair < unsigned , RegisterCell > & P : ResMap ) { RegisterRef RD ( P . first ) ; dbgs ( ) << <STR_LIT> << printReg ( P . first , & ME . TRI ) << <STR_LIT> << ME . getCell ( RD , ResMap ) << <STR_LIT> ; } } for ( const MachineOperand & MO : MI . operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! TargetRegisterInfo :: isVirtualRegister (


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << printReg ( Reg , & ME . TRI ) << <STR_LIT> << ME


<s> EdgeExec . insert ( Edge ) ; const MachineBasicBlock & B = * MF . getBlockNumbered ( Edge . second ) ; MachineBasicBlock :: const_iterator It = B . begin ( ) , End = B . end ( ) ; while ( It != End && It -> isPHI ( ) ) { const MachineInstr & PI = * It ++ ; InstrExec . insert ( & PI ) ; visitPHI ( PI ) ; } if ( BlockScanned [ Edge . second ] ) continue ; BlockScanned [ Edge . second ] = true ; while ( It != End && ! It -> isBranch ( ) ) { const MachineInstr & MI = * It ++ ; InstrExec . insert ( & MI ) ; visitNonBranch ( MI ) ; } if ( It == End ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) && B .


<s> } } for ( const MachineOperand & MO : MI . operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! Register :: isVirtualRegister ( RD . Reg ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD


<s> if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap ) ; for ( uint16_t i = <NUM_LIT> , w = DefC . width ( ) ; i < w ; ++ i ) { BitValue & V = DefC [ i ] ; if ( V . Type == BitValue :: Ref && V . RefI . Reg == RD . Reg ) continue ; if ( V == ResC [ i ] ) continue ; V = ResC [ i ] ; Changed = true ; } if ( Changed ) ME . putCell ( RD , DefC


<s> for ( const std :: pair < unsigned , RegisterCell > P : Map ) dbgs ( ) << PrintReg (

P . first , & ME . TRI ) << <STR_LIT> << P . second << <STR_LIT> ;


<s> void BitTracker :: print_cells ( raw_ostream & OS ) const { for ( const std :: pair < unsigned , RegisterCell > P : Map ) dbgs ( ) << PrintReg ( P . first

, & ME . TRI ) << <STR_LIT> << P . second << <STR_LIT> ;


<s> using MachineFlowGraphTraits = GraphTraits < const MachineFunction * > ; const MachineBasicBlock * Entry = MachineFlowGraphTraits :: getEntryNode ( & MF ) ; unsigned MaxBN = <NUM_LIT> ; for ( const MachineBasicBlock & B : MF ) { assert ( B . getNumber ( ) >= <NUM_LIT> && <STR_LIT> ) ; unsigned BN = B . getNumber ( ) ; if ( BN > MaxBN ) MaxBN = BN ; } BitVector BlockScanned ( MaxBN + <NUM_LIT> ) ; int EntryN = Entry -> getNumber ( ) ; FlowQ . push ( CFGEdge ( - <NUM_LIT> , EntryN ) ) ; while ( ! FlowQ . empty ( ) ) { CFGEdge Edge = FlowQ . front ( ) ; FlowQ . pop ( ) ; if ( EdgeExec . count ( Edge ) ) continue ; EdgeExec . insert ( Edge ) ; ReachedBB . insert ( Edge . second ) ; const MachineBasicBlock & B = * MF . getBlockNumbered ( Edge . second ) ; MachineBasicBlock :: const_iterator It = B . begin ( ) , End = B . end ( ) ; while ( It != End && It -> isPHI (


<s> bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << PrintReg ( Reg , & ME . TRI ) << <STR_LIT> ; for ( const MachineInstr & UseI : MRI . use_nodbg_instructions ( Reg ) ) { if ( ! InstrExec . count ( &


<s> for ( const MachineInstr & UseI : MRI . use_nodbg_instructions ( Reg ) ) { if ( ! InstrExec . count ( & UseI ) ) continue ; if ( UseI . isPHI ( ) ) visitPHI ( UseI ) ; else if ( ! UseI . isBranch ( ) ) visitNonBranch ( UseI ) ; else visitBranchesFrom ( UseI


<s> while ( It != End && It -> isPHI ( ) ) { const MachineInstr * PI = & * It ++ ; InstrExec . insert ( PI ) ; visitPHI ( PI ) ; } if ( BlockScanned [ Edge . second ] ) continue ; BlockScanned [ Edge . second ] = true ; while ( It != End && ! It -> isBranch ( ) ) { const MachineInstr * MI = & * It ++ ; InstrExec . insert ( MI ) ; visitNonBranch ( MI ) ; } if ( It == End ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) && B . isSuccessor ( & * Next ) ) { int ThisN = B . getNumber ( ) ; int NextN = Next -> getNumber ( ) ; FlowQ . push ( CFGEdge ( ThisN , NextN ) ) ; } } else { visitBranchesFrom ( It ) ; } } if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( CellMapType :: iterator I = Map . begin ( ) , E = Map . end ( ) ; I != E ; ++ I ) dbgs ( ) << PrintReg ( I ->

first , & ME . TRI ) << <STR_LIT> << I -> second << <STR_LIT> ;


<s> if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; typedef MachineBasicBlock :: const_succ_iterator succ_iterator ; if ( ! DefaultToAll ) { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * SB = * I ; if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) Targets . insert ( * I ) ; } for ( unsigned i = <NUM_LIT> , n = Targets . size ( ) ; i < n ; ++ i ) { int TargetN = Targets [ i ] ->


<s> BTs . clear ( ) ; const MachineInstr * MI = & * It ; if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << * MI ; assert ( MI -> isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; typedef MachineBasicBlock :: const_succ_iterator succ_iterator ; if ( ! DefaultToAll ) { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * SB = * I ; if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) Targets . insert ( * I ) ; } for ( unsigned i = <NUM_LIT> , n = Targets . size ( ) ; i < n


<s> } dbgs ( ) << <STR_LIT> ; for ( CellMapType :: iterator I = ResMap . begin ( ) , E = ResMap . end ( ) ; I != E ; ++ I ) { RegisterRef RD ( I -> first ) ; dbgs ( ) << <STR_LIT> << PrintReg ( I -> first , & ME . TRI ) << <STR_LIT> << ME . getCell ( RD , ResMap ) << <STR_LIT> ; } } for ( unsigned i = <NUM_LIT> , n = MI -> getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( RD . Reg ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap ) ; for ( uint16_t i = <NUM_LIT> , w = DefC . width ( ) ; i < w ; ++


<s> virtual const TargetRegisterClass & composeWithSubRegIndex ( const TargetRegisterClass & RC , unsigned Idx ) const { if ( Idx == <NUM_LIT> ) return RC ; llvm_unreachable ( <STR_LIT>


<s> bool empty ( ) const { return size ( ) ==


<s> unsigned size ( ) const { return Uses . size ( )


<s> dbgs ( ) << <STR_LIT> << printReg ( RU . Reg , & ME . TRI , RU . Sub ) << <STR_LIT> << ME . getCell ( RU , Map ) << <STR_LIT> ; } dbgs ( ) << <STR_LIT> ; for ( const std :: pair < const unsigned , RegisterCell > & P : ResMap ) { RegisterRef RD ( P . first ) ; dbgs ( ) << <STR_LIT> << printReg ( P . first , & ME . TRI ) << <STR_LIT> << ME . getCell ( RD , ResMap ) << <STR_LIT> ; } } for ( const MachineOperand & MO : MI . operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! Register :: isVirtualRegister ( RD . Reg ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap


<s> assert ( Map . count ( OldRR . Reg ) > <NUM_LIT> && <STR_LIT> ) ; BitMask OM = ME . mask ( OldRR . Reg , OldRR . Sub ) ; BitMask NM = ME . mask ( NewRR . Reg , NewRR . Sub ) ; uint16_t OMB = OM . first ( ) , OME = OM . last ( ) ; uint16_t NMB = NM . first ( ) , NME = NM . last ( ) ; ( void ) NME ; assert ( ( OME - OMB == NME - NMB ) && <STR_LIT> ) ; for ( CellMapType :: iterator I = Map . begin ( ) , E = Map . end ( ) ; I != E ; ++ I ) { RegisterCell & RC = I -> second ; for ( uint16_t i = <NUM_LIT> , w = RC . width ( ) ; i < w ; ++ i ) { BitValue & V = RC [ i


<s> InstrExec . insert ( & MI ) ; visitNonBranch ( MI


<s> const MachineInstr & MI = * It ; if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << MI ; assert ( MI . isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( & MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; typedef MachineBasicBlock :: const_succ_iterator succ_iterator ; if ( ! DefaultToAll ) { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * SB = * I ; if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough )


<s> const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isUse ( ) ) continue ; RegisterRef RU ( MO ) ; dbgs ( ) << <STR_LIT> << PrintReg ( RU . Reg , & ME . TRI , RU . Sub ) << <STR_LIT> << ME . getCell ( RU , Map ) << <STR_LIT> ; } dbgs ( ) << <STR_LIT> ; for ( CellMapType :: iterator I = ResMap . begin ( ) , E = ResMap . end ( ) ; I != E ; ++ I ) { RegisterRef RD ( I -> first ) ; dbgs ( ) << <STR_LIT> << PrintReg ( I -> first , & ME . TRI ) << <STR_LIT> << ME . getCell ( RD , ResMap ) << <STR_LIT> ; } } for ( unsigned i = <NUM_LIT> , n = MI . getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI . getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( RD . Reg ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell (


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << PI ; const MachineOperand & MD = PI . getOperand ( <NUM_LIT> ) ; assert ( MD . getSubReg ( ) == <NUM_LIT> && <STR_LIT> ) ; RegisterRef DefRR ( MD ) ; uint16_t DefBW = ME . getRegBitWidth ( DefRR ) ; RegisterCell DefC = ME . getCell ( DefRR , Map ) ; if ( DefC == RegisterCell :: self ( DefRR . Reg , DefBW ) ) return ; bool Changed = false ; for ( unsigned i = <NUM_LIT> , n = PI . getNumOperands ( ) ; i < n ; i += <NUM_LIT> ) { const MachineBasicBlock * PB = PI . getOperand ( i + <NUM_LIT> ) .


<s> assert ( FlowQ . empty ( ) ) ; typedef GraphTraits < const MachineFunction * > MachineFlowGraphTraits ; const MachineBasicBlock * Entry = MachineFlowGraphTraits :: getEntryNode ( & MF ) ; unsigned MaxBN = <NUM_LIT> ; for ( MachineFunction :: const_iterator I = MF . begin ( ) , E = MF . end ( ) ; I != E ; ++ I ) { assert ( I -> getNumber ( ) >= <NUM_LIT> && <STR_LIT> ) ; unsigned BN = I -> getNumber ( ) ; if ( BN > MaxBN ) MaxBN = BN ; } BitVector BlockScanned ( MaxBN + <NUM_LIT> ) ; int EntryN = Entry -> getNumber ( ) ; FlowQ . push ( CFGEdge ( - <NUM_LIT> , EntryN ) ) ; while ( ! FlowQ . empty ( ) ) { CFGEdge Edge = FlowQ . front ( ) ; FlowQ . pop ( ) ; if ( EdgeExec . count ( Edge ) ) continue ; EdgeExec . insert ( Edge ) ; ReachedBB . insert ( Edge . second ) ; const MachineBasicBlock & B = * MF . getBlockNumbered ( Edge . second ) ; MachineBasicBlock :: const_iterator It = B . begin ( ) , End = B . end ( ) ; while ( It != End && It -> isPHI ( ) ) { const MachineInstr & PI = * It ++ ; InstrExec . insert ( & PI ) ; visitPHI ( PI ) ; } if ( BlockScanned [ Edge . second ] ) continue ; BlockScanned [ Edge . second ] = true ; while ( It != End && ! It -> isBranch ( ) ) { const MachineInstr & MI = * It ++ ; InstrExec . insert ( & MI ) ; visitNonBranch ( MI )


<s> if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( const MachineBasicBlock * BT : BTs ) dbgs ( ) << <STR_LIT> << printMBBReference ( * BT ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; if ( B . mayHaveInlineAsmBr ( ) ) DefaultToAll = true ; if ( ! DefaultToAll ) { for ( const MachineBasicBlock * SB : B . successors ( ) ) { if ( SB -> isEHPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = B . getIterator ( ) ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else { for ( const MachineBasicBlock * SB : B . successors ( ) ) Targets . insert


<s> RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! RD . Reg . isVirtual ( ) ) continue ; bool Changed = false ; if ( ! Eval || ResMap . count ( RD . Reg ) == <NUM_LIT> ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap ) ; for ( uint16_t i = <NUM_LIT> , w = DefC . width ( ) ; i < w ; ++ i ) { BitValue & V = DefC [ i ] ; if ( V . Type == BitValue :: Ref && V . RefI .


<s> void BT :: run ( ) { reset ( ) ; assert ( FlowQ . empty ( ) ) ; using MachineFlowGraphTraits = GraphTraits < const MachineFunction * > ; const MachineBasicBlock * Entry = MachineFlowGraphTraits :: getEntryNode ( & MF ) ; unsigned MaxBN = <NUM_LIT> ; for ( const MachineBasicBlock & B


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << MI ; assert ( MI . isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( & MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; using succ_iterator = MachineBasicBlock :: const_succ_iterator ; if ( ! DefaultToAll ) { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * SB = *


<s> if ( ! InstrExec . count ( UseI ) ) continue ; if ( UseI -> isPHI ( ) ) visitPHI ( * UseI ) ; else if ( ! UseI -> isBranch (


<s> RegisterCell getRef ( const RegisterRef & RR , const CellMapType & M


<s> inline bool BitTracker :: has ( unsigned Reg )


<s> inline bool BitTracker :: has ( unsigned Reg ) const { return Map . find ( Reg ) != Map .


<s> bool is ( unsigned T ) const { assert ( T == <NUM_LIT> || T == <NUM_LIT> ) ; return T == <NUM_LIT> ? Type == Zero : ( T ==


<s> inline const BitTracker :: RegisterCell & BitTracker :: lookup (


<s> if ( Type == Ref && RefI == Self ) return false ; if ( V . Type == Top ) return false ; if ( * this == V ) return false ; if ( Type == Top ) { Type = V . Type ; RefI = V . RefI ; return true ; } Type = Ref ; RefI = Self ; return


<s> bool num ( ) const { return Type == Zero || Type


<s> assert ( BN >= <NUM_LIT> ) ; for ( EdgeSetType :: iterator I = EdgeExec . begin ( ) , E = EdgeExec . end ( ) ; I != E ; ++ I ) { if ( I -> second == BN ) return


<s> virtual bool track ( const TargetRegisterClass * RC ) const { return true


<s> if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << * MI ; assert ( MI -> isBranch ( ) && <STR_LIT> ) ; InstrExec . insert ( MI ) ; bool Eval = ME . evaluate ( MI , Map , BTs , FallsThrough ) ; if ( ! Eval ) { DefaultToAll = true ; FallsThrough = true ; if ( Trace ) dbgs ( ) << <STR_LIT> ; } else if ( ! DefaultToAll ) { if ( Trace ) { dbgs ( ) << <STR_LIT> ; for ( unsigned i = <NUM_LIT> , n = BTs . size ( ) ; i < n ; ++ i ) dbgs ( ) << <STR_LIT> << BTs [ i ] -> getNumber ( ) ; if ( FallsThrough ) dbgs ( ) << <STR_LIT> ; else dbgs ( ) << <STR_LIT> ; } Targets . insert ( BTs . begin ( ) , BTs . end ( ) ) ; } ++ It ; } while ( FallsThrough && It != End ) ; typedef MachineBasicBlock :: const_succ_iterator succ_iterator ; if ( ! DefaultToAll ) { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * SB = * I ; if ( SB -> isLandingPad ( ) ) Targets . insert ( SB ) ; } if ( FallsThrough ) { MachineFunction :: const_iterator BIt = & B ; MachineFunction :: const_iterator Next = std :: next ( BIt ) ; if ( Next != MF . end ( ) ) Targets . insert ( & * Next ) ; } } else { for ( succ_iterator I = B . succ_begin ( ) , E = B . succ_end ( ) ; I != E ; ++ I ) Targets . insert ( * I ) ; } for ( unsigned i = <NUM_LIT> , n = Targets . size ( ) ; i < n ; ++ i ) { int TargetN = Targets [ i ] -> getNumber


<s> dbgs ( ) << <STR_LIT> << PrintReg ( I -> first , & ME . TRI ) << <STR_LIT> << ME . getCell ( RD , ResMap ) << <STR_LIT> ; } } for ( unsigned i = <NUM_LIT> , n = MI -> getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; RegisterRef RD ( MO ) ; assert ( RD . Sub == <NUM_LIT> && <STR_LIT> ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( RD . Reg ) ) continue ; bool Changed = false ; if ( ! Eval || ! ResMap . has ( RD . Reg ) ) { uint16_t DefBW = ME . getRegBitWidth ( RD ) ; RegisterCell RefC = RegisterCell :: self ( RD . Reg , DefBW ) ; if ( RefC != ME . getCell ( RD , Map ) ) { ME . putCell ( RD , RefC , Map ) ; Changed = true ; } } else { RegisterCell DefC = ME . getCell ( RD , Map ) ; RegisterCell ResC = ME . getCell ( RD , ResMap ) ; for ( uint16_t i = <NUM_LIT> , w = DefC . width ( ) ; i < w ; ++ i ) { BitValue & V = DefC [ i ] ; if ( V . Type == BitValue :: Ref && V . RefI . Reg == RD . Reg ) continue ; if ( V == ResC [ i ] ) continue ; V = ResC [ i ] ; Changed = true ; } if ( Changed ) ME . putCell ( RD , DefC ,


<s> int ThisN = PI -> getParent ( ) -> getNumber ( ) ; if ( Trace ) dbgs ( ) << <STR_LIT> << ThisN << <STR_LIT> << * PI ; const MachineOperand & MD = PI -> getOperand ( <NUM_LIT> ) ; assert ( MD . getSubReg ( ) == <NUM_LIT> && <STR_LIT> ) ; RegisterRef DefRR ( MD ) ; uint16_t DefBW = ME . getRegBitWidth ( DefRR ) ; RegisterCell DefC = ME . getCell ( DefRR , Map ) ; if ( DefC == RegisterCell :: self ( DefRR . Reg , DefBW ) ) return ; bool Changed = false ; for ( unsigned i = <NUM_LIT> , n = PI -> getNumOperands ( ) ; i < n ; i += <NUM_LIT> ) { const MachineBasicBlock * PB = PI -> getOperand ( i + <NUM_LIT> ) . getMBB ( ) ; int PredN = PB -> getNumber ( ) ; if ( Trace ) dbgs ( ) << <STR_LIT> << PredN << <STR_LIT> << ThisN ; if ( ! EdgeExec . count ( CFGEdge ( PredN , ThisN ) ) ) { if ( Trace ) dbgs ( ) << <STR_LIT> ; continue ; } RegisterRef RU = PI -> getOperand ( i ) ; RegisterCell ResC = ME . getCell ( RU , Map ) ; if ( Trace ) dbgs ( ) << <STR_LIT> << PrintReg ( RU . Reg , & ME . TRI , RU . Sub ) << <STR_LIT> << ResC << <STR_LIT> ; Changed |= DefC . meet ( ResC , DefRR . Reg ) ; } if ( Changed ) { if ( Trace ) dbgs ( ) << <STR_LIT> << PrintReg ( DefRR . Reg , & ME . TRI , DefRR . Sub ) << <STR_LIT> << DefC << <STR_LIT> ; ME . putCell ( DefRR ,


<s> MachineInstr * UseI = I -> getParent ( ) ; if ( ! InstrExec . count ( UseI ) ) continue ; if ( UseI -> isPHI ( ) ) visitPHI ( UseI ) ; else if ( ! UseI -> isBranch ( ) )


<s> typedef MachineRegisterInfo :: use_nodbg_iterator use_iterator ; use_iterator End = MRI . use_nodbg_end ( ) ; for ( use_iterator I = MRI . use_nodbg_begin ( Reg ) ; I != End ; ++ I ) { MachineInstr * UseI = I -> getParent ( ) ; if ( ! InstrExec . count ( UseI ) ) continue ; if ( UseI -> isPHI ( ) ) visitPHI


<s> size_t <ISA_LIT>AbsoluteStub :: alignment ( ) const { return


<s> size_t <ISA_LIT>AbsoluteStub :: alignment (


<s> Stub * <ISA_LIT>AbsoluteStub :: doClone


<s> const uint8_t * <ISA_LIT>AbsoluteStub :: getContent ( )


<s> switch ( pReloc . type ( ) ) { case llvm :: ELF :: R_HEX_B22_PCREL : nbits = <NUM_LIT> ; break ; case llvm :: ELF :: R_HEX_B15_PCREL : nbits = <NUM_LIT> ; break ; case llvm :: ELF :: R_HEX_B7_PCREL : nbits = <NUM_LIT> ; break ; case llvm :: ELF :: R_HEX_B13_PCREL : nbits = <NUM_LIT>


<s> llvm :: Optional < ArchEnum > GetCpu ( ArchCont const & ArchList , Val CPUString ) { llvm :: Optional < ArchEnum > Res ; auto Entry = ArchList . find


<s> if ( Entry != ArchList . end ( ) ) Res = Entry -> second ; return


<s> return std :: any_of ( std :: begin ( ArchList ) , std :: end ( ArchList ) , [

HexArch ] ( Val V ) { return V == HexArch ; } ) ;


<s> Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B9_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B9_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B13_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B13_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT>


<s> uint32_t Offset = Fixup . getOffset ( ) ; unsigned NumBytes = getFixupKindNumBytes ( Kind ) ; assert ( Offset + NumBytes <= Data . size ( ) && <STR_LIT> ) ; char * InstAddr = Data . data ( ) + Offset ; Value = adjustFixupValue ( Kind , FixupValue ) ; if ( ! Value ) return ; int sValue = ( int ) Value ; switch ( ( unsigned ) Kind ) { default : return ; case fixup_<ISA_LIT>_B7_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B7_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B9_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B9_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B13_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B13_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( (


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( Target const & T , MCRegisterInfo const & , const Triple & TT , StringRef CPU , const


<s> auto & RF = cast < MCRelaxableFragment > ( * K ) ; auto & Inst = const_cast < MCInst & > ( RF . getInst ( ) ) ; while ( Size > <NUM_LIT> && <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) < <NUM_LIT> ) { MCInst * Nop = new ( Context ) MCInst ; Nop -> setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createInst ( Nop ) ) ; Size -= <NUM_LIT> ; if ( ! <ISA_LIT>MCChecker ( Context , * MCII , RF . getSubtargetInfo ( ) , Inst , * Context . getRegisterInfo ( ) , false ) . check ( ) ) { Inst . erase ( Inst . end ( ) - <NUM_LIT> ) ; Size = <NUM_LIT> ; } } bool Error = <ISA_LIT>MCShuffle ( Context , true , * MCII , RF .


<s> case FK_Data_4 : case FK_PCRel_4 : case fixup_<ISA_LIT>_32 : case fixup_<ISA_LIT>_B32_PCREL_X : case fixup_<ISA_LIT>_B22_PCREL : case fixup_<ISA_LIT>_B22_PCREL_X : case fixup_<ISA_LIT>_B15_PCREL : case fixup_<ISA_LIT>_B15_PCREL_X : case fixup_<ISA_LIT>_B13_PCREL : case fixup_<ISA_LIT>_B13_PCREL_X


<s> unsigned getNumFixupKinds ( ) const override { return


<s> <ISA_LIT>AsmBackend ( const Target & T , const Triple & TT , uint8_t OSABI , StringRef CPU ) : OSABI ( OSABI ) , CPU ( CPU ) , MCII ( T . createMCInstrInfo ( ) ) , RelaxTarget ( new MCInst * ) ,


<s> OSABI ( OSABI ) , CPU ( CPU ) , MCII ( T . createMCInstrInfo ( )

) , RelaxTarget ( new MCInst * ) , Extender ( nullptr ) {


<s> bool isInstRelaxable ( MCInst const & HMI ) const { const MCInstrDesc & MCID = <ISA_LIT>MCInstrInfo :: getDesc ( * MCII , HMI ) ; bool Relaxable = false ; if ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && MCID . isBranch ( ) ) || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && MCID . isBranch ( ) ) || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && HMI . getOpcode ( ) != <STR_LIT> ) ) if ( <ISA_LIT>MCInstrInfo :: isExtendable ( * MCII , HMI ) ) { Relaxable =


<s> bool mayNeedRelaxation ( MCInst const &


<s> bool mayNeedRelaxation ( MCInst const & Inst ) const override { return


<s> void setExtender ( MCContext & Context ) const { if ( Extender == nullptr ) const_cast < <ISA_LIT>AsmBackend * > ( this ) -> Extender = new ( Context


<s> MCInst * Result = Extender ; const_cast < <ISA_LIT>AsmBackend * > ( this ) -> Extender = nullptr ; return


<s> while ( Count ) { Count -= HEXAGON_INSTR_SIZE ; uint32_t ParseBits = ( Count % ( HEXAGON_PACKET_SIZE * HEXAGON_INSTR_SIZE ) ) ? ParseIn : ParseEnd ; OW -> write32 ( Nopcode | ParseBits


<s> OW -> write8 ( <NUM_LIT> ) ; } while ( Count ) { Count -= HEXAGON_INSTR_SIZE ; uint32_t ParseBits = ( Count % ( HEXAGON_PACKET_SIZE * HEXAGON_INSTR_SIZE )


<s> case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B32_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( Value & <NUM_LIT> ) ; break ; case FK_Data_1 : case FK_Data_2 : case FK_Data_4 : case fixup_<ISA_LIT>_32 : InstMask = <NUM_LIT> ; Reloc = Value ; break ; } LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << getFixupKindInfo ( Kind ) . Name << <STR_LIT> << ( unsigned ) Kind << <STR_LIT> ) ; LLVM_DEBUG ( uint32_t OldData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) OldData |= (

InstAddr [ i ] << ( i * <NUM_LIT> ) ) & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ;


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( Target const & T , const MCSubtargetInfo & STI , MCRegisterInfo const & , const MCTargetOptions & Options ) { const Triple & TT = STI . getTargetTriple ( ) ; uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; StringRef CPUString = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( STI . getCPU


<s> const Triple & TT = STI . getTargetTriple ( ) ; uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; StringRef CPUString = <ISA_LIT>_MC :: select<ISA_LIT>CPU ( STI


<s> * RelaxTarget = & MCI ; setExtender ( Layout . getAssembler ( ) . getContext ( ) ) ; return true ; } else { return false ; } break ; } } } MCFixupKind Kind = Fixup . getKind ( ) ; int64_t sValue = Value ; int64_t maxValue ; switch ( ( unsigned ) Kind ) { case fixup_<ISA_LIT>_B7_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B9_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B15_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B22_PCREL : maxValue = <NUM_LIT>


<s> if ( * RelaxTarget == & CrntHMI ) { Update = true ; assert ( ( <ISA_LIT>MCInstrInfo :: bundleSize ( Res ) < HEXAGON_PACKET_SIZE ) && <STR_LIT> ) ; MCInst * HMIx = takeExtender ( ) ; * HMIx = <ISA_LIT>MCInstrInfo :: deriveExtender ( * MCII , CrntHMI , <ISA_LIT>MCInstrInfo :: getExtendableOperand ( * MCII , CrntHMI ) ) ; Res . addOperand ( MCOperand :: createInst ( HMIx ) ) ; * RelaxTarget = nullptr ; } Res . addOperand ( MCOperand :: createInst ( I . getInst ( ) ) ) ; } ( void ) Update ; assert ( Update && <STR_LIT> )


<s> case fixup_<ISA_LIT>_B7_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B7_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B9_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B9_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B13_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B13_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; LLVM_FALLTHROUGH ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B32_PCREL_X : InstMask = <NUM_LIT>


<s> -- K ; switch ( K -> getKind ( ) ) { default : break ; case MCFragment :: FT_Align : { Size = <NUM_LIT> ; break ; } case MCFragment :: FT_Relaxable : { MCContext & Context = Asm . getContext ( ) ; auto & RF = cast < MCRelaxableFragment > ( * K ) ; auto & Inst = const_cast < MCInst & > ( RF . getInst ( ) ) ; while ( Size > <NUM_LIT> && <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) < <NUM_LIT> ) { MCInst * Nop = new ( Context ) MCInst ; Nop -> setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createInst ( Nop ) ) ; Size -= <NUM_LIT> ; if ( ! <ISA_LIT>MCChecker ( Context , * MCII , * RF . getSubtargetInfo ( ) , Inst , * Context . getRegisterInfo ( ) , false ) . check ( ) ) { Inst . erase ( Inst . end ( ) - <NUM_LIT> ) ; Size = <NUM_LIT> ; } } bool Error = <ISA_LIT>MCShuffle ( Context , true , * MCII , *


<s> bool mayNeedRelaxation ( MCInst const & Inst , const MCSubtargetInfo


<s> SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallString < <NUM_LIT> > Code ; raw_svector_ostream VecOS ( Code ) ; E . encodeInstruction ( HMB , VecOS , Fixups , * RF . getSubtargetInfo ( ) ) ; RF . setInst ( HMB ) ; RF . getContents ( ) = Code ; RF . getFixups (


<s> void ReplaceInstruction ( MCCodeEmitter & E , MCRelaxableFragment & RF , MCInst & HMB ) const { SmallVector < MCFixup , <NUM_LIT> > Fixups ; SmallString < <NUM_LIT> > Code ; raw_svector_ostream VecOS ( Code ) ; E . encodeInstruction ( HMB , VecOS , Fixups ,


<s> MCAsmBackend * create<ISA_LIT>AsmBackend ( Target const & T , MCRegisterInfo const & , StringRef TT ,


<s> uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( Triple ( TT ) . getOS ( ) ) ; return new ELF<ISA_LIT>AsmBackend ( T , OSABI


<s> MCObjectWriter * createObjectWriter ( raw_ostream &


<s> MCObjectWriter * createObjectWriter ( raw_ostream & OS


<s> bool fixupNeedsRelaxation ( MCFixup const & , uint64_t , MCRelaxableFragment const * ,


<s> bool mayNeedRelaxation ( MCInst const & ) const


<s> void relaxInstruction ( MCInst const & , MCInst & ) const override { llvm_unreachable ( <STR_LIT>


<s> bool writeNopData ( uint64_t , MCObjectWriter * ) const override { return true


<s> auto & RF = cast < MCRelaxableFragment > ( * K ) ; auto & Inst = const_cast < MCInst & > ( RF . getInst ( ) ) ; while ( Size > <NUM_LIT> && <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) < MaxPacketSize ) { MCInst * Nop = Context . createMCInst ( ) ; Nop -> setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createInst ( Nop ) ) ; Size -= <NUM_LIT> ; if ( ! <ISA_LIT>MCChecker ( Context , * MCII , * RF . getSubtargetInfo ( ) , Inst , * Context . getRegisterInfo ( ) , false ) . check ( ) ) { Inst . erase ( Inst . end (


<s> int64_t sValue = Value ; int64_t maxValue ; switch ( ( unsigned ) Kind ) { case fixup_<ISA_LIT>_B7_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B9_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B15_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; case fixup_<ISA_LIT>_B22_PCREL : maxValue = <NUM_LIT> << <NUM_LIT> ; break ; default : maxValue = INT64_MAX ; break ; } bool isFarAway = - maxValue > sValue || sValue > maxValue - <NUM_LIT> ; if ( isFarAway ) { if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB )


<s> for ( auto & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( Inst ) ) { MCInst & CrntHMI = const_cast < MCInst & > ( * I . getInst ( ) ) ; if ( * RelaxTarget == & CrntHMI ) { Update = true ; assert ( ( <ISA_LIT>MCInstrInfo :: bundleSize ( Res ) < HEXAGON_PACKET_SIZE ) && <STR_LIT> ) ; MCInst * HMIx =


<s> void setExtender ( MCContext & Context ) const { if ( Extender == nullptr ) const_cast < <ISA_LIT>AsmBackend * > ( this ) -> Extender = Context .


<s> case fixup_<ISA_LIT>_GD_GOT_16 : case fixup_<ISA_LIT>_LD_GOT_LO16 : case fixup_<ISA_LIT>_LD_GOT_HI16 : case fixup_<ISA_LIT>_LD_GOT_32 : case fixup_<ISA_LIT>_LD_GOT_16 : case fixup_<ISA_LIT>_IE_LO16 : case fixup_<ISA_LIT>_IE_HI16 : case fixup_<ISA_LIT>_IE_32 : case fixup_<ISA_LIT>_IE_16 : case fixup_<ISA_LIT>_IE_GOT_LO16 : case fixup_<ISA_LIT>_IE_GOT_HI16 : case fixup_<ISA_LIT>_IE_GOT_32 : case fixup_<ISA_LIT>_IE_GOT_16 : case fixup_<ISA_LIT>_TPREL_LO16 : case fixup_<ISA_LIT>_TPREL_HI16 : case fixup_<ISA_LIT>_TPREL_32 : case fixup_<ISA_LIT>_TPREL_16 : case fixup_<ISA_LIT>_GOTREL_32_6_X : case fixup_<ISA_LIT>_GOTREL_16_X : case fixup_<ISA_LIT>_GOTREL_11_X : case fixup_<ISA_LIT>_GOT_32_6_X : case fixup_<ISA_LIT>_GOT_16_X : case fixup_<ISA_LIT>_GOT_11_X : case fixup_<ISA_LIT>_DTPREL_32_6_X : case fixup_<ISA_LIT>_DTPREL_16_X : case fixup_<ISA_LIT>_DTPREL_11_X : case fixup_<ISA_LIT>_GD_GOT_32_6_X : case fixup_<ISA_LIT>_GD_GOT_16_X : case fixup_<ISA_LIT>_GD_GOT_11_X : case fixup_<ISA_LIT>_LD_GOT_32_6_X : case fixup_<ISA_LIT>_LD_GOT_16_X : case fixup_<ISA_LIT>_LD_GOT_11_X : case fixup_<ISA_LIT>_IE_32_6_X : case fixup_<ISA_LIT>_IE_16_X : case fixup_<ISA_LIT>_IE_GOT_32_6_X : case fixup_<ISA_LIT>_IE_GOT_16_X : case fixup_<ISA_LIT>_IE_GOT_11_X : case fixup_<ISA_LIT>_TPREL_32_6_X : case fixup_<ISA_LIT>_TPREL_16_X : case fixup_<ISA_LIT>_TPREL_11_X : case fixup_<ISA_LIT>_32_PCREL : case fixup_<ISA_LIT>_6_PCREL_X : case fixup_<ISA_LIT>_23_REG : case fixup_<ISA_LIT>_27_REG : case fixup_<ISA_LIT>_GD_PLT_B22_PCREL_X : case fixup_<ISA_LIT>_GD_PLT_B32_PCREL_X : case fixup_<ISA_LIT>_LD_PLT_B22_PCREL_X : case fixup_<ISA_LIT>_LD_PLT_B32_PCREL_X : return true ; case fixup_<ISA_LIT>_B22_PCREL : break ; case fixup_<ISA_LIT>_B13_PCREL : case fixup_<ISA_LIT>_B13_PCREL_X : case fixup_<ISA_LIT>_B32_PCREL_X : case fixup_<ISA_LIT>_B22_PCREL_X : case fixup_<ISA_LIT>_B15_PCREL : case fixup_<ISA_LIT>_B15_PCREL_X : case fixup_<ISA_LIT>_B9_PCREL : case fixup_<ISA_LIT>_B9_PCREL_X : case fixup_<ISA_LIT>_B7_PCREL : case fixup_<ISA_LIT>_B7_PCREL_X : if ( DisableFixup ) return


<s> while ( Count % HEXAGON_INSTR_SIZE ) { LLVM_DEBUG ( dbgs ( ) << <STR_LIT> << Count % HEXAGON_INSTR_SIZE << <STR_LIT> << HEXAGON_INSTR_SIZE << <STR_LIT> ) ; -- Count ; OS << '\0' ; } while ( Count ) { Count -=


<s> Count -= HEXAGON_INSTR_SIZE ; uint32_t ParseBits = ( Count % ( MaxPacketSize * HEXAGON_INSTR_SIZE ) ) ? ParseIn : ParseEnd ; <STR_LIT> :: write < uint32_t > ( OS , Nopcode | ParseBits , Endian ) ; } return true


<s> uint32_t ParseBits = ( Count % ( MaxPacketSize * HEXAGON_INSTR_SIZE ) ) ? ParseIn : ParseEnd ; <STR_LIT> :: write < uint32_t > ( OS , Nopcode | ParseBits , Endian ) ; } return


<s> InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B32_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( Value & <NUM_LIT> ) ; break ; case FK_Data_1 : case FK_Data_2 : case FK_Data_4 : case fixup_<ISA_LIT>_32 : InstMask = <NUM_LIT> ; Reloc = Value ; break ; } DEBUG ( dbgs ( ) << <STR_LIT> << getFixupKindInfo ( Kind ) . Name << <STR_LIT> << ( unsigned ) Kind << <STR_LIT> ) ; DEBUG ( uint32_t OldData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) OldData |= ( InstAddr [ i ] << ( i * <NUM_LIT> ) ) & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ; dbgs ( ) << <STR_LIT> ; dbgs ( ) . write_hex ( Value ) << <STR_LIT> ; dbgs ( ) . write_hex ( FixupValue ) << <STR_LIT> << Offset << <STR_LIT> << DataSize << <STR_LIT> ;

dbgs ( ) . write_hex ( OldData ) << <STR_LIT> ; dbgs ( ) . write_hex ( Reloc ) ; ) ;


<s> uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; return new <ISA_LIT>AsmBackend ( T , OSABI , CPU


<s> default : break ; case MCFragment :: FT_Align : { auto Size = Asm . computeFragmentSize ( Layout , J ) ; for ( auto K = J . getIterator ( ) ; K != Fragments . begin ( ) && Size >= HEXAGON_PACKET_SIZE ; ) { -- K ; switch ( K -> getKind ( ) ) { default : break ; case MCFragment :: FT_Align : { Size = <NUM_LIT> ; break ; } case MCFragment :: FT_Relaxable : { auto & RF = cast < MCRelaxableFragment > ( * K ) ; auto & Inst = const_cast < MCInst & > ( RF . getInst ( ) ) ; while ( Size > <NUM_LIT> && <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) < <NUM_LIT> ) { MCInst * Nop = new ( Asm . getContext ( ) ) MCInst ; Nop -> setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createInst ( Nop ) ) ; Size -=


<s> assert ( <ISA_LIT>MCInstrInfo :: isBundle ( MCB ) ) ; * RelaxTarget = nullptr ; MCInst & MCI = const_cast < MCInst & > ( <ISA_LIT>MCInstrInfo :: instruction ( MCB , Fixup . getOffset ( ) / HEXAGON_INSTR_SIZE ) ) ; bool Relaxable = isInstRelaxable ( MCI ) ; if ( Relaxable == false ) return false ; if ( ! Resolved ) { switch ( ( unsigned ) Fixup . getKind ( ) ) { case fixup_<ISA_LIT>_B22_PCREL : default : return false ; break ; case fixup_<ISA_LIT>_B13_PCREL : case fixup_<ISA_LIT>_B15_PCREL : case fixup_<ISA_LIT>_B9_PCREL : case fixup_<ISA_LIT>_B7_PCREL : { if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) < HEXAGON_PACKET_SIZE ) { ++ relaxedCnt ; * RelaxTarget = &


<s> <ISA_LIT>AsmBackend ( const Target & T , uint8_t OSABI , StringRef CPU ) : OSABI ( OSABI ) , MCII ( T . createMCInstrInfo ( ) ) , RelaxTarget ( new MCInst * ) ,


<s> bool Relaxable = false ; if ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && MCID . isBranch ( ) ) || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && MCID . isBranch ( ) ) || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && HMI . getOpcode ( ) != <STR_LIT> ) ) if ( <ISA_LIT>MCInstrInfo :: isExtendable ( * MCII , HMI ) ) { Relaxable = true ; MCOperand const & Operand = HMI . getOperand ( <ISA_LIT>MCInstrInfo :: getExtendableOp ( * MCII , HMI ) ) ; if ( <ISA_LIT>MCInstrInfo :: mustNotExtend ( * Operand . getExpr ( ) ) ) Relaxable


<s> case fixup_<ISA_LIT>_16_X : case fixup_<ISA_LIT>_12_X : case fixup_<ISA_LIT>_11_X : case fixup_<ISA_LIT>_10_X : case fixup_<ISA_LIT>_9_X : case fixup_<ISA_LIT>_8_X : case fixup_<ISA_LIT>_7_X : case fixup_<ISA_LIT>_6_X : case fixup_<ISA_LIT>_COPY : case fixup_<ISA_LIT>_GLOB_DAT : case fixup_<ISA_LIT>_JMP_SLOT : case fixup_<ISA_LIT>_RELATIVE : case fixup_<ISA_LIT>_PLT_B22_PCREL : case fixup_<ISA_LIT>_GOTREL_LO16 : case fixup_<ISA_LIT>_GOTREL_HI16 : case fixup_<ISA_LIT>_GOTREL_32 : case fixup_<ISA_LIT>_GOT_LO16 : case fixup_<ISA_LIT>_GOT_HI16 : case fixup_<ISA_LIT>_GOT_32 : case fixup_<ISA_LIT>_GOT_16 : case fixup_<ISA_LIT>_DTPMOD_32 : case fixup_<ISA_LIT>_DTPREL_LO16 : case fixup_<ISA_LIT>_DTPREL_HI16 : case fixup_<ISA_LIT>_DTPREL_32 : case fixup_<ISA_LIT>_DTPREL_16 : case fixup_<ISA_LIT>_GD_PLT_B22_PCREL : case fixup_<ISA_LIT>_LD_PLT_B22_PCREL : case fixup_<ISA_LIT>_GD_GOT_LO16 : case fixup_<ISA_LIT>_GD_GOT_HI16 : case fixup_<ISA_LIT>_GD_GOT_32 : case fixup_<ISA_LIT>_GD_GOT_16 : case fixup_<ISA_LIT>_LD_GOT_LO16 : case fixup_<ISA_LIT>_LD_GOT_HI16 : case fixup_<ISA_LIT>_LD_GOT_32 : case fixup_<ISA_LIT>_LD_GOT_16 : case fixup_<ISA_LIT>_IE_LO16 : case fixup_<ISA_LIT>_IE_HI16 : case fixup_<ISA_LIT>_IE_32 : case fixup_<ISA_LIT>_IE_16 : case fixup_<ISA_LIT>_IE_GOT_LO16 : case fixup_<ISA_LIT>_IE_GOT_HI16 : case fixup_<ISA_LIT>_IE_GOT_32 : case fixup_<ISA_LIT>_IE_GOT_16 : case fixup_<ISA_LIT>_TPREL_LO16 : case fixup_<ISA_LIT>_TPREL_HI16 : case fixup_<ISA_LIT>_TPREL_32 : case fixup_<ISA_LIT>_TPREL_16 : case fixup_<ISA_LIT>_GOTREL_32_6_X : case fixup_<ISA_LIT>_GOTREL_16_X : case fixup_<ISA_LIT>_GOTREL_11_X : case fixup_<ISA_LIT>_GOT_32_6_X : case fixup_<ISA_LIT>_GOT_16_X : case fixup_<ISA_LIT>_GOT_11_X : case fixup_<ISA_LIT>_DTPREL_32_6_X : case fixup_<ISA_LIT>_DTPREL_16_X : case fixup_<ISA_LIT>_DTPREL_11_X : case fixup_<ISA_LIT>_GD_GOT_32_6_X : case fixup_<ISA_LIT>_GD_GOT_16_X : case fixup_<ISA_LIT>_GD_GOT_11_X : case fixup_<ISA_LIT>_LD_GOT_32_6_X : case fixup_<ISA_LIT>_LD_GOT_16_X : case fixup_<ISA_LIT>_LD_GOT_11_X : case fixup_<ISA_LIT>_IE_32_6_X : case fixup_<ISA_LIT>_IE_16_X : case fixup_<ISA_LIT>_IE_GOT_32_6_X : case fixup_<ISA_LIT>_IE_GOT_16_X : case fixup_<ISA_LIT>_IE_GOT_11_X : case fixup_<ISA_LIT>_TPREL_32_6_X : case fixup_<ISA_LIT>_TPREL_16_X : case fixup_<ISA_LIT>_TPREL_11_X : case fixup_<ISA_LIT>_32_PCREL : case fixup_<ISA_LIT>_6_PCREL_X : case fixup_<ISA_LIT>_23_REG : IsResolved = false ; return ; case fixup_<ISA_LIT>_B22_PCREL : break ; case fixup_<ISA_LIT>_B13_PCREL : case fixup_<ISA_LIT>_B13_PCREL_X : case fixup_<ISA_LIT>_B32_PCREL_X : case fixup_<ISA_LIT>_B22_PCREL_X : case fixup_<ISA_LIT>_B15_PCREL : case fixup_<ISA_LIT>_B15_PCREL_X : case fixup_<ISA_LIT>_B9_PCREL : case fixup_<ISA_LIT>_B9_PCREL_X : case fixup_<ISA_LIT>_B7_PCREL : case fixup_<ISA_LIT>_B7_PCREL_X : if ( DisableFixup ) IsResolved = false ; break ; case FK_Data_1 : case


<s> uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( Triple ( TT ) . getOS


<s> OSABI ( OSABI ) , MCII ( T . createMCInstrInfo ( ) ) ,


<s> break ; case MCFragment :: FT_Align : { Size = <NUM_LIT> ; break ; } case MCFragment :: FT_Relaxable : { auto & RF = cast < MCRelaxableFragment > ( * K ) ; auto & Inst = const_cast < MCInst & > ( RF . getInst ( ) ) ; while ( Size > <NUM_LIT> && <ISA_LIT>MCInstrInfo :: bundleSize ( Inst ) < <NUM_LIT> ) { MCInst * Nop = new ( Asm . getContext ( ) ) MCInst ; Nop -> setOpcode ( <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createInst ( Nop ) ) ; Size -= <NUM_LIT> ; if ( ! <ISA_LIT>MCChecker ( * MCII , RF . getSubtargetInfo ( ) , Inst , Inst , * Asm . getContext ( ) . getRegisterInfo ( ) ) . check ( ) ) { Inst . erase ( Inst . end ( ) - <NUM_LIT> ) ; Size = <NUM_LIT> ; } } bool Error = <ISA_LIT>MCShuffle ( true , * MCII , RF . getSubtargetInfo ( ) , Inst ) ; ( void


<s> return create<ISA_LIT>ELFObjectWriter ( OS , OSABI , CPU


<s> case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B32_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( Value & <NUM_LIT> ) ; break ; case FK_Data_1 : case FK_Data_2 : case FK_Data_4 : case fixup_<ISA_LIT>_32 : InstMask = <NUM_LIT> ; Reloc = Value ; break ; } DEBUG ( dbgs ( ) << <STR_LIT> << getFixupKindInfo ( Kind ) . Name << <STR_LIT> << ( unsigned ) Kind << <STR_LIT> ) ; DEBUG ( uint32_t OldData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) OldData |= ( InstAddr [ i ] << ( i * <NUM_LIT> ) ) & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ; dbgs ( ) << <STR_LIT> ; dbgs ( ) . write_hex ( Value ) << <STR_LIT> ; dbgs ( ) . write_hex ( FixupValue ) << <STR_LIT> << Offset << <STR_LIT> << Data . size ( ) << <STR_LIT> ; dbgs ( ) . write_hex ( OldData ) << <STR_LIT> ; dbgs ( ) . write_hex ( Reloc ) ; ) ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) { InstAddr [ i ] &= uint8_t ( ~ InstMask >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ; InstAddr [ i ] |= uint8_t ( Reloc >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ; } DEBUG ( uint32_t NewData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) NewData |= ( InstAddr [ i ] << ( i * <NUM_LIT> ) ) & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ; dbgs ( ) << <STR_LIT> ; dbgs ( ) . write_hex


<s> InstMask = <NUM_LIT> ; Reloc = Value ; break ; } DEBUG ( dbgs ( ) << <STR_LIT> << getFixupKindInfo ( Kind ) . Name << <STR_LIT> << ( unsigned ) Kind << <STR_LIT> ) ; DEBUG ( uint32_t OldData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) OldData |= ( InstAddr [ i ] << ( i * <NUM_LIT> ) ) & ( <NUM_LIT> << ( i * <NUM_LIT> ) ) ; dbgs ( ) << <STR_LIT> ; dbgs ( ) . write_hex ( Value ) << <STR_LIT> ; dbgs ( ) . write_hex ( FixupValue ) << <STR_LIT> << Offset << <STR_LIT> << Data . size ( ) << <STR_LIT> ; dbgs ( ) . write_hex ( OldData ) << <STR_LIT> ; dbgs ( ) . write_hex ( Reloc ) ; ) ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) { InstAddr [ i ] &= uint8_t ( ~ InstMask >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ; InstAddr [ i ] |= uint8_t ( Reloc >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ; } DEBUG ( uint32_t NewData = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i < NumBytes ; i ++ ) NewData |= ( InstAddr [ i ] << (


<s> MCFixupKind Kind = Fixup . getKind ( ) ; switch ( ( unsigned ) Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case fixup_<ISA_LIT>_LO16 : case fixup_<ISA_LIT>_HI16 : case fixup_<ISA_LIT>_16 : case fixup_<ISA_LIT>_8 : case fixup_<ISA_LIT>_GPREL16_0 : case fixup_<ISA_LIT>_GPREL16_1 : case fixup_<ISA_LIT>_GPREL16_2 : case fixup_<ISA_LIT>_GPREL16_3 : case fixup_<ISA_LIT>_HL16 : case fixup_<ISA_LIT>_32_6_X : case fixup_<ISA_LIT>_16_X : case fixup_<ISA_LIT>_12_X : case fixup_<ISA_LIT>_11_X : case fixup_<ISA_LIT>_10_X : case fixup_<ISA_LIT>_9_X : case fixup_<ISA_LIT>_8_X : case fixup_<ISA_LIT>_7_X : case fixup_<ISA_LIT>_6_X : case fixup_<ISA_LIT>_COPY : case fixup_<ISA_LIT>_GLOB_DAT : case fixup_<ISA_LIT>_JMP_SLOT : case fixup_<ISA_LIT>_RELATIVE : case fixup_<ISA_LIT>_PLT_B22_PCREL : case fixup_<ISA_LIT>_GOTREL_LO16 : case fixup_<ISA_LIT>_GOTREL_HI16 : case fixup_<ISA_LIT>_GOTREL_32 : case fixup_<ISA_LIT>_GOT_LO16 : case fixup_<ISA_LIT>_GOT_HI16 : case fixup_<ISA_LIT>_GOT_32 : case fixup_<ISA_LIT>_GOT_16 : case fixup_<ISA_LIT>_DTPMOD_32 : case fixup_<ISA_LIT>_DTPREL_LO16 : case fixup_<ISA_LIT>_DTPREL_HI16 : case fixup_<ISA_LIT>_DTPREL_32 : case fixup_<ISA_LIT>_DTPREL_16 : case fixup_<ISA_LIT>_GD_PLT_B22_PCREL : case fixup_<ISA_LIT>_LD_PLT_B22_PCREL : case fixup_<ISA_LIT>_GD_GOT_LO16 : case fixup_<ISA_LIT>_GD_GOT_HI16 : case fixup_<ISA_LIT>_GD_GOT_32 : case fixup_<ISA_LIT>_GD_GOT_16 : case fixup_<ISA_LIT>_LD_GOT_LO16 : case fixup_<ISA_LIT>_LD_GOT_HI16 : case fixup_<ISA_LIT>_LD_GOT_32 : case fixup_<ISA_LIT>_LD_GOT_16 : case fixup_<ISA_LIT>_IE_LO16 : case fixup_<ISA_LIT>_IE_HI16 : case fixup_<ISA_LIT>_IE_32 : case fixup_<ISA_LIT>_IE_16 : case fixup_<ISA_LIT>_IE_GOT_LO16 : case fixup_<ISA_LIT>_IE_GOT_HI16 : case fixup_<ISA_LIT>_IE_GOT_32 : case fixup_<ISA_LIT>_IE_GOT_16 : case fixup_<ISA_LIT>_TPREL_LO16 : case fixup_<ISA_LIT>_TPREL_HI16 : case fixup_<ISA_LIT>_TPREL_32 : case fixup_<ISA_LIT>_TPREL_16 : case fixup_<ISA_LIT>_GOTREL_32_6_X : case fixup_<ISA_LIT>_GOTREL_16_X : case fixup_<ISA_LIT>_GOTREL_11_X : case fixup_<ISA_LIT>_GOT_32_6_X : case fixup_<ISA_LIT>_GOT_16_X : case fixup_<ISA_LIT>_GOT_11_X : case fixup_<ISA_LIT>_DTPREL_32_6_X : case fixup_<ISA_LIT>_DTPREL_16_X : case fixup_<ISA_LIT>_DTPREL_11_X : case fixup_<ISA_LIT>_GD_GOT_32_6_X : case fixup_<ISA_LIT>_GD_GOT_16_X : case fixup_<ISA_LIT>_GD_GOT_11_X : case fixup_<ISA_LIT>_LD_GOT_32_6_X : case fixup_<ISA_LIT>_LD_GOT_16_X : case fixup_<ISA_LIT>_LD_GOT_11_X : case fixup_<ISA_LIT>_IE_32_6_X : case fixup_<ISA_LIT>_IE_16_X : case fixup_<ISA_LIT>_IE_GOT_32_6_X : case fixup_<ISA_LIT>_IE_GOT_16_X : case fixup_<ISA_LIT>_IE_GOT_11_X


<s> case fixup_<ISA_LIT>_7_X : case fixup_<ISA_LIT>_6_X : case fixup_<ISA_LIT>_COPY : case fixup_<ISA_LIT>_GLOB_DAT : case fixup_<ISA_LIT>_JMP_SLOT : case fixup_<ISA_LIT>_RELATIVE : case fixup_<ISA_LIT>_PLT_B22_PCREL : case fixup_<ISA_LIT>_GOTREL_LO16 : case fixup_<ISA_LIT>_GOTREL_HI16 : case fixup_<ISA_LIT>_GOTREL_32 : case fixup_<ISA_LIT>_GOT_LO16 : case fixup_<ISA_LIT>_GOT_HI16 : case fixup_<ISA_LIT>_GOT_32 : case fixup_<ISA_LIT>_GOT_16 : case fixup_<ISA_LIT>_DTPMOD_32 : case fixup_<ISA_LIT>_DTPREL_LO16 : case fixup_<ISA_LIT>_DTPREL_HI16 : case fixup_<ISA_LIT>_DTPREL_32 : case fixup_<ISA_LIT>_DTPREL_16 : case fixup_<ISA_LIT>_GD_PLT_B22_PCREL : case fixup_<ISA_LIT>_LD_PLT_B22_PCREL : case fixup_<ISA_LIT>_GD_GOT_LO16 : case fixup_<ISA_LIT>_GD_GOT_HI16 : case fixup_<ISA_LIT>_GD_GOT_32 : case fixup_<ISA_LIT>_GD_GOT_16 : case fixup_<ISA_LIT>_LD_GOT_LO16 : case fixup_<ISA_LIT>_LD_GOT_HI16 : case fixup_<ISA_LIT>_LD_GOT_32 : case fixup_<ISA_LIT>_LD_GOT_16 : case fixup_<ISA_LIT>_IE_LO16 : case fixup_<ISA_LIT>_IE_HI16 : case fixup_<ISA_LIT>_IE_32 : case fixup_<ISA_LIT>_IE_16 : case fixup_<ISA_LIT>_IE_GOT_LO16 : case fixup_<ISA_LIT>_IE_GOT_HI16 : case fixup_<ISA_LIT>_IE_GOT_32 : case fixup_<ISA_LIT>_IE_GOT_16 : case fixup_<ISA_LIT>_TPREL_LO16 : case fixup_<ISA_LIT>_TPREL_HI16 : case fixup_<ISA_LIT>_TPREL_32 : case fixup_<ISA_LIT>_TPREL_16 : case fixup_<ISA_LIT>_GOTREL_32_6_X : case fixup_<ISA_LIT>_GOTREL_16_X : case fixup_<ISA_LIT>_GOTREL_11_X : case fixup_<ISA_LIT>_GOT_32_6_X : case fixup_<ISA_LIT>_GOT_16_X : case fixup_<ISA_LIT>_GOT_11_X : case fixup_<ISA_LIT>_DTPREL_32_6_X : case fixup_<ISA_LIT>_DTPREL_16_X : case fixup_<ISA_LIT>_DTPREL_11_X : case fixup_<ISA_LIT>_GD_GOT_32_6_X : case fixup_<ISA_LIT>_GD_GOT_16_X : case fixup_<ISA_LIT>_GD_GOT_11_X : case fixup_<ISA_LIT>_LD_GOT_32_6_X : case fixup_<ISA_LIT>_LD_GOT_16_X : case fixup_<ISA_LIT>_LD_GOT_11_X : case fixup_<ISA_LIT>_IE_32_6_X : case fixup_<ISA_LIT>_IE_16_X : case


<s> case fixup_<ISA_LIT>_B13_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B22_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B22_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B32_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( Value & <NUM_LIT> ) ; break ; case FK_Data_1 : case FK_Data_2 : case FK_Data_4 : case fixup_<ISA_LIT>_32 : InstMask = <NUM_LIT> ; Reloc = Value ; break ; } DEBUG ( dbgs ( ) << <STR_LIT> << getFixupKindInfo ( Kind ) . Name << <STR_LIT> << ( unsigned ) Kind << <STR_LIT> ) ; DEBUG ( uint32_t OldData =


<s> switch ( ( unsigned ) Kind ) { default : return ; case fixup_<ISA_LIT>_B7_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B7_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B9_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B9_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B13_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B13_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( Value & <NUM_LIT> ) << <NUM_LIT> ) ; break ; case fixup_<ISA_LIT>_B15_PCREL : if ( ! ( isIntN ( <NUM_LIT> , sValue ) ) ) HandleFixupError ( <NUM_LIT> , <NUM_LIT> , ( int64_t ) FixupValue , <STR_LIT> ) ; case fixup_<ISA_LIT>_B15_PCREL_X : InstMask = <NUM_LIT> ; Reloc = ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> ) | ( ( ( Value >> <NUM_LIT> ) & <NUM_LIT> ) << <NUM_LIT> )


<s> void applyFixup ( MCFixup const & , char * , unsigned


<s> MCAsmBackend * create<ISA_LIT>AsmBackend ( Target const & T , MCRegisterInfo const & , const Triple & TT , StringRef CPU ) { uint8_t OSABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; return new <ISA_LIT>AsmBackend ( T , OSABI ,


<s> <ISA_LIT>AsmBackend ( Target const & T , uint8_t OSABI , StringRef CPU ) : OSABI ( OSABI ) , MCII ( T . createMCInstrInfo ( ) ) , RelaxTarget ( new MCInst *


<s> bool Relaxable = false ; if ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && MCID . isBranch ( ) ) || ( llvm :: <ISA_LIT>MCInstrInfo :: getType ( * MCII , HMI ) == <STR_LIT> && HMI . getOpcode ( ) != <STR_LIT>

) ) if ( <ISA_LIT>MCInstrInfo :: isExtendable ( * MCII , HMI ) ) Relaxable = true ;


<s> bool PreviousIsExtender = false ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( Inst ) ) { auto const & Inst = * I . getInst ( ) ; if ( ! PreviousIsExtender ) { if ( isInstRelaxable ( Inst


<s> assert ( <ISA_LIT>MCInstrInfo :: isBundle ( Inst ) ) ; bool PreviousIsExtender = false ; for ( auto const & I : <ISA_LIT>MCInstrInfo :: bundleInstructions ( Inst ) ) { auto const & Inst = * I . getInst ( ) ; if ( ! PreviousIsExtender ) { if ( isInstRelaxable ( Inst


<s> assert ( ( <ISA_LIT>MCInstrInfo :: bundleSize ( Res ) < HEXAGON_PACKET_SIZE ) && <STR_LIT> ) ; MCInst * HMIx = takeExtender ( ) ; * HMIx = <ISA_LIT>MCInstrInfo :: deriveExtender ( * MCII , CrntHMI , <ISA_LIT>MCInstrInfo :: getExtendableOperand ( * MCII , CrntHMI ) ) ; Res . addOperand ( MCOperand :: createInst ( HMIx ) ) ; * RelaxTarget =


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createExpr


<s> void addm6ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addn8ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addRegOperands ( MCInst & Inst , unsigned N ) const { assert ( N == <NUM_LIT> && <STR_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( getReg


<s> void adds10ExtOperands ( MCInst & Inst , unsigned N )


<s> void adds10ExtOperands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst , N


<s> void adds11_1ExtOperands ( MCInst & Inst , unsigned N )


<s> void adds11_2ExtOperands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst , N


<s> void adds11_3ExtOperands ( MCInst & Inst , unsigned


<s> void adds3ImmOperands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst ,


<s> Inst . addOperand ( MCOperand :: createImm ( CE ->


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( getImm ( ) ) ; Inst . addOperand ( MCOperand :: createImm ( CE -> getValue


<s> void adds4ImmOperands ( MCInst & Inst , unsigned N


<s> void adds4_1ImmOperands ( MCInst & Inst , unsigned


<s> void adds4_2ImmOperands ( MCInst & Inst


<s> void adds4_3ImmOperands ( MCInst & Inst , unsigned N


<s> void adds4_3ImmOperands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst ,


<s> void adds6ImmOperands ( MCInst & Inst , unsigned N


<s> void adds6ImmOperands ( MCInst & Inst


<s> void adds8ExtOperands ( MCInst & Inst , unsigned


<s> void adds8Imm64Operands ( MCInst & Inst , unsigned


<s> void adds8Imm64Operands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst ,


<s> void adds9ExtOperands ( MCInst & Inst , unsigned N ) const { addSignedImmOperands ( Inst , N


<s> if ( ! Expr -> evaluateAsAbsolute ( Value ) ) { Inst . addOperand ( MCOperand :: createExpr ( Expr ) ) ; return ; } int64_t Extended = SignExtend64 (


<s> void addu10ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst


<s> void addu11_3ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu16ImmOperands ( MCInst & Inst , unsigned


<s> void addu16ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu16_0ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu16_0ImmOperands ( MCInst & Inst , unsigned N )


<s> void addu16_1ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu16_1ImmOperands ( MCInst & Inst ,


<s> void addu16_2ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu16_3ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst


<s> void addu1ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu26_6ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu26_6ImmOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu32ImmOperands ( MCInst & Inst


<s> void addu4ImmOperands ( MCInst & Inst , unsigned N )


<s> void addu64ImmOperands ( MCInst & Inst , unsigned


<s> void addu6ImmOperands ( MCInst & Inst , unsigned


<s> void addu6_0ExtOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu6_0ImmOperands ( MCInst & Inst , unsigned N


<s> void addu6_1ExtOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu6_2ExtOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu6_3ExtOperands ( MCInst & Inst , unsigned N )


<s> void addu6_3ImmOperands ( MCInst & Inst , unsigned N


<s> void addu7ExtOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst , N


<s> void addu7ImmOperands ( MCInst & Inst ,


<s> void addu8ExtOperands ( MCInst & Inst , unsigned N ) const { addImmOperands ( Inst ,


<s> void addu8ImmOperands ( MCInst & Inst , unsigned N


<s> if ( Res >= <NUM_LIT> ) return ( ( uint64_t ) Res < ( uint64_t ) ( <NUM_LIT> << bits ) ) ? true : false ; else { const int64_t high_bit_set = <NUM_LIT> << <NUM_LIT> ; const uint64_t mask = ( high_bit_set >> ( <NUM_LIT> - bits ) ) ; return ( ( ( uint64_t ) Res & mask ) == mask ) ? true : false ; } } } else if ( myMCExpr -> getKind ( ) == MCExpr :: SymbolRef && isRelocatable ) return true ; else if ( myMCExpr -> getKind ( ) == MCExpr :: Binary || myMCExpr -> getKind ( ) == MCExpr :: Unary ) return true ; } return


<s> void chksetELFHeaderEFlags ( unsigned flags ) { if ( getAssembler ( ) ) getAssembler ( ) -> setELFHeaderEFlags


<s> Op -> Imm . MustExtend = false ; Op -> StartLoc = S ; Op -> EndLoc = E ; return std :: unique_ptr < <ISA_LIT>Operand >


<s> Op -> StartLoc = S ; Op -> EndLoc = E ; return std :: unique_ptr <


<s> <ISA_LIT>Operand * Op = new <ISA_LIT>Operand ( Token ) ; Op -> Tok . Data = Str . data ( ) ; Op -> Tok . Length = Str . size ( ) ; Op -> StartLoc = S ; Op -> EndLoc


<s> bool equalIsAsmAssignment ( ) override { return false


<s> MCAsmParser & getParser ( ) const { return Parser


<s> return static_cast < <ISA_LIT>TargetStreamer & >


<s> bool <ISA_LIT>AsmParser :: handleNoncontigiousRegister ( bool Contigious , SMLoc & Loc ) { if ( ! Contigious && ErrorNoncontigiousRegister ) { Error ( Loc , <STR_LIT> ) ; return


<s> EndLoc = o . EndLoc ; switch ( Kind ) { case Register : Reg = o . Reg ; break ; case Immediate : Imm = o . Imm ; break ; case Token


<s> if ( previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) ) return true ; if ( previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) ) if ( ! getLexer ( ) .

getTok ( ) . is ( AsmToken :: Colon ) ) return true ;


<s> ( void ) Second ; assert ( Second . is ( AsmToken :: Colon ) ) ; StringRef Raw ( String . data ( ) , Third . getString ( ) . data ( ) - String . data ( ) + Third . getString ( ) . size ( ) ) ; std :: string Collapsed = Raw ; Collapsed . erase ( std :: remove_if ( Collapsed . begin ( ) , Collapsed . end ( ) , isspace ) , Collapsed . end ( ) ) ; StringRef Whole =


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false ,


<s> bool isReg ( ) const { return Kind == Register


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true ,


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true , true ,


<s> bool iss11_1Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true ,


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true , true


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true , false


<s> bool iss3_6Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true ,


<s> bool iss3_6Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> bool iss4_1Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true , false ,


<s> bool iss4_2Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true


<s> bool iss6Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true , true


<s> bool iss7Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true , false , false


<s> bool iss8Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT>


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT>


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> bool iss9Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , true


<s> bool isu10Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , false , true ,


<s> bool isu10Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false ,


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false ,


<s> bool isu16_0Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false ,


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , true


<s> bool isu16_1Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false


<s> bool isu16_2Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> bool isu16_3Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false ,


<s> bool isu1Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false ,


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , true , false


<s> bool isu2Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false , false


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> ,


<s> bool isu6_1Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> bool isu6_2Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false ,


<s> bool isu6_3Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , false , true


<s> return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , false , true , true


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false ,


<s> bool isu6_3Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false , false ,


<s> bool isu8Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> ,


<s> bool isu8Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , false ,


<s> bool isu9Ext ( ) const { return CheckImmRange ( <NUM_LIT> + <NUM_LIT> , <NUM_LIT> , false ,


<s> RegisterMCAsmParser < <ISA_LIT>AsmParser > X ( The<ISA_LIT>Target


<s> MCInst TmpInst ; TmpInst . setOpcode ( opCode ) ; TmpInst . addOperand (


<s> } InBrackets = false ; if ( matchBundleOptions ( ) ) return true ; return finishBundle ( IDLoc , Out ) ; } MCInst * SubInst = new ( getParser ( ) . getContext ( ) ) MCInst ; bool MustExtend = false ; if ( matchOneInstruction ( * SubInst , IDLoc , Operands , ErrorInfo , MatchingInlineAsm , MustExtend ) ) return true ; <ISA_LIT>MCInstrInfo :: extendIfNeeded ( getParser ( ) . getContext ( ) , MCII , MCB , * SubInst , <ISA_LIT>MCInstrInfo

:: isExtended ( MCII , * SubInst ) || MustExtend ) ;


<s> Lexer . Lex ( ) ; StringRef Option = Parser . getTok ( ) . getString ( ) ; if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; else if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) <ISA_LIT>MCInstrInfo :: setOuterLoop


<s> int result = MatchInstructionImpl ( InstOperands , MCI , ErrorInfo , MatchingInlineAsm ) ; if ( result == Match_Success ) { MCI . setLoc ( IDLoc ) ; MustExtend = mustExtend ( InstOperands ) ; canonicalizeImmediates ( MCI ) ; result = processInstruction ( MCI , InstOperands , IDLoc , MustExtend ) ; DEBUG ( dbgs ( ) << <STR_LIT> ) ; DEBUG ( MCI . dump_pretty ( dbgs ( ) ) ) ; DEBUG ( dbgs ( ) << <STR_LIT> ) ; MCI . setLoc


<s> for ( std :: unique_ptr < MCParsedAsmOperand > & i : Operands ) if ( i -> isImm ( ) ) if ( static_cast < <ISA_LIT>Operand * > ( i . get ( ) ) -> Imm . MustExtend ) ++ Count ; assert ( Count < <NUM_LIT>


<s> if ( ( IDVal . lower ( ) == <STR_LIT> ) || ( IDVal . lower ( ) == <STR_LIT> ) ) return ParseDirectiveComm ( true , DirectiveID . getLoc ( ) ) ; if ( ( IDVal . lower ( ) == <STR_LIT> ) || ( IDVal . lower ( ) == <STR_LIT> ) )

return ParseDirectiveComm ( false , DirectiveID . getLoc ( ) ) ;


<s> int64_t ByteAlignment = <NUM_LIT> ; SMLoc ByteAlignmentLoc ; if ( getLexer ( ) . is ( AsmToken :: Comma ) ) { Lex ( ) ; ByteAlignmentLoc = getLexer ( ) . getLoc ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( ByteAlignment ) ) return true ; if ( ! isPowerOf2_64 ( ByteAlignment ) ) return Error ( ByteAlignmentLoc , <STR_LIT> ) ; } int64_t AccessAlignment = <NUM_LIT> ; if ( getLexer ( ) . is ( AsmToken :: Comma ) ) { SMLoc AccessAlignmentLoc ; Lex ( ) ; AccessAlignmentLoc = getLexer ( ) . getLoc ( ) ; if ( getParser ( ) . parseAbsoluteExpression ( AccessAlignment ) ) return true ; if ( ! isPowerOf2_64 ( AccessAlignment ) ) return Error ( AccessAlignmentLoc , <STR_LIT> ) ; } if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) return TokError ( <STR_LIT> ) ; Lex ( ) ; if ( Size < <NUM_LIT> ) return Error ( SizeLoc , <STR_LIT> <STR_LIT> ) ; if ( ByteAlignment < <NUM_LIT> ) return Error ( ByteAlignmentLoc , <STR_LIT> <STR_LIT> ) ; if ( ! Sym -> isUndefined ( ) ) return Error ( Loc , <STR_LIT> ) ; <ISA_LIT>MCELFStreamer & <ISA_LIT>ELFStreamer = static_cast < <ISA_LIT>MCELFStreamer & > ( getStreamer ( ) ) ; if ( IsLocal ) { <ISA_LIT>ELFStreamer . <ISA_LIT>MCEmitLocalCommonSymbol ( Sym , Size , ByteAlignment , AccessAlignment ) ; return false


<s> const MCExpr * Subsection = <NUM_LIT> ; int64_t Res ; assert ( ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) && <STR_LIT> ) ; getParser ( ) . parseExpression ( Subsection ) ; if ( ! Subsection -> evaluateAsAbsolute ( Res ) ) return Error ( L , <STR_LIT> ) ; if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) return TokError ( <STR_LIT> ) ; if ( ( Res < <NUM_LIT> ) && ( Res > - <NUM_LIT> ) ) Subsection = MCConstantExpr :: create ( <NUM_LIT> + Res , this -> getContext ( ) ) ; getStreamer ( ) . SubSection


<s> getStreamer ( ) . EmitIntValue ( IntValue , Size ) ; } else getStreamer ( ) . EmitValue ( Value , Size ) ; if ( getLexer ( ) . is ( AsmToken :: EndOfStatement ) ) break ; if ( getLexer ( ) . isNot ( AsmToken :: Comma ) ) return TokError ( <STR_LIT> ) ; Lex (


<s> SMLoc Loc = Parser . getLexer ( ) . getLoc ( ) ; std :: unique_ptr < <ISA_LIT>Operand > Expr = <ISA_LIT>Operand :: CreateImm ( nullptr , Loc , Loc ) ; MCExpr const * & Val = Expr ->


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , AsmToken ID , OperandVector & Operands ) { getLexer ( ) . UnLex


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , AsmToken ID , OperandVector & Operands ) { getLexer ( ) . UnLex ( ID ) ; return parseInstruction ( Operands


<s> Again = ( Contigious && Type ) || ( Workaround && Type ) ; NeededWorkaround = NeededWorkaround || ( Again && ! ( Contigious && Type ) ) ; } std :: string Collapsed = RawString ; Collapsed . erase ( std :: remove_if ( Collapsed . begin ( ) , Collapsed . end ( ) , isspace ) , Collapsed . end ( ) ) ; StringRef FullString = Collapsed ; std :: pair < StringRef , StringRef > DotSplit = FullString . split ( '.' ) ; unsigned DotReg = MatchRegisterName ( DotSplit . first . lower ( ) ) ; if ( DotReg != <STR_LIT> && RegisterMatchesArch ( DotReg ) ) { if ( DotSplit . second . empty ( ) ) { RegNo = DotReg ; EndLoc = Lexer . getLoc ( ) ; if ( handleNoncontigiousRegister ( ! NeededWorkaround , StartLoc ) ) return true ; return false ; } else { RegNo = DotReg ; size_t First = RawString . find ( '.' ) ; StringRef DotString ( RawString . data ( ) + First , RawString . size ( ) - First ) ; Lexer . UnLex ( AsmToken ( AsmToken :: Identifier , DotString ) ) ; EndLoc = Lexer . getLoc ( ) ; if ( handleNoncontigiousRegister ( ! NeededWorkaround , StartLoc ) ) return true ; return false ; } } std :: pair < StringRef , StringRef > ColonSplit = StringRef ( FullString ) . split ( ':' ) ; unsigned ColonReg = MatchRegisterName ( ColonSplit . first . lower ( ) ) ; if ( ColonReg != <STR_LIT> && RegisterMatchesArch ( DotReg ) ) { Lexer . UnLex ( Lookahead . back ( ) ) ; Lookahead . pop_back ( ) ; Lexer . UnLex ( Lookahead . back ( ) ) ; Lookahead . pop_back ( ) ; RegNo = ColonReg ; EndLoc = Lexer . getLoc ( ) ; if ( handleNoncontigiousRegister ( ! NeededWorkaround , StartLoc ) ) return


<s> if ( ! Operand . isToken ( ) ) return false ; return static_cast < <ISA_LIT>Operand & > ( Operand ) . getToken ( ) . equals_lower


<s> bool previousIsLoop ( OperandVector & Operands , size_t Index ) { return previousEqual ( Operands , Index , <STR_LIT> ) || previousEqual ( Operands , Index , <STR_LIT> ) || previousEqual ( Operands , Index ,

<STR_LIT> ) || previousEqual ( Operands , Index , <STR_LIT> ) || previousEqual ( Operands , Index , <STR_LIT> ) ;


<s> bool <ISA_LIT>AsmParser :: RegisterMatchesArch ( unsigned MatchNum )


<s> bool <ISA_LIT>AsmParser :: RegisterMatchesArch (


<s> } if ( Op -> Kind == <ISA_LIT>Operand :: Token && Kind != InvalidMatchClass ) { StringRef myStringRef = StringRef ( Op -> Tok . Data , Op -> Tok . Length ) ; if ( matchTokenString ( myStringRef . lower ( ) ) == ( MatchClassKind ) Kind ) return Match_Success ; if ( matchTokenString ( myStringRef . upper ( ) ) == ( MatchClassKind ) Kind ) return Match_Success ; } DEBUG ( dbgs ( ) << <STR_LIT> ) ; DEBUG ( Op -> dump ( ) ) ; DEBUG ( dbgs ( ) <<


<s> StringRef String = Token . getString ( ) ; if ( Token . is ( AsmToken :: TokenKind :: LCurly ) || Token . is ( AsmToken :: TokenKind :: RCurly ) ) return false ; if ( String . lower ( ) == <STR_LIT> && Second . is ( AsmToken :: Colon ) && Third . getString ( ) . lower ( ) == <STR_LIT> ) return false ; if ( ! Token . is ( AsmToken :: TokenKind :: Identifier ) ) return true ; if ( ! matchRegister ( String . lower ( ) ) ) return true ; assert ( Second . is (


<s> LLVM_EXTERNAL_VISIBILITY void LLVMInitialize<ISA_LIT>AsmParser ( ) { RegisterMCAsmParser < <ISA_LIT>AsmParser > X (


<s> <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { if ( getSTI ( ) . getFeatureBits ( ) [ <STR_LIT> ] ) <ISA_LIT>MCInstrInfo :: setMemReorderDisabled ( MCB ) ; else return getParser ( ) . Error ( IDLoc , MemNoShuffMsg ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { } else return getParser ( ) . Error ( IDLoc , llvm

:: Twine ( <STR_LIT> ) + Option + <STR_LIT> ) ;


<s> auto IDLoc = Parser . getTok ( ) . getLoc ( ) ; if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { if ( getSTI ( ) . getFeatureBits ( ) [ <STR_LIT> ] ) <ISA_LIT>MCInstrInfo :: setMemReorderDisabled ( MCB ) ; else return getParser ( ) . Error ( IDLoc , MemNoShuffMsg ) ; } else if ( Option . compare_insensitive ( <STR_LIT> ) == <NUM_LIT> ) { } else return getParser ( ) . Error ( IDLoc , llvm :: Twine ( <STR_LIT> ) + Option + <STR_LIT> ) ; Lex (


<s> if ( ! getParser ( ) . parseExpression ( Value ) ) { auto * MCE = cast < MCConstantExpr > ( Value ) ; uint64_t IntValue = MCE -> getValue ( ) ; if ( ! isUIntN ( Size , IntValue ) && ! isIntN ( Size , IntValue ) ) return Error ( ExprLoc , <STR_LIT> ) ; MaxBytesToFill = IntValue ; Lex ( ) ; } else { return Error ( ExprLoc , <STR_LIT> ) ; } } getTargetStreamer ( ) . emitFAlign ( <NUM_LIT> , MaxBytesToFill ) ; Lex (


<s> uint64_t IntValue = MCE -> getValue ( ) ; if ( ! isUIntN ( Size , IntValue ) && ! isIntN ( Size , IntValue ) ) return Error ( ExprLoc , <STR_LIT> ) ; MaxBytesToFill = IntValue ; Lex ( ) ; } else { return Error ( ExprLoc , <STR_LIT>


<s> return tryParseRegister ( RegNo , StartLoc ,


<s> if ( ! Operand . isToken ( ) ) return false ; return static_cast < <ISA_LIT>Operand & > ( Operand ) . getToken ( ) .


<s> MCI . setLoc ( IDLoc ) ; } switch ( result ) { default : break ; case Match_Success : return false ; case Match_MissingFeature : return Error ( IDLoc , <STR_LIT> ) ; case Match_MnemonicFail : return Error ( IDLoc , <STR_LIT> ) ; case Match_InvalidOperand : SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= InstOperands . size ( ) ) return Error ( IDLoc , <STR_LIT> ) ; ErrorLoc = ( static_cast < <ISA_LIT>Operand * > ( InstOperands [ ErrorInfo ] . get ( ) ) ) -> getStartLoc ( ) ; if ( ErrorLoc == SMLoc ( ) ) ErrorLoc = IDLoc ; } return Error ( ErrorLoc , <STR_LIT> ) ; } llvm_unreachable ( <STR_LIT> )


<s> if ( I . isExpr ( ) && cast < <ISA_LIT>MCExpr > ( I . getExpr ( ) ) -> signMismatch ( ) && WarnSignedMismatch ) Warning ( MCI . getLoc ( ) , <STR_LIT> ) ; NewInst . addOperand ( I ) ; } MCI = NewInst


<s> Twine R ( RI -> getName ( Reg ) ) ; uint64_t Err = Check . getError ( ) ; if ( Err != <STR_LIT> ) { if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> ) ; if ( <STR_LIT> & Err || <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> + R + <STR_LIT> <STR_LIT> ) ; if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> + R + <STR_LIT> ) ; if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> + R + <STR_LIT> ) ; if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> <STR_LIT> ) ; if ( <STR_LIT> & Err ) { Twine N ( <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) ? '0' : '1' ) ; return Error ( IDLoc , <STR_LIT> + N + <STR_LIT> + <STR_LIT> + <STR_LIT> + R + <STR_LIT> ) ; } if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> ) ; if ( <STR_LIT> & Err ) return Error ( IDLoc , <STR_LIT> ) ; if ( Err & <STR_LIT> ) { uint64_t Erm = Check . getShuffleError ( ) ; if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_INVALID == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_STORES == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_LOADS == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_BRANCHES == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_NOSLOTS == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_SLOTS == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_ERRATA2 == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else if ( <ISA_LIT>Shuffler :: SHUFFLE_ERROR_STORE_LOAD_CONFLICT == Erm ) return Error ( IDLoc , <STR_LIT> ) ; else return Error ( IDLoc , <STR_LIT> ) ; } } unsigned Warn = Check . getWarning ( ) ; if ( Warn != <STR_LIT> ) { if ( <STR_LIT> & Warn ) Warning ( IDLoc , <STR_LIT> + R + <STR_LIT> <STR_LIT> ) ; else if ( <STR_LIT> & Warn ) Warning ( IDLoc , <STR_LIT> + R + <STR_LIT> <STR_LIT> ) ; } } if ( CheckOk ) { MCB . setLoc ( IDLoc ) ; if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) == <NUM_LIT> ) { assert ( ! <ISA_LIT>MCInstrInfo :: isInnerLoop ( MCB ) ) ; assert ( ! <ISA_LIT>MCInstrInfo :: isOuterLoop ( MCB ) ) ; return false ; } Out . EmitInstruction ( MCB , getSTI ( ) ) ; } else { if ( <ISA_LIT>MCInstrInfo :: bundleSize ( MCB ) > HEXAGON_PACKET_SIZE ) { Error ( IDLoc , <STR_LIT> ) ; return true ; } } return


<s> AsmToken Third = Lexer . peekTok ( ) ; StringRef String = Token . getString ( ) ; if ( Token . is ( AsmToken :: TokenKind :: LCurly ) || Token . is ( AsmToken :: TokenKind :: RCurly ) ) return false ; if ( String . lower ( ) == <STR_LIT> && Second . is ( AsmToken :: Colon ) && Third . getString ( ) . lower ( ) == <STR_LIT> ) return false ; if ( ! Token . is ( AsmToken :: TokenKind :: Identifier ) ) return true ; if ( ! matchRegister ( String . lower ( ) ) ) return true ; ( void ) Second ; assert ( Second . is ( AsmToken ::


<s> bool iss3_7Imm ( ) const { return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true , false


<s> return CheckImmRange ( <NUM_LIT> , <NUM_LIT> , true ,


<s> while ( true ) { if ( ! Parser . getTok ( ) . is ( AsmToken :: Colon ) ) return false ; Lex ( ) ; StringRef Option = Parser . getTok ( ) . getString ( ) ; if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) <ISA_LIT>MCInstrInfo :: setInnerLoop ( MCB ) ; else if ( Option . compare_lower ( <STR_LIT> ) ==

<NUM_LIT> ) <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ;


<s> SmallVector < AsmToken , <NUM_LIT> > Tokens ; MCAsmLexer & Lexer = getLexer ( ) ; bool Done = false ; static char const * Comma = <STR_LIT> ; do { Tokens . emplace_back ( Lexer . getTok ( ) ) ; Lex ( ) ; switch ( Tokens . back ( ) . getKind ( ) ) { case AsmToken :: TokenKind :: Hash : if ( Tokens . size ( ) > <NUM_LIT> ) if ( ( Tokens . end ( ) - <NUM_LIT> ) -> getKind ( ) == AsmToken :: TokenKind :: Plus ) { Tokens . insert ( Tokens . end ( ) - <NUM_LIT> , AsmToken ( AsmToken :: TokenKind :: Comma , Comma ) ) ; Done =


<s> if ( MaybeDotNew . is ( AsmToken :: TokenKind :: Identifier ) && MaybeDotNew . getString ( ) . equals_lower ( <STR_LIT> ) ) splitIdentifier ( Operands ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( RParen , Begin ) ) ; return false ; } if ( previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) && previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) ) { if ( WarnMissingParenthesis ) Warning ( Begin , <STR_LIT> ) ; static char const * LParen = <STR_LIT> ; static char const * RParen = <STR_LIT> ; Operands . insert ( Operands . end ( ) - <NUM_LIT> , <ISA_LIT>Operand :: CreateToken ( LParen , Begin ) ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateReg ( Register , Begin , End ) ) ; const AsmToken & MaybeDotNew = Lexer . getTok ( ) ; if ( MaybeDotNew . is ( AsmToken :: TokenKind :: Identifier ) && MaybeDotNew . getString ( ) . equals_lower ( <STR_LIT> ) ) splitIdentifier ( Operands ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( RParen , Begin ) ) ; return false ; } break ; } Operands . push_back ( <ISA_LIT>Operand :: CreateReg ( Register , Begin ,


<s> if ( ! ErrorMissingParenthesis ) switch ( Register ) { default : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : if ( previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) ) { if ( WarnMissingParenthesis ) Warning ( Begin , <STR_LIT> ) ; static char const * LParen = <STR_LIT> ; static char const * RParen = <STR_LIT> ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( LParen , Begin ) ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateReg ( Register , Begin , End ) ) ; const AsmToken & MaybeDotNew = Lexer . getTok ( ) ; if ( MaybeDotNew . is ( AsmToken :: TokenKind :: Identifier ) && MaybeDotNew . getString ( ) . equals_lower ( <STR_LIT> ) ) splitIdentifier ( Operands ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( RParen , Begin ) ) ; return false ; } if ( previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) && previousEqual ( Operands , <NUM_LIT> , <STR_LIT> ) ) { if ( WarnMissingParenthesis ) Warning ( Begin , <STR_LIT> ) ; static char const * LParen = <STR_LIT> ; static char const * RParen = <STR_LIT> ; Operands . insert ( Operands . end ( ) - <NUM_LIT> , <ISA_LIT>Operand :: CreateToken ( LParen , Begin ) ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateReg ( Register , Begin , End ) ) ; const AsmToken & MaybeDotNew = Lexer . getTok ( ) ; if ( MaybeDotNew . is ( AsmToken :: TokenKind :: Identifier ) && MaybeDotNew . getString ( ) . equals_lower ( <STR_LIT> ) ) splitIdentifier ( Operands ) ; Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( RParen , Begin )


<s> bool Again = Lexer . is ( AsmToken :: Identifier ) ; bool NeededWorkaround = false ; while ( Again ) { AsmToken const & Token = Lexer . getTok ( ) ; RawString = StringRef ( RawString . data ( ) , Token . getString ( ) . data ( ) - RawString . data ( ) + Token . getString ( ) . size ( ) ) ; Lookahead . push_back ( Token ) ; Lexer . Lex ( ) ; bool Contigious = Lexer . getTok ( ) . getString ( ) . data ( ) == Lookahead . back ( ) . getString ( ) . data ( ) + Lookahead . back ( ) . getString ( ) . size ( ) ; bool Type = Lexer . is ( AsmToken :: Identifier ) || Lexer . is ( AsmToken :: Dot ) || Lexer . is ( AsmToken :: Integer ) || Lexer . is ( AsmToken :: Real ) || Lexer . is ( AsmToken :: Colon ) ; bool Workaround = Lexer . is ( AsmToken :: Colon ) || Lookahead . back ( ) . is ( AsmToken :: Colon ) ; Again = ( Contigious && Type ) || ( Workaround && Type ) ; NeededWorkaround = NeededWorkaround || ( Again && ! ( Contigious && Type ) ) ; } std :: string Collapsed = RawString ; Collapsed . erase ( llvm :: remove_if ( Collapsed , isspace ) , Collapsed . end ( ) ) ; StringRef FullString = Collapsed ; std :: pair < StringRef , StringRef > DotSplit = FullString . split ( '.' ) ; unsigned DotReg = matchRegister ( DotSplit . first . lower ( ) ) ; if ( DotReg != <STR_LIT> && RegisterMatchesArch ( DotReg ) ) { if ( DotSplit . second . empty ( ) ) { RegNo = DotReg ; EndLoc = Lexer . getLoc ( ) ; if ( handleNoncontigiousRegister ( ! NeededWorkaround , StartLoc ) ) return true ; return


<s> bool <ISA_LIT>AsmParser :: splitIdentifier ( OperandVector & Operands ) { AsmToken const & Token = getParser ( ) . getTok ( ) ; StringRef String = Token . getString ( ) ; SMLoc Loc = Token . getLoc ( ) ; Lex ( ) ; do { std :: pair < StringRef , StringRef > HeadTail = String . split ( '.' ) ; if ( ! HeadTail . first . empty ( ) ) Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( HeadTail . first , Loc ) ) ; if ( ! HeadTail . second . empty ( ) ) Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( String . substr ( HeadTail . first . size ( ) , <NUM_LIT> ) , Loc ) ) ; String = HeadTail .


<s> if ( ! HeadTail . second . empty ( ) ) Operands . push_back ( <ISA_LIT>Operand :: CreateToken ( String . substr ( HeadTail . first . size ( ) , <NUM_LIT> ) , Loc ) ) ; String = HeadTail . second ; } while ( ! String . empty ( ) ) ; return false


<s> unsigned <ISA_LIT>AsmParser :: validateTargetOperandClass ( MCParsedAsmOperand & AsmOp , unsigned Kind ) { <ISA_LIT>Operand * Op = static_cast < <ISA_LIT>Operand * > ( & AsmOp ) ; switch ( Kind ) { case MCK_0 : { int64_t Value ; return Op -> isImm ( ) && Op -> Imm . Val -> evaluateAsAbsolute ( Value ) && Value == <NUM_LIT> ? Match_Success : Match_InvalidOperand ; } case MCK_1


<s> } else if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) { <ISA_LIT>MCInstrInfo :: setOuterLoop ( MCB ) ; } else if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) { if ( getSTI ( ) . getFeatureBits ( ) [ <STR_LIT> ] ) <ISA_LIT>MCInstrInfo :: setMemReorderDisabled ( MCB ) ; else return getParser ( ) . Error ( IDLoc , MemNoShuffMsg ) ; } else if ( Option . compare_lower ( <STR_LIT> ) == <NUM_LIT> ) { } else return getParser ( ) . Error ( IDLoc , llvm :: Twine ( <STR_LIT> ) + Option + <STR_LIT> ) ; Lex ( )