<s> void <ISA_LIT>FrameLowering :: processFunctionBeforeFrameFinalized ( MachineFunction & MF , RegScavenger * RS ) const { MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool NeedsAlign = ( MFI . getMaxAlign ( ) > getStackAlign ( ) ) ; if ( ! HasAlloca || ! NeedsAlign ) return ; SmallSet < int , <NUM_LIT> > DealignSlots ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; unsigned A = std :: max ( MFI . getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI . setObjectAlignment ( i , <NUM_LIT> ) ; LFS = alignTo ( LFS + S , A ) ; MFI . mapLocalFrameObject ( i , - static_cast < int64_t > ( LFS ) ) ; DealignSlots . insert ( i ) ; } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; if ( ! DealignSlots . empty ( ) ) { for ( MachineBasicBlock & BB : MF ) { for ( MachineInstr & MI : BB ) { bool KeepOld = true ; ArrayRef < MachineMemOperand * > memops = MI . memoperands ( ) ; SmallVector < MachineMemOperand * , <NUM_LIT> > new_memops ; for ( MachineMemOperand * MMO : memops ) { auto * PV = MMO -> getPseudoValue ( ) ; if ( auto * FS = dyn_cast_or_null < FixedStackPseudoSourceValue > ( PV ) ) { int FI = FS -> getFrameIndex ( ) ; if ( DealignSlots . count ( FI ) ) { unsigned A = MFI . getObjectAlignment ( FI ) ; auto * NewMMO = MF . getMachineMemOperand ( MMO -> getPointerInfo ( ) , MMO -> getFlags ( ) , MMO -> getSize ( ) , A , MMO -> getAAInfo ( ) , MMO -> getRanges ( ) , MMO -> getSyncScopeID ( ) , MMO -> getOrdering ( ) , MMO -> getFailureOrdering ( ) ) ; new_memops . push_back ( NewMMO ) ; KeepOld = false ; continue ; } } new_memops . push_back ( MMO ) ; } if ( ! KeepOld ) MI . setMemRefs ( MF , new_memops ) ; } } } unsigned AP =


<s> Register DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> )


<s> unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . cloneMemRefs ( * MI ) ; B . erase ( It ) ; return


<s> if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; Register DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; Register DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; Register DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment


<s> Register SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; B . erase


<s> bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcR , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; B . erase (


<s> if ( ! HasAlloca || ! NeedsAlign ) return ; unsigned LFS = MFI . getLocalFrameSize ( ) ; for ( int i = <NUM_LIT> , e = MFI . getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI . isSpillSlotObjectIndex ( i ) || MFI . isDeadObjectIndex ( i ) ) continue ; unsigned S = MFI . getObjectSize ( i ) ; unsigned A = std :: max ( MFI . getObjectAlignment ( i ) , <NUM_LIT> ) ; MFI . setObjectAlignment ( i , <NUM_LIT> ) ; LFS = alignTo ( LFS + S , A


<s> if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ; int RealOffset = Offset ; if ( ! UseFP && ! UseAP ) RealOffset = FrameSize + Offset ; return StackOffset :: getFixed ( RealOffset


<s> bool <ISA_LIT>FrameLowering :: hasTailCall ( MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI =


<s> MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ; unsigned RetOpcode = MBBI -> getOpcode ( ) ; return RetOpcode == <STR_LIT> || RetOpcode


<s> void <ISA_LIT>FrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; SavedRegs . resize ( HRI . getNumRegs ( ) ) ; if ( MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) -> hasEHReturn ( ) ) for ( const MCPhysReg * R = HRI . getCalleeSavedRegs ( & MF ) ; * R ; ++ R ) SavedRegs . set ( * R ) ; SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) ) { MachineFrameInfo & MFI = * MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto * RC : SpillRCs ) { if ( ! needToReserveScavengingSpillSlots ( MF , HRI ,


<s> SmallVector < unsigned , <NUM_LIT> > NewRegs ; expandSpillMacros ( MF , NewRegs ) ; if ( OptimizeSpillSlots && ! isOptNone ( MF ) ) optimizeSpillSlots ( MF , NewRegs ) ; if ( ! NewRegs . empty ( ) ) { MachineFrameInfo & MFI = * MF . getFrameInfo ( ) ; MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; SetVector < const TargetRegisterClass * > SpillRCs ; SpillRCs . insert ( & <STR_LIT> ) ; for ( unsigned VR : NewRegs ) SpillRCs . insert ( MRI . getRegClass ( VR ) ) ; for ( auto * RC : SpillRCs ) { if ( ! needToReserveScavengingSpillSlots ( MF , HRI , RC ) ) continue ; unsigned Num = RC == & <STR_LIT> ? NumberScavengerSlots : <NUM_LIT> ; unsigned S = RC -> getSize ( ) , A = RC -> getAlignment ( ) ; for ( unsigned i = <NUM_LIT> ; i <


<s> unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment


<s> assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstR ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase ( It


<s> MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned LoadOpc ; if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ?


<s> else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin


<s> auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = * MF . getFrameInfo ( ) ; MachineInstr * MI = & * It ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc


<s> unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( NeedAlign <= HasAlign ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) StoreOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else StoreOpc = ! Is128B


<s> MDT . runOnMachineFunction ( MF ) ; MachinePostDominatorTree MPT ; MPT . runOnMachineFunction ( MF ) ; typedef DenseMap < unsigned , unsigned > UnsignedMap ; UnsignedMap RPO ; typedef ReversePostOrderTraversal < const MachineFunction * > RPOTType ; RPOTType RPOT ( & MF ) ; unsigned RPON = <NUM_LIT> ; for ( RPOTType :: rpo_iterator I = RPOT . begin ( ) , E = RPOT . end ( ) ; I != E ; ++ I ) RPO [ ( * I ) -> getNumber ( ) ] = RPON ++ ; for ( auto & I : MF ) { unsigned BN = RPO [ I . getNumber ( ) ] ; for ( auto SI = I . succ_begin ( ) , SE = I . succ_end ( ) ; SI != SE ;


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; int Offset = MFI . getObjectOffset ( FI ) ; bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; unsigned SP = HRI . getStackRegister ( ) , FP = HRI . getFrameRegister ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AP = HMFI . getStackAlignBasePhysReg ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ; int RealOffset =


<s> auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned AP = HMFI . getStackAlignBasePhysReg ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; bool UseFP = false , UseAP = false ; if ( NoOpt && ! HasExtraAlign ) UseFP = true ; if ( MFI . isFixedObjectIndex ( FI ) || MFI . isObjectPreAllocated ( FI ) ) { UseFP |= ( HasAlloca || HasExtraAlign ) ; } else { if ( HasAlloca ) { if ( HasExtraAlign ) UseAP = true ; else UseFP = true ; } } bool HasFP = hasFP ( MF ) ; assert ( ( HasFP || ! UseFP ) && <STR_LIT> ) ; if ( Offset > <NUM_LIT> && ! HasFP ) Offset -= <NUM_LIT> ; if ( UseFP ) FrameReg = FP ; else if ( UseAP ) FrameReg = AP ; else FrameReg = SP ; int RealOffset


<s> static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( ) , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex


<s> BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = std :: find_if ( CSI . begin ( ) , CSI . end ( ) , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffReg ) ) ; } else { unsigned HiReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned LoReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned HiDwarfReg = HRI . getDwarfRegNum ( HiReg , true ) ; unsigned LoDwarfReg = HRI . getDwarfRegNum ( LoReg , true ) ; auto OffHi = MCCFIInstruction :: createOffset ( FrameLabel , HiDwarfReg , Offset + <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffHi ) ) ; auto OffLo = MCCFIInstruction :: createOffset ( FrameLabel ,


<s> SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . getRelocationModel ( ) == Reloc :: PIC_ ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : MBB . getLastNonDebugInstr ( ) -> getDebugLoc ( ) ; MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = IsPIC ? <STR_LIT> : <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF ,


<s> if ( RetOpc == <STR_LIT> || RetOpc == <STR_LIT> ) { MachineBasicBlock :: iterator It = RetI ; ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> || COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ; NewI -> copyImplicitOps ( MF , * RetI ) ; MBB . erase (


<s> auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & HII = * HST . getInstrInfo ( ) ; auto & HRI = * HST . getRegisterInfo ( ) ; DebugLoc dl ; unsigned MaxAlign = std :: max ( MFI -> getMaxAlignment ( ) , getStackAlignment ( ) ) ; unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned MaxCFA = alignTo ( MFI -> getMaxCallFrameSize ( ) , MaxAlign ) ; MFI -> setMaxCallFrameSize ( MaxCFA ) ; FrameSize = MaxCFA + alignTo ( FrameSize , MaxAlign ) ; MFI -> setStackSize ( FrameSize ) ; bool AlignStack = ( MaxAlign > getStackAlignment ( ) ) ; unsigned NumBytes = MFI -> getStackSize ( ) ; unsigned SP = HRI . getStackRegister ( ) ; unsigned MaxCF = MFI -> getMaxCallFrameSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; auto * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; auto & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( auto MI : AdjustRegs ) { assert ( ( MI -> getOpcode ( ) == <STR_LIT> ) && <STR_LIT> ) ; expandAlloca ( MI , HII , SP , MaxCF ) ; MI -> eraseFromParent ( ) ; } if ( ! hasFP (


<s> static bool findAvailableReg ( int FI , MachineBasicBlock :: iterator It , MachineBasicBlock :: iterator End , unsigned * AvailReg , unsigned * NumUses , const TargetRegisterInfo * TRI , RegScavenger * Scavenger ) { assert ( Scavenger -> getCurrentPosition ( ) == It && <STR_LIT> ) ; BitVector Avail ( Scavenger -> getRegsAvailable ( & <STR_LIT> ) ) ; if ( Avail . none ( ) ) return false ; BitVector AvailByLastLoad ( Avail . size ( ) ) ; while ( ++ It != End ) { MachineInstr * MI = It ; if ( MI -> isDebugValue ( ) ) continue ; int Reg = Avail . find_first ( ) ; while ( Reg != - <NUM_LIT> ) { if ( MI -> modifiesRegister ( Reg , TRI ) ) Avail [ Reg ] = false ; else assert ( ! MI -> readsRegister ( Reg , TRI ) && <STR_LIT> ) ; Reg = Avail . find_next ( Reg ) ; } int Opc = MI -> getOpcode ( ) ; if ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) == FI ) break ; if ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) && MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) == FI && ! MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ) { AvailByLastLoad = Avail ; ++ ( * NumUses ) ; } if ( AvailByLastLoad . none ( ) && Avail . none ( ) ) break ; } if ( AvailByLastLoad . none ( ) ) return false ; * AvailReg = ( unsigned ) AvailByLastLoad . find_first ( ) ; return


<s> expandAlloca ( MI , HII , SP , MaxCF ) ; MI -> eraseFromParent ( ) ; } if ( ! hasFP ( MF ) ) return ; const unsigned int ALLOCFRAME_MAX = <NUM_LIT> ; MachineMemOperand * MMO = MF . getMachineMemOperand ( MachinePointerInfo ( ) , MachineMemOperand :: MOStore , <NUM_LIT> , <NUM_LIT> ) ; if ( NumBytes >= ALLOCFRAME_MAX ) { BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ) . addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ; unsigned CallerSavedReg = HRI . getFirstCallerSavedNonParamReg ( ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) , CallerSavedReg ) . addImm ( NumBytes ) ; BuildMI ( MBB , InsertPt , dl , HII . get ( <STR_LIT> ) ,

SP ) . addReg ( SP ) . addReg ( CallerSavedReg ) ;


<s> bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandSpillMacros ( MachineFunction & MF , SmallVectorImpl < unsigned > & NewRegs ) const ; unsigned findPhysReg ( MachineFunction & MF , <ISA_LIT>BlockRanges :: IndexRange & FIR , <ISA_LIT>BlockRanges :: InstrIndexMap & IndexMap , <ISA_LIT>BlockRanges :: RegToRangeMap & DeadMap , const TargetRegisterClass * RC ) const ; void optimizeSpillSlots ( MachineFunction & MF , SmallVectorImpl < unsigned > & VRegs ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB ,


<s> } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; } if ( LPR . contains ( SrcHi ) ) { StoreOpc = NeedAlign <= MinAlign ( HasAlign , Size )


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { auto & HST = static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ; auto & HRI = * HST . getRegisterInfo ( ) ; assert ( & MF . front ( ) == & MBB && <STR_LIT> ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI ) ; insertPrologueInBlock ( * PrologB ) ; if ( EpilogB ) { insertCSRRestoresInBlock ( * EpilogB , CSI , HRI ) ; insertEpilogueInBlock ( *


<s> const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; MachineBasicBlock * PrologB = & MF . front ( ) , * EpilogB = nullptr ; if ( EnableShrinkWrapping ) findShrunkPrologEpilog ( MF , PrologB , EpilogB ) ; insertCSRSpillsInBlock ( * PrologB , CSI , HRI ) ; insertPrologueInBlock ( * PrologB ) ; if ( EpilogB ) { insertCSRRestoresInBlock ( * EpilogB ,


<s> AttributeSet AF = MF . getFunction ( ) -> getAttributes


<s> inline static bool isMinSize ( const MachineFunction & MF ) { AttributeSet AF = MF . getFunction (


<s> bool IsCurrentRegUsed = false ; for ( MCRegAliasIterator AI ( FreeReg , & HRI , false ) ; AI . isValid ( ) ; ++ AI ) if ( MRI . isPhysRegUsed ( * AI ) ) { IsCurrentRegUsed =


<s> MCPhysReg FreeReg = * CallerSavedRegs ; if ( MRI . isPhysRegUsed ( FreeReg ) ) continue ; bool IsCurrentRegUsed = false ; for ( MCRegAliasIterator AI ( FreeReg , & HRI , false ) ; AI . isValid ( ) ; ++ AI ) if ( MRI . isPhysRegUsed ( * AI ) ) { IsCurrentRegUsed = true ; break ; } if ( IsCurrentRegUsed ) continue ; return false ; } return true


<s> bool <ISA_LIT>FrameLowering :: hasTailCall ( MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = MBB . getLastNonDebugInstr ( ) ; unsigned RetOpcode = MBBI -> getOpcode (


<s> MachineFunction & MF = * B . getParent ( ) ; auto & HST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; auto & MFI = MF . getFrameInfo ( ) ; auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned DstR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned DstHi = HRI . getSubReg ( DstR , <STR_LIT> ) ; unsigned DstLo = HRI . getSubReg ( DstR , <STR_LIT> ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; bool Is128B = HST . useHVXDblOps ( ) ; auto * RC = ! Is128B ? & <STR_LIT> : & <STR_LIT> ; unsigned Size = RC -> getSize ( ) ; unsigned NeedAlign = RC -> getAlignment ( ) ; unsigned HasAlign = MFI . getObjectAlignment


<s> if ( NeedAlign <= HasAlign ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstLo ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; if ( NeedAlign <= MinAlign ( HasAlign , Size ) ) LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; else LoadOpc = ! Is128B ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( LoadOpc ) , DstHi ) . addFrameIndex ( FI ) . addImm ( Size ) . setMemRefs ( MI -> memoperands_begin ( ) , MI -> memoperands_end ( ) ) ; B . erase


<s> bool hasTailCall ( const MachineBasicBlock & MBB ) { MachineBasicBlock :: const_iterator I = MBB . getLastNonDebugInstr ( ) ; unsigned RetOpc = I -> getOpcode (


<s> <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = find_if ( CSI , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { unsigned FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT> || Reg > <STR_LIT> ) { unsigned DwarfReg = HRI . getDwarfRegNum ( Reg , true ) ; auto OffReg = MCCFIInstruction :: createOffset ( FrameLabel , DwarfReg , Offset ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffReg ) ) ; } else { unsigned HiReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned LoReg = HRI . getSubReg ( Reg , <STR_LIT> ) ; unsigned HiDwarfReg = HRI . getDwarfRegNum ( HiReg , true ) ; unsigned LoDwarfReg = HRI . getDwarfRegNum ( LoReg , true ) ; auto OffHi = MCCFIInstruction :: createOffset ( FrameLabel , HiDwarfReg , Offset + <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MMI . addFrameInst ( OffHi ) ) ; auto OffLo = MCCFIInstruction :: createOffset ( FrameLabel , LoDwarfReg


<s> unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize ( <STR_LIT> ) ; unsigned NeedAlign = HRI . getSpillAlignment ( <STR_LIT> ) ; unsigned HasAlign = MFI . getObjectAlignment ( FI ) ; unsigned StoreOpc ; if ( LPR . contains ( SrcLo ) ) { StoreOpc = NeedAlign <= HasAlign ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addReg ( SrcLo , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; } if ( LPR . contains ( SrcHi ) ) { StoreOpc = NeedAlign <= MinAlign ( HasAlign , Size ) ? <STR_LIT> : <STR_LIT> ; BuildMI ( B , It , DL , HII . get ( StoreOpc ) ) . addFrameIndex ( FI ) . addImm ( Size ) . addReg ( SrcHi , getKillRegState ( IsKill ) ) . cloneMemRefs ( * MI ) ; } B . erase (


<s> auto & HRI = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getRegisterInfo ( ) ; MachineInstr * MI = & * It ; if ( ! MI -> getOperand ( <NUM_LIT> ) . isFI ( ) ) return false ; LivePhysRegs LPR ( HRI ) ; LPR . addLiveIns ( B ) ; SmallVector < std :: pair < unsigned , const MachineOperand * > , <NUM_LIT> > Clobbers ; for ( auto R = B . begin ( ) ; R != It ; ++ R ) { Clobbers . clear ( ) ; LPR . stepForward ( * R , Clobbers ) ; } DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned SrcR = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned SrcLo = HRI . getSubReg ( SrcR , <STR_LIT> ) ; unsigned SrcHi = HRI . getSubReg ( SrcR , <STR_LIT> ) ; bool IsKill = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; int FI = MI -> getOperand ( <NUM_LIT> ) . getIndex ( ) ; unsigned Size = HRI . getSpillSize


<s> DebugLoc dl = MBBI -> getDebugLoc ( ) ; if ( hasFP ( MF ) || MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) { MachineBasicBlock :: iterator MBBI = prior ( MBB . end ( ) ) ; MachineBasicBlock :: iterator MBBI_end = MBB . end ( ) ; const TargetInstrInfo & TII = * MF . getTarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; return ; } if ( STI . hasV4TOps ( ) && MBBI -> getOpcode ( ) == <STR_LIT> && ! DisableDeallocRet ) { MachineBasicBlock :: iterator BeforeJMPR = MBB . begin ( ) == MBBI ? MBBI : prior ( MBBI ) ; if ( BeforeJMPR != MBBI && BeforeJMPR -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( MBBI ) ; return ; } MachineInstrBuilder MIB = BuildMI ( MBB , MBBI_end , dl , TII . get ( <STR_LIT> ) ) ; MIB -> copyImplicitOps ( * MBB . getParent ( ) , &


<s> unsigned FrameSize = MFI -> getStackSize ( ) ; unsigned TargetAlign = MF . getTarget ( ) . getSubtargetImpl ( ) -> getFrameLowering ( ) -> getStackAlignment ( ) ; unsigned maxCallFrameSize = MFI -> getMaxCallFrameSize ( ) ; if ( MFI -> hasVarSizedObjects ( ) ) maxCallFrameSize = RoundUpToAlignment ( maxCallFrameSize , TargetAlign ) ; MFI -> setMaxCallFrameSize ( maxCallFrameSize


<s> DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; determineFrameLayout ( MF ) ; int NumBytes = ( int ) MFI -> getStackSize ( ) ; MachineBasicBlock :: iterator InsertPt = MBB . begin ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const std :: vector < MachineInstr * > & AdjustRegs = FuncInfo -> getAllocaAdjustInsts ( ) ; for ( std :: vector < MachineInstr * > :: const_iterator i = AdjustRegs . begin ( ) , e = AdjustRegs . end ( ) ; i != e ; ++ i ) { MachineInstr * MI = * i ; assert ( ( MI -> getOpcode ( ) == <STR_LIT> )


<s> bool HasAlloca = MFI . hasVarSizedObjects ( ) ; bool HasExtraAlign = HRI . needsStackRealignment ( MF ) ; bool NoOpt = MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned FrameSize = MFI . getStackSize ( ) ; Register SP = HRI . getStackRegister ( ) ; Register FP = HRI . getFrameRegister ( ) ; Register AP = HMFI . getStackAlignBasePhysReg ( ) ; if ( AP == <NUM_LIT> ) AP = FP ; bool UseFP = false , UseAP


<s> auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const CalleeSavedInfo & C ) -> bool { return C . getReg ( ) == Reg ; } ; auto F = find_if ( CSI , IfR ) ; if ( F == CSI . end ( ) ) continue ; int64_t Offset ; if ( HasFP ) { Offset = MFI . getObjectOffset ( F -> getFrameIdx ( ) ) ; } else { Register FrameReg ; Offset = getFrameIndexReference ( MF , F -> getFrameIdx ( ) , FrameReg ) ; } Offset -= <NUM_LIT> ; if ( Reg < <STR_LIT>


<s> } MFI . setLocalFrameSize ( LFS ) ; Align A = MFI . getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT> && <STR_LIT> ) ; if ( A == <NUM_LIT> ) MFI . setLocalFrameMaxAlign ( llvm :: Align ( <NUM_LIT> ) ) ; MFI . setUseLocalStackAllocationBlock ( true ) ; unsigned AP = <NUM_LIT> ; if ( const MachineInstr * AI = getAlignaInstr ( MF ) ) AP = AI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; auto & HMFI = * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; HMFI . setStackAlignBasePhysReg ( AP )


<s> if ( CSI . empty ( ) ) return false ; MachineBasicBlock :: iterator MI = MBB . getFirstTerminator ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; auto & HII = * MF . getSubtarget < <ISA_LIT>Subtarget > ( ) . getInstrInfo ( ) ; if ( useRestoreFunction ( MF , CSI ) ) { bool HasTC = hasTailCall ( MBB ) || ! hasReturn ( MBB ) ; unsigned MaxR = getMaxCalleeSavedReg ( CSI , HRI ) ; SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; auto & HTM = static_cast < const <ISA_LIT>TargetMachine & > ( MF . getTarget ( ) ) ; bool IsPIC = HTM . isPositionIndependent (


<s> else SpillOpc = IsPIC ? <STR_LIT> : <STR_LIT> ; MachineInstr * SaveRegsCall = BuildMI ( MBB , MI , DL , HII . get ( SpillOpc ) ) . addExternalSymbol ( SpillFun ) ; addCalleeSaveRegistersAsImpOperand ( SaveRegsCall , CSI , false , true ) ; for ( unsigned I = <NUM_LIT> ; I < CSI . size ( ) ; ++ I ) MBB . addLiveIn ( CSI [ I ] . getReg ( ) ) ; return true ; } for ( unsigned i = <NUM_LIT> , n = CSI . size ( ) ; i < n ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; bool IsKill = ! HRI . isEHReturnCalleeSaveReg ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; HII . storeRegToStackSlot ( MBB , MI , Reg , IsKill


<s> MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , HII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , * It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , MaxR , true ) ; return true


<s> ++ It ; while ( It != MBB . end ( ) ) { if ( ! It -> isLabel ( ) ) It = MBB . erase ( It ) ; else ++ It ; } return ; } bool NeedsDeallocframe = true ; if ( ! MBB . empty ( ) && InsertPt != MBB . begin ( ) ) { MachineBasicBlock :: iterator PrevIt = std :: prev ( InsertPt ) ; unsigned COpc = PrevIt -> getOpcode ( ) ; if ( COpc == <STR_LIT> ) NeedsDeallocframe = false ; } if ( ! NeedsDeallocframe ) return ; if ( RetOpc != <STR_LIT> || DisableDeallocRet ) { BuildMI ( MBB , InsertPt , DL , HII . get ( <STR_LIT> ) ) ; return ; } unsigned NewOpc = <STR_LIT> ; MachineInstr * NewI = BuildMI ( MBB , RetI , DL , HII . get ( NewOpc ) ) ; NewI -> copyImplicitOps ( MF


<s> void <ISA_LIT>FrameLowering :: emitEpilogue ( MachineFunction & MF , MachineBasicBlock & MBB ) const { MachineBasicBlock :: iterator MBBI = std :: prev ( MBB . end ( ) ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; if ( hasFP ( MF ) || MF . getTarget ( ) . getOptLevel ( ) == CodeGenOpt :: None ) { MachineBasicBlock :: iterator MBBI = std :: prev ( MBB . end ( ) ) ; MachineBasicBlock :: iterator MBBI_end = MBB . end ( ) ; const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { assert ( MBBI -> getOperand ( <NUM_LIT> ) . isReg ( ) && <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get


<s> const TargetInstrInfo & TII = * MF -> getTarget ( ) . getInstrInfo ( ) ; if ( CSI . empty ( ) ) { return false ; } bool ContiguousRegs = true ; for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const uint16_t * SuperReg = TRI -> getSuperRegisters ( Reg ) ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; assert ( SuperReg [ <NUM_LIT> ] && ! SuperReg [ <NUM_LIT> ] && <STR_LIT> ) ; bool CanUseDblLoad = false ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> )


<s> for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const uint16_t * SuperReg = TRI -> getSuperRegisters ( Reg ) ; assert ( SuperReg [ <NUM_LIT> ] && ! SuperReg [ <NUM_LIT> ] && <STR_LIT> ) ; bool CanUseDblStore = false ; const TargetRegisterClass * SuperRegClass = <NUM_LIT> ; if ( ContiguousRegs && ( i < CSI . size ( ) - <NUM_LIT> ) ) { const uint16_t * SuperRegNext = TRI -> getSuperRegisters ( CSI [ i + <NUM_LIT> ] . getReg ( ) ) ; assert ( SuperRegNext [ <NUM_LIT> ] && ! SuperRegNext [ <NUM_LIT> ] && <STR_LIT> ) ; SuperRegClass = TRI -> getMinimalPhysRegClass ( SuperReg [ <NUM_LIT> ] ) ; CanUseDblStore = ( SuperRegNext [ <NUM_LIT> ] == SuperReg [ <NUM_LIT> ] ) ; } if ( CanUseDblStore ) { TII . storeRegToStackSlot ( MBB , MI , SuperReg [ <NUM_LIT> ] , true , CSI [ i + <NUM_LIT> ] . getFrameIdx ( ) , SuperRegClass , TRI ) ; MBB . addLiveIn ( SuperReg [ <NUM_LIT> ] ) ; ++ i ; } else { ContiguousRegs = false ; const TargetRegisterClass * RC = TRI ->


<s> if ( HasFP ) { unsigned DwFPReg = HRI . getDwarfRegNum ( HRI . getFrameRegister ( ) , true ) ; unsigned DwRAReg = HRI . getDwarfRegNum ( HRI . getRARegister ( ) , true ) ; auto DefCfa = MCCFIInstruction :: createDefCfa ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( DefCfa ) ) ; auto OffR31 = MCCFIInstruction :: createOffset ( FrameLabel , DwRAReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR31 ) ) ; auto OffR30 = MCCFIInstruction :: createOffset ( FrameLabel , DwFPReg , - <NUM_LIT> ) ; BuildMI ( MBB , At , DL , CFID ) . addCFIIndex ( MF . addFrameInst ( OffR30 ) ) ; } static unsigned int RegsToMove [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; for ( unsigned i = <NUM_LIT> ; RegsToMove [ i ] != <STR_LIT> ; ++ i ) { unsigned Reg = RegsToMove [ i ] ; auto IfR = [ Reg ] ( const


<s> bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void updateEntryPaths ( MachineFunction & MF , MachineBasicBlock & SaveB ) const ; bool updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock & RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadInt ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVecPred ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec2 ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandStoreVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandLoadVec ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo & HII , SmallVectorImpl < unsigned > & NewRegs ) const ; bool expandSpillMacros ( MachineFunction & MF , SmallVectorImpl < unsigned > & NewRegs ) const ; unsigned findPhysReg ( MachineFunction & MF , <ISA_LIT>BlockRanges :: IndexRange & FIR , <ISA_LIT>BlockRanges :: InstrIndexMap & IndexMap , <ISA_LIT>BlockRanges :: RegToRangeMap & DeadMap , const TargetRegisterClass * RC ) const ; void optimizeSpillSlots ( MachineFunction & MF , SmallVectorImpl < unsigned > & VRegs ) const ; void findShrunkPrologEpilog ( MachineFunction & MF , MachineBasicBlock * & PrologB , MachineBasicBlock * & EpilogB ) const ; void addCalleeSaveRegistersAsImpOperand ( MachineInstr * MI , const CSIVect & CSI , bool IsDef , bool IsKill ) const ; bool shouldInlineCSR ( const MachineFunction & MF , const CSIVect & CSI ) const ; bool useSpillFunction ( const MachineFunction & MF , const CSIVect & CSI ) const ; bool useRestoreFunction ( const MachineFunction & MF , const CSIVect & CSI ) const ; bool mayOverflowFrameOffset ( MachineFunction & MF


<s> NumEntries = array_lengthof ( Offsets ) ; return Offsets ; } bool assignCalleeSavedSpillSlots ( MachineFunction & MF , const TargetRegisterInfo * TRI , std :: vector < CalleeSavedInfo > & CSI ) const override ; bool needsAligna ( const MachineFunction & MF ) const ; const MachineInstr * getAlignaInstr ( const MachineFunction & MF ) const ; void insertCFIInstructions ( MachineFunction & MF ) const ; private : typedef std :: vector < CalleeSavedInfo > CSIVect ; void expandAlloca ( MachineInstr * AI , const <ISA_LIT>InstrInfo & TII , unsigned SP , unsigned CF ) const ; void insertPrologueInBlock ( MachineBasicBlock & MBB , bool PrologueStubs ) const ; void insertEpilogueInBlock ( MachineBasicBlock & MBB ) const ; void insertAllocframe ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator InsertPt , unsigned NumBytes ) const ; bool insertCSRSpillsInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI , bool & PrologueStubs ) const ; bool insertCSRRestoresInBlock ( MachineBasicBlock & MBB , const CSIVect & CSI , const <ISA_LIT>RegisterInfo & HRI ) const ; void updateEntryPaths ( MachineFunction & MF , MachineBasicBlock & SaveB ) const ; bool updateExitPaths ( MachineBasicBlock & MBB , MachineBasicBlock & RestoreB , BitVector & DoneT , BitVector & DoneF , BitVector & Path ) const ; void insertCFIInstructionsAt ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator At ) const ; void adjustForCalleeSavedRegsSpillCall ( MachineFunction & MF ) const ; bool expandCopy ( MachineBasicBlock & B , MachineBasicBlock :: iterator It , MachineRegisterInfo & MRI , const <ISA_LIT>InstrInfo &

HII , SmallVectorImpl < unsigned > & NewRegs ) const ;


<s> MachineInstr * <ISA_LIT>FrameLowering :: getAlignaInstr ( MachineFunction & MF ) const { for ( auto & B : MF ) for ( auto & I : B ) if ( I . getOpcode


<s> FrameReg = RI -> getFrameRegister ( MF ) ; return MF . getFrameInfo ( )


<s> const <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; return MFI -> hasCalls ( ) || MFI -> getStackSize ( ) >

<NUM_LIT> || FuncInfo -> hasClobberLR ( ) ;


<s> SpillKind Kind = HasTC ? SK_FromMemTailcall : SK_FromMem ; const char * RestoreFn = getSpillFunctionFor ( MaxR , Kind ) ; DebugLoc DL = MI != MBB . end ( ) ? MI -> getDebugLoc ( ) : MBB . getLastNonDebugInstr ( ) -> getDebugLoc ( ) ; MachineInstr * DeallocCall = nullptr ; if ( HasTC ) { unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , MI , DL , TII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; } else { MachineBasicBlock :: iterator It = MBB . getFirstTerminator ( ) ; assert ( It -> isReturn ( ) && std :: next ( It ) == MBB . end ( ) ) ; unsigned ROpc = <STR_LIT> ; DeallocCall = BuildMI ( MBB , It , DL , TII . get ( ROpc ) ) . addExternalSymbol ( RestoreFn ) ; DeallocCall -> copyImplicitOps ( MF , It ) ; } addCalleeSaveRegistersAsImpOperand ( DeallocCall , MaxR , true ) ; return true ; } for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; const TargetRegisterClass * RC = HRI . getMinimalPhysRegClass ( Reg ) ; int FI = CSI [ i ] . getFrameIdx ( ) ; TII . loadRegFromStackSlot ( MBB , MI , Reg , FI , RC


<s> unsigned LFS = MFI -> getLocalFrameSize ( ) ; int Offset = - LFS ; for ( int i = <NUM_LIT> , e = MFI -> getObjectIndexEnd ( ) ; i != e ; ++ i ) { if ( ! MFI -> isSpillSlotObjectIndex ( i ) || MFI -> isDeadObjectIndex ( i ) ) continue ; int S = MFI -> getObjectSize ( i ) ; LFS += S ; Offset -= S ; MFI -> mapLocalFrameObject ( i , Offset ) ; } MFI -> setLocalFrameSize ( LFS ) ; unsigned A = MFI -> getLocalFrameMaxAlign ( ) ; assert ( A <= <NUM_LIT>


<s> MachineBasicBlock :: iterator NextII ; for ( MachineBasicBlock :: iterator MII = MBB -> begin ( ) ; MII != MBB -> end ( ) ; MII = NextII ) { MachineInstr * MI = MII ; NextII = std :: next ( MII ) ; int Opc = MI -> getOpcode ( ) ; if ( Opc == <STR_LIT> ) { HasReplacedPseudoInst = true ; unsigned VirtReg = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned SrcReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; bool IsOrigSrcRegKilled = MI -> getOperand ( <NUM_LIT> ) . isKill ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; assert ( <STR_LIT> . contains ( SrcReg ) && <STR_LIT> ) ; BuildMI ( * MBB , MII , MI -> getDebugLoc ( ) , HII . get ( <STR_LIT> ) , VirtReg ) . addReg ( SrcReg , getKillRegState ( IsOrigSrcRegKilled ) ) ; MI -> setDesc ( HII . get ( <STR_LIT> ) ) ; MI -> getOperand ( <NUM_LIT> ) . setReg ( VirtReg ) ; MI -> getOperand ( <NUM_LIT> ) . setIsKill ( ) ; } else if ( Opc == <STR_LIT> ) { MachineOperand & M0 = MI -> getOperand ( <NUM_LIT> ) ; if ( M0 . isDead ( ) ) { MBB -> erase ( MII ) ; continue ; } unsigned VirtReg = MRI . createVirtualRegister ( & <STR_LIT> ) ; unsigned DestReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isFI ( ) && <STR_LIT> ) ; assert ( <STR_LIT> . contains ( DestReg ) && <STR_LIT> ) ; MI -> setDesc ( HII . get ( <STR_LIT> ) ) ; MI -> getOperand ( <NUM_LIT> ) . setReg ( VirtReg ) ; const MCInstrDesc & D = HII . get (


<s> static inline bool isVtmpDef ( const MachineInstr & MI ) { for ( const MachineOperand & MO : MI . operands ( ) ) if ( MO . isReg ( ) && MO

. isDef ( ) && MO . isImplicit ( ) && ( MO . getReg ( ) == <STR_LIT> ) ) {


<s> return ( MI . mayStore ( ) && ( MI . getOperand ( <NUM_LIT> ) ) . isReg ( ) && ( ( MI . getOperand

( <NUM_LIT> ) ) . getReg ( ) == <STR_LIT> ) ) ;


<s> for ( MII = MBB . begin ( ) , MIE = MBB . end ( ) ; MII != MIE ; ++ MII ) { MachineInstr & MI = * MII ; if ( VtmpDef ) { if ( ! isVtmpUse ( MI ) ) continue ; MBB . splice ( std :: next ( DefMII ) , & MBB , MII ) ; finalizeBundle ( MBB , DefMII . getInstrIterator ( ) , std :: next ( MII ) . getInstrIterator


<s> virtual void getAnalysisUsage ( AnalysisUsage & AU ) const override { AU . addRequired < DominatorTreeWrapperPass > ( ) ; AU . addPreserved < DominatorTreeWrapperPass > ( ) ; AU . addPreserved < MachineFunctionAnalysis > ( ) ; FunctionPass :: getAnalysisUsage (


<s> initialize<ISA_LIT>GenExtractPass ( * PassRegistry :: getPassRegistry


<s> <ISA_LIT>GenExtract ( ) : FunctionPass ( ID ) ,


<s> typedef GraphTraits < DomTreeNode * > GTN ; typedef GTN :: ChildIteratorType Iter ; for ( Iter I = GTN :: child_begin ( DTN ) , E = GTN :: child_end ( DTN ) ; I != E ; ++ I ) visitBlock ( ( * I ) -> getBlock ( ) ) ; bool HasCutoff = ExtractCutoff . getPosition ( ) ; unsigned Cutoff = ExtractCutoff ; bool Changed = false ; BasicBlock :: iterator I = std :: prev ( B -> end ( ) ) , NextI , Begin = B -> begin ( ) ; while ( true ) { if ( HasCutoff && ( ExtractCount >= Cutoff ) ) return Changed ; bool Last = ( I == Begin ) ; if ( ! Last ) NextI =


<s> LogicalSR = false ; Match = match ( In , m_And ( m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = true ; CSR = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_Shl ( m_Value ( BF ) , m_ConstantInt ( CSL ) ) , m_ConstantInt ( CM ) ) ) ; if ( Match && NoSR0 ) return false ; } if ( ! Match ) { LogicalSR = true ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ; CM = ConstantInt :: get ( Ctx


<s> } if ( ! Match ) { LogicalSR = true ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ; CM = ConstantInt :: get ( Ctx , A ) ; } APInt M = CM -> getValue ( ) . lshr ( SL ) ; uint32_t T = M . countTrailingOnes ( ) ; uint32_t U = BW - std :: max ( SL , SR ) ; uint32_t W = std :: min ( U , T ) ; if ( W == <NUM_LIT> ) return false ; if ( ! LogicalSR ) { APInt C = APInt :: getHighBitsSet ( BW , BW - U ) ; if ( M . intersects ( C ) || ! M . isMask ( W ) ) return false ; } else


<s> BasicBlock :: iterator I = std :: prev ( B -> end ( ) ) , NextI , Begin = B -> begin ( ) ; while ( true ) { if ( HasCutoff && ( ExtractCount >= Cutoff ) ) return Changed ; bool Last = ( I == Begin ) ; if ( ! Last ) NextI = std :: prev ( I ) ; Instruction * In =


<s> } if ( ! Match ) { LogicalSR = false ; CSL = ConstantInt :: get ( Type :: getInt32Ty ( Ctx ) , <NUM_LIT> ) ; Match = match ( In , m_And ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CM ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = true ; Match = match ( In , m_Shl ( m_LShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) { CM = nullptr ; LogicalSR = false ; Match = match ( In , m_Shl ( m_AShr ( m_Value ( BF ) , m_ConstantInt ( CSR ) ) , m_ConstantInt ( CSL ) ) ) ; } if ( ! Match ) return false ; Type * Ty = BF -> getType ( ) ; if ( ! Ty -> isIntegerTy ( ) ) return false ; unsigned BW = Ty -> getPrimitiveSizeInBits ( ) ; if ( BW != <NUM_LIT> && BW != <NUM_LIT> ) return false ; uint32_t SR = CSR -> getZExtValue ( ) ; uint32_t SL = CSL -> getZExtValue ( ) ; if ( ! CM ) { if ( ! LogicalSR && ( SR > SL ) ) return false ; APInt A = APInt ( BW , ~ <NUM_LIT> ) . lshr ( SR ) . shl ( SL ) ; CM = ConstantInt :: get ( Ctx , A ) ; } APInt M = CM -> getValue ( ) . lshr ( SL ) ; uint32_t T = M . countTrailingOnes ( ) ; uint32_t U = BW - std :: max ( SL , SR ) ; uint32_t W = std :: min ( U , T ) ; if ( W == <NUM_LIT> )


<s> AU . addPreserved < DominatorTreeWrapperPass > ( ) ; FunctionPass :: getAnalysisUsage ( AU


<s> <ISA_LIT>GenExtract ( ) : FunctionPass


<s> <ISA_LIT>GenExtract ( ) : FunctionPass ( ID ) { initialize<ISA_LIT>GenExtractPass ( * PassRegistry :: getPassRegistry (


<s> if ( skipFunction ( F ) ) return false ; DT = & getAnalysis < DominatorTreeWrapperPass > ( ) . getDomTree ( ) ; bool Changed ; BasicBlock * Entry = GraphTraits < Function * > :: getEntryNode ( & F ) ; Changed = visitBlock (


<s> while ( true ) { if ( HasCutoff && ( ExtractCount >= Cutoff ) ) return Changed ; bool Last = ( I == Begin ) ; if ( ! Last ) NextI = std :: prev ( I ) ; Instruction * In = & * I ; bool Done = convert ( In ) ; if ( HasCutoff && Done ) ExtractCount ++ ; Changed |=


<s> for ( RegisterOrdering :: iterator I = RB . begin ( ) , E = RB . end ( ) ; I != E ; ++ I ) VRs . push_back ( I -> first ) ; std :: sort ( VRs . begin ( ) , VRs . end ( ) , LexCmp ) ; for ( unsigned i = <NUM_LIT> , n = VRs . size ( ) ; i < n ; ++

i ) RO . insert ( std :: make_pair ( VRs [ i ] , i ) ) ;


<s> typedef std :: vector < unsigned > SortableVectorType ; SortableVectorType VRs ; for ( RegisterOrdering :: iterator I = RB . begin ( ) , E = RB . end ( ) ; I != E ; ++ I ) VRs . push_back ( I -> first ) ; std :: sort ( VRs . begin ( ) , VRs . end


<s> FunctionPass * llvm :: create<ISA_LIT>GenInsert ( ) { return new <ISA_LIT>GenInsert


<s> const BitTracker :: BitValue & V = RC [ i ] ; if ( V . Type == BitTracker :: BitValue :: Ref && V .


<s> unsigned SrcR = * I ; int FDi = - <NUM_LIT> , LDi = - <NUM_LIT> ; const BitTracker :: RegisterCell & AC = CMS -> lookup ( SrcR ) ; uint16_t AW = AC . width ( ) ; for ( uint16_t i = <NUM_LIT> , w = std :: min ( W , AW ) ; i < w ; ++ i ) { if ( RC [ i ] == AC [ i ] ) continue ; if ( FDi == - <NUM_LIT> ) FDi = i ; LDi = i ; } if ( FDi == - <NUM_LIT> ) continue ; uint16_t FD = FDi , LD = LDi ; uint16_t MinL = LD - FD + <NUM_LIT> ; for ( uint16_t L = MinL ; L < W ; ++ L ) { LRSMapType :: iterator F = LM . find ( L ) ; if ( F == LM . end ( ) ) continue ; RSListType & LL = F -> second ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { uint16_t S = LL [ i ] . second ; if ( S > FD ) continue ; uint16_t EL = L - MinL ; uint16_t LowS = ( EL < FD ) ? FD - EL : <NUM_LIT> ; if ( S < LowS ) continue ; unsigned InsR = LL [ i ] . first ; if ( ! isValidInsertForm ( VR , SrcR , InsR , L , S ) ) continue ; if ( isDebug ( ) ) { dbgs ( ) << PrintReg ( VR , HRI ) << <STR_LIT> << PrintReg ( SrcR , HRI ) << ',' << PrintReg ( InsR , HRI ) << <STR_LIT> << L << <STR_LIT> << S << <STR_LIT> ; } IFRecordWithRegSet RR ( IFRecord ( SrcR , InsR , L , S ) , RegisterSet ( ) ) ; IFMap [ VR ] . push_back ( RR ) ; Recorded = true ; } } } return Recorded


<s> while ( ! Regs [ S ] . empty ( ) ) { unsigned OtherS = <NUM_LIT> - S ; Regs [ OtherS ] . clear ( ) ; for ( unsigned R = Regs [ S ] . find_first ( ) ; R ; R = Regs [ S ] . find_next ( R ) ) { Regs [ S ] . remove ( R ) ; if ( R == IF . SrcR || R == IF . InsR ) continue ; if ( ! findNonSelfReference ( R ) ) continue ; RMs . insert ( R ) ; const MachineInstr * DefI = MRI -> getVRegDef ( R ) ; assert ( DefI ) ; if ( DefI -> isPHI ( ) ) continue ; getInstrUses ( DefI , Regs [ OtherS ] ) ; } S = OtherS


<s> void <ISA_LIT>GenInsert :: findRemovableRegisters ( unsigned VR , IFRecord IF , RegisterSet & RMs ) const { RegisterSet Regs [ <NUM_LIT> ] ; unsigned S = <NUM_LIT> ; Regs [ S ] . insert ( VR ) ; while ( ! Regs [ S ] . empty ( ) ) { unsigned OtherS = <NUM_LIT> - S ; Regs [ OtherS ] . clear ( ) ; for ( unsigned R = Regs [ S ] . find_first ( ) ; R ; R = Regs [ S ] . find_next ( R ) ) { Regs [ S ] . remove ( R ) ; if ( R == IF . SrcR || R == IF . InsR ) continue ; if ( ! findNonSelfReference ( R )


<s> UnsignedMap RegMap ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first ; const TargetRegisterClass * RC = MRI -> getRegClass ( VR ) ; unsigned NewVR = MRI -> createVirtualRegister ( RC ) ; RegMap [ VR ] = NewVR ; } for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = MRI -> getVRegDef ( I -> first ) ; MachineBasicBlock & B = * MI -> getParent ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned NewR = RegMap [ I -> first ] ; bool R32 = MRI -> getRegClass ( NewR ) == & <STR_LIT> ; const MCInstrDesc & D = R32 ? HII -> get ( <STR_LIT> ) : HII -> get ( <STR_LIT> ) ; IFRecord IF = I -> second [ <NUM_LIT> ] . first ; unsigned Wdh = IF . Wdh , Off = IF . Off ; unsigned InsS = <NUM_LIT> ; if ( R32 && MRI -> getRegClass ( IF . InsR ) == & <STR_LIT> ) { InsS = <STR_LIT> ; if ( Off >= <NUM_LIT> ) { InsS = <STR_LIT> ; Off -= <NUM_LIT> ; } } MachineBasicBlock :: iterator At = MI ; if ( MI -> isPHI ( ) ) At = B . getFirstNonPHI ( ) ; BuildMI ( B , At , DL , D , NewR ) . addReg ( IF . SrcR ) . addReg ( IF . InsR , <NUM_LIT> , InsS ) . addImm ( Wdh ) . addImm ( Off ) ; MRI -> clearKillFlags ( IF . SrcR ) ; MRI -> clearKillFlags ( IF . InsR ) ; } for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ;


<s> RegMap [ VR ] = NewVR ; } for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = MRI -> getVRegDef ( I -> first ) ; MachineBasicBlock & B = * MI -> getParent ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned NewR = RegMap [ I -> first ] ; bool R32 = MRI -> getRegClass ( NewR ) == & <STR_LIT> ; const MCInstrDesc & D = R32 ? HII -> get ( <STR_LIT> ) : HII -> get ( <STR_LIT> ) ; IFRecord IF = I -> second [ <NUM_LIT> ] . first ; unsigned Wdh = IF . Wdh , Off = IF . Off ; unsigned InsS = <NUM_LIT> ; if ( R32 && MRI -> getRegClass ( IF . InsR ) == & <STR_LIT> ) { InsS = <STR_LIT> ; if ( Off >= <NUM_LIT> ) { InsS =


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isUse ( ) ) continue ; unsigned R = MO


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isUse ( ) ) continue ; unsigned R = MO .


<s> unsigned idx ( iterator It ) const { return It - begin ( )


<s> if ( L == Seq . end ( ) ) Seq . push_back ( VR ) ; else Seq . insert (


<s> for ( uint16_t i = <NUM_LIT> ; i < W ; ++ i ) { const BitTracker :: BitValue & BV = RC [ i ] ; if ( BV . is ( <NUM_LIT> ) || BV . is ( <NUM_LIT> ) ) continue ; return false ; } return true


<s> return :: llvm :: DebugFlag && :: llvm


<s> return :: llvm :: DebugFlag && :: llvm ::


<s> else if ( ! BV . is ( <NUM_LIT> ) ) return false ; B <<= <NUM_LIT> ; } if ( W == <NUM_LIT> ) return isInt < <NUM_LIT> > ( V ) ; return isInt < <NUM_LIT> > ( Lo_32 ( V ) ) && isInt < <NUM_LIT> > ( Hi_32


<s> const BitTracker :: BitValue & BV = RC [ i ] ; if ( BV . is ( <NUM_LIT> ) ) V |= B ; else if ( ! BV . is ( <NUM_LIT> ) ) return false ; B <<= <NUM_LIT> ; } if ( W == <NUM_LIT> ) return isInt < <NUM_LIT> >


<s> if ( DstRC != SrcRC ) return false ; if ( DstRC == InsRC ) return true ; if ( DstRC == & <STR_LIT> ) return false ; if ( S < <NUM_LIT> && S + L > <NUM_LIT> ) return


<s> const TargetRegisterClass * InsRC = MRI -> getRegClass ( InsR ) ; if ( ! isIntClass ( DstRC ) || ! isIntClass ( SrcRC ) || ! isIntClass ( InsRC ) ) return false ; if ( DstRC != SrcRC )


<s> for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) pruneUsesTooFar ( I -> first , RPO , Memo ) ; pruneEmptyLists ( ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I


<s> for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) pruneCoveredSets ( I -> first ) ; UnsignedMap RPO ; typedef ReversePostOrderTraversal < const MachineFunction * > RPOTType ; RPOTType RPOT ( MFN ) ; unsigned RPON


<s> assert ( F != IFMap . end ( ) ) ; IFListType & LL = F -> second ; MachineInstr * DefVR = MRI -> getVRegDef ( VR ) ; bool DefEx = HII -> isConstExtended ( DefVR ) ; bool HasNE = false ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { if ( LL [ i ] . second . empty ( ) ) continue ; HasNE = true ; break ; } if ( ! DefEx || HasNE ) { auto IsEmpty = [ ] ( const IFRecordWithRegSet & IR ) -> bool { return IR . second . empty ( ) ; } ; auto End = std :: remove_if ( LL . begin ( ) , LL . end ( ) , IsEmpty ) ; if ( End != LL . end ( ) ) LL . erase ( End , LL . end ( ) ) ; } else { IFRecord MaxIF = LL [ <NUM_LIT> ] . first ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { const IFRecord & IF = LL [ i ] . first ; unsigned M0 = BaseOrd [ MaxIF . SrcR ] , M1 = BaseOrd [ MaxIF . InsR ] ; unsigned R0 = BaseOrd [ IF . SrcR ] , R1 = BaseOrd [ IF . InsR ] ; if ( M0 > R0 ) continue ; if ( M0 == R0 ) { if ( M1 > R1 ) continue ; if ( M1 == R1 ) { if ( MaxIF . Wdh > IF . Wdh ) continue ; if ( MaxIF . Wdh == IF . Wdh && MaxIF . Off >= IF . Off ) continue ; } } MaxIF = IF ; } LL . clear ( ) ; LL . push_back ( std :: make_pair ( MaxIF , RegisterSet ( ) ) ) ; } for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ) { const RegisterSet & RMi = LL [ i ] . second ; unsigned j = <NUM_LIT> ; while ( j < n


<s> void <ISA_LIT>GenInsert :: pruneEmptyLists ( ) { typedef SmallVector < IFMapType :: iterator , <NUM_LIT> > IterListType ; IterListType Prune ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { if ( I -> second . size ( ) == <NUM_LIT> ) Prune . push_back ( I ) ; } for ( unsigned i = <NUM_LIT> , n = Prune . size ( ) ; i < n ; ++ i )


<s> IFMapType :: iterator F = IFMap . find ( VR ) ; assert ( F != IFMap . end ( ) ) ; IFListType & LL = F -> second ; auto IsCopy = [ ] ( const IFRecordWithRegSet & IR ) -> bool { return IR . first . Wdh == <NUM_LIT> && ( IR . first . Off == <NUM_LIT> ||


<s> const MachineInstr * DefV = MRI -> getVRegDef ( VR ) ; for ( unsigned i = LL . size ( ) ; i > <NUM_LIT> ; -- i ) { unsigned SR = LL [ i - <NUM_LIT> ] . first . SrcR , IR = LL [ i - <NUM_LIT> ] . first . InsR ; const MachineInstr * DefS = MRI -> getVRegDef ( SR ) ; const MachineInstr * DefI = MRI -> getVRegDef ( IR ) ; unsigned DSV = distance ( DefS , DefV , RPO , M ) ; if ( DSV


<s> iterator L = std :: lower_bound ( Seq . begin ( ) , Seq . end ( ) , VR , Ord ) ; assert ( L != Seq . end ( ) ) ; Seq . erase ( L


<s> if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( ConstMIOperands Op ( MI ) ; Op . isValid ( ) ; ++ Op ) { if ( ! Op -> isReg ( ) || ! Op -> isDef ( ) ) continue ; unsigned R = Op -> getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( R ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R ) ; } if ( ! AllDead ) continue ; B -> erase ( MI ) ; for ( unsigned I = <NUM_LIT> , N = Regs . size ( ) ; I != N ; ++ I ) MRI -> markUsesInDebugValueAsUndef ( Regs [ I ] ) ; Changed = true


<s> HII = ST . getInstrInfo ( ) ; HRI = ST . getRegisterInfo ( ) ; MFN = & MF ; MRI = & MF . getRegInfo ( ) ; MDT = & getAnalysis < MachineDominatorTree > ( ) ; Changed = removeDeadCode ( MDT -> getRootNode ( ) ) ; const <ISA_LIT>Evaluator HE ( * HRI , * MRI , * HII , MF ) ; BitTracker BTLoc ( HE , MF ) ; BTLoc . trace ( isDebug ( ) ) ; BTLoc . run ( ) ; CellMapShadow MS ( BTLoc ) ; CMS = & MS ; buildOrderingMF ( BaseOrd ) ; buildOrderingBT ( BaseOrd , CellOrd ) ; if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; for ( RegisterOrdering :: iterator I = CellOrd . begin ( ) , E = CellOrd . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first , Pos = I -> second ; dbgs ( ) << PrintReg ( VR , HRI ) << <STR_LIT> << Pos << <STR_LIT> ; } } MachineBasicBlock * RootB = MDT -> getRoot ( ) ; OrderedRegisterList AvailR ( CellOrd ) ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TimingDetail ) ; collectInBlock ( RootB , AvailR ) ; computeRemovableRegisters ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TimingDetail


<s> if ( UseC [ R ] == <NUM_LIT> ) continue ; All0 = false ; break ; } Accept = All0 ; } else if ( SelectHas0 ) { bool Has0 = false ; for ( unsigned R = Us . find_first ( ) ; R ; R = Us . find_next ( R ) ) { if ( UseC [ R ] != <NUM_LIT> ) continue ; Has0 = true ; break ; } Accept = Has0 ; } if ( Accept ) LL . push_back ( M ) ; } AllRMs . clear ( ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { const IFListType & LL = I -> second ; if ( LL . size ( ) > <NUM_LIT> ) AllRMs . insert ( LL [ <NUM_LIT> ] . second ) ; } for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { IFListType & LL = I -> second ; if ( LL . size ( ) == <NUM_LIT> ) continue ; unsigned SR = LL [ <NUM_LIT> ] . first . SrcR , IR


<s> const IFListType & LL = I -> second ; RegisterSet TT ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) TT . insert ( LL [ i ] . second ) ; for ( unsigned R = TT . find_first ( ) ; R ; R = TT . find_next ( R ) ) RemC [ R ] ++ ; AllRMs . insert ( TT ) ; } for ( unsigned R = AllRMs . find_first ( ) ; R ; R = AllRMs . find_next ( R ) ) { typedef MachineRegisterInfo :: use_nodbg_iterator use_iterator ; typedef SmallSet < const MachineInstr * , <NUM_LIT> > InstrSet ; InstrSet UIs ; use_iterator E = MRI -> use_nodbg_end ( ) ; for ( use_iterator I = MRI -> use_nodbg_begin ( R ) ; I != E ; ++ I ) UIs . insert ( I -> getParent ( ) ) ; unsigned C = UIs . size ( ) ; unsigned D = RemC [ R ] ; UseC [ R ] = ( C > D ) ? C - D : <NUM_LIT> ; } bool SelectAll0 = OptSelectAll0 , SelectHas0 = OptSelectHas0 ; if ( ! SelectAll0 && ! SelectHas0 ) SelectAll0 = true ; IFOrdering IFO ( UseC , BaseOrd ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { IFListType & LL = I -> second ; if ( LL . empty ( ) ) continue ; IFListType :: iterator MinI = std :: min_element ( LL . begin ( ) , LL . end ( ) , IFO ) ; assert ( MinI != LL . end ( ) ) ; IFRecordWithRegSet M = * MinI ; LL . clear ( ) ; RegisterSet Us ; const MachineInstr * DefI = MRI -> getVRegDef ( I -> first ) ; getInstrUses ( DefI , Us ) ; bool Accept = false ; if ( SelectAll0 ) { bool All0 = true ; for ( unsigned R = Us . find_first ( ) ; R ; R = Us . find_next ( R ) ) { if ( UseC [ R ] == <NUM_LIT> ) continue ; All0 = false ; break ; } Accept = All0 ; } else if ( SelectHas0 ) { bool Has0 = false ; for ( unsigned R = Us . find_first ( ) ; R ;


<s> for ( unsigned R = Rs . find_first ( ) ; R ; R = Rs . find_next ( R ) ) { UnsignedMap :: const_iterator F = UseC . find ( R ) ; assert ( F != UseC . end ( ) ) ; unsigned UC = F -> second ; if ( UC ==


<s> for ( RegisterOrdering :: iterator I = RB . begin ( ) , E = RB . end ( ) ; I != E ; ++ I ) VRs . push_back ( I -> first ) ; llvm :: sort ( VRs


<s> bool Skip = MI . isCopy ( ) || MI . isRegSequence ( ) ; if ( ! Skip ) { for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) { if ( ! DoConst && isConstant ( VR ) ) continue ; if ( findSelfReference ( VR ) || isSmallConstant ( VR ) ) continue ; findRecordInsertForms ( VR , AVs ) ; if ( IFMap . size ( ) > MaxIFMSize ) return ; } } for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) AVs . insert ( VR ) ; BlockDefs . insert ( InsDefs ) ; } for ( auto * DTN : children < MachineDomTreeNode * > ( MDT -> getNode ( B ) ) ) { MachineBasicBlock * SB = DTN


<s> void <ISA_LIT>GenInsert :: dump_map ( ) const { using iterator = IFMapType :: const_iterator ; for ( iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { dbgs ( ) << <STR_LIT> << printReg ( I -> first , HRI ) << <STR_LIT> ; const IFListType & LL =


<s> UnsignedMap RegMap ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first ; const TargetRegisterClass * RC = MRI -> getRegClass ( VR ) ; Register NewVR = MRI -> createVirtualRegister ( RC ) ; RegMap [ VR ] = NewVR ; } for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = MRI -> getVRegDef ( I -> first ) ; MachineBasicBlock & B = * MI -> getParent ( ) ; DebugLoc DL = MI -> getDebugLoc ( ) ; unsigned NewR = RegMap [ I -> first ] ; bool R32 = MRI -> getRegClass ( NewR ) == & <STR_LIT> ; const MCInstrDesc & D = R32 ? HII -> get ( <STR_LIT> ) : HII -> get ( <STR_LIT> ) ; IFRecord IF = I -> second [ <NUM_LIT> ] . first ; unsigned Wdh = IF . Wdh , Off = IF . Off ; unsigned InsS = <NUM_LIT> ; if ( R32 && MRI -> getRegClass ( IF . InsR ) == & <STR_LIT> ) { InsS = <STR_LIT> ; if ( Off >= <NUM_LIT> ) { InsS = <STR_LIT> ; Off -= <NUM_LIT> ; } } MachineBasicBlock :: iterator At = MI ; if ( MI -> isPHI ( ) ) At =


<s> for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef (


<s> void <ISA_LIT>GenInsert :: getInstrUses ( const MachineInstr * MI , RegisterSet & Uses ) const { for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || !


<s> <ISA_LIT>GenInsert ( ) : MachineFunctionPass ( ID ) { initialize<ISA_LIT>GenInsertPass ( * PassRegistry ::


<s> if ( L == Seq . end ( ) ) Seq . push_back ( VR ) ; else Seq . insert ( L , VR ) ; unsigned S = Seq . size ( ) ; if ( S > MaxSize ) Seq . resize ( MaxSize ) ; assert ( Seq . size (


<s> return DebugFlag && isCurrentDebugType ( DEBUG_TYPE ) ; return


<s> PairMapType Memo ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) pruneUsesTooFar ( I -> first , RPO , Memo ) ; pruneEmptyLists ( ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++


<s> bool DefEx = HII -> isConstExtended ( * DefVR ) ; bool HasNE = false ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { if ( LL [ i ] . second . empty ( ) ) continue ; HasNE = true ; break ; } if ( ! DefEx || HasNE ) { auto IsEmpty = [ ] ( const IFRecordWithRegSet & IR ) -> bool { return IR . second . empty ( ) ; } ; llvm :: erase_if ( LL , IsEmpty ) ; } else { IFRecord MaxIF = LL [ <NUM_LIT> ] . first ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { const IFRecord & IF = LL [ i ] . first ; unsigned M0 = BaseOrd [ MaxIF . SrcR ] , M1 = BaseOrd [ MaxIF . InsR ] ; unsigned R0 = BaseOrd [ IF . SrcR ] , R1 = BaseOrd [ IF . InsR ] ; if ( M0 > R0 ) continue ; if ( M0 == R0 ) { if ( M1 > R1 ) continue ; if ( M1 == R1 ) { if ( MaxIF . Wdh > IF . Wdh ) continue ; if ( MaxIF . Wdh == IF . Wdh && MaxIF . Off >= IF . Off ) continue ; } } MaxIF = IF ; } LL . clear ( ) ; LL . push_back ( std :: make_pair ( MaxIF , RegisterSet ( ) ) ) ; } for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ) { const RegisterSet & RMi = LL [ i ] . second ; unsigned j = <NUM_LIT> ; while ( j < n ) { if ( j != i && LL [ j ] .


<s> void <ISA_LIT>GenInsert :: pruneEmptyLists ( ) { using IterListType = SmallVector < IFMapType :: iterator , <NUM_LIT> > ; IterListType Prune ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { if ( I -> second . empty ( ) ) Prune . push_back (


<s> IFMapType :: iterator F = IFMap . find ( VR ) ; assert ( F != IFMap . end ( ) ) ; IFListType & LL = F -> second ; auto IsCopy = [ ] ( const IFRecordWithRegSet & IR ) -> bool { return IR . first . Wdh == <NUM_LIT> && ( IR . first . Off == <NUM_LIT>


<s> if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg ( ) ; if ( ! R . isVirtual ( ) || !


<s> bool Accept = false ; if ( SelectAll0 ) { bool All0 = true ; for ( unsigned R = Us . find_first ( ) ; R ; R = Us . find_next ( R ) ) { if ( UseC [ R ] == <NUM_LIT> ) continue ; All0 = false ; break ; } Accept = All0 ; } else if ( SelectHas0 ) { bool Has0 = false ; for ( unsigned R = Us . find_first ( ) ; R ; R = Us . find_next ( R ) ) { if ( UseC [ R ] != <NUM_LIT> ) continue ; Has0 = true ; break ; } Accept = Has0 ; } if ( Accept ) LL . push_back ( M ) ; } AllRMs . clear ( ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { const IFListType & LL = I -> second ; if ( ! LL . empty ( ) ) AllRMs . insert ( LL [ <NUM_LIT> ] . second ) ; } for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { IFListType & LL = I -> second ; if ( LL . empty


<s> IFMapType :: iterator End = IFMap . end ( ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { const IFListType & LL = I -> second ; RegisterSet TT ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) TT . insert ( LL [ i ] . second ) ; for ( unsigned R = TT . find_first ( ) ; R ; R = TT . find_next ( R ) ) RemC [ R ] ++ ; AllRMs . insert ( TT ) ; } for ( unsigned R = AllRMs . find_first ( ) ; R ; R = AllRMs . find_next ( R ) ) { using use_iterator = MachineRegisterInfo :: use_nodbg_iterator ; using InstrSet = SmallSet < const MachineInstr * , <NUM_LIT> > ; InstrSet UIs ; use_iterator E = MRI -> use_nodbg_end ( ) ; for ( use_iterator I = MRI -> use_nodbg_begin ( R ) ; I != E ; ++ I ) UIs . insert ( I -> getParent ( ) ) ; unsigned C = UIs . size ( ) ; unsigned D = RemC


<s> for ( RegisterOrdering :: iterator I = RB . begin ( ) , E = RB . end ( ) ; I != E ; ++ I ) VRs . push_back ( I -> first ) ; std :: sort ( VRs . begin ( ) , VRs . end ( ) , LexCmp ) ; for ( unsigned i = <NUM_LIT> , n = VRs . size ( ) ; i < n ; ++


<s> unsigned FromN = FromB -> getNumber ( ) , ToN = ToB -> getNumber ( ) ; PairMapType :: iterator F = M . find ( std :: make_pair ( FromN , ToN ) ) ; if ( F != M . end ( ) ) return F -> second ; unsigned ToRPO = RPO . lookup ( ToN ) ; unsigned MaxD = <NUM_LIT> ; using pred_iterator = MachineBasicBlock :: const_pred_iterator ; for ( pred_iterator I = ToB -> pred_begin ( ) , E = ToB -> pred_end ( ) ; I != E ; ++ I ) { const MachineBasicBlock * PB = * I ; if ( PB == FromB || RPO . lookup ( PB

-> getNumber ( ) ) >= ToRPO ) continue ;


<s> void <ISA_LIT>GenInsert :: dump_map ( ) const { using iterator = IFMapType :: const_iterator ; for ( iterator I = IFMap . begin ( ) , E = IFMap . end ( )


<s> for ( iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { dbgs ( ) << <STR_LIT> << PrintReg ( I -> first ,


<s> if ( M0 == R0 ) { if ( M1 > R1 ) continue ; if ( M1 == R1 ) { if ( MaxIF . Wdh > IF . Wdh ) continue ; if ( MaxIF . Wdh == IF . Wdh && MaxIF . Off >= IF . Off ) continue ; } } MaxIF = IF ; } LL . clear ( ) ; LL . push_back ( std :: make_pair ( MaxIF , RegisterSet ( ) ) ) ; } for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ) { const RegisterSet & RMi = LL [ i ] . second ; unsigned j = <NUM_LIT> ; while ( j < n ) { if ( j != i && LL [ j ] . second . includes ( RMi ) ) break ; j ++ ; } if ( j == n ) { i


<s> return IR . first . Wdh == <NUM_LIT> && ( IR . first . Off == <NUM_LIT> || IR . first . Off == <NUM_LIT> ) ; } ; auto End = llvm :: remove_if ( LL , IsCopy ) ; if ( End != LL . end ( ) ) LL . erase ( End , LL . end


<s> if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; unsigned R = MO . getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( R ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R ) ; } if ( ! AllDead ) continue ; B -> erase ( MI ) ; for ( unsigned I = <NUM_LIT> , N = Regs . size ( ) ; I != N ;

++ I ) MRI -> markUsesInDebugValueAsUndef ( Regs [ I ] ) ;


<s> MFN = & MF ; MRI = & MF . getRegInfo ( ) ; MDT = & getAnalysis < MachineDominatorTree > ( ) ; Changed = removeDeadCode ( MDT -> getRootNode ( ) ) ; const <ISA_LIT>Evaluator HE ( * HRI , * MRI , * HII , MF ) ; BitTracker BTLoc ( HE , MF ) ; BTLoc . trace ( isDebug ( ) ) ; BTLoc . run ( ) ; CellMapShadow MS ( BTLoc ) ; CMS = & MS ; buildOrderingMF ( BaseOrd ) ; buildOrderingBT ( BaseOrd , CellOrd ) ; if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; for ( RegisterOrdering :: iterator I = CellOrd . begin ( ) , E = CellOrd . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first , Pos = I -> second ; dbgs ( ) << PrintReg ( VR , HRI ) << <STR_LIT> << Pos << <STR_LIT> ; } } MachineBasicBlock * RootB = MDT -> getRoot ( ) ; OrderedRegisterList AvailR ( CellOrd ) ; const char * const TGName = <STR_LIT> ; const char * const TGDesc = <STR_LIT> ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; collectInBlock ( RootB , AvailR ) ; computeRemovableRegisters ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; pruneCandidates ( )


<s> MachineInstr * MI = & * I ; InsDefs . clear ( ) ; getInstrDefs ( MI , InsDefs ) ; bool Skip = MI -> isCopy ( ) || MI -> isRegSequence ( ) ; if ( ! Skip ) { for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) { if ( ! DoConst && isConstant ( VR ) ) continue ; if ( findSelfReference ( VR ) || isSmallConstant ( VR ) ) continue ; findRecordInsertForms ( VR , AVs ) ; if ( IFMap . size ( ) > MaxIFMSize ) return ; } } for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) AVs . insert ( VR ) ; BlockDefs . insert ( InsDefs ) ; } for ( auto * DTN : children < MachineDomTreeNode * > ( MDT -> getNode ( B ) ) ) { MachineBasicBlock * SB = DTN -> getBlock ( ) ; collectInBlock ( SB


<s> bool DoConst = OptConst ; RegisterSet BlockDefs , InsDefs ; for ( MachineBasicBlock :: iterator I = B -> begin ( ) , E = B -> end ( ) ; I != E ; ++ I ) { MachineInstr * MI = & * I ; InsDefs . clear ( ) ; getInstrDefs ( MI , InsDefs ) ; bool Skip = MI -> isCopy ( ) || MI -> isRegSequence ( ) ; if ( ! Skip ) { for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) { if ( ! DoConst && isConstant ( VR ) ) continue ; if ( findSelfReference ( VR ) || isSmallConstant ( VR ) ) continue ; findRecordInsertForms ( VR , AVs ) ; if ( IFMap . size ( ) > MaxIFMSize ) return ; } } for ( unsigned VR = InsDefs . find_first ( ) ; VR ; VR = InsDefs . find_next ( VR ) ) AVs . insert ( VR ) ; BlockDefs . insert ( InsDefs ) ; } for ( auto * DTN : children < MachineDomTreeNode * > ( MDT -> getNode ( B ) ) ) { MachineBasicBlock * SB = DTN -> getBlock ( ) ; collectInBlock ( SB , AVs ) ; } for ( unsigned VR = BlockDefs . find_first ( ) ; VR ; VR = BlockDefs . find_next


<s> else Seq . insert ( L , VR ) ; unsigned S = Seq . size ( ) ; if ( S > MaxSize ) Seq . resize (


<s> void OrderedRegisterList :: remove ( unsigned VR ) { iterator L = std :: lower_bound ( Seq . begin ( ) , Seq . end ( ) , VR , Ord ) ; if ( L != Seq . end ( ) ) Seq . erase


<s> collectInBlock ( RootB , AvailR ) ; computeRemovableRegisters ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; pruneCandidates ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; selectCandidates ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( VRegIndexCutoff . getPosition ( ) ) { unsigned Cutoff = VRegIndexCutoff ; using IterListType = SmallVector < IFMapType :: iterator , <NUM_LIT> > ; IterListType Out ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { unsigned Idx = TargetRegisterInfo :: virtReg2Index ( I -> first ) ; if ( Idx >= Cutoff ) Out . push_back ( I ) ; } for ( unsigned i = <NUM_LIT> , n = Out . size ( ) ; i < n ; ++ i ) IFMap . erase ( Out [ i ] ) ; } if ( IFMap . empty ( ) ) return


<s> bool <ISA_LIT>GenInsert :: runOnMachineFunction ( MachineFunction & MF ) { if ( skipFunction ( MF . getFunction ( ) ) ) return false ; bool Timing = OptTiming , TimingDetail = Timing && OptTimingDetail ; bool Changed = false ; assert ( ! OptSelectAll0 || ! OptSelectHas0 ) ; IFMap . clear ( ) ; BaseOrd . clear ( ) ; CellOrd . clear ( ) ; const auto & ST = MF . getSubtarget < <ISA_LIT>Subtarget > ( ) ; HII = ST . getInstrInfo ( ) ; HRI = ST . getRegisterInfo ( ) ; MFN = & MF ; MRI = & MF . getRegInfo ( ) ; MDT = & getAnalysis < MachineDominatorTree > ( ) ; Changed = removeDeadCode ( MDT -> getRootNode ( ) ) ; const <ISA_LIT>Evaluator HE ( * HRI , * MRI , * HII , MF ) ; BitTracker BTLoc ( HE , MF ) ; BTLoc . trace ( isDebug ( ) ) ; BTLoc . run ( ) ; CellMapShadow MS ( BTLoc ) ; CMS = & MS ; buildOrderingMF ( BaseOrd ) ; buildOrderingBT ( BaseOrd , CellOrd ) ; if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; for ( RegisterOrdering :: iterator I = CellOrd . begin ( ) , E = CellOrd . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first , Pos = I -> second ; dbgs ( ) << printReg ( VR , HRI ) << <STR_LIT> << Pos << <STR_LIT> ; } } MachineBasicBlock * RootB = MDT -> getRoot ( ) ; OrderedRegisterList AvailR ( CellOrd ) ; const char * const TGName = <STR_LIT> ; const char * const TGDesc = <STR_LIT> ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; collectInBlock ( RootB , AvailR ) ; computeRemovableRegisters ( ) ; } if ( isDebug ( ) ) { dbgs ( ) <<


<s> for ( unsigned i = <NUM_LIT> , n = MI -> getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isUse (


<s> } bool Recorded = false ; for ( iterator I = AVs . begin ( ) , E = AVs . end ( ) ; I != E ; ++ I ) { unsigned SrcR = * I ; int FDi = - <NUM_LIT> , LDi = - <NUM_LIT> ; const BitTracker :: RegisterCell & AC = CMS -> lookup ( SrcR ) ; uint16_t AW = AC . width ( ) ; for ( uint16_t i = <NUM_LIT> , w = std :: min ( W , AW ) ; i < w ; ++ i ) { if ( RC [ i ] == AC [ i ] ) continue ; if ( FDi == - <NUM_LIT> ) FDi = i ; LDi = i ; } if ( FDi == - <NUM_LIT> ) continue ; uint16_t FD = FDi , LD = LDi ; uint16_t MinL = LD - FD + <NUM_LIT> ; for ( uint16_t L = MinL ; L < W ; ++ L ) { LRSMapType :: iterator F = LM . find ( L ) ; if ( F == LM . end ( ) ) continue ; RSListType & LL = F -> second ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { uint16_t S = LL [ i ] . second ; if ( S > FD ) continue ; uint16_t EL = L - MinL ; uint16_t LowS = ( EL < FD ) ? FD - EL : <NUM_LIT> ; if ( S < LowS ) continue ; unsigned InsR = LL [ i ] . first ; if ( ! isValidInsertForm ( VR , SrcR , InsR , L , S ) ) continue ; if ( isDebug ( ) ) { dbgs ( ) << PrintReg ( VR , HRI ) << <STR_LIT> << PrintReg ( SrcR , HRI ) << ',' << PrintReg ( InsR , HRI ) << <STR_LIT> <<


<s> initialize<ISA_LIT>GenInsertPass ( * PassRegistry ::


<s> for ( auto I = Instrs . begin ( ) , E = Instrs . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = * I ; unsigned Opc = MI -> getOpcode ( ) ; if ( Opc == TargetOpcode :: LIFETIME_START || Opc == TargetOpcode :: LIFETIME_END ) continue ; bool Store = false ; if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; unsigned R = MO . getReg ( ) ; if ( ! TargetRegisterInfo :: isVirtualRegister ( R ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R ) ; } if ( ! AllDead ) continue ; B -> erase ( MI ) ; for ( unsigned I = <NUM_LIT> , N = Regs . size ( ) ; I != N ; ++ I

) MRI -> markUsesInDebugValueAsUndef ( Regs [ I ] ) ;


<s> BTLoc . trace ( isDebug ( ) ) ; BTLoc . run ( ) ; CellMapShadow MS ( BTLoc ) ; CMS = & MS ; buildOrderingMF ( BaseOrd ) ; buildOrderingBT ( BaseOrd , CellOrd ) ; if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; for ( RegisterOrdering :: iterator I = CellOrd . begin ( ) , E = CellOrd . end ( ) ; I != E ; ++ I ) { unsigned VR = I -> first , Pos = I -> second ; dbgs ( ) << PrintReg ( VR , HRI ) << <STR_LIT> << Pos << <STR_LIT> ; } } MachineBasicBlock * RootB = MDT -> getRoot ( ) ; OrderedRegisterList AvailR ( CellOrd ) ; const char * const TGName = <STR_LIT> ; const char * const TGDesc = <STR_LIT> ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; collectInBlock ( RootB , AvailR ) ; computeRemovableRegisters ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; pruneCandidates ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( IFMap . empty ( ) ) return Changed ; { NamedRegionTimer _T ( <STR_LIT> , <STR_LIT> , TGName , TGDesc , TimingDetail ) ; selectCandidates ( ) ; } if ( isDebug ( ) ) { dbgs ( ) << <STR_LIT> ; dump_map ( ) ; } if ( VRegIndexCutoff . getPosition ( ) ) { unsigned Cutoff = VRegIndexCutoff ; typedef SmallVector < IFMapType :: iterator , <NUM_LIT> > IterListType ; IterListType Out ; for ( IFMapType :: iterator I = IFMap . begin ( ) , E = IFMap . end ( ) ; I != E ; ++ I ) { unsigned Idx = TargetRegisterInfo :: virtReg2Index ( I -> first ) ; if ( Idx >= Cutoff ) Out . push_back ( I ) ; } for ( unsigned i = <NUM_LIT> , n = Out . size ( ) ; i < n ; ++ i ) IFMap . erase ( Out [ i ] ) ; } if ( IFMap . empty ( )


<s> void <ISA_LIT>GenInsert :: buildOrderingBT ( RegisterOrdering & RB , RegisterOrdering & RO ) const { BitValueOrdering BVO ( RB ) ; RegisterCellLexCompare LexCmp ( BVO , * CMS ) ; using SortableVectorType = std :: vector < unsigned > ; SortableVectorType VRs ; for ( auto & I : RB ) VRs . push_back ( I . first ) ; llvm :: sort ( VRs ,


<s> void <ISA_LIT>GenInsert :: buildOrderingBT ( RegisterOrdering & RB , RegisterOrdering & RO ) const { BitValueOrdering BVO ( RB ) ; RegisterCellLexCompare LexCmp ( BVO , * CMS ) ; using SortableVectorType = std :: vector < unsigned > ; SortableVectorType VRs ; for ( auto & I : RB ) VRs . push_back ( I . first ) ; llvm :: sort ( VRs


<s> for ( auto & I : IFMap ) { IFListType & LL = I


<s> for ( const auto & I : IFMap ) { dbgs ( ) << <STR_LIT> << printReg ( I . first , HRI ) << <STR_LIT> ; const IFListType & LL = I . second ; for ( const auto & J : LL ) dbgs ( ) << <STR_LIT> << PrintIFR ( J . first , HRI ) << <STR_LIT> << PrintRegSet ( J .


<s> unsigned NewR = RegMap [ I . first ] ; bool R32 = MRI -> getRegClass ( NewR ) == & <STR_LIT> ; const MCInstrDesc & D = R32 ? HII -> get ( <STR_LIT> ) : HII -> get ( <STR_LIT> ) ; IFRecord IF = I . second [ <NUM_LIT> ] . first ; unsigned Wdh = IF . Wdh , Off = IF . Off ; unsigned InsS = <NUM_LIT> ; if ( R32 && MRI -> getRegClass ( IF . InsR ) == & <STR_LIT> ) { InsS = <STR_LIT> ; if ( Off >= <NUM_LIT> ) { InsS = <STR_LIT> ; Off -= <NUM_LIT> ; } } MachineBasicBlock :: iterator At = MI ; if ( MI -> isPHI ( ) ) At = B . getFirstNonPHI ( ) ; BuildMI ( B , At , DL , D , NewR ) . addReg ( IF . SrcR ) . addReg ( IF . InsR , <NUM_LIT> , InsS ) . addImm ( Wdh ) . addImm ( Off ) ; MRI -> clearKillFlags ( IF . SrcR ) ; MRI -> clearKillFlags ( IF . InsR ) ; } for ( const auto & I : IFMap ) { MachineInstr * DefI = MRI -> getVRegDef ( I .


<s> if ( I . second . empty ( ) ) continue ; HasNE = true ; break ; } if ( ! DefEx || HasNE ) { auto IsEmpty = [ ] ( const IFRecordWithRegSet & IR ) -> bool { return IR . second . empty ( ) ; } ; llvm :: erase_if ( LL , IsEmpty ) ; } else { IFRecord MaxIF = LL [ <NUM_LIT> ] . first ; for ( unsigned i = <NUM_LIT> , n = LL . size ( ) ; i < n ; ++ i ) { const IFRecord & IF = LL [ i ] . first ; unsigned M0 = BaseOrd [ MaxIF . SrcR ] , M1 = BaseOrd [ MaxIF . InsR ] ; unsigned R0 = BaseOrd [ IF . SrcR ] , R1 = BaseOrd [ IF . InsR ] ; if ( M0 > R0


<s> for ( MachineInstr * MI : Instrs ) { unsigned Opc = MI -> getOpcode ( ) ; if ( Opc == TargetOpcode :: LIFETIME_START || Opc == TargetOpcode :: LIFETIME_END ) continue ; bool Store = false ; if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg ( ) ; if ( ! R . isVirtual ( ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R


<s> for ( MachineInstr * MI : Instrs ) { unsigned Opc = MI -> getOpcode ( ) ; if ( Opc == TargetOpcode :: LIFETIME_START || Opc == TargetOpcode :: LIFETIME_END ) continue ; bool Store = false ; if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg


<s> using use_iterator = MachineRegisterInfo :: use_nodbg_iterator ; using InstrSet = SmallSet < const MachineInstr * , <NUM_LIT> > ; InstrSet UIs ; use_iterator E = MRI -> use_nodbg_end ( ) ; for ( use_iterator I = MRI -> use_nodbg_begin ( R ) ; I != E ; ++ I ) UIs . insert ( I -> getParent ( ) ) ; unsigned C = UIs . size ( ) ; unsigned D = RemC [ R ] ; UseC [ R ] = ( C > D ) ? C - D : <NUM_LIT> ; } bool SelectAll0 = OptSelectAll0 , SelectHas0 = OptSelectHas0 ; if ( ! SelectAll0 && ! SelectHas0 ) SelectAll0 = true ; IFOrdering IFO ( UseC , BaseOrd ) ; for ( IFMapType :: iterator I = IFMap . begin ( ) ; I != End ; ++ I ) { IFListType & LL = I -> second ; if ( LL . empty ( ) ) continue ; IFListType :: iterator MinI = std :: min_element ( LL . begin ( ) , LL . end ( ) , IFO ) ; assert ( MinI != LL . end ( ) ) ; IFRecordWithRegSet M = * MinI ; LL . clear ( ) ; RegisterSet Us ; const MachineInstr * DefI = MRI -> getVRegDef ( I -> first ) ; getInstrUses ( DefI , Us ) ; bool Accept = false ; if ( SelectAll0 ) { bool All0 = true ; for ( unsigned R = Us . find_first ( ) ; R ; R = Us . find_next ( R ) ) { if ( UseC [ R ] == <NUM_LIT> ) continue ; All0 = false ; break ; } Accept = All0 ; } else if ( SelectHas0 )


<s> void <ISA_LIT>GenInsert :: buildOrderingMF ( RegisterOrdering & RO ) const { unsigned Index = <NUM_LIT> ; using mf_iterator = MachineFunction :: const_iterator ; for ( mf_iterator A = MFN -> begin ( ) , Z = MFN -> end ( ) ; A != Z ; ++ A ) { const MachineBasicBlock & B = * A ; if ( ! CMS -> BT . reached ( & B ) ) continue ; using mb_iterator = MachineBasicBlock :: const_iterator ; for ( mb_iterator I = B . begin ( ) , E = B . end ( ) ; I != E ; ++ I ) { const MachineInstr * MI = & * I ; for ( unsigned i = <NUM_LIT> , n = MI -> getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; if ( MO . isReg ( ) && MO .


<s> void <ISA_LIT>GenInsert :: getInstrDefs ( const MachineInstr * MI , RegisterSet & Defs ) const { for ( unsigned i = <NUM_LIT> , n = MI -> getNumOperands ( ) ; i < n ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg ( ) ; if ( ! R . isVirtual ( ) ) continue ; Defs . insert (


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; if ( ! MO . isReg ( ) || ! MO . isUse ( ) ) continue ; Register R = MO .


<s> std :: vector < MachineInstr * > Instrs ; for ( auto I = B -> rbegin ( ) , E = B -> rend ( ) ; I != E ; ++ I ) Instrs . push_back ( & * I ) ; for ( auto I = Instrs . begin ( ) , E = Instrs . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = * I ; unsigned Opc = MI -> getOpcode ( ) ; if ( Opc == TargetOpcode :: LIFETIME_START || Opc == TargetOpcode :: LIFETIME_END ) continue ; bool Store = false ; if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg ( ) ; if ( ! R . isVirtual ( ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R ) ; } if ( ! AllDead


<s> bool Changed = false ; for ( auto * DTN : children < MachineDomTreeNode * > ( N ) ) Changed |= removeDeadCode ( DTN ) ; MachineBasicBlock * B = N -> getBlock ( ) ; std :: vector < MachineInstr * > Instrs ; for ( auto I = B -> rbegin ( ) , E = B -> rend ( ) ; I != E ; ++ I ) Instrs . push_back ( & * I ) ; for ( auto I = Instrs . begin ( ) , E = Instrs . end ( ) ; I != E ; ++ I ) { MachineInstr * MI = * I ; unsigned Opc = MI -> getOpcode ( ) ; if ( Opc == TargetOpcode :: LIFETIME_START || Opc == TargetOpcode :: LIFETIME_END ) continue ; bool Store = false ; if ( MI -> isInlineAsm ( ) || ! MI -> isSafeToMove ( nullptr , Store ) ) continue ; bool AllDead = true ; SmallVector < unsigned , <NUM_LIT> > Regs ; for ( const MachineOperand & MO : MI -> operands ( ) ) { if ( ! MO . isReg ( ) || ! MO . isDef ( ) ) continue ; Register R = MO . getReg ( ) ; if ( ! R . isVirtual ( ) || ! MRI -> use_nodbg_empty ( R ) ) { AllDead = false ; break ; } Regs . push_back ( R