<s> Value >>= <NUM_LIT> ; case <STR_LIT> : unsigned Hi4 = ( Value & <NUM_LIT> ) >> <NUM_LIT> ; unsigned Lo12 = Value & <NUM_LIT> ; Value = ( Hi4 << <NUM_LIT> ) | ( Lo12 ) ; return Value ;


<s> void <ISA_LIT>AsmBackend :: applyFixup ( const MCFixup & Fixup , char * Data , unsigned DataSize , uint64_t Value , bool isPCRel ) const { unsigned NumBytes = <NUM_LIT> ; Value = adjustFixupValue ( Fixup , Value ) ;


<s> for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) {

Data [ Offset + i ] |= uint8_t ( ( Value >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) ;


<s> const uint8_t ABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ;

return new ELF<ISA_LIT>AsmBackend ( T , TT . getTriple ( ) , ABI ) ;


<s> ELF<ISA_LIT>AsmBackend ( const Target & T , const StringRef TT , uint8_t _OSABI ) : <ISA_LIT>AsmBackend ( T , TT ) , OSABI ( _OSABI ) {


<s> bool fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCRelaxableFragment * DF , const MCAsmLayout & Layout ) const override { return false ;


<s> const static MCFixupKindInfo Infos [ <STR_LIT> ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , } ; if ( Kind < FirstTargetFixupKind ) { return MCAsmBackend :: getFixupKindInfo ( Kind ) ; }

assert ( unsigned ( Kind - FirstTargetFixupKind ) < getNumFixupKinds ( ) && <STR_LIT> ) ;


<s> unsigned getNumFixupKinds ( ) const override { return <STR_LIT> ;


<s> unsigned getNumFixupKinds ( ) const override {


<s> unsigned getPointerSize ( ) const { return <NUM_LIT> ;


<s> <ISA_LIT>AsmBackend ( const Target & T , const StringRef TT ) : MCAsmBackend ( ) {


<s> <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_ARM , false ) {


<s> bool mayNeedRelaxation ( const MCInst & Inst ) const override {


<s> void <ISA_LIT>AsmBackend :: processFixupValue ( const MCAssembler & Asm , const MCAsmLayout & Layout , const MCFixup & Fixup , const MCFragment * DF , const MCValue & Target , uint64_t & Value , bool & IsResolved ) { IsResolved = true ;

( void ) adjustFixupValue ( Fixup , Value , & Asm . getContext ( ) ) ;


<s> void relaxInstruction ( const MCInst & Inst , MCInst & Res ) const override {


<s> bool writeNopData ( uint64_t Count , MCObjectWriter * OW ) const override { if ( Count == <NUM_LIT> ) { return true ; }


<s> MCInstLowering . Initialize ( Mang , & MF -> getContext ( ) ) ;


<s> OutStreamer -> EmitLabel ( CurrentFnSym ) ;


<s> void <ISA_LIT>AsmPrinter :: EmitInstruction ( const MachineInstr * MI ) {


<s> virtual const char * getPassName ( ) const { return <STR_LIT> ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) , MCInstLowering ( * this ) {


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>Target ) ;


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>Target ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ;

return createELFObjectWriter ( MOTW , OS , true ) ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_ARM , false ) {


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> void <ISA_LIT>FrameLowering :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { if ( I -> getOpcode ( ) == <STR_LIT> || I -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( I ) ;


<s> return ; } unsigned StackReg = <STR_LIT> ; unsigned OffsetReg = materializeOffset ( MF , MBB , MBBI , ( unsigned ) StackSize ) ; if ( OffsetReg ) {

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addReg ( OffsetReg ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> uint64_t StackSize = computeStackSize ( MF ) ; if ( ! StackSize ) { return ; } unsigned StackReg = <STR_LIT> ; unsigned OffsetReg = materializeOffset ( MF , MBB , MBBI , ( unsigned ) StackSize ) ; if ( OffsetReg ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addReg ( OffsetReg ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> <ISA_LIT>FrameLowering :: <ISA_LIT>FrameLowering ( ) : TargetFrameLowering ( TargetFrameLowering :: StackGrowsDown , <NUM_LIT> , <NUM_LIT> ) {


<s> return <NUM_LIT> ; } else { unsigned OffsetReg = <STR_LIT> ; unsigned OffsetLo = ( unsigned ) ( Offset & <NUM_LIT> ) ; unsigned OffsetHi = ( unsigned ) ( ( Offset & <NUM_LIT> ) >> <NUM_LIT> ) ; while ( OffsetLo ) { while ( OffsetHi && OffsetLo <= <NUM_LIT> ) { OffsetLo = OffsetLo << <NUM_LIT> ; OffsetHi = OffsetHi >> <NUM_LIT> ; } BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , OffsetReg ) . addReg ( OffsetReg ) . addImm ( OffsetLo ) . setMIFlag ( MachineInstr :: FrameSetup ) ; OffsetLo = OffsetHi ; OffsetHi = OffsetHi >> <NUM_LIT> ; if ( OffsetLo ) { for ( int i = <NUM_LIT> ; i < <NUM_LIT> ; i ++ ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , OffsetReg ) . addReg ( OffsetReg ) . addReg ( OffsetReg ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } }


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : llvm_unreachable ( <STR_LIT> ) ; return nullptr ; case <STR_LIT> : case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; }


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> printRegName ( O , Op1 . getReg ( ) ) ; unsigned Offset = Op2 . getImm ( ) ; O << <STR_LIT> << ( Offset / <NUM_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printAddrModeMemSrc ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) {

const MCOperand & Op1 = MI -> getOperand ( OpNum ) ;


<s> const MCOperand & Op = MI -> getOperand ( OpNum ) ; <STR_LIT> CC = ( <STR_LIT> ) Op . getImm ( ) ;

const char * Str = condCodeToString ( CC ) ;


<s> <STR_LIT> CC = ( <STR_LIT> ) Op . getImm ( ) ;


<s> const MCSymbolRefExpr * SRE ; if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) { SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( BE -> getRHS ( ) ) ; assert ( SRE && CE && <STR_LIT> ) ; Offset = CE -> getValue ( ) ; } else { SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ; assert ( SRE && <STR_LIT> ) ; } const MCSymbolRefExpr :: VariantKind Kind = SRE -> getKind ( ) ; assert ( Kind == MCSymbolRefExpr :: VK_None || Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_LO || Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_HI ) ; OS << SRE -> getSymbol ( ) ; if ( Offset ) { if ( Offset > <NUM_LIT> ) { OS << '+' ;


<s> printInstruction ( MI , O ) ; printAnnotation ( O , Annot ) ;


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot , const MCSubtargetInfo & STI ) {


<s> return ; } if ( Op . isImm ( ) ) { if ( getOpcodeName ( MI -> getOpcode ( ) ) == <STR_LIT> || getOpcodeName ( MI -> getOpcode ( ) ) == <STR_LIT> ) O << <STR_LIT> << MCInstPrinter :: formatHex ( Op . getImm ( ) ) ; else O << <STR_LIT> << Op . getImm ( ) ;


<s> } if ( Op . isImm ( ) ) { if ( getOpcodeName ( MI -> getOpcode ( ) ) == <STR_LIT> || getOpcodeName ( MI -> getOpcode ( ) ) == <STR_LIT> ) O << <STR_LIT> << MCInstPrinter :: formatHex ( Op . getImm ( ) ) ; else O << <STR_LIT> << Op . getImm ( ) ; return ; }

assert ( Op . isExpr ( ) && <STR_LIT> ) ;


<s> OS << StringRef ( getRegisterName ( RegNo ) ) . lower ( ) ;


<s> FBB = nullptr ; for ( MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock * TargetBB = MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( HasCondBranch ) { FBB = TargetBB ; } else { TBB = TargetBB ; } } else if ( MI . getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock * TargetBB = MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ; TBB = TargetBB ; Cond . push_back ( MI . getOperand ( <NUM_LIT> ) ) ; HasCondBranch = true ; } } return false ;


<s> void <ISA_LIT>InstrInfo :: anchor ( ) {


<s> const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const {


<s> NumInserted ++ ; } if ( Cond . empty ( ) || FBB ) { BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addMBB ( Cond . empty ( ) ? TBB : FBB ) ; NumInserted ++ ; } return NumInserted ;


<s> unsigned <ISA_LIT>InstrInfo :: isLoadFromStackSlot ( const MachineInstr * MI , int & FrameIndex ) const {


<s> unsigned <ISA_LIT>InstrInfo :: isStoreToStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { return <NUM_LIT> ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> ) , RI ( ) {


<s> BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FrameIndex ) . addImm ( <NUM_LIT> ) ;


<s> unsigned <ISA_LIT>InstrInfo :: RemoveBranch ( MachineBasicBlock & MBB ) const { if ( MBB . empty ( ) ) return <NUM_LIT> ; unsigned NumRemoved = <NUM_LIT> ; auto I = MBB . end ( ) ; do {


<s> unsigned Opc = I -> getOpcode ( ) ; if ( ( Opc == <STR_LIT> ) || ( Opc == <STR_LIT> ) ) { auto ToDelete = I ; ++ I ; MBB . erase ( ToDelete ) ; NumRemoved ++ ; } } while ( I != MBB . begin ( ) ) ;


<s> return new <ISA_LIT>DAGToDAGISel ( TM , OptLevel ) ;


<s> virtual const char * getPassName ( ) const {


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( TM , OptLevel ) , Subtarget ( * TM . getSubtargetImpl ( ) ) {


<s> switch ( N -> getOpcode ( ) ) { case <STR_LIT> : return SelectMoveImmediate ( N ) ; case <STR_LIT> : return SelectConditionalBranch ( N ) ; } return SelectCode ( N ) ;


<s> SDNode * <ISA_LIT>DAGToDAGISel :: Select ( SDNode * N ) { switch ( N -> getOpcode ( ) ) {


<s> if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { EVT PtrVT = getTargetLowering ( ) -> getPointerTy ( * TM . getDataLayout ( ) ) ; Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , PtrVT ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , Addr , <STR_LIT> ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) { return false ;


<s> EVT PtrVT = getTargetLowering ( ) -> getPointerTy ( * TM . getDataLayout ( ) ) ; Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , PtrVT ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , Addr , <STR_LIT> ) ; return true ; }

if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) {


<s> SDValue CompareOps [ ] = { LHS , RHS , Chain } ; SDNode * Compare = CurDAG -> getMachineNode ( <STR_LIT> , N , CompareVT , CompareOps ) ; CondCodeSDNode * CC = cast < CondCodeSDNode > ( Cond . getNode ( ) ) ;

SDValue CCVal = CurDAG -> getTargetConstant ( CC -> get ( ) , N , <STR_LIT> ) ;


<s> ConstantSDNode * ConstVal = cast < ConstantSDNode > ( N ) ; uint64_t ImmVal = ConstVal -> getZExtValue ( ) ; uint64_t SupportedMask = <NUM_LIT> ; if ( ( ImmVal & SupportedMask ) != ImmVal ) { return SelectCode ( N ) ; } uint64_t LoMask = <NUM_LIT> ; uint64_t HiMask = <NUM_LIT> ; uint64_t ImmLo = ( ImmVal & LoMask ) ; uint64_t ImmHi = ( ImmVal & HiMask ) ; SDValue ConstLo = CurDAG -> getTargetConstant ( ImmLo , N , <STR_LIT> ) ;

MachineSDNode * Move = CurDAG -> getMachineNode ( <STR_LIT> , N , <STR_LIT> , ConstLo ) ;


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , MF , RVLocs , Context ) ; if ( ! CCInfo . CheckReturn ( Outs , RetCC_<ISA_LIT> ) ) { return false ; } if ( CCInfo . getNextStackOffset ( ) != <NUM_LIT> && isVarArg ) { return false ;


<s> if ( ! CCInfo . CheckReturn ( Outs , RetCC_<ISA_LIT> ) ) { return false ; } if ( CCInfo . getNextStackOffset ( ) != <NUM_LIT> && isVarArg ) {


<s> default : return NULL ; case <STR_LIT> : return <STR_LIT> ;


<s> return NULL ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> addRegisterClass ( <STR_LIT> , & <STR_LIT> ) ; computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ; setStackPointerRegisterToSaveRestore ( <STR_LIT> ) ; setSchedulingPreference ( Sched :: Source ) ;

setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ;


<s> <ISA_LIT>TargetLowering :: <ISA_LIT>TargetLowering ( <ISA_LIT>TargetMachine & <ISA_LIT>TM ) : TargetLowering ( <ISA_LIT>TM ) , Subtarget ( * <ISA_LIT>TM . getSubtargetImpl ( ) ) { addRegisterClass ( <STR_LIT> , & <STR_LIT> ) ; computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ; setStackPointerRegisterToSaveRestore ( <STR_LIT> ) ; setSchedulingPreference ( Sched :: Source ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ;

setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ; assert ( G && <STR_LIT> ) ; EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; Callee = DAG . getGlobalAddress ( G -> getGlobal ( ) , Loc , PtrVT , <NUM_LIT> ) ; std :: vector < SDValue > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( auto & Reg : RegsToPass ) { Ops . push_back ( DAG . getRegister ( Reg . first , Reg . second . getValueType ( ) ) ) ; } const uint32_t * Mask ; const TargetRegisterInfo * TRI = DAG . getSubtarget ( ) . getRegisterInfo ( ) ; Mask = TRI -> getCallPreservedMask ( DAG . getMachineFunction ( ) , CallConv ) ; assert ( Mask && <STR_LIT> ) ; Ops . push_back ( DAG . getRegisterMask ( Mask ) ) ; if ( InFlag . getNode ( ) ) { Ops . push_back ( InFlag ) ; } SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; Chain = DAG . getNode ( <STR_LIT> , Loc , NodeTys , Ops ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; Chain = DAG . getCALLSEQ_END ( Chain , DAG . getIntPtrConstant ( NumBytes , Loc , true ) , DAG . getIntPtrConstant ( <NUM_LIT> , Loc , true ) , InFlag , Loc ) ; if ( ! Ins . empty ( ) ) { InFlag = Chain . getValue ( <NUM_LIT> ) ;


<s> CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( auto & Loc : RVLocs ) { Chain = DAG . getCopyFromReg ( Chain , dl , Loc . getLocReg ( ) , Loc . getValVT ( ) , InGlue ) . getValue ( <NUM_LIT> ) ; InGlue = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ; }


<s> EVT RegVT = VA . getLocVT ( ) ; assert ( RegVT . getSimpleVT ( ) . SimpleTy == <STR_LIT> && <STR_LIT> ) ; const unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgIn = DAG . getCopyFromReg ( Chain , dl , VReg , RegVT ) ; InVals . push_back ( ArgIn ) ; continue ; } assert ( VA . isMemLoc ( ) && <STR_LIT> ) ; const unsigned Offset = VA . getLocMemOffset ( ) ; const int FI = MF . getFrameInfo ( ) -> CreateFixedObject ( <NUM_LIT> , Offset , true ) ; EVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue FIPtr = DAG . getFrameIndex ( FI , PtrTy ) ;

assert ( VA . getValVT ( ) == <STR_LIT> && <STR_LIT> ) ;


<s> continue ; } assert ( VA . isMemLoc ( ) && <STR_LIT> ) ; const unsigned Offset = VA . getLocMemOffset ( ) ; const int FI = MF . getFrameInfo ( ) -> CreateFixedObject ( <NUM_LIT> , Offset , true ) ; EVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) ; SDValue FIPtr = DAG . getFrameIndex ( FI , PtrTy ) ; assert ( VA . getValVT ( ) == <STR_LIT> && <STR_LIT> ) ; SDValue Load = DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIPtr , MachinePointerInfo ( ) , false , false , false , <NUM_LIT> ) ; InVals . push_back ( Load ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { EVT VT = Op . getValueType ( ) ; GlobalAddressSDNode * GlobalAddr = cast < GlobalAddressSDNode > ( Op . getNode ( ) ) ; SDValue TargetAddr = DAG . getTargetGlobalAddress ( GlobalAddr -> getGlobal ( ) , Op , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , Op , VT , TargetAddr ) ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ; }


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , RetCC_<ISA_LIT> ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i < e ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) { RetOps . push_back ( Flag ) ;


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> <ISA_LIT>MCAsmInfo :: <ISA_LIT>MCAsmInfo ( const Triple & TT ) { SupportsDebugInformation = true ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <NUM_LIT> ; ZeroDirective = <STR_LIT> ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx ) ;


<s> void EmitByte ( unsigned char C , raw_ostream & OS ) const {


<s> void EmitConstant ( uint64_t Val , unsigned Size , raw_ostream & OS ) const { for ( unsigned i = <NUM_LIT> ; i != Size ; ++ i ) { EmitByte ( Val & <NUM_LIT> , OS ) ; Val >>= <NUM_LIT> ;


<s> if ( Desc . getSize ( ) != <NUM_LIT> ) { llvm_unreachable ( <STR_LIT> ) ; } const uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ;

EmitConstant ( Binary , Desc . getSize ( ) , OS ) ;


<s> void <ISA_LIT>MCCodeEmitter :: encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; if ( Desc . getSize ( ) != <NUM_LIT> ) {


<s> return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; } if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCExpr :: ExprKind Kind = Expr -> getKind ( ) ;


<s> } assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCExpr :: ExprKind Kind = Expr -> getKind ( ) ; if ( Kind == MCExpr :: Binary ) { Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ; Kind = Expr -> getKind ( ) ; } assert ( Kind == MCExpr :: SymbolRef ) ; unsigned FixupKind ;

switch ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) ) {


<s> assert ( ImmMO . getImm ( ) >= <NUM_LIT> ) ; Bits |= ( getMachineOpValue ( MI , RegMO , Fixups , STI ) << <NUM_LIT> ) ; Bits |= ( unsigned ) ImmMO . getImm ( ) & <NUM_LIT> ;


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , MCContext & ctx ) : MCII ( mcii ) , CTX ( ctx ) {


<s> void <ISA_LIT>MCInstLower :: Initialize ( Mangler * M , MCContext * C ) { Mang = M ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( class AsmPrinter & asmprinter ) : Printer ( asmprinter ) {


<s> void <ISA_LIT>MCInstLower :: Lower ( const MachineInstr * MI , MCInst & OutMI ) const { OutMI . setOpcode ( MI -> getOpcode ( ) ) ;

for ( auto & MO : MI -> operands ( ) ) {


<s> if ( MO . isImplicit ( ) ) { break ; } return MCOperand :: createReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_BlockAddress : return LowerSymbolOperand ( MO , MOTy , offset ) ; case MachineOperand :: MO_RegisterMask : break ; }


<s> case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) { break ; } return MCOperand :: createReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock :

case MachineOperand :: MO_GlobalAddress :


<s> Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_BlockAddress : Symbol = Printer . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_ExternalSymbol : Symbol = Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_JumpTableIndex : Symbol = Printer . GetJTISymbol ( MO . getIndex ( ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : Symbol = Printer . GetCPISymbol ( MO . getIndex ( ) ) ; Offset += MO . getOffset ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; }

const unsigned Option = MO . getTargetFlags ( ) & <STR_LIT> ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TT ) { return new <ISA_LIT>MCAsmInfo ( TT ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & TT , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) {

return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ; return X ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> static const uint16_t CalleeSavedRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <NUM_LIT> } ; return CalleeSavedRegs ;


<s> static const uint16_t CalleeSavedRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <NUM_LIT> } ;


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { return <STR_LIT> ;


<s> BitVector <ISA_LIT>RegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; return Reserved ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) {


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const { return true ;


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const { return true ;


<s> bool <ISA_LIT>RegisterInfo :: useFPForScavengingIndex ( const MachineFunction & MF ) const { return false ;


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> void <ISA_LIT>Subtarget :: anchor ( ) {


<s> const <ISA_LIT>FrameLowering * getFrameLowering ( ) const override { return & FrameLowering ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override {


<s> const InstrItineraryData * getInstrItineraryData ( ) const override { return & InstrItins ;


<s> const <ISA_LIT>RegisterInfo * getRegisterInfo ( ) const override {

return & InstrInfo . getRegisterInfo ( ) ;


<s> const <ISA_LIT>SelectionDAGInfo * getSelectionDAGInfo ( ) const override {


<s> const <ISA_LIT>TargetLowering * getTargetLowering ( ) const override {


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , StringRef CPU , StringRef FS , <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( ) , TLInfo ( TM ) , TSInfo ( ) , FrameLowering ( ) {


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) {


<s> bool <ISA_LIT>PassConfig :: addPreISel ( ) {


<s> static std :: string computeDataLayout ( const Triple & TT , StringRef CPU , const TargetOptions & Options ) { return <STR_LIT> ;


<s> return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const {

return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> virtual const TargetSubtargetInfo * getSubtargetImpl ( const Function & ) const override {


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options ) , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS , * this ) , TLOF ( make_unique < TargetLoweringObjectFileELF > ( ) ) {


<s> void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>TargetMachine > X ( The<ISA_LIT>Target ) ;