<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> BitVector <ISA_LIT>RegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;


<s> bool <ISA_LIT>RegisterInfo :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return MFI -> getStackSize ( ) && needsFP ( MF ) ;


<s> static bool needsFP ( const MachineFunction & MF ) { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> void <ISA_LIT>RegisterInfo :: processFunctionBeforeCalleeSavedScan ( MachineFunction & MF , RegScavenger * RS ) const { MF . getRegInfo ( ) . setPhysRegUnused ( <STR_LIT> ) ; MF . getRegInfo ( ) . setPhysRegUnused ( <STR_LIT> ) ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & subtarget , const TargetInstrInfo & tii ) :

<ISA_LIT>GenRegisterInfo ( <STR_LIT> , <STR_LIT> ) , Subtarget ( subtarget ) , TII ( tii ) {


<s> MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } MachineOperand & SPOp = MI . getOperand ( i ) ; int FrameIndex = SPOp . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) ; unsigned OpNo = <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) OpNo = <NUM_LIT> ; MachineOperand & MO = MI . getOperand ( OpNo ) ; Offset += MO . getImm ( ) + MFI -> getStackSize ( ) + <ISA_LIT>FrameInfo :: minStackSize ( ) ; assert ( ( Offset & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; SPOp . ChangeToRegister ( <STR_LIT> , false ) ; if ( Offset > <ISA_LIT>FrameInfo :: maxFrameOffset ( ) || Offset < <ISA_LIT>FrameInfo :: minFrameOffset ( ) ) { cerr << <STR_LIT> << Offset << <STR_LIT> ; } else { MO . ChangeToImmediate ( Offset ) ;


<s> unsigned i = <NUM_LIT> ; MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } MachineOperand & SPOp = MI . getOperand ( i ) ; int FrameIndex = SPOp . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) ; unsigned OpNo = <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) OpNo = <NUM_LIT> ; MachineOperand & MO = MI . getOperand ( OpNo ) ; Offset += MO . getImm ( ) + MFI -> getStackSize ( ) + <ISA_LIT>FrameInfo :: minStackSize ( ) ; assert ( ( Offset & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; SPOp . ChangeToRegister ( <STR_LIT> , false ) ; if ( Offset > <ISA_LIT>FrameInfo :: maxFrameOffset ( ) || Offset < <ISA_LIT>FrameInfo :: minFrameOffset ( ) ) {

cerr << <STR_LIT> << Offset << <STR_LIT> ;


<s> MachineBasicBlock & MBB = MF . front ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; MachineModuleInfo * MMI = MFI -> getMachineModuleInfo ( ) ; DebugLoc dl = ( MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc :: getUnknownLoc ( ) ) ; bool hasDebugInfo = MMI && MMI -> hasDebugInfo ( ) ; unsigned FrameLabelId = <NUM_LIT> ; MBBI = MBB . begin ( ) ; determineFrameLayout ( MF ) ; int FrameSize = MFI -> getStackSize ( ) ; assert ( ( FrameSize & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; if ( FrameSize > <NUM_LIT> || MFI -> hasCalls ( ) ) { FrameSize = - ( FrameSize + <ISA_LIT>FrameInfo :: minStackSize ( ) ) ; if ( hasDebugInfo ) { FrameLabelId = MMI -> NextLabelID ( ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addImm ( FrameLabelId ) ; } BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( <NUM_LIT> ) . addReg ( <STR_LIT> ) ; if ( isS10Constant ( FrameSize ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FrameSize ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( FrameSize ) ; } else if ( FrameSize <= ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> && FrameSize >= - ( <NUM_LIT> << <NUM_LIT> ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( - <NUM_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FrameSize ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; } else {


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( MachineFunction & MF ) const {


<s> ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } MachineOperand & SPOp = MI . getOperand ( i ) ; int FrameIndex = SPOp . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) ; unsigned OpNo = <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) OpNo = <NUM_LIT> ; MachineOperand & MO = MI . getOperand ( OpNo ) ; Offset += MO . getImm ( ) + MFI -> getStackSize ( ) + <ISA_LIT>FrameInfo :: minStackSize ( ) ;

assert ( ( Offset & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ;


<s> void <ISA_LIT>RegisterInfo :: eliminateFrameIndex ( MachineBasicBlock :: iterator II , int SPAdj , RegScavenger * RS ) const { unsigned i = <NUM_LIT> ; MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; DebugLoc dl = II -> getDebugLoc ( ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } MachineOperand & SPOp = MI . getOperand ( i ) ; int FrameIndex = SPOp . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) ;


<s> return DisableFramePointerElim ( MF ) || MFI -> hasVarSizedObjects ( ) ;


<s> virtual bool trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const {


<s> assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } MachineOperand & SPOp = MI . getOperand ( i ) ; int FrameIndex = SPOp . getIndex ( ) ; int Offset = MFI -> getObjectOffset ( FrameIndex ) ; unsigned OpNo = <NUM_LIT> ; if ( MI . getOpcode ( ) == <STR_LIT> || MI . getOpcode ( ) == <STR_LIT> ) OpNo = <NUM_LIT> ; MachineOperand & MO = MI . getOperand ( OpNo ) ; Offset += MO . getImm ( ) + MFI -> getStackSize ( ) + <ISA_LIT>FrameInfo :: minStackSize ( ) ; assert ( ( Offset & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; SPOp . ChangeToRegister ( <STR_LIT> , false ) ; if ( Offset > <ISA_LIT>FrameInfo :: maxFrameOffset ( ) || Offset < <ISA_LIT>FrameInfo :: minFrameOffset ( ) ) { errs ( ) << <STR_LIT> << Offset << <STR_LIT> ;


<s> DebugLoc dl = MBBI -> getDebugLoc ( ) ; assert ( MBBI -> getOpcode ( ) == <STR_LIT> && <STR_LIT> ) ; assert ( ( FrameSize & <NUM_LIT> ) == <NUM_LIT> && <STR_LIT> ) ; if ( FrameSize > <NUM_LIT> || MFI -> hasCalls ( ) ) { FrameSize = FrameSize + <ISA_LIT>FrameInfo :: minStackSize ( ) ; if ( isS10Constant ( FrameSize + LinkSlotOffset ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FrameSize + LinkSlotOffset ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( FrameSize ) ; } else if ( FrameSize <= ( <NUM_LIT> << <NUM_LIT> ) - <NUM_LIT> && FrameSize >= - ( <NUM_LIT> << <NUM_LIT> ) ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( <NUM_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( FrameSize ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( <NUM_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; } else { cerr << <STR_LIT> << FrameSize << <STR_LIT> ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ; } else { cerr << <STR_LIT> << FrameSize << <STR_LIT> ; abort ( ) ; } if ( hasDebugInfo ) { std :: vector < MachineMove > & Moves = MMI -> getFrameMoves ( ) ; MachineLocation SPDst ( MachineLocation :: VirtualFP ) ; MachineLocation SPSrc ( MachineLocation :: VirtualFP , - FrameSize ) ; Moves . push_back ( MachineMove ( FrameLabelId , SPDst , SPSrc ) ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; for ( unsigned I = <NUM_LIT> , E = CSI . size ( ) ; I != E ; ++ I ) { int Offset = MFI -> getObjectOffset ( CSI [ I ] . getFrameIdx ( ) ) ; unsigned Reg = CSI [ I ] . getReg ( ) ; if ( Reg == <STR_LIT> ) continue ; MachineLocation CSDst ( MachineLocation :: VirtualFP , Offset ) ; MachineLocation CSSrc ( Reg ) ; Moves . push_back ( MachineMove ( FrameLabelId , CSDst , CSSrc ) ) ; } unsigned ReadyLabelId = MMI -> NextLabelID ( ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) ) . addImm ( ReadyLabelId ) ; MachineLocation FPDst ( <STR_LIT> ) ; MachineLocation FPSrc ( MachineLocation :: VirtualFP ) ; Moves . push_back ( MachineMove ( ReadyLabelId , FPDst , FPSrc ) ) ;


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ;


<s> virtual bool requiresRegisterScavenging ( const MachineFunction & MF ) const { return true ;


<s> virtual bool requiresRegisterScavenging ( const MachineFunction & MF ) const {


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( const <ISA_LIT>TargetMachine & TM ) : TargetSelectionDAGInfo ( TM ) {


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ;

return OptLevel >= CodeGenOpt :: Default ;


<s> Mode = TargetSubtargetInfo :: ANTIDEP_CRITICAL ; CriticalPathRCs . clear ( ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ; CriticalPathRCs . push_back ( & <STR_LIT> ) ;


<s> void <ISA_LIT>Subtarget :: SetJITMode ( ) {


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const std :: string & TT , const std :: string & CPU , const std :: string & FS ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , StackAlignment ( <NUM_LIT> ) , ProcDirective ( <STR_LIT> ) , UseLargeMem ( false ) { std :: string default_cpu ( <STR_LIT> ) ;

ParseSubtargetFeatures ( default_cpu , FS ) ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const std :: string & TT , const std :: string & FS ) :

StackAlignment ( <NUM_LIT> ) , ProcDirective ( <STR_LIT> ) , UseLargeMem ( false ) {


<s> const char * getDataLayoutString ( ) const { return <STR_LIT> <STR_LIT> <STR_LIT> ;


<s> TM ( tm ) , StackAlignment ( <NUM_LIT> ) , ProcDirective ( <STR_LIT> ) , UseLargeMem ( false ) { std :: string default_cpu ( <STR_LIT> ) ; ParseSubtargetFeatures ( FS , default_cpu ) ;


<s> const InstrItineraryData & getInstrItineraryData ( ) const {


<s> return TargetAsmInfo :: PreferredEHDataFormat ( Reason , Global ) ;


<s> DwarfAbbrevSection = <STR_LIT> ; DwarfInfoSection = <STR_LIT> ; DwarfLineSection = <STR_LIT> ; DwarfFrameSection = <STR_LIT> ; DwarfPubNamesSection = <STR_LIT> ; DwarfPubTypesSection = <STR_LIT> ; DwarfStrSection = <STR_LIT> ; DwarfLocSection = <STR_LIT> ; DwarfARangesSection = <STR_LIT> ; DwarfRangesSection = <STR_LIT> ; DwarfMacInfoSection = <STR_LIT> ; SupportsExceptionHandling = false ;


<s> BaseTAI :: AlignmentIsInBytes = false ; BaseTAI :: LCOMMDirective = <STR_LIT> ;


<s> GlobalPrefix = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; HasLEB128 = true ; HasDotLocAndDotFile = true ; SupportsDebugInformation = true ;


<s> bool <ISA_LIT>TargetMachine :: addAssemblyEmitter ( PassManagerBase & PM , bool Fast , raw_ostream & Out ) {

PM . add ( create<ISA_LIT>AsmPrinterPass ( Out , * this , Fast ) ) ;


<s> bool <ISA_LIT>TargetMachine :: addInstSelector ( PassManagerBase & PM , bool Fast ) { PM . add ( create<ISA_LIT>ISelDag ( * this ) ) ;


<s> const TargetAsmInfo * <ISA_LIT>TargetMachine :: createTargetAsmInfo ( ) const {

return new <ISA_LIT>LinuxTargetAsmInfo ( * this ) ;


<s> if ( ( TT . size ( ) == <NUM_LIT> && std :: string ( TT . begin ( ) , TT . begin ( ) + <NUM_LIT> ) == <STR_LIT> ) || ( TT . size ( ) == <NUM_LIT> && std :: string ( TT . begin ( ) , TT . begin ( ) + <NUM_LIT> ) == <STR_LIT> ) || ( TT . size ( ) >= <NUM_LIT> && std :: string ( TT . begin ( ) , TT . begin ( ) + <NUM_LIT> ) == <STR_LIT> ) || ( TT . size ( ) >= <NUM_LIT> && std :: string ( TT . begin ( ) , TT . begin ( ) + <NUM_LIT> ) == <STR_LIT> ) ) return <NUM_LIT> ; return <NUM_LIT> ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Module & M , const std :: string & FS ) : Subtarget ( * this , M , FS ) , DataLayout ( Subtarget . getTargetDataString ( ) ) , InstrInfo ( * this ) , FrameInfo ( * this ) , TLInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) { setRelocationModel ( Reloc :: Static ) ;


<s> addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ; return false ;


<s> if ( schedulerCreator != NULL ) addPass ( schedulerCreator ( <STR_LIT> ) ) ; addPass ( create<ISA_LIT>NopFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> if ( schedulerCreator != NULL ) addPass ( schedulerCreator ( <STR_LIT> ) ) ;

addPass ( create<ISA_LIT>NopFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PM ) {

return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const {

return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DataLayout ( Subtarget . getTargetDataString ( ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> BuilderFunc schedulerCreator = ( BuilderFunc ) ( intptr_t ) sys :: DynamicLibrary :: SearchForAddressOfSymbol ( <STR_LIT> ) ; if ( schedulerCreator != NULL ) PM . add ( schedulerCreator ( <STR_LIT> ) ) ;

PM . add ( create<ISA_LIT>NopFillerPass ( * this ) ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , Reloc :: Model RM , CodeModel :: Model CM ) : LLVMTargetMachine ( T , TT , CPU , FS , RM , CM ) , Subtarget ( TT , CPU , FS ) , DataLayout ( Subtarget . getTargetDataString ( ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> PM . add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


PM . add ( create<ISA_LIT>NopFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> bool <ISA_LIT>PassConfig :: addPreEmitPass ( ) { typedef llvm :: FunctionPass * ( * BuilderFunc ) ( const char * ) ; BuilderFunc schedulerCreator = ( BuilderFunc ) ( intptr_t ) sys :: DynamicLibrary :: SearchForAddressOfSymbol ( <STR_LIT> ) ;

if ( schedulerCreator != NULL ) PM . add ( schedulerCreator ( <STR_LIT> ) ) ;


<s> bool <ISA_LIT>TargetMachine :: addInstSelector ( PassManagerBase & PM ) {

PM . add ( create<ISA_LIT>ISelDag ( * this ) ) ;


<s> addPreEmitPass ( PassManagerBase & PM ) { typedef llvm :: FunctionPass * ( * BuilderFunc ) ( const char * ) ;

BuilderFunc schedulerCreator = ( BuilderFunc ) ( intptr_t ) sys :: DynamicLibrary :: SearchForAddressOfSymbol ( <STR_LIT> ) ;


<s> typedef llvm :: FunctionPass * ( * BuilderFunc ) ( const char * ) ; BuilderFunc schedulerCreator = ( BuilderFunc ) ( intptr_t ) sys :: DynamicLibrary :: SearchForAddressOfSymbol ( <STR_LIT> ) ; if ( schedulerCreator != NULL ) PM . add ( schedulerCreator ( <STR_LIT> ) ) ; PM . add ( create<ISA_LIT>NopFillerPass ( * this ) ) ;


<s> const std :: pair < unsigned , int > * <ISA_LIT>FrameLowering :: getCalleeSaveSpillSlots ( unsigned & NumEntries ) const { NumEntries = <NUM_LIT> ;


<s> virtual const InstrItineraryData * getInstrItineraryData ( ) const {


<s> virtual TargetJITInfo * getJITInfo ( ) { return NULL ;


<s> return & InstrInfo . getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>RegisterInfo * getRegisterInfo ( ) const { return & InstrInfo . getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>SelectionDAGInfo * getSelectionDAGInfo ( ) const {


<s> virtual const <ISA_LIT>Subtarget * getSubtargetImpl ( ) const { return & Subtarget ;


<s> virtual const <ISA_LIT>TargetLowering * getTargetLowering ( ) const {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DataLayout ( Subtarget . getTargetDataString ( ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {


<s> RegisterAsmInfo < <ISA_LIT>LinuxTargetAsmInfo > Y ( TheCell<ISA_LIT>Target ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS ) , DL ( Subtarget . getDataLayoutString ( ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) , STTI ( & TLInfo ) , VTTI ( & TLInfo ) {


<s> PM . add ( create<ISA_LIT>AsmPrinterPass ( Out , * this , OptLevel , Verbose ) ) ;


<s> PM . add ( create<ISA_LIT>NopFillerPass ( * this ) ) ; return true ;


<s> virtual const VectorTargetTransformInfo * getVectorTargetTransformInfo ( ) const {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const std :: string & TT , const std :: string & FS ) : LLVMTargetMachine ( T , TT ) , Subtarget ( TT , FS ) , DataLayout ( Subtarget . getTargetDataString ( ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) , InstrItins ( Subtarget . getInstrItineraryData ( ) ) {

setRelocationModel ( Reloc :: Static ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { PM -> add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) { PM -> add ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) ) ) ; return false ;


<s> bool <ISA_LIT>PassConfig :: addPreEmitPass ( ) { typedef llvm :: FunctionPass * ( * BuilderFunc ) ( const char * ) ; BuilderFunc schedulerCreator = ( BuilderFunc ) ( intptr_t ) sys :: DynamicLibrary :: SearchForAddressOfSymbol ( <STR_LIT> ) ; if ( schedulerCreator != NULL ) PM -> add ( schedulerCreator ( <STR_LIT> ) ) ; PM -> add ( create<ISA_LIT>NopFillerPass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> bool <ISA_LIT>TargetMachine :: addInstSelector ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( create<ISA_LIT>ISelDag ( * this ) ) ;


<s> const std :: pair < unsigned , int > * <ISA_LIT>FrameInfo :: getCalleeSaveSpillSlots ( unsigned & NumEntries ) const { NumEntries = <NUM_LIT> ;