ground_truth: <s> virtual void EmitInstruction ( const MachineInstr * MI ) { SmallString < 128 > Str ; raw_svector_ostream OS ( Str ) ; printInstruction ( MI , OS ) ; OutStreamer . EmitRawText ( OS . str ( ) ) ; } </s>

natrual_language: EmitInstruction - This callback is invoked when an instruction is emitted , to advance the hazard state .

File: ARCompactAsmPrinter

Func: EmitInstruction

Target: ARCompact

Target_Clf: MPU

Compiler_Type: LLVM


ground_truth:
<s>
virtual
const
char
*
getPassName
(
)
const
{
return
"ARCompact Assembly Printer"
;
}
</s>

natrual_language: getPassName - Return a nice clean name for a pass .

TS_V_token:
ARCompact
"ARCompact Assembly Printer"

Func: getPassName


ground_truth: "Can only put epilogue before a return instruction!"

natrual_language: Insert epilog code into the function .

File: ARCompactFrameLowering

Func: emitEpilogue


ground_truth:
<s>
void
ARCompactFrameLowering
::
emitPrologue
(
MachineFunction
&
MF
)
const
{
MachineBasicBlock
&
MBB
=
MF
.
front
(
)
;
MachineBasicBlock
::
iterator
MBBI
=
MBB
.
begin
(
)
;
MachineFrameInfo
*
MFI
=
MF
.
getFrameInfo
(
)
;
ARCompactFunctionInfo
*
AFI
=
MF
.
getInfo
<
ARCompactFunctionInfo
>
(
)
;
const
ARCompactInstrInfo
&
TII
=
*
static_cast
<
const
ARCompactInstrInfo
*
>
(
MF
.
getTarget
(
)
.
getInstrInfo
(
)
)
;
DebugLoc
dl
=
MBBI
!=
MBB
.
end
(
)
MBBI
->
getDebugLoc
(
)
:
DebugLoc
(
)
;
EmitComment
(
MBB
,
MBBI
,
dl
,
TII
,
"PROLOGUE START"
)
;
unsigned
int
NumBytes
=
MFI
->
getStackSize
(
)
;
NumBytes
=
(
NumBytes
+
3
)
&
~
3
;
unsigned
VARegSaveSize
=
AFI
->
getVarArgsRegSaveSize
(
)
;
if
(
VARegSaveSize
)
{
BuildMI
(
MBB
,
MBBI
,
dl
,
TII
.
get
(
ARC
::
SUBrsi
)
,
ARC
::
SP
)
.
addReg
(
ARC
::
SP
)
.
addImm
(
VARegSaveSize
)
;
}
if
(
MFI
->
adjustsStack
(
)
)
{
BuildMI
(
MBB
,
MBBI
,
dl
,
TII
.
get
(
ARC
::
STrri_a
)
)
.
addReg
(
ARC
::
SP
)
.
addImm
(
UNITS_PER_WORD
)
.
addReg
(
ARC
::
BLINK
)
;
}
BuildMI
(
MBB
,
MBBI
,
dl
,
TII
.
get
(
ARC
::
STrri_a
)
)
.
addReg
(
ARC
::
SP
)
.
addImm
(
UNITS_PER_WORD
)
.
addReg
(
ARC
::
FP
)
;
BuildMI
(
MBB
,
MBBI
,
dl
,
TII
.
get
(
ARC
::
MOVrr
)
,
ARC
::
FP
)
.
addReg
(
ARC
::
SP
)
;
if
(
NumBytes
>
0
)
{
assert
(
(
NumBytes
&
0x3
)
==
0
)
;
BuildMI
(
MBB
,
MBBI
,
dl
,
TII
.
get
(
ARC
::
SUBrsi
)
,
ARC
::
SP
)
.
addReg
(
ARC
::
SP
)
.
addImm
(
NumBytes
)
;
}
EmitComment
(
MBB
,
MBBI
,
dl
,
TII
,
"PROLOGUE END"
)
;
}
</s>

natrual_language: emitProlog/emitEpilog - These methods insert prolog and epilog code into the function .

TS_V_token:
ARCompact
ARC
ARC
ARC
ARC
ARC
"PROLOGUE START"
3
3
ARC::SUBrsi
ARC::SP
ARC::SP
ARC::STrri_a
ARC::SP
ARC::BLINK
ARC::STrri_a
ARC::SP
ARC::FP
ARC::MOVrr
ARC::FP
ARC::SP
0
0x3
0
ARC::SUBrsi
ARC::SP
ARC::SP
"PROLOGUE END"

Func: emitPrologue


ground_truth: <s> bool ARCompactFrameLowering :: hasFP ( const MachineFunction & MF ) const { return ( DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ) ; } </s>

natrual_language: hasFP - Return true if the specified function should have a dedicated frame pointer register .

TS_V_token: ARCompact ARC

Func: hasFP


ground_truth: <s> void ARCompactInstrInfo :: copyPhysReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , DebugLoc DL , unsigned int DestReg , unsigned int SrcReg , bool KillSrc ) const { BuildMI ( MBB , I , DL , get ( ARC :: MOVrr ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ; } </s>

natrual_language: } Branch Analysis & Modification

TS_V_token: ARCompact ARC ARC::MOVrr

File: ARCompactInstrInfo

Func: copyPhysReg


ground_truth: <s> virtual const ARCompactRegisterInfo & getRegisterInfo ( ) const { return RI ; } </s>

natrual_language: getRegisterInfo - TargetInstrInfo is a superset of MRegister info .

Func: getRegisterInfo


ground_truth: <s> bool ARCompactInstrInfo :: isPredicable ( MachineInstr * MI ) const { if ( ! MI -> getDesc ( ) . isPredicable ( ) ) { return false ; } if ( MI -> getOperand ( 0 ) . getReg ( ) != MI -> getOperand ( 1 ) . getReg ( ) ) { return false ; } return true ; } </s>

natrual_language: Return true if the specified instruction can be predicated .

Func: isPredicable


ground_truth: <s> bool ARCompactInstrInfo :: isProfitableToIfCvt ( MachineBasicBlock & TMBB , unsigned TCycles , unsigned TExtra , MachineBasicBlock & FMBB , unsigned FCycles , unsigned FExtra , const BranchProbability & Probability ) const { if ( ! TCycles || ! FCycles ) { return false ; } unsigned TUnpredCost = Probability . getNumerator ( ) * TCycles ; TUnpredCost /= Probability . getDenominator ( ) ; uint32_t Comp = Probability . getDenominator ( ) - Probability . getNumerator ( ) ; unsigned FUnpredCost = Comp * FCycles ; FUnpredCost /= Probability . getDenominator ( ) ; unsigned UnpredCost = TUnpredCost + FUnpredCost ; UnpredCost += 1 ; UnpredCost += 10 / 10 ; return ( TCycles + FCycles + TExtra + FExtra ) <= UnpredCost ; } </s>

natrual_language: Second variant of isProfitableToIfCvt .

Func: isProfitableToIfCvt


ground_truth: <s> void ARCompactInstrInfo :: loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , unsigned DestReg , int FrameIdx , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; BuildMI ( MBB , MI , DL , get ( ARC :: LDrli ) ) . addReg ( DestReg ) . addFrameIndex ( FrameIdx ) . addImm ( 0 ) ; } </s>

natrual_language: Load the specified register of the given register class from the specified stack frame index .

TS_V_token: ARCompact ARC ARC::LDrli 0

Func: loadRegFromStackSlot


ground_truth: <s> bool ARCompactInstrInfo :: PredicateInstruction ( MachineInstr * MI , const SmallVectorImpl < MachineOperand > & Pred ) const { int PIdx = MI -> findFirstPredOperandIdx ( ) ; if ( PIdx != - 1 ) { MachineOperand & PMO = MI -> getOperand ( PIdx ) ; PMO . setImm ( Pred [ 0 ] . getImm ( ) ) ; return true ; } return false ; } </s>

natrual_language: Convert the instruction into a predicated instruction .

Func: PredicateInstruction


ground_truth: <s> void ARCompactInstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , unsigned SrcReg , bool isKill , int FrameIdx , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { DebugLoc DL ; if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ; BuildMI ( MBB , MI , DL , get ( ARC :: STrri ) ) . addFrameIndex ( FrameIdx ) . addImm ( 0 ) . addReg ( SrcReg , getKillRegState ( isKill ) ) ; } </s>

natrual_language: Store the specified register of the given register class to the specified stack frame index .

TS_V_token: ARCompact ARC ARC::STrri 0

Func: storeRegToStackSlot


ground_truth: <s> bool ARCompactInstrInfo :: SubsumesPredicate ( const SmallVectorImpl < MachineOperand > & Pred1 , const SmallVectorImpl < MachineOperand > & Pred2 ) const { if ( Pred1 . size ( ) > 2 || Pred2 . size ( ) > 2 ) { return false ; } ARCCC :: CondCodes CC1 = ( ARCCC :: CondCodes ) Pred1 [ 0 ] . getImm ( ) ; ARCCC :: CondCodes CC2 = ( ARCCC :: CondCodes ) Pred2 [ 0 ] . getImm ( ) ; if ( CC1 == CC2 ) { return true ; } switch ( CC1 ) { case ARCCC :: COND_AL : return true ; case ARCCC :: COND_HS : return CC2 == ARCCC :: COND_HI ; case ARCCC :: COND_LS : return CC2 == ARCCC :: COND_LO || CC2 == ARCCC :: COND_EQ ; case ARCCC :: COND_GE : return CC2 == ARCCC :: COND_GT ; case ARCCC :: COND_LE : return CC2 == ARCCC :: COND_LT ; default : return false ; } } </s>

natrual_language: Returns true if the first specified predicate subsumes the second , e.g .

Func: SubsumesPredicate


ground_truth: "ARCOMPACT DAG->DAG Pattern Instruction Selection"

File: ARCompactISelDAGToDAG


ground_truth: <s> SDNode * ARCompactDAGToDAGISel :: Select ( SDNode * Op ) { DebugLoc dl = Op -> getDebugLoc ( ) ; if ( Op -> isMachineOpcode ( ) ) { return NULL ; } switch ( Op -> getOpcode ( ) ) { case ISD :: FrameIndex : { assert ( Op -> getValueType ( 0 ) == MVT :: i32 ) ; int FI = cast < FrameIndexSDNode > ( Op ) -> getIndex ( ) ; SDValue TFI = CurDAG -> getTargetFrameIndex ( FI , MVT :: i32 ) ; if ( Op -> hasOneUse ( ) ) { return CurDAG -> SelectNodeTo ( Op , ARC :: ADDrli , MVT :: i32 , TFI , CurDAG -> getTargetConstant ( 0 , MVT :: i32 ) ) ; } return CurDAG -> getMachineNode ( ARC :: ADDrli , dl , MVT :: i32 , TFI , CurDAG -> getTargetConstant ( 0 , MVT :: i32 ) ) ; } default : break ; } return SelectCode ( Op ) ; } </s>

natrual_language: Main hook for targets to transform nodes into machine nodes .

Func: Select


ground_truth:
<s>
MachineBasicBlock
*
ARCompactTargetLowering
::
EmitInstrWithCustomInserter
(
MachineInstr
*
MI
,
MachineBasicBlock
*
BB
)
const
{
const
TargetInstrInfo
&
TII
=
*
getTargetMachine
(
)
.
getInstrInfo
(
)
;
DebugLoc
dl
=
MI
->
getDebugLoc
(
)
;
assert
(
(
MI
->
getOpcode
(
)
==
ARC
::
Select
)
&&
"We can only emit SELECT_CC"
)
;
const
BasicBlock
*
LLVM_BB
=
BB
->
getBasicBlock
(
)
;
MachineFunction
::
iterator
I
=
BB
;
++
I
;
MachineBasicBlock
*
thisMBB
=
BB
;
MachineFunction
*
F
=
BB
->
getParent
(
)
;
MachineBasicBlock
*
copy0MBB
=
F
->
CreateMachineBasicBlock
(
LLVM_BB
)
;
MachineBasicBlock
*
copy1MBB
=
F
->
CreateMachineBasicBlock
(
LLVM_BB
)
;
F
->
insert
(
I
,
copy0MBB
)
;
F
->
insert
(
I
,
copy1MBB
)
;
copy1MBB
->
splice
(
copy1MBB
->
begin
(
)
,
BB
,
llvm
::
next
(
MachineBasicBlock
::
iterator
(
MI
)
)
,
BB
->
end
(
)
)
;
copy1MBB
->
transferSuccessorsAndUpdatePHIs
(
BB
)
;
BB
->
addSuccessor
(
copy0MBB
)
;
BB
->
addSuccessor
(
copy1MBB
)
;
BuildMI
(
BB
,
dl
,
TII
.
get
(
ARC
::
BCC
)
)
.
addMBB
(
copy1MBB
)
.
addImm
(
MI
->
getOperand
(
3
)
.
getImm
(
)
)
;
BB
=
copy0MBB
;
BB
->
addSuccessor
(
copy1MBB
)
;
BB
=
copy1MBB
;
BuildMI
(
*
BB
,
BB
->
begin
(
)
,
dl
,
TII
.
get
(
ARC
::
PHI
)
,
MI
->
getOperand
(
0
)
.
getReg
(
)
)
.
addReg
(
MI
->
getOperand
(
2
)
.
getReg
(
)
)
.
addMBB
(
copy0MBB
)
.
addReg
(
MI
->
getOperand
(
1
)
.
getReg
(
)
)
.
addMBB
(
thisMBB
)
;
MI
->
eraseFromParent
(
)
;
return
BB
;
}
</s>

natrual_language: This method should be implemented by targets that mark instructions with the 'usesCustomInserter ' flag .

File: ARCompactISelLowering

Func: EmitInstrWithCustomInserter


ground_truth: <s> EVT ARCompactTargetLowering :: getSetCCResultType ( EVT VT ) const { return MVT :: i32 ; } </s>

natrual_language: Return the value type to use for ISD : :SETCC .

TS_V_token: ARCompact ARC MVT::i32

Func: getSetCCResultType


ground_truth: <s> const char * ARCompactTargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { case ARCISD :: CALL : return "ARCISD::CALL" ; case ARCISD :: CMP : return "ARCISD::CMP" ; case ARCISD :: BR_CC : return "ARCISD::BR_CC" ; case ARCISD :: SELECT_CC : return "ARCISD::SELECT_CC" ; case ARCISD :: Wrapper : return "ARCISD::Wrapper" ; case ARCISD :: RET_FLAG : return "ARCISD::RET_FLAG" ; default : return 0 ; } } </s>

natrual_language: getTargetNodeName - This method returns the name of a target specific

Func: getTargetNodeName


ground_truth: <s> SDValue ARCompactTargetLowering :: LowerCallResult ( SDValue Chain , SDValue InFlag , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < ISD :: InputArg > & Ins , DebugLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { SmallVector < CCValAssign , 16 > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_ARCompact32 ) ; for ( unsigned i = 0 ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( 1 ) ; InFlag = Chain . getValue ( 2 ) ; InVals . push_back ( Chain . getValue ( 0 ) ) ; } return Chain ; } </s>

natrual_language: LowerCallResult - Lower the result values of an ISD : :CALL into the appropriate copies out of appropriate physical registers .

Func: LowerCallResult


ground_truth:
<s>
SDValue
ARCompactTargetLowering
::
LowerOperation
(
SDValue
Op
,
SelectionDAG
&
DAG
)
const
{
switch
(
Op
.
getOpcode
(
)
)
{
case
ISD
::
GlobalAddress
:
return
LowerGlobalAddress
(
Op
,
DAG
)
;
case
ISD
::
BR_CC
:
return
LowerBR_CC
(
Op
,
DAG
)
;
case
ISD
::
SELECT_CC
:
return
LowerSELECT_CC
(
Op
,
DAG
)
;
case
ISD
::
VASTART
:
return
LowerVASTART
(
Op
,
DAG
)
;
default
:
assert
(
0
&&
"Unimplemented operation!"
)
;
return
SDValue
(
)
;
}
}
</s>

natrual_language: LowerOperation - Provide custom lowering hooks for some operations .

Func: LowerOperation


ground_truth:
<s>
SDValue
ARCompactTargetLowering
::
LowerReturn
(
SDValue
Chain
,
CallingConv
::
ID
CallConv
,
bool
isVarArg
,
const
SmallVectorImpl
<
ISD
::
OutputArg
>
&
Outs
,
const
SmallVectorImpl
<
SDValue
>
&
OutVals
,
DebugLoc
dl
,
SelectionDAG
&
DAG
)
const
{
MachineFunction
&
MF
=
DAG
.
getMachineFunction
(
)
;
SmallVector
<
CCValAssign
,
16
>
RVLocs
;
CCState
CCInfo
(
CallConv
,
isVarArg
,
DAG
.
getMachineFunction
(
)
,
DAG
.
getTarget
(
)
,
RVLocs
,
*
DAG
.
getContext
(
)
)
;
CCInfo
.
AnalyzeReturn
(
Outs
,
RetCC_ARCompact32
)
;
if
(
MF
.
getRegInfo
(
)
.
liveout_empty
(
)
)
{
for
(
unsigned
i
=
0
;
i
!=
RVLocs
.
size
(
)
;
++
i
)
if
(
RVLocs
[
i
]
.
isRegLoc
(
)
)
{
MF
.
getRegInfo
(
)
.
addLiveOut
(
RVLocs
[
i
]
.
getLocReg
(
)
)
;
}
}
SDValue
Flag
;
for
(
unsigned
i
=
0
;
i
!=
RVLocs
.
size
(
)
;
++
i
)
{
CCValAssign
&
VA
=
RVLocs
[
i
]
;
assert
(
VA
.
isRegLoc
(
)
&&
"Can only return in registers!"
)
;
Chain
=
DAG
.
getCopyToReg
(
Chain
,
dl
,
VA
.
getLocReg
(
)
,
OutVals
[
i
]
,
Flag
)
;
Flag
=
Chain
.
getValue
(
1
)
;
}
unsigned
int
RetAddrOffset
=
8
;
SDValue
RetAddrOffsetNode
=
DAG
.
getConstant
(
RetAddrOffset
,
MVT
::
i32
)
;
if
(
Flag
.
getNode
(
)
)
{
return
DAG
.
getNode
(
ARCISD
::
RET_FLAG
,
dl
,
MVT
::
Other
,
Chain
,
RetAddrOffsetNode
,
Flag
)
;
}
return
DAG
.
getNode
(
ARCISD
::
RET_FLAG
,
dl
,
MVT
::
Other
,
Chain
,
RetAddrOffsetNode
)
;
}
</s>

natrual_language: This hook must be implemented to lower outgoing return values , described by the Outs array , into the specified DAG .

Func: LowerReturn


ground_truth: <s> SDValue ARCompactTargetLowering :: PerformDAGCombine ( SDNode * N , DAGCombinerInfo & DCI ) const { SelectionDAG & DAG = DCI . DAG ; switch ( N -> getOpcode ( ) ) { case ISD :: SELECT_CC : return PerformSELECTCCCombine ( N , DAG , DCI ) ; default : break ; } return SDValue ( ) ; } </s>

natrual_language: This method will be invoked for all target nodes and for any target-independent nodes that the target has registered with invoke it for .

TS_V_token: ARCompact ARC ISD::SELECT_CC

Func: PerformDAGCombine


ground_truth: <s> void ARCompactRegisterInfo :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { MBB . erase ( I ) ; } </s>

natrual_language: This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy pseudo instructions ( but only if the Target is using them ) .

File: ARCompactRegisterInfo

Func: eliminateCallFramePseudoInstr


ground_truth: "Instr doesn't have FrameIndex operand!"

natrual_language: This method must be overriden to eliminate abstract frame indices from instructions which may use them .

Func: eliminateFrameIndex


ground_truth: <s> const unsigned * ARCompactRegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { static const unsigned CalleeSavedRegs [ ] = { ARC :: T5 , ARC :: T6 , ARC :: T7 , ARC :: S0 , ARC :: S1 , ARC :: S2 , ARC :: S3 , ARC :: S4 , ARC :: S5 , ARC :: S6 , ARC :: S7 , ARC :: S8 , ARC :: S9 , 0 } ; return CalleeSavedRegs ; } </s>

natrual_language: Code Generation virtual methods ...

Func: getCalleeSavedRegs


ground_truth: <s> unsigned ARCompactRegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { return ARC :: FP ; } </s>

natrual_language: Debug information queries .

TS_V_token: ARCompact ARC ARC::FP

Func: getFrameRegister


ground_truth: <s> unsigned ARCompactRegisterInfo :: getRARegister ( ) const { return ARC :: BLINK ; } </s>

natrual_language: This method should return the register where the return address can be found .

TS_V_token: ARCompact ARC ARC::BLINK

Func: getRARegister


ground_truth: <s> BitVector ARCompactRegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( ARC :: GP ) ; Reserved . set ( ARC :: SP ) ; Reserved . set ( ARC :: FP ) ; Reserved . set ( ARC :: BLINK ) ; Reserved . set ( ARC :: ILINK1 ) ; Reserved . set ( ARC :: ILINK2 ) ; return Reserved ; } </s>

natrual_language: getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a special register that has particular uses and should be considered unavailable at all times , e.g .

TS_V_token: ARCompact ARC ARC::GP ARC::SP ARC::FP ARC::BLINK ARC::ILINK1 ARC::ILINK2

Func: getReservedRegs


ground_truth: <s> std :: string getDataLayout ( ) const { const char * p ; p = "e-p:32:32:32" ; return std :: string ( p ) ; } </s>

natrual_language: Return the DataLayout associated with the module this SCEV instance is operating on .

File: ARCompactSubtarget

Func: getDataLayout


ground_truth: <s> bool ARCompactTargetMachine :: addInstSelector ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { PM . add ( createARCompactISelDag ( * this ) ) ; return false ; } </s>

natrual_language: addInstSelector - This method should install an instruction selector pass , which converts from LLVM code to machine instructions .

TS_V_token: ARCompact ARC ARC

File: ARCompactTargetMachine

Func: addInstSelector


ground_truth: <s> bool ARCompactTargetMachine :: addPreSched2 ( PassManagerBase & PM , CodeGenOpt :: Level OptLevel ) { if ( OptLevel != CodeGenOpt :: None ) { PM . add ( createIfConverterPass ( ) ) ; } return true ; } </s>

natrual_language: This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass .


ground_truth: <s> virtual const ARCompactInstrInfo * getInstrInfo ( ) const { return & InstrInfo ; } </s>

natrual_language: TargetInstrInfo getter .

Func: getInstrInfo


ground_truth: <s> virtual const ARCompactRegisterInfo * getRegisterInfo ( ) const { return & InstrInfo . getRegisterInfo ( ) ; } </s>

natrual_language: getRegisterInfo - TargetInstrInfo is a superset of MRegister info .

Func: getRegisterInfo


ground_truth: <s> virtual const ARCompactSubtarget * getSubtargetImpl ( ) const { return & Subtarget ; } </s>

natrual_language: Virtual method implemented by subclasses that returns a reference to that target 's TargetSubtargetInfo-derived member variable .

Func: getSubtargetImpl