<s> static const unsigned EhDataReg [ ] = { <STR_LIT> , <STR_LIT> } ; return EhDataReg [


<s> unsigned <ISA_LIT>ABIInfo :: GetEhDataReg ( unsigned I ) const { static const unsigned EhDataReg [ ] = { <STR_LIT> , <STR_LIT> } ; return EhDataReg [


<s> if ( Enable<ISA_LIT>S32Calls ) abi = <STR_LIT> ; else abi = <STR_LIT> ; assert ( abi . ThisABI !=


<s> int <ISA_LIT>ABIInfo :: EhDataRegSize ( ) const { if ( ThisABI == <STR_LIT> ) return <NUM_LIT> ; else return <NUM_LIT>


<s> const ArrayRef < MCPhysReg > <ISA_LIT>ABIInfo :: GetByValArgRegs ( ) const { if ( IsO32 ( ) ) return makeArrayRef ( O32IntRegs ) ; if ( IsS32 ( ) ) return


<s> unsigned <ISA_LIT>ABIInfo :: GetEhDataReg ( unsigned I ) const { static const unsigned EhDataReg [


<s> unsigned <ISA_LIT>ABIInfo :: GetNullPtr ( ) const { return


<s> unsigned <ISA_LIT>ABIInfo :: GetStackPtr ( )


<s> if ( IsO32 ( ) ) return makeArrayRef ( O32IntRegs ) ; if ( IsS32 ( ) ) return makeArrayRef ( S32IntRegs ) ; llvm_unreachable ( <STR_LIT>


<s> bool IsKnown ( ) const { return ThisABI !=


<s> return <ISA_LIT>ABIInfo ( <STR_LIT> )


<s> void <ISA_LIT>AnalyzeImmediate :: GetInstSeqLsSHL ( uint64_t Imm , unsigned RemSize ,


<s> GetInstSeqLs ( Imm >> Shamt , RemSize - Shamt , SeqLs ) ; AddInstr ( SeqLs , Inst ( SHL , Shamt )


<s> if ( ( Seq . size ( ) < <NUM_LIT> ) || ( Seq [ <NUM_LIT> ] . Opc != ADDiu ) || ( Seq [ <NUM_LIT> ] . Opc != SHL ) || ( Seq [ <NUM_LIT> ] . ImmOperand < <NUM_LIT> ) ) return ; int64_t Imm = SignExtend64 < <NUM_LIT> > ( Seq [ <NUM_LIT> ] . ImmOperand ) ; int64_t ShiftedImm = ( uint64_t ) Imm << ( Seq [ <NUM_LIT> ] . ImmOperand - <NUM_LIT> ) ; if ( ! isInt < <NUM_LIT> > ( ShiftedImm ) ) return ; Seq [ <NUM_LIT> ] . Opc


<s> for ( <STR_LIT> Iter = SeqLs . begin ( ) ; Iter != SeqLs . end ( ) ; ++ Iter ) Iter


<s> LUi = <STR_LIT> ; InstSeqLs SeqLs ; if ( LastInstrIsADDiu | ! Imm ) GetInstSeqLsADDiu ( Imm , Size , SeqLs ) ; else GetInstSeqLs ( Imm , Size , SeqLs ) ; GetShortestSeq ( SeqLs , Insts ) ; return Insts


<s> if ( ! MaskedImm ) return ; if ( RemSize <= <NUM_LIT> ) { AddInstr ( SeqLs , Inst ( ADDiu , MaskedImm ) ) ; return ; } if ( ! ( Imm & <NUM_LIT> ) ) { GetInstSeqLsSHL ( Imm , RemSize , SeqLs ) ; return ; } GetInstSeqLsADDiu ( Imm , RemSize , SeqLs ) ; if ( Imm & <NUM_LIT> ) { InstSeqLs SeqLsORi ; GetInstSeqLsORi ( Imm , RemSize ,


<s> void <ISA_LIT>AnalyzeImmediate :: GetInstSeqLsADDiu ( uint64_t Imm , unsigned RemSize , InstSeqLs & SeqLs ) { GetInstSeqLs ( ( Imm + <NUM_LIT> ) & <NUM_LIT> , RemSize , SeqLs ) ; AddInstr ( SeqLs , Inst ( ADDiu


<s> GetInstSeqLs ( Imm & <NUM_LIT> , RemSize , SeqLs ) ; AddInstr ( SeqLs , Inst ( ORi


<s> void <ISA_LIT>AnalyzeImmediate :: GetInstSeqLsSHL ( uint64_t Imm , unsigned RemSize , InstSeqLs & SeqLs ) { unsigned Shamt = countTrailingZeros ( Imm ) ; GetInstSeqLs ( Imm >> Shamt , RemSize - Shamt , SeqLs


<s> GetInstSeqLs ( Imm >> Shamt , RemSize - Shamt , SeqLs ) ; AddInstr ( SeqLs , Inst (


<s> void <ISA_LIT>AnalyzeImmediate :: GetShortestSeq ( InstSeqLs & SeqLs , InstSeq & Insts ) { <STR_LIT> ShortestSeq = SeqLs . end ( ) ; unsigned ShortestLength = <NUM_LIT> ; for ( <STR_LIT> S = SeqLs . begin ( ) ; S != SeqLs . end ( ) ; ++ S ) { ReplaceADDiuSHLWithLUi ( * S ) ; assert ( S -> size ( )


<s> void <ISA_LIT>AnalyzeImmediate :: ReplaceADDiuSHLWithLUi ( InstSeq & Seq ) { if ( ( Seq . size ( ) < <NUM_LIT> ) || ( Seq [ <NUM_LIT> ] . Opc != ADDiu ) || ( Seq [ <NUM_LIT> ] . Opc != SHL ) || ( Seq [ <NUM_LIT> ] . ImmOpnd < <NUM_LIT> ) ) return ; int64_t Imm = SignExtend64 < <NUM_LIT> > ( Seq [ <NUM_LIT> ]


<s> case FK_Data_4 : case <STR_LIT> : case <STR_LIT> : break ; case <STR_LIT> : case <STR_LIT> : Value -= <NUM_LIT> ; break ; case <STR_LIT> : break ; case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : Value = ( ( Value + <NUM_LIT> ) >>


<s> case <STR_LIT> : FullSize = <NUM_LIT> ; break ; default : FullSize = <NUM_LIT> ; break ; } uint64_t CurVal = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = IsLittle ? i : ( FullSize - <NUM_LIT> - i ) ; CurVal |= ( uint64_t ) ( ( uint8_t ) Data [ Offset + Idx ] ) << ( i * <NUM_LIT> ) ; } uint64_t Mask = ( ( uint64_t ) ( - <NUM_LIT> ) >> ( <NUM_LIT> - getFixupKindInfo ( Kind ) .


<s> unsigned FullSize ; switch ( ( unsigned ) Kind ) { case <STR_LIT> : FullSize = <NUM_LIT> ; break ; default : FullSize = <NUM_LIT> ; break ; } uint64_t CurVal = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = IsLittle ? i : ( FullSize - <NUM_LIT> - i ) ; CurVal |= ( uint64_t ) ( ( uint8_t ) Data [ Offset + Idx ] ) << ( i * <NUM_LIT> ) ; } uint64_t Mask = ( ( uint64_t ) ( - <NUM_LIT> ) >> ( <NUM_LIT> - getFixupKindInfo ( Kind ) . TargetSize ) ) ; CurVal |= Value


<s> return new <ISA_LIT>AsmBackend ( T , Triple ( TT ) . getOS ( ) ,


<s> return new <ISA_LIT>AsmBackend ( T , Triple ( TT ) .


<s> MCObjectWriter * createObjectWriter ( raw_ostream & OS ) const { return create<ISA_LIT>ELFObjectWriter ( OS , MCELFObjectTargetWriter :: getOSABI ( OSType ) ,


<s> MCObjectWriter * createObjectWriter ( raw_ostream & OS )


<s> unsigned getNumFixupKinds ( ) const { return <STR_LIT>


<s> bool mayNeedRelaxation ( const MCInst & Inst )


<s> bool fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCInstFragment * DF , const MCAsmLayout & Layout ) const { assert ( <NUM_LIT> && <STR_LIT> ) ; return


<s> MCFixupKind Kind = Fixup . getKind ( ) ; Value = adjustFixupValue ( Fixup , Value ) ; if ( ! Value ) return ; unsigned Offset = Fixup . getOffset ( ) ; unsigned NumBytes = ( getFixupKindInfo ( Kind ) . TargetSize + <NUM_LIT> ) / <NUM_LIT> ; unsigned FullSize ; switch ( ( unsigned ) Kind ) { default : FullSize = <NUM_LIT> ; break ; } uint64_t CurVal = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = Endian == <STR_LIT> ? i : ( FullSize - <NUM_LIT> - i ) ; CurVal |= ( uint64_t ) ( ( uint8_t ) Data [ Offset + Idx ] ) << ( i * <NUM_LIT> ) ; } uint64_t Mask = ( ( uint64_t ) ( - <NUM_LIT> ) >> ( <NUM_LIT> - getFixupKindInfo ( Kind ) . TargetSize ) ) ; CurVal |= Value & Mask ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = Endian == <STR_LIT> ? i : ( FullSize - <NUM_LIT> - i ) ; Data [ Offset + Idx ] = ( uint8_t ) ( (

CurVal >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) ;


<s> MCFixupKind Kind = Fixup . getKind ( ) ; Value = adjustFixupValue ( Fixup , Value ) ; if ( ! Value ) return ; unsigned Offset = Fixup . getOffset ( ) ; unsigned NumBytes = ( getFixupKindInfo ( Kind ) . TargetSize + <NUM_LIT> ) / <NUM_LIT> ; unsigned FullSize ; switch ( ( unsigned ) Kind ) { default : FullSize = <NUM_LIT> ; break ; } uint64_t CurVal = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = Endian == <STR_LIT> ? i : ( FullSize - <NUM_LIT> - i ) ; CurVal |= ( uint64_t ) ( ( uint8_t ) Data [ Offset + Idx ] ) << ( i * <NUM_LIT> ) ; } uint64_t Mask = ( ( uint64_t ) ( - <NUM_LIT> ) >> ( <NUM_LIT> - getFixupKindInfo ( Kind ) . TargetSize ) ) ; CurVal |= Value &


<s> return new <ISA_LIT>AsmBackend ( T , MRI , STI . getTargetTriple ( ) , STI .


<s> return new <ISA_LIT>AsmBackend ( T , MRI , STI . getTargetTriple ( ) , STI . getCPU


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackendEL32 ( const Target & T , const MCSubtargetInfo & STI , const MCRegisterInfo

& MRI , const MCTargetOptions & Options ) {


<s> std :: unique_ptr < MCObjectTargetWriter > <ISA_LIT>AsmBackend :: createObjectTargetWriter ( ) const { return create<ISA_LIT>ELFObjectWriter ( TheTriple


<s> const MCFixupKindInfo & <ISA_LIT>AsmBackend :: getFixupKindInfo ( MCFixupKind Kind ) const { const static MCFixupKindInfo Infos [ <STR_LIT> ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , <NUM_LIT> } , { <STR_LIT> ,


<s> bool <ISA_LIT>AsmBackend :: writeNopData ( raw_ostream & OS , uint64_t


<s> } uint64_t Mask = ( ( uint64_t ) ( - <NUM_LIT> ) >> ( <NUM_LIT> - getFixupKindInfo ( Kind ) . TargetSize ) ) ; CurVal |= Value & Mask ; for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) { unsigned Idx = IsLittle ? i : ( FullSize - <NUM_LIT> - i ) ; Data [ Offset + Idx ] = ( uint8_t ) ( ( CurVal >> ( i


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackendEL32 ( const Target & T , const MCSubtargetInfo & STI , const MCRegisterInfo & MRI , const MCTargetOptions


<s> std :: unique_ptr < MCObjectTargetWriter > <ISA_LIT>AsmBackend


<s> std :: unique_ptr < MCObjectTargetWriter > <ISA_LIT>AsmBackend :: createObjectTargetWriter ( ) const { return create<ISA_LIT>ELFObjectWriter ( MCELFObjectTargetWriter :: getOSABI ( TheTriple .


<s> bool fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCRelaxableFragment * DF , const MCAsmLayout &


<s> bool mayNeedRelaxation ( const MCInst & Inst , const MCSubtargetInfo &


<s> bool <ISA_LIT>AsmBackend :: writeNopData ( raw_ostream & OS ,


<s> assert ( N == <NUM_LIT> && <STR_LIT> ) ; const MCExpr * Expr = getImm ( ) ; addExpr ( Inst ,


<s> const MCExpr * Expr = getImm ( ) ; addExpr ( Inst ,


<s> void addMemOperands ( MCInst & Inst , unsigned N ) const { assert ( N ==


<s> <ISA_LIT>AsmParser ( const MCSubtargetInfo & sti , MCAsmParser & parser , const MCInstrInfo & MII , const MCTargetOptions & Options ) : MCTargetAsmParser ( Options , sti , MII ) , Parser ( parser ) { setAvailableFeatures ( ComputeAvailableFeatures ( getSTI ( ) . getFeatureBits


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateImm ( const MCExpr


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateReg ( unsigned RegNum , SMLoc S , SMLoc E ) { auto Op = make_unique < <ISA_LIT>Operand > ( k_Register ) ; Op -> Reg . RegNum = RegNum ; Op -> StartLoc = S ; Op -> EndLoc


<s> static std :: unique_ptr < <ISA_LIT>Operand > CreateReg ( unsigned RegNum , SMLoc S , SMLoc E ) { auto Op = make_unique < <ISA_LIT>Operand > ( k_Register ) ; Op -> Reg . RegNum = RegNum ; Op -> StartLoc = S ; Op -> EndLoc =


<s> auto Op = make_unique < <ISA_LIT>Operand > ( k_Token ) ; Op -> Tok . Data = Str . data ( ) ; Op -> Tok . Length = Str . size ( ) ; Op -> StartLoc = S ; Op -> EndLoc = S ; return


<s> const MCExpr * <ISA_LIT>AsmParser :: evaluateRelocExpr ( const MCExpr * Expr , StringRef RelocStr ) { <ISA_LIT>MCExpr :: <ISA_LIT>ExprKind Kind = StringSwitch < <ISA_LIT>MCExpr :: <ISA_LIT>ExprKind > ( RelocStr ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GOT_CALL ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_CALL_HI16 ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_CALL_LO16 ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_DTP_HI ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_DTP_LO ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GOT ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GOT_HI16 ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GOT_LO16 ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GOTTPREL ) .

Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_GPREL ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_ABS_HI ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_ABS_LO ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_TLSGD ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_TLSLDM ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_TP_HI ) . Case ( <STR_LIT> , <ISA_LIT>MCExpr :: CEK_TP_LO ) . Default ( <ISA_LIT>MCExpr :: CEK_None ) ;


<s> void <ISA_LIT>AsmParser :: expandInstruction ( MCInst & Inst , SMLoc IDLoc , SmallVectorImpl < MCInst > & Instructions ) { switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : return expandLoadImm ( Inst ,


<s> switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : return expandLoadImm ( Inst , IDLoc , Instructions ) ; case


<s> if ( - <NUM_LIT> <= ImmValue && ImmValue <= <NUM_LIT> ) { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ImmValue ) ) ; Instructions . push_back ( tmpInst ) ; } else { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp


<s> const MCOperand & RegOp = Inst . getOperand ( <NUM_LIT> ) ; assert ( RegOp . isReg ( ) && <STR_LIT> ) ; int ImmValue = ImmOp . getImm ( ) ; if ( - <NUM_LIT> <= ImmValue && ImmValue <= <NUM_LIT> ) { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ImmValue ) ) ; Instructions . push_back ( tmpInst ) ; } else { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ( ImmValue & <NUM_LIT> ) >> <NUM_LIT> ) ) ; Instructions . push_back ( tmpInst ) ; tmpInst . clear ( ) ; tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ImmValue


<s> tmpInst . addOperand ( MCOperand :: createImm ( ( ImmValue & <NUM_LIT> ) >> <NUM_LIT> ) ) ; Instructions . push_back ( tmpInst ) ; tmpInst . clear ( ) ; tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( DstRegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( DstRegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ImmValue & <NUM_LIT> ) ) ; Instructions . push_back ( tmpInst ) ; tmpInst . clear ( ) ; tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( DstRegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( DstRegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( SrcRegOp . getReg ( ) ) ) ; Instructions . push_back


<s> tmpInst . addOperand ( MCOperand :: createImm ( ImmValue ) ) ; Instructions . push_back ( tmpInst ) ; } else if ( ImmValue < <NUM_LIT> && ImmValue >= - <NUM_LIT> ) { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ImmValue ) ) ; Instructions . push_back ( tmpInst ) ; } else { tmpInst . setOpcode ( <STR_LIT> ) ; tmpInst . addOperand ( MCOperand :: createReg ( RegOp . getReg ( ) ) ) ; tmpInst . addOperand ( MCOperand :: createImm ( ( ImmValue & <NUM_LIT> ) >> <NUM_LIT> ) ) ; Instructions . push_back ( tmpInst ) ; tmpInst . clear ( ) ; tmpInst . setOpcode (


<s> SMLoc getEndLoc ( ) const override { return


<s> unsigned getMemBase ( ) const { assert ( Kind == k_Memory && <STR_LIT>


<s> const MCExpr * getMemOff ( ) const { assert ( Kind == k_Memory && <STR_LIT> ) ; return Mem .


<s> unsigned <ISA_LIT>AsmParser :: getReg ( int RC , int RegNo ) { return * ( getContext ( ) . getRegisterInfo ( ) -> getRegClass ( RC ) . begin ( ) +


<s> SMLoc getStartLoc ( ) const override { return StartLoc


<s> return StringRef ( Tok . Data , Tok . Length


<s> bool isImm ( ) const override { return Kind ==


<s> bool isReg ( ) const override { return Kind


<s> switch ( MatchResult ) { default : break ; case Match_Success : { if ( needsExpansion ( Inst ) ) { SmallVector < MCInst , <NUM_LIT> > Instructions ; expandInstruction ( Inst , IDLoc , Instructions ) ; for ( unsigned i = <NUM_LIT> ; i < Instructions . size ( ) ; i ++ ) { Out . EmitInstruction ( Instructions [ i ] , getSTI ( ) ) ; } } else { Inst . setLoc ( IDLoc ) ; Out . EmitInstruction ( Inst , getSTI ( ) ) ; } return false ; } case Match_MissingFeature : Error ( IDLoc , <STR_LIT> ) ; return true ; case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo != ~ <NUM_LIT> ) { if ( ErrorInfo >= Operands . size ( ) ) return Error ( IDLoc , <STR_LIT> ) ; ErrorLoc = ( ( <ISA_LIT>Operand & ) * Operands [ ErrorInfo ] ) . getStartLoc ( ) ; if ( ErrorLoc == SMLoc ( ) ) ErrorLoc = IDLoc ; } return Error ( ErrorLoc , <STR_LIT> ) ; } case


<s> SmallVector < MCInst , <NUM_LIT> > Instructions ; expandInstruction ( Inst , IDLoc , Instructions ) ; for ( unsigned i = <NUM_LIT> ; i < Instructions . size ( ) ; i ++ ) { Out . EmitInstruction ( Instructions [ i ] , getSTI ( ) ) ; } } else { Inst . setLoc ( IDLoc ) ; Out . EmitInstruction ( Inst , getSTI ( ) ) ; } return false ; } case Match_MissingFeature : Error ( IDLoc , <STR_LIT> ) ; return true ; case Match_InvalidOperand : { SMLoc ErrorLoc = IDLoc ; if ( ErrorInfo !=


<s> int <ISA_LIT>AsmParser :: matchRegisterByNumber ( unsigned RegNum , StringRef Mnemonic ) { if ( RegNum > <NUM_LIT> ) return - <NUM_LIT> ; return getReg ( <STR_LIT> ,


<s> switch ( Inst . getOpcode ( ) ) { case <STR_LIT> : case <STR_LIT>


<s> return false ; } if ( DirectiveID . getString ( ) == <STR_LIT> ) { Parser . eatToEndOfStatement ( ) ; return false ; } if ( DirectiveID . getString ( ) == <STR_LIT> ) { return parseDirectiveSet ( ) ; } if ( DirectiveID . getString ( ) == <STR_LIT> ) { Parser . eatToEndOfStatement ( ) ; return


<s> const AsmToken & Tok = Parser . getTok ( ) ; if ( Tok . getString ( ) == <STR_LIT> ) { return parseSetReorderDirective ( ) ; } else if ( Tok . getString ( )


<s> bool <ISA_LIT>AsmParser :: ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { size_t Start = <NUM_LIT> , Next = Name . find ( '.' ) ; StringRef Mnemonic = Name . slice ( Start , Next ) ; if ( Mnemonic == <STR_LIT> ) Mnemonic = <STR_LIT> ; Operands . push_back ( <STR_LIT> ( Mnemonic , NameLoc ) ) ; if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { if ( ParseOperand ( Operands , Name ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; } while ( getLexer ( ) . is ( AsmToken :: Comma ) ) { Parser . Lex ( ) ; if ( ParseOperand ( Operands , Name ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; } } } if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; } Parser . Lex


<s> ParseInstruction ( ParseInstructionInfo & Info , StringRef Name , SMLoc NameLoc , OperandVector & Operands ) { size_t Start = <NUM_LIT> , Next = Name . find ( '.' ) ; StringRef Mnemonic = Name . slice ( Start , Next ) ; if ( Mnemonic == <STR_LIT> ) Mnemonic = <STR_LIT> ; Operands . push_back ( <STR_LIT> ( Mnemonic , NameLoc ) ) ; if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { if ( ParseOperand ( Operands , Name ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; } while ( getLexer ( ) . is ( AsmToken :: Comma ) ) { Parser . Lex ( ) ; if ( ParseOperand ( Operands , Name ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc , <STR_LIT> ) ; } } } if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement ( ) ; return Error ( Loc


<s> case AsmToken :: Integer : case AsmToken :: Minus : case AsmToken :: Plus : return ( getParser ( ) . parseExpression ( Res ) ) ; case AsmToken :: Percent : return parseRelocOperand ( Res ) ; case AsmToken :: LParen : return false ; } return true


<s> switch ( getLexer ( ) . getKind ( ) ) { default : return true ; case AsmToken :: Integer : case AsmToken ::


<s> const AsmToken & Tok = Parser . getTok ( ) ; if ( Tok . isNot ( AsmToken :: LParen ) ) { <ISA_LIT>Operand & Mnemonic = static_cast < <ISA_LIT>Operand & > ( * Operands [ <NUM_LIT> ] ) ; if ( Mnemonic . getToken ( ) == <STR_LIT> ) { SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ; Operands . push_back ( <STR_LIT> ( IdVal , S , E ) ) ; return MatchOperand_Success ; } Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } Parser . Lex ( ) ; const AsmToken & Tok1 = Parser . getTok ( ) ; if ( Tok1 . is ( AsmToken ::


<s> S = Parser . getTok ( ) . getLoc ( ) ; if ( parseMemOffset ( IdVal ) ) return MatchOperand_ParseFail ; const AsmToken & Tok = Parser . getTok ( ) ; if ( Tok . isNot ( AsmToken :: LParen ) ) { <ISA_LIT>Operand & Mnemonic = static_cast < <ISA_LIT>Operand & > ( * Operands [ <NUM_LIT> ] ) ; if ( Mnemonic . getToken ( ) == <STR_LIT> ) { SMLoc E = SMLoc :: getFromPointer ( Parser . getTok ( ) . getLoc ( ) . getPointer ( ) - <NUM_LIT> ) ; Operands . push_back ( <STR_LIT> ( IdVal , S , E ) ) ; return MatchOperand_Success ; } Error ( Parser . getTok ( ) . getLoc ( ) , <STR_LIT> ) ; return MatchOperand_ParseFail ; } Parser . Lex ( ) ; const AsmToken & Tok1 = Parser . getTok ( ) ; if ( Tok1 . is ( AsmToken :: Dollar ) ) { Parser . Lex ( ) ; if ( tryParseRegisterOperand ( Operands


<s> bool <ISA_LIT>AsmParser :: ParseRegister ( unsigned & RegNo , SMLoc & StartLoc , SMLoc & EndLoc ) { StartLoc = Parser . getTok ( ) . getLoc ( ) ; RegNo = tryParseRegister ( <STR_LIT> ) ; EndLoc = Parser . getTok ( ) . getLoc ( ) ; return ( RegNo == ( unsigned )


<s> if ( getLexer ( ) . getKind ( ) == AsmToken :: Percent ) { Parser . Lex ( ) ; const AsmToken & NextTok = Parser . getTok ( ) ; if ( NextTok . isNot ( AsmToken :: Identifier ) ) return true ; Str += <STR_LIT> ; Str += NextTok . getIdentifier ( ) ; Parser . Lex ( ) ; if ( getLexer ( ) . getKind ( ) != AsmToken :: LParen ) return true ; } else break ; } if ( getParser ( ) . parseParenExpression ( IdVal , EndLoc ) ) return true ; while ( getLexer ( ) . getKind ( ) == AsmToken :: RParen ) Parser . Lex ( ) ; } else return true ; Res = evaluateRelocExpr ( IdVal , Str


<s> } Options . setMacro ( ) ; Parser . Lex ( ) ; return false


<s> Parser . Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { reportParseError ( <STR_LIT> ) ; return false ; } if ( Options . isReorder ( )


<s> bool <ISA_LIT>AsmParser :: parseSetNoReorderDirective ( ) { Parser . Lex ( ) ; if ( getLexer ( ) . isNot ( AsmToken ::


<s> reportParseError ( <STR_LIT> ) ; return false ; } Options . setNoreorder ( ) ; Parser . Lex ( ) ; return


<s> if ( getLexer ( ) . isNot ( AsmToken :: EndOfStatement ) ) { reportParseError ( <STR_LIT> ) ; return false ; } Options . setReorder


<s> void print<ISA_LIT>Operands ( OperandVector & Operands ) { for ( size_t i = <NUM_LIT> ; i < Operands


<s> <ISA_LIT>Operand * op = static_cast < <ISA_LIT>Operand * > ( & * Operands [ i ] ) ; assert ( op != nullptr ) ; LLVM_DEBUG ( dbgs ( ) <<


<s> SMLoc Loc = getLexer ( ) . getLoc ( ) ; Parser . eatToEndOfStatement


<s> RegNum = matchRegisterName ( lowerCase ) ; } else if ( Tok . is ( AsmToken :: Integer ) ) { RegNum = matchRegisterByNumber ( static_cast < unsigned > ( Tok . getIntVal ( ) ) , Mnemonic . lower


<s> SMLoc S = Parser . getTok ( ) . getLoc ( ) ; int RegNo = - <NUM_LIT> ; RegNo = tryParseRegister ( Mnemonic ) ; if ( RegNo == - <NUM_LIT> ) return true ; Operands . push_back ( <STR_LIT> ( RegNo , S , Parser . getTok ( ) . getLoc ( ) ) ) ; Parser . Lex ( ) ; return


<s> GlobalHeap . push_back ( <NUM_LIT> ) ; Subtarget = & TM . getSubtarget


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( TM , Streamer ) , OS ( dyn_cast < <ISA_LIT>AsmStreamer > ( & Streamer ) -> getOStream ( ) ) , MCInstLowering ( * this ) { GlobalHeap . push_back ( <NUM_LIT> ) ; Subtarget = & TM . getSubtarget <


<s> void <ISA_LIT>AsmPrinter :: EmitEndOfAsmFile ( Module & M ) { OS << <STR_LIT> <STR_LIT> <STR_LIT> ; OS << <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> ; OS << <STR_LIT> ; for ( std :: vector < char > :: iterator


<s> const TargetRegisterInfo & RI = * TM . getRegisterInfo ( ) ; unsigned stackReg = RI . getFrameRegister ( * MF ) ; unsigned returnReg = RI . getRARegister ( ) ; unsigned stackSize = MF -> getFrameInfo ( ) -> getStackSize ( ) ; if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( <STR_LIT> + StringRef ( <ISA_LIT>InstPrinter :: getRegisterName ( stackReg ) ) . lower ( ) + <STR_LIT> + Twine ( stackSize ) +

<STR_LIT> + StringRef ( <ISA_LIT>InstPrinter :: getRegisterName ( returnReg ) ) . lower ( ) ) ;


<s> OutStreamer . EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym -> getName ( ) ) ) ; } OS << <STR_LIT>


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionEntryLabel ( ) { std :: string ArgString ; const Function :: ArgumentListType & ArgList = MF -> getFunction ( ) -> getArgumentList ( ) ; bool First = true ; for ( Function :: ArgumentListType :: const_iterator iter = ArgList . begin ( ) ; iter != ArgList . end ( ) ;


<s> for ( const char * C = S . begin ( ) ; C != S . end ( ) ; ++ C ) { GlobalHeap . push_back ( *


<s> case <STR_LIT> : { const MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ; assert ( MO . isImm ( ) && <STR_LIT> ) ; int64_t Offset = MO . getImm ( ) ; if ( OutStreamer . hasRawTextSupport ( ) ) { if ( ! isInt < <NUM_LIT> > ( Offset ) ) { EmitInstrWithMacroNoAT ( MI ) ; return ; } }


<s> OutStreamer . EmitInstruction ( TmpInst ) ; if ( <ISA_LIT>FI -> getEmitNOAT ( ) ) OutStreamer . EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer . EmitRawText ( StringRef ( <STR_LIT>


<s> void <ISA_LIT>AsmPrinter :: EmitStartOfAsmFile ( Module & M ) { OS << <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT> <STR_LIT>


<s> switch ( Subtarget -> getTargetABI ( ) ) { case <ISA_LIT>Subtarget :: O32 : return


<s> case <ISA_LIT>Subtarget :: O32 : return <STR_LIT> ; default : llvm_unreachable ( <STR_LIT> )


<s> assert ( MI -> getNumOperands ( ) == <NUM_LIT> && <STR_LIT> ) ; assert ( MI -> getOperand ( <NUM_LIT> ) . isReg ( ) && MI -> getOperand ( <NUM_LIT> ) . isImm ( )


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>Target ) ; RegisterAsmPrinter < <ISA_LIT>AsmPrinter > Y ( The<ISA_LIT>elTarget


<s> const MachineFrameInfo * MFI = MF -> getFrameInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; unsigned CPURegSize = <STR_LIT> . getSize ( ) ; unsigned i = <NUM_LIT> , e = CSI . size ( ) ; for ( ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg (


<s> unsigned CPURegSize = <STR_LIT> . getSize ( ) ; unsigned i = <NUM_LIT> , e = CSI . size ( ) ; for ( ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg (


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction & MF ) { <ISA_LIT>FI = MF . getInfo


<s> AsmPrinter :: runOnMachineFunction ( MF ) ; return


<s> Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( TM , Streamer ) , MCInstLowering ( * this ) { Subtarget = & TM . getSubtarget < <ISA_LIT>Subtarget >


<s> if ( OutStreamer . hasRawTextSupport ( ) ) { OutStreamer . EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer . EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym


<s> if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym -> getName ( ) ) ) ; OutStreamer . EmitLabel


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionEntryLabel ( ) { if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym ->


<s> raw_svector_ostream OS ( Str ) ; PrintDebugValueComment ( MI , OS ) ; return ; } MCInst TmpInst0 ; MCInstLowering . Lower ( MI , TmpInst0


<s> if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer . EmitRawText ( StringRef (


<s> if ( OutStreamer . hasRawTextSupport ( ) ) OutStreamer

. EmitRawText ( StringRef ( <STR_LIT> ) ) ;


<s> OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym -> getName (


<s> if ( OutStreamer -> hasRawTextSupport ( ) ) { if ( <ISA_LIT>MFI -> getEmitNOAT ( ) ) OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyStart ( ) { MCInstLowering . Initialize ( & MF -> getContext ( ) ) ; emitFrameDirective ( ) ; bool EmitCPLoad = ( MF -> getTarget ( ) . getRelocationModel ( ) == Reloc :: PIC_ ) && <ISA_LIT>MFI -> globalBaseRegSet ( ) && <ISA_LIT>MFI -> globalBaseRegFixed ( ) ; if ( <ISA_LIT>NoCpload ) EmitCPLoad = false ; if ( OutStreamer -> hasRawTextSupport ( ) ) { SmallString < <NUM_LIT> >


<s> return ; } MachineBasicBlock :: const_instr_iterator I = MI -> getIterator ( ) ; MachineBasicBlock :: const_instr_iterator E = MI -> getParent ( ) -> instr_end ( ) ; do { if ( emitPseudoExpansionLowering ( * OutStreamer , & * I ) ) continue ; if ( I -> isPseudo ( ) ) llvm_unreachable (


<s> virtual StringRef getPassName ( ) const override { return


<s> return true ; } const MachineOperand & MO = MI -> getOperand ( OpNum ) ; assert ( MO . isReg ( ) && <STR_LIT> ) ; O << Offset << <STR_LIT> << <ISA_LIT>InstPrinter :: getRegisterName ( MO .


<s> if ( ExtraCode [ <NUM_LIT> ] != <NUM_LIT> ) return true ; const MachineOperand & MO = MI -> getOperand ( OpNum ) ; switch ( ExtraCode [ <NUM_LIT> ] ) { default : return AsmPrinter :: PrintAsmOperand ( MI , OpNum , AsmVariant , ExtraCode , O ) ; case 'X' : if ( ( MO . getType ( ) ) != MachineOperand :: MO_Immediate ) return true ; O << <STR_LIT> << StringRef ( utohexstr ( MO . getImm ( ) ) ) . lower ( ) ; return false ; case 'x' : if ( ( MO . getType ( ) ) != MachineOperand :: MO_Immediate ) return true ; O << <STR_LIT> << StringRef ( utohexstr ( MO . getImm ( ) & <NUM_LIT> ) ) . lower ( ) ; return false ; case 'd' : if ( ( MO . getType ( ) ) != MachineOperand :: MO_Immediate ) return true ; O << MO . getImm ( ) ; return false ; case 'm' : if ( ( MO . getType ( ) ) != MachineOperand :: MO_Immediate ) return true ; O << MO . getImm ( ) - <NUM_LIT> ; return false ; case 'z' : { if ( MO . getType ( ) != MachineOperand :: MO_Immediate ) return true ; int64_t Val = MO . getImm ( ) ; if ( Val ) O << Val


<s> const MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; const TargetRegisterInfo * TRI = MF -> getSubtarget ( ) . getRegisterInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; unsigned CPURegSize = TRI -> getRegSizeInBits ( <STR_LIT> ) / <NUM_LIT> ; for ( const auto & I : CSI ) { unsigned Reg = I . getReg ( ) ; unsigned RegNum = TRI ->


<s> unsigned CPUBitmask = <NUM_LIT> ; int CPUTopSavedRegOff ; const MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; const TargetRegisterInfo * TRI = MF -> getSubtarget ( ) . getRegisterInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; unsigned CPURegSize = TRI -> getRegSizeInBits ( <STR_LIT> ) /


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction & MF


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction &


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) , MCInstLowering ( * this ) { Subtarget = static_cast < <ISA_LIT>TargetMachine & > ( TM ) .


<s> if ( OutStreamer -> hasRawTextSupport ( ) ) { if ( <ISA_LIT>FI -> getEmitNOAT ( ) ) OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( StringRef


<s> if ( OutStreamer -> hasRawTextSupport ( ) ) OutStreamer -> EmitRawText ( <STR_LIT> + Twine ( CurrentFnSym -> getName ( ) ) ) ; OutStreamer -> EmitLabel


<s> if ( OutStreamer -> hasRawTextSupport ( ) ) OutStreamer -> EmitRawText ( <STR_LIT>

+ Twine ( CurrentFnSym -> getName ( ) ) ) ;


<s> if ( I -> isPseudo ( ) && ! isLongBranchPseudo ( I -> getOpcode ( ) ) ) llvm_unreachable ( <STR_LIT> ) ; MCInst TmpInst0 ; MCInstLowering . Lower ( & * I , TmpInst0 ) ; OutStreamer -> EmitInstruction ( TmpInst0 , getSubtargetInfo ( ) ) ; } while ( ( ++ I != E ) && I -> isInsideBundle ( )


<s> if ( <ISA_LIT>FI -> getEmitNOAT ( ) ) OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitInstruction ( TmpInst , getSubtargetInfo ( ) ) ; if ( <ISA_LIT>FI -> getEmitNOAT ( ) ) OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> ) ) ; OutStreamer -> EmitRawText ( StringRef ( <STR_LIT> )


<s> void <ISA_LIT>AsmPrinter :: EmitStartOfAsmFile ( Module & M ) { if ( OutStreamer -> hasRawTextSupport ( ) ) OutStreamer -> EmitRawText ( <STR_LIT> + Twine ( getCurrentABIString ( ) ) ) ; if ( OutStreamer -> hasRawTextSupport ( ) ) OutStreamer -> EmitRawText (


<s> if ( OutStreamer -> hasRawTextSupport ( ) ) OutStreamer -> EmitRawText (

<STR_LIT> + Twine ( getCurrentABIString ( ) ) ) ;


<s> virtual StringRef getPassName ( ) const override { return <STR_LIT>


<s> return ( Opcode == <STR_LIT> || Opcode ==


<s> bool <ISA_LIT>AsmPrinter :: isLongBranchPseudo ( int Opcode )


<s> RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( getThe<ISA_LIT>Target


<s> MCOp = MCInstLowering . LowerOperand ( MO ) ; return MCOp . isValid (


<s> void <ISA_LIT>AsmPrinter :: PrintDebugValueComment ( const MachineInstr *


<s> O << <STR_LIT> ; for ( int i = <NUM_LIT> ; i >= <NUM_LIT> ; i -- ) O . write_hex ( ( Value &


<s> unsigned CPUBitmask = <NUM_LIT> ; int CPUTopSavedRegOff ; const MachineFrameInfo & MFI = MF -> getFrameInfo ( ) ; const TargetRegisterInfo * TRI = MF -> getSubtarget ( ) . getRegisterInfo ( ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; unsigned CPURegSize = TRI -> getRegSizeInBits ( <STR_LIT> ) / <NUM_LIT> ; unsigned i = <NUM_LIT> , e = CSI . size ( ) ; for ( ; i != e ; ++ i ) { unsigned Reg = CSI [ i ]


<s> <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; AsmPrinter :: runOnMachineFunction (


<s> bool <ISA_LIT>AsmPrinter :: runOnMachineFunction ( MachineFunction


<s> <ISA_LIT>AsmStreamer ( MCContext & Context , formatted_raw_ostream & os , bool isVerboseAsm , bool useLoc , bool useCFI , bool useDwarfDirectory , MCInstPrinter * printer , MCCodeEmitter * emitter , MCAsmBackend * asmbackend , bool showInst ) : MCStreamer ( SK_AsmStreamer , Context ) , OS ( os ) , MAI ( Context . getAsmInfo ( )

) , InstPrinter ( printer ) , Emitter ( emitter ) , AsmBackend ( asmbackend ) , CommentStream ( CommentToEmit ) , IsVerboseAsm ( isVerboseAsm ) {


<s> virtual void EmitCFIEndProcImpl ( MCDwarfFrameInfo & Frame ) { Frame . End = (


<s> virtual void EmitCFIEndProcImpl ( MCDwarfFrameInfo & Frame ) { Frame . End = ( MCSymbol


<s> virtual bool EmitDwarfFileDirective ( unsigned FileNo , StringRef Directory , StringRef Filename

, unsigned CUID = <NUM_LIT> ) { return true ; }


<s> virtual bool EmitValueToOffset ( const MCExpr * Offset , unsigned char Value = <NUM_LIT>


<s> virtual bool EmitValueToOffset ( const MCExpr * Offset , unsigned char Value = <NUM_LIT> ) {


<s> virtual raw_ostream & GetCommentOS ( ) { if ( ! IsVerboseAsm ) return


<s> virtual raw_ostream & GetCommentOS ( ) { if ( ! IsVerboseAsm ) return nulls ( ) ; return


<s> formatted_raw_ostream & getOStream ( ) { return


<s> SwitchSection ( getContext ( ) . getObjectFileInfo ( )


<s> if ( ( LHS -> getKind ( ) != MCExpr :: SymbolRef ) || ! CE ) return std :: make_pair ( ( const MCSymbolRefExpr * ) <NUM_LIT> , ( int64_t ) <NUM_LIT> ) ; return std :: make_pair ( cast < MCSymbolRefExpr > ( LHS ) , CE -> getValue ( ) ) ; } if ( Kind != MCExpr :: SymbolRef ) return std :: make_pair ( ( const MCSymbolRefExpr * ) <NUM_LIT> , ( int64_t ) <NUM_LIT> ) ; return std :: make_pair ( cast < MCSymbolRefExpr > (


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case


<s> case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case <STR_LIT> : return <NUM_LIT> ; case


<s> bool Changed = false ; const <ISA_LIT>Subtarget & STI = MBB . getParent ( ) -> getSubtarget < <ISA_LIT>Subtarget > ( ) ; const <ISA_LIT>InstrInfo * TII = STI . getInstrInfo ( ) ; for ( Iter I = MBB . begin ( ) ; I != MBB . end ( ) ; ++ I ) { if ( ! hasUnoccupiedSlot ( & * I ) ) continue ; ++ FilledSlots ; Changed = true ; BuildMI ( MBB , std :: next ( I ) , I -> getDebugLoc ( ) , TII -> get


<s> bool runOnMachineFunction ( MachineFunction & F ) override { bool Changed = false ; for ( MachineFunction :: iterator FI = F . begin ( ) , FE = F . end ( ) ; FI != FE ; ++ FI ) Changed |= runOnMachineBasicBlock ( *


<s> for ( MachineFunction :: iterator FI = F . begin ( ) , FE = F . end ( ) ; FI != FE ; ++ FI ) Changed |= runOnMachineBasicBlock ( * FI ) ; return


<s> FunctionPass * llvm :: create<ISA_LIT>DelJmpPass ( <ISA_LIT>TargetMachine & tm ) { return new DelJmp


<s> else return Changed ; if ( I -> getOpcode ( ) == <STR_LIT> && I -> getOperand ( <NUM_LIT> ) . getMBB ( ) == & MBBN ) { ++ NumDelJmp ; MBB . erase ( I ) ; Changed = true ; } return


<s> bool runOnMachineFunction ( MachineFunction & F ) { bool Changed = false ; if ( EnableDelJmp ) { MachineFunction :: iterator FJ = F . begin ( ) ; if ( FJ != F . end ( ) )


<s> static MCDisassembler * create<ISA_LIT>elDisassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>Disassembler ( STI , Ctx ,


<s> static MCDisassembler * create<ISA_LIT>elDisassembler ( const Target & T , const MCSubtargetInfo & STI , MCContext &


<s> static DecodeStatus DecodeBranch16Target ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { int BranchOffset = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( BranchOffset > <NUM_LIT> ) BranchOffset = - <NUM_LIT> * ( <NUM_LIT> - BranchOffset ) ; Inst . addOperand ( MCOperand :: createImm ( BranchOffset ) ) ; return MCDisassembler ::


<s> static DecodeStatus DecodeBranch16Target ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { int BranchOffset = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( BranchOffset > <NUM_LIT> ) BranchOffset = -

<NUM_LIT> * ( <NUM_LIT> - BranchOffset ) ;


<s> if ( BranchOffset > <NUM_LIT> ) BranchOffset = - <NUM_LIT> * ( <NUM_LIT> - BranchOffset ) ; Inst . addOperand ( MCOperand :: createReg


<s> int BranchOffset = fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; if ( BranchOffset > <NUM_LIT> ) BranchOffset = - <NUM_LIT> * ( <NUM_LIT> - BranchOffset ) ; Inst . addOperand ( MCOperand :: createReg ( <STR_LIT> ) ) ; Inst . addOperand ( MCOperand :: createImm ( BranchOffset ) ) ; return MCDisassembler :: Success


<s> if ( RegNo > <NUM_LIT> ) return MCDisassembler :: Fail ; Inst . addOperand ( MCOperand :: createReg ( CPURegsTable [ RegNo


<s> static DecodeStatus DecodeGPROutRegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const void * Decoder ) { return DecodeCPURegsRegisterClass ( Inst , RegNo


<s> return DecodeCPURegsRegisterClass ( Inst , RegNo , Address , Decoder


<s> static DecodeStatus DecodeJumpFR ( MCInst & Inst , unsigned Insn , uint64_t Address , const void * Decoder ) { int Reg = ( int ) fieldFromInstruction ( Insn , <NUM_LIT> , <NUM_LIT> ) ; Inst . addOperand ( MCOperand :: createReg ( CPURegsTable [ Reg ] ) ) ; if ( CPURegsTable [ Reg ] == <STR_LIT> )


<s> Inst . addOperand ( MCOperand :: createImm ( JumpOffset ) ) ; return MCDisassembler


<s> Inst . addOperand ( MCOperand :: createImm ( SignExtend32 < <NUM_LIT> > ( Insn ) ) ) ; return MCDisassembler ::


<s> static DecodeStatus DecodeSRRegisterClass ( MCInst & Inst , unsigned RegNo , uint64_t Address , const


<s> void LLVMInitialize<ISA_LIT>Disassembler ( ) { TargetRegistry :: RegisterMCDisassembler ( getThe<ISA_LIT>Target ( )


<s> } if ( IsBigEndian ) { Insn = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; } else { Insn = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT>


<s> if ( IsBigEndian ) { Insn = ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) | ( Bytes [ <NUM_LIT> ] << <NUM_LIT> ) ; }


<s> return ( R0 . Offset > R1 . Offset ) ? <NUM_LIT> : ( (

R0 . Offset == R1 . Offset ) ? <NUM_LIT> : - <NUM_LIT> ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ; return createELFObjectWriter ( MOTW , OS , IsLittleEndian


<s> MCObjectWriter * llvm :: create<ISA_LIT>ELFObjectWriter ( raw_ostream & OS , uint8_t OSABI


<s> unsigned Flag = ELF :: EF_CPU0_NOREORDER ; Flag |= ELF


<s> unsigned Flag = ELF :: EF_CPU0_NOREORDER ; Flag |= ELF :: EF_CPU0_ARCH_32R2 ; return Flag


<s> return ( I -> Reloc . Type == ELF :: R_CPU0_LO16 ) && ( Hi ->

Sym == I -> Sym ) && ( Hi -> Offset == I -> Offset ) ;


<s> static bool HasSameSymbol ( const RelEntry & R0 , const RelEntry &


<s> return ( ( R . Reloc . Type == ELF :: R_CPU0_GOT16 ) && ! SD . isExternal (

) ) || ( R . Reloc . Type == ELF :: R_CPU0_HI16 ) ;


<s> if ( ! R . Sym ) return false ; MCSymbolData & SD = Asm . getSymbolData ( R . Sym ->


<s> } for ( RelLsIter R = RelocLs . begin ( ) ; R != RelocLs . end ( ) ; ++ R ) if ( NeedsMatchingLo ( Asm , * R ) && ! HasMatchingLo ( Asm , R , -- RelocLs . end ( ) ) ) Unmatched . push_back ( R ) ; for ( std :: vector < RelLsIter > :: iterator U = Unmatched . begin ( ) ; U != Unmatched . end ( ) ; ++ U ) { RelLsIter LoPos = RelocLs . end ( ) , HiPos = * U ; bool MatchedLo = false ; for ( RelLsIter R = RelocLs . begin ( ) ; R != RelocLs . end ( ) ; ++ R ) { if ( ( R -> Reloc . Type == ELF :: R_CPU0_LO16 ) && HasSameSymbol ( * HiPos , * R ) && ( CompareOffset ( * R , * HiPos ) >= <NUM_LIT> ) && ( ( LoPos == RelocLs . end ( ) ) || ( ( CompareOffset ( * R , * LoPos ) < <NUM_LIT> ) ) || ( ! MatchedLo && ! CompareOffset


<s> RelLsIter LoPos = RelocLs . end ( ) , HiPos = * U ; bool MatchedLo = false ; for ( RelLsIter R = RelocLs . begin ( ) ; R != RelocLs . end ( ) ; ++ R ) { if ( ( R -> Reloc . Type == ELF :: R_CPU0_LO16 ) && HasSameSymbol ( * HiPos , * R ) && ( CompareOffset ( * R , * HiPos ) >= <NUM_LIT> ) && ( ( LoPos == RelocLs . end ( ) ) || ( ( CompareOffset ( * R , * LoPos ) < <NUM_LIT> ) ) || ( ! MatchedLo && ! CompareOffset ( * R , * LoPos ) ) ) ) LoPos = R ; MatchedLo = NeedsMatchingLo ( Asm , * R ) && HasMatchingLo ( Asm , R , -- RelocLs . end ( ) ) ; } if ( LoPos != RelocLs . end ( ) ) { HiPos -> Offset = LoPos -> Offset ; RelocLs . insert ( LoPos , * HiPos ) ; RelocLs . erase ( HiPos ) ; } } assert ( Relocs . size ( ) == RelocLs . size ( ) ) ; unsigned I = RelocLs . size ( ) ; for ( RelLsIter R = RelocLs . begin ( ) ; R != RelocLs . end ( ) ; ++


<s> std :: unique_ptr < MCObjectTargetWriter > llvm :: create<ISA_LIT>ELFObjectWriter ( const


<s> break ; case FK_GPRel_4 : Type = ELF :: R_CPU0_GPREL32 ; break ; case <STR_LIT> : Type = ELF :: R_CPU0_32 ; break ; case <STR_LIT> : Type = ELF :: R_CPU0_GPREL16 ; break ; case <STR_LIT> : Type = ELF :: R_CPU0_GOT16 ; break ; case <STR_LIT> : Type = ELF :: R_CPU0_HI16 ; break ; case <STR_LIT> : Type = ELF :: R_CPU0_LO16 ; break ; case <STR_LIT>


<s> return llvm :: make_unique < <ISA_LIT>ELFObjectWriter > ( OSABI


<s> return llvm :: make_unique < <ISA_LIT>ELFObjectWriter >


<s> case ELF :: R_CPU0_HI16 : case ELF :: R_CPU0_LO16 : case ELF :: R_CPU0_32 : return true ; case ELF ::


<s> return new <ISA_LIT>ELFStreamer ( Context , std :: move ( MAB ) , std :: move ( OW ) , std ::


<s> return new <ISA_LIT>ELFStreamer ( Context , std :: move ( MAB ) , std :: move ( OW ) ,


<s> return new <ISA_LIT>ELFStreamer ( Context , std :: move ( MAB ) , std :: move ( OW


<s> for ( MachineFunction :: iterator MFI = F . begin ( ) , MFE = F . end ( ) ; MFI != MFE ; ++ MFI ) { MachineBasicBlock & MBB = * MFI ; MachineBasicBlock :: iterator I = MFI -> begin ( ) ; if ( MBB . isLandingPad ( ) ) { for ( ; I -> getOpcode ( ) != TargetOpcode :: EH_LABEL ; ++ I ) ; ++ I ; DebugLoc dl = I != MBB . end ( ) ? I -> getDebugLoc ( ) : DebugLoc ( ) ; BuildMI ( MBB , I , dl , TII -> get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) ; Changed =


<s> FunctionPass * llvm :: create<ISA_LIT>EmitGPRestorePass ( <ISA_LIT>TargetMachine & tm ) { return new Inserter ( tm


<s> FunctionPass * llvm :: create<ISA_LIT>EmitGPRestorePass ( <ISA_LIT>TargetMachine & tm ) { return new Inserter


<s> virtual const char * getPassName ( ) const { return <STR_LIT>


<s> unsigned FP = <STR_LIT> ; unsigned ZERO = <STR_LIT> ; unsigned ADDu = <STR_LIT> ; unsigned ADDiu = <STR_LIT> ; unsigned StackAlign = getStackAlignment ( ) ; unsigned RegSize = <NUM_LIT> ; unsigned LocalVarAreaOffset = <ISA_LIT>FI -> needGPSaveRestore ( ) ? ( MFI -> getObjectOffset ( <ISA_LIT>FI -> getGPFI ( ) ) + RegSize ) : <ISA_LIT>FI -> getMaxCallFrameSize ( ) ; uint64_t StackSize = RoundUpToAlignment ( LocalVarAreaOffset , StackAlign ) + RoundUpToAlignment ( MFI -> getStackSize ( ) , StackAlign ) ; MFI -> setStackSize ( StackSize ) ; if ( StackSize == <NUM_LIT> && ! MFI -> adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; std :: vector < MachineMove > & Moves = MMI . getFrameMoves ( ) ; MachineLocation DstML , SrcML ; if ( isInt < <NUM_LIT> > ( - StackSize ) ) BuildMI ( MBB , MBBI , dl , TII . get ( ADDiu ) , SP ) . addReg ( SP ) . addImm ( - StackSize ) ; else { <ISA_LIT>FI -> setEmitNOAT ( ) ; expandLargeImm ( SP , - StackSize , TII , MBB , MBBI , dl ) ; } MCSymbol * AdjustSPLabel = MMI . getContext ( ) . CreateTempSymbol ( ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: PROLOG_LABEL ) )


<s> for ( ++ Inst ; Inst != Seq . end ( ) ; ++ Inst ) BuildMI ( MBB , II , DL , TII . get ( Inst -> Opc ) , ATReg ) . addReg ( ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; BuildMI ( MBB , II , DL , TII . get ( ADDu )

, Reg ) . addReg ( Reg ) . addReg ( ATReg ) ;


<s> <ISA_LIT>AnalyzeImmediate :: <STR_LIT> Inst = Seq . begin ( ) ; if ( Inst -> Opc == LUi ) BuildMI ( MBB , II , DL , TII . get ( LUi ) , ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; else BuildMI ( MBB , II , DL , TII . get ( Inst -> Opc ) , ATReg ) . addReg ( ZEROReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; for ( ++ Inst ; Inst != Seq . end ( ) ; ++ Inst ) BuildMI ( MBB , II , DL , TII . get (

Inst -> Opc ) , ATReg ) . addReg ( ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ;


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MFI -> hasVarSizedObjects


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF .


<s> if ( MF . getFrameInfo ( ) -> hasCalls (

) ) MRI . setPhysRegUsed ( <STR_LIT> ) ;


<s> const <ISA_LIT>InstrInfo & TII = * static_cast < const <ISA_LIT>InstrInfo * > ( MF . getTarget ( ) . getInstrInfo ( ) ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; unsigned SP = <STR_LIT> ; unsigned ADDiu = <STR_LIT> ; uint64_t StackSize = MFI -> getStackSize ( ) ; if ( ! StackSize ) return ; if ( isInt < <NUM_LIT> > ( StackSize ) ) BuildMI ( MBB , MBBI , dl , TII . get ( ADDiu ) , SP ) . addReg ( SP ) . addImm ( StackSize ) ; else assert ( <STR_LIT>


<s> DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; unsigned SP = <STR_LIT> ; unsigned ADDiu = <STR_LIT> ; unsigned StackAlign = getStackAlignment ( ) ; unsigned LocalVarAreaOffset = <ISA_LIT>FI -> getMaxCallFrameSize ( ) ; uint64_t StackSize = RoundUpToAlignment ( LocalVarAreaOffset , StackAlign ) + RoundUpToAlignment ( MFI -> getStackSize ( ) , StackAlign ) ; MFI -> setStackSize ( StackSize ) ; if ( StackSize == <NUM_LIT> && ! MFI -> adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; std :: vector < MachineMove > & Moves = MMI . getFrameMoves ( ) ; MachineLocation DstML , SrcML ; if ( isInt < <NUM_LIT> > ( - StackSize ) ) BuildMI ( MBB , MBBI , dl , TII . get ( ADDiu ) , SP ) . addReg ( SP ) . addImm ( - StackSize ) ; else { assert ( <STR_LIT> ) ; } MCSymbol * AdjustSPLabel = MMI . getContext ( ) . CreateTempSymbol ( ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: PROLOG_LABEL ) ) . addSym ( AdjustSPLabel ) ; DstML = MachineLocation ( MachineLocation :: VirtualFP ) ; SrcML = MachineLocation ( MachineLocation :: VirtualFP ,


<s> if ( StackSize == <NUM_LIT> && ! MFI -> adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; std :: vector < MachineMove > & Moves = MMI . getFrameMoves ( ) ; MachineLocation DstML , SrcML ; if ( isInt < <NUM_LIT> > ( - StackSize ) ) BuildMI ( MBB , MBBI , dl , TII . get ( ADDiu ) , SP ) . addReg ( SP ) . addImm ( - StackSize ) ; else { assert ( <STR_LIT> ) ; } MCSymbol * AdjustSPLabel = MMI . getContext ( ) . CreateTempSymbol ( ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: PROLOG_LABEL ) ) . addSym ( AdjustSPLabel ) ; DstML = MachineLocation ( MachineLocation :: VirtualFP ) ; SrcML = MachineLocation ( MachineLocation :: VirtualFP , - StackSize


<s> bool hasFP ( const MachineFunction & )


<s> const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetRegisterInfo * TRI = STI . getRegisterInfo ( ) ; return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MFI . hasVarSizedObjects ( ) || MFI . isFrameAddressTaken ( ) || TRI ->


<s> const <ISA_LIT>FrameLowering * <ISA_LIT>FrameLowering :: create (


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = & MF . getFrameInfo ( ) ; const TargetRegisterInfo * TRI = STI .


<s> case MCSymbolRefExpr :: VK_None : break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GPREL : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_CALL : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT16 : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_HI : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_LO : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_HI16 : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_LO16 : OS << <STR_LIT> ; break ; } OS << SRE -> getSymbol ( ) ; if ( Offset ) { if ( Offset > <NUM_LIT> ) OS << '+' ; OS << Offset ; } if ( ( Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_GPOFF_HI ) || ( Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_GPOFF_LO ) ) OS << <STR_LIT> ; else if ( Kind != MCSymbolRefExpr :: VK_None ) OS


<s> int Offset = <NUM_LIT> ; const MCSymbolRefExpr * SRE ; if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) { SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( BE -> getRHS ( ) ) ; assert ( SRE && CE && <STR_LIT> ) ; Offset = CE -> getValue ( ) ; } else if ( ! ( SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ) ) assert ( false && <STR_LIT> ) ; MCSymbolRefExpr :: VariantKind Kind = SRE -> getKind ( ) ; switch ( Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case MCSymbolRefExpr :: VK_None : break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GPREL : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_CALL : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT16 : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_HI : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_LO : OS << <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_HI16 : OS << <STR_LIT>


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot ) { printInstruction ( MI , O ) ; O << <STR_LIT> ; printAnnotation ( O , Annot )


<s> printMemOperand ( const MCInst * MI , int opNum , raw_ostream & O ) { O << <STR_LIT>


<s> void <ISA_LIT>InstPrinter :: printMemOperand ( const MCInst * MI , int OpNum , raw_ostream & O ) { printOperand ( MI , OpNum + <NUM_LIT> , O ) ; O << <STR_LIT> ; printOperand ( MI , OpNum ,


<s> void <ISA_LIT>InstPrinter :: printMemOperand ( const MCInst * MI , int OpNum , raw_ostream & O ) { printOperand ( MI , OpNum + <NUM_LIT> , O ) ; O << <STR_LIT> ; printOperand ( MI , OpNum , O ) ; O <<


<s> void <ISA_LIT>InstPrinter :: printUnsignedImm ( const MCInst * MI , int OpNum , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; if ( MO . isImm ( ) ) O << ( unsigned short int ) MO . getImm ( ) ; else printOperand ( MI , OpNum , O


<s> void <ISA_LIT>InstPrinter :: printUnsignedImm ( const MCInst * MI , int OpNum , raw_ostream & O ) { const MCOperand & MO = MI -> getOperand ( OpNum ) ; if ( MO . isImm ( ) ) O << ( unsigned short int ) MO . getImm ( ) ; else printOperand ( MI , OpNum


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot , const MCSubtargetInfo & STI ) { if ( ! printAliasInstr ( MI , O ) ) printInstruction ( MI , O


<s> printOperand ( MI , opNum + <NUM_LIT> , O ) ; O << <STR_LIT> ; printOperand ( MI , opNum , O


<s> printOperand ( MI , opNum + <NUM_LIT> , O ) ; O <<


<s> if ( MO . isImm ( ) ) O << ( unsigned short int ) MO .


<s> if ( MO . isImm ( ) ) O << ( unsigned short


<s> MachineInstrBuilder MIB = BuildMI ( MF , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIx ) . addImm ( <NUM_LIT> ) . addImm (


<s> switch ( MI -> getDesc ( ) . getOpcode ( ) ) { default : return false


<s> const <ISA_LIT>RegisterInfo & <ISA_LIT>InstrInfo :: getRegisterInfo ( ) const { return RI


<s> if ( I != MBB . end ( ) ) DL = I -> getDebugLoc ( ) ; MachineMemOperand * MMO = GetMemOperand ( MBB , FI , MachineMemOperand :: MOLoad ) ; unsigned Opc = <NUM_LIT> ; if ( <STR_LIT> . hasSubClassEq ( RC ) ) Opc = <STR_LIT> ; assert ( Opc && <STR_LIT> ) ; BuildMI ( MBB , I , DL , get ( Opc ) , DestReg ) . addFrameIndex ( FI )

. addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ;


<s> if ( <STR_LIT> . hasSubClassEq ( RC ) ) Opc = <STR_LIT> ; assert ( Opc && <STR_LIT> ) ; BuildMI ( MBB , I , DL , get ( Opc ) , DestReg ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) .


<s> if ( <STR_LIT> . hasSubClassEq ( RC ) ) Opc = <STR_LIT> ; assert ( Opc && <STR_LIT> ) ; BuildMI ( MBB , I , DL , get ( Opc ) ) . addReg ( SrcReg , getKillRegState ( isKill

) ) . addFrameIndex ( FI ) . addImm ( <NUM_LIT> ) . addMemOperand ( MMO ) ;


<s> if ( <STR_LIT> . contains ( DestReg ) ) { if ( <STR_LIT> . contains ( SrcReg ) ) Opc = <STR_LIT> , ZeroReg = <STR_LIT> ; else if ( SrcReg == <STR_LIT> ) Opc = <STR_LIT> , SrcReg = <NUM_LIT> ; else if ( SrcReg == <STR_LIT> ) Opc = <STR_LIT> , SrcReg = <NUM_LIT> ; else if ( SrcReg == <STR_LIT> ) Opc = <STR_LIT> , ZeroReg = <STR_LIT> ; } else if ( <STR_LIT> . contains ( SrcReg ) ) { if ( DestReg == <STR_LIT> ) Opc = <STR_LIT> , DestReg = <NUM_LIT> ; else if ( DestReg == <STR_LIT> ) Opc =


<s> return getInlineAsmLength ( AsmStr , * MF -> getTarget ( ) . getMCAsmInfo ( ) ) ; } default : return MI . getDesc ( ) .


<s> const char * AsmStr = MI . getOperand ( <NUM_LIT> ) . getSymbolName ( ) ; return getInlineAsmLength ( AsmStr , * MF -> getTarget ( ) .


<s> const <ISA_LIT>InstrInfo * <ISA_LIT>InstrInfo :: create


<s> void loadRegFromStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MBBI , unsigned DestReg , int FrameIndex , const TargetRegisterClass

* RC , const TargetRegisterInfo * TRI ) const override {


<s> void storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MBBI , unsigned SrcReg , bool isKill , int FrameIndex , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const override { storeRegToStack ( MBB , MBBI , SrcReg , isKill , FrameIndex


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine &


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine


<s> inline SDValue getImm ( const SDNode * Node , unsigned


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( )


<s> virtual const char * getPassName ( ) const { return <STR_LIT>


<s> if ( HasLo ) { Lo = CurDAG -> getMachineNode ( <STR_LIT> , dl , Ty , <STR_LIT> , InFlag ) ; InFlag = SDValue ( Lo , <NUM_LIT> ) ; } if ( HasHi ) Hi = CurDAG -> getMachineNode ( <STR_LIT> , dl


<s> return new <ISA_LIT>DAGToDAGISel ( TM


<s> FunctionPass * create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM ) { return new <ISA_LIT>DAGToDAGISel


<s> if ( VT == <STR_LIT> ) return false ; } } if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , ValTy ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , ValTy ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> ) { Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = Addr . getOperand ( <NUM_LIT> ) ; return true ; } if ( TM . getRelocationModel ( ) != Reloc :: PIC_ ) { if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) ) return false ; } if ( CurDAG -> isBaseWithConstantOffset ( Addr ) ) { ConstantSDNode * CN = dyn_cast < ConstantSDNode > ( Addr . getOperand ( <NUM_LIT> ) ) ; if ( isInt < <NUM_LIT> > ( CN -> getSExtValue ( ) ) ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr . getOperand ( <NUM_LIT> )

) ) Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , ValTy ) ;


<s> } } if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , ValTy ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , ValTy ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> ) { Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = Addr . getOperand ( <NUM_LIT> ) ; return true ; } if ( TM . getRelocationModel ( ) != Reloc :: PIC_ ) { if ( ( Addr . getOpcode ( ) == <STR_LIT> || Addr

. getOpcode ( ) == <STR_LIT> ) ) return false ;


<s> case InlineAsm :: Constraint_m : OutOps . push_back ( Op ) ; return false ; } return true


<s> inline SDValue getImm ( const SDNode * Node , unsigned Imm ) { return CurDAG -> getTargetConstant ( Imm , SDLoc ( Node ) , Node ->


<s> inline SDValue getImm ( const SDNode * Node ,


<s> StringRef getPassName ( ) const override { return


<s> return static_cast < const <ISA_LIT>TargetMachine


<s> bool Ret = SelectionDAGISel :: runOnMachineFunction ( MF ) ; return Ret


<s> if ( Node -> isMachineOpcode ( ) ) { LLVM_DEBUG ( errs ( ) << <STR_LIT> ; Node -> dump ( CurDAG ) ; errs ( ) << <STR_LIT> ) ; Node -> setNodeId ( - <NUM_LIT> ) ; return ; } if ( trySelect ( Node ) ) return ; switch ( Opcode )


<s> if ( VT . getSizeInBits ( ) / <NUM_LIT> > LS -> getAlignment ( ) ) { assert ( <STR_LIT> ) ; if ( VT == <STR_LIT> ) return false ; } } if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , ValTy ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , ValTy ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> ) { Base = Addr . getOperand ( <NUM_LIT> ) ; Offset = Addr . getOperand


<s> static unsigned AddLiveIn ( MachineFunction & MF , unsigned PReg , const TargetRegisterClass * RC ) { assert ( RC -> contains ( PReg ) &&


<s> AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setTargetDAGCombine ( <STR_LIT> ) ; setTargetDAGCombine ( <STR_LIT>


<s> AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT>


<s> SDValue Tgt = DAG . getNode ( <STR_LIT> , DL , Ty , getGlobalReg ( DAG , Ty ) , getTargetNode ( Op , DAG , Flag ) ) ; return DAG . getLoad ( Ty , DL , DAG . getEntryNode ( ) , Tgt , MachinePointerInfo

:: getGOT ( ) , false , false , false , <NUM_LIT> ) ;


<s> SDValue <ISA_LIT>TargetLowering :: getGlobalReg ( SelectionDAG & DAG


<s> if ( JumpTableSDNode * N = dyn_cast < JumpTableSDNode > ( Op ) ) return DAG . getTargetJumpTable ( N -> getIndex ( ) , Ty , Flag ) ; if ( ConstantPoolSDNode * N = dyn_cast < ConstantPoolSDNode > ( Op ) ) return DAG . getTargetConstantPool ( N -> getConstVal ( ) , Ty , N -> getAlignment ( ) , N -> getOffset


<s> LowerBRCOND ( SDValue Op , SelectionDAG &


<s> SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; int FirstFI = - MFI -> getNumFixedObjects ( ) - <NUM_LIT> , LastFI = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { SDValue Arg = OutVals [ i ] ; CCValAssign & VA = ArgLocs [ i ] ; MVT ValVT = VA . getValVT ( ) ; <STR_LIT> Flags = Outs [ i ] . Flags ; if ( Flags . isByVal ( ) ) { assert ( <STR_LIT> ) ; assert ( Flags . getByValSize ( ) && <STR_LIT> ) ; WriteByValArg ( ByValChain , Chain , dl , RegsToPass , MemOpChains , LastFI , MFI , DAG , Arg , VA , Flags , getPointerTy ( ) , Subtarget -> isLittle ( ) ) ; continue ; } if ( VA . isMemLoc ( ) ) { LastFI = MFI -> CreateFixedObject ( ValVT . getSizeInBits ( ) / <NUM_LIT> , VA . getLocMemOffset ( ) , true ) ; SDValue PtrOff = DAG . getFrameIndex ( LastFI , getPointerTy ( ) ) ; MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; } else { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; } } if ( LastFI ) <ISA_LIT>FI -> extendOutArgFIRange ( FirstFI , LastFI ) ; if ( InChain != ByValChain ) DAG . UpdateNodeOperands ( CallSeqStart . getNode ( ) , ByValChain , NextStackOffsetVal ) ; if ( ! MemOpChains . empty ( ) ) Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , & MemOpChains [ <NUM_LIT> ] , MemOpChains . size ( ) ) ; SDValue InFlag


<s> for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { Chain = DAG . getCopyFromReg ( Chain , dl , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getValVT ( ) , InFlag ) . getValue ( <NUM_LIT> ) ; InFlag = Chain . getValue


<s> InVals . push_back ( FIN ) ; ReadByValArg ( MF , Chain , dl , OutChains , DAG , NumWords , FIN , VA , Flags , & * FuncArg ) ; continue ; } if ( VA . isRegLoc ( ) ) { unsigned VReg = MF . getRegInfo ( ) . createVirtualRegister ( getRegClassFor ( <STR_LIT> ) ) ; MF . getRegInfo ( ) . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue Arg = DAG . getCopyFromReg ( Chain , dl , VReg , <STR_LIT> ) ; InVals . push_back ( Arg ) ; continue ; } assert ( VA . isMemLoc ( ) ) ; LastFI = MFI -> CreateFixedObject ( ValVT . getSizeInBits ( ) / <NUM_LIT> , VA . getLocMemOffset ( ) , true ) ; SDValue FIN = DAG . getFrameIndex ( LastFI , getPointerTy ( ) ) ; InVals . push_back ( DAG . getLoad ( ValVT , dl , Chain , FIN , MachinePointerInfo :: getFixedStack ( LastFI ) , false , false , false , <NUM_LIT> ) ) ; } if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) { unsigned Reg = <ISA_LIT>FI -> getSRetReturnReg ( ) ; if ( ! Reg ) { Reg = MF . getRegInfo ( ) . createVirtualRegister ( getRegClassFor ( <STR_LIT> ) ) ; <ISA_LIT>FI -> setSRetReturnReg ( Reg ) ; } SDValue Copy = DAG . getCopyToReg ( DAG . getEntryNode ( ) , dl , Reg , InVals [ <NUM_LIT> ] ) ; Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Copy , Chain ) ; } if ( isVarArg ) { unsigned RegSize = <STR_LIT> . getSize ( ) ; int FirstVaArgOffset = RegSize ; LastFI = MFI -> CreateFixedObject ( RegSize , FirstVaArgOffset , true ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( LastFI ) ; } <ISA_LIT>FI -> setLastInArgFI ( LastFI ) ; if ( ! OutChains .


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc


<s> assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ <NUM_LIT> ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) { assert ( false && <STR_LIT> ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) RetOps . push_back ( Flag ) ; return DAG . getNode ( RVLocs . size ( ) == <NUM_LIT> ? <STR_LIT> : <STR_LIT> , dl , <STR_LIT> , & RetOps


<s> MachineFunction & MF = DAG . getMachineFunction ( ) ; <ISA_LIT>FunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; DebugLoc dl = Op . getDebugLoc ( ) ; SDValue FI = DAG . getFrameIndex ( FuncInfo ->

getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ;


<s> DebugLoc dl = Op . getDebugLoc ( ) ; SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ; const Value * SV = cast < SrcValueSDNode > ( Op

. getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;


<s> default : break ; case <STR_LIT> : case <STR_LIT> : return PerformDivRemCombine ( N , DAG , DCI , Subtarget


<s> SDValue InGlue = DivRem ; if ( N -> hasAnyUseOfValue ( <NUM_LIT> ) ) { SDValue CopyFromLo = DAG . getCopyFromReg ( InChain , dl , LO , Ty , InGlue ) ; DAG . ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , CopyFromLo ) ; InChain = CopyFromLo . getValue ( <NUM_LIT> ) ; InGlue = CopyFromLo . getValue ( <NUM_LIT> ) ; } if ( N -> hasAnyUseOfValue


<s> unsigned ByValAlign = Flags . getByValAlign ( ) ; if ( RemainingSize == <NUM_LIT> ) return ; SDValue Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Arg , DAG . getConstant ( Offset , <STR_LIT> ) ) ; LastFI = MFI -> CreateFixedObject ( RemainingSize , LocMemOffset , true ) ; SDValue Dst = DAG . getFrameIndex ( LastFI , PtrType ) ; ByValChain = DAG . getMemcpy ( ByValChain , dl , Dst , Src , DAG . getConstant ( RemainingSize , <STR_LIT> ) , std :: min ( ByValAlign , ( unsigned ) <NUM_LIT> ) , false , false , MachinePointerInfo (

<NUM_LIT> ) , MachinePointerInfo ( <NUM_LIT> ) ) ;


<s> <ISA_LIT>FunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>FunctionInfo > ( ) ; return DAG . getRegister ( FI ->


<s> static SDValue GetGlobalReg ( SelectionDAG & DAG , EVT Ty ) { <ISA_LIT>FunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>FunctionInfo > ( ) ; return DAG . getRegister ( FI ->


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT>


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> :


<s> SDValue <ISA_LIT>TargetLowering :: LowerCall ( TargetLowering :: CallLoweringInfo & CLI ,

SmallVectorImpl < SDValue > & InVals ) const {


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( <NUM_LIT> ) ; std :: vector < SDValue > OutChains ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; Function :: const_arg_iterator FuncArg = DAG . getMachineFunction ( ) . getFunction ( ) -> arg_begin ( ) ; int LastFI = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i , ++ FuncArg ) { CCValAssign & VA = ArgLocs [ i ] ; EVT ValVT = VA . getValVT ( ) ; <STR_LIT> Flags = Ins [ i ] . Flags ; bool IsRegLoc = VA . isRegLoc ( ) ; if ( Flags . isByVal (


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; if ( getTargetMachine ( ) . getRelocationModel ( ) != Reloc :: PIC_ ) { SDVTList VTs = DAG . getVTList ( <STR_LIT> ) ; <ISA_LIT>TargetObjectFile & TLOF = ( <ISA_LIT>TargetObjectFile & ) getObjFileLowering ( ) ; if ( TLOF . IsGlobalInSmallSection ( GV , getTargetMachine ( ) ) ) { SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GPRelNode = DAG . getNode ( <STR_LIT> , dl , VTs , & GA , <NUM_LIT> ) ; SDValue GOT = DAG . getGLOBAL_OFFSET_TABLE ( <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GOT , GPRelNode ) ; } SDValue GAHi = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GALo = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue HiPart = DAG . getNode ( <STR_LIT> , dl , VTs , & GAHi , <NUM_LIT> ) ; SDValue Lo = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GALo ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , HiPart , Lo ) ; } EVT ValTy = Op . getValueType ( ) ; bool HasGotOfst = ( GV -> hasInternalLinkage ( ) || ( GV -> hasLocalLinkage ( ) && ! isa < Function > ( GV ) ) ) ; unsigned GotFlag = ( HasGotOfst ? <STR_LIT> : <STR_LIT> ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , ValTy , <NUM_LIT> , GotFlag ) ; GA = DAG . getNode ( <STR_LIT> , dl , ValTy , GetGlobalReg ( DAG , ValTy ) , GA ) ; SDValue ResNode = DAG . getLoad ( ValTy , dl , DAG . getEntryNode ( ) , GA , MachinePointerInfo ( ) , false , false , false , <NUM_LIT> ) ; if ( ! HasGotOfst ) return


<s> switch ( Op . getOpcode ( ) ) { case <STR_LIT> : return LowerBRCOND ( Op , DAG ) ; case <STR_LIT> : return LowerGlobalAddress ( Op , DAG


<s> SDValue <ISA_LIT>TargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Outs

, const SmallVectorImpl < SDValue > & OutVals , DebugLoc dl , SelectionDAG & DAG ) const {


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setTargetDAGCombine ( <STR_LIT> ) ; setTargetDAGCombine ( <STR_LIT> ) ; setBooleanContents ( ZeroOrOneBooleanContent ) ; setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ; for ( MVT VT : <STR_LIT> ( ) ) { setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; } AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT>


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT>


<s> const <ISA_LIT>TargetLowering * <ISA_LIT>TargetLowering :: create ( const <ISA_LIT>TargetMachine & TM , const


<s> const <ISA_LIT>TargetLowering * <ISA_LIT>TargetLowering :: create ( const <ISA_LIT>TargetMachine & TM


<s> return DAG . getRegister ( FI -> getGlobalBaseReg ( )


<s> SDValue <ISA_LIT>TargetLowering :: getGlobalReg ( SelectionDAG & DAG , EVT Ty ) const { <ISA_LIT>MachineFunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; return DAG . getRegister ( FI -> getGlobalBaseReg ( )


<s> } if ( IsPICCall && ! InternalLinkage ) { unsigned GPReg = <STR_LIT> ; EVT Ty = <STR_LIT> ; RegsToPass . push_back ( std :: make_pair ( GPReg , getGlobalReg ( CLI . DAG , Ty ) ) ) ; } SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = CLI . DAG . getCopyToReg ( Chain , CLI . DL , RegsToPass [ i ]

. first , RegsToPass [ i ] . second , InFlag ) ;


<s> switch ( Constraint [ <NUM_LIT> ] ) { case 'r' : if ( VT == <STR_LIT> || VT == <STR_LIT> || VT == <STR_LIT> ) { return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; return std :: make_pair ( <NUM_LIT> , static_cast < const TargetRegisterClass * > ( <NUM_LIT> ) ) ; case 'c' : if ( VT == <STR_LIT> ) return std :: make_pair ( ( unsigned ) <STR_LIT> , & <STR_LIT> ) ; assert ( false && <STR_LIT> )


<s> <ISA_LIT>TargetLowering :: <STR_LIT> <ISA_LIT>TargetLowering :: getSpecialCallingConv ( SDValue Callee ) const { <STR_LIT> SpecialCallConv = <STR_LIT> ; return SpecialCallConv


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT>


<s> bool <ISA_LIT>TargetLowering :: isOffsetFoldingLegal ( const GlobalAddressSDNode * GA ) const { return


<s> bool <ISA_LIT>TargetLowering :: isOffsetFoldingLegal ( const GlobalAddressSDNode * GA ) const { return false


<s> BlockAddressSDNode * N = cast < BlockAddressSDNode > ( Op ) ; EVT Ty = Op . getValueType ( ) ; if ( ! isPositionIndependent ( ) ) return getAddrNonPIC ( N , Ty , DAG ) ; return getAddrLocal ( N ,


<s> SDValue <ISA_LIT>TargetLowering :: lowerBRCOND ( SDValue Op , SelectionDAG


<s> SelectionDAG & DAG = CLI . DAG ; SDLoc DL = CLI . DL ; SmallVectorImpl < <STR_LIT> > & Outs = CLI . Outs ; SmallVectorImpl < SDValue > & OutVals = CLI . OutVals ; SmallVectorImpl < <STR_LIT> > & Ins = CLI . Ins ; SDValue Chain = CLI . Chain ; SDValue Callee = CLI . Callee ; bool & IsTailCall = CLI . IsTailCall ; CallingConv :: ID CallConv = CLI . CallConv ; bool IsVarArg = CLI . IsVarArg ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering * TFL = MF . getSubtarget ( ) . getFrameLowering ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; bool IsPIC = isPositionIndependent ( ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; <STR_LIT> SpecialCallingConv = getSpecialCallingConv ( Callee ) ; <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo , SpecialCallingConv ) ; <ISA_LIT>CCInfo . analyzeCallOperands ( Outs , IsVarArg , Subtarget . abiUsesSoftFloat ( ) , Callee . getNode ( ) , CLI . getArgs ( ) ) ; unsigned NextStackOffset = CCInfo . getNextStackOffset ( ) ; if ( IsTailCall ) IsTailCall = isEligibleForTailCallOptimization ( <ISA_LIT>CCInfo , NextStackOffset , * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ) ; if ( ! IsTailCall && CLI . CS && CLI . CS . isMustTailCall ( ) ) report_fatal_error ( <STR_LIT> <STR_LIT> ) ; if ( IsTailCall ) ++ NumTailCalls ; unsigned StackAlignment = TFL -> getStackAlignment ( ) ; NextStackOffset = alignTo ( NextStackOffset , StackAlignment ) ; SDValue NextStackOffsetVal = DAG . getIntPtrConstant ( NextStackOffset , DL , true ) ; if ( ! IsTailCall ) Chain = DAG . getCALLSEQ_START ( Chain , NextStackOffset , <NUM_LIT> , DL ) ; SDValue StackPtr = DAG . getCopyFromReg ( Chain , DL , <STR_LIT> , getPointerTy ( DAG . getDataLayout ( ) ) ) ; std :: deque < std :: pair < unsigned , SDValue >> RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; <STR_LIT> ByValArg = <ISA_LIT>CCInfo


<s> const GlobalValue * GV = N -> getGlobal ( ) ; const GlobalObject * GO = GV -> getBaseObject ( ) ; if ( ! isPositionIndependent ( ) ) { if ( GO && TLOF -> IsGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) { SDValue GA = DAG . getTargetGlobalAddress ( GV , DL , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GPRelNode = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( <STR_LIT> ) , GA ) ; SDValue GPReg = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> ,


<s> SDValue <ISA_LIT>TargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const { switch ( Op . getOpcode ( ) ) { case <STR_LIT> : return lowerBRCOND ( Op , DAG ) ; case <STR_LIT> : return lowerBlockAddress ( Op , DAG ) ; case <STR_LIT> : return lowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return lowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return lowerSELECT ( Op , DAG ) ; } return SDValue ( )


<s> SDValue <ISA_LIT>TargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , const SmallVectorImpl < SDValue > & OutsVals , const SDLoc & DL , SelectionDAG & DAG ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; MachineFunction & MF = DAG . getMachineFunction ( ) ; CCState CCInfo ( CallConv , IsVarArg , MF , RVLocs , * DAG . getContext ( ) ) ; <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo ) ; <ISA_LIT>CCInfo . analyzeReturn ( Outs , Subtarget . abiUsesSoftFloat ( ) , MF . getFunction ( ) . getReturnType ( ) ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { SDValue Val = OutsVals [ i ] ; CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; if ( RVLocs [ i ] . getValVT ( ) != RVLocs [ i ] . getLocVT ( ) ) Val = DAG . getNode ( <STR_LIT> , DL , RVLocs [ i ] . getLocVT ( ) , Val ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) { <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned Reg = <ISA_LIT>FI -> getSRetReturnReg ( ) ; if ( ! Reg ) llvm_unreachable ( <STR_LIT> ) ; SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ; unsigned V0 = <STR_LIT> ; Chain = DAG . getCopyToReg ( Chain , DL , V0


<s> SDValue <ISA_LIT>TargetLowering :: lowerSELECT ( SDValue Op , SelectionDAG &


<s> I = std :: find_if ( B , E , isdigit ) ; Prefix . assign ( B , I - B ) ; if ( I == E ) return std :: make_pair ( true , false ) ; return std :: make_pair ( ! getAsUnsignedInteger ( StringRef ( I , E - I ) ,


<s> const TargetRegisterClass * RC ; std :: string Prefix ; unsigned long long Reg ; std :: pair < bool , bool > R = parsePhysicalReg ( C , Prefix , Reg ) ; if ( ! R . first ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; if ( ! R . second ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; assert ( Prefix == <STR_LIT> ) ; RC = getRegClassFor ( ( VT == <STR_LIT> ) ? <STR_LIT> : VT ) ; assert ( Reg < RC -> getNumRegs ( ) ) ; return std :: make_pair ( * ( RC -> begin ( ) + Reg ) ,


<s> static unsigned addLiveIn ( MachineFunction & MF , unsigned PReg , const TargetRegisterClass * RC ) { unsigned VReg = MF . getRegInfo ( ) .


<s> unsigned VReg = MF . getRegInfo ( ) . createVirtualRegister ( RC ) ; MF . getRegInfo ( ) . addLiveIn ( PReg , VReg ) ; return VReg


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const { SmallVector < CCValAssign , <NUM_LIT> >


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , IsVarArg ,


<s> bool isI64 = ( ValVT == <STR_LIT> && OrigAlign == <NUM_LIT> ) ; if ( ValVT == <STR_LIT> || ( ValVT == <STR_LIT> && AllocateFloatsInIntReg ) ) { Reg = State . AllocateReg ( IntRegs ) ; if ( isI64 && ( Reg == <STR_LIT> ) ) Reg = State . AllocateReg ( IntRegs ) ; LocVT = <STR_LIT> ; } else if ( ValVT == <STR_LIT> && AllocateFloatsInIntReg ) { Reg = State . AllocateReg ( IntRegs ) ; if ( Reg == <STR_LIT> ) Reg = State . AllocateReg ( IntRegs ) ; State . AllocateReg ( IntRegs ) ; LocVT = <STR_LIT> ; } else llvm_unreachable ( <STR_LIT> ) ; if ( ! Reg ) { unsigned Offset = State . AllocateStack ( ValVT . getSizeInBits ( ) >> <NUM_LIT> , OrigAlign ) ; State . addLoc ( CCValAssign :: getMem ( ValNo , ValVT


<s> int FI = MFI . CreateFixedObject ( FrameObjSize , FrameObjOffset , true ) ; SDValue FIN = DAG . getFrameIndex ( FI , PtrTy ) ; InVals . push_back ( FIN ) ; if ( ! ByVal . NumRegs ) return ; MVT RegTy = <STR_LIT> ( CC . regSize ( ) * <NUM_LIT> ) ; const TargetRegisterClass * RC = getRegClassFor ( RegTy ) ; for ( unsigned I = <NUM_LIT> ; I < ByVal . NumRegs ; ++ I ) { unsigned ArgReg = ByValArgRegs [ ByVal . FirstIdx + I ] ; unsigned VReg = addLiveIn ( MF , ArgReg , RC ) ; unsigned Offset = I * CC . regSize ( ) ; SDValue StorePtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , FIN , DAG . getConstant ( Offset , DL , PtrTy ) ) ; SDValue Store = DAG . getStore ( Chain , DL , DAG . getRegister ( VReg , RegTy ) , StorePtr , MachinePointerInfo ( FuncArg , Offset ) ) ; OutChains . push_back


<s> XOR = <STR_LIT> ; ZERO = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Incr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loopMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loopMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( exitMBB ) ; BB = loopMBB ; BuildMI ( BB , DL , TII -> get ( LL ) , OldVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; if ( Nand ) { BuildMI ( BB , DL , TII -> get ( AND ) , AndRes ) . addReg ( OldVal ) . addReg ( Incr ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , StoreVal ) . addReg ( ZERO ) . addReg ( AndRes ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , AndRes2 ) . addReg ( ZERO ) . addReg ( AndRes ) ; } else if ( BinOpcode ) { BuildMI ( BB , DL , TII -> get ( BinOpcode ) , StoreVal ) . addReg ( OldVal ) . addReg ( Incr ) ; } else { StoreVal =


<s> DebugLoc DL = MI . getDebugLoc ( ) ; unsigned LL , SC , AND , XOR , ZERO , BEQ ; LL = <STR_LIT> ; SC = <STR_LIT> ; AND = <STR_LIT> ; XOR = <STR_LIT> ; ZERO = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Incr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loopMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loopMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( exitMBB ) ; BB = loopMBB ; BuildMI ( BB , DL , TII -> get ( LL ) , OldVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; if ( Nand ) { BuildMI ( BB , DL , TII -> get ( AND ) , AndRes ) . addReg ( OldVal ) . addReg ( Incr ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , StoreVal ) . addReg ( ZERO ) . addReg ( AndRes ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , AndRes2 ) . addReg ( ZERO ) . addReg ( AndRes ) ; } else if ( BinOpcode ) { BuildMI ( BB , DL , TII -> get ( BinOpcode ) , StoreVal ) . addReg ( OldVal ) . addReg ( Incr ) ; } else


<s> exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( exitMBB ) ; loop1MBB -> addSuccessor ( loop2MBB ) ; loop2MBB -> addSuccessor ( loop1MBB ) ; loop2MBB -> addSuccessor ( exitMBB ) ; BB = loop1MBB ; BuildMI ( BB , DL , TII -> get ( LL ) , Dest ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; BuildMI ( BB , DL , TII -> get ( BNE ) ) . addReg ( Dest ) . addReg ( OldVal ) . addMBB ( exitMBB ) ; BB = loop2MBB ; BuildMI ( BB , DL , TII -> get ( SC ) , Success ) . addReg ( NewVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; BuildMI ( BB , DL , TII -> get ( BEQ ) ) . addReg (

Success ) . addReg ( ZERO ) . addMBB ( loop1MBB ) ;


<s> ZERO = <STR_LIT> ; BNE = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned Dest = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned NewVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loop1MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * loop2MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loop1MBB ) ; MF -> insert ( It , loop2MBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( exitMBB ) ; loop1MBB -> addSuccessor ( loop2MBB ) ; loop2MBB -> addSuccessor ( loop1MBB ) ; loop2MBB -> addSuccessor ( exitMBB


<s> MachineFunction * MF = BB -> getParent ( ) ; MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetRegisterClass * RC = getRegClassFor ( <STR_LIT> ) ; const TargetInstrInfo * TII = Subtarget . getInstrInfo ( ) ; DebugLoc DL = MI . getDebugLoc ( ) ; unsigned Dest = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned CmpVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned NewVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned AlignedAddr = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftAmt = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask3 = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftedCmpVal = RegInfo . createVirtualRegister ( RC ) ; unsigned OldVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedOldVal0 = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftedNewVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskLSB2 = RegInfo . createVirtualRegister ( RC ) ; unsigned PtrLSB2 = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskUpper = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedCmpVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedNewVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedOldVal1 = RegInfo . createVirtualRegister ( RC ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned SrlRes = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loop1MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * loop2MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * sinkMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loop1MBB ) ; MF -> insert ( It , loop2MBB ) ; MF -> insert ( It , sinkMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( sinkMBB ) ; loop1MBB -> addSuccessor ( loop2MBB


<s> return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> ) ; case <STR_LIT>


<s> unsigned ScrReg = RegInfo . createVirtualRegister ( RC ) ; assert ( Size < <NUM_LIT> ) ; int64_t ShiftImm = <NUM_LIT> - ( Size * <NUM_LIT> ) ; BuildMI ( BB , DL , TII -> get ( <STR_LIT> ) , ScrReg ) . addReg ( SrcReg ) . addImm ( ShiftImm ) ; BuildMI ( BB , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( ScrReg


<s> SDValue Tgt = DAG . getNode ( <STR_LIT> , DL , Ty , getGlobalReg ( DAG , Ty ) , getTargetNode ( N ,


<s> SDLoc DL ( N ) ; SDValue Tgt = DAG . getNode ( <STR_LIT> , DL , Ty , getGlobalReg ( DAG , Ty ) , getTargetNode ( N , Ty , DAG , Flag ) ) ; return DAG . getLoad ( Ty , DL , Chain , Tgt ,


<s> SDLoc DL ( N ) ; SDValue Hi = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ; SDValue Lo = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , Ty , DAG . getNode ( <STR_LIT> , DL , Ty , Hi ) , DAG . getNode (


<s> const CCState & getCCInfo ( ) const { return CCInfo


<s> <ISA_LIT>TargetLowering :: ConstraintType <ISA_LIT>TargetLowering :: getConstraintType ( StringRef Constraint ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { default : break ; case 'c' : return C_RegisterClass


<s> return DAG . getRegister ( FI -> getGlobalBaseReg ( ) , Ty


<s> return DAG . getRegister ( FI -> getGlobalBaseReg ( ) ,


<s> unsigned T9Reg = <STR_LIT> ; RegsToPass . push_front ( std :: make_pair ( T9Reg , Callee ) ) ; } else Ops . push_back ( Callee ) ; if ( IsPICCall && ! InternalLinkage ) { unsigned GPReg = <STR_LIT> ; EVT Ty = <STR_LIT> ; RegsToPass . push_back ( std :: make_pair ( GPReg , getGlobalReg ( CLI . DAG , Ty ) ) ) ; } SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) { Chain = CLI . DAG . getCopyToReg ( Chain , CLI . DL , RegsToPass [ i ] . first , RegsToPass


<s> EVT <ISA_LIT>TargetLowering :: getSetCCResultType ( const DataLayout & , LLVMContext &


<s> if ( ! VT . isVector ( ) ) return <STR_LIT> ; return VT . changeVectorElementTypeToInteger


<s> break ; case 'I' : case 'J' : case 'K' : case 'L' : case 'N' : case 'O' : case 'P' : if ( isa < ConstantInt > ( CallOperandVal ) ) weight = CW_Constant ; break ; case 'R'


<s> <ISA_LIT>TargetLowering :: <STR_LIT> <ISA_LIT>TargetLowering :: getSpecialCallingConv ( SDValue Callee )


<s> <ISA_LIT>TargetLowering :: <STR_LIT> <ISA_LIT>TargetLowering :: getSpecialCallingConv ( SDValue Callee ) const { <STR_LIT> SpecialCallingConv = <STR_LIT> ; return SpecialCallingConv


<s> return DAG . getTargetJumpTable ( N -> getIndex


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; default : return


<s> bool hasByValArg ( ) const { return ! ByValArgs . empty


<s> if ( AM . BaseGV ) return false ; switch ( AM . Scale ) { case <NUM_LIT> : break ; case <NUM_LIT> : if ( ! AM . HasBaseReg )


<s> bool <ISA_LIT>TargetLowering :: isOffsetFoldingLegal ( const GlobalAddressSDNode * GA )


<s> if ( Op -> getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || cast < ConstantSDNode > ( Op -> getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) != <NUM_LIT> || Op -> getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ; MachineFunction & MF = DAG . getMachineFunction ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; <ISA_LIT>FI -> setCallsEhDwarf


<s> } } return ; case 'J' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getZExtValue ( ) ; if ( Val == <NUM_LIT> ) { Result = DAG . getTargetConstant ( <NUM_LIT> , DL , Type ) ; break ; } } return ; case 'K' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( isUInt < <NUM_LIT> > ( Val ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'L' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) && ( ( Val & <NUM_LIT> ) == <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'N' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( Val >= - <NUM_LIT> ) && ( Val <= - <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'O' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'P' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op