<s> const uint8_t ABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; return new ELF<ISA_LIT>AsmBackend ( T , TT . getTriple ( ) , ABI ) ;


<s> void relaxInstruction ( const MCInst & Inst , MCInst & Res ) const override {


const uint8_t ABI = MCELFObjectTargetWriter :: getOSABI ( Triple ( TT ) . getOS ( ) ) ;


<s> MCObjectWriter * createObjectWriter ( raw_ostream & OS ) const override { return create<ISA_LIT>ELFObjectWriter ( OS , OSABI ) ;


<s> return create<ISA_LIT>ELFObjectWriter ( OS , OSABI ) ;


<s> switch ( Kind ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Value >>= <NUM_LIT> ; case <STR_LIT> : unsigned Hi4 = ( Value & <NUM_LIT> ) >> <NUM_LIT> ; unsigned Lo12 = Value & <NUM_LIT> ; Value = ( Hi4 << <NUM_LIT> ) | ( Lo12 ) ; return Value ; }


<s> for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) {

Data [ Offset + i ] |= uint8_t ( ( Value >> ( i * <NUM_LIT> ) ) & <NUM_LIT> ) ;


<s> unsigned Offset = Fixup . getOffset ( ) ; assert ( Offset + NumBytes <= DataSize && <STR_LIT> ) ;

for ( unsigned i = <NUM_LIT> ; i != NumBytes ; ++ i ) {


<s> MCAsmBackend * llvm :: create<ISA_LIT>AsmBackend ( const Target & T , const MCRegisterInfo & MRI , const Triple & TT , StringRef CPU , const MCTargetOptions & Options ) { const uint8_t ABI = MCELFObjectTargetWriter :: getOSABI ( TT . getOS ( ) ) ; return new ELF<ISA_LIT>AsmBackend ( T , TT . getTriple ( ) , ABI ) ;


<s> ELF<ISA_LIT>AsmBackend ( const Target & T , const StringRef TT , uint8_t _OSABI ) : <ISA_LIT>AsmBackend ( T , TT ) , OSABI ( _OSABI ) {


<s> bool fixupNeedsRelaxation ( const MCFixup & Fixup , uint64_t Value , const MCRelaxableFragment * DF , const MCAsmLayout & Layout ) const override {


<s> const static MCFixupKindInfo Infos [ <STR_LIT> ] = { { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , { <STR_LIT> , <NUM_LIT> , <NUM_LIT> , MCFixupKindInfo :: FKF_IsPCRel } , } ; if ( Kind < FirstTargetFixupKind ) { return MCAsmBackend :: getFixupKindInfo ( Kind ) ; } assert ( unsigned ( Kind - FirstTargetFixupKind ) < getNumFixupKinds ( ) && <STR_LIT> ) ; return Infos [ Kind - FirstTargetFixupKind ] ;


<s> unsigned getNumFixupKinds ( ) const override { return <STR_LIT> ;


<s> <ISA_LIT>AsmBackend ( const Target & T , const StringRef TT ) : MCAsmBackend ( ) {


<s> <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_ARM , false ) {


<s> IsResolved = true ; ( void ) adjustFixupValue ( Fixup , Value , & Asm . getContext ( ) ) ;


<s> void relaxInstruction ( const MCInst & Inst , const MCSubtargetInfo & STI , MCInst & Res ) const override {


<s> bool writeNopData ( uint64_t Count , MCObjectWriter * OW ) const override { if ( Count == <NUM_LIT> ) { return true ; }


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionBodyStart ( ) { MCInstLowering . Initialize ( Mang , & MF -> getContext ( ) ) ;


<s> virtual const char * getPassName ( ) const {


<s> void <ISA_LIT>AsmPrinter :: EmitFunctionEntryLabel ( ) {

OutStreamer . EmitLabel ( CurrentFnSym ) ;


MCInstLowering . Lower ( MI , TmpInst ) ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , MCStreamer & Streamer ) : AsmPrinter ( TM , Streamer ) , Subtarget ( TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ) , MCInstLowering ( * this ) {


<s> MCInstLowering . Initialize ( & TM . getObjFileLowering ( ) -> getMangler ( ) , & MF -> getContext ( ) ) ;


<s> OutStreamer -> EmitLabel ( CurrentFnSym ) ;


<s> virtual StringRef getPassName ( ) const { return StringRef ( <STR_LIT> ) ;


<s> explicit <ISA_LIT>AsmPrinter ( TargetMachine & TM , std :: unique_ptr < MCStreamer > Streamer ) : AsmPrinter ( TM , std :: move ( Streamer ) ) , MCInstLowering ( * this ) {


<s> void LLVMInitialize<ISA_LIT>AsmPrinter ( ) { RegisterAsmPrinter < <ISA_LIT>AsmPrinter > X ( The<ISA_LIT>Target ) ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: GetRelocType ( const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { if ( ! IsPCRel ) { llvm_unreachable ( <STR_LIT> ) ; } unsigned Type = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ;

return createELFObjectWriter ( MOTW , OS , true ) ;


<s> MCELFObjectTargetWriter * MOTW = new <ISA_LIT>ELFObjectWriter ( OSABI ) ; return createELFObjectWriter ( MOTW , OS , true ) ;


<s> if ( ! IsPCRel ) { llvm_unreachable ( <STR_LIT> ) ; } unsigned Type = <NUM_LIT> ; switch ( ( unsigned ) Fixup . getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Type = ELF :: R_ARM_MOVT_PREL ; break ; case <STR_LIT> : Type = ELF :: R_ARM_MOVW_PREL_NC ; break ; } return Type ;


<s> unsigned <ISA_LIT>ELFObjectWriter :: getRelocType ( MCContext & Ctx , const MCValue & Target , const MCFixup & Fixup , bool IsPCRel ) const { if ( ! IsPCRel ) { llvm_unreachable ( <STR_LIT> ) ;


<s> <ISA_LIT>ELFObjectWriter :: <ISA_LIT>ELFObjectWriter ( uint8_t OSABI ) : MCELFObjectTargetWriter ( false , OSABI , ELF :: EM_ARM , false ) {


<s> <ISA_LIT>ELFObjectWriter :: ~ <ISA_LIT>ELFObjectWriter ( ) {


<s> if ( StackAlign > <NUM_LIT> ) { StackSize = RoundUpToAlignment ( StackSize , StackAlign ) ; }


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; uint64_t StackSize = MFI -> getStackSize ( ) ; unsigned StackAlign = getStackAlignment ( ) ;


<s> void <ISA_LIT>FrameLowering :: eliminateCallFramePseudoInstr ( MachineFunction & MF , MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { if ( I -> getOpcode ( ) == <STR_LIT> || I -> getOpcode ( ) == <STR_LIT> ) { MBB . erase ( I ) ;


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const {

return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ;


<s> bool <ISA_LIT>FrameLowering :: hasFP ( const MachineFunction & MF ) const { return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) -> hasVarSizedObjects ( ) ;


<s> void <ISA_LIT>FrameLowering :: emitPrologue ( MachineFunction & MF ) const { const TargetInstrInfo & TII = * MF . getSubtarget ( ) . getInstrInfo ( ) ; MachineBasicBlock & MBB = MF . front ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; uint64_t StackSize = computeStackSize ( MF ) ; if ( ! StackSize ) { return ;


<s> unsigned StackAlign = getStackAlignment ( ) ; if ( StackAlign > <NUM_LIT> ) { StackSize = alignTo ( StackSize , StackAlign ) ; } return StackSize ;


<s> if ( I -> getOpcode ( ) == <STR_LIT> || I -> getOpcode ( ) == <STR_LIT> ) { return MBB . erase ( I ) ;


<s> if ( OffsetReg ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addReg ( OffsetReg ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } else { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addImm ( StackSize ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addReg ( OffsetReg ) . setMIFlag ( MachineInstr :: FrameSetup ) ; } else {

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , StackReg ) . addReg ( StackReg ) . addImm ( StackSize ) . setMIFlag ( MachineInstr :: FrameSetup ) ;


<s> return MF . getTarget ( ) . Options . DisableFramePointerElim ( MF ) || MF . getFrameInfo ( ) . hasVarSizedObjects ( ) ;


<s> <ISA_LIT>FrameLowering :: <ISA_LIT>FrameLowering ( ) : TargetFrameLowering ( TargetFrameLowering :: StackGrowsDown , <NUM_LIT> , <NUM_LIT> ) {


<s> } else { unsigned OffsetReg = <STR_LIT> ; unsigned OffsetLo = ( unsigned ) ( Offset & <NUM_LIT> ) ; unsigned OffsetHi = ( unsigned ) ( ( Offset & <NUM_LIT> ) >> <NUM_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , OffsetReg ) . addImm ( OffsetLo ) . setMIFlag ( MachineInstr :: FrameSetup ) ; if ( OffsetHi ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , OffsetReg ) . addReg ( OffsetReg ) . addImm ( OffsetHi ) . setMIFlag ( MachineInstr :: FrameSetup ) ; }


<s> static int stackSlotSize ( ) { return <NUM_LIT> ;


<s> if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) { SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( BE -> getRHS ( ) ) ; assert ( SRE && CE && <STR_LIT> ) ;


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot ) {


<s> case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : case <STR_LIT> : llvm_unreachable ( <STR_LIT> ) ; return nullptr ; case <STR_LIT> : case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> <ISA_LIT>InstPrinter ( const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) : MCInstPrinter ( MAI , MII , MRI ) {


<s> const MCOperand & Op1 = MI -> getOperand ( OpNum ) ; const MCOperand & Op2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> ; printRegName ( O , Op1 . getReg ( ) ) ; unsigned Offset = Op2 . getImm ( ) ; if ( Offset ) {


<s> void <ISA_LIT>InstPrinter :: printAddrModeMemSrc ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & Op1 = MI -> getOperand ( OpNum ) ; const MCOperand & Op2 = MI -> getOperand ( OpNum + <NUM_LIT> ) ; O << <STR_LIT> ;


<s> void <ISA_LIT>InstPrinter :: printCondCode ( const MCInst * MI , unsigned OpNum , raw_ostream & O ) { const MCOperand & Op = MI -> getOperand ( OpNum ) ; <STR_LIT> CC = ( <STR_LIT> ) Op . getImm ( ) ; const char * Str = condCodeToString ( CC ) ;


<s> const MCSymbolRefExpr * SRE ; if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) { SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( BE -> getRHS ( ) ) ; assert ( SRE && CE && <STR_LIT> ) ; Offset = CE -> getValue ( ) ; } else { SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ; assert ( SRE && <STR_LIT> ) ; } const MCSymbolRefExpr :: VariantKind Kind = SRE -> getKind ( ) ; assert ( Kind == MCSymbolRefExpr :: VK_None || Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_LO || Kind == MCSymbolRefExpr :: VK_<ISA_LIT>_HI ) ; OS << SRE -> getSymbol ( ) ;


<s> static void printExpr ( const MCExpr * Expr , raw_ostream & OS ) { int Offset = <NUM_LIT> ; const MCSymbolRefExpr * SRE ; if ( const MCBinaryExpr * BE = dyn_cast < MCBinaryExpr > ( Expr ) ) { SRE = dyn_cast < MCSymbolRefExpr > ( BE -> getLHS ( ) ) ; const MCConstantExpr * CE = dyn_cast < MCConstantExpr > ( BE -> getRHS ( ) ) ; assert ( SRE && CE && <STR_LIT> ) ; Offset = CE -> getValue ( ) ; } else { SRE = dyn_cast < MCSymbolRefExpr > ( Expr ) ;


<s> void <ISA_LIT>InstPrinter :: printInst ( const MCInst * MI , raw_ostream & O , StringRef Annot , const MCSubtargetInfo & STI ) { printInstruction ( MI , O ) ;


<s> TBB = nullptr ; FBB = nullptr ; for ( MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock * TargetBB = MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( HasCondBranch ) { FBB = TargetBB ;


<s> FBB = nullptr ; for ( MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock * TargetBB = MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( HasCondBranch ) { FBB = TargetBB ; } else { TBB = TargetBB ; }

} else if ( MI . getOpcode ( ) == <STR_LIT> ) {


<s> void <ISA_LIT>InstrInfo :: copyPhysReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , DebugLoc DL , unsigned DestReg , unsigned SrcReg , bool KillSrc ) const {

BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> if ( MO . isImm ( ) ) { const unsigned Imm = MO . getImm ( ) ; const unsigned Lo16 = Imm & <NUM_LIT> ; const unsigned Hi16 = ( Imm >> <NUM_LIT> ) & <NUM_LIT> ; LO16 = LO16 . addImm ( Lo16 ) ; HI16 = HI16 . addImm ( Hi16 ) ; } else { const GlobalValue * GV = MO . getGlobal ( ) ; const unsigned TF = MO . getTargetFlags ( ) ; LO16 = LO16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; HI16 = HI16 . addGlobalAddress ( GV , MO . getOffset ( ) , TF | <STR_LIT> ) ; }


<s> return false ; case <STR_LIT> : { DebugLoc DL = MI -> getDebugLoc ( ) ; MachineBasicBlock & MBB = * MI -> getParent ( ) ; const unsigned DstReg = MI -> getOperand ( <NUM_LIT> ) . getReg ( ) ; const bool DstIsDead = MI -> getOperand ( <NUM_LIT> ) . isDead ( ) ; const MachineOperand & MO = MI -> getOperand ( <NUM_LIT> ) ; auto LO16 = BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DstReg ) ; auto HI16 = BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; if ( MO . isImm ( ) ) { const unsigned Imm = MO . getImm ( ) ; const unsigned Lo16 = Imm & <NUM_LIT> ; const unsigned Hi16 = ( Imm >> <NUM_LIT> ) & <NUM_LIT> ; LO16 = LO16 . addImm ( Lo16 ) ; HI16 = HI16 . addImm ( Hi16 ) ;


<s> NumInserted ++ ; } if ( Cond . empty ( ) || FBB ) { BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addMBB ( Cond . empty ( ) ? TBB : FBB ) ; NumInserted ++ ; }


<s> unsigned <ISA_LIT>InstrInfo :: isLoadFromStackSlot ( const MachineInstr * MI , int & FrameIndex ) const { assert ( <NUM_LIT> && <STR_LIT> ) ;


<s> if ( ( Opc == <STR_LIT> ) || ( Opc == <STR_LIT> ) ) { auto ToDelete = I ; ++ I ; MBB . erase ( ToDelete ) ; NumRemoved ++ ;


<s> unsigned <ISA_LIT>InstrInfo :: RemoveBranch ( MachineBasicBlock & MBB ) const { assert ( <NUM_LIT> && <STR_LIT> ) ;


<s> for ( MachineInstr & MI : MBB ) { if ( MI . getOpcode ( ) == <STR_LIT> ) { MachineBasicBlock * TargetBB = MI . getOperand ( <NUM_LIT> ) . getMBB ( ) ; if ( HasCondBranch ) { FBB = TargetBB ; } else { TBB = TargetBB ; }


<s> void <ISA_LIT>InstrInfo :: anchor ( ) {


<s> void <ISA_LIT>InstrInfo :: copyPhysReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , const DebugLoc & DL , unsigned DestReg , unsigned SrcReg , bool KillSrc ) const { BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> DebugLoc DL = MI . getDebugLoc ( ) ; MachineBasicBlock & MBB = * MI . getParent ( ) ; const unsigned DstReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; const bool DstIsDead = MI . getOperand ( <NUM_LIT> ) . isDead ( ) ; const MachineOperand & MO = MI . getOperand ( <NUM_LIT> ) ; auto LO16 = BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DstReg ) ; auto HI16 = BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addReg ( DstReg , RegState :: Define | getDeadRegState ( DstIsDead ) ) . addReg ( DstReg ) ; if ( MO . isImm ( ) ) { const unsigned Imm = MO . getImm ( ) ;


<s> const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const { return RI ;


<s> const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const {


<s> if ( Cond . size ( ) > <NUM_LIT> ) { BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addOperand ( Cond [ <NUM_LIT> ] ) . addMBB ( TBB ) ; NumInserted ++ ; } if ( Cond . empty ( ) || FBB ) { BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addMBB ( Cond . empty ( ) ? TBB : FBB ) ; NumInserted ++ ;


<s> BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addOperand ( Cond [ <NUM_LIT> ] ) . addMBB ( TBB ) ; NumInserted ++ ; } if ( Cond . empty ( ) || FBB ) { BuildMI ( MBB , MBB . end ( ) , DL , get ( <STR_LIT> ) ) . addMBB ( Cond . empty ( ) ? TBB : FBB ) ; NumInserted ++ ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; return <NUM_LIT> ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( ) : <ISA_LIT>GenInstrInfo ( <STR_LIT> , <STR_LIT> ) , RI ( ) {


<s> BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FrameIndex ) . addImm ( <NUM_LIT> ) ;


<s> auto I = MBB . end ( ) ; do { -- I ; unsigned Opc = I -> getOpcode ( ) ; if ( ( Opc == <STR_LIT> ) || ( Opc == <STR_LIT> ) ) { auto ToDelete = I ; ++ I ;


<s> BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FrameIndex ) . addImm ( <NUM_LIT> ) ;


<s> void <ISA_LIT>InstrInfo :: storeRegToStackSlot ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FrameIndex , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI ) const { BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FrameIndex ) . addImm ( <NUM_LIT> ) ;


<s> virtual const char * getPassName ( ) const override { return <STR_LIT> ;


<s> case <STR_LIT> : return SelectConditionalBranch ( N ) ; }


<s> virtual const char * getPassName ( ) const { return <STR_LIT> ;


<s> case <STR_LIT> : return SelectMoveImmediate ( N ) ; }


<s> SDNode * <ISA_LIT>DAGToDAGISel :: Select ( SDNode * N ) { switch ( N -> getOpcode ( ) ) { case <STR_LIT> : return SelectMoveImmediate ( N ) ;


<s> bool <ISA_LIT>DAGToDAGISel :: SelectAddr ( SDValue Addr , SDValue & Base , SDValue & Offset ) { if ( FrameIndexSDNode * FIN = dyn_cast < FrameIndexSDNode > ( Addr ) ) { Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , getTargetLowering ( ) -> getPointerTy ( ) ) ; Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , <STR_LIT> ) ; return true ; } if ( Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> || Addr . getOpcode ( ) == <STR_LIT> ) {


<s> if ( ( ImmVal & SupportedMask ) != ImmVal ) { return SelectCode ( N ) ; } uint64_t LoMask = <NUM_LIT> ; uint64_t HiMask = <NUM_LIT> ; uint64_t ImmLo = ( ImmVal & LoMask ) ; uint64_t ImmHi = ( ImmVal & HiMask ) ; SDValue ConstLo = CurDAG -> getTargetConstant ( ImmLo , <STR_LIT> ) ; MachineSDNode * Move = CurDAG -> getMachineNode ( <STR_LIT> , N , <STR_LIT> , ConstLo ) ; if ( ImmHi ) {

SDValue ConstHi = CurDAG -> getTargetConstant ( ImmHi >> <NUM_LIT> , <STR_LIT> ) ;


<s> uint64_t LoMask = <NUM_LIT> ; uint64_t HiMask = <NUM_LIT> ; uint64_t ImmLo = ( ImmVal & LoMask ) ; uint64_t ImmHi = ( ImmVal & HiMask ) ; SDValue ConstLo = CurDAG -> getTargetConstant ( ImmLo , <STR_LIT> ) ; MachineSDNode * Move = CurDAG -> getMachineNode ( <STR_LIT> , N , <STR_LIT> , ConstLo ) ; if ( ImmHi ) { SDValue ConstHi = CurDAG -> getTargetConstant ( ImmHi >> <NUM_LIT> , <STR_LIT> ) ; Move = CurDAG -> getMachineNode ( <STR_LIT> , N , <STR_LIT> , SDValue ( Move , <NUM_LIT> ) , ConstHi ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>ISelDag ( <ISA_LIT>TargetMachine & TM , CodeGenOpt :: Level OptLevel ) { return new <ISA_LIT>DAGToDAGISel ( TM , OptLevel ) ;


<s> virtual StringRef getPassName ( ) const override { return StringRef ( <STR_LIT> ) ;


<s> virtual StringRef getPassName ( ) const override {


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM , CodeGenOpt :: Level OptLevel ) : SelectionDAGISel ( TM , OptLevel ) , Subtarget ( * TM . getSubtargetImpl ( ) ) {


<s> switch ( N -> getOpcode ( ) ) { case <STR_LIT> : SelectMoveImmediate ( N ) ; return ; case <STR_LIT> : SelectConditionalBranch ( N ) ; return ; } SelectCode ( N ) ;


<s> EVT PtrVT = getTargetLowering ( ) -> getPointerTy ( CurDAG -> getDataLayout ( ) ) ; Base = CurDAG -> getTargetFrameIndex ( FIN -> getIndex ( ) , PtrVT ) ;

Offset = CurDAG -> getTargetConstant ( <NUM_LIT> , Addr , <STR_LIT> ) ;


<s> SDValue Chain = N -> getOperand ( <NUM_LIT> ) ; SDValue Cond = N -> getOperand ( <NUM_LIT> ) ; SDValue LHS = N -> getOperand ( <NUM_LIT> ) ; SDValue RHS = N -> getOperand ( <NUM_LIT> ) ; SDValue Target = N -> getOperand ( <NUM_LIT> ) ; EVT CompareTys [ ] = { <STR_LIT> , <STR_LIT> } ;

SDVTList CompareVT = CurDAG -> getVTList ( CompareTys ) ;


<s> } uint64_t LoMask = <NUM_LIT> ; uint64_t HiMask = <NUM_LIT> ; uint64_t ImmLo = ( ImmVal & LoMask ) ; uint64_t ImmHi = ( ImmVal & HiMask ) ; SDValue ConstLo = CurDAG -> getTargetConstant ( ImmLo , N , <STR_LIT> ) ; MachineSDNode * Move = CurDAG -> getMachineNode ( <STR_LIT> , N , <STR_LIT> , ConstLo ) ;


<s> CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallOperands ( Outs , CC_<ISA_LIT> ) ; const unsigned NumBytes = CCInfo . getNextStackOffset ( ) ; Chain = DAG . getCALLSEQ_START ( Chain , DAG . getIntPtrConstant ( NumBytes , Loc , true ) , Loc ) ; SmallVector < std :: pair < unsigned , SDValue > , <NUM_LIT> > RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; SDValue Arg = OutVals [ i ] ; assert ( VA . getLocInfo ( ) == CCValAssign :: Full && <STR_LIT> ) ; if ( VA . isRegLoc ( ) ) { RegsToPass . push_back ( std :: make_pair ( VA . getLocReg ( ) , Arg ) ) ; continue ; } assert ( VA . isMemLoc ( ) && <STR_LIT> ) ; SDValue StackPtr = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ; SDValue PtrOff = DAG . getIntPtrConstant ( VA . getLocMemOffset ( ) , Loc ) ; PtrOff = DAG . getNode ( <STR_LIT> , Loc , <STR_LIT> , StackPtr , PtrOff ) ; MemOpChains . push_back ( DAG . getStore ( Chain , Loc , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerCallResult ( SDValue Chain , SDValue InGlue , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , SDLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { assert ( ! isVarArg && <STR_LIT> ) ; SmallVector < CCValAssign , <NUM_LIT> > RVLocs ;

CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ;


<s> CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeCallResult ( Ins , RetCC_<ISA_LIT> ) ; for ( auto & Loc : RVLocs ) { Chain = DAG . getCopyFromReg ( Chain , dl , Loc . getLocReg ( ) , Loc . getValVT ( ) , InGlue ) . getValue ( <NUM_LIT> ) ; InGlue = Chain . getValue ( <NUM_LIT> ) ;

InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ;


<s> if ( VA . isRegLoc ( ) ) { EVT RegVT = VA . getLocVT ( ) ; assert ( RegVT . getSimpleVT ( ) . SimpleTy == <STR_LIT> && <STR_LIT> ) ; const unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgIn = DAG . getCopyFromReg ( Chain , dl , VReg , RegVT ) ; InVals . push_back ( ArgIn ) ; continue ; } assert ( VA . isMemLoc ( ) && <STR_LIT> ) ; const unsigned Offset = VA . getLocMemOffset ( ) ; const int FI = MF . getFrameInfo ( ) -> CreateFixedObject ( <NUM_LIT> , Offset , true ) ; EVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) ;

SDValue FIPtr = DAG . getFrameIndex ( FI , PtrTy ) ;


<s> CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , RetCC_<ISA_LIT> ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i < e ; ++ i ) {


<s> MemOpChains . push_back ( DAG . getStore ( Chain , dl , Arg , PtrOff , MachinePointerInfo ( ) , false , false , <NUM_LIT> ) ) ; } if ( ! MemOpChains . empty ( ) ) { Chain = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , MemOpChains ) ; } SDValue InFlag ; for ( auto & Reg : RegsToPass ) { Chain = DAG . getCopyToReg ( Chain , dl , Reg . first , Reg . second , InFlag ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; } GlobalAddressSDNode * G = dyn_cast < GlobalAddressSDNode > ( Callee ) ; assert ( G && <STR_LIT> ) ; Callee = DAG . getGlobalAddress ( G -> getGlobal ( ) , dl , getPointerTy ( ) , <NUM_LIT> ) ; std :: vector < SDValue > Ops ; Ops . push_back ( Chain ) ; Ops . push_back ( Callee ) ; for ( auto & Reg : RegsToPass ) { Ops . push_back ( DAG . getRegister ( Reg . first , Reg . second . getValueType ( ) ) ) ; } const uint32_t * Mask ; const TargetRegisterInfo * TRI = getTargetMachine ( ) . getSubtargetImpl ( ) -> getRegisterInfo ( ) ; Mask = TRI -> getCallPreservedMask ( CallConv ) ; assert ( Mask && <STR_LIT> ) ; Ops . push_back ( DAG . getRegisterMask ( Mask ) ) ; if ( InFlag . getNode ( ) ) { Ops . push_back ( InFlag ) ; } SDVTList NodeTys = DAG . getVTList ( <STR_LIT> , <STR_LIT> ) ; Chain = DAG . getNode ( <STR_LIT> , dl , NodeTys , Ops ) ; InFlag = Chain . getValue ( <NUM_LIT> ) ; Chain = DAG . getCALLSEQ_END ( Chain , DAG . getIntPtrConstant ( NumBytes , true ) , DAG . getIntPtrConstant ( <NUM_LIT> , true ) , InFlag , dl ) ; if ( ! Ins . empty ( ) ) { InFlag = Chain . getValue ( <NUM_LIT> ) ; } return LowerCallResult ( Chain , InFlag , CallConv , isVarArg , Ins , dl , DAG , InVals ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerFormalArguments ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , SDLoc dl , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineRegisterInfo & RegInfo = MF . getRegInfo ( ) ; assert ( ! isVarArg && <STR_LIT> ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; for ( auto & VA : ArgLocs ) { if ( VA . isRegLoc ( ) ) { EVT RegVT = VA . getLocVT ( ) ; assert ( RegVT . getSimpleVT ( ) . SimpleTy == <STR_LIT> && <STR_LIT> ) ; const unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgIn = DAG . getCopyFromReg ( Chain , dl , VReg , RegVT ) ; InVals . push_back ( ArgIn ) ; continue ; } assert ( VA . isMemLoc ( ) && <STR_LIT> ) ; const unsigned Offset = VA . getLocMemOffset ( ) ; const int FI = MF . getFrameInfo ( ) -> CreateFixedObject ( <NUM_LIT> , Offset , true ) ; SDValue FIPtr = DAG . getFrameIndex ( FI , getPointerTy ( ) ) ; assert ( VA . getValVT ( ) == <STR_LIT> && <STR_LIT> ) ; SDValue Load = DAG . getLoad ( VA . getValVT ( ) , dl , Chain , FIPtr , MachinePointerInfo ( ) , false , false , false , <NUM_LIT> ) ; InVals . push_back ( Load ) ;


<s> CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; for ( auto & VA : ArgLocs ) { if ( VA . isRegLoc ( ) ) { EVT RegVT = VA . getLocVT ( ) ; assert ( RegVT . getSimpleVT ( ) . SimpleTy == <STR_LIT> && <STR_LIT> ) ; const unsigned VReg = RegInfo . createVirtualRegister ( & <STR_LIT> ) ; RegInfo . addLiveIn ( VA . getLocReg ( ) , VReg ) ; SDValue ArgIn = DAG . getCopyFromReg ( Chain , dl , VReg , RegVT ) ; InVals . push_back ( ArgIn ) ;


<s> SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , MF , RVLocs , Context ) ;

if ( ! CCInfo . CheckReturn ( Outs , RetCC_<ISA_LIT> ) ) {


<s> default : return NULL ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; }


<s> return NULL ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ; setStackPointerRegisterToSaveRestore ( <STR_LIT> ) ; setSchedulingPreference ( Sched :: Source ) ;

setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ;


<s> computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ; setStackPointerRegisterToSaveRestore ( <STR_LIT> ) ; setSchedulingPreference ( Sched :: Source ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ;


<s> for ( auto & Loc : RVLocs ) { Chain = DAG . getCopyFromReg ( Chain , dl , Loc . getLocReg ( ) , Loc . getValVT ( ) , InGlue ) . getValue ( <NUM_LIT> ) ; InGlue = Chain . getValue ( <NUM_LIT> ) ; InVals . push_back ( Chain . getValue ( <NUM_LIT> ) ) ; }


<s> GlobalAddressSDNode * GlobalAddr = cast < GlobalAddressSDNode > ( Op . getNode ( ) ) ;

SDValue TargetAddr = DAG . getTargetGlobalAddress ( GlobalAddr -> getGlobal ( ) , Op , <STR_LIT> ) ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ; }


<s> SDValue <ISA_LIT>TargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , const SmallVectorImpl < SDValue > & OutVals , const SDLoc & dl , SelectionDAG & DAG ) const { if ( isVarArg ) { report_fatal_error ( <STR_LIT> ) ; } SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , RetCC_<ISA_LIT> ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ;

for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i < e ; ++ i ) {


<s> report_fatal_error ( <STR_LIT> ) ; } SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , RVLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeReturn ( Outs , RetCC_<ISA_LIT> ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> , e = RVLocs . size ( ) ; i < e ; ++ i ) { CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ i ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; }


<s> Data64bitsDirective = <NUM_LIT> ; ZeroDirective = <STR_LIT> ; CommentString = <STR_LIT> ; AscizDirective = <STR_LIT> ; HiddenVisibilityAttr = MCSA_Invalid ;

HiddenDeclarationVisibilityAttr = MCSA_Invalid ;


<s> AscizDirective = <STR_LIT> ; HiddenVisibilityAttr = MCSA_Invalid ; HiddenDeclarationVisibilityAttr = MCSA_Invalid ;

ProtectedVisibilityAttr = MCSA_Invalid ;


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> SupportsDebugInformation = true ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <NUM_LIT> ; ZeroDirective = <STR_LIT> ; CommentString = <STR_LIT> ;


<s> ZeroDirective = <STR_LIT> ; CommentString = <STR_LIT> ; AscizDirective = <STR_LIT> ; HiddenVisibilityAttr = MCSA_Invalid ; HiddenDeclarationVisibilityAttr = MCSA_Invalid ; ProtectedVisibilityAttr = MCSA_Invalid ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI , MCContext & Ctx ) {

return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; } const uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ;

EmitConstant ( Binary , Desc . getSize ( ) , OS ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { if ( MO . isReg ( ) ) { return CTX . getRegisterInfo ( ) -> getEncodingValue ( MO . getReg ( ) ) ; } if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } assert ( MO . isExpr ( ) && <STR_LIT> ) ;

const MCExpr * Expr = MO . getExpr ( ) ;


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitter ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) {


<s> EmitByte ( Val & <NUM_LIT> , OS ) ; Val >>= <NUM_LIT> ;


<s> const MCExpr * Expr = MO . getExpr ( ) ; MCExpr :: ExprKind Kind = Expr -> getKind ( ) ; if ( Kind == MCExpr :: Binary ) { Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ; Kind = Expr -> getKind ( ) ; } assert ( Kind == MCExpr :: SymbolRef ) ; unsigned FixupKind ; switch ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) ) { default :


<s> } if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCExpr :: ExprKind Kind = Expr -> getKind ( ) ; if ( Kind == MCExpr :: Binary ) { Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ; Kind = Expr -> getKind ( ) ; } assert ( Kind == MCExpr :: SymbolRef ) ; unsigned FixupKind ; switch ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ;

case MCSymbolRefExpr :: VK_<ISA_LIT>_LO : {


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMemSrcValue ( const MCInst & MI , unsigned OpIdx , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const {


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , MCContext & ctx ) : MCII ( mcii ) , CTX ( ctx ) {


<s> MCOperand <ISA_LIT>MCInstLower :: LowerOperand ( const MachineOperand & MO , unsigned offset ) const { MachineOperandType MOTy = MO . getType ( ) ; switch ( MOTy ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) { break ; } return MCOperand :: CreateReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate :

return MCOperand :: CreateImm ( MO . getImm ( ) + offset ) ;


<s> case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_BlockAddress : return LowerSymbolOperand ( MO , MOTy , offset ) ; case MachineOperand :: MO_RegisterMask : break ; } return MCOperand ( ) ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( class AsmPrinter & asmprinter ) : Printer ( asmprinter ) {


<s> for ( auto & MO : MI -> operands ( ) ) { const MCOperand MCOp = LowerOperand ( MO ) ;


<s> OutMI . setOpcode ( MI -> getOpcode ( ) ) ; for ( auto & MO : MI -> operands ( ) ) { const MCOperand MCOp = LowerOperand ( MO ) ; if ( MCOp . isValid ( ) ) { OutMI . addOperand ( MCOp ) ; } }


<s> MCOperand <ISA_LIT>MCInstLower :: LowerOperand ( const MachineOperand & MO , unsigned offset ) const { MachineOperandType MOTy = MO . getType ( ) ; switch ( MOTy ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) { break ; } return MCOperand :: createReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_ExternalSymbol : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_ConstantPoolIndex : case MachineOperand :: MO_BlockAddress : return LowerSymbolOperand ( MO , MOTy , offset ) ; case MachineOperand :: MO_RegisterMask :


<s> break ; case MachineOperand :: MO_GlobalAddress : Symbol = Printer . getSymbol ( MO . getGlobal ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_BlockAddress : Symbol = Printer . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_ExternalSymbol : Symbol = Printer . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_JumpTableIndex : Symbol = Printer . GetJTISymbol ( MO . getIndex ( ) ) ; break ; case MachineOperand :: MO_ConstantPoolIndex : Symbol = Printer . GetCPISymbol ( MO . getIndex ( ) ) ; Offset += MO . getOffset ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } const unsigned Option = MO . getTargetFlags ( ) & <STR_LIT> ; MCSymbolRefExpr :: VariantKind Kind = MCSymbolRefExpr :: VK_None ; switch ( Option ) { default : break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_LO ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_HI ; break ; } const MCSymbolRefExpr * MCSym = MCSymbolRefExpr :: create ( Symbol , Kind , * Ctx ) ; if ( ! Offset ) { return MCOperand :: createExpr ( MCSym ) ; } assert ( Offset > <NUM_LIT> ) ; const MCConstantExpr * OffsetExpr = MCConstantExpr :: create ( Offset , * Ctx ) ;

const MCBinaryExpr * Add = MCBinaryExpr :: createAdd ( MCSym , OffsetExpr , * Ctx ) ;


<s> CM = CodeModel :: Small ; } if ( CM != CodeModel :: Small && CM != CodeModel :: Large ) { report_fatal_error ( <STR_LIT> ) ; } X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> RM = Reloc :: Static ; } if ( CM == CodeModel :: Default ) { CM = CodeModel :: Small ; } if ( CM != CodeModel :: Small && CM != CodeModel :: Large ) { report_fatal_error ( <STR_LIT> ) ; }

X -> initMCCodeGenInfo ( RM , CM , OL ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;

TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitter ) ;


<s> RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , StringRef TT ) { MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ; return MAI ;


<s> } if ( CM != CodeModel :: Small && CM != CodeModel :: Large ) { report_fatal_error ( <STR_LIT> ) ; }

X -> InitMCCodeGenInfo ( RM , CM , OL ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ) {

return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ) { return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & OS , MCCodeEmitter * Emitter , const MCSubtargetInfo & STI , bool RelaxAll , bool NoExecStack ) { return createELFStreamer ( Ctx , MAB , OS , Emitter , false , NoExecStack ) ;


<s> TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;

TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackend ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TT ) { return new <ISA_LIT>MCAsmInfo ( TT ) ;


<s> return new <ISA_LIT>MCAsmInfo ( TT ) ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & TT , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCInstrInfo * create<ISA_LIT>MCInstrInfo ( ) { MCInstrInfo * X = new MCInstrInfo ( ) ;


<s> return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { RegisterMCAsmInfoFn X ( The<ISA_LIT>Target , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;


<s> MachineOperand & FIOp = MI . getOperand ( FIOperandNum ) ; unsigned FI = FIOp . getIndex ( ) ; unsigned ImmOpIdx = <NUM_LIT> ; switch ( MI . getOpcode ( ) ) { default : return ; case <STR_LIT> : case <STR_LIT> : ImmOpIdx = FIOperandNum + <NUM_LIT> ; break ; } MachineOperand & ImmOp = MI . getOperand ( ImmOpIdx ) ;

int Offset = MFI . getObjectOffset ( FI ) + MFI . getStackSize ( ) + ImmOp . getImm ( ) ;


<s> const uint16_t * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { static const uint16_t CalleeSavedRegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <NUM_LIT> } ;


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID ) const {


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { return <STR_LIT> ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) {


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const {


<s> bool <ISA_LIT>RegisterInfo :: useFPForScavengingIndex ( const MachineFunction & MF ) const { return false ;


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( const DataLayout & DL ) : TargetSelectionDAGInfo ( & DL ) {


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> const DataLayout * getDataLayout ( ) const override {


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const std :: string & TT , const std :: string & CPU , const std :: string & FS , <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( ) , TLInfo ( TM ) , TSInfo ( DL ) , FrameLowering ( ) {


<s> void <ISA_LIT>Subtarget :: anchor ( ) {


<s> const <ISA_LIT>FrameLowering * getFrameLowering ( ) const override {


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override {


<s> return & InstrInfo . getRegisterInfo ( ) ;


<s> const <ISA_LIT>RegisterInfo * getRegisterInfo ( ) const override { return & InstrInfo . getRegisterInfo ( ) ;


<s> const <ISA_LIT>TargetLowering * getTargetLowering ( ) const override { return & TLInfo ;


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( const Triple & TT , StringRef CPU , StringRef FS , <ISA_LIT>TargetMachine & TM ) : <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , DL ( <STR_LIT> ) , InstrInfo ( ) , TLInfo ( TM ) , TSInfo ( ) , FrameLowering ( ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options ) , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS , * this ) , TLOF ( make_unique < TargetLoweringObjectFileELF > ( ) ) {


<s> void <ISA_LIT>TargetMachine :: addAnalysisPasses ( PassManagerBase & PM ) {


<s> bool <ISA_LIT>PassConfig :: addPreEmitPass ( ) {


<s> virtual const <ISA_LIT>Subtarget * getSubtargetImpl ( ) const { return & Subtarget ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS , * this ) {


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) {

addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;


<s> addPass ( create<ISA_LIT>ISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ; return false ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) {


<s> bool <ISA_LIT>PassConfig :: addPreISel ( ) {


<s> static std :: string computeDataLayout ( const Triple & TT , StringRef CPU , const TargetOptions & Options ) {


<s> return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( const Triple & TT , Optional < Reloc :: Model > RM ) { if ( ! RM . hasValue ( ) ) return TT . isOSBinFormatMachO ( ) ? Reloc :: PIC_ : Reloc :: Static ; if ( * RM == Reloc :: DynamicNoPIC && ! TT . isOSDarwin ( ) ) return Reloc :: Static ;


<s> if ( * RM == Reloc :: DynamicNoPIC && ! TT . isOSDarwin ( ) ) return Reloc :: Static ;


<s> return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const { return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options ) , TT , CPU , FS , Options , getEffectiveRelocModel ( TT , RM ) , CM , OL ) , Subtarget ( TT , CPU , FS , * this ) , TLOF ( make_unique < TargetLoweringObjectFileELF > ( ) ) { initAsmInfo ( ) ;