<s> return new <ISA_LIT>AsmPrinter ( o , tm , tm . getTargetAsmInfo ( ) , fast ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>CodePrinterPass ( raw_ostream & o , <ISA_LIT>TargetMachine & tm , bool fast ) { return new <ISA_LIT>AsmPrinter ( o , tm , tm . getTargetAsmInfo ( ) , fast ) ;


<s> <ISA_LIT>AsmPrinter ( raw_ostream & O , TargetMachine & TM , const TargetAsmInfo * T , bool F ) : AsmPrinter ( O , TM , T , F ) {


<s> unsigned Align = TD -> getPreferredAlignmentLog ( GVar ) ; printVisibility ( name , GVar -> getVisibility ( ) ) ; SwitchToSection ( TAI -> SectionForGlobal ( GVar ) ) ; if ( C -> isNullValue ( ) && ! GVar -> hasSection ( ) ) { if ( ! GVar -> isThreadLocal ( ) && ( GVar -> hasLocalLinkage ( ) || GVar -> isWeakForLinker ( ) ) ) { if ( Size == <NUM_LIT> ) Size = <NUM_LIT> ; if ( GVar -> hasLocalLinkage ( ) ) { O << <STR_LIT> << name << <STR_LIT> << Size << ',' << ( <NUM_LIT> << Align ) ; O << '\n' ; } else { O << <STR_LIT> << name << <STR_LIT> << Size << ',' << ( <NUM_LIT> << Align ) ; O << '\n' ; } return ; } } switch ( GVar -> getLinkage ( ) ) { case GlobalValue :: LinkOnceAnyLinkage : case GlobalValue :: LinkOnceODRLinkage : case GlobalValue :: CommonLinkage : case GlobalValue :: WeakAnyLinkage : case GlobalValue :: WeakODRLinkage : O << <STR_LIT> << name << '\n' ; break ; case GlobalValue :: AppendingLinkage : case GlobalValue :: ExternalLinkage : O << TAI -> getGlobalDirective ( ) << name << '\n' ; case GlobalValue :: InternalLinkage : case GlobalValue :: PrivateLinkage : break ; case GlobalValue :: GhostLinkage : cerr << <STR_LIT> ;


<s> FunctionPass * llvm :: create<ISA_LIT>CodePrinterPass ( raw_ostream & o , <ISA_LIT>TargetMachine & tm , CodeGenOpt :: Level OptLevel , bool verbose ) {

return new <ISA_LIT>AsmPrinter ( o , tm , tm . getTargetAsmInfo ( ) , OptLevel , verbose ) ;


<s> return new <ISA_LIT>AsmPrinter ( o , tm , tm . getTargetAsmInfo ( ) , OptLevel , verbose ) ;


<s> I != E ; ++ I ) printModuleLevelGV ( I ) ; O << <STR_LIT> ; for ( std :: set < std :: string > :: iterator i = ExternalFunctionNames . begin ( ) , e = ExternalFunctionNames . end ( ) ; i != e ; ++ i ) { O << <STR_LIT> << * i << <STR_LIT> << * i << <STR_LIT> ; } O << <STR_LIT> ; O << <STR_LIT> ; for ( std :: set < std :: string > :: iterator i = ExternalObjectNames . begin ( ) , e = ExternalObjectNames . end ( ) ; i != e ; ++ i ) {


<s> bool <ISA_LIT>AsmPrinter :: doInitialization ( Module & M ) { bool Result = AsmPrinter :: doInitialization ( M ) ; O << <STR_LIT> << <STR_LIT> << <STR_LIT> << <STR_LIT> ;


<s> virtual const char * getPassName ( ) const {


<s> explicit <ISA_LIT>AsmPrinter ( raw_ostream & O , TargetMachine & TM , const TargetAsmInfo * T , CodeGenOpt :: Level OL , bool V ) : AsmPrinter ( O , TM , T , OL , V ) {


<s> void printCallOperand ( const MachineInstr * MI , unsigned OpNo ) {

printOp ( MI -> getOperand ( OpNo ) , true ) ;


<s> void printCallOperand ( const MachineInstr * MI , unsigned OpNo ) { printOp ( MI -> getOperand ( OpNo ) , true ) ;


<s> printOp ( MI -> getOperand ( OpNo ) , false ) ;


<s> void printGlobalOperand ( const MachineInstr * MI , unsigned OpNo ) {

printOp ( MI -> getOperand ( OpNo ) , false ) ;


<s> ++ EmittedInsts ; printInstruction ( MI ) ;


<s> unsigned Size = TD -> getTypeAllocSize ( C -> getType ( ) ) ; unsigned Align = TD -> getPreferredAlignmentLog ( GVar ) ; printVisibility ( name , GVar -> getVisibility ( ) ) ; SwitchToSection ( TAI -> SectionForGlobal ( GVar ) ) ; if ( C -> isNullValue ( ) && ! GVar -> hasSection ( ) ) { if ( ! GVar -> isThreadLocal ( ) && ( GVar -> hasLocalLinkage ( ) || GVar -> isWeakForLinker ( ) ) ) { if ( Size == <NUM_LIT> ) Size = <NUM_LIT> ; if ( GVar -> hasLocalLinkage ( ) ) { O << <STR_LIT> << name << <STR_LIT> << Size << ',' << ( <NUM_LIT> << Align ) ; O << '\n' ; } else { O << <STR_LIT> << name << <STR_LIT> << Size << ',' << ( <NUM_LIT> << Align ) ; O << '\n' ; } return ; } } switch ( GVar -> getLinkage ( ) ) { case GlobalValue :: LinkOnceAnyLinkage : case GlobalValue :: LinkOnceODRLinkage : case GlobalValue :: CommonLinkage : case GlobalValue :: WeakAnyLinkage : case GlobalValue :: WeakODRLinkage : O << <STR_LIT> << name << '\n' ; break ; case GlobalValue :: AppendingLinkage : case GlobalValue :: ExternalLinkage : O << TAI -> getGlobalDirective ( ) << name << '\n' ; case GlobalValue :: InternalLinkage : case GlobalValue :: PrivateLinkage : break ; case GlobalValue :: GhostLinkage : cerr << <STR_LIT> ; abort ( ) ; case GlobalValue :: DLLImportLinkage : cerr << <STR_LIT> ; abort ( ) ; case GlobalValue :: DLLExportLinkage : cerr << <STR_LIT> ; abort ( ) ; default : assert ( <NUM_LIT> && <STR_LIT> ) ; } EmitAlignment ( Align , GVar ) ; if ( TAI -> hasDotTypeDotSizeDirective ( ) ) { O << <STR_LIT> << name << <STR_LIT> ; O << <STR_LIT> << name << ',' << Size << '\n' ; }


<s> const MachineOperand & MO = MI -> getOperand ( OpNo ) ; if ( MO . getType ( ) == MachineOperand :: MO_Register ) { assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && <STR_LIT> ) ; O << TM . getRegisterInfo ( ) -> get ( MO . getReg ( ) ) . AsmName ; } else {


<s> assert ( TargetRegisterInfo :: isPhysicalRegister ( MO . getReg ( ) ) && <STR_LIT> ) ; O << TM . getRegisterInfo ( ) -> get ( MO . getReg ( ) ) . AsmName ; } else { printOp ( MO ) ; }


<s> if ( val >= <NUM_LIT> ) val = val - <NUM_LIT> ; O << val ;


<s> void printS22ImmOperand ( const MachineInstr * MI , unsigned OpNo ) { int val = ( unsigned int ) MI -> getOperand ( OpNo ) . getImm ( ) ;

if ( val >= <NUM_LIT> ) val = val - <NUM_LIT> ;


<s> O << ( int64_t ) MI -> getOperand ( OpNo ) . getImm ( ) ; } else { printOp ( MI -> getOperand ( OpNo ) ) ;


<s> int val = ( unsigned int ) MI -> getOperand ( OpNo ) . getImm ( ) ; if ( val >= <NUM_LIT> ) val = val - <NUM_LIT> ;


<s> int val = ( unsigned int ) MI -> getOperand ( OpNo ) . getImm ( ) ; if ( val >= <NUM_LIT> ) val = val - <NUM_LIT> ; O << val ;


<s> for ( MachineFunction :: const_iterator I = MF . begin ( ) , E = MF . end ( ) ; I != E ; ++ I ) { if ( ! I -> pred_empty ( ) ) { printBasicBlockLabel ( I , true , true ) ; O << '\n' ; } for ( MachineBasicBlock :: const_iterator II = I -> begin ( ) , E = I -> end ( ) ; II != E ; ++ II ) { printMachineInstruction ( II ) ;


<s> if ( ! I -> pred_empty ( ) ) { printBasicBlockLabel ( I , true , true ) ; O << '\n' ; } for ( MachineBasicBlock :: const_iterator II = I -> begin ( ) , E = I -> end ( ) ; II != E ; ++ II ) {


<s> return new <ISA_LIT>BundlingPass ( tm ) ;


<s> FunctionPass * llvm :: create<ISA_LIT>BundlingPass ( <ISA_LIT>TargetMachine & tm ) {

return new <ISA_LIT>BundlingPass ( tm ) ;


<s> virtual const char * getPassName ( ) const { return <STR_LIT> ;


<s> <ISA_LIT>BundlingPass ( <ISA_LIT>TargetMachine & tm ) : MachineFunctionPass ( & ID ) , TM ( tm ) {


<s> if ( MO . isReg ( ) ) { if ( MO . isUse ( ) ) { CurrentReads . insert ( MO . getReg ( ) ) ; } if ( MO . isDef ( ) ) { CurrentWrites . insert ( MO . getReg ( ) ) ; OrigWrites . insert ( MO . getReg ( ) ) ; } } } set_intersect ( CurrentReads , PendingRegWrites ) ; set_intersect ( CurrentWrites , PendingRegWrites ) ; if ( ! ( CurrentReads . empty ( ) && CurrentWrites . empty ( ) ) ) { CurrentInsn = BuildMI ( MBB , CurrentInsn , CurrentInsn -> getDebugLoc ( ) , TM . getInstrInfo ( ) -> get ( <STR_LIT> ) , <NUM_LIT> ) ; PendingRegWrites = OrigWrites ; Changed = true ; StopBitsAdded ++ ; } else { set_union ( PendingRegWrites , OrigWrites ) ; } }


<s> std :: set < unsigned > CurrentReads , CurrentWrites , OrigWrites ; for ( unsigned i = <NUM_LIT> ; i < CurrentInsn -> getNumOperands ( ) ; i ++ ) { MachineOperand & MO = CurrentInsn -> getOperand ( i ) ; if ( MO . isReg ( ) ) { if ( MO . isUse ( ) ) { CurrentReads . insert ( MO . getReg ( ) ) ; } if ( MO . isDef ( ) ) { CurrentWrites . insert ( MO . getReg ( ) ) ; OrigWrites . insert ( MO . getReg ( ) ) ; } } } set_intersect ( CurrentReads , PendingRegWrites ) ; set_intersect ( CurrentWrites , PendingRegWrites ) ; if ( ! ( CurrentReads . empty ( ) && CurrentWrites . empty ( ) ) ) { CurrentInsn = BuildMI ( MBB , CurrentInsn , CurrentInsn -> getDebugLoc ( ) , TM . getInstrInfo ( ) -> get ( <STR_LIT> ) , <NUM_LIT> ) ; PendingRegWrites = OrigWrites ;


<s> bool runOnMachineFunction ( MachineFunction & F ) { bool Changed = false ; for ( MachineFunction :: iterator FI = F . begin ( ) , FE = F . end ( ) ;

FI != FE ; ++ FI ) Changed |= runOnMachineBasicBlock ( * FI ) ;


<s> inline const MachineInstrBuilder & addFrameReference ( const MachineInstrBuilder & MIB , int FI , int Offset = <NUM_LIT> , bool mem = true ) { if ( mem ) return MIB . addImm ( Offset ) . addFrameIndex ( FI ) ;

else return MIB . addFrameIndex ( FI ) . addImm ( Offset ) ;


<s> MachineInstrBuilder MIB = BuildMI ( MF , DL , get ( Opc ) ) ; for ( unsigned i = <NUM_LIT> , e = Addr . size ( ) ; i != e ; ++ i ) MIB . addOperand ( Addr [ i ] ) ; MIB . addReg ( SrcReg , false , false , isKill ) ; NewMIs . push_back ( MIB ) ; return ;


<s> BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addReg ( SrcReg , false , false , isKill ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addReg ( SrcReg , false , false , isKill ) ;

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addReg ( <STR_LIT> ) ;


<s> BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addReg ( SrcReg , false , false , isKill ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addReg ( SrcReg , false , false , isKill ) ; } else if ( RC == <STR_LIT> ) {

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ;


<s> if ( DestRC == <STR_LIT> ) BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( SrcReg ) ;

else BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( SrcReg ) ;


<s> bool <ISA_LIT>InstrInfo :: copyRegToReg ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator MI , unsigned DestReg , unsigned SrcReg , const TargetRegisterClass * DestRC , const TargetRegisterClass * SrcRC ) const { if ( DestRC != SrcRC ) { return false ; } DebugLoc DL = DebugLoc :: getUnknownLoc ( ) ;

if ( MI != MBB . end ( ) ) DL = MI -> getDebugLoc ( ) ;


<s> virtual const <ISA_LIT>RegisterInfo & getRegisterInfo ( ) const { return RI ;


<s> <ISA_LIT>InstrInfo :: <ISA_LIT>InstrInfo ( ) : TargetInstrInfoImpl ( <ISA_LIT>Insts , sizeof ( <ISA_LIT>Insts ) / sizeof ( <ISA_LIT>Insts [ <NUM_LIT> ] ) ) , RI ( * this ) {


<s> DebugLoc dl = DebugLoc :: getUnknownLoc ( ) ; assert ( Cond . empty ( ) && ! FBB && TBB && <STR_LIT> ) ;

BuildMI ( & MBB , dl , get ( <STR_LIT> ) ) . addMBB ( TBB ) ;


<s> SrcSR = DstSR = <NUM_LIT> ; unsigned oc = MI . getOpcode ( ) ; if ( oc == <STR_LIT> || oc == <STR_LIT> ) { assert ( MI . getNumOperands ( ) >= <NUM_LIT> && <STR_LIT> ) ; if ( MI . getOperand ( <NUM_LIT> ) . isReg ( ) && MI . getOperand ( <NUM_LIT> ) . isReg ( ) ) { sourceReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; destReg = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; return true ; } }


<s> unsigned Opc = <NUM_LIT> ; if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else { assert ( <NUM_LIT> && <STR_LIT> ) ; } DebugLoc DL = DebugLoc :: getUnknownLoc ( ) ; MachineInstrBuilder MIB = BuildMI ( MF , DL , get ( Opc ) , DestReg ) ;

for ( unsigned i = <NUM_LIT> , e = Addr . size ( ) ; i != e ; ++ i ) MIB . addOperand ( Addr [ i ] ) ;


<s> unsigned Opc = <NUM_LIT> ; if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else if ( RC == <STR_LIT> ) { Opc = <STR_LIT> ; } else { assert ( <NUM_LIT> && <STR_LIT> ) ; }

DebugLoc DL = DebugLoc :: getUnknownLoc ( ) ;


<s> BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FrameIdx ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FrameIdx ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( FrameIdx ) ;

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ;


<s> BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addFrameIndex ( FrameIdx ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addFrameIndex ( FrameIdx ) ; BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , DestReg ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ;


<s> } DebugLoc DL = DebugLoc :: getUnknownLoc ( ) ; MachineInstrBuilder MIB = BuildMI ( MF , DL , get ( Opc ) ) ; for ( unsigned i = <NUM_LIT> , e = Addr . size ( ) ; i != e ; ++ i ) MIB . addOperand ( Addr [ i ] ) ; MIB . addReg ( SrcReg , getKillRegState ( isKill ) ) ;


<s> Opc = <STR_LIT> ; } else { assert ( <NUM_LIT> && <STR_LIT> ) ; } DebugLoc DL = DebugLoc :: getUnknownLoc ( ) ; MachineInstrBuilder MIB = BuildMI ( MF , DL , get ( Opc ) ) ; for ( unsigned i = <NUM_LIT> , e = Addr . size ( ) ; i != e ; ++ i ) MIB . addOperand ( Addr [ i ] ) ;

MIB . addReg ( SrcReg , getKillRegState ( isKill ) ) ;


<s> BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) ) . addFrameIndex ( FrameIdx ) . addReg ( SrcReg , getKillRegState ( isKill ) ) ; } else if ( RC == <STR_LIT> ) { BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ;

BuildMI ( MBB , MI , DL , get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( <NUM_LIT> ) . addReg ( SrcReg , getKillRegState ( isKill ) ) ;


<s> return new <ISA_LIT>DAGToDAGISel ( TM ) ;


<s> return CurDAG -> getTargetConstant ( Imm , <STR_LIT> ) ;


<s> explicit <ISA_LIT>DAGToDAGISel ( <ISA_LIT>TargetMachine & TM ) : SelectionDAGISel ( TM ) {


<s> virtual bool runOnFunction ( Function & Fn ) {


<s> SDValue OpsY3 [ ] = { TmpY2 , TmpE2 , TmpY2 , TmpPR } ; TmpY3 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsY3 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpY3 . getValue ( <NUM_LIT> ) ; SDValue OpsQ0 [ ] = { Tmp1 , TmpY3 , F0 , TmpPR } ; TmpQ0 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsQ0 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpQ0 . getValue ( <NUM_LIT> ) ; SDValue OpsR0 [ ] = { Tmp2 , TmpQ0 , Tmp1 , TmpPR } ; TmpR0 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsR0 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpR0 . getValue ( <NUM_LIT> ) ; SDValue Ops [ ] = { TmpF5 , TmpY3 , TmpR0 , TmpQ0 , TmpPR } ; Result = CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , Ops , <NUM_LIT> ) ; Chain = SDValue ( Result , <NUM_LIT> ) ; return Result ; } else { SDValue TmpQ2 , TmpR2 , TmpQ3 , TmpQ ; SDValue OpsQ2 [ ] = { TmpF3 , TmpY2 , F0 , TmpPR } ; TmpQ2 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsQ2 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpQ2 . getValue ( <NUM_LIT> ) ; SDValue OpsR2 [ ] = { TmpF4 , TmpQ2 , TmpF3 , TmpPR } ; TmpR2 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsR2 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpR2 . getValue ( <NUM_LIT> ) ; SDValue OpsQ3 [ ] = { TmpF5 , TmpR2 , TmpY2 , TmpQ2 , TmpPR } ; TmpQ3 = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , OpsQ3 , <NUM_LIT> ) , <NUM_LIT> ) ; Chain = TmpQ3 . getValue ( <NUM_LIT> ) ; if ( isSigned ) TmpQ = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , TmpQ3 ) , <NUM_LIT> ) ; else TmpQ = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , TmpQ3 ) , <NUM_LIT> ) ; Chain = TmpQ . getValue ( <NUM_LIT> ) ; if ( isModulus ) { SDValue FPminusB = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , minusB ) , <NUM_LIT> ) ; Chain = FPminusB . getValue ( <NUM_LIT> ) ; SDValue Remainder = SDValue ( CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , TmpQ , FPminusB , TmpF1 ) , <NUM_LIT> ) ; Chain = Remainder . getValue ( <NUM_LIT> ) ; Result = CurDAG -> getTargetNode ( <STR_LIT> , dl , <STR_LIT> , Remainder ) ; Chain = SDValue ( Result , <NUM_LIT> ) ;


<s> MVT <ISA_LIT>TargetLowering :: getSetCCResultType ( MVT VT ) const { return <STR_LIT> ;


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { default : return <NUM_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setShiftAmountType ( <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Promote ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Promote ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : { SDValue AR_PFSVal , Copy ; switch ( Op . getNumOperands ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; abort ( ) ; case <NUM_LIT> : AR_PFSVal = DAG . getCopyFromReg ( Op . getOperand ( <NUM_LIT> ) , dl , VirtGPR , <STR_LIT> ) ; AR_PFSVal = DAG . getCopyToReg ( AR_PFSVal . getValue ( <NUM_LIT> ) , dl , <STR_LIT> , AR_PFSVal ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , AR_PFSVal ) ; case <NUM_LIT> : { MVT ArgVT = Op . getOperand ( <NUM_LIT> ) . getValueType ( ) ; unsigned ArgReg = ArgVT . isInteger ( ) ? <STR_LIT> : <STR_LIT> ; AR_PFSVal = DAG . getCopyFromReg ( Op . getOperand ( <NUM_LIT> ) , dl , VirtGPR , <STR_LIT> ) ; Copy = DAG . getCopyToReg ( AR_PFSVal . getValue ( <NUM_LIT> ) , dl , ArgReg , Op . getOperand ( <NUM_LIT> ) , SDValue ( ) ) ; AR_PFSVal = DAG . getCopyToReg ( Copy . getValue ( <NUM_LIT> ) , dl , <STR_LIT> , AR_PFSVal , Copy . getValue ( <NUM_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , AR_PFSVal , AR_PFSVal . getValue ( <NUM_LIT> ) ) ; } } return SDValue ( ) ; } case <STR_LIT> : { MVT VT = getPointerTy ( ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; SDValue VAList = DAG . getLoad ( VT , dl , Op . getOperand ( <NUM_LIT> ) , Op . getOperand ( <NUM_LIT> ) , SV , <NUM_LIT> ) ; SDValue VAIncr = DAG . getNode ( <STR_LIT> , dl , VT , VAList , DAG . getConstant ( VT . getSizeInBits ( ) / <NUM_LIT> , VT ) ) ; VAIncr = DAG . getStore ( VAList . getValue ( <NUM_LIT> ) , dl , VAIncr , Op . getOperand ( <NUM_LIT> ) , SV , <NUM_LIT> ) ; return DAG . getLoad ( Op . getValueType ( ) , dl , VAIncr , VAList , NULL , <NUM_LIT> ) ; } case <STR_LIT> : { SDValue FR = DAG . getFrameIndex ( VarArgsFrameIndex , <STR_LIT> ) ; const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , dl , FR , Op . getOperand ( <NUM_LIT> ) , SV , <NUM_LIT> ) ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; case <STR_LIT> : { SDValue AR_PFSVal , Copy ; switch ( Op . getNumOperands ( ) ) { default : assert ( <NUM_LIT> && <STR_LIT> ) ; abort ( ) ; case <NUM_LIT> : AR_PFSVal = DAG . getCopyFromReg ( Op . getOperand ( <NUM_LIT> ) , dl , VirtGPR , <STR_LIT> ) ; AR_PFSVal = DAG . getCopyToReg ( AR_PFSVal . getValue ( <NUM_LIT> ) , dl , <STR_LIT> , AR_PFSVal ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , AR_PFSVal ) ; case <NUM_LIT> : { MVT ArgVT = Op . getOperand ( <NUM_LIT> ) . getValueType ( ) ; unsigned ArgReg = ArgVT . isInteger ( ) ? <STR_LIT> : <STR_LIT> ; AR_PFSVal = DAG . getCopyFromReg ( Op . getOperand ( <NUM_LIT> ) , dl , VirtGPR , <STR_LIT> ) ; Copy = DAG . getCopyToReg ( AR_PFSVal . getValue ( <NUM_LIT> ) , dl , ArgReg , Op . getOperand ( <NUM_LIT> ) , SDValue ( ) ) ; AR_PFSVal = DAG . getCopyToReg ( Copy . getValue ( <NUM_LIT> ) , dl , <STR_LIT> , AR_PFSVal , Copy . getValue ( <NUM_LIT> ) ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , AR_PFSVal , AR_PFSVal . getValue ( <NUM_LIT> ) ) ; } } return SDValue ( ) ;


<s> if ( Amount != <NUM_LIT> ) { unsigned Align = MF . getTarget ( ) . getFrameInfo ( ) -> getStackAlignment ( ) ; Amount = ( Amount + Align - <NUM_LIT> ) / Align * Align ; if ( Old -> getOpcode ( ) == <STR_LIT> ) { BuildMI ( MBB , I , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( - Amount ) ;


<s> unsigned i = <NUM_LIT> ; MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; DebugLoc dl = MI . getDebugLoc ( ) ; bool FP = hasFP ( MF ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned BaseRegister = FP ? <STR_LIT> : <STR_LIT> ; MI . getOperand ( i ) . ChangeToRegister ( BaseRegister , false ) ; int Offset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ; Offset += MF . getFrameInfo ( ) -> getStackSize ( ) ; if ( Offset <= <NUM_LIT> && Offset >= - <NUM_LIT> ) { MI . getOperand ( i ) . ChangeToRegister ( <STR_LIT> , false ) ; BuildMI ( MBB , II , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( BaseRegister ) . addImm ( Offset ) ; } else { MI . getOperand ( i ) . ChangeToRegister ( <STR_LIT> , false ) ; BuildMI ( MBB , II , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( Offset ) ;

BuildMI ( MBB , II , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( BaseRegister ) . addReg ( <STR_LIT> ) ;


<s> MachineInstr & MI = * II ; MachineBasicBlock & MBB = * MI . getParent ( ) ; MachineFunction & MF = * MBB . getParent ( ) ; DebugLoc dl = MI . getDebugLoc ( ) ; bool FP = hasFP ( MF ) ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; unsigned BaseRegister = FP ? <STR_LIT> : <STR_LIT> ; MI . getOperand ( i ) . ChangeToRegister ( BaseRegister , false ) ; int Offset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ;

Offset += MF . getFrameInfo ( ) -> getStackSize ( ) ;


<s> unsigned NumBytes = MFI -> getStackSize ( ) ; if ( FP ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) ; } if ( NumBytes != <NUM_LIT> ) { if ( NumBytes <= <NUM_LIT> ) { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addImm ( NumBytes ) ; } else { BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addImm ( NumBytes ) ;

BuildMI ( MBB , MBBI , dl , TII . get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addReg ( <STR_LIT> ) ;


<s> MachineBasicBlock & MBB = MF . front ( ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; bool FP = hasFP ( MF ) ; DebugLoc dl = ( MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc :: getUnknownLoc ( ) ) ; static const unsigned RegsInOrder [ <NUM_LIT> ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; unsigned numStackedGPRsUsed = <NUM_LIT> ; for ( int i = <NUM_LIT> ; i != <NUM_LIT> ; i ++ ) { if ( MF . getRegInfo ( ) . isPhysRegUsed ( RegsInOrder [ i ] ) ) numStackedGPRsUsed = i + <NUM_LIT> ; } unsigned numOutRegsUsed = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> outRegsUsed ; unsigned dstRegOfPseudoAlloc ; for ( MBBI = MBB . begin ( ) ; ; ++ MBBI ) { assert ( MBBI != MBB . end ( ) ) ; if ( MBBI -> getOpcode ( ) == <STR_LIT> ) { dstRegOfPseudoAlloc = MBBI -> getOperand ( <NUM_LIT> ) . getReg ( ) ;


<s> const TargetRegisterClass * const * <ISA_LIT>RegisterInfo :: getCalleeSavedRegClasses ( const MachineFunction * MF ) const {

static const TargetRegisterClass * const CalleeSavedRegClasses [ ] = {


<s> static const unsigned CalleeSavedRegs [ ] = {


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; return - <NUM_LIT> ;


<s> assert ( <NUM_LIT> && <STR_LIT> ) ; return <NUM_LIT> ;


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( MachineFunction & MF ) const {

return hasFP ( MF ) ? <STR_LIT> : <STR_LIT> ;


<s> return hasFP ( MF ) ? <STR_LIT> : <STR_LIT> ;


<s> unsigned <ISA_LIT>RegisterInfo :: getRARegister ( ) const {


<s> Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;


<s> BitVector <ISA_LIT>RegisterInfo :: getReservedRegs ( const MachineFunction & MF ) const { BitVector Reserved ( getNumRegs ( ) ) ; Reserved . set ( <STR_LIT> ) ; Reserved . set ( <STR_LIT> ) ;


<s> return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> bool <ISA_LIT>RegisterInfo :: hasFP ( const MachineFunction & MF ) const { const MachineFrameInfo * MFI = MF . getFrameInfo ( ) ;

return NoFramePointerElim || MFI -> hasVarSizedObjects ( ) ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const TargetInstrInfo & tii ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> , <STR_LIT> ) , TII ( tii ) {


<s> <ISA_LIT>Subtarget :: <ISA_LIT>Subtarget ( ) {


<s> bool <ISA_LIT>TargetMachine :: addAssemblyEmitter ( PassManagerBase & PM , bool Fast , raw_ostream & Out ) { PM . add ( create<ISA_LIT>CodePrinterPass ( Out , * this , Fast ) ) ; return false ;


<s> PM . add ( create<ISA_LIT>CodePrinterPass ( Out , * this , OptLevel , Verbose ) ) ;


<s> PM . add ( create<ISA_LIT>BundlingPass ( * this ) ) ;


<s> virtual const TargetFrameInfo * getFrameInfo ( ) const { return & FrameInfo ;


<s> virtual const TargetFrameInfo * getFrameInfo ( ) const {


<s> if ( ( TT [ <NUM_LIT> ] == 'i' || TT [ <NUM_LIT> ] == 'I' ) && ( TT [ <NUM_LIT> ] == 'a' || TT [ <NUM_LIT> ] == 'A' ) ) { for ( unsigned int i = <NUM_LIT> ; i < ( TT . size ( ) - <NUM_LIT> ) ; i ++ ) if ( TT [ i ] == '6' && TT [ i + <NUM_LIT> ] == '4' ) seen<ISA_LIT> = true ; } if ( seen<ISA_LIT> ) return <NUM_LIT> ; } if ( ! TT . empty ( ) ) return <NUM_LIT> ;


<s> virtual <ISA_LIT>TargetLowering * getTargetLowering ( ) const { return const_cast < <ISA_LIT>TargetLowering * > ( & TLInfo ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Module & M , const std :: string & FS ) : DataLayout ( <STR_LIT> ) , FrameInfo ( TargetFrameInfo :: StackGrowsDown , <NUM_LIT> , <NUM_LIT> ) , TLInfo ( * this ) {