<s> assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ <NUM_LIT> ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) { assert ( false && <STR_LIT> ) ; } RetOps [ <NUM_LIT> ] = Chain ; if ( Flag . getNode ( ) ) RetOps . push_back ( Flag ) ;

return DAG . getNode ( RVLocs . size ( ) == <NUM_LIT> ? <STR_LIT> : <STR_LIT> , dl , <STR_LIT> , & RetOps [ <NUM_LIT> ] , RetOps . size ( ) ) ;


<s> SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; assert ( RVLocs . size ( ) <= <NUM_LIT> && <STR_LIT> ) ; if ( RVLocs . size ( ) > <NUM_LIT> ) { CCValAssign & VA = RVLocs [ <NUM_LIT> ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; Chain = DAG . getCopyToReg ( Chain , dl , VA . getLocReg ( ) , OutVals [ <NUM_LIT> ] , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( DAG . getMachineFunction ( ) . getFunction ( ) -> hasStructRetAttr ( ) ) { assert ( false && <STR_LIT> ) ;


<s> MachineFunction & MF = DAG . getMachineFunction ( ) ; <ISA_LIT>FunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; DebugLoc dl = Op . getDebugLoc ( ) ;

SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ;


<s> DebugLoc dl = Op . getDebugLoc ( ) ; SDValue FI = DAG . getFrameIndex ( FuncInfo -> getVarArgsFrameIndex ( ) , getPointerTy ( ) ) ;

const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;


<s> default : break ; case <STR_LIT> : case <STR_LIT> :

return PerformDivRemCombine ( N , DAG , DCI , Subtarget ) ;


<s> SDValue InGlue = DivRem ; if ( N -> hasAnyUseOfValue ( <NUM_LIT> ) ) { SDValue CopyFromLo = DAG . getCopyFromReg ( InChain , dl , LO , Ty , InGlue ) ; DAG . ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , CopyFromLo ) ; InChain = CopyFromLo . getValue ( <NUM_LIT> ) ; InGlue = CopyFromLo . getValue ( <NUM_LIT> ) ; }


<s> SDValue CopyFromLo = DAG . getCopyFromReg ( InChain , dl , LO , Ty , InGlue ) ; DAG . ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , CopyFromLo ) ; InChain = CopyFromLo . getValue ( <NUM_LIT> ) ; InGlue = CopyFromLo . getValue ( <NUM_LIT> ) ; } if ( N -> hasAnyUseOfValue ( <NUM_LIT> ) ) { SDValue CopyFromHi = DAG . getCopyFromReg ( InChain , dl , HI , Ty , InGlue ) ; DAG . ReplaceAllUsesOfValueWith ( SDValue ( N , <NUM_LIT> ) , CopyFromHi ) ;


<s> unsigned CurWord = FirstWord + i ; if ( CurWord >= IntRegsSize ) break ; unsigned SrcReg = IntRegs [ CurWord ] ; unsigned Reg = AddLiveIn ( MF , SrcReg , & <STR_LIT> ) ; SDValue StorePtr = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , FIN , DAG . getConstant ( i * <NUM_LIT> , <STR_LIT> ) ) ; SDValue Store = DAG . getStore ( Chain , dl , DAG . getRegister ( Reg , <STR_LIT> ) , StorePtr , MachinePointerInfo ( FuncArg , i * <NUM_LIT> ) , false , false , <NUM_LIT> ) ; OutChains . push_back ( Store ) ;


<s> unsigned ByValAlign = Flags . getByValAlign ( ) ; if ( RemainingSize == <NUM_LIT> ) return ; SDValue Src = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Arg , DAG . getConstant ( Offset , <STR_LIT> ) ) ; LastFI = MFI -> CreateFixedObject ( RemainingSize , LocMemOffset , true ) ; SDValue Dst = DAG . getFrameIndex ( LastFI , PtrType ) ;

ByValChain = DAG . getMemcpy ( ByValChain , dl , Dst , Src , DAG . getConstant ( RemainingSize , <STR_LIT> ) , std :: min ( ByValAlign , ( unsigned ) <NUM_LIT> ) , false , false , MachinePointerInfo ( <NUM_LIT> ) , MachinePointerInfo ( <NUM_LIT> ) ) ;


<s> <ISA_LIT>TargetLowering ( <ISA_LIT>TargetMachine & TM ) : TargetLowering ( TM , new <ISA_LIT>TargetObjectFile ( ) ) , Subtarget ( & TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ) { addRegisterClass ( <STR_LIT> , & <STR_LIT> ) ; AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setTargetDAGCombine ( <STR_LIT> ) ; setTargetDAGCombine ( <STR_LIT> ) ; setMinFunctionAlignment ( <NUM_LIT> ) ; computeRegisterProperties ( ) ;


<s> <ISA_LIT>FunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>FunctionInfo > ( ) ;

return DAG . getRegister ( FI -> getGlobalBaseReg ( ) , Ty ) ;


<s> static SDValue GetGlobalReg ( SelectionDAG & DAG , EVT Ty ) { <ISA_LIT>FunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>FunctionInfo > ( ) ;


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( <NUM_LIT> ) ; std :: vector < SDValue > OutChains ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , isVarArg , DAG . getMachineFunction ( ) , getTargetMachine ( ) , ArgLocs , * DAG . getContext ( ) ) ; CCInfo . AnalyzeFormalArguments ( Ins , CC_<ISA_LIT> ) ; Function :: const_arg_iterator FuncArg = DAG . getMachineFunction ( ) . getFunction ( ) -> arg_begin ( ) ; int LastFI = <NUM_LIT> ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i , ++ FuncArg ) { CCValAssign & VA = ArgLocs [ i ] ; EVT ValVT = VA . getValVT ( ) ; <STR_LIT> Flags = Ins [ i ] . Flags ; bool IsRegLoc = VA . isRegLoc ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { DebugLoc dl = Op . getDebugLoc ( ) ; const GlobalValue * GV = cast < GlobalAddressSDNode > ( Op ) -> getGlobal ( ) ; if ( getTargetMachine ( ) . getRelocationModel ( ) != Reloc :: PIC_ ) { SDVTList VTs = DAG . getVTList ( <STR_LIT> ) ; <ISA_LIT>TargetObjectFile & TLOF = ( <ISA_LIT>TargetObjectFile & ) getObjFileLowering ( ) ; if ( TLOF . IsGlobalInSmallSection ( GV , getTargetMachine ( ) ) ) { SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GPRelNode = DAG . getNode ( <STR_LIT> , dl , VTs , & GA , <NUM_LIT> ) ; SDValue GOT = DAG . getGLOBAL_OFFSET_TABLE ( <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GOT , GPRelNode ) ; } SDValue GAHi = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GALo = DAG . getTargetGlobalAddress ( GV , dl , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue HiPart = DAG . getNode ( <STR_LIT> , dl , VTs , & GAHi , <NUM_LIT> ) ; SDValue Lo = DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , GALo ) ; return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , HiPart , Lo ) ; } EVT ValTy = Op . getValueType ( ) ; bool HasGotOfst = ( GV -> hasInternalLinkage ( ) || ( GV -> hasLocalLinkage ( ) && ! isa < Function > ( GV ) ) ) ; unsigned GotFlag = ( HasGotOfst ? <STR_LIT> : <STR_LIT> ) ; SDValue GA = DAG . getTargetGlobalAddress ( GV , dl , ValTy , <NUM_LIT> , GotFlag ) ; GA = DAG . getNode ( <STR_LIT> , dl , ValTy , GetGlobalReg ( DAG , ValTy ) , GA ) ; SDValue ResNode = DAG . getLoad ( ValTy , dl , DAG . getEntryNode ( ) , GA , MachinePointerInfo ( ) , false , false , false , <NUM_LIT> ) ;


<s> switch ( Op . getOpcode ( ) ) { case <STR_LIT> : return LowerBRCOND ( Op , DAG ) ;

case <STR_LIT> : return LowerGlobalAddress ( Op , DAG ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool isVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , const SmallVectorImpl < SDValue > & OutVals , DebugLoc dl , SelectionDAG & DAG ) const { return DAG . getNode ( <STR_LIT> , dl , <STR_LIT> , Chain , DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ) ;


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setTargetDAGCombine ( <STR_LIT> ) ; setTargetDAGCombine ( <STR_LIT> ) ; setBooleanContents ( ZeroOrOneBooleanContent ) ; setBooleanVectorContents ( ZeroOrNegativeOneBooleanContent ) ; for ( MVT VT : <STR_LIT> ( ) ) { setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; }

AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ;


<s> default : break ; case 'c' : return C_RegisterClass ; case 'R' : return C_Memory ; }


<s> SDValue <ISA_LIT>TargetLowering :: getGlobalReg ( SelectionDAG & DAG , EVT Ty ) const { <ISA_LIT>MachineFunctionInfo * FI = DAG . getMachineFunction ( ) . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;


<s> } if ( IsPICCall && ! InternalLinkage ) { unsigned GPReg = <STR_LIT> ; EVT Ty = <STR_LIT> ; RegsToPass . push_back ( std :: make_pair ( GPReg , getGlobalReg ( CLI . DAG , Ty ) ) ) ; } SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) {

Chain = CLI . DAG . getCopyToReg ( Chain , CLI . DL , RegsToPass [ i ] . first , RegsToPass [ i ] . second , InFlag ) ;


<s> if ( VT == <STR_LIT> || VT == <STR_LIT> || VT == <STR_LIT> ) { return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; return std :: make_pair ( <NUM_LIT> , static_cast < const TargetRegisterClass * > ( <NUM_LIT> ) ) ; case 'c' : if ( VT == <STR_LIT> ) return std :: make_pair ( ( unsigned ) <STR_LIT> , & <STR_LIT> ) ; assert ( false && <STR_LIT> ) ; }


<s> switch ( Constraint [ <NUM_LIT> ] ) { case 'r' : if ( VT == <STR_LIT> || VT == <STR_LIT> || VT == <STR_LIT> ) { return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; } if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; return std :: make_pair ( <NUM_LIT> , static_cast < const TargetRegisterClass * > ( <NUM_LIT> ) ) ; case 'c' : if ( VT == <STR_LIT> ) return std :: make_pair ( ( unsigned ) <STR_LIT> , & <STR_LIT> ) ;


<s> <STR_LIT> SpecialCallConv = <STR_LIT> ; return SpecialCallConv ;


<s> <ISA_LIT>TargetLowering :: <STR_LIT> <ISA_LIT>TargetLowering :: getSpecialCallingConv ( SDValue Callee ) const { <STR_LIT> SpecialCallConv = <STR_LIT> ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> switch ( AM . Scale ) { case <NUM_LIT> : break ; case <NUM_LIT> : if ( ! AM . HasBaseReg ) break ; return false ;


<s> bool <ISA_LIT>TargetLowering :: isOffsetFoldingLegal ( const GlobalAddressSDNode * GA ) const {


<s> Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'L' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( ( isUInt < <NUM_LIT> > ( Val ) ) && ( ( Val & <NUM_LIT> ) == <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'N' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = ( int64_t ) C -> getZExtValue ( ) ; if ( ( Val >= - <NUM_LIT> ) && ( Val <= - <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'O' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } }


<s> break ; } } } return ; case 'J' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getZExtValue ( ) ; if ( Val == <NUM_LIT> ) { Result = DAG . getTargetConstant ( <NUM_LIT> , DL , Type ) ; break ; } } return ; case 'K' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( isUInt < <NUM_LIT> > ( Val ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'L' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( ( isUInt < <NUM_LIT> > ( Val ) ) && ( ( Val & <NUM_LIT> ) == <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; }


<s> BlockAddressSDNode * N = cast < BlockAddressSDNode > ( Op ) ; EVT Ty = Op . getValueType ( ) ; if ( ! isPositionIndependent ( ) ) return getAddrNonPIC ( N , Ty , DAG ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerBRCOND ( SDValue Op , SelectionDAG & DAG ) const { return Op ;


<s> SelectionDAG & DAG = CLI . DAG ; SDLoc DL = CLI . DL ; SmallVectorImpl < <STR_LIT> > & Outs = CLI . Outs ; SmallVectorImpl < SDValue > & OutVals = CLI . OutVals ; SmallVectorImpl < <STR_LIT> > & Ins = CLI . Ins ; SDValue Chain = CLI . Chain ; SDValue Callee = CLI . Callee ; bool & IsTailCall = CLI . IsTailCall ; CallingConv :: ID CallConv = CLI . CallConv ; bool IsVarArg = CLI . IsVarArg ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; const TargetFrameLowering * TFL = MF . getSubtarget ( ) . getFrameLowering ( ) ; <ISA_LIT>MachineFunctionInfo * FuncInfo = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; bool IsPIC = isPositionIndependent ( ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; <STR_LIT> SpecialCallingConv = getSpecialCallingConv ( Callee ) ; <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo , SpecialCallingConv ) ; <ISA_LIT>CCInfo . analyzeCallOperands ( Outs , IsVarArg , Subtarget . abiUsesSoftFloat ( ) , Callee . getNode ( ) , CLI . getArgs ( ) ) ; unsigned NextStackOffset = CCInfo . getNextStackOffset ( ) ; if ( IsTailCall ) IsTailCall = isEligibleForTailCallOptimization ( <ISA_LIT>CCInfo , NextStackOffset , * MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ) ; if ( ! IsTailCall && CLI . CS && CLI . CS . isMustTailCall ( ) ) report_fatal_error ( <STR_LIT> <STR_LIT> ) ; if ( IsTailCall ) ++ NumTailCalls ; unsigned StackAlignment = TFL -> getStackAlignment ( ) ; NextStackOffset = alignTo ( NextStackOffset , StackAlignment ) ; SDValue NextStackOffsetVal = DAG . getIntPtrConstant ( NextStackOffset , DL , true ) ; if ( ! IsTailCall ) Chain = DAG . getCALLSEQ_START ( Chain , NextStackOffset , <NUM_LIT> , DL ) ; SDValue StackPtr = DAG . getCopyFromReg ( Chain , DL , <STR_LIT> , getPointerTy ( DAG . getDataLayout ( ) ) ) ; std :: deque < std :: pair < unsigned , SDValue >> RegsToPass ; SmallVector < SDValue , <NUM_LIT> > MemOpChains ;

<STR_LIT> ByValArg = <ISA_LIT>CCInfo . byval_begin ( ) ;


<s> unsigned Reg = addLiveIn ( DAG . getMachineFunction ( ) , ArgReg , RC ) ; SDValue ArgValue = DAG . getCopyFromReg ( Chain , DL , Reg , RegVT ) ; if ( VA . getLocInfo ( ) != CCValAssign :: Full ) { unsigned Opcode = <NUM_LIT> ; if ( VA . getLocInfo ( ) == CCValAssign :: SExt ) Opcode = <STR_LIT> ; else if ( VA . getLocInfo ( ) == CCValAssign :: ZExt ) Opcode = <STR_LIT> ; if ( Opcode ) ArgValue = DAG . getNode ( Opcode , DL , RegVT , ArgValue , DAG . getValueType ( ValVT ) ) ; ArgValue = DAG . getNode ( <STR_LIT> , DL , ValVT , ArgValue ) ; } if ( ( RegVT == <STR_LIT> && ValVT == <STR_LIT> ) || ( RegVT == <STR_LIT> && ValVT == <STR_LIT> ) ) ArgValue = DAG . getNode ( <STR_LIT> , DL , ValVT , ArgValue ) ; InVals . push_back ( ArgValue ) ; } else { MVT LocVT = VA . getLocVT ( ) ; assert ( VA . isMemLoc ( ) ) ; int FI = MFI . CreateFixedObject ( ValVT . getSizeInBits ( ) / <NUM_LIT> , VA . getLocMemOffset ( ) , true ) ; SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ; SDValue Load = DAG . getLoad ( LocVT , DL , Chain , FIN , MachinePointerInfo :: getFixedStack ( DAG . getMachineFunction ( ) , FI ) ) ; InVals . push_back ( Load ) ; OutChains . push_back ( Load . getValue ( <NUM_LIT> ) ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerFormalArguments ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Ins , const SDLoc & DL , SelectionDAG & DAG , SmallVectorImpl < SDValue > & InVals ) const { MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; <ISA_LIT>FI -> setVarArgsFrameIndex ( <NUM_LIT> ) ; SmallVector < CCValAssign , <NUM_LIT> > ArgLocs ; CCState CCInfo ( CallConv , IsVarArg , DAG . getMachineFunction ( ) , ArgLocs , * DAG . getContext ( ) ) ; <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo ) ; Function :: const_arg_iterator FuncArg = DAG . getMachineFunction ( ) . getFunction ( ) . arg_begin ( ) ; bool UseSoftFloat = Subtarget . abiUsesSoftFloat ( ) ; <ISA_LIT>CCInfo . analyzeFormalArguments ( Ins , UseSoftFloat , FuncArg ) ; <ISA_LIT>FI -> setFormalArgInfo ( CCInfo . getNextStackOffset ( ) , <ISA_LIT>CCInfo . hasByValArg ( ) ) ; std :: vector < SDValue > OutChains ; unsigned CurArgIdx = <NUM_LIT> ; <STR_LIT> ByValArg = <ISA_LIT>CCInfo . byval_begin ( ) ; for ( unsigned i = <NUM_LIT> , e = ArgLocs . size ( ) ; i != e ; ++ i ) { CCValAssign & VA = ArgLocs [ i ] ; if ( Ins [ i ] . isOrigArg ( ) ) { std :: advance ( FuncArg , Ins [ i ] . getOrigArgIndex ( ) - CurArgIdx ) ; CurArgIdx = Ins [ i ] . getOrigArgIndex ( ) ; } EVT ValVT = VA . getValVT ( ) ; <STR_LIT> Flags = Ins [ i ] . Flags ; bool IsRegLoc = VA . isRegLoc ( ) ; if ( Flags . isByVal ( ) ) { assert ( Flags . getByValSize ( ) && <STR_LIT> ) ; assert ( ByValArg != <ISA_LIT>CCInfo . byval_end ( ) ) ; copyByValRegs ( Chain , DL , OutChains , DAG , Flags , InVals , & * FuncArg , <ISA_LIT>CCInfo , * ByValArg ) ; ++ ByValArg ; continue ;


<s> EVT Ty = Op . getValueType ( ) ; GlobalAddressSDNode * N = cast < GlobalAddressSDNode > ( Op ) ; const GlobalValue * GV = N -> getGlobal ( ) ; const GlobalObject * GO = GV -> getBaseObject ( ) ; if ( ! isPositionIndependent ( ) ) { if ( GO && TLOF -> IsGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) { SDValue GA = DAG . getTargetGlobalAddress ( GV , DL , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GPRelNode = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( <STR_LIT> ) , GA ) ; SDValue GPReg = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , GPReg , GPRelNode ) ; } return getAddrNonPIC ( N , Ty , DAG ) ;


<s> const GlobalValue * GV = N -> getGlobal ( ) ; const GlobalObject * GO = GV -> getBaseObject ( ) ; if ( ! isPositionIndependent ( ) ) { if ( GO && TLOF -> IsGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) { SDValue GA = DAG . getTargetGlobalAddress ( GV , DL , <STR_LIT> , <NUM_LIT> , <STR_LIT> ) ; SDValue GPRelNode = DAG . getNode ( <STR_LIT> , DL , DAG . getVTList ( <STR_LIT> ) , GA ) ; SDValue GPReg = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , GPReg , GPRelNode ) ;


<s> case <STR_LIT> : return lowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return lowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return lowerSELECT ( Op , DAG ) ; } return SDValue ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const { switch ( Op . getOpcode ( ) ) { case <STR_LIT> : return lowerBRCOND ( Op , DAG ) ; case <STR_LIT> : return lowerBlockAddress ( Op , DAG ) ; case <STR_LIT> : return lowerJumpTable ( Op , DAG ) ; case <STR_LIT> : return lowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return lowerSELECT ( Op , DAG ) ; }


<s> SDValue <ISA_LIT>TargetLowering :: LowerReturn ( SDValue Chain , CallingConv :: ID CallConv , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , const SmallVectorImpl < SDValue > & OutsVals , const SDLoc & DL , SelectionDAG & DAG ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ; MachineFunction & MF = DAG . getMachineFunction ( ) ; CCState CCInfo ( CallConv , IsVarArg , MF , RVLocs , * DAG . getContext ( ) ) ; <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo ) ; <ISA_LIT>CCInfo . analyzeReturn ( Outs , Subtarget . abiUsesSoftFloat ( ) , MF . getFunction ( ) . getReturnType ( ) ) ; SDValue Flag ; SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { SDValue Val = OutsVals [ i ] ; CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; if ( RVLocs [ i ] . getValVT ( ) != RVLocs [ i ] . getLocVT ( ) ) Val = DAG . getNode ( <STR_LIT> , DL , RVLocs [ i ] . getLocVT ( ) , Val ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) { <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned Reg = <ISA_LIT>FI -> getSRetReturnReg ( ) ; if ( ! Reg ) llvm_unreachable ( <STR_LIT> ) ; SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ; unsigned V0 = <STR_LIT> ;

Chain = DAG . getCopyToReg ( Chain , DL , V0 , Val , Flag ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerSELECT ( SDValue Op , SelectionDAG & DAG ) const { return Op ;


<s> I = std :: find_if ( B , E , isdigit ) ; Prefix . assign ( B , I - B ) ; if ( I == E ) return std :: make_pair ( true , false ) ;

return std :: make_pair ( ! getAsUnsignedInteger ( StringRef ( I , E - I ) , <NUM_LIT> , Reg ) , true ) ;


<s> static std :: pair < bool , bool > parsePhysicalReg ( const StringRef & C , std :: string & Prefix , unsigned long long & Reg ) { if ( C . front ( ) != '{' || C . back ( ) != '}' ) return std :: make_pair ( false , false ) ; StringRef :: const_iterator I , B = C . begin ( ) + <NUM_LIT> , E = C . end ( ) - <NUM_LIT> ; I = std :: find_if ( B , E , isdigit ) ; Prefix . assign ( B , I - B ) ; if ( I == E ) return std :: make_pair ( true , false ) ; return std :: make_pair ( ! getAsUnsignedInteger ( StringRef ( I , E - I ) , <NUM_LIT> , Reg ) , true ) ;


<s> const TargetRegisterClass * RC ; std :: string Prefix ; unsigned long long Reg ; std :: pair < bool , bool > R = parsePhysicalReg ( C , Prefix , Reg ) ; if ( ! R . first ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; if ( ! R . second ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; assert ( Prefix == <STR_LIT> ) ; RC = getRegClassFor ( ( VT == <STR_LIT> ) ? <STR_LIT> : VT ) ; assert ( Reg < RC -> getNumRegs ( ) ) ;

return std :: make_pair ( * ( RC -> begin ( ) + Reg ) , RC ) ;


<s> unsigned ByValSizeInBytes = Flags . getByValSize ( ) ; unsigned OffsetInBytes = <NUM_LIT> ; unsigned RegSizeInBytes = CC . regSize ( ) ; unsigned Alignment = std :: min ( Flags . getByValAlign ( ) , RegSizeInBytes ) ; EVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) , RegTy = <STR_LIT> ( RegSizeInBytes * <NUM_LIT> ) ; if ( ByVal . NumRegs ) { const ArrayRef < MCPhysReg > ArgRegs = CC . intArgRegs ( ) ; bool LeftoverBytes = ( ByVal . NumRegs * RegSizeInBytes > ByValSizeInBytes ) ; unsigned I = <NUM_LIT> ; for ( ; I < ByVal . NumRegs - LeftoverBytes ; ++ I , OffsetInBytes += RegSizeInBytes ) { SDValue LoadPtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , Arg , DAG . getConstant ( OffsetInBytes , DL , PtrTy ) ) ; SDValue LoadVal = DAG . getLoad ( RegTy , DL , Chain , LoadPtr , MachinePointerInfo ( ) ) ; MemOpChains . push_back ( LoadVal . getValue ( <NUM_LIT> ) ) ; unsigned ArgReg = ArgRegs [ ByVal . FirstIdx + I ] ; RegsToPass . push_back ( std :: make_pair ( ArgReg , LoadVal ) ) ; } if ( ByValSizeInBytes == OffsetInBytes ) return ; if ( LeftoverBytes ) { assert ( ( ByValSizeInBytes > OffsetInBytes ) && ( ByValSizeInBytes < OffsetInBytes + RegSizeInBytes ) && <STR_LIT> ) ; SDValue Val ; for ( unsigned LoadSizeInBytes = RegSizeInBytes / <NUM_LIT> , TotalBytesLoaded = <NUM_LIT> ; OffsetInBytes < ByValSizeInBytes ; LoadSizeInBytes /= <NUM_LIT> ) { unsigned RemainingSizeInBytes = ByValSizeInBytes - OffsetInBytes ; if ( RemainingSizeInBytes < LoadSizeInBytes ) continue ; SDValue LoadPtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , Arg , DAG . getConstant ( OffsetInBytes , DL , PtrTy ) ) ; SDValue LoadVal = DAG . getExtLoad ( <STR_LIT> , DL , RegTy , Chain , LoadPtr , MachinePointerInfo ( ) , <STR_LIT> ( LoadSizeInBytes * <NUM_LIT> ) , Alignment ) ; MemOpChains . push_back ( LoadVal . getValue ( <NUM_LIT> ) ) ; unsigned Shamt ; if ( isLittle ) Shamt = TotalBytesLoaded * <NUM_LIT> ; else Shamt = ( RegSizeInBytes - ( TotalBytesLoaded + LoadSizeInBytes ) ) * <NUM_LIT> ; SDValue Shift = DAG . getNode ( <STR_LIT> , DL , RegTy , LoadVal , DAG . getConstant ( Shamt , DL , <STR_LIT> ) ) ; if ( Val . getNode ( ) ) Val = DAG . getNode ( <STR_LIT> , DL , RegTy , Val , Shift ) ; else Val = Shift ; OffsetInBytes += LoadSizeInBytes ; TotalBytesLoaded += LoadSizeInBytes ; Alignment = std :: min ( Alignment , LoadSizeInBytes ) ; } unsigned ArgReg = ArgRegs [ ByVal . FirstIdx + I ] ; RegsToPass . push_back ( std :: make_pair ( ArgReg , Val ) ) ; return ; }


<s> static unsigned addLiveIn ( MachineFunction & MF , unsigned PReg , const TargetRegisterClass * RC ) {

unsigned VReg = MF . getRegInfo ( ) . createVirtualRegister ( RC ) ;


<s> unsigned VReg = MF . getRegInfo ( ) . createVirtualRegister ( RC ) ; MF . getRegInfo ( ) . addLiveIn ( PReg , VReg ) ;


<s> ByValArgInfo ( ) : FirstIdx ( <NUM_LIT> ) , NumRegs ( <NUM_LIT> ) , Address ( <NUM_LIT> ) {


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const {

SmallVector < CCValAssign , <NUM_LIT> > RVLocs ;


<s> bool <ISA_LIT>TargetLowering :: CanLowerReturn ( CallingConv :: ID CallConv , MachineFunction & MF , bool IsVarArg , const SmallVectorImpl < <STR_LIT> > & Outs , LLVMContext & Context ) const { SmallVector < CCValAssign , <NUM_LIT> > RVLocs ;

CCState CCInfo ( CallConv , IsVarArg , MF , RVLocs , Context ) ;


<s> bool isI64 = ( ValVT == <STR_LIT> && OrigAlign == <NUM_LIT> ) ; if ( ValVT == <STR_LIT> || ( ValVT == <STR_LIT> && AllocateFloatsInIntReg ) ) { Reg = State . AllocateReg ( IntRegs ) ; if ( isI64 && ( Reg == <STR_LIT> ) ) Reg = State . AllocateReg ( IntRegs ) ; LocVT = <STR_LIT> ; } else if ( ValVT == <STR_LIT> && AllocateFloatsInIntReg ) { Reg = State . AllocateReg ( IntRegs ) ; if ( Reg == <STR_LIT> ) Reg = State . AllocateReg ( IntRegs ) ; State . AllocateReg ( IntRegs ) ; LocVT = <STR_LIT> ; } else llvm_unreachable ( <STR_LIT> ) ; if ( ! Reg ) { unsigned Offset = State . AllocateStack ( ValVT . getSizeInBits ( ) >> <NUM_LIT> , OrigAlign ) ;

State . addLoc ( CCValAssign :: getMem ( ValNo , ValVT , Offset , LocVT , LocInfo ) ) ;


<s> static bool CC_<ISA_LIT>S32 ( unsigned ValNo , MVT ValVT , MVT LocVT , CCValAssign :: LocInfo LocInfo , <STR_LIT> ArgFlags , CCState & State ) { if ( ArgFlags . isByVal ( ) ) return true ; if ( LocVT == <STR_LIT> || LocVT == <STR_LIT> ) { LocVT = <STR_LIT> ; if ( ArgFlags . isSExt ( ) ) LocInfo = CCValAssign :: SExt ; else if ( ArgFlags . isZExt ( ) ) LocInfo = CCValAssign :: ZExt ; else LocInfo = CCValAssign :: AExt ;


<s> int FI = MFI . CreateFixedObject ( FrameObjSize , FrameObjOffset , true ) ; SDValue FIN = DAG . getFrameIndex ( FI , PtrTy ) ; InVals . push_back ( FIN ) ; if ( ! ByVal . NumRegs ) return ; MVT RegTy = <STR_LIT> ( CC . regSize ( ) * <NUM_LIT> ) ; const TargetRegisterClass * RC = getRegClassFor ( RegTy ) ; for ( unsigned I = <NUM_LIT> ; I < ByVal . NumRegs ; ++ I ) { unsigned ArgReg = ByValArgRegs [ ByVal . FirstIdx + I ] ; unsigned VReg = addLiveIn ( MF , ArgReg , RC ) ; unsigned Offset = I * CC . regSize ( ) ; SDValue StorePtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , FIN , DAG . getConstant ( Offset , DL , PtrTy ) ) ; SDValue Store = DAG . getStore ( Chain , DL , DAG . getRegister ( VReg , RegTy ) , StorePtr , MachinePointerInfo ( FuncArg , Offset ) ) ;


<s> setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; setLoadExtAction ( <STR_LIT> , VT , <STR_LIT> , Promote ) ; } AddPromotedToType ( <STR_LIT> , <STR_LIT> , <STR_LIT> ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Custom ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setOperationAction ( <STR_LIT> , <STR_LIT> , Expand ) ; setTargetDAGCombine ( <STR_LIT> ) ; setTargetDAGCombine ( <STR_LIT> ) ; setMinFunctionAlignment ( <NUM_LIT> ) ; setStackPointerRegisterToSaveRestore ( <STR_LIT> ) ;


<s> return llvm :: create<ISA_LIT>SETargetLowering ( TM , STI ) ;


<s> const <ISA_LIT>TargetLowering * <ISA_LIT>TargetLowering :: create ( const <ISA_LIT>TargetMachine & TM , const <ISA_LIT>Subtarget & STI ) { return llvm :: create<ISA_LIT>SETargetLowering ( TM , STI ) ;


<s> XOR = <STR_LIT> ; ZERO = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Incr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loopMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loopMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( exitMBB ) ; BB = loopMBB ; BuildMI ( BB , DL , TII -> get ( LL ) , OldVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; if ( Nand ) { BuildMI ( BB , DL , TII -> get ( AND ) , AndRes ) . addReg ( OldVal ) . addReg ( Incr ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , StoreVal ) . addReg ( ZERO ) . addReg ( AndRes ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , AndRes2 ) . addReg ( ZERO ) . addReg ( AndRes ) ; } else if ( BinOpcode ) { BuildMI ( BB , DL , TII -> get ( BinOpcode ) , StoreVal ) . addReg ( OldVal ) . addReg ( Incr ) ; } else {


<s> DebugLoc DL = MI . getDebugLoc ( ) ; unsigned LL , SC , AND , XOR , ZERO , BEQ ; LL = <STR_LIT> ; SC = <STR_LIT> ; AND = <STR_LIT> ; XOR = <STR_LIT> ; ZERO = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Incr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes = RegInfo . createVirtualRegister ( RC ) ; unsigned AndRes2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loopMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loopMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( loopMBB ) ; loopMBB -> addSuccessor ( exitMBB ) ; BB = loopMBB ; BuildMI ( BB , DL , TII -> get ( LL ) , OldVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; if ( Nand ) { BuildMI ( BB , DL , TII -> get ( AND ) , AndRes ) . addReg ( OldVal ) . addReg ( Incr ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , StoreVal ) . addReg ( ZERO ) . addReg ( AndRes ) ; BuildMI ( BB , DL , TII -> get ( XOR ) , AndRes2 ) . addReg ( ZERO ) . addReg ( AndRes ) ; } else if ( BinOpcode ) { BuildMI ( BB , DL , TII -> get ( BinOpcode ) , StoreVal ) . addReg ( OldVal ) . addReg ( Incr ) ;


<s> exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( exitMBB ) ; loop1MBB -> addSuccessor ( loop2MBB ) ; loop2MBB -> addSuccessor ( loop1MBB ) ; loop2MBB -> addSuccessor ( exitMBB ) ; BB = loop1MBB ; BuildMI ( BB , DL , TII -> get ( LL ) , Dest ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ; BuildMI ( BB , DL , TII -> get ( BNE ) ) . addReg ( Dest ) . addReg ( OldVal ) . addMBB ( exitMBB ) ; BB = loop2MBB ; BuildMI ( BB , DL , TII -> get ( SC ) , Success ) . addReg ( NewVal ) . addReg ( Ptr ) . addImm ( <NUM_LIT> ) ;

BuildMI ( BB , DL , TII -> get ( BEQ ) ) . addReg ( Success ) . addReg ( ZERO ) . addMBB ( loop1MBB ) ;


<s> ZERO = <STR_LIT> ; BNE = <STR_LIT> ; BEQ = <STR_LIT> ; unsigned Dest = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned OldVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned NewVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loop1MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * loop2MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loop1MBB ) ; MF -> insert ( It , loop2MBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( exitMBB ) ; loop1MBB -> addSuccessor ( loop2MBB ) ; loop2MBB -> addSuccessor ( loop1MBB ) ;


<s> MachineFunction * MF = BB -> getParent ( ) ; MachineRegisterInfo & RegInfo = MF -> getRegInfo ( ) ; const TargetRegisterClass * RC = getRegClassFor ( <STR_LIT> ) ; const TargetInstrInfo * TII = Subtarget . getInstrInfo ( ) ; DebugLoc DL = MI . getDebugLoc ( ) ; unsigned Dest = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned Ptr = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned CmpVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned NewVal = MI . getOperand ( <NUM_LIT> ) . getReg ( ) ; unsigned AlignedAddr = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftAmt = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask2 = RegInfo . createVirtualRegister ( RC ) ; unsigned Mask3 = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftedCmpVal = RegInfo . createVirtualRegister ( RC ) ; unsigned OldVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedOldVal0 = RegInfo . createVirtualRegister ( RC ) ; unsigned ShiftedNewVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskLSB2 = RegInfo . createVirtualRegister ( RC ) ; unsigned PtrLSB2 = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskUpper = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedCmpVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedNewVal = RegInfo . createVirtualRegister ( RC ) ; unsigned MaskedOldVal1 = RegInfo . createVirtualRegister ( RC ) ; unsigned StoreVal = RegInfo . createVirtualRegister ( RC ) ; unsigned SrlRes = RegInfo . createVirtualRegister ( RC ) ; unsigned Success = RegInfo . createVirtualRegister ( RC ) ; const BasicBlock * LLVM_BB = BB -> getBasicBlock ( ) ; MachineBasicBlock * loop1MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * loop2MBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * sinkMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineBasicBlock * exitMBB = MF -> CreateMachineBasicBlock ( LLVM_BB ) ; MachineFunction :: iterator It = ++ BB -> getIterator ( ) ; MF -> insert ( It , loop1MBB ) ; MF -> insert ( It , loop2MBB ) ; MF -> insert ( It , sinkMBB ) ; MF -> insert ( It , exitMBB ) ; exitMBB -> splice ( exitMBB -> begin ( ) , BB , std :: next ( MachineBasicBlock :: iterator ( MI ) ) , BB -> end ( ) ) ; exitMBB -> transferSuccessorsAndUpdatePHIs ( BB ) ; BB -> addSuccessor ( loop1MBB ) ; loop1MBB -> addSuccessor ( sinkMBB ) ;


<s> return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <NUM_LIT> , true ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinary ( MI , BB , <NUM_LIT> , <STR_LIT> ) ; case <STR_LIT> : return emitAtomicBinaryPartword ( MI , BB , <NUM_LIT> , <NUM_LIT> ) ;


<s> unsigned ScrReg = RegInfo . createVirtualRegister ( RC ) ; assert ( Size < <NUM_LIT> ) ; int64_t ShiftImm = <NUM_LIT> - ( Size * <NUM_LIT> ) ; BuildMI ( BB , DL , TII -> get ( <STR_LIT> ) , ScrReg ) . addReg ( SrcReg ) . addImm ( ShiftImm ) ;

BuildMI ( BB , DL , TII -> get ( <STR_LIT> ) , DstReg ) . addReg ( ScrReg ) . addImm ( ShiftImm ) ;


<s> SDLoc DL ( N ) ; SDValue Tgt = DAG . getNode ( <STR_LIT> , DL , Ty , getGlobalReg ( DAG , Ty ) , getTargetNode ( N , Ty , DAG , Flag ) ) ;

return DAG . getLoad ( Ty , DL , Chain , Tgt , PtrInfo ) ;


<s> SDValue Wrapper = DAG . getNode ( <STR_LIT> , DL , Ty , Hi , getTargetNode ( N , Ty , DAG , LoFlag ) ) ; return DAG . getLoad ( Ty , DL , Chain , Wrapper , PtrInfo ) ;


<s> SDValue Load = DAG . getLoad ( Ty , DL , DAG . getEntryNode ( ) , GOT , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ; unsigned LoFlag = <STR_LIT> ; SDValue Lo = DAG . getNode ( <STR_LIT> , DL , Ty , getTargetNode ( N , Ty , DAG , LoFlag ) ) ; return DAG . getNode ( <STR_LIT> , DL , Ty , Load , Lo ) ;


<s> SDLoc DL ( N ) ; SDValue Hi = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ; SDValue Lo = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , Ty , DAG . getNode ( <STR_LIT> , DL , Ty , Hi ) , DAG . getNode ( <STR_LIT> , DL , Ty , Lo ) ) ;


<s> SDLoc DL ( N ) ; SDValue Hi = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ; SDValue Lo = getTargetNode ( N , Ty , DAG , <STR_LIT> ) ;

return DAG . getNode ( <STR_LIT> , DL , Ty , DAG . getNode ( <STR_LIT> , DL , Ty , Hi ) , DAG . getNode ( <STR_LIT> , DL , Ty , Lo ) ) ;


<s> const CCState & getCCInfo ( ) const {


<s> <ISA_LIT>TargetLowering :: ConstraintType <ISA_LIT>TargetLowering :: getConstraintType ( StringRef Constraint ) const { if ( Constraint . size ( ) == <NUM_LIT> ) { switch ( Constraint [ <NUM_LIT> ] ) { default : break ; case 'c' :


<s> default : break ; case 'c' : return C_RegisterClass ; case 'R' : return C_Memory ; } } return TargetLowering :: getConstraintType ( Constraint ) ;


<s> unsigned T9Reg = <STR_LIT> ; RegsToPass . push_front ( std :: make_pair ( T9Reg , Callee ) ) ; } else Ops . push_back ( Callee ) ; if ( IsPICCall && ! InternalLinkage ) { unsigned GPReg = <STR_LIT> ; EVT Ty = <STR_LIT> ; RegsToPass . push_back ( std :: make_pair ( GPReg , getGlobalReg ( CLI . DAG , Ty ) ) ) ; } SDValue InFlag ; for ( unsigned i = <NUM_LIT> , e = RegsToPass . size ( ) ; i != e ; ++ i ) {


<s> } if ( VT == <STR_LIT> ) return std :: make_pair ( <NUM_LIT> , & <STR_LIT> ) ; return std :: make_pair ( <NUM_LIT> , static_cast < const TargetRegisterClass * > ( <NUM_LIT> ) ) ; case 'c' : if ( VT == <STR_LIT> ) return std :: make_pair ( ( unsigned ) <STR_LIT> , & <STR_LIT> ) ; assert ( <STR_LIT> ) ; } } std :: pair < unsigned , const TargetRegisterClass * > R ; R = parseRegForInlineAsmConstraint ( Constraint , VT ) ; if ( R . second ) return R ; return TargetLowering :: getRegForInlineAsmConstraint ( TRI , Constraint , VT ) ;


<s> if ( ! VT . isVector ( ) ) return <STR_LIT> ;

return VT . changeVectorElementTypeToInteger ( ) ;


<s> break ; case 'I' : case 'J' : case 'K' : case 'L' : case 'N' : case 'O' : case 'P' : if ( isa < ConstantInt > ( CallOperandVal ) ) weight = CW_Constant ; break ;


<s> Type * type = CallOperandVal -> getType ( ) ; switch ( * constraint ) { default : weight = TargetLowering :: getSingleConstraintMatchWeight ( info , constraint ) ; break ; case 'c' : if ( type -> isIntegerTy ( ) ) weight = CW_SpecificReg ; break ; case 'I' : case 'J' : case 'K' : case 'L' : case 'N' : case 'O' : case 'P' : if ( isa < ConstantInt > ( CallOperandVal ) ) weight = CW_Constant ; break ; case 'R' : weight = CW_Memory ; break ;


<s> <ISA_LIT>TargetLowering :: <STR_LIT> <ISA_LIT>TargetLowering :: getSpecialCallingConv ( SDValue Callee ) const { <STR_LIT> SpecialCallingConv = <STR_LIT> ;


<s> SDValue <ISA_LIT>TargetLowering :: getTargetNode ( JumpTableSDNode * N , EVT Ty , SelectionDAG & DAG , unsigned Flag ) const { return DAG . getTargetJumpTable ( N -> getIndex ( ) , Ty , Flag ) ;


<s> const char * <ISA_LIT>TargetLowering :: getTargetNodeName ( unsigned Opcode ) const { switch ( Opcode ) { case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ;


<s> if ( AM . BaseGV ) return false ; switch ( AM . Scale ) { case <NUM_LIT> : break ; case <NUM_LIT> : if ( ! AM . HasBaseReg ) break ; return false ; default : return false ; } return true ;


<s> if ( AM . BaseGV ) return false ; switch ( AM . Scale ) { case <NUM_LIT> : break ; case <NUM_LIT> :


<s> if ( Op -> getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> || cast < ConstantSDNode > ( Op -> getOperand ( <NUM_LIT> ) . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) != <NUM_LIT> || Op -> getOperand ( <NUM_LIT> ) . getOpcode ( ) != <STR_LIT> ) return SDValue ( ) ; MachineFunction & MF = DAG . getMachineFunction ( ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;


<s> } } return ; case 'J' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getZExtValue ( ) ; if ( Val == <NUM_LIT> ) { Result = DAG . getTargetConstant ( <NUM_LIT> , DL , Type ) ; break ; } } return ; case 'K' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( isUInt < <NUM_LIT> > ( Val ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'L' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) && ( ( Val & <NUM_LIT> ) == <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'N' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( Val >= - <NUM_LIT> ) && ( Val <= - <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'O' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'P' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) {


<s> } } return ; case 'J' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getZExtValue ( ) ; if ( Val == <NUM_LIT> ) { Result = DAG . getTargetConstant ( <NUM_LIT> , DL , Type ) ; break ; } } return ; case 'K' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; uint64_t Val = ( uint64_t ) C -> getZExtValue ( ) ; if ( isUInt < <NUM_LIT> > ( Val ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'L' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) && ( ( Val & <NUM_LIT> ) == <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'N' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( Val >= - <NUM_LIT> ) && ( Val <= - <NUM_LIT> ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'O' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ; int64_t Val = C -> getSExtValue ( ) ; if ( ( isInt < <NUM_LIT> > ( Val ) ) ) { Result = DAG . getTargetConstant ( Val , DL , Type ) ; break ; } } return ; case 'P' : if ( ConstantSDNode * C = dyn_cast < ConstantSDNode > ( Op ) ) { EVT Type = Op . getValueType ( ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerATOMIC_FENCE ( SDValue Op , SelectionDAG & DAG ) const {


<s> EVT Ty = Op . getValueType ( ) ; if ( ! isPositionIndependent ( ) ) return getAddrNonPIC ( N , Ty , DAG ) ;


<s> if ( ! isPositionIndependent ( ) ) return getAddrNonPIC ( N , Ty , DAG ) ;


<s> <ISA_LIT>CC <ISA_LIT>CCInfo ( CallConv , ABI . IsO32 ( ) , CCInfo ) ; <ISA_LIT>CCInfo . analyzeCallResult ( Ins , Subtarget . abiUsesSoftFloat ( ) , CallNode , RetTy ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { SDValue Val = DAG . getCopyFromReg ( Chain , DL , RVLocs [ i ] . getLocReg ( ) , RVLocs [ i ] . getLocVT ( ) , InFlag ) ; Chain = Val . getValue ( <NUM_LIT> ) ; InFlag = Val . getValue ( <NUM_LIT> ) ; if ( RVLocs [ i ] . getValVT ( ) != RVLocs [ i ] . getLocVT ( ) ) Val = DAG . getNode ( <STR_LIT> , DL , RVLocs [ i ] . getValVT ( ) , Val ) ;


<s> <ISA_LIT>FI -> setCallsEhReturn ( ) ; SDValue Chain = Op . getOperand ( <NUM_LIT> ) ; SDValue Offset = Op . getOperand ( <NUM_LIT> ) ; SDValue Handler = Op . getOperand ( <NUM_LIT> ) ; SDLoc DL ( Op ) ; EVT Ty = <STR_LIT> ; unsigned OffsetReg = <STR_LIT> ; unsigned AddrReg = <STR_LIT> ; Chain = DAG . getCopyToReg ( Chain , DL , OffsetReg , Offset , SDValue ( ) ) ;

Chain = DAG . getCopyToReg ( Chain , DL , AddrReg , Handler , Chain . getValue ( <NUM_LIT> ) ) ;


<s> unsigned AddrReg = <STR_LIT> ; Chain = DAG . getCopyToReg ( Chain , DL , OffsetReg , Offset , SDValue ( ) ) ; Chain = DAG . getCopyToReg ( Chain , DL , AddrReg , Handler , Chain . getValue ( <NUM_LIT> ) ) ;

return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , Chain , DAG . getRegister ( OffsetReg , Ty ) , DAG . getRegister ( AddrReg , getPointerTy ( MF . getDataLayout ( ) ) ) , Chain . getValue ( <NUM_LIT> ) ) ;


<s> assert ( ( cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) == <NUM_LIT> ) && <STR_LIT> ) ; MachineFrameInfo & MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ; MFI . setFrameAddressIsTaken ( true ) ; EVT VT = Op . getValueType ( ) ; SDLoc DL ( Op ) ; SDValue FrameAddr = DAG . getCopyFromReg ( DAG . getEntryNode ( ) , DL , <STR_LIT> , VT ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerGlobalAddress ( SDValue Op , SelectionDAG & DAG ) const { SDLoc DL ( Op ) ; const <ISA_LIT>TargetObjectFile * TLOF = static_cast < const <ISA_LIT>TargetObjectFile * > ( getTargetMachine ( ) . getObjFileLowering ( ) ) ; EVT Ty = Op . getValueType ( ) ; GlobalAddressSDNode * N = cast < GlobalAddressSDNode > ( Op ) ; const GlobalValue * GV = N -> getGlobal ( ) ; const GlobalObject * GO = GV -> getBaseObject ( ) ; if ( ! isPositionIndependent ( ) ) {

if ( TLOF -> IsGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) {


<s> SDValue GPReg = DAG . getRegister ( <STR_LIT> , <STR_LIT> ) ; return DAG . getNode ( <STR_LIT> , DL , <STR_LIT> , GPReg , GPRelNode ) ; } return getAddrNonPIC ( N , Ty , DAG ) ; } if ( GV -> hasInternalLinkage ( ) || ( GV -> hasLocalLinkage ( ) && ! isa < Function > ( GV ) ) ) return getAddrLocal ( N , Ty , DAG ) ; if ( ! TLOF -> IsGlobalInSmallSection ( GO , getTargetMachine ( ) ) ) return getAddrGlobalLargeGOT ( N , Ty , DAG , <STR_LIT> , <STR_LIT> , DAG . getEntryNode ( ) , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ; return getAddrGlobal ( N , Ty , DAG , <STR_LIT> , DAG . getEntryNode ( ) , MachinePointerInfo :: getGOT ( DAG . getMachineFunction ( ) ) ) ;


<s> SDLoc DL ( GA ) ; const GlobalValue * GV = GA -> getGlobal ( ) ; EVT PtrVT = getPointerTy ( DAG . getDataLayout ( ) ) ; TLSModel :: Model model = getTargetMachine ( ) . getTLSModel ( GV ) ; if ( model == TLSModel :: GeneralDynamic || model == TLSModel :: LocalDynamic ) { unsigned Flag = ( model == TLSModel :: LocalDynamic ) ? <STR_LIT> : <STR_LIT> ; SDValue TGA = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , <NUM_LIT> , Flag ) ; SDValue Argument = DAG . getNode ( <STR_LIT> , DL , PtrVT , getGlobalReg ( DAG , PtrVT ) , TGA ) ; unsigned PtrSize = PtrVT . getSizeInBits ( ) ; IntegerType * PtrTy = Type :: getIntNTy ( * DAG . getContext ( ) , PtrSize ) ; SDValue TlsGetAddr = DAG . getExternalSymbol ( <STR_LIT> , PtrVT ) ; ArgListTy Args ; ArgListEntry Entry ; Entry . Node = Argument ; Entry . Ty = PtrTy ; Args . push_back ( Entry ) ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ; CLI . setDebugLoc ( DL ) . setChain ( DAG . getEntryNode ( ) ) . setCallee ( CallingConv :: C , PtrTy , TlsGetAddr , std :: move ( Args ) ) ;

std :: pair < SDValue , SDValue > CallResult = LowerCallTo ( CLI ) ;


<s> Args . push_back ( Entry ) ; TargetLowering :: CallLoweringInfo CLI ( DAG ) ; CLI . setDebugLoc ( DL ) . setChain ( DAG . getEntryNode ( ) ) . setCallee ( CallingConv :: C , PtrTy , TlsGetAddr , std :: move ( Args ) ) ; std :: pair < SDValue , SDValue > CallResult = LowerCallTo ( CLI ) ; SDValue Ret = CallResult . first ; if ( model != TLSModel :: LocalDynamic ) return Ret ; SDValue TGAHi = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , <NUM_LIT> , <STR_LIT> ) ; SDValue Hi = DAG . getNode ( <STR_LIT> , DL , PtrVT , TGAHi ) ; SDValue TGALo = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , <NUM_LIT> , <STR_LIT> ) ; SDValue Lo = DAG . getNode ( <STR_LIT> , DL , PtrVT , TGALo ) ; SDValue Add = DAG . getNode ( <STR_LIT> , DL , PtrVT , Hi , Ret ) ; return DAG . getNode ( <STR_LIT> , DL , PtrVT , Add , Lo ) ; } SDValue Offset ; if ( model == TLSModel :: InitialExec ) { SDValue TGA = DAG . getTargetGlobalAddress ( GV , DL , PtrVT , <NUM_LIT> , <STR_LIT> ) ; TGA = DAG . getNode ( <STR_LIT> , DL , PtrVT , getGlobalReg ( DAG , PtrVT ) , TGA ) ; Offset = DAG . getLoad ( PtrVT , DL , DAG . getEntryNode ( ) , TGA , MachinePointerInfo ( ) ) ; } else { assert ( model == TLSModel :: LocalExec ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerJumpTable ( SDValue Op , SelectionDAG & DAG ) const { JumpTableSDNode * N = cast < JumpTableSDNode > ( Op ) ; EVT Ty = Op . getValueType ( ) ; if ( ! isPositionIndependent ( ) ) return getAddrNonPIC ( N , Ty , DAG ) ;


<s> switch ( Op . getOpcode ( ) ) { case <STR_LIT> : return lowerBRCOND ( Op , DAG ) ; case <STR_LIT> : return lowerGlobalAddress ( Op , DAG ) ; case <STR_LIT> : return lowerGlobalTLSAddress ( Op , DAG ) ; case <STR_LIT> : return lowerBlockAddress ( Op , DAG ) ;

case <STR_LIT> : return lowerJumpTable ( Op , DAG ) ;


<s> SmallVector < SDValue , <NUM_LIT> > RetOps ( <NUM_LIT> , Chain ) ; for ( unsigned i = <NUM_LIT> ; i != RVLocs . size ( ) ; ++ i ) { SDValue Val = OutVals [ i ] ; CCValAssign & VA = RVLocs [ i ] ; assert ( VA . isRegLoc ( ) && <STR_LIT> ) ; if ( RVLocs [ i ] . getValVT ( ) != RVLocs [ i ] . getLocVT ( ) ) Val = DAG . getNode ( <STR_LIT> , DL , RVLocs [ i ] . getLocVT ( ) , Val ) ; Chain = DAG . getCopyToReg ( Chain , DL , VA . getLocReg ( ) , Val , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( VA . getLocReg ( ) , VA . getLocVT ( ) ) ) ; } if ( MF . getFunction ( ) . hasStructRetAttr ( ) ) { <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; unsigned Reg = <ISA_LIT>FI -> getSRetReturnReg ( ) ; if ( ! Reg ) llvm_unreachable ( <STR_LIT> ) ; SDValue Val = DAG . getCopyFromReg ( Chain , DL , Reg , getPointerTy ( DAG . getDataLayout ( ) ) ) ; unsigned V0 = <STR_LIT> ; Chain = DAG . getCopyToReg ( Chain , DL , V0 , Val , Flag ) ; Flag = Chain . getValue ( <NUM_LIT> ) ; RetOps . push_back ( DAG . getRegister ( V0 , getPointerTy ( DAG . getDataLayout ( ) ) ) ) ; }


<s> if ( verifyReturnAddressArgumentIsConstant ( Op , DAG ) ) return SDValue ( ) ; assert ( ( cast < ConstantSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getZExtValue ( ) == <NUM_LIT> ) && <STR_LIT> ) ; MachineFunction & MF = DAG . getMachineFunction ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MVT VT = Op . getSimpleValueType ( ) ; unsigned LR = <STR_LIT> ; MFI . setReturnAddressIsTaken ( true ) ; unsigned Reg = MF . addLiveIn ( LR , getRegClassFor ( VT ) ) ; return DAG . getCopyFromReg ( DAG . getEntryNode ( ) , SDLoc ( Op ) , Reg , VT ) ;


<s> MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; MVT VT = Op . getSimpleValueType ( ) ; unsigned LR = <STR_LIT> ; MFI . setReturnAddressIsTaken ( true ) ; unsigned Reg = MF . addLiveIn ( LR , getRegClassFor ( VT ) ) ; return DAG . getCopyFromReg ( DAG . getEntryNode ( ) , SDLoc ( Op ) , Reg , VT ) ;


<s> SDValue <ISA_LIT>TargetLowering :: lowerSELECT ( SDValue Op , SelectionDAG & DAG ) const { return Op ;


<s> lowerSELECT ( SDValue Op , SelectionDAG & DAG ) const { return Op ;


<s> const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ; return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , DL , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) ) ;


<s> const Value * SV = cast < SrcValueSDNode > ( Op . getOperand ( <NUM_LIT> ) ) -> getValue ( ) ;

return DAG . getStore ( Op . getOperand ( <NUM_LIT> ) , DL , FI , Op . getOperand ( <NUM_LIT> ) , MachinePointerInfo ( SV ) ) ;


<s> if ( C . front ( ) != '{' || C . back ( ) != '}' ) return std :: make_pair ( false , false ) ; StringRef :: const_iterator I , B = C . begin ( ) + <NUM_LIT> , E = C . end ( ) - <NUM_LIT> ; I = std :: find_if ( B , E , std :: ptr_fun ( isdigit ) ) ; Prefix . assign ( B , I - B ) ;

if ( I == E ) return std :: make_pair ( true , false ) ;


<s> std :: pair < bool , bool > R = parsePhysicalReg ( C , Prefix , Reg ) ; if ( ! R . first ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; if ( ! R . second ) return std :: make_pair ( <NUM_LIT> , nullptr ) ; assert ( Prefix == <STR_LIT> ) ; RC = getRegClassFor ( ( VT == <STR_LIT> ) ? <STR_LIT> : VT ) ; assert ( Reg < RC -> getNumRegs ( ) ) ;

return std :: make_pair ( * ( RC -> begin ( ) + Reg ) , RC ) ;


<s> SDValue PtrOff = DAG . getNode ( <STR_LIT> , DL , getPointerTy ( DAG . getDataLayout ( ) ) , StackPtr , DAG . getIntPtrConstant ( Offset , DL ) ) ; return DAG . getStore ( Chain , DL , Arg , PtrOff , MachinePointerInfo ( ) ) ; }

MachineFrameInfo & MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ;


<s> SDValue PtrOff = DAG . getNode ( <STR_LIT> , DL , getPointerTy ( DAG . getDataLayout ( ) ) , StackPtr , DAG . getIntPtrConstant ( Offset , DL ) ) ; return DAG . getStore ( Chain , DL , Arg , PtrOff , MachinePointerInfo ( ) ) ; } MachineFrameInfo & MFI = DAG . getMachineFunction ( ) . getFrameInfo ( ) ; int FI = MFI . CreateFixedObject ( Arg . getValueSizeInBits ( ) / <NUM_LIT> , Offset , false ) ;

SDValue FIN = DAG . getFrameIndex ( FI , getPointerTy ( DAG . getDataLayout ( ) ) ) ;


<s> unsigned ByValSizeInBytes = Flags . getByValSize ( ) ; unsigned OffsetInBytes = <NUM_LIT> ; unsigned RegSizeInBytes = CC . regSize ( ) ; unsigned Alignment = std :: min ( Flags . getByValAlign ( ) , RegSizeInBytes ) ; EVT PtrTy = getPointerTy ( DAG . getDataLayout ( ) ) , RegTy = <STR_LIT> ( RegSizeInBytes * <NUM_LIT> ) ; if ( ByVal . NumRegs ) { const ArrayRef < MCPhysReg > ArgRegs = CC . intArgRegs ( ) ; bool LeftoverBytes = ( ByVal . NumRegs * RegSizeInBytes > ByValSizeInBytes ) ; unsigned I = <NUM_LIT> ; for ( ; I < ByVal . NumRegs - LeftoverBytes ; ++ I , OffsetInBytes += RegSizeInBytes ) { SDValue LoadPtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , Arg , DAG . getConstant ( OffsetInBytes , DL , PtrTy ) ) ; SDValue LoadVal = DAG . getLoad ( RegTy , DL , Chain , LoadPtr , MachinePointerInfo ( ) ) ; MemOpChains . push_back ( LoadVal . getValue ( <NUM_LIT> ) ) ; unsigned ArgReg = ArgRegs [ ByVal . FirstIdx + I ] ; RegsToPass . push_back ( std :: make_pair ( ArgReg , LoadVal ) ) ; } if ( ByValSizeInBytes == OffsetInBytes ) return ; if ( LeftoverBytes ) { assert ( ( ByValSizeInBytes > OffsetInBytes ) && ( ByValSizeInBytes < OffsetInBytes + RegSizeInBytes ) && <STR_LIT> ) ; SDValue Val ; for ( unsigned LoadSizeInBytes = RegSizeInBytes / <NUM_LIT> , TotalBytesLoaded = <NUM_LIT> ; OffsetInBytes < ByValSizeInBytes ; LoadSizeInBytes /= <NUM_LIT> ) { unsigned RemainingSizeInBytes = ByValSizeInBytes - OffsetInBytes ; if ( RemainingSizeInBytes < LoadSizeInBytes ) continue ; SDValue LoadPtr = DAG . getNode ( <STR_LIT> , DL , PtrTy , Arg , DAG . getConstant ( OffsetInBytes , DL , PtrTy ) ) ;

SDValue LoadVal = DAG . getExtLoad ( <STR_LIT> , DL , RegTy , Chain , LoadPtr , MachinePointerInfo ( ) , <STR_LIT> ( LoadSizeInBytes * <NUM_LIT> ) , Alignment ) ;


<s> SDValue <ISA_LIT>TargetLowering :: PerformDAGCombine ( SDNode * N , DAGCombinerInfo & DCI ) const {


<s> switch ( Opc ) { default : break ; case <STR_LIT> : case <STR_LIT> : return performDivRemCombine ( N , DAG , DCI , Subtarget ) ; }


<s> static SDValue performDivRemCombine ( SDNode * N , SelectionDAG & DAG , TargetLowering :: DAGCombinerInfo & DCI , const <ISA_LIT>Subtarget & Subtarget ) { if ( DCI . isBeforeLegalizeOps ( ) ) return SDValue ( ) ; EVT Ty = N -> getValueType ( <NUM_LIT> ) ; unsigned LO = <STR_LIT> ; unsigned HI = <STR_LIT> ; unsigned Opc = N -> getOpcode ( ) == <STR_LIT> ? <STR_LIT> : <STR_LIT> ; SDLoc DL ( N ) ; SDValue DivRem = DAG . getNode ( Opc , DL , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) ) ; SDValue InChain = DAG . getEntryNode ( ) ; SDValue InGlue = DivRem ; if ( N -> hasAnyUseOfValue ( <NUM_LIT> ) ) {

SDValue CopyFromLo = DAG . getCopyFromReg ( InChain , DL , LO , Ty , InGlue ) ;


<s> bool useRegsForByval ( ) const { return CallConv != CallingConv :: Fast ;


return CallConv != CallingConv :: Fast ;


<s> void <ISA_LIT>TargetLowering :: writeVarArgRegs ( std :: vector < SDValue > & OutChains , const <ISA_LIT>CC & CC , SDValue Chain , const SDLoc & DL , SelectionDAG & DAG ) const { unsigned NumRegs = CC . numIntArgRegs ( ) ; const ArrayRef < MCPhysReg > ArgRegs = CC . intArgRegs ( ) ; const CCState & CCInfo = CC . getCCInfo ( ) ; unsigned Idx = CCInfo . getFirstUnallocated ( ArgRegs ) ; unsigned RegSize = CC . regSize ( ) ; MVT RegTy = <STR_LIT> ( RegSize * <NUM_LIT> ) ; const TargetRegisterClass * RC = getRegClassFor ( RegTy ) ; MachineFunction & MF = DAG . getMachineFunction ( ) ;

MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;


<s> int TargetMBB = getTargetMBB ( * Br ) -> getNumber ( ) ; if ( ThisMBB < TargetMBB ) {

for ( int N = ThisMBB + <NUM_LIT> ; N < TargetMBB ; ++ N ) Offset += MBBInfos [ N ] . Size ;


<s> <ISA_LIT>LongBranch ( TargetMachine & tm ) : MachineFunctionPass ( ID ) , TM ( tm ) , IsPIC ( TM . isPositionIndependent ( ) ) , ABI ( static_cast < const <ISA_LIT>TargetMachine & > ( TM ) . getABI ( ) ) {


<s> static void emitGPDisp ( MachineFunction & F , const <ISA_LIT>InstrInfo * TII ) { MachineBasicBlock & MBB = F . front ( ) ; MachineBasicBlock :: iterator I = MBB . begin ( ) ; DebugLoc DL = MBB . findDebugLoc ( MBB . begin ( ) ) ; BuildMI ( MBB , I , DL , TII -> get ( <STR_LIT> ) , <STR_LIT> ) . addExternalSymbol ( <STR_LIT> , <STR_LIT> ) ; BuildMI ( MBB , I , DL , TII -> get ( <STR_LIT> ) , <STR_LIT> ) . addReg ( <STR_LIT> ) . addExternalSymbol ( <STR_LIT> , <STR_LIT> ) ; MBB . removeLiveIn ( <STR_LIT> ) ;


<s> for ( ; B != E ; ++ B ) if ( ! B -> isDebugValue ( ) ) return B ;


<s> StringRef getPassName ( ) const override { return <STR_LIT> ;


<s> const MachineOperand & MO = Br . getOperand ( I ) ; if ( MO . isMBB ( ) ) return MO . getMBB ( ) ; }


<s> static MachineBasicBlock * getTargetMBB ( const MachineInstr & Br ) {

for ( unsigned I = <NUM_LIT> , E = Br . getDesc ( ) . getNumOperands ( ) ; I < E ; ++ I ) {


<s> for ( auto & MBB : * MF ) splitMBB ( & MBB ) ; MF -> RenumberBlocks ( ) ; MBBInfos . clear ( ) ; MBBInfos . resize ( MF -> size ( ) ) ; const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( MF -> getSubtarget ( ) . getInstrInfo ( ) ) ; for ( unsigned I = <NUM_LIT> , E = MBBInfos . size ( ) ; I < E ; ++ I ) { MachineBasicBlock * MBB = MF -> getBlockNumbered ( I ) ; for ( MachineBasicBlock :: instr_iterator MI = MBB -> instr_begin ( ) ; MI != MBB -> instr_end ( ) ; ++ MI ) MBBInfos [ I ] . Size += TII -> GetInstSizeInBytes ( * MI ) ; ReverseIter End = MBB -> rend ( ) ; ReverseIter Br = getNonDebugInstr ( MBB -> rbegin ( ) , End ) ; auto it = MBB -> begin ( ) ; for ( ; it != MBB -> end ( ) ; ++ it ) { if ( & * it == & * Br ) break ;


<s> ReverseIter End = MBB -> rend ( ) ; ReverseIter Br = getNonDebugInstr ( MBB -> rbegin ( ) , End ) ; auto it = MBB -> begin ( ) ; for ( ; it != MBB -> end ( ) ; ++ it ) { if ( & * it == & * Br ) break ; }

if ( ( Br != End ) && ! Br -> isIndirectBranch ( ) && ( Br -> isConditionalBranch ( ) || ( Br -> isUnconditionalBranch ( ) && IsPIC ) ) ) MBBInfos [ I ] . Br = & * it ;


<s> MBBInfo ( ) : Size ( <NUM_LIT> ) , HasLongBranch ( false ) , Br ( nullptr ) {


<s> void <ISA_LIT>LongBranch :: replaceBranch ( MachineBasicBlock & MBB , Iter Br , const DebugLoc & DL , MachineBasicBlock * MBBOpnd ) { const <ISA_LIT>InstrInfo * TII = static_cast < const <ISA_LIT>InstrInfo * > ( MBB . getParent ( ) -> getSubtarget ( ) . getInstrInfo ( ) ) ; unsigned NewOpc = TII -> getOppositeBranchOpc ( Br -> getOpcode ( ) ) ; const MCInstrDesc & NewDesc = TII -> get ( NewOpc ) ; MachineInstrBuilder MIB = BuildMI ( MBB , Br , DL , NewDesc ) ; for ( unsigned I = <NUM_LIT> , E = Br -> getDesc ( ) . getNumOperands ( ) ; I < E ; ++ I ) { MachineOperand & MO = Br -> getOperand ( I ) ; if ( ! MO . isReg ( ) ) { assert ( MO . isMBB ( ) && <STR_LIT> ) ; break ; } MIB . addReg ( MO . getReg ( ) ) ; } MIB . addMBB ( MBBOpnd ) ; if ( Br -> hasDelaySlot ( ) ) { if ( Br -> isBundledWithSucc ( ) ) { MachineBasicBlock :: instr_iterator II = Br . getInstrIterator ( ) ; MIBundleBuilder ( & * MIB ) . append ( ( ++ II ) -> removeFromBundle ( ) ) ; } else { MIBundleBuilder ( & * MIB ) . append ( BuildMI ( * MF , DL , TII -> get ( <STR_LIT> ) ) ) ; } } Br -> eraseFromParent ( ) ;


<s> SmallVectorImpl < MBBInfo > :: iterator I , E = MBBInfos . end ( ) ; bool EverMadeChange = false , MadeChange = true ; while ( MadeChange ) { MadeChange = false ; for ( I = MBBInfos . begin ( ) ; I != E ; ++ I ) { if ( ! I -> Br || I -> HasLongBranch ) continue ; int ShVal = <NUM_LIT> ; int64_t Offset = computeOffset ( I -> Br ) / ShVal ; if ( ! ForceLongBranch && isInt < <NUM_LIT> > ( Offset ) ) continue ; I -> HasLongBranch = true ; I -> Size += LongBranchSeqSize * <NUM_LIT> ; ++ LongBranches ; EverMadeChange = MadeChange = true ; } }


<s> ReverseIter FirstBr = getNonDebugInstr ( std :: next ( LastBr ) , End ) ; if ( ( FirstBr == End ) || ( ! FirstBr -> isConditionalBranch ( ) && ! FirstBr -> isUnconditionalBranch ( ) ) ) return ; assert ( ! FirstBr -> isIndirectBranch ( ) && <STR_LIT> ) ; for ( ; it != MBB -> end ( ) ; ++ it ) {


<s> void <ISA_LIT>FunctionInfo :: anchor ( ) {


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : MF ( MF ) , SRetReturnReg ( <NUM_LIT> ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) , InArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , OutArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , GPFI ( <NUM_LIT> ) , DynAllocFI ( <NUM_LIT> ) , MaxCallFrameSize ( <NUM_LIT> ) , EmitNOAT ( false ) {


<s> if ( ! OutArgFIRange . second ) OutArgFIRange . first = FirstFI ;


<s> void extendOutArgFIRange ( int FirstFI , int LastFI ) { if ( ! OutArgFIRange . second ) OutArgFIRange . first = FirstFI ;


<s> if ( ! DynAllocFI ) DynAllocFI = MF . getFrameInfo ( ) -> CreateFixedObject ( <NUM_LIT> , <NUM_LIT> , true ) ;


<s> const TargetRegisterClass * RC ; RC = ( const TargetRegisterClass * ) & <STR_LIT> ; return GlobalBaseReg = MF . getRegInfo ( ) . createVirtualRegister ( RC ) ;


<s> if ( GlobalBaseReg ) return GlobalBaseReg ; if ( FixGlobalBaseReg ) return GlobalBaseReg = <STR_LIT> ;


<s> bool <ISA_LIT>FunctionInfo :: globalBaseRegSet ( ) const {


<s> <ISA_LIT>FunctionInfo ( MachineFunction & MF ) : MF ( MF ) , GlobalBaseReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) , InArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , OutArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , GPFI ( <NUM_LIT> ) , DynAllocFI ( <NUM_LIT> ) , MaxCallFrameSize ( <NUM_LIT> ) {


<s> <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) , SRetReturnReg ( <NUM_LIT> ) , VarArgsFrameIndex ( <NUM_LIT> ) , CallsEhReturn ( false ) , CallsEhDwarf ( false ) , MaxCallFrameSize ( <NUM_LIT> ) , EmitNOAT ( false ) , GlobalBaseReg ( <NUM_LIT> ) , InArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , OutArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , GPFI ( <NUM_LIT> ) , DynAllocFI ( <NUM_LIT> ) {


<s> void <ISA_LIT>MachineFunctionInfo :: anchor ( ) {


<s> return MachinePointerInfo ( MF . getPSVManager ( ) . getGlobalValueCallEntry ( GV ) ) ;


<s> <ISA_LIT>MachineFunctionInfo ( MachineFunction & MF ) : MF ( MF ) , VarArgsFrameIndex ( <NUM_LIT> ) , InArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , OutArgFIRange ( std :: make_pair ( - <NUM_LIT> , <NUM_LIT> ) ) , GPFI ( <NUM_LIT> ) , DynAllocFI ( <NUM_LIT> ) , EmitNOAT ( false ) , MaxCallFrameSize ( <NUM_LIT> ) {


<s> void <ISA_LIT>MachineFunctionInfo :: createEhDataRegsFI ( ) { const TargetRegisterInfo & TRI = * MF . getSubtarget ( ) . getRegisterInfo ( ) ; for ( int I = <NUM_LIT> ; I < <NUM_LIT> ; ++ I ) { const TargetRegisterClass * RC = & <STR_LIT> ; EhDataRegFI [ I ] = MF . getFrameInfo ( ) . CreateStackObject ( TRI . getSpillSize ( * RC ) , TRI . getSpillAlignment ( * RC ) , false ) ;


<s> int getEhDataRegFI ( unsigned Reg ) const { return EhDataRegFI [ Reg ] ;


<s> bool getEmitNOAT ( ) const { return EmitNOAT ;


<s> unsigned <ISA_LIT>MachineFunctionInfo :: getGlobalBaseReg ( ) {


<s> unsigned getIncomingArgSize ( ) const { return IncomingArgSize ;


<s> unsigned getIncomingArgSize ( ) const {


<s> unsigned getSRetReturnReg ( ) const { return SRetReturnReg ;


<s> int getVarArgsFrameIndex ( ) const { return VarArgsFrameIndex ;


<s> bool <ISA_LIT>MachineFunctionInfo :: globalBaseRegFixed ( ) const {


<s> bool <ISA_LIT>MachineFunctionInfo :: globalBaseRegSet ( ) const {


<s> bool isDynAllocFI ( int FI ) const { return DynAllocFI && DynAllocFI == FI ;


<s> return DynAllocFI && DynAllocFI == FI ;


<s> bool isGPFI ( int FI ) const { return GPFI && GPFI == FI ;


<s> return FI <= InArgFIRange . first && FI >= InArgFIRange . second ;


<s> bool needGPSaveRestore ( ) const { return getGPFI ( ) ;


<s> void setCallsEhDwarf ( ) { CallsEhDwarf = true ;


<s> void setFormalArgInfo ( unsigned Size , bool HasByval ) {


<s> void setSRetReturnReg ( unsigned Reg ) { SRetReturnReg = Reg ;


<s> void setVarArgsFrameIndex ( int Index ) { VarArgsFrameIndex = Index ;


<s> <ISA_LIT>MachineFunctionInfo :: ~ <ISA_LIT>MachineFunctionInfo ( ) {


<s> AlignmentIsInBytes = false ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; CommentString = <STR_LIT> ;


<s> AlignmentIsInBytes = false ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; CommentString = <STR_LIT> ; ZeroDirective = <STR_LIT> ; GPRel32Directive = <STR_LIT> ; GPRel64Directive = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; UseAssignmentForEHBegin = true ;


<s> void <ISA_LIT>MCAsmInfo :: anchor ( ) {


<s> if ( ( TheTriple . getArch ( ) == Triple :: cpu0 ) ) IsLittleEndian = false ; AlignmentIsInBytes = false ; Data16bitsDirective = <STR_LIT> ; Data32bitsDirective = <STR_LIT> ; Data64bitsDirective = <STR_LIT> ; PrivateGlobalPrefix = <STR_LIT> ; PrivateLabelPrefix = <STR_LIT> ; CommentString = <STR_LIT> ; ZeroDirective = <STR_LIT> ; GPRel32Directive = <STR_LIT> ; GPRel64Directive = <STR_LIT> ; WeakRefDirective = <STR_LIT> ; UseAssignmentForEHBegin = true ; SupportsDebugInformation = true ; ExceptionsType = ExceptionHandling :: DwarfCFI ;


<s> MCII ( mcii ) , STI ( sti ) , Ctx ( ctx ) , IsLittleEndian ( IsLittle ) {


<s> MCCodeEmitter * llvm :: create<ISA_LIT>MCCodeEmitterEB ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , STI , Ctx , false ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , STI , Ctx , true ) ;


<s> void EmitByte ( unsigned char C , raw_ostream & OS ) const {


<s> unsigned Shift = IsLittleEndian ? i * <NUM_LIT> : ( Size - <NUM_LIT> - i ) * <NUM_LIT> ; EmitByte ( ( Val >> Shift ) & <NUM_LIT> , OS ) ;


<s> EncodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups ) const { uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups ) ; unsigned Opcode = MI . getOpcode ( ) ; if ( ( Opcode != <STR_LIT> ) && ( Opcode != <STR_LIT> ) && ! Binary ) llvm_unreachable ( <STR_LIT> ) ; const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t TSFlags = Desc . TSFlags ;

if ( ( TSFlags & <STR_LIT> ) == <STR_LIT> ) llvm_unreachable ( <STR_LIT> ) ;


<s> const MCOperand & MO = MI . getOperand ( OpNo ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ;

Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , MCFixupKind ( <STR_LIT> ) ) ) ;


<s> getBranchTargetOpValue ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpNo ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ;


<s> getJumpTargetOpValue ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ;

const MCExpr * Expr = MO . getExpr ( ) ;


<s> getJumpTargetOpValue ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups ) const { const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; Fixups . push_back ( MCFixup :: Create ( <NUM_LIT> , Expr , MCFixupKind ( <STR_LIT> ) ) ) ;


<s> } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; } assert ( MO . isExpr ( ) ) ; const MCExpr * Expr = MO . getExpr ( ) ; MCExpr :: ExprKind Kind = Expr -> getKind ( ) ; if ( Kind == MCExpr :: Binary ) { Expr = static_cast < const MCBinaryExpr * > ( Expr ) -> getLHS ( ) ; Kind = Expr -> getKind ( ) ; } assert ( Kind == MCExpr :: SymbolRef ) ; <STR_LIT> FixupKind = <STR_LIT> ( <NUM_LIT> ) ; switch ( cast < MCSymbolRefExpr > ( Expr ) -> getKind ( ) ) { case MCSymbolRefExpr :: VK_<ISA_LIT>_GPREL : FixupKind = <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_CALL : FixupKind = <STR_LIT> ; break ; case MCSymbolRefExpr :: VK_<ISA_LIT>_GOT16 :


<s> unsigned OffBits = getMachineOpValue ( MI , MI . getOperand ( OpNo + <NUM_LIT> ) , Fixups ) ; return ( OffBits & <NUM_LIT> ) | RegBits ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMemEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups ) const {

assert ( MI . getOperand ( OpNo ) . isReg ( ) ) ;


<s> MCCodeEmitter * create<ISA_LIT>MCCodeEmitterEB ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , false ) ;


<s> MCCodeEmitter * create<ISA_LIT>MCCodeEmitterEL ( const MCInstrInfo & MCII , const MCRegisterInfo & MRI , MCContext & Ctx ) { return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , true ) ;


<s> if ( ( Opcode != <STR_LIT> ) && ! Binary ) llvm_unreachable ( <STR_LIT> ) ; const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ; uint64_t TSFlags = Desc . TSFlags ; if ( ( TSFlags & <STR_LIT> ) == <STR_LIT> ) llvm_unreachable ( <STR_LIT> ) ; int Size = <NUM_LIT> ; EmitInstruction ( Binary , Size , OS ) ;


<s> const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ;


<s> getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { if ( MO . isReg ( ) ) { unsigned Reg = MO . getReg ( ) ; unsigned RegNo = Ctx . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; return RegNo ; } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) { return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ; }


<s> <ISA_LIT>MCCodeEmitter ( const MCInstrInfo & mcii , MCContext & Ctx_ , bool IsLittle ) : MCII ( mcii ) , Ctx ( Ctx_ ) , IsLittleEndian ( IsLittle ) {


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , false ) ;


<s> return new <ISA_LIT>MCCodeEmitter ( MCII , Ctx , true ) ;


<s> void <ISA_LIT>MCCodeEmitter :: EmitByte ( unsigned char C , raw_ostream & OS ) const {


<s> void <ISA_LIT>MCCodeEmitter :: EmitByte ( unsigned char C , raw_ostream & OS ) const { OS << ( char ) C ;


<s> for ( unsigned i = <NUM_LIT> ; i < Size ; ++ i ) { unsigned Shift = IsLittleEndian ? i * <NUM_LIT> : ( Size - <NUM_LIT> - i ) * <NUM_LIT> ; EmitByte ( ( Val >> Shift ) & <NUM_LIT> , OS ) ; }


<s> encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; unsigned Opcode = MI . getOpcode ( ) ; if ( ( Opcode != <STR_LIT> ) && ( Opcode != <STR_LIT> ) && ! Binary ) llvm_unreachable ( <STR_LIT> ) ; const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ;


<s> encodeInstruction ( const MCInst & MI , raw_ostream & OS , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { uint32_t Binary = getBinaryCodeForInstr ( MI , Fixups , STI ) ; unsigned Opcode = MI . getOpcode ( ) ; if ( ( Opcode != <STR_LIT> ) && ( Opcode != <STR_LIT> ) && ! Binary ) llvm_unreachable ( <STR_LIT> ) ;

const MCInstrDesc & Desc = MCII . get ( MI . getOpcode ( ) ) ;


<s> const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ; assert ( MO . isExpr ( ) && <STR_LIT> ) ; const MCExpr * Expr = MO . getExpr ( ) ; Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , MCFixupKind ( <STR_LIT> ) ) ) ;


<s> const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ;

assert ( MO . isExpr ( ) && <STR_LIT> ) ;


<s> if ( Kind == MCExpr :: Binary ) { unsigned Res = getExprOpValue ( cast < MCBinaryExpr > ( Expr ) -> getLHS ( ) , Fixups , STI ) ; Res += getExprOpValue ( cast < MCBinaryExpr > ( Expr ) -> getRHS ( ) , Fixups , STI ) ; return Res ; } if ( Kind == MCExpr :: Target ) { const <ISA_LIT>MCExpr * <ISA_LIT>Expr = cast < <ISA_LIT>MCExpr > ( Expr ) ; <STR_LIT> FixupKind = <STR_LIT> ( <NUM_LIT> ) ; switch ( <ISA_LIT>Expr -> getKind ( ) ) { default : llvm_unreachable ( <STR_LIT> ) ; case <ISA_LIT>MCExpr :: CEK_GPREL : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT_CALL : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_ABS_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_ABS_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TLSGD : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TLSLDM : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_DTP_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_DTP_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOTTPREL : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TP_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TP_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT_HI16 : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT_LO16 : FixupKind = <STR_LIT> ; break ; } Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , MCFixupKind ( FixupKind ) ) ) ; return <NUM_LIT> ; }


<s> FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_ABS_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_ABS_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TLSGD : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TLSLDM : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_DTP_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_DTP_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOTTPREL : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TP_HI : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_TP_LO : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT_HI16 : FixupKind = <STR_LIT> ; break ; case <ISA_LIT>MCExpr :: CEK_GOT_LO16 : FixupKind = <STR_LIT> ; break ; } Fixups . push_back ( MCFixup :: create ( <NUM_LIT> , Expr , MCFixupKind ( FixupKind ) ) ) ; return <NUM_LIT> ;


<s> unsigned Opcode = MI . getOpcode ( ) ; const MCOperand & MO = MI . getOperand ( OpNo ) ; if ( MO . isImm ( ) ) return MO . getImm ( ) ;


<s> getMachineOpValue ( const MCInst & MI , const MCOperand & MO , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { if ( MO . isReg ( ) ) { unsigned Reg = MO . getReg ( ) ; unsigned RegNo = Ctx . getRegisterInfo ( ) -> getEncodingValue ( Reg ) ; return RegNo ; } else if ( MO . isImm ( ) ) { return static_cast < unsigned > ( MO . getImm ( ) ) ; } else if ( MO . isFPImm ( ) ) {

return static_cast < unsigned > ( APFloat ( MO . getFPImm ( ) ) . bitcastToAPInt ( ) . getHiBits ( <NUM_LIT> ) . getLimitedValue ( ) ) ;


<s> assert ( MI . getOperand ( OpNo ) . isReg ( ) ) ; unsigned RegBits = getMachineOpValue ( MI , MI . getOperand ( OpNo ) , Fixups , STI ) << <NUM_LIT> ;

unsigned OffBits = getMachineOpValue ( MI , MI . getOperand ( OpNo + <NUM_LIT> ) , Fixups , STI ) ;


<s> unsigned <ISA_LIT>MCCodeEmitter :: getMemEncoding ( const MCInst & MI , unsigned OpNo , SmallVectorImpl < MCFixup > & Fixups , const MCSubtargetInfo & STI ) const { assert ( MI . getOperand ( OpNo ) . isReg ( ) ) ; unsigned RegBits = getMachineOpValue ( MI , MI . getOperand ( OpNo ) , Fixups , STI ) << <NUM_LIT> ; unsigned OffBits = getMachineOpValue ( MI , MI . getOperand ( OpNo + <NUM_LIT> ) , Fixups , STI ) ; return ( OffBits & <NUM_LIT> ) | RegBits ;


<s> ~ <ISA_LIT>MCCodeEmitter ( ) override {


<s> const MCSymbolRefExpr * MCSym = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ;

return new ( Ctx ) <ISA_LIT>MCExpr ( Kind , MCSym ) ;


<s> const MCSymbolRefExpr * MCSym = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ; return new ( Ctx ) <ISA_LIT>MCExpr ( Kind , MCSym ) ;


<s> OS << <STR_LIT> ; break ; case CEK_GOT_CALL : OS << <STR_LIT> ; break ; case CEK_GOT_DISP : OS << <STR_LIT> ; break ; case CEK_GOT_HI16 : OS << <STR_LIT> ; break ; case CEK_GOT_LO16 : OS << <STR_LIT> ; break ; case CEK_GPREL : OS << <STR_LIT> ; break ; case CEK_ABS_HI : OS << <STR_LIT> ; break ; case CEK_ABS_LO : OS << <STR_LIT> ; break ; case CEK_TLSLDM : OS << <STR_LIT> ; break ; case CEK_TP_HI : OS << <STR_LIT> ; break ; case CEK_TP_LO : OS << <STR_LIT> ; break ; } OS << '(' ; if ( Expr -> evaluateAsAbsolute ( AbsVal ) ) OS << AbsVal ;

else Expr -> print ( OS , MAI , true ) ;


<s> static bool classof ( const MCExpr * E ) { return E -> getKind ( ) == MCExpr :: Target ;


<s> return E -> getKind ( ) == MCExpr :: Target ;


<s> explicit <ISA_LIT>MCExpr ( <ISA_LIT>ExprKind Kind , const MCExpr * Expr ) : Kind ( Kind ) , Expr ( Expr ) {


<s> const <ISA_LIT>MCExpr * <ISA_LIT>MCExpr :: create ( const MCSymbol * Symbol , <ISA_LIT>MCExpr :: <ISA_LIT>ExprKind Kind , MCContext & Ctx ) {

const MCSymbolRefExpr * MCSym = MCSymbolRefExpr :: create ( Symbol , MCSymbolRefExpr :: VK_None , Ctx ) ;


<s> bool <ISA_LIT>MCExpr :: evaluateAsRelocatableImpl ( MCValue & Res , const MCAsmLayout * Layout , const MCFixup * Fixup ) const {

return getSubExpr ( ) -> evaluateAsRelocatable ( Res , Layout , Fixup ) ;


<s> MCFragment * findAssociatedFragment ( ) const override {

return getSubExpr ( ) -> findAssociatedFragment ( ) ;


<s> llvm_unreachable ( <STR_LIT> ) ; break ; case CEK_CALL_HI16 :


<s> <ISA_LIT>ExprKind Kind ; return isGpOff ( Kind ) ;


<s> void <ISA_LIT>MCExpr :: visitUsedExpr ( MCStreamer & Streamer ) const { Streamer . visitUsedExpr ( * getSubExpr ( ) ) ;


<s> for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) {

const MachineOperand & MO = MI -> getOperand ( i ) ;


<s> void <ISA_LIT>MCInstLower :: LowerCPLOAD ( SmallVector < MCInst , <NUM_LIT> > & MCInsts ) { MCOperand GPReg = MCOperand :: CreateReg ( <STR_LIT> ) ; MCOperand T9Reg = MCOperand :: CreateReg ( <STR_LIT> ) ; MCOperand ZEROReg = MCOperand :: CreateReg ( <STR_LIT> ) ; StringRef SymName ( <STR_LIT> ) ; const MCSymbol * Sym = Ctx -> GetOrCreateSymbol ( SymName ) ; const MCSymbolRefExpr * MCSym ; MCSym = MCSymbolRefExpr :: Create ( Sym , MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_HI , * Ctx ) ;

MCOperand SymHi = MCOperand :: CreateExpr ( MCSym ) ;


<s> assert ( isInt < <NUM_LIT> > ( Offset ) && ( Offset >= <NUM_LIT> ) && <STR_LIT> ) ; MCOperand SPReg = MCOperand :: CreateReg ( <STR_LIT> ) , BaseReg = SPReg ; MCOperand GPReg = MCOperand :: CreateReg ( <STR_LIT> ) ; MCOperand ZEROReg = MCOperand :: CreateReg ( <STR_LIT> ) ; if ( ! isInt < <NUM_LIT> > ( Offset ) ) { unsigned Hi = ( ( Offset + <NUM_LIT> ) >> <NUM_LIT> ) & <NUM_LIT> ; Offset &= <NUM_LIT> ;

MCOperand ATReg = MCOperand :: CreateReg ( <STR_LIT> ) ;


<s> MCOperand ATReg = MCOperand :: CreateReg ( <STR_LIT> ) ; BaseReg = ATReg ; MCInsts . resize ( <NUM_LIT> ) ; CreateMCInst ( MCInsts [ <NUM_LIT> ] , <STR_LIT> , ATReg , ZEROReg , MCOperand :: CreateImm ( Hi ) ) ; CreateMCInst ( MCInsts [ <NUM_LIT> ] , <STR_LIT> , ATReg , ATReg , SPReg ) ; }


<s> case MachineOperand :: MO_Immediate : return MCOperand :: CreateImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress : case MachineOperand :: MO_BlockAddress :

return LowerSymbolOperand ( MO , MOTy , offset ) ;


<s> if ( MO . isImplicit ( ) ) break ; return MCOperand :: CreateReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: CreateImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_GlobalAddress :

case MachineOperand :: MO_BlockAddress :


<s> Symbol = Mang -> getSymbol ( MO . getGlobal ( ) ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } const MCSymbolRefExpr * MCSym = MCSymbolRefExpr :: Create ( Symbol , Kind , * Ctx ) ; if ( ! Offset ) return MCOperand :: CreateExpr ( MCSym ) ; assert ( Offset > <NUM_LIT> ) ; const MCConstantExpr * OffsetExpr = MCConstantExpr :: Create ( Offset , * Ctx ) ;

const MCBinaryExpr * AddExpr = MCBinaryExpr :: CreateAdd ( MCSym , OffsetExpr , * Ctx ) ;


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_None ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_GPREL ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_GOT_CALL ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_GOT16 ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_GOT ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_HI ; break ; case <STR_LIT> : Kind = MCSymbolRefExpr :: VK_<ISA_LIT>_ABS_LO ; break ; } switch ( MOTy ) { case MachineOperand :: MO_MachineBasicBlock : Symbol = MO . getMBB ( ) -> getSymbol ( ) ;


<s> Inst . setOpcode ( Opc ) ; Inst . addOperand ( Operand0 ) ; Inst . addOperand ( Operand1 ) ; if ( Operand2 . isValid ( ) ) Inst . addOperand ( Operand2 ) ;


<s> static void CreateMCInst ( MCInst & Inst , unsigned Opc , const MCOperand & Operand0 , const MCOperand & Operand1 , const MCOperand & Operand2 = MCOperand ( ) ) { Inst . setOpcode ( Opc ) ; Inst . addOperand ( Operand0 ) ; Inst . addOperand ( Operand1 ) ;

if ( Operand2 . isValid ( ) ) Inst . addOperand ( Operand2 ) ;


<s> void <ISA_LIT>MCInstLower :: Initialize ( MCContext * C ) {


<s> void <ISA_LIT>MCInstLower :: Initialize ( MCContext * C ) { Ctx = C ;


<s> const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp = LowerOperand ( MO ) ;

if ( MCOp . isValid ( ) ) OutMCInst . addOperand ( MCOp ) ;


<s> OutMCInst . setOpcode ( MI -> getOpcode ( ) ) ; for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp = LowerOperand ( MO ) ;


<s> case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) break ; return MCOperand :: createReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_MachineBasicBlock : case MachineOperand :: MO_JumpTableIndex : case MachineOperand :: MO_BlockAddress : case MachineOperand :: MO_GlobalAddress :

case MachineOperand :: MO_ExternalSymbol :


<s> Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_MachineBasicBlock : Symbol = MO . getMBB ( ) -> getSymbol ( ) ; break ; case MachineOperand :: MO_BlockAddress : Symbol = AsmPrinter . GetBlockAddressSymbol ( MO . getBlockAddress ( ) ) ; Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_JumpTableIndex : Symbol = AsmPrinter . GetJTISymbol ( MO . getIndex ( ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : Symbol = AsmPrinter . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; Offset += MO . getOffset ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } const MCExpr * Expr = MCSymbolRefExpr :: create ( Symbol , Kind , * Ctx ) ; if ( Offset ) { assert ( Offset > <NUM_LIT> ) ; Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Offset , * Ctx ) , * Ctx ) ; } if ( TargetKind != <ISA_LIT>MCExpr :: CEK_None ) Expr = <ISA_LIT>MCExpr :: create ( TargetKind , Expr , * Ctx ) ;

return MCOperand :: createExpr ( Expr ) ;


<s> Offset += MO . getOffset ( ) ; break ; case MachineOperand :: MO_JumpTableIndex : Symbol = AsmPrinter . GetJTISymbol ( MO . getIndex ( ) ) ; break ; case MachineOperand :: MO_ExternalSymbol : Symbol = AsmPrinter . GetExternalSymbolSymbol ( MO . getSymbolName ( ) ) ; Offset += MO . getOffset ( ) ; break ; default : llvm_unreachable ( <STR_LIT> ) ; } const MCExpr * Expr = MCSymbolRefExpr :: create ( Symbol , Kind , * Ctx ) ; if ( Offset ) { assert ( Offset > <NUM_LIT> ) ; Expr = MCBinaryExpr :: createAdd ( Expr , MCConstantExpr :: create ( Offset , * Ctx ) , * Ctx ) ;


<s> <ISA_LIT>MCInstLower :: <ISA_LIT>MCInstLower ( <ISA_LIT>AsmPrinter & asmprinter ) : AsmPrinter ( asmprinter ) {


if ( Opnd2 . isValid ( ) ) Inst . addOperand ( Opnd2 ) ;


<s> Inst . addOperand ( Opnd0 ) ; Inst . addOperand ( Opnd1 ) ;


<s> MCOperand <ISA_LIT>MCInstLower :: createSub ( MachineBasicBlock * BB1 , MachineBasicBlock * BB2 , <ISA_LIT>MCExpr :: <ISA_LIT>ExprKind Kind ) const { const MCSymbolRefExpr * Sym1 = MCSymbolRefExpr :: create ( BB1 -> getSymbol ( ) , * Ctx ) ; const MCSymbolRefExpr * Sym2 = MCSymbolRefExpr :: create ( BB2 -> getSymbol ( ) , * Ctx ) ; const MCBinaryExpr * Sub = MCBinaryExpr :: createSub ( Sym1 , Sym2 , * Ctx ) ; return MCOperand :: createExpr ( <ISA_LIT>MCExpr :: create ( Kind , Sub , * Ctx ) ) ;


<s> const MCSymbolRefExpr * Sym2 = MCSymbolRefExpr :: create ( BB2 -> getSymbol ( ) , * Ctx ) ;

const MCBinaryExpr * Sub = MCBinaryExpr :: createSub ( Sym1 , Sym2 , * Ctx ) ;


<s> for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) { const MachineOperand & MO = MI -> getOperand ( i ) ; MCOperand MCOp = LowerOperand ( MO ) ; if ( MCOp . isValid ( ) ) OutMI . addOperand ( MCOp ) ;


<s> if ( lowerLongBranch ( MI , OutMI ) ) return ; OutMI . setOpcode ( MI -> getOpcode ( ) ) ;

for ( unsigned i = <NUM_LIT> , e = MI -> getNumOperands ( ) ; i != e ; ++ i ) {


<s> MCOperand T9Reg = MCOperand :: createReg ( <STR_LIT> ) ; StringRef SymName ( <STR_LIT> ) ; const MCSymbol * Sym = Ctx -> getOrCreateSymbol ( SymName ) ; const <ISA_LIT>MCExpr * MCSym ; MCSym = <ISA_LIT>MCExpr :: create ( Sym , <ISA_LIT>MCExpr :: CEK_ABS_HI , * Ctx ) ; MCOperand SymHi = MCOperand :: createExpr ( MCSym ) ; MCSym = <ISA_LIT>MCExpr :: create ( Sym , <ISA_LIT>MCExpr :: CEK_ABS_LO , * Ctx ) ; MCOperand SymLo = MCOperand :: createExpr ( MCSym ) ;


<s> MCOperand ZEROReg = MCOperand :: createReg ( <STR_LIT> ) ; if ( ! isInt < <NUM_LIT> > ( Offset ) ) { unsigned Hi = ( ( Offset + <NUM_LIT> ) >> <NUM_LIT> ) & <NUM_LIT> ; Offset &= <NUM_LIT> ; MCOperand ATReg = MCOperand :: createReg ( <STR_LIT> ) ; BaseReg = ATReg ; MCInsts . resize ( <NUM_LIT> ) ; CreateMCInst ( MCInsts [ <NUM_LIT> ] , <STR_LIT> , ATReg , ZEROReg , MCOperand :: createImm ( Hi ) ) ; CreateMCInst ( MCInsts [ <NUM_LIT> ] , <STR_LIT> , ATReg , ATReg , SPReg ) ; } MCInst St ; CreateMCInst ( St , <STR_LIT> , GPReg , BaseReg , MCOperand :: createImm ( Offset ) ) ; MCInsts . push_back ( St ) ;


<s> return false ; case <STR_LIT> : lowerLongBranchLUi ( MI , OutMI ) ; return true ; case <STR_LIT> :

lowerLongBranchADDiu ( MI , OutMI , <STR_LIT> , <ISA_LIT>MCExpr :: CEK_ABS_LO ) ;


<s> void <ISA_LIT>MCInstLower :: lowerLongBranchADDiu ( const MachineInstr * MI , MCInst & OutMI , int Opcode , <ISA_LIT>MCExpr :: <ISA_LIT>ExprKind Kind ) const { OutMI . setOpcode ( Opcode ) ; for ( unsigned I = <NUM_LIT> , E = <NUM_LIT> ; I != E ; ++ I ) { const MachineOperand & MO = MI -> getOperand ( I ) ; OutMI . addOperand ( LowerOperand ( MO ) ) ;


<s> const MachineOperand & MO = MI -> getOperand ( I ) ; OutMI . addOperand ( LowerOperand ( MO ) ) ; }

OutMI . addOperand ( createSub ( MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) , MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) , Kind ) ) ;


<s> lowerLongBranchLUi ( const MachineInstr * MI , MCInst & OutMI ) const { OutMI . setOpcode ( <STR_LIT> ) ; OutMI . addOperand ( LowerOperand ( MI -> getOperand ( <NUM_LIT> ) ) ) ; OutMI . addOperand ( createSub ( MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) , MI -> getOperand ( <NUM_LIT> ) . getMBB ( ) , <ISA_LIT>MCExpr :: CEK_ABS_HI ) ) ;


<s> MCOperand <ISA_LIT>MCInstLower :: LowerOperand ( const MachineOperand & MO , unsigned offset ) const { MachineOperandType MOTy = MO . getType ( ) ; switch ( MOTy ) { default : llvm_unreachable ( <STR_LIT> ) ; case MachineOperand :: MO_Register : if ( MO . isImplicit ( ) ) break ; return MCOperand :: createReg ( MO . getReg ( ) ) ; case MachineOperand :: MO_Immediate : return MCOperand :: createImm ( MO . getImm ( ) + offset ) ; case MachineOperand :: MO_RegisterMask : break ; case MachineOperand :: MO_MachineBasicBlock :


<s> static MCStreamer * create<ISA_LIT>AsmStreamer ( MCContext & Ctx , formatted_raw_ostream & OS , bool isVerboseAsm , bool useLoc , bool useCFI , bool useDwarfDirectory , MCInstPrinter * InstPrint , MCCodeEmitter * CE , MCAsmBackend * TAB , bool ShowInst ) { return new <ISA_LIT>AsmStreamer ( Ctx , OS , isVerboseAsm , useLoc , useCFI , useDwarfDirectory , InstPrint , CE , TAB , ShowInst ) ;


<s> return new <ISA_LIT>AsmStreamer ( Ctx , OS , isVerboseAsm , useLoc , useCFI , useDwarfDirectory , InstPrint , CE , TAB , ShowInst ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const Target & T , StringRef TT ) { MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( T , TT ) ; MachineLocation Dst ( MachineLocation :: VirtualFP ) ; MachineLocation Src ( <STR_LIT> , <NUM_LIT> ) ; MAI -> addInitialFrameState ( <NUM_LIT> , Dst , Src ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( CM == CodeModel :: JITDefault ) RM = Reloc :: Static ; else if ( RM == Reloc :: Default ) RM = Reloc :: PIC_ ; X -> InitMCCodeGenInfo ( RM , CM , OL ) ;


<s> static MCCodeGenInfo * create<ISA_LIT>MCCodeGenInfo ( StringRef TT , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) { MCCodeGenInfo * X = new MCCodeGenInfo ( ) ; if ( CM == CodeModel :: JITDefault ) RM = Reloc :: Static ; else if ( RM == Reloc :: Default ) RM = Reloc :: PIC_ ; X -> InitMCCodeGenInfo ( RM , CM , OL ) ; return X ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Target & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI , const MCSubtargetInfo & STI ) {

return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( StringRef TT ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ;