<s> if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ;


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & _OS , MCCodeEmitter * _Emitter , bool RelaxAll , bool NoExecStack ) { Triple TheTriple ( TT ) ; return createELFStreamer ( Ctx , MAB , _OS , _Emitter , RelaxAll , NoExecStack ) ;


<s> static MCStreamer * createMCStreamer ( const Target & T , StringRef TT , MCContext & Ctx , MCAsmBackend & MAB , raw_ostream & _OS , MCCodeEmitter * _Emitter , bool RelaxAll , bool NoExecStack ) {


<s> RegisterMCAsmInfoFn Y ( The<ISA_LIT>elTarget , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterAsmStreamer ( The<ISA_LIT>Target , create<ISA_LIT>AsmStreamer ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>elTarget , createMCStreamer ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackendEB32 ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>elTarget , create<ISA_LIT>AsmBackendEL32 ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ;

TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCSubtargetInfo ) ;


<s> TargetRegistry :: RegisterMCCodeGenInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCCodeGenInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterAsmStreamer ( The<ISA_LIT>Target , create<ISA_LIT>AsmStreamer ) ;

TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ;


<s> DashPosition = TT . find ( '-' ) ; if ( DashPosition == StringRef :: npos ) { TheTriple = TT . substr ( <NUM_LIT> ) ; } else { TheTriple = TT . substr ( <NUM_LIT> , DashPosition ) ; }

if ( TheTriple == <STR_LIT> || TheTriple == <STR_LIT> ) {


<s> DashPosition = TT . find ( '-' ) ; if ( DashPosition == StringRef :: npos ) { TheTriple = TT . substr ( <NUM_LIT> ) ; } else { TheTriple = TT . substr ( <NUM_LIT> , DashPosition ) ; } if ( TheTriple == <STR_LIT> || TheTriple == <STR_LIT> ) { if ( CPU . empty ( ) || CPU == <STR_LIT> ) { <ISA_LIT>ArchFeature = <STR_LIT> ; }


<s> TargetRegistry :: RegisterMCInstrInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCRegInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitterEB ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>elTarget , create<ISA_LIT>MCCodeEmitterEL ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>Target , createMCStreamer ) ; TargetRegistry :: RegisterMCObjectStreamer ( The<ISA_LIT>elTarget , createMCStreamer ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackendEB32 ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>elTarget , create<ISA_LIT>AsmBackendEL32 ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>Target , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( The<ISA_LIT>elTarget , create<ISA_LIT>MCSubtargetInfo ) ;

TargetRegistry :: RegisterMCInstPrinter ( The<ISA_LIT>Target , create<ISA_LIT>MCInstPrinter ) ;


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( const Triple & ) {

MCRegisterInfo * X = new MCRegisterInfo ( ) ;


<s> std :: string CPUName = CPU ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ;

return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPUName , FS ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCSubtargetInfo ) ;


<s> TargetRegistry :: RegisterMCInstrInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCInstrInfo ) ;

TargetRegistry :: RegisterMCRegInfo ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCRegisterInfo ) ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { std :: string ArchFS = select<ISA_LIT>ArchFeature ( TT , CPU ) ; if ( ! FS . empty ( ) ) { if ( ! ArchFS . empty ( ) ) { ArchFS = ArchFS + <STR_LIT> + FS . str ( ) ; } else { ArchFS = FS ;


<s> return create<ISA_LIT>ELFStreamer ( Context , std :: move ( MAB ) , std :: move ( OW ) , std :: move ( Emitter ) , RelaxAll ) ;


<s> TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( * T , createMCStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>AsmTargetStreamer ) ;


<s> RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; TargetRegistry :: RegisterELFStreamer ( * T , createMCStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>AsmTargetStreamer ) ; } TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>Target , create<ISA_LIT>MCCodeEmitterEB ) ; TargetRegistry :: RegisterMCCodeEmitter ( The<ISA_LIT>elTarget , create<ISA_LIT>MCCodeEmitterEL ) ; TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>Target , create<ISA_LIT>AsmBackendEB32 ) ;

TargetRegistry :: RegisterMCAsmBackend ( The<ISA_LIT>elTarget , create<ISA_LIT>AsmBackendEL32 ) ;


<s> static StringRef select<ISA_LIT>ArchFeature ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ; if ( CPU . empty ( ) || CPU == <STR_LIT> ) { if ( TT . getArch ( ) == Triple :: cpu0 || TT . getArch ( ) == Triple :: cpu0el ) { if ( CPU . empty ( ) || CPU == <STR_LIT> ) { <ISA_LIT>ArchFeature = <STR_LIT> ; } else if ( CPU == <STR_LIT> ) {


<s> <ISA_LIT>MCInstrAnalysis ( const MCInstrInfo * Info ) : MCInstrAnalysis ( Info ) {


<s> return new <ISA_LIT>TargetAsmStreamer ( S , OS ) ;


<s> static MCAsmInfo * create<ISA_LIT>MCAsmInfo ( const MCRegisterInfo & MRI , const Triple & TT ) {

MCAsmInfo * MAI = new <ISA_LIT>MCAsmInfo ( TT ) ;


<s> unsigned SP = MRI . getDwarfRegNum ( <STR_LIT> , true ) ; MCCFIInstruction Inst = MCCFIInstruction :: createDefCfa ( nullptr , SP , <NUM_LIT> ) ; MAI -> addInitialFrameState ( Inst ) ; return MAI ;


<s> static MCInstPrinter * create<ISA_LIT>MCInstPrinter ( const Triple & T , unsigned SyntaxVariant , const MCAsmInfo & MAI , const MCInstrInfo & MII , const MCRegisterInfo & MRI ) { return new <ISA_LIT>InstPrinter ( MAI , MII , MRI ) ;


<s> MCInstrInfo * X = new MCInstrInfo ( ) ; Init<ISA_LIT>MCInstrInfo ( X ) ; return X ;


<s> MCRegisterInfo * X = new MCRegisterInfo ( ) ; Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ; return X ;


<s> static MCRegisterInfo * create<ISA_LIT>MCRegisterInfo ( const Triple & TT ) { MCRegisterInfo * X = new MCRegisterInfo ( ) ;

Init<ISA_LIT>MCRegisterInfo ( X , <STR_LIT> ) ;


<s> static MCSubtargetInfo * create<ISA_LIT>MCSubtargetInfo ( const Triple & TT , StringRef CPU , StringRef FS ) { return create<ISA_LIT>MCSubtargetInfoImpl ( TT , CPU , FS ) ;


<s> void LLVMInitialize<ISA_LIT>TargetMC ( ) { for ( Target * T : { & getThe<ISA_LIT>Target ( ) , & getThe<ISA_LIT>elTarget ( ) } ) { RegisterMCAsmInfoFn X ( * T , create<ISA_LIT>MCAsmInfo ) ; TargetRegistry :: RegisterMCInstrInfo ( * T , create<ISA_LIT>MCInstrInfo ) ; TargetRegistry :: RegisterMCRegInfo ( * T , create<ISA_LIT>MCRegisterInfo ) ; TargetRegistry :: RegisterMCSubtargetInfo ( * T , create<ISA_LIT>MCSubtargetInfo ) ; TargetRegistry :: RegisterELFStreamer ( * T , createMCStreamer ) ; TargetRegistry :: RegisterAsmTargetStreamer ( * T , create<ISA_LIT>AsmTargetStreamer ) ; TargetRegistry :: RegisterMCInstrAnalysis ( * T , create<ISA_LIT>MCInstrAnalysis ) ; TargetRegistry :: RegisterMCInstPrinter ( * T , create<ISA_LIT>MCInstPrinter ) ; } TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>MCCodeEmitterEB ) ; TargetRegistry :: RegisterMCCodeEmitter ( getThe<ISA_LIT>elTarget ( ) , create<ISA_LIT>MCCodeEmitterEL ) ; TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>Target ( ) , create<ISA_LIT>AsmBackendEB32 ) ;

TargetRegistry :: RegisterMCAsmBackend ( getThe<ISA_LIT>elTarget ( ) , create<ISA_LIT>AsmBackendEL32 ) ;


<s> if ( CPU . empty ( ) || CPU == <STR_LIT> ) { if ( TT . getArch ( ) == Triple :: cpu0 || TT . getArch ( ) == Triple :: cpu0el ) { if ( CPU . empty ( ) || CPU == <STR_LIT> ) { <ISA_LIT>ArchFeature = <STR_LIT> ; }


<s> static StringRef select<ISA_LIT>ArchFeature ( const Triple & TT , StringRef CPU ) { std :: string <ISA_LIT>ArchFeature ;

if ( CPU . empty ( ) || CPU == <STR_LIT> ) {


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST , const TargetInstrInfo & tii ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , Subtarget ( ST ) , TII ( tii ) {


<s> MachineInstr & MI = * II ; MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned i = <NUM_LIT> ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; uint64_t stackSize = MF . getFrameInfo ( ) -> getStackSize ( ) ; int64_t spOffset = MF . getFrameInfo ( ) -> getObjectOffset ( FrameIndex ) ; DEBUG ( errs ( ) << <STR_LIT> << FrameIndex << <STR_LIT> << <STR_LIT> << spOffset << <STR_LIT> << <STR_LIT> << stackSize << <STR_LIT> ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI -> getCalleeSavedInfo ( ) ; int MinCSFI = <NUM_LIT> ; int MaxCSFI = - <NUM_LIT> ; if ( CSI . size ( ) ) { MinCSFI = CSI [ <NUM_LIT> ] . getFrameIdx ( ) ; MaxCSFI = CSI [ CSI . size ( ) - <NUM_LIT> ] . getFrameIdx ( ) ; } unsigned FrameReg ; if ( <ISA_LIT>FI -> isOutArgFI ( FrameIndex ) || <ISA_LIT>FI -> isDynAllocFI ( FrameIndex ) || ( FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI ) ) FrameReg = <STR_LIT> ; else FrameReg = getFrameRegister ( MF ) ; int64_t Offset ; if ( <ISA_LIT>FI -> isOutArgFI ( FrameIndex ) || <ISA_LIT>FI -> isGPFI ( FrameIndex ) || <ISA_LIT>FI -> isDynAllocFI ( FrameIndex ) ) Offset = spOffset ; else Offset = spOffset + ( int64_t ) stackSize ; Offset += MI . getOperand ( i + <NUM_LIT> ) . getImm ( ) ;

DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ;


<s> void <ISA_LIT>RegisterInfo :: eliminateFrameIndex ( MachineBasicBlock :: iterator II , int SPAdj , unsigned FIOperandNum , RegScavenger * RS ) const { MachineInstr & MI = * II ; MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; MachineFrameInfo * MFI = MF . getFrameInfo ( ) ; <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; unsigned i = <NUM_LIT> ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) -> getName ( ) << <STR_LIT> ;


<s> static const uint16_t CalleeSavedRegs [ ] = { <NUM_LIT> } ;


<s> return TFI -> hasFP ( MF ) ? ( <STR_LIT> ) :


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getTarget ( ) . getFrameLowering ( ) ; return TFI -> hasFP ( MF ) ? ( <STR_LIT> ) : ( <STR_LIT> ) ;


<s> static const uint16_t ReservedCPURegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; BitVector Reserved ( getNumRegs ( ) ) ; typedef TargetRegisterClass :: iterator RegIter ; for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ;

if ( MF . getTarget ( ) . getFrameLowering ( ) -> hasFP ( MF ) ) {


<s> typedef TargetRegisterClass :: iterator RegIter ; for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ; if ( MF . getTarget ( ) . getFrameLowering ( ) -> hasFP ( MF ) ) { Reserved . set ( <STR_LIT> ) ; } const <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ; if ( <ISA_LIT>FI -> globalBaseRegFixed ( ) ) Reserved . set ( <STR_LIT> ) ; return Reserved ;


<s> int MaxCSFI = - <NUM_LIT> ; if ( CSI . size ( ) ) { MinCSFI = CSI [ <NUM_LIT> ] . getFrameIdx ( ) ; MaxCSFI = CSI [ CSI . size ( ) - <NUM_LIT> ] . getFrameIdx ( ) ; } unsigned FrameReg ; FrameReg = getFrameRegister ( MF ) ; int64_t Offset ; Offset = spOffset + ( int64_t ) stackSize ; Offset += MI . getOperand ( i + <NUM_LIT> ) . getImm ( ) ; DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ; if ( ! MI . isDebugValue ( ) && ! isInt < <NUM_LIT> > ( Offset ) ) { assert ( <STR_LIT> ) ;


<s> getCalleeSavedRegs ( const MachineFunction * MF ) const { return CSR_O32_SaveList ;


<s> const uint16_t * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const { return CSR_O32_SaveList ;


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( CallingConv :: ID ) const {


<s> for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ; if ( MF . getInfo < <ISA_LIT>FunctionInfo > ( ) -> globalBaseRegFixed ( ) ) { Reserved . set ( <STR_LIT> ) ; } return Reserved ;


<s> errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; uint64_t stackSize = MF . getFrameInfo ( ) . getStackSize ( ) ; int64_t spOffset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIndex ) ; LLVM_DEBUG ( errs ( ) << <STR_LIT> << FrameIndex << <STR_LIT> << <STR_LIT> << spOffset << <STR_LIT> << <STR_LIT> << stackSize << <STR_LIT> ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; int MinCSFI = <NUM_LIT> ; int MaxCSFI = - <NUM_LIT> ; if ( CSI . size ( ) ) { MinCSFI = CSI [ <NUM_LIT> ] . getFrameIdx ( ) ; MaxCSFI = CSI [ CSI . size ( ) - <NUM_LIT> ] . getFrameIdx ( ) ;


<s> MachineFunction & MF = * MI . getParent ( ) -> getParent ( ) ; MachineFrameInfo & MFI = MF . getFrameInfo ( ) ; unsigned i = <NUM_LIT> ; while ( ! MI . getOperand ( i ) . isFI ( ) ) { ++ i ; assert ( i < MI . getNumOperands ( ) && <STR_LIT> ) ; } LLVM_DEBUG ( errs ( ) << <STR_LIT> << MF . getFunction ( ) . getName ( ) << <STR_LIT> ; errs ( ) << <STR_LIT> << MI ) ; int FrameIndex = MI . getOperand ( i ) . getIndex ( ) ; uint64_t stackSize = MF . getFrameInfo ( ) . getStackSize ( ) ;

int64_t spOffset = MF . getFrameInfo ( ) . getObjectOffset ( FrameIndex ) ;


<s> unsigned <ISA_LIT>RegisterInfo :: getFrameRegister ( const MachineFunction & MF ) const { const TargetFrameLowering * TFI = MF . getSubtarget ( ) . getFrameLowering ( ) ; return TFI -> hasFP ( MF ) ? ( <STR_LIT> ) :


<s> return TFI -> hasFP ( MF ) ? ( <STR_LIT> ) : ( <STR_LIT> ) ;


<s> for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ;

const <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;


<s> <ISA_LIT>RegisterInfo :: <ISA_LIT>RegisterInfo ( const <ISA_LIT>Subtarget & ST ) : <ISA_LIT>GenRegisterInfo ( <STR_LIT> ) , Subtarget ( ST ) {


<s> if ( <ISA_LIT>FI -> isOutArgFI ( FrameIndex ) || <ISA_LIT>FI -> isDynAllocFI ( FrameIndex ) || ( FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI ) ) FrameReg = <STR_LIT> ; else FrameReg = getFrameRegister ( MF ) ; int64_t Offset ; if ( <ISA_LIT>FI -> isOutArgFI ( FrameIndex ) || <ISA_LIT>FI -> isGPFI ( FrameIndex ) || <ISA_LIT>FI -> isDynAllocFI ( FrameIndex ) ) Offset = spOffset ; else Offset = spOffset + ( int64_t ) stackSize ; Offset += MI . getOperand ( i + <NUM_LIT> ) . getImm ( ) ; LLVM_DEBUG ( errs ( ) << <STR_LIT> << Offset << <STR_LIT> << <STR_LIT> ) ; if ( ! MI . isDebugValue ( ) && ! isInt < <NUM_LIT> > ( Offset ) ) { assert ( <STR_LIT> ) ; } MI . getOperand ( i ) . ChangeToRegister ( FrameReg , false ) ;

MI . getOperand ( i + <NUM_LIT> ) . ChangeToImmediate ( Offset ) ;


<s> const MCPhysReg * <ISA_LIT>RegisterInfo :: getCalleeSavedRegs ( const MachineFunction * MF ) const {


<s> const uint32_t * <ISA_LIT>RegisterInfo :: getCallPreservedMask ( const MachineFunction & MF , CallingConv :: ID ) const { return CSR_O32_RegMask ;


<s> return TFI -> hasFP ( MF ) ? ( <STR_LIT> ) :


<s> getReservedRegs ( const MachineFunction & MF ) const { static const uint16_t ReservedCPURegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; BitVector Reserved ( getNumRegs ( ) ) ; for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ; if ( MF . getSubtarget ( ) . getFrameLowering ( ) -> hasFP ( MF ) ) { Reserved . set ( <STR_LIT> ) ;


<s> static const uint16_t ReservedCPURegs [ ] = { <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> , <STR_LIT> } ; BitVector Reserved ( getNumRegs ( ) ) ; for ( unsigned I = <NUM_LIT> ; I < array_lengthof ( ReservedCPURegs ) ; ++ I ) Reserved . set ( ReservedCPURegs [ I ] ) ; if ( MF . getSubtarget ( ) . getFrameLowering ( ) -> hasFP ( MF ) ) { Reserved . set ( <STR_LIT> ) ; }

const <ISA_LIT>FunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>FunctionInfo > ( ) ;


<s> bool <ISA_LIT>RegisterInfo :: requiresRegisterScavenging ( const MachineFunction & MF ) const {


<s> bool <ISA_LIT>RegisterInfo :: trackLivenessAfterRegAlloc ( const MachineFunction & MF ) const { return true ;


<s> return new <ISA_LIT>SEFrameLowering ( ST ) ;


<s> const <ISA_LIT>FrameLowering * llvm :: create<ISA_LIT>SEFrameLowering ( const <ISA_LIT>Subtarget & ST ) { return new <ISA_LIT>SEFrameLowering ( ST ) ;


<s> void <ISA_LIT>SEFrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; if ( MF . getFrameInfo ( ) . hasCalls ( ) ) setAliasRegs ( MF , SavedRegs , <STR_LIT> ) ;


<s> const <ISA_LIT>SEInstrInfo & TII = * static_cast < const <ISA_LIT>SEInstrInfo * > ( STI . getInstrInfo ( ) ) ; const <ISA_LIT>RegisterInfo & RegInfo = * static_cast < const <ISA_LIT>SERegisterInfo * > ( STI . getRegisterInfo ( ) ) ; DebugLoc dl = MBBI -> getDebugLoc ( ) ; <ISA_LIT>ABIInfo ABI = STI . getABI ( ) ; unsigned SP = <STR_LIT> ; uint64_t StackSize = MFI . getStackSize ( ) ; if ( ! StackSize ) return ; TII . adjustStackPtr ( SP , StackSize , MBB , MBBI ) ;


<s> <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ; const <ISA_LIT>SEInstrInfo & TII = * static_cast < const <ISA_LIT>SEInstrInfo * > ( STI . getInstrInfo ( ) ) ; const <ISA_LIT>RegisterInfo & RegInfo = * static_cast < const <ISA_LIT>RegisterInfo * > ( STI . getRegisterInfo ( ) ) ; MachineBasicBlock :: iterator MBBI = MBB . begin ( ) ; DebugLoc dl = MBBI != MBB . end ( ) ? MBBI -> getDebugLoc ( ) : DebugLoc ( ) ; <ISA_LIT>ABIInfo ABI = STI . getABI ( ) ; unsigned SP = <STR_LIT> ; const TargetRegisterClass * RC = & <STR_LIT> ; uint64_t StackSize = MFI . getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI . adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; TII . adjustStackPtr ( SP , - StackSize , MBB , MBBI ) ; unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createDefCfaOffset ( nullptr , - StackSize ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . size ( ) ) { for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) ++ MBBI ; for ( std :: vector < CalleeSavedInfo > :: const_iterator I = CSI . begin ( ) , E = CSI . end ( ) ; I != E ; ++ I ) { int64_t Offset = MFI . getObjectOffset ( I -> getFrameIdx ( ) ) ; unsigned Reg = I -> getReg ( ) ; { unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createOffset ( nullptr , MRI -> getDwarfRegNum ( Reg , <NUM_LIT> ) , Offset ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; } } }


<s> unsigned SP = <STR_LIT> ; const TargetRegisterClass * RC = & <STR_LIT> ; uint64_t StackSize = MFI . getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI . adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; TII . adjustStackPtr ( SP , - StackSize , MBB , MBBI ) ; unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createDefCfaOffset ( nullptr , - StackSize ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . size ( ) ) { for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) ++ MBBI ;

for ( std :: vector < CalleeSavedInfo > :: const_iterator I = CSI . begin ( ) , E = CSI . end ( ) ; I != E ; ++ I ) {


<s> <ISA_LIT>SEFrameLowering :: <ISA_LIT>SEFrameLowering ( const <ISA_LIT>Subtarget & STI ) : <ISA_LIT>FrameLowering ( STI , STI . stackAlignment ( ) ) {


<s> MachineRegisterInfo & MRI = MF . getRegInfo ( ) ; unsigned FP = <STR_LIT> ; if ( hasFP ( MF ) ) setAliasRegs ( MF , SavedRegs , FP ) ;

if ( <ISA_LIT>FI -> callsEhReturn ( ) ) <ISA_LIT>FI -> createEhDataRegsFI ( ) ;


<s> void <ISA_LIT>SEFrameLowering :: determineCalleeSaves ( MachineFunction & MF , BitVector & SavedRegs , RegScavenger * RS ) const { TargetFrameLowering :: determineCalleeSaves ( MF , SavedRegs , RS ) ; <ISA_LIT>MachineFunctionInfo * <ISA_LIT>FI = MF . getInfo < <ISA_LIT>MachineFunctionInfo > ( ) ;

MachineRegisterInfo & MRI = MF . getRegInfo ( ) ;


<s> unsigned ADDu = <STR_LIT> ; if ( hasFP ( MF ) ) { MachineBasicBlock :: iterator I = MBBI ; for ( unsigned i = <NUM_LIT> ; i < MFI . getCalleeSavedInfo ( ) . size ( ) ; ++ i ) -- I ; BuildMI ( MBB , I , dl , TII . get ( ADDu ) , SP ) . addReg ( FP ) . addReg ( ZERO ) ; } if ( <ISA_LIT>FI -> callsEhReturn ( ) ) { const TargetRegisterClass * RC = & <STR_LIT> ; MachineBasicBlock :: iterator I = MBBI ; for ( unsigned i = <NUM_LIT> ; i < MFI . getCalleeSavedInfo ( ) . size ( ) ; ++ i ) -- I ;

for ( int J = <NUM_LIT> ; J < ABI . EhDataRegSize ( ) ; ++ J ) {


<s> unsigned FP = <STR_LIT> ; unsigned ZERO = <STR_LIT> ; unsigned ADDu = <STR_LIT> ; const TargetRegisterClass * RC = & <STR_LIT> ; uint64_t StackSize = MFI . getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI . adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; TII . adjustStackPtr ( SP , - StackSize , MBB , MBBI ) ; unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createDefCfaOffset ( nullptr , - StackSize ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . size ( ) ) { for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) ++ MBBI ; for ( std :: vector < CalleeSavedInfo > :: const_iterator I = CSI . begin ( ) , E = CSI . end ( ) ; I != E ; ++ I ) { int64_t Offset = MFI . getObjectOffset ( I -> getFrameIdx ( ) ) ; unsigned Reg = I -> getReg ( ) ; { unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createOffset ( nullptr , MRI -> getDwarfRegNum ( Reg , <NUM_LIT> ) , Offset ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; } } }

if ( <ISA_LIT>FI -> callsEhReturn ( ) ) {


<s> const TargetRegisterClass * RC = & <STR_LIT> ; uint64_t StackSize = MFI . getStackSize ( ) ; if ( StackSize == <NUM_LIT> && ! MFI . adjustsStack ( ) ) return ; MachineModuleInfo & MMI = MF . getMMI ( ) ; const MCRegisterInfo * MRI = MMI . getContext ( ) . getRegisterInfo ( ) ; TII . adjustStackPtr ( SP , - StackSize , MBB , MBBI ) ; unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createDefCfaOffset ( nullptr , - StackSize ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ; const std :: vector < CalleeSavedInfo > & CSI = MFI . getCalleeSavedInfo ( ) ; if ( CSI . size ( ) ) { for ( unsigned i = <NUM_LIT> ; i < CSI . size ( ) ; ++ i ) ++ MBBI ; for ( std :: vector < CalleeSavedInfo > :: const_iterator I = CSI . begin ( ) , E = CSI . end ( ) ; I != E ; ++ I ) { int64_t Offset = MFI . getObjectOffset ( I -> getFrameIdx ( ) ) ; unsigned Reg = I -> getReg ( ) ; { unsigned CFIIndex = MF . addFrameInst ( MCCFIInstruction :: createOffset ( nullptr , MRI -> getDwarfRegNum ( Reg , <NUM_LIT> ) , Offset ) ) ; BuildMI ( MBB , MBBI , dl , TII . get ( TargetOpcode :: CFI_INSTRUCTION ) ) . addCFIIndex ( CFIIndex ) ;


<s> bool <ISA_LIT>SEFrameLowering :: hasReservedCallFrame ( const MachineFunction & MF ) const { const MachineFrameInfo & MFI = MF . getFrameInfo ( ) ;

return isInt < <NUM_LIT> > ( MFI . getMaxCallFrameSize ( ) + getStackAlignment ( ) ) && ! MFI . hasVarSizedObjects ( ) ;


<s> return isInt < <NUM_LIT> > ( MFI . getMaxCallFrameSize ( ) + getStackAlignment ( ) ) && ! MFI . hasVarSizedObjects ( ) ;


<s> for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) SavedRegs . set ( * AI ) ;


<s> static void setAliasRegs ( MachineFunction & MF , BitVector & SavedRegs , unsigned Reg ) { const TargetRegisterInfo * TRI = MF . getSubtarget ( ) . getRegisterInfo ( ) ;

for ( MCRegAliasIterator AI ( Reg , TRI , true ) ; AI . isValid ( ) ; ++ AI ) SavedRegs . set ( * AI ) ;


<s> const TargetInstrInfo & TII = * MF -> getSubtarget ( ) . getInstrInfo ( ) ; for ( unsigned i = <NUM_LIT> , e = CSI . size ( ) ; i != e ; ++ i ) { unsigned Reg = CSI [ i ] . getReg ( ) ; bool IsRAAndRetAddrIsTaken = ( Reg == <STR_LIT> ) && MF -> getFrameInfo ( ) . isReturnAddressTaken ( ) ;

if ( ! IsRAAndRetAddrIsTaken ) EntryBlock -> addLiveIn ( Reg ) ;


<s> MachineBasicBlock & MBB = * MI . getParent ( ) ; switch ( MI . getDesc ( ) . getOpcode ( ) ) { default : return false ; case <STR_LIT> : expandRetLR ( MBB , MI ) ; break ;


<s> if ( Inst -> Opc == LUi ) BuildMI ( MBB , II , DL , get ( LUi ) , ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOperand ) ) ; else BuildMI ( MBB , II , DL , get ( Inst -> Opc ) , ATReg ) . addReg ( ZEROReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOperand ) ) ; for ( ++ Inst ; Inst != Seq . end ( ) - LastInstrIsADDiu ; ++ Inst ) BuildMI ( MBB , II , DL , get ( Inst -> Opc ) , ATReg ) . addReg ( ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOperand ) ) ; if ( LastInstrIsADDiu ) * NewImm = Inst -> ImmOperand ;


<s> DebugLoc DL = I != MBB . end ( ) ? I -> getDebugLoc ( ) : DebugLoc ( ) ; unsigned ADDu = <STR_LIT> ; unsigned ADDiu = <STR_LIT> ; if ( isInt < <NUM_LIT> > ( Amount ) ) { BuildMI ( MBB , I , DL , get ( ADDiu ) , SP ) . addReg ( SP ) . addImm ( Amount ) ; } else { unsigned Reg = loadImmediate ( Amount , MBB , I , DL , nullptr ) ; BuildMI ( MBB , I , DL , get ( ADDu ) , SP ) . addReg ( SP ) . addReg ( Reg , RegState :: Kill ) ;


<s> } else if ( <STR_LIT> . contains ( SrcReg ) ) { if ( DestReg == <STR_LIT> ) Opc = <STR_LIT> , DestReg = <NUM_LIT> ; else if ( DestReg == <STR_LIT> ) Opc = <STR_LIT> , DestReg = <NUM_LIT> ; } assert ( Opc && <STR_LIT> ) ; MachineInstrBuilder MIB = BuildMI ( MBB , I , DL , get ( Opc ) ) ; if ( DestReg ) MIB . addReg ( DestReg , RegState :: Define ) ; if ( ZeroReg ) MIB . addReg ( ZeroReg ) ; if ( SrcReg ) MIB . addReg ( SrcReg , getKillRegState ( KillSrc ) ) ;


<s> <ISA_LIT>SEInstrInfo :: <ISA_LIT>SEInstrInfo ( const <ISA_LIT>Subtarget & STI ) : <ISA_LIT>InstrInfo ( STI ) , RI ( STI ) {


<s> const TargetMachine & TM = MBB . getParent ( ) -> getTarget ( ) ; if ( TM . isPositionIndependent ( ) ) BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( ADDU ) , T9 ) . addReg ( TargetReg ) . addReg ( ZERO ) ; BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( ADDU ) , LR ) . addReg ( TargetReg ) . addReg ( ZERO ) ;

BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( ADDU ) , SP ) . addReg ( SP ) . addReg ( OffsetReg ) ;


<s> MachineBasicBlock & MBB = * MI . getParent ( ) ; switch ( MI . getDesc ( ) . getOpcode ( ) ) { default :


<s> void <ISA_LIT>SEInstrInfo :: expandRetLR ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I ) const { BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) ;


<s> BuildMI ( MBB , I , I -> getDebugLoc ( ) , get ( <STR_LIT> ) ) . addReg ( <STR_LIT> ) ;


<s> case <STR_LIT> : return <STR_LIT> ; case <STR_LIT> : return <STR_LIT> ; }


<s> default : llvm_unreachable ( <STR_LIT> ) ; case <STR_LIT> : return <STR_LIT> ;


<s> assert ( Seq . size ( ) && ( ! LastInstrIsADDiu || ( Seq . size ( ) > <NUM_LIT> ) ) ) ; if ( Inst -> Opc == LUi ) BuildMI ( MBB , II , DL , get ( LUi ) , ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; else BuildMI ( MBB , II , DL , get ( Inst -> Opc ) , ATReg ) . addReg ( ZEROReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; for ( ++ Inst ; Inst != Seq . end ( ) - LastInstrIsADDiu ; ++ Inst ) BuildMI ( MBB , II , DL , get ( Inst -> Opc ) , ATReg ) . addReg ( ATReg ) . addImm ( SignExtend64 < <NUM_LIT> > ( Inst -> ImmOpnd ) ) ; if ( LastInstrIsADDiu ) * NewImm = Inst -> ImmOpnd ;


<s> unsigned Opc = <NUM_LIT> ; Opc = <STR_LIT> ; assert ( Opc && <STR_LIT> ) ;

BuildMI ( MBB , I , DL , get ( Opc ) , DestReg ) . addFrameIndex ( FI ) . addImm ( Offset ) . addMemOperand ( MMO ) ;


<s> unsigned Opc = <NUM_LIT> ; Opc = <STR_LIT> ; assert ( Opc && <STR_LIT> ) ; BuildMI ( MBB , I , DL , get ( Opc ) ) . addReg ( SrcReg , getKillRegState ( isKill ) ) . addFrameIndex ( FI ) . addImm ( Offset ) . addMemOperand ( MMO ) ;


storeRegToStack ( MachineBasicBlock & MBB , MachineBasicBlock :: iterator I , unsigned SrcReg , bool isKill , int FI , const TargetRegisterClass * RC , const TargetRegisterInfo * TRI , int64_t Offset ) const {


<s> FunctionPass * llvm :: create<ISA_LIT>SEISelDAG ( <ISA_LIT>TargetMachine & TM , CodeGenOpt :: Level OptLevel ) { return new <ISA_LIT>SEDAGToDAGISel ( TM , OptLevel ) ;


<s> unsigned Opc = InFlag . getOpcode ( ) ; assert ( ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) || ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ) && <STR_LIT> ) ; SDValue Ops [ ] = { CmpLHS , InFlag . getOperand ( <NUM_LIT> ) } ; SDValue LHS = Node -> getOperand ( <NUM_LIT> ) , RHS = Node -> getOperand ( <NUM_LIT> ) ; EVT VT = LHS . getValueType ( ) ; SDNode * Carry ; if ( Subtarget -> has<ISA_LIT>32II ( ) ) Carry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , Ops ) ;


<s> assert ( ( ( Opc == <STR_LIT> || Opc == <STR_LIT> ) || ( Opc == <STR_LIT> || Opc == <STR_LIT> ) ) && <STR_LIT> ) ; SDValue Ops [ ] = { CmpLHS , InFlag . getOperand ( <NUM_LIT> ) } ; SDValue LHS = Node -> getOperand ( <NUM_LIT> ) , RHS = Node -> getOperand ( <NUM_LIT> ) ; EVT VT = LHS . getValueType ( ) ; SDNode * Carry ; if ( Subtarget -> has<ISA_LIT>32II ( ) ) Carry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , Ops ) ; else { SDNode * StatusWord = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , Ops ) ; SDValue Constant1 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , VT ) ;

Carry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , SDValue ( StatusWord , <NUM_LIT> ) , Constant1 ) ;


<s> SDValue InFlag = SDValue ( Mul , <NUM_LIT> ) ; if ( HasLo ) { Lo = CurDAG -> getMachineNode ( <STR_LIT> , DL , Ty , <STR_LIT> , InFlag ) ; InFlag = SDValue ( Lo , <NUM_LIT> ) ; } if ( HasHi ) {

Hi = CurDAG -> getMachineNode ( <STR_LIT> , DL , Ty , InFlag ) ;


<s> explicit <ISA_LIT>SEDAGToDAGISel ( <ISA_LIT>TargetMachine & TM , CodeGenOpt :: Level OL ) : <ISA_LIT>DAGToDAGISel ( TM , OL ) {


<s> void <ISA_LIT>SEDAGToDAGISel :: processFunctionAfterISel ( MachineFunction & MF ) {


<s> bool <ISA_LIT>SEDAGToDAGISel :: runOnMachineFunction ( MachineFunction & MF ) { Subtarget = & static_cast < const <ISA_LIT>Subtarget & > ( MF . getSubtarget ( ) ) ;

return <ISA_LIT>DAGToDAGISel :: runOnMachineFunction ( MF ) ;


<s> if ( Subtarget -> has<ISA_LIT>32II ( ) ) Carry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , Ops ) ; else { SDNode * StatusWord = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , Ops ) ; SDValue Constant1 = CurDAG -> getTargetConstant ( <NUM_LIT> , DL , VT ) ; Carry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , SDValue ( StatusWord , <NUM_LIT> ) , Constant1 ) ; } SDNode * AddCarry = CurDAG -> getMachineNode ( <STR_LIT> , DL , VT , SDValue ( Carry , <NUM_LIT> ) , RHS ) ;

CurDAG -> SelectNodeTo ( Node , MOp , VT , <STR_LIT> , LHS , SDValue ( AddCarry , <NUM_LIT> ) ) ;


<s> SDNode * Lo = <NUM_LIT> , * Hi = <NUM_LIT> ; SDNode * Mul = CurDAG -> getMachineNode ( Opc , DL , <STR_LIT> , N -> getOperand ( <NUM_LIT> ) , N -> getOperand ( <NUM_LIT> ) ) ; SDValue InFlag = SDValue ( Mul , <NUM_LIT> ) ; if ( HasLo ) { Lo = CurDAG -> getMachineNode ( <STR_LIT> , DL , Ty , <STR_LIT> , InFlag ) ; InFlag = SDValue ( Lo , <NUM_LIT> ) ; } if ( HasHi ) Hi = CurDAG -> getMachineNode ( <STR_LIT> , DL , Ty , InFlag ) ;


<s> isEligibleForTailCallOptimization ( const <ISA_LIT>CC & <ISA_LIT>CCInfo , unsigned NextStackOffset , const <ISA_LIT>MachineFunctionInfo & FI ) const { if ( ! Enable<ISA_LIT>TailCalls ) return false ;

if ( <ISA_LIT>CCInfo . hasByValArg ( ) || FI . hasByvalArg ( ) ) return false ;


<s> <ISA_LIT>SETargetLowering :: <ISA_LIT>SETargetLowering ( const <ISA_LIT>TargetMachine & TM , const <ISA_LIT>Subtarget & STI ) : <ISA_LIT>TargetLowering ( TM , STI ) { addRegisterClass ( <STR_LIT> , & <STR_LIT> ) ; computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ;


<s> addRegisterClass ( <STR_LIT> , & <STR_LIT> ) ; computeRegisterProperties ( Subtarget . getRegisterInfo ( ) ) ;


<s> return new <ISA_LIT>SETargetLowering ( TM , STI ) ;


<s> bool <ISA_LIT>SETargetLowering :: isEligibleForTailCallOptimization ( const <ISA_LIT>CC & <ISA_LIT>CCInfo , unsigned NextStackOffset , const <ISA_LIT>MachineFunctionInfo & FI ) const {

if ( ! Enable<ISA_LIT>TailCalls ) return false ;


<s> SDValue <ISA_LIT>SETargetLowering :: LowerOperation ( SDValue Op , SelectionDAG & DAG ) const { return <ISA_LIT>TargetLowering :: LowerOperation ( Op , DAG ) ;


<s> <ISA_LIT>SelectionDAGInfo :: <ISA_LIT>SelectionDAGInfo ( const <ISA_LIT>TargetMachine & TM ) : TargetSelectionDAGInfo ( TM ) {


<s> <ISA_LIT>SelectionDAGInfo :: ~ <ISA_LIT>SelectionDAGInfo ( ) {


<s> <ISA_LIT>SERegisterInfo :: <ISA_LIT>SERegisterInfo ( const <ISA_LIT>Subtarget & ST ) : <ISA_LIT>RegisterInfo ( ST ) {


<s> <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , <ISA_LIT>ABI ( UnknownABI ) , IsLittle ( little ) , RM ( _RM ) { std :: string CPUName = CPU ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ; ParseSubtargetFeatures ( CPUName , FS ) ; InstrItins = getInstrItineraryForCPU ( CPUName ) ; if ( <ISA_LIT>ABI == UnknownABI ) <ISA_LIT>ABI = O32 ;


<s> <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , <ISA_LIT>ABI ( UnknownABI ) , IsLittle ( little ) , IsLinux ( IsLinuxOpt ) { std :: string CPUName = CPU ; if ( CPUName . empty ( ) ) CPUName = <STR_LIT> ; ParseSubtargetFeatures ( CPUName , FS ) ;

InstrItins = getInstrItineraryForCPU ( CPUName ) ;


<s> bool enableMachineScheduler ( ) const override { return true ;


<s> const TargetFrameLowering * getFrameLowering ( ) const override {


<s> <ISA_LIT>Subtarget & <ISA_LIT>Subtarget :: initializeSubtargetDependencies ( StringRef CPU , StringRef FS ) {


<s> bool <ISA_LIT>Subtarget :: abiUsesSoftFloat ( ) const {


<s> void <ISA_LIT>Subtarget :: anchor ( ) {


<s> <ISA_LIT>GenSubtargetInfo ( TT , CPU , FS ) , IsLittle ( little ) , TargetTriple ( TT ) , TM ( _TM ) , TSInfo ( ) , InstrInfo ( <ISA_LIT>InstrInfo :: create ( initializeSubtargetDependencies ( CPU , FS , TM ) ) ) , FrameLowering ( <ISA_LIT>FrameLowering :: create ( * this ) ) , TLInfo ( <ISA_LIT>TargetLowering :: create ( TM , * this ) ) { EnableOverflow = EnableOverflowOpt ; UseSmallSection = UseSmallSectionOpt ;


<s> const <ISA_LIT>ABIInfo & <ISA_LIT>Subtarget :: getABI ( ) const { return TM . getABI ( ) ;


<s> const TargetFrameLowering * getFrameLowering ( ) const override { return FrameLowering . get ( ) ;


<s> const <ISA_LIT>InstrInfo * getInstrInfo ( ) const override { return InstrInfo . get ( ) ;


<s> const InstrItineraryData * getInstrItineraryData ( ) const override { return & InstrItins ;


<s> return & InstrInfo -> getRegisterInfo ( ) ;


<s> const <ISA_LIT>RegisterInfo * getRegisterInfo ( ) const override {

return & InstrInfo -> getRegisterInfo ( ) ;


<s> const SelectionDAGTargetInfo * getSelectionDAGInfo ( ) const override {


<s> bool has<ISA_LIT>32I ( ) const { return <ISA_LIT>ArchVersion >= <ISA_LIT>32I ;


<s> return <ISA_LIT>ArchVersion >= <ISA_LIT>32II ;


<s> bool hasSlt ( ) const { return HasSlt ;


<s> if ( CPU . empty ( ) || CPU == <STR_LIT> ) { CPU = <STR_LIT> ; } else if ( CPU == <STR_LIT> ) { CPU = <STR_LIT> ; return * this ; } else if ( CPU != <STR_LIT> && CPU != <STR_LIT> ) { CPU = <STR_LIT> ; } } else { errs ( ) << <STR_LIT> << TargetTriple . getArch ( ) << <STR_LIT> << CPU << <STR_LIT> ; exit ( <NUM_LIT> ) ; } if ( CPU == <STR_LIT> ) <ISA_LIT>ArchVersion = <ISA_LIT>32I ;

else if ( CPU == <STR_LIT> ) <ISA_LIT>ArchVersion = <ISA_LIT>32II ;


<s> return <ISA_LIT>ArchVersion == <ISA_LIT>32I ;


<s> bool is<ISA_LIT>32I ( ) const { return <ISA_LIT>ArchVersion == <ISA_LIT>32I ;


<s> bool <ISA_LIT>Subtarget :: isPositionIndependent ( ) const {


<s> return TM . isPositionIndependent ( ) ;


<s> bool useSmallSection ( ) const { return UseSmallSection ;


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) { RegisterTarget < Triple :: cpu0 , true > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> void LLVMInitialize<ISA_LIT>TargetInfo ( ) {

RegisterTarget < Triple :: cpu0 , true > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> static Target The<ISA_LIT>elTarget ;


<s> Target & llvm :: getThe<ISA_LIT>Target ( ) { static Target The<ISA_LIT>Target ; return The<ISA_LIT>Target ;


<s> RegisterTarget < Triple :: cpu0el , true > Y ( getThe<ISA_LIT>elTarget ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> RegisterTarget < Triple :: cpu0 , true > X ( getThe<ISA_LIT>Target ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;

RegisterTarget < Triple :: cpu0el , true > Y ( getThe<ISA_LIT>elTarget ( ) , <STR_LIT> , <STR_LIT> , <STR_LIT> ) ;


<s> bool <ISA_LIT>PassConfig :: addPreEmitPass ( ) { <ISA_LIT>TargetMachine & TM = get<ISA_LIT>TargetMachine ( ) ; addPass ( create<ISA_LIT>DelJmpPass ( TM ) ) ; return true ;


<s> addPass ( create<ISA_LIT>EmitGPRestorePass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> bool <ISA_LIT>PassConfig :: addPreRegAlloc ( ) { addPass ( create<ISA_LIT>EmitGPRestorePass ( get<ISA_LIT>TargetMachine ( ) ) ) ; return true ;


<s> <ISA_LIT>ebTargetMachine :: <ISA_LIT>ebTargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , false ) {


<s> <ISA_LIT>ebTargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , false ) {


<s> <ISA_LIT>elTargetMachine :: <ISA_LIT>elTargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , true ) {


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine * TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL , bool isLittle ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS , isLittle , RM ) , DL ( isLittle ? ( <STR_LIT> ) :

( <STR_LIT> ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) {


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PM ) {

return new <ISA_LIT>PassConfig ( this , PM ) ;


<s> virtual const DataLayout * getDataLayout ( ) const { return & DL ;


<s> virtual const DataLayout * getDataLayout ( ) const {


<s> virtual const TargetFrameLowering * getFrameLowering ( ) const {


<s> virtual const <ISA_LIT>InstrInfo * getInstrInfo ( ) const {


<s> return & InstrInfo . getRegisterInfo ( ) ;


<s> virtual const <ISA_LIT>SelectionDAGInfo * getSelectionDAGInfo ( ) const {


<s> virtual const <ISA_LIT>Subtarget * getSubtargetImpl ( ) const { return & Subtarget ;


<s> virtual const <ISA_LIT>TargetLowering * getTargetLowering ( ) const { return & TLInfo ;


<s> void LLVMInitialize<ISA_LIT>Target ( ) { RegisterTargetMachine < <ISA_LIT>ebTargetMachine > X ( The<ISA_LIT>Target ) ; RegisterTargetMachine < <ISA_LIT>elTargetMachine > Y ( The<ISA_LIT>elTarget ) ;


<s> <ISA_LIT>TargetMachine ( const Target & T , StringRef TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Reloc :: Model RM , CodeModel :: Model CM , CodeGenOpt :: Level OL , bool isLittle ) : LLVMTargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL ) , Subtarget ( TT , CPU , FS , isLittle ) , DL ( isLittle ? ( <STR_LIT> ) : ( <STR_LIT> ) ) , InstrInfo ( * this ) , FrameLowering ( Subtarget ) , TLInfo ( * this ) , TSInfo ( * this ) {


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < Reloc :: Model > RM ) { if ( ! RM . hasValue ( ) ) return Reloc :: Static ; return * RM ;


<s> addPass ( create<ISA_LIT>SEISelDAG ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;


<s> bool <ISA_LIT>PassConfig :: addInstSelector ( ) {

addPass ( create<ISA_LIT>SEISelDAG ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ;


<s> addPass ( create<ISA_LIT>DelJmpPass ( TM ) ) ; addPass ( create<ISA_LIT>DelaySlotFillerPass ( TM ) ) ;


<s> static std :: string computeDataLayout ( const Triple & TT , StringRef CPU , const TargetOptions & Options , bool isLittle ) { std :: string Ret = <STR_LIT> ;


<s> <ISA_LIT>ebTargetMachine :: <ISA_LIT>ebTargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , JIT , false ) {


<s> <ISA_LIT>elTargetMachine :: <ISA_LIT>elTargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , JIT , true ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT , bool isLittle ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options , isLittle ) , TT , CPU , FS , Options , getEffectiveRelocModel ( JIT , RM ) , getEffectiveCodeModel ( CM , CodeModel :: Small ) , OL ) , isLittle ( isLittle ) , TLOF ( llvm :: make_unique < <ISA_LIT>TargetObjectFile > ( ) ) , ABI ( <ISA_LIT>ABIInfo :: computeTargetABI ( ) ) , DefaultSubtarget ( TT , CPU , FS , isLittle , * this ) { initAsmInfo ( ) ;


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT , bool isLittle ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options , isLittle ) , TT , CPU , FS , Options , getEffectiveRelocModel ( JIT , RM ) , getEffectiveCodeModel ( CM , CodeModel :: Small ) , OL ) , isLittle ( isLittle ) , TLOF ( llvm :: make_unique < <ISA_LIT>TargetObjectFile > ( ) ) , ABI ( <ISA_LIT>ABIInfo :: computeTargetABI ( ) ) , DefaultSubtarget ( TT , CPU , FS , isLittle , * this ) {


<s> static Reloc :: Model getEffectiveRelocModel ( bool JIT , Optional < Reloc :: Model > RM ) { if ( ! RM . hasValue ( ) || JIT ) return Reloc :: Static ;


<s> addPass ( create<ISA_LIT>SEISelDag ( get<ISA_LIT>TargetMachine ( ) , getOptLevel ( ) ) ) ; return false ;


<s> void <ISA_LIT>PassConfig :: addPreEmitPass ( ) { <ISA_LIT>TargetMachine & TM = get<ISA_LIT>TargetMachine ( ) ; addPass ( create<ISA_LIT>LongBranchPass ( TM ) ) ; return ;


<s> addPass ( create<ISA_LIT>LongBranchPass ( TM ) ) ;


<s> if ( ! <ISA_LIT>ReserveGP ) { addPass ( create<ISA_LIT>EmitGPRestorePass ( get<ISA_LIT>TargetMachine ( ) ) ) ;


<s> void <ISA_LIT>elTargetMachine :: anchor ( ) {


<s> static std :: string computeDataLayout ( const Triple & TT , StringRef CPU , const TargetOptions & Options , bool isLittle ) { std :: string Ret = <STR_LIT> ; if ( isLittle ) Ret += <STR_LIT> ; else Ret += <STR_LIT> ; Ret += <STR_LIT> ; Ret += <STR_LIT> ;


<s> <ISA_LIT>ebTargetMachine :: <ISA_LIT>ebTargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , false ) {


<s> <ISA_LIT>elTargetMachine :: <ISA_LIT>elTargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool JIT ) : <ISA_LIT>TargetMachine ( T , TT , CPU , FS , Options , RM , CM , OL , true ) {


<s> <ISA_LIT>PassConfig ( <ISA_LIT>TargetMachine & TM , PassManagerBase & PM ) : TargetPassConfig ( TM , PM ) {


<s> <ISA_LIT>TargetMachine :: <ISA_LIT>TargetMachine ( const Target & T , const Triple & TT , StringRef CPU , StringRef FS , const TargetOptions & Options , Optional < Reloc :: Model > RM , Optional < CodeModel :: Model > CM , CodeGenOpt :: Level OL , bool isLittle ) : LLVMTargetMachine ( T , computeDataLayout ( TT , CPU , Options , isLittle ) , TT , CPU , FS , Options , getEffectiveRelocModel ( CM , RM ) , CodeModel :: Medium , OL ) , isLittle ( isLittle ) , TLOF ( make_unique < <ISA_LIT>TargetObjectFile > ( ) ) , ABI ( <ISA_LIT>ABIInfo :: computeTargetABI ( ) ) , DefaultSubtarget ( TT , CPU , FS , isLittle , * this ) {


<s> TargetPassConfig * <ISA_LIT>TargetMachine :: createPassConfig ( PassManagerBase & PM ) { return new <ISA_LIT>PassConfig ( * this , PM ) ;


<s> const <ISA_LIT>ABIInfo & getABI ( ) const {


<s> const <ISA_LIT>Subtarget & get<ISA_LIT>Subtarget ( ) const {

return * get<ISA_LIT>TargetMachine ( ) . getSubtargetImpl ( ) ;


<s> <ISA_LIT>TargetMachine & get<ISA_LIT>TargetMachine ( ) const { return getTM < <ISA_LIT>TargetMachine > ( ) ;


<s> static Reloc :: Model getEffectiveRelocModel ( Optional < CodeModel :: Model > CM , Optional < Reloc :: Model > RM ) { if ( ! RM . hasValue ( ) ) return Reloc :: Static ; return * RM ;


<s> const <ISA_LIT>Subtarget * getSubtargetImpl ( ) const { return & DefaultSubtarget ;


<s> RegisterTargetMachine < <ISA_LIT>ebTargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;

RegisterTargetMachine < <ISA_LIT>elTargetMachine > Y ( getThe<ISA_LIT>elTarget ( ) ) ;


<s> void LLVMInitialize<ISA_LIT>Target ( ) {

RegisterTargetMachine < <ISA_LIT>ebTargetMachine > X ( getThe<ISA_LIT>Target ( ) ) ;


<s> <ISA_LIT>TargetMachine :: ~ <ISA_LIT>TargetMachine ( ) {


<s> void <ISA_LIT>TargetObjectFile :: Initialize ( MCContext & Ctx , const TargetMachine & TM ) { TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ;

SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC , SectionKind :: getDataRel ( ) ) ;


<s> const GlobalVariable * GVA = dyn_cast < GlobalVariable > ( GV ) ; if ( ! GVA ) return false ; if ( ! Kind . isBSS ( ) && ! Kind . isDataRel ( ) ) return false ;

if ( Kind . isMergeable1ByteCString ( ) ) return false ;


<s> if ( ! Subtarget . useSmallSection ( ) ) return false ; const GlobalVariable * GVA = dyn_cast < GlobalVariable > ( GV ) ; if ( ! GVA ) return false ; if ( ! Kind . isBSS ( ) && ! Kind . isDataRel ( ) ) return false ;


<s> SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler * Mang , const TargetMachine & TM ) const {

if ( Kind . isBSS ( ) && IsGlobalInSmallSection ( GV , TM , Kind ) ) return SmallBSSSection ;


<s> SelectSectionForGlobal ( const GlobalValue * GV , SectionKind Kind , Mangler * Mang , const TargetMachine & TM ) const { if ( Kind . isBSS ( ) && IsGlobalInSmallSection ( GV , TM , Kind ) ) return SmallBSSSection ; if ( Kind . isDataNoRel ( ) && IsGlobalInSmallSection ( GV , TM , Kind ) ) return SmallDataSection ; return TargetLoweringObjectFileELF :: SelectSectionForGlobal ( GV , Kind , Mang , TM ) ;


<s> const <ISA_LIT>Subtarget & Subtarget = TM . getSubtarget < <ISA_LIT>Subtarget > ( ) ; if ( Subtarget . isLinux ( ) ) return false ;

const GlobalVariable * GVA = dyn_cast < GlobalVariable > ( GV ) ;


<s> InitializeELF ( TM . Options . UseInitArray ) ;

SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ;


<s> InitializeELF ( TM . Options . UseInitArray ) ; SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ;


<s> TargetLoweringObjectFileELF :: Initialize ( Ctx , TM ) ; InitializeELF ( TM . Options . UseInitArray ) ; SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; this -> TM = & static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> SmallDataSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_PROGBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ; this -> TM = & static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> return ( IsGlobalInSmallSectionImpl ( GO , TM ) && ( Kind . isData ( ) || Kind . isBSS ( ) || Kind . isCommon ( ) || Kind . isReadOnly ( ) ) ) ;


<s> if ( ! GVA ) return false ; Type * Ty = GVA -> getValueType ( ) ; return IsInSmallSection ( GVA -> getParent ( ) -> getDataLayout ( ) . getTypeAllocSize ( Ty ) ) ;


<s> if ( Kind . isReadOnly ( ) && IsGlobalInSmallSection ( GO , TM , Kind ) ) return SmallDataSection ; return TargetLoweringObjectFileELF :: SelectSectionForGlobal ( GO , Kind , TM ) ;


<s> SmallBSSSection = getContext ( ) . getELFSection ( <STR_LIT> , ELF :: SHT_NOBITS , ELF :: SHF_WRITE | ELF :: SHF_ALLOC ) ;

this -> TM = & static_cast < const <ISA_LIT>TargetMachine & > ( TM ) ;


<s> IsGlobalInSmallSection ( const GlobalObject * GO , const TargetMachine & TM , SectionKind Kind ) const {

return IsGlobalInSmallSectionImpl ( GO , TM ) && ( Kind . isData ( ) || Kind . isBSS ( ) || Kind . isCommon ( ) || Kind . isReadOnly ( ) ) ;


<s> if ( ! GVA ) return false ; Type * Ty = GVA -> getValueType ( ) ;

return IsInSmallSection ( GVA -> getParent ( ) -> getDataLayout ( ) . getTypeAllocSize ( Ty ) ) ;


<s> return Size > <NUM_LIT> && Size <= SSThreshold ;


<s> if ( Kind . isData ( ) && IsGlobalInSmallSection ( GO , TM , Kind ) ) return SmallDataSection ;

if ( Kind . isReadOnly ( ) && IsGlobalInSmallSection ( GO , TM , Kind ) ) return SmallDataSection ;


<s> if ( Kind . isReadOnly ( ) && IsGlobalInSmallSection ( GO , TM , Kind ) ) return SmallDataSection ;

return TargetLoweringObjectFileELF :: SelectSectionForGlobal ( GO , Kind , TM ) ;


<s> <ISA_LIT>TargetStreamer :: <ISA_LIT>TargetStreamer ( MCStreamer & S ) : MCTargetStreamer ( S ) {


<s> <ISA_LIT>TargetAsmStreamer :: <ISA_LIT>TargetAsmStreamer ( MCStreamer & S , formatted_raw_ostream & OS ) : <ISA_LIT>TargetStreamer ( S ) , OS ( OS ) {


<s> <ISA_LIT>TargetELFStreamer :: <ISA_LIT>TargetELFStreamer ( MCStreamer & S , const MCSubtargetInfo & STI ) : <ISA_LIT>TargetStreamer ( S ) , STI ( STI ) {