unknown
commited on
Commit
·
330e35c
1
Parent(s):
c4d5a75
add files
Browse files
README.md
CHANGED
@@ -131,23 +131,23 @@ We only fine-tuned CodeT5+ across three tasks, and compare it with accuracy of A
|
|
131 |
|
132 |
- GCC
|
133 |
|
134 |
-
|
135 |
-
|
136 |
-
|
137 |
-
|
138 |
-
|
139 |
-
|
140 |
-
|
141 |
|
142 |
- LLVM
|
143 |
|
144 |
-
|
145 |
-
|
146 |
-
|
147 |
-
|
148 |
-
|
149 |
-
|
150 |
-
|
151 |
|
152 |
- `New_Targets/Itr_Expansion/*`: **Take data of RI5CY in LLVM as test set, split train/valid set in the ratio of 85%:15% of CPU targets excluding RISC-V and including RISC-V**
|
153 |
|
|
|
131 |
|
132 |
- GCC
|
133 |
|
134 |
+
| | Stmt. Comp. | Stmt. Comp. | Stmt. Comp. | Stmt. Comp. | Next. Sugg. | Next. Sugg. | Next. Sugg. | Next. Sugg. | Code. Gen. | Code. Gen. | Code. Gen. | Code. Gen. |
|
135 |
+
|------------------ |:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:----------: |:----------: |:----------: |:----------: |
|
136 |
+
| | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) |
|
137 |
+
| Dataset | EM | ED | EM | ED | EM | ED | EM | ED | BLEU4 | ED | BLEU4 | ED |
|
138 |
+
| -w GPU and MPU | 52.45 | 74.57 | 50.56 | 75.52 | 38.26 | 59.21 | 38.33 | 56.31 | 19.94 | 50.27 | 25.47 | 52.6 |
|
139 |
+
| -w/o GPU and MPU | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx |
|
140 |
+
| **Decrease** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** |
|
141 |
|
142 |
- LLVM
|
143 |
|
144 |
+
| | Stmt. Comp. | Stmt. Comp. | Stmt. Comp. | Stmt. Comp. | Next. Sugg. | Next. Sugg. | Next. Sugg. | Next. Sugg. | Code. Gen. | Code. Gen. | Code. Gen. | Code. Gen. |
|
145 |
+
|------------------ |:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:-----------:|:----------: |:----------: |:----------: |:----------: |
|
146 |
+
| | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) | ARC(MPU) | ARC(MPU) | NVPTX(GPU) | NVPTX(GPU) |
|
147 |
+
| Dataset | EM | ED | EM | ED | EM | ED | EM | ED | BLEU4 | ED | BLEU4 | ED |
|
148 |
+
| -w GPU and MPU | 71.34 | 85.98 | 64.45 | 81.53 | 58.68 | 74.57 | 47.81 | 65.5 | 55.38 | 74.41 | 44.33 | 66.36 |
|
149 |
+
| -w/o GPU and MPU | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx | xxx |
|
150 |
+
| **Decrease** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** | **xxx** |
|
151 |
|
152 |
- `New_Targets/Itr_Expansion/*`: **Take data of RI5CY in LLVM as test set, split train/valid set in the ratio of 85%:15% of CPU targets excluding RISC-V and including RISC-V**
|
153 |
|