Replication Operator - Verilog Example. The Verilog replication operator is the open and close brackets {, }. It should be mentioned that these brackets can also be used to do concatenation in Verilog, but that is for another example. The replication operator is used to replicate a group of bits n times. The number in front of the brackets is known as the repetition multiplier. So for example, in {3{2'b01}} 3 is the repetition multiplier and 2'b01 is what will be replicated 3 times.