Title: +038=360.000-OU045T_04-PCD2.m4160 PLS SBC - IO Manual.pdf
Counting signals at input A. Up and down counting selectable by user program.BFilterTo enable signals at input A to be counted, input B must be connected to 24 V (AND gate).Modes x1, x2:Up/down counting mode for 2-phase incremental shaft encoder at inputs A and B.x1Input AInput BClockCounterx2Input AInput BClockCounter6-113PCD3.H100Block diagramCounter FlagInput InterfaceCounter enableSetU+S U BCounterD C POutput InterfaceSet CCO Set CCOCounter Status FlagCCOClockup/downCounter ModeInput filtersSC x1 x2ModeInputsABOperating principleThis can be largely derived from the block diagram. It is only necessary to add some explanation about the counter output circuit:The output of the internal counter is identified as “Counter Flag”. The user has no hardware access to it. This counter flag is set to “1” whenever the counter is loaded or by means of a separate instruction.