Title: +038=360.000-OU045T_04-PCD2.m4160 PLS SBC - IO Manual.pdf
LEDs and connection terminalsBus connectorFPGAPROM on socketOscillatorInput filterRS-422 input4-fold output driversRS-422 outputProtective diods6 LEDsScrew terminals987 A156 A145 A134 A123 /D D /CLK CLK210LED 0: SSI output ‘Clock’ LED 2: SSI input ‘Data’ LED 4: State of output 12 LED 5: State of output 13 LED 6: State of output 14 LED 7: State of output 155-118PCD2.H150Block diagramUser PROMClockCLK/Clock/CLKDataDFPGA/Data/Ds u BOutput 12Output 13A 12A 13(Field Programmable Gate Array)D C POutput 14A 14Output 15A 15Input filter and adaptation 24V to 5VOutput amplifier 5 .to. 32 VDC (Uext)For further details, please refer to manual 26/761 “PCD2.H150 - SSI interface for absolute encoder”.Watchdog: This module cannot be used on the base address 240 (or 496 for the PCD2.M17x), because it would interact with the watchdog, and would cause a malfunction.