Title: +038=360.000-OU045T_04-PCD2.m4160 PLS SBC - IO Manual.pdf
The flag is set to “0” in up-counting mode: when counter value 65,535 is reachedin down-counting mode: when counter value 0 is reachedTo reset a CCO hardware output which had previously been set high by the user program, it is necessary to differentiate between two cases: a) count range between 0…65,535 (normal case) b) count range exceeding 65,535Case a):Resetting the counter flag results in a simultaneous reset of the CCO output.050'000Counter FlagReset EnableCCOThe “Reset-Enable” should be activated before the counter reaches zero.6-114PCD3.H100Case b):If the count range has to extend beyond the value 65,535, “Reset Enable” can be activated later, i.e. between the penultimate and the last time the counter reaches zero. This means that the CCO output is only reset after several passes of the counter. The number of passes is counted by a CPU counter.For example, output CCO should be switched off after 200,000 count signals.0200'000200'0003392655366553665536