'loading registers from unicorn'

def get_regs(self):

    if (options.UNICORN_SYM_REGS_SUPPORT in self.state.options):
        (highest_reg_offset, reg_size) = max(self.state.arch.registers.values())
        symbolic_list = (ctypes.c_uint64 * (highest_reg_offset + reg_size))()
        num_regs = _UC_NATIVE.get_symbolic_registers(self._uc_state, symbolic_list)
        saved_registers = []
        cur_group = None
        last = None
        for i in sorted(symbolic_list[:num_regs]):
            if (cur_group is None):
                cur_group = i
            elif ((i != (last + 1)) or ((cur_group / self.state.arch.bytes) != (i / self.state.arch.bytes))):
                saved_registers.append((cur_group, self.state.registers.load(cur_group, ((last - cur_group) + 1))))
                cur_group = i
            last = i
        if (cur_group is not None):
            saved_registers.append((cur_group, self.state.registers.load(cur_group, ((last - cur_group) + 1))))
    for (r, c) in self._uc_regs.iteritems():
        if (r in self.reg_blacklist):
            continue
        v = self.uc.reg_read(c)
        setattr(self.state.regs, r, v)
    if (self.state.arch.name in ('X86', 'AMD64')):
        if self.jumpkind.startswith('Ijk_Sys'):
            self.state.registers.store('ip_at_syscall', (self.state.regs.ip - 2))
        self.state.regs.cc_dep1 = self.state.se.BVV(self.uc.reg_read(self._uc_const.UC_X86_REG_EFLAGS), self.state.arch.bits)
        self.state.regs.cc_op = ccall.data[self.state.arch.name]['OpTypes']['G_CC_OP_COPY']
        status = self.uc.reg_read(unicorn.x86_const.UC_X86_REG_FPSW)
        c3210 = (status & 18176)
        top = ((status & 14336) >> 11)
        control = self.uc.reg_read(unicorn.x86_const.UC_X86_REG_FPCW)
        rm = ((control & 3072) >> 10)
        self.state.regs.fpround = rm
        self.state.regs.fc3210 = c3210
        self.state.regs.ftop = top
        uc_offset = unicorn.x86_const.UC_X86_REG_FP0
        vex_offset = self.state.arch.registers['fpu_regs'][0]
        vex_tag_offset = (self.state.arch.registers['fpu_tags'][0] + 7)
        tag_word = self.uc.reg_read(unicorn.x86_const.UC_X86_REG_FPTAG)
        for _ in xrange(8):
            if ((tag_word & 3) == 3):
                self.state.registers.store(vex_tag_offset, 0, size=1)
            else:
                self.state.registers.store(vex_tag_offset, 1, size=1)
                (mantissa, exponent) = self.uc.reg_read(uc_offset)
                sign = bool((exponent & 32768))
                exponent = (exponent & 32767)
                if (exponent not in (0, 32767)):
                    exponent = ((exponent - 16383) + 1023)
                    if (exponent <= 0):
                        exponent = 0
                        mantissa = 0
                    elif (exponent >= 2047):
                        exponent = 2047
                        mantissa = 0
                elif (exponent == 0):
                    mantissa = 0
                elif (exponent == 32767):
                    exponent = 2047
                    if (mantissa != 0):
                        mantissa = 65535
                val = (9223372036854775808L if sign else 0)
                val |= (exponent << 52)
                val |= ((mantissa >> 11) & 4503599627370495)
                self.state.registers.store(vex_offset, val, size=8)
            uc_offset += 1
            vex_offset += 8
            tag_word >>= 2
            vex_tag_offset -= 1
    if (options.UNICORN_SYM_REGS_SUPPORT in self.state.options):
        for (o, r) in saved_registers:
            self.state.registers.store(o, r)
