dˌiːdˌiːˈɑːɹ mˈɛmɚɹi kəntɹˈoʊlɚz ɑːɹ sɪɡnˈɪfɪkəntli mˈoːɹ kˈɑːmplᵻkˌeɪɾᵻd wɛn kəmpˈɛɹd tə sˈɪŋɡəl dˈeɪɾɚ ɹˈeɪt kəntɹˈoʊlɚz , bˌʌt ðeɪ ɐlˈaʊ fɔːɹ twˈaɪs ðə dˈeɪɾə təbi tɹænsfˈɜːd wɪðˌaʊt ɪŋkɹˈiːsɪŋ ðə mˈɛmɚɹi sˈɛlz klˈɑːk ɹˈeɪt ɔːɹ bˈʌs wˈɪtθ.
DDR memory controllers are significantly more complicated when compared to single data rate controllers , but they allow for twice the data to be transferred without increasing the memory cell's clock rate or bus width.