ɔnðɪ ˈɛks ˈeɪɾi sˈɪks ˈɑːɹkɪtˌɛktʃɚ, pɹˈaɪɚ tə splˈɪɾɪŋ ðə fˌʌŋkʃənˈælᵻɾi ʌv nˈɔːɹθbɹɪdʒ ænd sˈaʊθbɹɪdʒ bᵻtwˌiːn ðə sˌiːpˌiːjˈuː ænd plˈætfɔːɹm kəntɹˈoʊlɚ hˈʌb pˌiːsˌiːˈeɪtʃ, aɪ slˈæʃ ˈoʊ vˌɜːtʃuːəlᵻzˈeɪʃən wʌz nˌɑːt pɚfˈɔːɹmd baɪ ðə sˌiːpˌiːjˈuː bˌʌt ɪnstˈɛd baɪ ðə tʃˈɪpsɛt.
On the x86 architecture, prior to splitting the functionality of northbridge and southbridge between the CPU and Platform Controller Hub (PCH), I/O virtualization was not performed by the CPU but instead by the chipset.