klˈɑːk ɡˈeɪɾɪŋ, wˌɪtʃ ɪz ɐ pɹɪfˈɜːd skˈiːm fɔːɹ pˈaʊɚ mˈænɪdʒmənt ʌv hˈaɪ pɚfˈoːɹməns dɪzˈaɪnz, kæn kˈɔːz ɹˈæpɪd sˈɜːdʒᵻz ɪn kˈɜːɹənt dᵻmˈændz ʌv mˈækɹoʊblˈɑːks ænd ˈɪŋkɹiːs di slˈæʃ dˌiːtˈiː ɪfˈɛkts.
Clock gating, which is a preferred scheme for power management of high performance designs, can cause rapid surges in current demands of macro-blocks and increase di/dt effects.