def _shift(cpu, value, _type, amount, carry):
assert(cs.arm.ARM_SFT_INVALID < _type <= cs.arm.ARM_SFT_RRX_REG)<EOL>if _type in (cs.arm.ARM_SFT_RRX, cs.arm.ARM_SFT_RRX_REG) and amount != <NUM_LIT:1>:<EOL><INDENT>amount = <NUM_LIT:1><EOL><DEDENT>elif _type in range(cs.arm.ARM_SFT_ASR_REG, cs.arm.ARM_SFT_RRX_REG + <NUM_LIT:1>):<EOL><INDENT>if cpu.mode == cs.CS_MODE_THUMB:<EOL><INDENT>src = amount.read()<EOL><DEDENT>else:<EOL><INDENT>src_reg = cpu.instruction.reg_name(amount).upper()<EOL>src = cpu.regfile.read(src_reg)<EOL><DEDENT>amount = Operators.EXTRACT(src, <NUM_LIT:0>, <NUM_LIT:8>)<EOL><DEDENT>if amount == <NUM_LIT:0>:<EOL><INDENT>return value, carry<EOL><DEDENT>width = cpu.address_bit_size<EOL>if _type in (cs.arm.ARM_SFT_ASR, cs.arm.ARM_SFT_ASR_REG):<EOL><INDENT>return ASR_C(value, amount, width)<EOL><DEDENT>elif _type in (cs.arm.ARM_SFT_LSL, cs.arm.ARM_SFT_LSL_REG):<EOL><INDENT>return LSL_C(value, amount, width)<EOL><DEDENT>elif _type in (cs.arm.ARM_SFT_LSR, cs.arm.ARM_SFT_LSR_REG):<EOL><INDENT>return LSR_C(value, amount, width)<EOL><DEDENT>elif _type in (cs.arm.ARM_SFT_ROR, cs.arm.ARM_SFT_ROR_REG):<EOL><INDENT>return ROR_C(value, amount, width)<EOL><DEDENT>elif _type in (cs.arm.ARM_SFT_RRX, cs.arm.ARM_SFT_RRX_REG):<EOL><INDENT>return RRX_C(value, carry, width)<EOL><DEDENT>raise NotImplementedError("<STR_LIT>")<EOL>
See Shift() and Shift_C() in the ARM manual