@instruction<EOL><INDENT>def SHR(cpu, dest, src):<DEDENT>
OperandSize = dest.size<EOL>count = Operators.ZEXTEND(src.read() & (OperandSize - <NUM_LIT:1>), OperandSize)<EOL>value = dest.read()<EOL>res = dest.write(value >> count)  <EOL>MASK = (<NUM_LIT:1> << OperandSize) - <NUM_LIT:1><EOL>SIGN_MASK = <NUM_LIT:1> << (OperandSize - <NUM_LIT:1>)<EOL>if issymbolic(count):<EOL><INDENT>cpu.CF = Operators.ITE(count != <NUM_LIT:0>,<EOL>((value >> Operators.ZEXTEND(count - <NUM_LIT:1>, OperandSize)) & <NUM_LIT:1>) != <NUM_LIT:0>,<EOL>cpu.CF)<EOL><DEDENT>else:<EOL><INDENT>if count != <NUM_LIT:0>:<EOL><INDENT>cpu.CF = Operators.EXTRACT(value, count - <NUM_LIT:1>, <NUM_LIT:1>) != <NUM_LIT:0><EOL><DEDENT><DEDENT>cpu.ZF = Operators.ITE(count != <NUM_LIT:0>, res == <NUM_LIT:0>, cpu.ZF)<EOL>cpu.SF = Operators.ITE(count != <NUM_LIT:0>, (res & SIGN_MASK) != <NUM_LIT:0>, cpu.SF)<EOL>cpu.OF = Operators.ITE(count != <NUM_LIT:0>, ((value >> (OperandSize - <NUM_LIT:1>)) & <NUM_LIT>) == <NUM_LIT:1>, cpu.OF)<EOL>cpu.PF = Operators.ITE(count != <NUM_LIT:0>, cpu._calculate_parity_flag(res), cpu.PF)<EOL>
Shift logical right.

The shift arithmetic right (SAR) and shift logical right (SHR)
instructions shift the bits of the destination operand to the right
(toward less significant bit locations). For each shift count, the
least significant bit of the destination operand is shifted into the CF
flag, and the most significant bit is either set or cleared depending
on the instruction type. The SHR instruction clears the most
significant bit.

:param cpu: current CPU.
:param dest: destination operand.
:param src: count operand.