@instruction<EOL><INDENT>def PSRLDQ(cpu, dest, src):<DEDENT>
<EOL>temp = Operators.EXTRACT(src.read(), <NUM_LIT:0>, <NUM_LIT:8>)<EOL>temp = Operators.ITEBV(src.size, temp > <NUM_LIT:15>, <NUM_LIT:16>, temp)<EOL>dest.write(dest.read() >> (temp * <NUM_LIT:8>))<EOL>
Packed shift right logical double quadword.

Shifts the destination operand (first operand) to the right by the number
of bytes specified in the count operand (second operand). The empty high-order
bytes are cleared (set to all 0s). If the value specified by the count
operand is greater than 15, the destination operand is set to all 0s.
The destination operand is an XMM register. The count operand is an 8-bit
immediate::

    TEMP  =  SRC;
    if (TEMP > 15) TEMP  =  16;
    DEST  =  DEST >> (temp * 8);

:param cpu: current CPU.
:param dest: destination operand.
:param src: count operand.