def _check_compatible_regs(self, rhs):
list1 = self.qregs + self.cregs<EOL>list2 = rhs.qregs + rhs.cregs<EOL>for element1 in list1:<EOL><INDENT>for element2 in list2:<EOL><INDENT>if element2.name == element1.name:<EOL><INDENT>if element1 != element2:<EOL><INDENT>raise QiskitError("<STR_LIT>")<EOL><DEDENT><DEDENT><DEDENT><DEDENT>
Raise exception if the circuits are defined on incompatible registers