@classmethod<EOL><INDENT>def HWProcess(cls, proc, ctx):<DEDENT>
body = proc.statements<EOL>extraVars = []<EOL>extraVarsSerialized = []<EOL>hasToBeVhdlProcess = arr_any(body,<EOL>lambda x: isinstance(x,<EOL>(IfContainer,<EOL>SwitchContainer,<EOL>WhileContainer,<EOL>WaitStm)))<EOL>sensitivityList = sorted(<EOL>map(lambda s: cls.sensitivityListItem(s, ctx),<EOL>proc.sensitivityList))<EOL>if hasToBeVhdlProcess:<EOL><INDENT>childCtx = ctx.withIndent()<EOL><DEDENT>else:<EOL><INDENT>childCtx = copy(ctx)<EOL><DEDENT>def createTmpVarFn(suggestedName, dtype):<EOL><INDENT>s = RtlSignal(None, None, dtype, virtualOnly=True)<EOL>s.name = ctx.scope.checkedName(suggestedName, s)<EOL>s.hidden = False<EOL>serializedS = cls.SignalItem(s, childCtx, declaration=True)<EOL>extraVars.append(s)<EOL>extraVarsSerialized.append(serializedS)<EOL>return s<EOL><DEDENT>childCtx.createTmpVarFn = createTmpVarFn<EOL>statemets = [cls.asHdl(s, childCtx) for s in body]<EOL>proc.name = ctx.scope.checkedName(proc.name, proc)<EOL>extraVarsInit = []<EOL>for s in extraVars:<EOL><INDENT>if isinstance(s.defVal, RtlSignalBase) or s.defVal.vldMask:<EOL><INDENT>a = Assignment(s.defVal, s, virtualOnly=True)<EOL>extraVarsInit.append(cls.Assignment(a, childCtx))<EOL><DEDENT>else:<EOL><INDENT>assert s.drivers, s<EOL><DEDENT>for d in s.drivers:<EOL><INDENT>extraVarsInit.append(cls.asHdl(d, childCtx))<EOL><DEDENT><DEDENT>_hasToBeVhdlProcess = hasToBeVhdlProcess<EOL>hasToBeVhdlProcess = extraVars or hasToBeVhdlProcess<EOL>if hasToBeVhdlProcess and not _hasToBeVhdlProcess:<EOL><INDENT>oneIndent = getIndent(<NUM_LIT:1>)<EOL>statemets = list(map(lambda x: oneIndent + x, statemets))<EOL><DEDENT>return cls.processTmpl.render(<EOL>indent=getIndent(ctx.indent),<EOL>name=proc.name,<EOL>hasToBeVhdlProcess=hasToBeVhdlProcess,<EOL>extraVars=extraVarsSerialized,<EOL>sensitivityList="<STR_LIT:U+002CU+0020>".join(sensitivityList),<EOL>statements=extraVarsInit + statemets<EOL>)<EOL>
Serialize HWProcess objects as VHDL

:param scope: name scope to prevent name collisions