def run(self, dag):
if dag.width() > self.coupling_map.size():<EOL><INDENT>raise TranspilerError("<STR_LIT>")<EOL><DEDENT>layerlist = list(dag.layers())<EOL>if self.initial_layout is None and self.property_set["<STR_LIT>"]:<EOL><INDENT>self.initial_layout = self.property_set["<STR_LIT>"]<EOL><DEDENT>if self.initial_layout is not None:<EOL><INDENT>virtual_qubits = self.initial_layout.get_virtual_bits()<EOL>self.initial_layout = {(v[<NUM_LIT:0>].name, v[<NUM_LIT:1>]): ('<STR_LIT:q>', self.initial_layout[v]) for v in<EOL>virtual_qubits}<EOL>device_register = QuantumRegister(self.coupling_map.size(), '<STR_LIT:q>')<EOL>initial_layout = {(dag.qregs[k[<NUM_LIT:0>]], k[<NUM_LIT:1>]): (device_register, v[<NUM_LIT:1>])<EOL>for k, v in self.initial_layout.items()}<EOL>circ_qubits = dag.qubits()<EOL>coup_qubits = [(QuantumRegister(self.coupling_map.size(), '<STR_LIT:q>'), wire) for wire in<EOL>self.coupling_map.physical_qubits]<EOL>qubit_subset = []<EOL>for k, v in initial_layout.items():<EOL><INDENT>qubit_subset.append(v)<EOL>if k not in circ_qubits:<EOL><INDENT>raise TranspilerError("<STR_LIT>"<EOL>"<STR_LIT>" % (k[<NUM_LIT:0>].name, k[<NUM_LIT:1>]))<EOL><DEDENT>if v not in coup_qubits:<EOL><INDENT>raise TranspilerError("<STR_LIT>"<EOL>"<STR_LIT>" % (v[<NUM_LIT:0>].name, v[<NUM_LIT:1>]))<EOL><DEDENT><DEDENT><DEDENT>else:<EOL><INDENT>qubit_subset = [(QuantumRegister(self.coupling_map.size(), '<STR_LIT:q>'), wire) for wire in<EOL>self.coupling_map.physical_qubits]<EOL>qubit_subset = qubit_subset[<NUM_LIT:0>:dag.width()]<EOL>initial_layout = {a: b for a, b in zip(dag.qubits(), qubit_subset)}<EOL><DEDENT>layout = initial_layout.copy()<EOL>dagcircuit_output = DAGCircuit()<EOL>dagcircuit_output.name = dag.name<EOL>dagcircuit_output.add_qreg(QuantumRegister(self.coupling_map.size(), "<STR_LIT:q>"))<EOL>for creg in dag.cregs.values():<EOL><INDENT>dagcircuit_output.add_creg(creg)<EOL><DEDENT>identity_wire_map = {}<EOL>q = QuantumRegister(self.coupling_map.size(), '<STR_LIT:q>')<EOL>for j in range(self.coupling_map.size()):<EOL><INDENT>identity_wire_map[(q, j)] = (q, j)<EOL><DEDENT>for creg in dag.cregs.values():<EOL><INDENT>for j in range(creg.size):<EOL><INDENT>identity_wire_map[(creg, j)] = (creg, j)<EOL><DEDENT><DEDENT>first_layer = True  <EOL>for i, layer in enumerate(layerlist):<EOL><INDENT>success_flag, best_circ, best_d, best_layout, trivial_flag= self.layer_permutation(layer["<STR_LIT>"], layout, qubit_subset)<EOL>if not success_flag:<EOL><INDENT>serial_layerlist = list(layer["<STR_LIT>"].serial_layers())<EOL>for j, serial_layer in enumerate(serial_layerlist):<EOL><INDENT>success_flag, best_circ, best_d, best_layout, trivial_flag= self.layer_permutation(serial_layer["<STR_LIT>"], layout, qubit_subset)<EOL>if not success_flag:<EOL><INDENT>raise TranspilerError("<STR_LIT>" +<EOL>"<STR_LIT>" % (i, j))<EOL><DEDENT>if trivial_flag and first_layer:<EOL><INDENT>continue<EOL><DEDENT>layout = best_layout<EOL>dagcircuit_output.compose_back(<EOL>self.swap_mapper_layer_update(j,<EOL>first_layer,<EOL>best_layout,<EOL>best_d,<EOL>best_circ,<EOL>serial_layerlist),<EOL>identity_wire_map)<EOL>if first_layer:<EOL><INDENT>initial_layout = layout<EOL>first_layer = False<EOL><DEDENT><DEDENT><DEDENT>else:<EOL><INDENT>layout = best_layout<EOL>dagcircuit_output.compose_back(<EOL>self.swap_mapper_layer_update(i,<EOL>first_layer,<EOL>best_layout,<EOL>best_d,<EOL>best_circ,<EOL>layerlist),<EOL>identity_wire_map)<EOL>if first_layer:<EOL><INDENT>initial_layout = layout<EOL>first_layer = False<EOL><DEDENT><DEDENT><DEDENT>if first_layer:<EOL><INDENT>layout = initial_layout<EOL>for i, layer in enumerate(layerlist):<EOL><INDENT>dagcircuit_output.compose_back(layer["<STR_LIT>"], layout)<EOL><DEDENT><DEDENT>return dagcircuit_output<EOL>
Map a DAGCircuit onto a CouplingGraph using swap gates.

        Args:
            dag (DAGCircuit): input DAG circuit

        Returns:
            DAGCircuit: object containing a circuit equivalent to
            circuit_graph that respects couplings in coupling_map, and
            a layout dict mapping qubits of circuit_graph into qubits
            of coupling_map. The layout may differ from the initial_layout
            if the first layer of gates cannot be executed on the
            initial_layout.

        Raises:
            TranspilerError: if there was any error during the mapping or with the
                parameters.