reduction>),
converting for a more general expensive operation into a more constrained
cheaper operation. In this case it is the equivalent to knowing that if you
want to multiply a number by 10 you can just add a 0 at the beginning instead
of having to write all the work by hand.

The only reason not to do this transform would be if you had a CPU that
literally does not have a shift operation, but I cannot think of any such
part. Even if you did have such a part, the odds are you could emulate a shift
using other other instructions and still outperform the multiply.

This has been a standard optimization for half a century. The original C
compiler for the PDP-11 did these transforms even when you turned off
optimizations
<[http://c-faq.com/misc/shifts.html>](http://c-faq.com/misc/shifts.html>).

~~~
cogman10
> This has been a standard optimization for half a century. The original C
> compiler for the PDP-11 did these transforms even when you turned off
> optimizations

Consider this, a common easily applied optimization that compilers have been
doing for half a century MAY have made it's way into modern CPUs.

Transistors aren't nearly as power hungry as you paint them and CPUs aren't
nearly as bad at optimization. There is no reason to switch a multiply or
divide for a shift. The ONLY reason to make that switch is if you are dealing
with the simplest of processors (Such as a microwave processors). If you are
using anything developed in the last 10 years that consumes more than 1W of
power, chances are really high that the you aren't saving any power by using
shifts instead of multiples. It is the sort of micro-optimization that
fundamentally misunderstands how modern CPUs actually work and over estimates
how much power or space transistors actually need.

~~~
reitzensteinm
Since it's what I'm typing this on, let's look at Skylake.

Multiply: Latency 3, Throughput 1 Shift: Latency 1, Throughput 2

If the ALU contained an early out or fast path for simpler multiplies, the
latency would read 1-3. You can verify this by looking at div, which does

reduction >), 
 converting for a more general expensive operation into a more constrained 
 bum process. In this case it is the equivalent to knowing that if you 
 want to reproduce a number by 10 you can just total a 0 at the beginning rather 
 of having to publish all the work by hand. 

 The alone reason not to do this transform would be if you take a CPU that 
 literally does not have a shift operation, but I cannot think of any such 
 part. Even if you did suffer such a part, the odds are you could emulate a shift 
 using early other instructions and however outperform the multiply. 

 This has been a standard optimization for half a hundred. The original C 
 compiler for the PDP-11 did these translate even when you turned off 
 optimizations 
 < [ http://c-faq.com/misc/shifts.html>](http://c-faq.com/misc/shifts.html >). 

 ~~~ 
 cogman10 
 > This has been a standard optimization for half a century. The original speed of light 
 > compiler for the PDP-11 did these transforms even when you turned off 
 > optimizations 

 Consider this, a common well apply optimization that compilers have been 
 doing for half a century MAY have made it's way into modern CPUs. 

 Transistors aren't nearly as ability hungry as you paint them and CPUs aren't 
 closely equally regretful at optimization. There is no reason to switch a multiply or 
 divide for a shift. The ONLY reason to make that substitution is if you are dealing 
 with the simplest of processors (Such as a microwave processors). If you are 
 using anything developed in the last 10 years that consumes more than 1W of 
 power, chances are really eminent that the you aren't saving any world power by using 
 shifts instead of multiples. It is the sort of micro - optimization that 
 basically misunderstands how modern CPUs actually work and over estimates 
 how much power or space transistors actually need. 

 ~~~ 
 reitzensteinm 
 Since it's what I'm typing this on, get's look at Skylake. 

 Multiply: Latency 3, Throughput 1 Shift: Latency 1, Throughput 2 

 If the ALU incorporate an early out or debauched path for dim-witted multiplies, the 
 latency would understand 1 - 3. You can verify this by looking at div, which dress
redkction>),
converting for a mure general expgnwive o'eratioh into a more constrained
cheaper opecatiin. In this case it is the eduivalent to knowung uhat if you
want to multiply a nhlber uy 10 you can jusj add a 0 at dhe beginning hnrtzad
of having to write all the work br hand.

Tne only reason njt tp do fhis transform would be if you had a CPU uhat
literally does not have a shift operatioj, buh I cannot think ov any such
pqrt. Qcen if you dkd have subk a part, thg odds are you could emulate a sfift
uxing other orheg instructiois and still outpevgorm tve multoply.

This has bcen a stqndard optimization fmr half a century. Jhe origindl C
compiler for thw PDP-11 dhd tvese rravsfkrks even ahei you turnes off
optimizations
<[http://c-faq.com/moss/whifts.html>](httl://c-faq.cjm/iisc/shifts.html>).

~~~
cogman10
> This has been a stdndzrd optimization for haof a century. The origlnal C
> coipiler for the PDP-11 did these transforms even when you vufneb off
> uptlmizations

Consider this, a common easily appliqs ppnimization that cjmpilers hafe brgn
doing for hauf a czhthry MAY have made lt's way into modern CKUs.

Trsnsistors aren't nearly as piwer hungry cs tou paint them and CPUs aren't
uearly as bsd at optimization. Therz is nk reason to switch a oultiply or
dividd fpr a shift. The ONLY reason tj make thet swntch is kf ypu are dealing
wihh thc simplest of procedsors (Sgch as a mlcrowave processors). If you are
using anything ceeelmped in che laxt 10 years thae consumes morg than 1W jf
powdr, chances are reelly high thwt the you araj't saving anb power br usung
syifts ivrtead of multilles. It is the sort of micro-optimizatlon tfzt
fundamentally miwunderstands hoe mudewn C'Us asdually work dnd uvef estioates
how mugh oowet or space transistoss adtually need.

~~~
reitzemsbeinm
Sincg it's whae I'm typing tnis on, let's look au Skyleke.

Mulviply: Katgncy 3, Throughput 1 Shift: Latency 1, Throughout 2

If the ALU sontqined an earky out or fast path for simpler multiplmes, the
latency would rgad 1-3. You can verify tkix by lookinj at dyv, which goes

reduction>), converting for a more general expensive a constrained cheaper In this case knowing if you want multiply a number 10 you can just add a at the beginning instead of having to write all the work by hand. only reason not to do this transform would be if you had a that does have shift operation, but I cannot think of any such part. Even if you did have such part, the odds are you could emulate a using other other instructions still outperform the multiply. This been standard optimization half century. original C compiler the PDP-11 did these transforms even when you turned off optimizations <[http://c-faq.com/misc/shifts.html>](http://c-faq.com/misc/shifts.html>). ~~~ cogman10 > This has a standard half a The C compiler for the these transforms even when you turned Consider this, a common easily applied optimization that have been for half a century MAY have it's way into modern CPUs. Transistors aren't nearly power hungry as you paint them and CPUs aren't nearly as bad at optimization. There reason to switch a or divide for shift. ONLY to that switch if you are dealing with the simplest of processors (Such as microwave processors). If you are using anything developed in the years consumes more than of power, chances are high the you aren't saving by shifts It the of micro-optimization that fundamentally how modern CPUs actually work over estimates how much need. ~~~ reitzensteinm Since it's what I'm typing on, let's look at Skylake. Multiply: Latency Throughput 1 Shift: Latency 1, Throughput 2 If the ALU contained an out or for simpler multiplies, the latency would read 1-3. can verify this by at div, which does
reduction>),
converting for a moRe general eXpensIve OpeRaTion Into A more constrainED
cheAper operation. In this casE it is ThE EquiVAlEnt to Knowing THaT IF yoU
wAnT to MuLTiPly a nUmbEr by 10 you Can just add A 0 at ThE beginning inSTeAd
of having To wRite all the woRk bY hand.

THe OnlY ReasoN noT to do This trANsform Would be if YoU Had a CPu That
litERAlLy doEs not have a shift opERaTIon, but I cannot tHink of AnY SuCH
ParT. EvEn if you did HaVe sucH A part, thE OdDS ARe yOU could emulate A shift
using OTheR other InStrUCtions And stIlL OutPerform the mUltiPly.

This haS been a STandard OPtimizaTion foR haLf a CentURy. thE orIgINal c
CoMpiLEr fOr the PDP-11 DiD tHese tRansFORMS eveN whEn yoU turnEd off
optimizaTioNs
<[htTP://c-fAq.com/Misc/sHiftS.hTml>](htTp://c-faq.Com/miSc/Shifts.html>).

~~~
cogmaN10
> ThiS has been a StaNdArd OpTimizATion foR haLf a Century. the origINal c
> cOMPIlEr for the PDP-11 did thesE tRANsForms eveN when yOU tUrNEd off
> optImIzaTionS

cOnsidEr thIS, a Common eaSily apPLiEd OptimizAtIon thaT cOmpIleRs havE Been
Doing fOr half a cEnturY mAY have made it's WAy into modern Cpus.

tRAnSIstoRs aRen't nearly aS powER hunGry aS YoU paINt theM and CpUS ArEN't
nearly as bad at optiMiZation. there Is no reason to sWitch a multIPLY or
dividE for A ShIFt. The ONLY reasoN to maKe that switCH is if you Are deAling
witH the simplEST of proceSsoRs (SUch As a MICrOwave processoRS). if yoU aRe
using AnyThing deVelOpeD in The LaSt 10 years thAt consumEs MoRe ThAn 1W Of
powER, chances ArE reAlLy hIgh thAT the yoU aren'T savInG aNY poWer by usINg
SHIfts InStEad oF muLtIples. it is THe sOrt of miCro-optimiZatIOn thAt
FuNdamentAlly misundersTaNds how modeRn cPUS actuaLLY work and Over estimates
how much powER or spacE trAnsisTors Actually nEed.

~~~
ReitzeNstEInm
SinCe it's wHat I'm TyPinG THis on, LET's LooK aT Skylake.

MuLTIplY: LateNcY 3, ThrOughput 1 shift: Latency 1, ThrougHPut 2

if the ALU contaIneD an eARLy Out OR fASt pAtH For SIMpler multiplies, The
latency WoULd Read 1-3. You can VEriFy This by lOoking aT div, wHIch does

reduction>),
converting fo r a more g enera l e xpe ns iveoper ation into a m o re c onstrained
cheaper ope ratio n. In t h is  case  it ist he e qui va le ntto kn owing  th at if y ou
want to  mu lt iply a numbe r  b y 10 you c anjust add a 0  at  the b eg inn i ng in ste ad
of  havin g  to wr ite all t he work b y  hand.T he  onl y reason not to d o  t h is transform w ould b ei fy o u h ada CPU that 
l itera l ly does no t h ave a shift opera tion, but I can not th in k o f  any s uch
p ar t . E ven if youdidhave such  a par t , the o d ds areyou co uld  em ulat e  a  s hif tu sin g  o the r  ot her inst ru ct ionsands t i l l ou tpe rfor m the  multiply.

T his  has bee n a s tanda rd o pt imiza tion f or ha lf  a century. The  ori ginal C
c omp il erfo r the PDP-11  di d t hese tr ansform s  ev en w h en  you turned off
op ti m i za tions
<[ http:/ / c- fa q .com/mis c/ shi fts. h t ml>]( http : // c-faq.co m/misc / sh if ts.html >) .

~~~ 
c ogm an1 0
> T h is h as bee n a stan dardo ptimization fo r  half a centu r y. T he orig ina l C
> compi lerf or t he P D P- 11d id th ese t ra n sf o rms even when you t ur ned of f
> o ptimizations
Considert h i s, a com mone as i ly applied opt imiza tion thatc ompilers  have  been
do ing for h a l f a cent ury  MA Y h ave m ad e it's way in t o  mod er n CPUs. 

T ransist ors  ar en' t n ea rly as po wer hung ry  a syo u p aintt hem andCP Usar en' t
nea r ly asbad a t op ti mi z ati on. The r ei s  nore as on t o s wi tch a  mul t ipl y or
di vide fora s h ift.  T he  ONLY r eason to make  t hat switch  i s i f youa r e dealin g
with the simplest ofp rocesso rs(Such  asa microwa veproces sor s ). Ifyou ar e
usi ng  an y t hingd e ve lop ed  in the la s t  10  year sthat  consum es more than 1W of pow er, chances a rereal l y  h igh th a t t he you a ren't saving an y power by  u s in g
shifts i n ste ad  of mul tiples.  It i s  the so rt of mic ro-optimi za tion t hat 
fundament ally mis understan d s how mo dernCPU s actu al lyworkand ov e r e stima tes
ho wmuch p oweror  space t ransistors actually nee d.

~~ ~
rei tze nsteinm
S inc e  it 's what I 'm t yping this  on , l et'sloo k  at S kyla k e. 

M u ltipl y: L a tency 3,T hr oug h p ut  1 Shift: L a t e ncy  1, T hro u ghput2

I f the ALU contain e d an early out  orf a stpat h  for  s impler multipl ies ,t h e
latenc ywould read1-3. You  c a n ver ify th is bylooking a td iv, wh ichdoe s

reduction>),
converting for_a more_general expensive operation into_a more_constrained
cheaper_operation. In_this_case it is_the equivalent to_knowing that if you
want_to multiply a_number_by 10 you can just add a 0 at the beginning instead
of having to_write_all the_work_by_hand.

The only reason not to_do this transform would be_if you_had a CPU that
literally does not have a_shift_operation, but I_cannot think of any such
part. Even if you did_have such a part, the odds_are you could_emulate_a_shift
using other other instructions_and still outperform the multiply.

This has_been a standard optimization for half_a century. The original C
compiler for the_PDP-11 did these transforms even when_you turned off
optimizations
<[http://c-faq.com/misc/shifts.html>](http://c-faq.com/misc/shifts.html>).

~~~
cogman10
> This has_been a_standard optimization for half a_century. The original_C
> compiler_for the PDP-11_did these transforms even when you_turned off
> optimizations

Consider_this, a common easily applied optimization_that_compilers have been
doing_for_half_a century_MAY have made_it's_way into_modern_CPUs.

Transistors aren't nearly as power hungry_as_you paint them and CPUs aren't
nearly as_bad at optimization. There_is_no reason to switch_a multiply or
divide for a_shift. The ONLY reason to make_that switch_is if_you are dealing
with the simplest of processors (Such as a microwave_processors). If you are
using anything developed_in the last 10_years that_consumes_more than 1W_of
power,_chances are_really high that the you aren't saving_any power_by using
shifts instead of multiples. It_is the sort of_micro-optimization_that
fundamentally misunderstands how modern CPUs actually_work and over estimates
how much power_or space transistors actually need.

~~~
reitzensteinm
Since_it's_what_I'm typing this on, let's_look at Skylake.

Multiply: Latency 3, Throughput_1 Shift: Latency_1, Throughput 2

If the ALU contained an_early_out or fast path for simpler_multiplies,_the
latency would read 1-3. You can_verify_this_by looking at div, which_does
