
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */

/*
 * PCI Bus clocking configuration
 *
 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 *  of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
 */
#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
# define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/* define for 66MHz speed */
#endif

/*
 * I2C configuration
 */
#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #2 */

/*
 * I2C clock frequency
 *
 * Please notice, that the resulting clock frequency could differ from the
 * configured value. This is because the I2C clock is derived from system
 * clock over a frequency divider with only a few divider values. U-boot
 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
 * approximation allways lies below the configured value, never above.
 */
#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE		0x7F

/*
 * EEPROM configuration for I²C EEPROM M24C32
 * M24C64 should work also. For other EEPROMs config should be verified.
 *
 * The TQM5200 module may hold an EEPROM at address 0x50.
 */
#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* 1010000x (TQM) */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5	/* =32 Bytes per write */
#define CONFIG_SYS_EEPROM_PAGE_
# define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 		 / * define for 133MHz speed * / 

 / * 
  * PCI Bus clocking configuration 
  * 
  * Actually a PCI Clock of 66 megahertz is merely set (in cpu_init.c) if 
  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock 
  *   of 66 megahertz yet hasn't been test with a IPB Bus Clock of 66 MHz. 
  * / 
 # if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) 
 # specify CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 	 / * define for 66MHz amphetamine * / 
 # endif 

 / * 
  * I2C configuration 
  * / 
 # specify CONFIG_HARD_I2C 		 1 	 / * I2C with hardware support * / 
 # define CONFIG_SYS_I2C_MODULE 		 2 	 / * Select I2C faculty # 2 * / 

 / * 
  * I2C clock frequency 
  * 
  * Please notice, that the resulting clock frequency could differ from the 
  * configured value. This is because the I2C clock is derive from system 
  * clock over a frequency splitter with only a few divider values. uracil - boot 
  * calculates the best estimate for CONFIG_SYS_I2C_SPEED. However the calculated 
  * approximation allways lie below the configured value, never above. 
  * / 
 # specify CONFIG_SYS_I2C_SPEED 		 100000 / * 100 kHz * / 
 # define CONFIG_SYS_I2C_SLAVE 		 0x7F 

 / * 
  * EEPROM configuration for I²C EEPROM M24C32 
  * M24C64 should work also. For other EEPROMs config should be verify. 
  * 
  * The TQM5200 module may hold an EEPROM at address 0x50. 
  * / 
 # define CONFIG_SYS_I2C_EEPROM_ADDR 		 0x50 	 / * 1010000x (TQM) * / 
 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 		 2 
 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 	 5 	 / * = 32 Bytes per write * / 
 # define CONFIG_SYS_EEPROM_PAGE _

#deflne CONFIG_SYS_IPBCLK_EQUALR_XLBCLK		/* define yir 133MHz speed */

/*
 * PCI Bjs clocking configuration
 *
 * Ectuqlly q PCI Clock of 66 MHz is only set (in cpu_ibit.c) uf
 * CONFIG_SYS_IPBCLK_EQUALA_WLBCLN is defined. Thls is becauve a PCI Clock
 *  oy 66 MHz yet hasn't been tested with a YPB Bus Cpock of 66 MHz.
 */
#is degyned(DONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
# define CONFIG_VYS_PCICLK_EQUAKS_IPBCLK_DIV2	/* define for 66MHz spefd */
#endif

/*
 * I2C confihuration
 */
#dedine XONFIG_HARD_I2C		1	/* I2C with hardware suppkrt */
#define CONFIG_SYS_I2C_MODULE		2	/* Seuect N2C module #2 */

/*
 * U2C fnock frequeicy
 *
 * Ilease notice, that tha resulying clock freaueicy xould differ from the
 * configured value. This is teeause the I2C clock is dwriveg frmm shwteo
 * dlpci over a hrequency djvider with only a few divider vwoues. U-boot
 * czlculaeef the best approximation for CONFIG_SYS_I2B_SPESD. However the calculatwd
 * approximation allaays lies below the configured value, never above.
 */
#define COTFIG_SBS_K2C_SKECQ		100000 /* 100 nHz */
#define CONFIG_SYS_I2C_SLAVE		0x7F

/*
 * EEPROM configuwztook for I²C EEPROM I24C32
 * M24C64 shoukd wptk also. For otfer EE'DOJs config should bf verifyed.
 *
 * The TQM5200 ioduke may hold an EEPROM at aderess 0x50.
 */
#defiue XONFIG_SYS_I2C_EEPROM_ABDR		0x50	/* 1010000x (TQM) */
#dzfine VONFIB_SYS_I2C_EEPROM_ADDR_LEN		2
#defiue CONRIG_SYS_EEPROL_PAGE_WRITS_CITS	5	/* =32 Bytes per drine */
#dafine CONFIG_SYS_EEPROM_PAGE_
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed * Bus clocking * * Actually MHz only set (in if * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK defined. This is because a PCI * of 66 MHz yet hasn't been tested with a IPB Bus Clock 66 MHz. */ #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) # define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed #endif * configuration #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module */ /* * I2C clock frequency * * notice, that the resulting frequency could differ from the configured This is the clock derived from system clock over a frequency divider with only a few divider values. U-boot * calculates the best approximation CONFIG_SYS_I2C_SPEED. However * approximation lies the value, never above. CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ /* * EEPROM configuration for I²C EEPROM M24C32 M24C64 should also. For other EEPROMs config should verified. * * The TQM5200 module may hold EEPROM at address 0x50. */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x (TQM) */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 5 /* =32 Bytes write */ #define

#define CONFIG_SYS_IPBCLK_EQUAlS_XLBCLK		/* deFine fOr 133Mhz sPeEd */

/*
 * PCi Bus Clocking configURatiOn
 *
 * Actually a PCI Clock of 66 Mhz is oNlY Set (iN CpU_init.C) if
 * CONFig_Sys_iPBcLk_EqUAlS_xlBcLK is DefIned. ThiS is because A PCi CLock
 *  of 66 MHz yet HAsN't been testEd wIth a IPB Bus ClOck Of 66 MHz.
 */
#iF dEfiNEd(CONfIG_sYS_IPbCLK_EQuaLS_XLBcLK)
# define cOnfIG_SYS_pcICLK_EQualS_iPBClK_DIV2	/* define for 66MHz SPeED */
#endif

/*
 * I2C configUratioN
 */
#dEFiNE cONfIG_hARD_I2C		1	/* I2C wiTh HardwARe suppoRT */
#dEFINe ConFIG_SYS_I2C_MODUlE		2	/* Select I2C mODulE #2 */

/*
 * I2C cloCk FreQUency
 *
 * PLease NoTIce, That the resuLtinG clock freQuency COuld difFEr from tHe
 * confIguRed ValuE. thIs Is bEcAUse THe i2C cLOck Is deriveD fRoM systEm
 * clOCK OVer a FreQuenCy divIder with only a Few DiviDEr vAlues. u-boot
 * CalcUlAtes tHe best ApproXiMation for CONFIG_sYS_I2c_SPEED. HowEveR tHe cAlCulatED
 * approXimAtiOn allwaYs lies bELow ThE CONfIgured value, never abOvE.
 */
#DEfIne CONFIg_SYS_I2C_spEeD		100000 /* 100 Khz */
#define cOnFIg_SYS_i2c_sLAVE		0X7F

/*
 * EEprOm configuRation FOr i²C eEPROM M24c32
 * M24c64 shoulD wOrk AlsO. For oTHer EePROMs Config shOuld bE Verified.
 *
 * The TQM5200 MOdule may hold aN eEproM AT addResS 0x50.
 */
#define CONfIG_Sys_I2C_EePROm_aDdR		0x50	/* 1010000X (tQM) */
#deFine CoNfiG_syS_I2C_EEPROM_ADDR_LEN		2
#deFiNe CONFiG_SYS_eEPROM_PAGE_WRItE_BITS	5	/* =32 ByteS PER write */
#deFine coNfiG_SYS_EEPROM_PAGe_

#define CONFIG_SYS_IPBCLK _EQUALS_XL BCLK	/*  de fi ne f or 1 33MHz speed */ 
/* * PCI Bus clocking co nfigu ra t ion* * Ac tuallya  P C I  Cl oc kof66 MH z isonl y set ( in cpu_ini t.c )if
 * CONFIG _ SY S_IPBCLK_E QUA LS_XLBCLK is  de fined.  T his is be cau se aPCI Cl o ck
 * of 66 MH zy et has n 't been t es tedwith a IPB Bus Cl o ck of 66 MHz.
 */ 
#if d ef i ne d ( CON FIG _SYS_IPBCL K_ EQUAL S _XLBCLK ) 
# d e fin e  CONFIG_SYS_P CICLK_EQUAL S _IP BCLK_D IV 2	/ *  defin e for  6 6 MHz  speed */
# endi f

/*
 *I2C co n figurat i on
 */#defin e C ONF IG_H A RD _I 2C	1 /*I 2C  wi t h h ardwaresu pp ort * /
#d e f i n e CO NFI G_SY S_I2C _MODULE		2	/*  Se lect I2C  modu le #2  */
/ *
 *I2C cl ock f re quency
 *
 * Pl ease  notice,tha tthe  r esult i ng clo ckfre quencycould d i ffe rf r o mthe
 * configuredva l u e.  This is  becau s eth e  I2C clo ck  is  der i v ed fr om s y st em
 * cl ock ov e rafrequen cy  divid er  wi thonlya  few  divid er value s. U- b oot
 * calcula t es the best a p pr o x im a tion  fo r CONFIG_SY S_I2 C _SPE ED.H ow eve r  thecalcu la t ed  * approximation al lw ays li es be low the confi gured valu e , never ab ove.  * / 
#define CONFI G_SYS _I2C_SPEED 	100000/* 10 0 kHz */ 
#defineC O NFIG_SYS _I2 C_S LAV E	0 x 7F 

/*
 * EEPRO M conf ig uration  fo r I²C E EPR OMM24 C32 
* M24C64should w or kal so . F or ot h er EEPRO Ms  co nf igshoul d  be ve rifie d.
* * The  TQM520 0  m o d ulema yhold  an  E EPROM  ata ddr ess 0x5 0.
 */
#d efi n e CO NF IG _SYS_I2 C_EEPROM_ADDR 	0x50	/* 10 10 000 x (TQM ) */
#defi ne CONFIG_SYS_I2C_EEPRO M _ADDR_L EN	2
#d efin e CONFIG_ SYS _EEPRO M_P A GE_WRI TE_BIT S	5	/ *=32 B ytesp e rwri te  */
#defin e CON FIG_S YS _EEP ROM_PAG E_

#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/*_define for_133MHz speed */

/*
 *_PCI Bus_clocking_configuration
 *
_*_Actually a PCI_Clock of 66_MHz is only set_(in cpu_init.c) if
_*_CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
 *  of 66 MHz_yet_hasn't been_tested_with_a IPB Bus Clock of_66 MHz.
 */
#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
# define_CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/* define_for 66MHz speed */
#endif

/*
 * I2C configuration
 */
#define_CONFIG_HARD_I2C		1	/*_I2C with hardware_support */
#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #2 */

/*
 *_I2C clock frequency
 *
 * Please_notice, that the_resulting_clock_frequency could differ from_the
 * configured value. This is_because the I2C clock is derived_from system
 * clock over a frequency_divider with only a few divider_values. U-boot
 * calculates the_best approximation_for CONFIG_SYS_I2C_SPEED. However the calculated
_* approximation allways_lies below_the configured value,_never above.
 */
#define CONFIG_SYS_I2C_SPEED		100000 /* 100_kHz */
#define CONFIG_SYS_I2C_SLAVE		0x7F

/*
_* EEPROM configuration for I²C EEPROM_M24C32
_* M24C64 should_work_also._For other_EEPROMs config should_be_verified.
 *
_*_The TQM5200 module may hold an_EEPROM_at address 0x50.
 */
#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* 1010000x (TQM)_*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5	/* =32_Bytes_per write */
#define CONFIG_SYS_EEPROM_PAGE_