0x032d) */
#define RT1011_POW_SDB_REG_MASK			(0x1 << 9)
#define RT1011_POW_SDB_REG_BIT		9
#define RT1011_POW_SDB_REG		(0x1 << 9)
#define RT1011_POW_SEL_SDB_MODE_MASK			(0x1 << 6)
#define RT1011_POW_SEL_SDB_MODE_BIT		6
#define RT1011_POW_SEL_SDB_MODE		(0x1 << 6)
#define RT1011_POW_MNL_SDB_MASK			(0x1 << 5)
#define RT1011_POW_MNL_SDB_BIT		5
#define RT1011_POW_MNL_SDB		(0x1 << 5)

/* SPK Protection-Temperature Protection (0x050c) */
#define RT1011_STP_EN_MASK			(0x1 << 15)
#define RT1011_STP_EN_BIT		15
#define RT1011_STP_EN		(0x1 << 15)
#define RT1011_STP_RS_CLB_EN_MASK			(0x1 << 14)
#define RT1011_STP_RS_CLB_EN_BIT		14
#define RT1011_STP_RS_CLB_EN		(0x1 << 14)

/* SPK Protection-Temperature Protection-4 (0x0510) */
#define RT1011_STP_R0_SELECT_MASK			(0x3 << 6)
#define RT1011_STP_R0_SELECT_EFUSE			(0x0 << 6)
#define RT1011_STP_R0_SELECT_START_VAL	(0x1 << 6)
#define RT1011_STP_R0_SELECT_REG			(0x2 << 6)
#define RT1011_STP_R0_SELECT_FORCE_ZERO	(0x3 << 6
0x032d) * / 
 # define RT1011_POW_SDB_REG_MASK 			 (0x1 < < 9) 
 # define RT1011_POW_SDB_REG_BIT 		 9 
 # define RT1011_POW_SDB_REG 		 (0x1 < < 9) 
 # define RT1011_POW_SEL_SDB_MODE_MASK 			 (0x1 < < 6) 
 # define RT1011_POW_SEL_SDB_MODE_BIT 		 6 
 # define RT1011_POW_SEL_SDB_MODE 		 (0x1 < < 6) 
 # specify RT1011_POW_MNL_SDB_MASK 			 (0x1 < < 5) 
 # specify RT1011_POW_MNL_SDB_BIT 		 5 
 # define RT1011_POW_MNL_SDB 		 (0x1 < < 5) 

 / * SPK Protection - Temperature Protection (0x050c) * / 
 # define RT1011_STP_EN_MASK 			 (0x1 < < 15) 
 # define RT1011_STP_EN_BIT 		 15 
 # define RT1011_STP_EN 		 (0x1 < < 15) 
 # specify RT1011_STP_RS_CLB_EN_MASK 			 (0x1 < < 14) 
 # define RT1011_STP_RS_CLB_EN_BIT 		 14 
 # define RT1011_STP_RS_CLB_EN 		 (0x1 < < 14) 

 / * SPK Protection - Temperature Protection-4 (0x0510) * / 
 # specify RT1011_STP_R0_SELECT_MASK 			 (0x3 < < 6) 
 # specify RT1011_STP_R0_SELECT_EFUSE 			 (0x0 < < 6) 
 # define RT1011_STP_R0_SELECT_START_VAL 	 (0x1 < < 6) 
 # specify RT1011_STP_R0_SELECT_REG 			 (0x2 < < 6) 
 # define RT1011_STP_R0_SELECT_FORCE_ZERO 	 (0x3 < < 6
0x032d) */
#fefine RT1011_POW_SDB_REG_MASK			(0x1 << 9)
#define RT1011_POW_SDY_EEG_BIT		9
#vefine DT1011_POW_SDB_FEG		(0x1 << 9)
#define RT1011_POW_SEL_SDB_MODE_LAWK			(0x1 << 6)
#eefine RT1011_POW_SEL_SDB_MODE_CIT		6
#define RT1011_POW_SEO_SDB_NIDE		(0x1 << 6)
#defiis RT1011_POW_MNL_SDB_JWSK			(0x1 << 5)
#define RT1011_POW_MKL_SDB_BIT		5
#defhne RT1011_POW_MNL_SDT		(0x1 << 5)

/* SPK Protection-Temperature Protectijn (0x050c) */
#drflne RT1011_STP_EN_MASH			(0x1 << 15)
#cqfins RT1011_STP_EN_BIT		15
#define RT1011_STP_EN		(0x1 << 15)
#defins RT1011_STP_GS_CLB_EN_MASK			(0x1 << 14)
#defone RT1011_STP_RS_CLB_EN_BIT		14
#define GT1011_STO_RS_CLB_EN		(0x1 << 14)

/* SPK Prltection-Temksraeyre Protectiun-4 (0x0510) */
#defint XT1011_STP_R0_SELECJ_MASK			(0x3 << 6)
#define RT1011_STP_R0_SELECT_EFUSE			(0b0 << 6)
#deyine RT1011_STP_R0_WEOECH_VTART_VAL	(0x1 << 6)
#vefine RT1011_STP_R0_SELECB_GEG			(0x2 << 6)
#dafine RY1011_STP_R0_SELECT_FORGE_ZERM	(0x3 << 6
0x032d) */ #define RT1011_POW_SDB_REG_MASK (0x1 << 9) 9 RT1011_POW_SDB_REG (0x1 9) #define RT1011_POW_SEL_SDB_MODE_MASK 6 RT1011_POW_SEL_SDB_MODE (0x1 << #define RT1011_POW_MNL_SDB_MASK (0x1 5) #define RT1011_POW_MNL_SDB_BIT 5 #define RT1011_POW_MNL_SDB << 5) /* SPK Protection-Temperature Protection (0x050c) */ #define RT1011_STP_EN_MASK (0x1 << 15) RT1011_STP_EN_BIT 15 #define RT1011_STP_EN (0x1 << 15) #define RT1011_STP_RS_CLB_EN_MASK (0x1 << 14) #define 14 RT1011_STP_RS_CLB_EN << /* SPK Protection-Temperature Protection-4 (0x0510) */ #define RT1011_STP_R0_SELECT_MASK (0x3 << 6) #define RT1011_STP_R0_SELECT_EFUSE (0x0 << 6) RT1011_STP_R0_SELECT_START_VAL (0x1 << 6) #define RT1011_STP_R0_SELECT_REG (0x2 << #define RT1011_STP_R0_SELECT_FORCE_ZERO (0x3 <<
0x032d) */
#define RT1011_POW_SDB_REG_MASK			(0x1 << 9)
#dEfine RT1011_POW_sDB_REg_BIt		9
#deFiNe RT1011_pOW_SdB_REG		(0x1 << 9)
#define RT1011_poW_SEl_SDB_MODE_MASK			(0x1 << 6)
#define RT1011_PoW_SEL_sDb_mODE_biT		6
#DefinE RT1011_POW_Sel_Sdb_mODe		(0x1 << 6)
#DeFinE Rt1011_pOw_MNL_SdB_MaSK			(0x1 << 5)
#defIne RT1011_POW_MNl_SDb_BiT		5
#define RT1011_POw_mNl_SDB		(0x1 << 5)

/* SPK PrOteCtion-TemperaTurE ProteCtIon (0X050C) */
#defiNe Rt1011_STP_En_MASK			(0x1 << 15)
#DEfine Rt1011_STP_EN_BIT		15
#DeFIne RT1011_Stp_EN		(0x1 << 15)
#defINE Rt1011_STP_rS_CLB_EN_MASK			(0x1 << 14)
#definE rT1011_stP_RS_CLB_EN_BIT		14
#deFine RT1011_sTp_rS_clb_EN		(0X1 << 14)

/* SPk ProtectioN-TEmperATure ProTEcTION-4 (0x0510) */
#dEFine RT1011_STP_R0_SELeCT_MASK			(0x3 << 6)
#defINe Rt1011_STP_R0_SeLeCT_efUSE			(0x0 << 6)
#dEfine rT1011_stP_R0_sELECT_START_vAL	(0x1 << 6)
#Define RT1011_StP_R0_SELecT_REG			(0x2 << 6)
#dEFine RT1011_StP_R0_SELeCT_fORcE_ZEro	(0x3 << 6
0x032d) */
#define RT1011_ POW_SDB_RE G_MAS K		(0 x1  <<9)
# define RT1011_ P OW_S DB_REG_BIT		9
#defineRT101 1_ P OW_S D B_ REG	(0x1 << 9) # def in eRT1 01 1 _P OW_SE L_S DB_MODE _MASK			(0 x1<<  6)
#defineR T1 011_POW_SE L_S DB_MODE_BIT	6#defin eRT1 0 11_PO W_S EL_SD B_MODE 	(0x1<< 6)
#de fi n e RT10 1 1_POW_M N L _S DB_M ASK			(0x1 << 5)# de f ine RT1011_POW _MNL_S DB _ BI T 	5#de fine RT101 1_ POW_M N L_SDB	( 0x 1 < < 5 ) 

/* SPK Prot ection-Temp e rat ure Pr ot ect i on (0x 050c)  * / 
#d efine RT101 1_ST P_EN_MASK 			(0x 1  << 15) #define  RT101 1_S TP_ EN_B I T	1 5
# de f ine RT 101 1 _ST P_EN		(0 x1  < < 15) 
#de f i n e  RT1 011 _STP _RS_C LB_EN_MASK		(0x 1 << 14) 
#def ine R T101 1_ STP_R S_CLB_ EN_BI T	14
#define RT1 011_ STP_RS_CL B_E N	(0 x1  << 1 4 )

/*SPK  Pr otectio n-Tempe r atu re P r ot ection-4 (0x0510)*/ # de fine RT1 011_ST P _R 0_ S ELECT_MA SK 		(0x3 < < 6)#def i ne  RT1011_ STP_R0 _ SE LE CT_EFUS E		(0x0  < < 6 )
# defin e  RT1 011_ST P_R0_SEL ECT_S T ART_VAL	(0x1 < <  6)
#define R T 10 1 1 _S T P_R0 _SE LECT_REG		(0x2 << 6 )
#d e fi neR T1011 _STP_ R0 _ SE L ECT_FORCE_ZERO	(0x3  < < 6
0x032d) */
#define_RT1011_POW_SDB_REG_MASK			(0x1 <<_9)
#define RT1011_POW_SDB_REG_BIT		9
#define RT1011_POW_SDB_REG		(0x1 <<_9)
#define RT1011_POW_SEL_SDB_MODE_MASK			(0x1_<<_6)
#define RT1011_POW_SEL_SDB_MODE_BIT		6
#define_RT1011_POW_SEL_SDB_MODE		(0x1_<< 6)
#define RT1011_POW_MNL_SDB_MASK			(0x1_<< 5)
#define RT1011_POW_MNL_SDB_BIT		5
#define_RT1011_POW_MNL_SDB		(0x1 << 5)

/* SPK_Protection-Temperature Protection (0x050c)_*/
#define_RT1011_STP_EN_MASK			(0x1 << 15)
#define RT1011_STP_EN_BIT		15
#define RT1011_STP_EN		(0x1 << 15)
#define RT1011_STP_RS_CLB_EN_MASK			(0x1 << 14)
#define RT1011_STP_RS_CLB_EN_BIT		14
#define RT1011_STP_RS_CLB_EN		(0x1 << 14)

/*_SPK_Protection-Temperature Protection-4_(0x0510)_*/
#define_RT1011_STP_R0_SELECT_MASK			(0x3 << 6)
#define RT1011_STP_R0_SELECT_EFUSE			(0x0 <<_6)
#define RT1011_STP_R0_SELECT_START_VAL	(0x1 << 6)
#define RT1011_STP_R0_SELECT_REG			(0x2_<< 6)
#define_RT1011_STP_R0_SELECT_FORCE_ZERO	(0x3 << 6