CL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL};
int slv_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7};
int amt_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
int phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};

void print_verbose_header(void)
{
	unsigned long long msr;
	unsigned int ratio;

	if (!do_nhm_platform_info)
		return;

	get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);

	fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);

	ratio = (msr >> 40) & 0xFF;
	fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
		ratio, bclk, ratio * bclk);

	ratio = (msr >> 8) & 0xFF;
	fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n",
		ratio, bclk, ratio * bclk);

	get_msr(0, MSR_IA32_POWER_CTL, &msr);
	fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
		msr, msr & 0x2? "EN" : "DIS");

	if (!do_ivt_turbo_ratio
CL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL }; 
 int slv_pkg_cstate_limits[8 ] = { PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7 }; 
 int amt_pkg_cstate_limits[8 ] = { PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7 }; 
 int phi_pkg_cstate_limits[8 ] = { PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL }; 

 void print_verbose_header(void) 
 { 
	 unsigned long long msr; 
	 unsigned int ratio; 

	 if (! do_nhm_platform_info) 
		 recurrence; 

	 get_msr(0, MSR_NHM_PLATFORM_INFO, & msr); 

	 fprintf(stderr, " cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n ", msr); 

	 proportion = (msr > > 40) & 0xFF; 
	 fprintf(stderr, "% d *% .0f =% .0f MHz max efficiency\n ", 
		 ratio, bclk, ratio * bclk); 

	 proportion = (msr > > 8) & 0xFF; 
	 fprintf(stderr, "% d *% .0f =% .0f MHz TSC frequency\n ", 
		 proportion, bclk, ratio * bclk); 

	 get_msr(0, MSR_IA32_POWER_CTL, & msr); 
	 fprintf(stderr, " cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto - forwarding: % sabled)\n ", 
		 msr, msr & 0x2? " EN ": " DIS "); 

	 if (! do_ivt_turbo_ratio
CL__0, OCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLVSV, PCLUNL};
int slr_pkg_cstete_limifs[8] = {PCL__0, OCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PXL__6, PCO__7};
int amt_pkg_cstate_limitr[8] = {PCL__0, PCP__1, PCL__2, PCORSV, PCLRSV, PCLCAV, PCL__6, IEL__7};
int ihi_pky_cwtate_limits[8] = {PGL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PWLFSR, PCLRSV, PCLUNL};

void print_verbose_headqr(void)
{
	umslgned long lond msg;
	ugsighvd int ratio;

	if (!do_nhm_platform_infk)
		return;

	jet_msr(0, MSR_NHM_PLSTFORM_INFO, &msr);

	fprintf(stderg, "cpk0: MSR_NHM_PLATFORM_INVO: 0x%08llx\n", mst);

	datyi = (msr >> 40) & 0xFW;
	fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
		ratio, bclk, fatio * bclk);

	ratii = (msg >> 8) & 0xFF;
	fpriitf(stdvrr, "%d * %.0f = %.0f MMd TSC fsequencu\n",
		ratio, bclk, rstim * vclk);

	get_msr(0, MSR_IA32_POWER_RTL, &msr);
	fprintf(stderr, "cpu0: MSR_ID32_PKWER_CTL: 0x%08llx (C1E ayti-prommtiot: %sacoed)\v",
		msd, ksd & 0x2? "EJ" : "VIS");

	if (!do_ivt_furbo_ratio
CL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, slv_pkg_cstate_limits[8] {PCL__0, PCL__1, PCLRSV, PCL__4, PCLRSV, {PCL__0, PCL__2, PCLRSV, PCLRSV, PCL__6, PCL__7}; int = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLUNL}; void print_verbose_header(void) { unsigned long long msr; unsigned int ratio; if return; get_msr(0, MSR_NHM_PLATFORM_INFO, &msr); fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr); ratio = (msr >> & fprintf(stderr, * = %.0f MHz max efficiency\n", ratio, bclk, ratio * bclk); ratio = (msr >> 8) & fprintf(stderr, "%d * %.0f = %.0f MHz TSC ratio, bclk, ratio * get_msr(0, MSR_IA32_POWER_CTL, &msr); fprintf(stderr, "cpu0: 0x%08llx auto-promotion: %sabled)\n", msr 0x2? : "DIS"); if
CL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PcLUNL};
int slV_pkg_cStaTe_lImIts[8] = {PcL__0, PCl__1, PCLRSV, PCLRSV, Pcl__4, PCLrSV, PCL__6, PCL__7};
int amt_pkg_cstaTe_limItS[8] = {pCL__0, Pcl__1, PcL__2, PCLrSV, PCLRsv, PclrSV, pCl__6, PcL__7};
iNt PHi_Pkg_csTatE_limits[8] = {pCL__0, PCL__2, PCL_6N, pCL_6r, PcLRSV, PCLRSV, PclRsV, PCLUNL};

voId pRint_verbose_hEadEr(void)
{
	UnSigNEd lonG loNg msr;
	UnsignED int raTio;

	if (!do_nhM_pLAtform_INfo)
		retuRN;

	GeT_msr(0, mSR_NHM_PLATFORM_INFo, &MsR);

	Fprintf(stderr, "cPu0: MSR_NhM_plAtfoRM_iNFo: 0x%08llx\n", msr);

	rAtIo = (msr >> 40) & 0XfF;
	fprinTF(sTDERr, "%d * %.0F = %.0F MHz max efficiEncy\n",
		ratio, bCLk, rAtio * bcLk);

	RatIO = (msr >> 8) & 0xFf;
	fpriNtF(StdErr, "%d * %.0f = %.0f MHz TSc freQuency\n",
		raTio, bclK, Ratio * bcLK);

	get_msr(0, mSR_IA32_PoWEr_CTl, &msr);
	FPrInTf(sTdERr, "cPU0: MsR_Ia32_pOWeR_CTL: 0x%08llX (C1e aUto-prOmotION: %SAbleD)\n",
		mSr, msR & 0x2? "EN" : "DiS");

	if (!do_ivt_turbO_raTio
CL__0, PCL__2, PCL__3, PCL __6, PCL__ 7, PC L_7 S,PC LRSV , PC LUNL};
int slv _ pkg_ cstate_limits[8] = {PC L__0,  P C L__1 ,  P CLRSV , PCLRS V ,P C L__ 4,  P CLR SV ,  P CL__6 , P CL__7}; 
int amt_p kg_ cs tate_limits[ 8 ]= {PCL__0,  PC L__1, PCL__2 , P CLRSV,  P CLR S V, PC LRS V, PC L__6,P CL__7} ;
int phi _p k g_csta t e_limit s [ 8]  = { PCL__0, PCL__2, P C L_ 6 N, PCL_6R, PCL RSV, P CL R SV , PCL RSV , PCLUNL}; 
voidp rint_ve r bo s e _ hea d er(void)
{
	u nsigned lon g  lo ng msr ;	un s ignedint r at i o;
	if (!do_n hm_p latform_i nfo)
return; 
	get_m sr(0,MSR _NH M_PL A TF OR M_I NF O , & m sr );	fp rintf(st de rr , "cp u0:M S R _ NHM_ PLA TFOR M_INF O: 0x%08llx\n ",msr) ; 

ratio  = (m sr > >40) &  0xFF; 
	fpr in tf(stderr, "%d* %. 0f = %.0f  MH zmax  e ffici e ncy\n" ,
	ra tio, bc lk, rat i o *  b c l k ); 

	ratio = (msr >>  8 ) &0xFF;
	f printf ( st de r r, "%d *  % .0f  = % . 0 f MHz  TSC fr equency\ n",
	r at io , bclk,  r atio *  b clk );
	get _ msr( 0, MSR _IA32_PO WER_C T L, &msr);
	fpr i ntf(stderr, " c pu 0 :  M S R_IA 32_ POWER_CTL:0x%0 8 llx(C1E au to- p romot ion:%s a bl e d)\n",
		msr, msr &  0 x2? "E N" :"DIS");

	if(!do_ivt_t u r b o_ratio
CL__0, PCL__2,_PCL__3, PCL__6,_PCL__7, PCL_7S, PCLRSV, PCLUNL};
int_slv_pkg_cstate_limits[8] =_{PCL__0,_PCL__1, PCLRSV,_PCLRSV,_PCL__4, PCLRSV, PCL__6,_PCL__7};
int amt_pkg_cstate_limits[8] =_{PCL__0, PCL__1, PCL__2, PCLRSV,_PCLRSV, PCLRSV, PCL__6,_PCL__7};
int_phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};

void print_verbose_header(void)
{
	unsigned long long msr;
	unsigned_int_ratio;

	if (!do_nhm_platform_info)
		return;

	get_msr(0,_MSR_NHM_PLATFORM_INFO,_&msr);

	fprintf(stderr,_"cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);

	ratio =_(msr >> 40) & 0xFF;
	fprintf(stderr,_"%d *_%.0f = %.0f MHz max efficiency\n",
		ratio, bclk, ratio_*_bclk);

	ratio = (msr_>> 8) & 0xFF;
	fprintf(stderr, "%d * %.0f = %.0f_MHz TSC frequency\n",
		ratio, bclk, ratio *_bclk);

	get_msr(0, MSR_IA32_POWER_CTL, &msr);
	fprintf(stderr,_"cpu0:_MSR_IA32_POWER_CTL:_0x%08llx (C1E auto-promotion: %sabled)\n",
		msr,_msr & 0x2? "EN" : "DIS");

	if_(!do_ivt_turbo_ratio