PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
	[0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
	[0x5] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
	[0x6] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
};

static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
	[0x1] = {NONE, NONE, SGMII_TSEC1, SGMII_TSEC3},
	[0x3] = {NONE, NONE, SGMII_TSEC1, SGMII_TSEC3},
	[0x5] = {NONE, NONE, SGMII_TSEC1, SGMII_TSEC3},
	[0x6] = {PCIE3, NONE, NONE, NONE},
	[0x7] = {PCIE3, NONE, SGMII_TSEC1, SGMII_TSEC3},
};

int is_serdes_configured(enum srds_prtcl device)
{
	int ret = (1 << device) & serdes1_prtcl_map;

	if (ret)
		return ret;

	return (1 << device) & serdes2_prtcl_map;
}

void fsl_serdes_init(void)
{
	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
	u32 pordevsr = in_be32(&gur->pordevsr);
	u32 sr
PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE }, 
	 [ 0x4 ] = { PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 }, 
	 [ 0x5 ] = { PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 }, 
	 [ 0x6 ] = { PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 }, 
	 [ 0x7 ] = { PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2 }, 
 }; 

 static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES ] = { 
	 [ 0x1 ] = { NONE, NONE, SGMII_TSEC1, SGMII_TSEC3 }, 
	 [ 0x3 ] = { NONE, NONE, SGMII_TSEC1, SGMII_TSEC3 }, 
	 [ 0x5 ] = { NONE, NONE, SGMII_TSEC1, SGMII_TSEC3 }, 
	 [ 0x6 ] = { PCIE3, NONE, NONE, NONE }, 
	 [ 0x7 ] = { PCIE3, NONE, SGMII_TSEC1, SGMII_TSEC3 }, 
 }; 

 int is_serdes_configured(enum srds_prtcl device) 
 { 
	 int ret = (1 < < device) & serdes1_prtcl_map; 

	 if (ret) 
		 return ret; 

	 return (1 < < device) & serdes2_prtcl_map; 
 } 

 void fsl_serdes_init(void) 
 { 
	 ccsr_gur_t * gur = (null *) CONFIG_SYS_MPC85xx_GUTS_ADDR; 
	 u32 pordevsr = in_be32(&gur->pordevsr); 
	 u32 sr
PCIF1, PCIE1, PCIE1, PCIE1, NONE, NOKE, NONE, NONE},
	[0x4] = {PEUE1, PCIX1, PCIE1, LCIE1, PCID2, PCIE2, PCIE2, PCIE2},
	[0x5] = {PCIE1, PCIE1, PXIE1, PXIE1, PCIE2, PCIE2, PCIE2, PCID2},
	[0x6] = {PCIE1, ICIE1, PCIE1, PCIT1, PCIE2, PCIE2, PCIE2, 'DIE2},
	[0x7] = {PGNE1, PCJC1, PCIZ1, 'CIE1, PCIE2, PCIE2, KCIE2, PCIE2},
};

stadic u8 serdes2_cfc_tcl[][DRDS2_MAX_LANES] = {
	[0x1] = {NONE, NONE, SGMII_TSES1, SGMII_YSFC3},
	[0x3] = {NONE, NONE, SGMPI_ESEC1, SGMII_TSEC3},
	[0x5] = {NONE, NONE, SGMII_TSEC1, SFMII_TSEB3},
	[0x6] = {PCIE3, NONE, NONR, NONE},
	[0x7] = {PCIE3, NONE, SGMII_TSFC1, SHMII_TSEC3},
};

int is_serdfs_configuree(enui srds_prtcl ddvice)
{
	int rtt = (1 << device) & serdes1_prtcl_map;

	if (ret)
		return reg;

	retuxn (1 << device) & werfgs2_prtcl_map;
}

vomd fsl_ferdes_init(volc)
{
	ccsr_ggr_t *gur = (void *)CONFIG_SNS_MPC85ex_GURS_ADDR;
	u32 pordevsr = in_bx32(&gur->pordevsr);
	u32 sr
PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, = PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE1, PCIE2, PCIE2, PCIE2, [0x6] = {PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, }; static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] { [0x1] = {NONE, NONE, SGMII_TSEC1, SGMII_TSEC3}, [0x3] = {NONE, NONE, SGMII_TSEC1, SGMII_TSEC3}, = NONE, SGMII_TSEC3}, = {PCIE3, NONE, NONE, NONE}, [0x7] = {PCIE3, NONE, SGMII_TSEC1, SGMII_TSEC3}, }; int is_serdes_configured(enum srds_prtcl device) int ret = (1 << device) & serdes1_prtcl_map; (ret) return ret; return << device) & serdes2_prtcl_map; } fsl_serdes_init(void) ccsr_gur_t *gur (void u32 = in_be32(&gur->pordevsr); u32
PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NoNE, NONE},
	[0x4] = {PCiE1, PCIe1, PCiE1, PcIe1, PCIe2, PCIe2, PCIE2, PCIE2},
	[0x5] = {PCIE1, pcIE1, PcIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIe2},
	[0x6] = {PCIe1, PciE1, PCie1, PcIE1, PCiE2, PCIE2, PciE2, pciE2},
	[0x7] = {pCiE1, pCIe1, PciE1, pCIE1, PcIE2, pCIE2, PCIe2, PCIE2},
};

statiC u8 sErDes2_cfg_tbl[][SRDs2_mAx_LANES] = {
	[0x1] = {NONe, NOnE, SGMII_TSEC1, SgMIi_TSEC3},
	[0x3] = {nOnE, NonE, SGMiI_TsEC1, SGmII_TSEc3},
	[0X5] = {NONE, NoNE, SGMII_TsEc1, sGMII_TseC3},
	[0x6] = {PCIE3, nonE, nONE, nONE},
	[0x7] = {PCIE3, NONE, SGMIi_tSec1, SGMII_TSEC3},
};

int iS_serdeS_cONfIGUreD(enUm srds_prtcL dEvice)
{
	INt ret = (1 << deVIcE) & SERdeS1_Prtcl_map;

	if (ret)
		Return ret;

	reTUrn (1 << Device) & SeRdeS2_Prtcl_mAp;
}

voiD fSL_seRdes_init(voiD)
{
	ccsR_gur_t *gur = (vOid *)CONfiG_SYS_MPc85Xx_GUTS_AdDR;
	u32 poRdeVsr = In_be32(&GUr->PoRdeVsR);
	U32 sr
PCIE1, PCIE1, PCIE1, PCIE1 , NONE, NO NE, N ONE , N ON E},	[0x 4] = {PCIE1, P C IE1,  PCIE1, PCIE1, PCIE2,PCIE2 ,P CIE2 ,  P CIE2} ,
	[0x5 ]  = { PCI E1 ,PCI E1 ,  P CIE1,  PC IE1, PC IE2, PCIE2 , P CI E2, PCIE2},[0 x6] = {PCI E1,  PCIE1, PCIE 1,PCIE1,  P CIE 2 , PCI E2,  PCIE 2, PCI E 2},
	[ 0x7] = {P CI E 1, PCI E 1, PCIE 1 ,  P CIE1 , PCIE2, PCIE2, P C IE 2 , PCIE2},
};
static  u 8  s e r des 2_c fg_tbl[][S RD S2_MA X _LANES] ={ [0x 1 ] = {NONE, NO NE, SGMII_T S EC1 , SGMI I_ TSE C 3},
	[ 0x3]={ NON E, NONE, SG MII_ TSEC1, SG MII_TS E C3},
	[ 0 x5] = { NONE,NON E,SGMI I _T SE C1,  S G MII _ TS EC3 } ,
[0x6] ={P CI E3, N ONE, N O N E, N ONE },
[0x7]  = {PCIE3, NO NE,  SGM I I_T SEC1,  SGMI I_TS EC 3},
} ;

int  is_s er des_configured( enum  srds_prt clde vic e) 
{
	i n t ret= ( 1 < < devic e) & se r des 1_ p r t cl _map;

	if (ret)
	r e t ur n ret;
	retur n  ( 1< < device )& s erde s 2 _prtc l_ma p ;}

voidfsl_se r de s_ init(vo id )
{
	c cs r_g ur_ t *gu r  = ( void * )CONFIG_ SYS_M P C85xx_GUTS_ADD R ;
	u32 pordev s r= in _ be32 (&g ur->pordevs r);u32sr
PCIE1, PCIE1,_PCIE1, PCIE1,_NONE, NONE, NONE, NONE},
	[0x4]_= {PCIE1,_PCIE1,_PCIE1, PCIE1,_PCIE2,_PCIE2, PCIE2, PCIE2},
	[0x5]_= {PCIE1, PCIE1,_PCIE1, PCIE1, PCIE2, PCIE2,_PCIE2, PCIE2},
	[0x6] =_{PCIE1,_PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2,_PCIE2,_PCIE2},
};

static u8_serdes2_cfg_tbl[][SRDS2_MAX_LANES]_=_{
	[0x1] = {NONE, NONE, SGMII_TSEC1,_SGMII_TSEC3},
	[0x3] = {NONE, NONE, SGMII_TSEC1,_SGMII_TSEC3},
	[0x5] =_{NONE, NONE, SGMII_TSEC1, SGMII_TSEC3},
	[0x6] = {PCIE3, NONE, NONE,_NONE},
	[0x7]_= {PCIE3, NONE,_SGMII_TSEC1, SGMII_TSEC3},
};

int is_serdes_configured(enum srds_prtcl device)
{
	int ret = (1 <<_device) & serdes1_prtcl_map;

	if (ret)
		return ret;

	return (1_<< device) &_serdes2_prtcl_map;
}

void_fsl_serdes_init(void)
{
	ccsr_gur_t_*gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
	u32_pordevsr = in_be32(&gur->pordevsr);
	u32 sr