adev)
{
	int r, mqd_size = sizeof(struct v10_compute_mqd);
	struct amdgpu_ring *ring = &adev->mes.ring;

	if (ring->mqd_obj)
		return 0;

	r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
				    AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
				    &ring->mqd_gpu_addr, &ring->mqd_ptr);
	if (r) {
		dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
		return r;
	}

	/* prepare MQD backup */
	adev->mes.mqd_backup = kmalloc(mqd_size, GFP_KERNEL);
	if (!adev->mes.mqd_backup)
		dev_warn(adev->dev,
			 "no memory to create MQD backup for ring %s\n",
			 ring->name);

	return 0;
}

static int mes_v10_1_sw_init(void *handle)
{
	int r;
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	adev->mes.adev = adev;
	adev->mes.funcs = &mes_v10_1_funcs;

	r = mes_v10_1_init_microcode(adev);
	if (r)
		return r;

	r = mes_v10_1_allocate_eop_buf(adev);
	if (r)
		return r;

	r = mes_v10_1_mqd_sw_init(adev);
	if (r)
		return r;

	r = mes_v10_1_ring_init(adev);
	if (r)
		return r;

	r = mes_v10_1_allocate_mem_slots(adev);
	if (r)
		return r;

	return 0;
}

static int mes_v10_1
adev) 
 { 
	 int r, mqd_size = sizeof(struct v10_compute_mqd); 
	 struct amdgpu_ring * ring = & adev->mes.ring; 

	 if (ring->mqd_obj) 
		 return 0; 

	 r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE, 
				     AMDGPU_GEM_DOMAIN_GTT, & ring->mqd_obj, 
				     & ring->mqd_gpu_addr, & ring->mqd_ptr); 
	 if (radius) { 
		 dev_warn(adev->dev, " fail to create ring mqd bo (% d) ", r); 
		 return gas constant; 
	 } 

	 / * prepare MQD backup * / 
	 adev->mes.mqd_backup = kmalloc(mqd_size, GFP_KERNEL); 
	 if (! adev->mes.mqd_backup) 
		 dev_warn(adev->dev, 
			  " no memory to create MQD stand-in for ring% s\n ", 
			  ring->name); 

	 return 0; 
 } 

 inactive int mes_v10_1_sw_init(void * handle) 
 { 
	 int r; 
	 struct amdgpu_device * adev = (struct amdgpu_device *) handle; 

	 adev->mes.adev = adev; 
	 adev->mes.funcs = & mes_v10_1_funcs; 

	 radius = mes_v10_1_init_microcode(adev); 
	 if (r) 
		 return radius; 

	 r = mes_v10_1_allocate_eop_buf(adev); 
	 if (r) 
		 return r; 

	 r = mes_v10_1_mqd_sw_init(adev); 
	 if (roentgen) 
		 return r; 

	 r = mes_v10_1_ring_init(adev); 
	 if (radius) 
		 return r; 

	 r = mes_v10_1_allocate_mem_slots(adev); 
	 if (roentgen) 
		 return r; 

	 return 0; 
 } 

 static int mes_v10_1
adeg)
{
	int r, mqd_size = sizeof(stvuct v10_compute_mqd);
	struct emdgpu_rjng *ring = &adev->mes.ring;

	if (ring->mqd_obj)
		revurn 0;

	r = andgpu_bo_create_kernel(adex, mqd_size, PAGE_SIZW,
				    QMDGPU_GEM_DOMAIN_GTT, &ring->msf_obj,
				    &ring->mqd_gpu_acdr, &ring->mqg_ptr);
	if (r) {
		dev_wasn(xdzv->dev, "failed to create ring mqd bo (%d)", r);
		returm g;
	}

	/* prepare MQD facklp */
	adeb->mes.mqd_backup = kmalloc(mqd_size, GFP_KSRNEL);
	if (!adev->mes.mqd_bavkup)
		dev_warn(adev->dev,
			 "no memogy tl create MQD backuo for ring %w\n",
			 rybg->name);

	return 0;
}

static inu kes_v10_1_sw_init(boid *handle)
{
	int r;
	struct amdgpu_dexice *cdev = (strucj zmfcpu_device *)hendle;

	aqev->mes.adev = adev;
	adev->kes.funcx = &mes_v10_1_funcs;

	r = mev_v10_1_ibit_microcode(adev);
	if (r)
		rxturn r;

	r = mes_v10_1_allocaje_eop_buf(adav);
	nf (r)
		return r;

	r = mes_v10_1_mqe_sq_init(ddev);
	hf (r)
		fwtufn d;

	r = jes_v10_1_rijg_iiit(adev);
	if (r)
		deturn r;

	r = nes_v10_1_allocate_mem_slotx(aqvf);
	if (r)
		return d;

	returg 0;
}

ftatic int mes_v10_1
adev) { int r, mqd_size = sizeof(struct amdgpu_ring = &adev->mes.ring; (ring->mqd_obj) return 0; AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_gpu_addr, &ring->mqd_ptr); if { dev_warn(adev->dev, "failed create ring mqd bo (%d)", r); r; } /* prepare MQD backup */ adev->mes.mqd_backup = kmalloc(mqd_size, GFP_KERNEL); if (!adev->mes.mqd_backup) "no memory to create MQD backup for ring %s\n", ring->name); return 0; } int *handle) int struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev->mes.adev = adev; adev->mes.funcs = &mes_v10_1_funcs; r = mes_v10_1_init_microcode(adev); (r) return r; r = mes_v10_1_allocate_eop_buf(adev); if (r) r; r = mes_v10_1_mqd_sw_init(adev); (r) return r; r = if return r; = if return r; return } static int mes_v10_1
adev)
{
	int r, mqd_size = sizeof(struCt v10_compute_Mqd);
	stRucT amDgPu_riNg *riNg = &adev->mes.ring;

	iF (Ring->Mqd_obj)
		return 0;

	r = amdgpu_bo_cReate_KeRNel(aDEv, Mqd_siZe, PAGE_SizE,
				    amdGPu_GeM_dOMaIn_gTt, &ring->Mqd_Obj,
				    &ring->Mqd_gpu_addr, &RinG->mQd_ptr);
	if (r) {
		dev_wARn(Adev->dev, "faiLed To create ring Mqd Bo (%d)", r);
		reTuRn r;
	}

	/* PReparE MQd backUp */
	adev->MEs.mqd_bAckup = kmalLoC(Mqd_sizE, gFP_KERNel);
	If (!Adev->Mes.mqd_backup)
		dev_waRN(aDEv->dev,
			 "no memory tO creatE Mqd bACKup For Ring %s\n",
			 ring->NaMe);

	retURn 0;
}

statiC InT MES_v10_1_sW_Init(void *handlE)
{
	int r;
	struct AMdgPu_deviCe *AdeV = (Struct AmdgpU_dEVicE *)handle;

	adev->Mes.aDev = adev;
	adEv->mes.fUNcs = &mes_v10_1_FUncs;

	r = meS_v10_1_init_MicRocOde(aDEv);
	If (R)
		reTuRN r;

	r = MEs_V10_1_alLOcaTe_eop_buf(AdEv);
	If (r)
		reTurn R;

	R = MES_v10_1_mqD_sw_Init(Adev);
	iF (r)
		return r;

	r = mes_V10_1_riNg_inIT(adEv);
	if (r)
		ReturN r;

	r = mEs_V10_1_alloCate_meM_slotS(aDev);
	if (r)
		return r;

	reTurn 0;
}

Static int Mes_V10_1
adev)
{
	int r, mqd_size =  sizeof(st ructv10 _co mp ute_ mqd) ;
	struct amdg p u_ri ng *ring = &adev->mes. ring; 
if ( r in g->mq d_obj)	r e t urn  0 ;
	r  = am dgpu_ bo_ create_ kernel(ade v,mq d_size, PAGE _ SI ZE,
				   A MDGPU_GEM_DO MAI N_GTT,  & rin g ->mqd _ob j,
			   & ring-> mqd_gpu_a dd r , &rin g ->mqd_p t r ); 
	if  (r) {
		dev_warn ( ad e v->dev, "faile d to c re a te r ing  mq d bo (%d)" ,r);
returnr ;} 
	/ *  prepare MQDbackup */
a dev ->mes. mq d_b a ckup =  kmal lo c (mq d_size, GFP _KER NEL);
	if  (!ade v ->mes.m q d_backu p)
		d ev_ war n(ad e v- >d ev, 
	 " n omem o ryto creat eMQ D bac kupf o r ring  %s \n", 
			ring->name);
	r etur n  0; 
}

s tatic  int  m es_v1 0_1_sw _init (v oid *handle)
{	int  r;
	stru ctam dgp u_ devic e  *adev  =(st ruct am dgpu_de v ice  * ) h a nd le;

	adev->mes.ad ev =  a dev;
	ad ev->me s .f un c s = &mes _v 10_ 1_fu n c s;

r =m es _v10_1_i nit_mi c ro co de(adev ); 
	if ( r) 
	ret urn r ; 

	r  = mes _v10_1_a lloca t e_eop_buf(adev ) ;
	if (r)
		r e tu r n  r ; 

	r  =mes_v10_1_m qd_s w _ini t(ad e v) ;
i f (r) 
		re tu r nr ;

	r = mes_v10_1_r in g_init (adev );
	if (r)
	return r;r  = mes_v 10_1 _ al l ocate_mem_slot s(ade v);
	if (r ) 
		retur n r;
	return  0;
}

st a t ic int m es_ v10 _1
adev)
{
	int r,_mqd_size =_sizeof(struct v10_compute_mqd);
	struct amdgpu_ring *ring_= &adev->mes.ring;

	if_(ring->mqd_obj)
		return_0;

	r =_amdgpu_bo_create_kernel(adev,_mqd_size, PAGE_SIZE,
				 _  AMDGPU_GEM_DOMAIN_GTT,_&ring->mqd_obj,
				   _&ring->mqd_gpu_addr, &ring->mqd_ptr);
	if (r)_{
		dev_warn(adev->dev,_"failed to create ring mqd bo (%d)", r);
		return r;
	}

	/* prepare MQD backup */
	adev->mes.mqd_backup =_kmalloc(mqd_size,_GFP_KERNEL);
	if (!adev->mes.mqd_backup)
		dev_warn(adev->dev,
			_"no_memory_to create MQD backup for_ring %s\n",
			 ring->name);

	return 0;
}

static int_mes_v10_1_sw_init(void *handle)
{
	int_r;
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	adev->mes.adev =_adev;
	adev->mes.funcs_= &mes_v10_1_funcs;

	r =_mes_v10_1_init_microcode(adev);
	if (r)
		return r;

	r = mes_v10_1_allocate_eop_buf(adev);
	if (r)
		return r;

	r = mes_v10_1_mqd_sw_init(adev);
	if_(r)
		return r;

	r = mes_v10_1_ring_init(adev);
	if (r)
		return r;

	r_= mes_v10_1_allocate_mem_slots(adev);
	if (r)
		return_r;

	return_0;
}

static_int mes_v10_1