define GPIO_PA11D_PARC_PCDATA2    (1u << 11)
#define PIN_PA12D_PARC_PCDATA3            12  /**< \brief PARC signal: PCDATA3 on PA12 mux D */
#define MUX_PA12D_PARC_PCDATA3             3
#define PINMUX_PA12D_PARC_PCDATA3  ((PIN_PA12D_PARC_PCDATA3 << 16) | MUX_PA12D_PARC_PCDATA3)
#define GPIO_PA12D_PARC_PCDATA3    (1u << 12)
#define PIN_PA13D_PARC_PCDATA4            13  /**< \brief PARC signal: PCDATA4 on PA13 mux D */
#define MUX_PA13D_PARC_PCDATA4             3
#define PINMUX_PA13D_PARC_PCDATA4  ((PIN_PA13D_PARC_PCDATA4 << 16) | MUX_PA13D_PARC_PCDATA4)
#define GPIO_PA13D_PARC_PCDATA4    (1u << 13)
#define PIN_PA14D_PARC_PCDATA5            14  /**< \brief PARC signal: PCDATA5 on PA14 mux D */
#define MUX_PA14D_PARC_PCDATA5             3
#define PINMUX_PA14D_PARC_PCDATA5  ((PIN_PA14D_PARC_PCDATA5 << 16) | MUX_PA14D_PARC_PCDATA5)
#define GPIO_PA14D_PARC_PCDATA5    (1u << 14)
#define PIN_PA15D_PARC_PCDATA6            15  /**< \brief PARC signal: PCDATA6 on PA15 mux D */
#define MUX_PA15D_PARC_PCDATA6             3
#define PINMUX_PA15D_PARC_PCDATA6  ((PIN_PA15D_PARC_PCDATA6 << 16) | MUX_PA15D_PARC_PCDATA6
define GPIO_PA11D_PARC_PCDATA2     (1u < < 11) 
 # define PIN_PA12D_PARC_PCDATA3             12   / * * < \brief PARC signal: PCDATA3 on PA12 mux D * / 
 # define MUX_PA12D_PARC_PCDATA3              3 
 # define PINMUX_PA12D_PARC_PCDATA3   (( PIN_PA12D_PARC_PCDATA3 < < 16) | MUX_PA12D_PARC_PCDATA3) 
 # specify GPIO_PA12D_PARC_PCDATA3     (1u < < 12) 
 # specify PIN_PA13D_PARC_PCDATA4             13   / * * < \brief PARC signal: PCDATA4 on PA13 mux D * / 
 # define MUX_PA13D_PARC_PCDATA4              3 
 # define PINMUX_PA13D_PARC_PCDATA4   (( PIN_PA13D_PARC_PCDATA4 < < 16) | MUX_PA13D_PARC_PCDATA4) 
 # define GPIO_PA13D_PARC_PCDATA4     (1u < < 13) 
 # specify PIN_PA14D_PARC_PCDATA5             14   / * * < \brief PARC signal: PCDATA5 on PA14 mux D * / 
 # define MUX_PA14D_PARC_PCDATA5              3 
 # define PINMUX_PA14D_PARC_PCDATA5   (( PIN_PA14D_PARC_PCDATA5 < < 16) | MUX_PA14D_PARC_PCDATA5) 
 # define GPIO_PA14D_PARC_PCDATA5     (1u < < 14) 
 # specify PIN_PA15D_PARC_PCDATA6             15   / * * < \brief PARC signal: PCDATA6 on PA15 mux D * / 
 # specify MUX_PA15D_PARC_PCDATA6              3 
 # define PINMUX_PA15D_PARC_PCDATA6   (( PIN_PA15D_PARC_PCDATA6 < < 16) | MUX_PA15D_PARC_PCDATA6
deflne GPIO_PA11D_PARC_PCDATA2    (1u << 11)
#define PIN_PC12E_PARC_PRDATA3            12  /**< \brief PARC signal: PCDATE3 on PA12 myx D */
#define MUX_PA12D_PARC_OCDATA3             3
#dehine PINMUX_PA12D_PACD_PCDATA3  ((PIN_PZ12F_PARE_PRDATA3 << 16) | MUX_PA12D_KARC_PCDATA3)
#dexine GPIO_PA12D_PASC_OCBATA3    (1u << 12)
#define PIN_PA13D_PARC_PCDATA4            13  /**< \brief PARC sigmwl: PDDATA4 on PA13 mux D */
#define MUX_PA13D_PARD_PCDATA4             3
#cefine PINMUX_PA13D_PARC_PCDATA4  ((PIJ_PA13D_PARC_PCDATA4 << 16) | LUX_PA13D_PARC_PXDATW4)
#eefine GPIO_PX13D_PARC_PCDAUA4    (1u << 13)
#defjne PIN_PA14D_PARC_PCDATA5            14  /**< \bxief PARC sugbal: KCDATA5 on PA14 mux Q */
#define MUX_IS14D_PARC_[CDATA5             3
#denine 'INMYX_PA14D_PARC_PCDATA5  ((PIN_PE14D_PARC_PCDATA5 << 16) | MUX_PW14D_PARC_PCDDTC5)
#define GPIO_PA14D_PARC_PCEARA5    (1u << 14)
#gefivw PKN_PZ15D_'ARD_PCDATW6            15  /**< \brief PAEC signal: PCDATA6 on PW15 mux D */
#define MUX_PA15Q_PWRC_PCDATA6             3
#define PINMUX_PA15D_PDRC_LCDATA6  ((PIN_PA15D_PARC_PCDATQ6 << 16) | MUX_PA15D_PARC_PCDATA6
define GPIO_PA11D_PARC_PCDATA2 (1u << 11) #define PIN_PA12D_PARC_PCDATA3 \brief signal: PCDATA3 PA12 mux D PINMUX_PA12D_PARC_PCDATA3 << 16) | #define GPIO_PA12D_PARC_PCDATA3 (1u 12) #define PIN_PA13D_PARC_PCDATA4 13 /**< \brief signal: PCDATA4 on PA13 mux D */ #define MUX_PA13D_PARC_PCDATA4 3 #define PINMUX_PA13D_PARC_PCDATA4 ((PIN_PA13D_PARC_PCDATA4 16) | MUX_PA13D_PARC_PCDATA4) #define GPIO_PA13D_PARC_PCDATA4 (1u << 13) #define PIN_PA14D_PARC_PCDATA5 14 /**< \brief signal: on mux */ #define MUX_PA14D_PARC_PCDATA5 3 #define PINMUX_PA14D_PARC_PCDATA5 ((PIN_PA14D_PARC_PCDATA5 << 16) | MUX_PA14D_PARC_PCDATA5) #define GPIO_PA14D_PARC_PCDATA5 (1u << 14) PIN_PA15D_PARC_PCDATA6 15 /**< \brief PARC signal: PCDATA6 on mux D */ #define 3 #define PINMUX_PA15D_PARC_PCDATA6 ((PIN_PA15D_PARC_PCDATA6 << |
define GPIO_PA11D_PARC_PCDATA2    (1u << 11)
#dEfine PIN_PA12d_PARC_pCDaTA3            12  /**< \BrIef PaRC sIgnal: PCDATA3 on Pa12 Mux D */
#Define MUX_PA12D_PARC_PCDATA3             3
#DefinE PinMUX_pa12D_pARC_PcDATA3  ((PIn_pA12d_paRC_pCdAtA3 << 16) | MuX_pa12D_pARC_PcDAtA3)
#definE GPIO_PA12D_PArC_PcDaTA3    (1u << 12)
#define PIn_pA13d_PARC_PCDATa4            13  /**< \brIef PARC signaL: PCdATA4 on pA13 Mux d */
#DefinE MUx_PA13D_PaRC_PCDatA4             3
#defiNe PINMUX_Pa13D_paRC_PCDatA4  ((PIN_PA13d_paRc_PCDaTA4 << 16) | MUX_PA13D_PARC_PCDAta4)
#dEFine GPIO_PA13D_PARc_PCDATa4    (1u << 13)
#DEfINE PIn_PA14d_PARC_PCDATa5            14  /**< \bRief ParC signaL: pCdata5 on pa14 mux D */
#define MUx_PA14D_PARC_PCDatA5             3
#dEfine PiNmUX_pa14D_PARC_pCDATa5  ((Pin_PA14d_PARC_PCDATA5 << 16) | mUX_Pa14D_PARC_PCDaTA5)
#defINe GPIO_Pa14d_PARC_PCdATA5    (1u << 14)
#dEfiNe PiN_PA15d_pArC_pCDaTa6            15  /**< \BriEF PaRC SIgnAl: PCDATA6 On pA15 Mux D */
#dEfinE mux_pA15D_PaRC_pCDAtA6             3
#defIne PINMUX_PA15D_PaRC_pCDAta6  ((PIn_PA15D_PaRC_PCdATA6 << 16) | mUx_PA15D_PaRC_PCDaTA6
define GPIO_PA11D_PARC_PCD ATA2    (1 u <<11) 
# de fine  PIN _PA12D_PARC_PC D ATA3             12  /**< \ brief  P A RC s i gn al: P CDATA3o nP A 12mu xD * /#d efine  MU X_PA12D _PARC_PCDA TA3             3 
# define PIN MUX _PA12D_PARC_ PCD ATA3 (( PIN _ PA12D _PA RC_PC DATA3< < 16)| MUX_PA1 2D _ PARC_P C DATA3)# de fine  GPIO_PA12D_PARC_ P CD A TA3    (1u <<12)
# de f in e PIN _PA 13D_PARC_P CD ATA4       1 3  /* * < \brief PARC  signal: PC D ATA 4 on P A1 3 m u x D */ 
#de fi n e M UX_PA13D_PA RC_P CDATA4          3
# d efine P INMUX_ PA1 3D_ PARC _ PC DA TA4  ( (PI N _P A13 D _PA RC_PCDAT A4  < < 16)  | M U X _ P A13D _PA RC_P CDATA 4)
#define G PIO _PA1 3 D_P ARC_P CDATA 4   ( 1u <<  13)
#defi ne  PIN_PA14D_PARC _PCD ATA5         1 4 /**< \brief  PA RCsignal:  PCDATA 5  on  P A 1 4  m ux D */
#define M UX _ P A1 4D_PARC_ PCDATA 5          3
#d efin e PINMU X_PA 1 4D _PARC_PC DATA5(( PI N_PA14D _P ARC_PC DA TA5  <<  16)|  MUX _PA14D _PARC_PC DATA5 ) 
#define GPIO _ PA14D_PARC_PC D AT A 5   (1u  <<  14)
#defi ne P I N_PA 15D_ P AR C_P C DATA6        15  /**< \brief PA RC  signa l: PC DATA6 on PA15  mux D */# d efine MU X_PA 1 5D _ PARC_PCDATA6           3
# d efine PI NMUX_ PA15D_PA RC_PCDATA 6  ((PIN_P A15 D_P ARC _PC D A TA 6 << 16) | MU X _ PA15 D_ PARC_PC DAT A6
define GPIO_PA11D_PARC_PCDATA2_ _ (1u << 11)
#define_PIN_PA12D_PARC_PCDATA3 __ __  _  _12  /**< \brief_PARC signal: PCDATA3_on_PA12 mux D */
#define MUX_PA12D_PARC_PCDATA3         __ _3
#define_PINMUX_PA12D_PARC_PCDATA3_ ((PIN_PA12D_PARC_PCDATA3 << 16) |_MUX_PA12D_PARC_PCDATA3)
#define GPIO_PA12D_PARC_PCDATA3   _(1u <<_12)
#define PIN_PA13D_PARC_PCDATA4      __  _ 13  /**< \brief PARC signal: PCDATA4 on_PA13 mux D */
#define MUX_PA13D_PARC_PCDATA4 _  ___   _  3
#define PINMUX_PA13D_PARC_PCDATA4  ((PIN_PA13D_PARC_PCDATA4_<< 16) | MUX_PA13D_PARC_PCDATA4)
#define GPIO_PA13D_PARC_PCDATA4 _  (1u << 13)
#define PIN_PA14D_PARC_PCDATA5 _     _    14_ /**<_\brief PARC signal: PCDATA5 on_PA14 mux D_*/
#define MUX_PA14D_PARC_PCDATA5_  _     _  _3
#define PINMUX_PA14D_PARC_PCDATA5  ((PIN_PA14D_PARC_PCDATA5 << 16)_|_MUX_PA14D_PARC_PCDATA5)
#define GPIO_PA14D_PARC_PCDATA5 ___(1u <<_14)
#define PIN_PA15D_PARC_PCDATA6 __ __     _15_ /**< \brief PARC signal: PCDATA6 on_PA15 mux D */
#define_MUX_PA15D_PARC_PCDATA6_   _    _   3
#define PINMUX_PA15D_PARC_PCDATA6 _((PIN_PA15D_PARC_PCDATA6 <<_16) |_MUX_PA15D_PARC_PCDATA6