_BASE + 0x2)
#define TCG_INVALID_RESPONSE            (TPM_RET_BASE + 0x3)
#define TCG_INVALID_ACCESS_REQUEST      (TPM_RET_BASE + 0x4)
#define TCG_FIRMWARE_ERROR              (TPM_RET_BASE + 0x5)
#define TCG_INTEGRITY_CHECK_FAILED      (TPM_RET_BASE + 0x6)
#define TCG_INVALID_DEVICE_ID           (TPM_RET_BASE + 0x7)
#define TCG_INVALID_VENDOR_ID           (TPM_RET_BASE + 0x8)
#define TCG_UNABLE_TO_OPEN              (TPM_RET_BASE + 0x9)
#define TCG_UNABLE_TO_CLOSE             (TPM_RET_BASE + 0xa)
#define TCG_RESPONSE_TIMEOUT            (TPM_RET_BASE + 0xb)
#define TCG_INVALID_COM_REQUEST         (TPM_RET_BASE + 0xc)
#define TCG_INVALID_ADR_REQUEST         (TPM_RET_BASE + 0xd)
#define TCG_WRITE_BYTE_ERROR            (TPM_RET_BASE + 0xe)
#define TCG_READ_BYTE_ERROR             (TPM_RET_BASE + 0xf)
#define TCG_BLOCK_WRITE_TIMEOUT         (TPM_RET_BASE + 0x10)
#define TCG_CHAR_WRITE_TIMEOUT          (TPM_RET_BASE + 0x11)
#define TCG_CHAR_READ_TIMEOUT           (TPM_RET_BASE + 0x12)
#define TCG_BLOCK_READ_TIMEOUT          (TPM_RET_BASE + 0x13)
#define TCG_TRANSFER_ABORT              (TPM_RET_BASE + 0x14)
#define TCG_INVALID_DRV_FUNCTION        (TPM_RET_BASE + 0x15)
#define TCG_OUTPUT_BUFFER_TOO_SHORT     (TPM_RET_BASE + 0x16)
#define TCG_F
_ BASE + 0x2) 
 # define TCG_INVALID_RESPONSE             (TPM_RET_BASE + 0x3) 
 # define TCG_INVALID_ACCESS_REQUEST       (TPM_RET_BASE + 0x4) 
 # define TCG_FIRMWARE_ERROR               (TPM_RET_BASE + 0x5) 
 # define TCG_INTEGRITY_CHECK_FAILED       (TPM_RET_BASE + 0x6) 
 # specify TCG_INVALID_DEVICE_ID            (TPM_RET_BASE + 0x7) 
 # specify TCG_INVALID_VENDOR_ID            (TPM_RET_BASE + 0x8) 
 # define TCG_UNABLE_TO_OPEN               (TPM_RET_BASE + 0x9) 
 # define TCG_UNABLE_TO_CLOSE              (TPM_RET_BASE + 0xa) 
 # define TCG_RESPONSE_TIMEOUT             (TPM_RET_BASE + 0xb) 
 # specify TCG_INVALID_COM_REQUEST          (TPM_RET_BASE + 0xc) 
 # define TCG_INVALID_ADR_REQUEST          (TPM_RET_BASE + 0xd) 
 # define TCG_WRITE_BYTE_ERROR             (TPM_RET_BASE + 0xe) 
 # specify TCG_READ_BYTE_ERROR              (TPM_RET_BASE + 0xf) 
 # define TCG_BLOCK_WRITE_TIMEOUT          (TPM_RET_BASE + 0x10) 
 # specify TCG_CHAR_WRITE_TIMEOUT           (TPM_RET_BASE + 0x11) 
 # define TCG_CHAR_READ_TIMEOUT            (TPM_RET_BASE + 0x12) 
 # specify TCG_BLOCK_READ_TIMEOUT           (TPM_RET_BASE + 0x13) 
 # define TCG_TRANSFER_ABORT               (TPM_RET_BASE + 0x14) 
 # define TCG_INVALID_DRV_FUNCTION         (TPM_RET_BASE + 0x15) 
 # specify TCG_OUTPUT_BUFFER_TOO_SHORT      (TPM_RET_BASE + 0x16) 
 # define TCG_F
_BASF + 0x2)
#define TCG_INVALID_RESKONSE            (JPN_RET_BAVE + 0x3)
#dsfine TCE_INVALID_ACCESS_REQUEST      (T'M_RER_BASE + 0x4)
#define TCG_FIRMWARE_EFROR              (TPM_CET_BASE + 0x5)
#define TCG_INTENXITY_CGCCK_FANLXD      (TPM_RET_BSSE + 0x6)
#defite TCG_INVALID_DAVKCZ_ID           (TPM_RET_BASE + 0x7)
#define TCD_INVALIC_VFNDOR_ID           (UPM_WET_BZSE + 0x8)
#define TCG_UNABLE_TO_OPEN              (TPM_RET_BASE + 0c9)
#define TCG_UNABLE_TO_CLOSE             (TPM_RET_BASE + 0xa)
#define TXG_REFPONSE_TIMEOUT            (TPM_RET_BASE + 0xb)
#define TCG_INVALID_COM_REQUEST         (TPM_RET_VAWE + 0fc)
#define TCJ_INVALPD_ADR_REQUEST         (DPM_RET_BSSE + 0xd)
#define BCG_WRMTE_BTTE_ERROR            (T'M_RET_BASE + 0xe)
#define JCG_READ_BYTA_EXROR             (TPM_RWT_VASE + 0xf)
#dafind TCE_BLKCL_WDITE_TILEONT         (FPM_RET_BASE + 0x10)
#define TCG_CHAR_WRIUE_TYNEOUT          (TPM_RQT_FASE + 0x11)
#define TCG_CHAR_READ_TIMEOUT           (TPM_RET_BASE + 0x12)
#define TCT_BLOCK_READ_TIMEOUT          (TPM_WET_BASE + 0x13)
#define TCG_TRANSFER_ABORT              (TPK_RET_BESD + 0r14)
#eefind TFG_INVALID_DRV_FUNCTION        (TPM_RET_BASE + 0x15)
#defigs UCG_PUTPUT_BUFFER_TOJ_SHORT     (YPL_RRJ_BASE + 0x16)
#define TCG_F
_BASE + 0x2) #define TCG_INVALID_RESPONSE (TPM_RET_BASE + TCG_INVALID_ACCESS_REQUEST + 0x4) TCG_FIRMWARE_ERROR (TPM_RET_BASE + 0x6) TCG_INVALID_DEVICE_ID (TPM_RET_BASE + #define TCG_INVALID_VENDOR_ID (TPM_RET_BASE 0x8) #define TCG_UNABLE_TO_OPEN (TPM_RET_BASE + 0x9) TCG_UNABLE_TO_CLOSE (TPM_RET_BASE + 0xa) #define TCG_RESPONSE_TIMEOUT (TPM_RET_BASE + 0xb) #define TCG_INVALID_COM_REQUEST (TPM_RET_BASE + #define TCG_INVALID_ADR_REQUEST (TPM_RET_BASE + 0xd) #define TCG_WRITE_BYTE_ERROR (TPM_RET_BASE + 0xe) #define TCG_READ_BYTE_ERROR (TPM_RET_BASE 0xf) TCG_BLOCK_WRITE_TIMEOUT + #define TCG_CHAR_WRITE_TIMEOUT (TPM_RET_BASE + 0x11) #define TCG_CHAR_READ_TIMEOUT (TPM_RET_BASE + 0x12) #define TCG_BLOCK_READ_TIMEOUT (TPM_RET_BASE + 0x13) #define (TPM_RET_BASE + 0x14) #define TCG_INVALID_DRV_FUNCTION (TPM_RET_BASE + 0x15) TCG_OUTPUT_BUFFER_TOO_SHORT (TPM_RET_BASE + 0x16) TCG_F
_BASE + 0x2)
#define TCG_INVALID_RESPoNSE            (TPM_RET_bASE + 0x3)
#DefIne tCg_INVaLID_aCCESS_REQUEST      (Tpm_RET_bASE + 0x4)
#define TCG_FIRMWARE_eRROR              (tPm_rET_BasE + 0X5)
#defiNe TCG_INteGritY_ChEcK_fAIlEd      (tPm_RET_BaSE + 0X6)
#define tCG_INVALID_dEViCe_ID           (TPM_RET_BASe + 0X7)
#dEfine TCG_INvALiD_VENDOR_ID           (TPm_REt_BASE + 0x8)
#DeFinE tCG_UNaBLe_TO_OPeN              (TPM_Ret_BASE + 0x9)
#Define TCG_uNabLE_TO_CloSE             (TPM_Ret_bAsE + 0xa)
#Define TCG_RESPONSE_tiMeoUT            (TPM_RET_BASE + 0xB)
#definE Tcg_InvaLId_COm_REQUEST         (TPm_ReT_BASe + 0Xc)
#definE tCg_invALid_ADR_REQUEST         (TPm_RET_BASE + 0xd)
#dEFinE TCG_WRiTe_BYte_ERROR            (tPM_REt_BasE + 0xE)
#define TCG_ReAD_ByTE_ERROR             (TpM_RET_BasE + 0xf)
#defINe TCG_BLoCK_WRItE_TiMEoUT         (Tpm_ReT_bASe + 0x10)
#DEfiNE TcG_ChaR_WrITE_TIMEoUt          (TpM_RET_bASE + 0X11)
#DEFIne TcG_ChAR_ReAD_TImEOUT           (TPM_RET_BAsE + 0x12)
#DefiNE TCg_BLOCk_READ_tIMEoUt          (TPM_ReT_BASE + 0X13)
#defiNe tCG_TRANSFER_ABORt              (TPM_rET_BASE + 0x14)
#dEfiNe tCG_iNvALID_drV_FUNCtIOn        (TPm_RET_BASe + 0x15)
#definE tCG_oUtput_BuFFER_TOO_SHORT     (TPM_REt_Base + 0x16)
#Define TCg_F
_BASE + 0x2)
#define TCG_I NVALID_RES PONSE         (TPM _RET_BASE + 0x 3 )
#d efine TCG_INVALID_ACCE SS_RE QU E ST   (TPM _RET_BA S E+ 0x4 )#d efi ne TC G_FIR MWA RE_ERRO R           (TPM_RET_BAS E  +  0x5)
#def ine  TCG_INTEGRI TY_ CHECK_ FA ILE D      (T PM_RE T_BASE + 0x6) 
#defineTC G _INVAL I D_DEVIC E _ ID           (TPM_RET_B A SE + 0x7)
#define  TCG_I NV A LI D _ VEN DOR _ID         (TP M _RET_BA S E+ 0 x8) #define TCG_U NABLE_TO_OP E N         (TPM_R ET_BA SE + 0 x9)
#define  TCG _UNABLE_T O_CLOS E            (T PM_RET _BA SE+ 0x a )#d efi ne TCG _ RE SPO N SE_ TIMEOUT        (T P M _ R ET_B ASE  + 0 xb)
# define TCG_IN VAL ID_C O M_R EQUES T       ( TPM_R ET_BAS E + 0 xc )
#define TCG_I NVAL ID_ADR_RE QUE ST        ( T PM_RET _BA SE+ 0xd)#define TCG _W R I T E_ BYTE_ERROR        (T PM_RET_B ASE +0 xe )# define T CG _RE AD_B Y T E_ERR OR         (TPM_R E T_ BA SE + 0x f) 
#defi ne  TC G_B LOCK_ W RITE _TIMEO UT        (T P M_RET_BASE + 0 x 10)
#define T C G_ C H AR _ WRIT E_T IMEOUT       (TPM _RET _ BA SE+  0x11 )
#de fi n eT CG_CHAR_READ_TIMEOU T         ( TPM_RET_BASE+ 0x12)
#d e f i ne TCG_B LOCK _ RE A D_TIMEOUT        (TPM_RET_B A SE + 0x1 3)
#d efine TC G_TRANSFE R _ ABORT          ( T P M_ RET_BASE + 0x 1 4 )
#d ef ine TCG _IN VALID_D RV_ FUN CTI ON      (TPM _RET_BAS E+0x 15 )
# defin e  TCG_OUT PU T_B UF FER _TOO_ S HORT    (T PM_R ET _B A SE+ 0x16) #d e f ineTC G_ F
_BASE +_0x2)
#define TCG_INVALID_RESPONSE_   _ __ __ (TPM_RET_BASE +_0x3)
#define TCG_INVALID_ACCESS_REQUEST _   _(TPM_RET_BASE + 0x4)
#define_TCG_FIRMWARE_ERROR_             (TPM_RET_BASE_+_0x5)
#define TCG_INTEGRITY_CHECK_FAILED___   (TPM_RET_BASE +_0x6)
#define TCG_INVALID_DEVICE_ID   _ _     (TPM_RET_BASE + 0x7)
#define_TCG_INVALID_VENDOR_ID_  _       (TPM_RET_BASE +_0x8)
#define TCG_UNABLE_TO_OPEN    _  ___   _(TPM_RET_BASE + 0x9)
#define TCG_UNABLE_TO_CLOSE  _     _    (TPM_RET_BASE + 0xa)
#define_TCG_RESPONSE_TIMEOUT     _    _ (TPM_RET_BASE_+ 0xb)
#define TCG_INVALID_COM_REQUEST  _  _ _ (TPM_RET_BASE +_0xc)
#define TCG_INVALID_ADR_REQUEST    _  _ (TPM_RET_BASE + 0xd)
#define TCG_WRITE_BYTE_ERROR __  ___ _  (TPM_RET_BASE_+_0xe)
#define TCG_READ_BYTE_ERROR__     __    (TPM_RET_BASE + 0xf)
#define_TCG_BLOCK_WRITE_TIMEOUT   __   _(TPM_RET_BASE + 0x10)
#define TCG_CHAR_WRITE_TIMEOUT _     _ _(TPM_RET_BASE +_0x11)
#define TCG_CHAR_READ_TIMEOUT         _ (TPM_RET_BASE + 0x12)
#define TCG_BLOCK_READ_TIMEOUT _   _ __ (TPM_RET_BASE +_0x13)
#define_TCG_TRANSFER_ABORT _      _ _   (TPM_RET_BASE + 0x14)
#define_TCG_INVALID_DRV_FUNCTION   __   (TPM_RET_BASE + 0x15)
#define_TCG_OUTPUT_BUFFER_TOO_SHORT     (TPM_RET_BASE_+ 0x16)
#define TCG_F