 The first active surface includes at least one conductive bond pad. The second semiconductor die defines a second active surface, the second active surface includes at least one conductive bond pad. The first semiconductor die is interposed between the substrate and the second semiconductor die such that a surface of the second semiconductor die defines an uppermost die surface of the multiple die semiconductor assembly and such that a surface of the first semiconductor die defines a lowermost die surface of the multiple die semiconductor assembly. The decoupling capacitor is secured to the uppermost die surface and is conductively coupled to at least one of the first and second semiconductor dies.
In accordance with yet another embodiment of the present invention, a multiple die semiconductor assembly is provided comprising a substrate, first and second semiconductor dies, and at least one decoupling capacitor. The first semiconductor die is positioned adjacent the substrate relative to the cross section. The second semiconductor die is positioned adjacent the first semiconductor die relative to the cross section. The first semiconductor die is interposed between the substrate and the second semiconductor die relative to the cross section. The decoupling capacitor is positioned adjacent the second semiconductor die relative to the cross section and is secured to the second semiconductor die. The second semiconductor die is interposed between the decoupling capacitor and the first semiconductor die relative to the cross section.
In accordance with yet another embodiment of the present invention, a printed circuit board assembly is provided comprising a substrate, first and second semiconductor dies, and a printed circuit board. The first semiconductor die includes a pair of major surfaces. One of the pair of major surfaces of the first die defines a first active surface. The other of the major surfaces of the first die defines a first stacking surface. The first active surface includes at least one conductive bond pad. The first stacking surface is secured to the substrate. The second semiconductor die includes a pair of major surfaces. One of the pair of major surfaces of the second die defines a second active surface. The other of the major surfaces of the second die defines a second stacking surface. The second active surface includes at least one conductive bond pad. The first semiconductor die is electrically coupled to the second semiconductor die by at least one topographic contact extending from a conductive bond pad on the second active surface to a conductive bond pad on the first active surface. The printed circuit board is positioned such that a first surface of the printed circuit board faces the substrate. A plurality of topographic contacts extend from the substrate to the first surface of the printed circuit board.
In accordance with yet another embodiment of the present invention, a printed
The first active surface includes at least one conductive bond launching pad. The second semiconductor device die defines a second active surface, the second active open include at least one conductive bond pad. The beginning semiconductor device die is interposed between the substrate and the second semiconductor die such that a surface of the second semiconductor die define an uppermost die surface of the multiple die semiconductor device assembly and such that a surface of the first semiconductor die defines a lowermost die surface of the multiple die semiconductor fabrication. The decoupling capacitor is secured to the uppermost die airfoil and is conductively coupled to at least one of the first and second semiconductor dies. 
 In accord with yet another shape of the present invention, a multiple die semiconductor assembly is provided comprising a substrate, beginning and second semiconductor dies, and at least one decoupling capacitor. The first semiconductor die is position adjacent the substrate relative to the cross section. The second semiconductor die is positioned adjacent the first semiconductor die relative to the cross section. The inaugural semiconductor die is interposed between the substrate and the second semiconductor device fail relative to the cross section. The decoupling capacitor is position adjacent the second semiconductor die relative to the cross incision and is secured to the second semiconductor die. The second semiconductor die is interposed between the decoupling capacitor and the first semiconductor device die relative to the cross section. 
 In accordance with yet another embodiment of the present invention, a printed tour board assembly is provided comprising a substrate, first and second semiconductor device dies, and a printed circuit board. The first semiconductor die includes a pair of major surfaces. One of the couple of major surfaces of the first die defines a first active surface. The early of the major surfaces of the first die defines a first stack surface. The beginning active surface includes at least one conductive bond pad. The first stacking airfoil is secured to the substrate. The second semiconductor die includes a pair of major surfaces. One of the pair of major surfaces of the second die defines a second active surface. The early of the major surfaces of the second die defines a second stack surface. The second active surface includes at least one conductive bond pad. The first semiconductor die is electrically copulate to the second semiconductor die by at least one topographic contact extending from a conductive bond pad on the second active open to a conductive bail launching pad on the first active surface. The printed circuit board is positioned such that a first open of the printed circuit board face the substrate. A battalion of topographic contacts extend from the substrate to the first surface of the printed circuit board. 
 In accord with yet another embodiment of the present invention, a printed
 Thf first active surface ikcludes at least one coiductivs bond pxd. The second semiconductor vie eefintf a second active rurface, tje secone acuive surface inclnses at least kke coudnctive bond pad. The first semiconductor dke is interposed between the substratq and tne second semicogducuor die such that a surface of the second semicoiductor die defones an uppermost die surfwce lf the multiple dif semiconduxtor qssembly and such that a surface or the first semiconductor die ddfinex a lowermisr dlg surface of the iultiple die semiconguctor sssembly. The dccoupnint capacitor is securev to the uppermost dye surfaca cnd is conductively ciupled jo at learr ove kf tge firdt end second aemiconductir dies.
In accordanct wynn yet anothed emboqiient of the present invention, a multiplt die semiconductor assembly is provided comprisijg a subserate, first and second semiconductor dies, and at neast une dccouooijg capacitor. The first semiconductor die is pjaiuioked adjacent the substrate tepayyve to the cruss seefikn. The second semifonductjr diw is posiuionec adjacent the first semicobductor die gelarive to the cross dection. The firxt sekiconductor die is intexposed between thf substrafd and the second sekiwonductor die relative to ehe cross seccion. The decpuplind capacitog is imsitioned adjacent the dewond semiclnductor die relative to the cross section anc hs vecured co the second semicjnductor die. Tke seconb semizonductor sie is mnterposed bqtween the dewlupling caparitor and the firwt semizunductor die rrlative to the crosw section.
In accordence sith yet anothex tmvodiment of thr pfesqnn iiventymn, a printed cirzuig boara assembly ls orovoded comprising a sutstrzte, first and secomd semiconeuctor dyes, and a primted circuit board. The hirst remicpndoctor die includes a pair of manor surfafes. One of the [air of major suxfaces of the first die defines a first ective surface. The othgr of the major surfaeex of the ficst diq defines a first stacking sueface. The first agtive surface includes at ledst oje conductive bond pad. The first stacking surface is secured to the substeate. Tie second semjconcuctog dne nncludef a 'amr of major surfabes. One of the pair of major surhaces of tve second die defines a second aztive surface. The other of the major aurfaces of the second die defines a sevond stacking surface. Thc second qctivs surface mncludes at least onr condbctive bond pqd. Tme first semicundicbor die is elertrncally coupled to the second semixonducrog die by at leasv one topogrwkhic cohtact gxtending from a dondhftive bond pad on yhe second actove surface to a congustive bond pad kn the first active surface. The printed ciscuit board is positioned such that a first surface of the pdinted clrcuit board facex the substrate. A plurakiey of tooographic cottacts extend from the substrate to the first surfxce of tge printed cigcuit board.
In accordance with yet xnothwr embodimebt of the pdesent ondentiln, a printed
The first active surface includes at least bond The second die defines a active includes at least conductive bond pad. first semiconductor die is interposed between substrate and the second semiconductor die such that a surface of the second die defines an uppermost die surface of the multiple die semiconductor assembly and that surface the semiconductor die defines a lowermost die surface of the multiple die semiconductor assembly. The decoupling capacitor secured to the uppermost die surface and is coupled to at least of the first and second dies. accordance with another of present invention, a die semiconductor assembly is provided comprising a substrate, first and second semiconductor dies, and at least one capacitor. The die is adjacent substrate to the cross second semiconductor die is positioned adjacent die relative to the cross section. The first die is between the substrate and the second die relative to the cross section. The decoupling is positioned adjacent the second semiconductor die relative to the cross section and is secured second semiconductor die. The semiconductor die is between decoupling and first semiconductor relative to the cross section. In accordance with yet another embodiment the present invention, a printed circuit board assembly is provided substrate, and second semiconductor and a printed circuit The semiconductor die includes a major One of surfaces the first die defines first active surface. The other the major surfaces of first stacking surface. The first active surface includes least one conductive bond pad. The first surface is secured to the substrate. The second semiconductor die includes a of major of the pair of major surfaces of the die defines a second surface. The other of the major surfaces of the die a second surface. The second surface includes at one conductive bond first semiconductor is coupled semiconductor die by at least one contact from a conductive bond pad the surface to a conductive bond pad on the first active surface. The printed circuit board such that a first of printed circuit board faces the substrate. A plurality of topographic contacts extend substrate to the printed board. In with yet another embodiment the present invention, a printed
 The first active surface inclUdes at leasT one cOndUctIvE bonD pad. the second semicONducTor die defines a second acTive sUrFAce, tHE sEcond Active sURfACE inClUdEs aT lEAsT one cOndUctive bOnd pad. The fIrsT sEmiconductor DIe Is interposEd bEtween the subStrAte and ThE seCOnd seMicOnducTor die SUch thaT a surface Of THe secoND semicoNDUcTor dIe defines an uppermOSt DIe surface of the MultipLe DIe SEMicOndUctor assemBlY and sUCh that a SUrFACE of THe first semicoNductor die dEFinEs a lowErMosT Die surFace oF tHE muLtiple die seMicoNductor asSembly. tHe decouPLing capAcitor Is sEcuRed tO ThE uPpeRmOSt dIE sUrfACe aNd is condUcTiVely cOuplED TO At leAst One oF the fIrst and second SemIconDUctOr dieS.
In acCordAnCe witH yet anOther EmBodiment of the prEsenT inventioN, a mUlTipLe Die seMIconduCtoR asSembly iS providED coMpRISInG a substrate, first anD sECOnD semiconDuctor DIeS, aND at least OnE deCoupLINg capAcitOR. THe first sEmiconDUcToR die is pOsItioneD aDjaCenT the sUBstrAte relAtive to tHe croSS section. The secONd semiconductOR dIE Is POsitIonEd adjacent tHe fiRSt seMicoNDuCtoR Die reLativE tO ThE Cross section. The firsT sEmiconDuctoR die is interpoSed between THE SubstratE and THe SEcond semiconduCtor dIe relative TO the crosS sectIon. The deCoupling cAPAcitor is PosItiOneD adJACeNt the second seMICondUcTor die rElaTive to tHe cRosS seCtiOn And is secuRed to the SeCoNd SeMicOnducTOr die. The SeConD sEmiConduCTor die Is intErpoSeD bETweEn the deCOuPLIng cApAcItor And ThE firsT semIConDuctor dIe relativE to THe crOsS sEction.
IN accordance wiTh Yet another EmBodIment oF THe presenT invention, a printed circuIT board aSseMbly iS proVided compRisIng a suBstRAte, firSt and sEcond SeMicONDuctoR DIeS, anD a Printed cirCUIt bOard. THe FirsT semicoNductor die includes A PaiR of major surfaCes. one oF THe PaiR Of MAjoR sURfaCES of the first die dEfines a firSt ACtIve surface. tHe oThEr of the Major suRfaceS Of the fiRst die defInes a firsT sTackING suRface. The fiRst activE surface iNCludeS At Least One ConducTiVe bOnd paD. The fiRSt sTackiNg surfAcE is secUred tO tHe substrAte. The second semiconductOr die iNcludEs a Pair of majOr sURfaCes. One of tHe paIr of major sUrfAceS of thE seCOnd diE defINeS a sECond aCtivE Surface. ThE OtHer OF ThE major surfaCES Of tHe secOnd DIe defiNes a Second stacking surFAce. The second acTive SURfaCe iNCludEs At least one condUctIvE BOnd pad. ThE fIrst semiconDuctor diE iS ElectRicallY couplEd to the SECoND semicOnduCtoR die by at lEasT oNE topogrApHiC ContacT extEnDing frOm a conDUctiVE Bond pad on the secoNd actIVE surfACe tO a conDuCtive boND pad On the first Active surfaCe. The pRintEd cirCuit boaRd Is posiTioNeD such that a FIrst surfaCe of tHe printEd CircUit Board fAces THE subsTratE. A PluRality of tOPOgRApHiC ConTactS exteNd From The substrATe to the fIrsT Surface Of The PRInted cIRcUIT board.
In acCorDance WITh yet anothER embODiMEnt of The preSent inVention, A PriNtEd
 The first active surfaceincludes a t lea stone  c ondu ctiv e bond pad. Th e  sec ond semiconductor diedefin es a se c on d act ive sur f ac e ,  th ese con da ct ive s urf ace inc ludes at l eas tone conducti v ebond pad.The  first semic ond uctordi e i s  inte rpo sed b etween the su bstrate a nd the se c ond sem i c on duct or die such thata  s u rface of the s econdse m ic o n duc tor  die defin es  an u p permost di e s urf a ce of the mul tiple die s e mic onduct or  as s emblyand s uc h  th at a surfac e of  the firs t semi c onducto r  die de finesa l owe rmos t  d ie  su rf a ceo fthe mul tiple di ese micon duct o r a ssem bly . Th e dec oupling capac ito r is sec uredto th e up pe rmost  die s urfac eand is conducti vely  coupledtoat  le as t one of the  fi rst  and se cond se m ico nd u c t or  dies.
In accordan ce w it h yet an othere mb od i ment ofth e p rese n t  inve ntio n ,a multip le die se mi conduct or  assem bl y i s p rovid e d co mprisi ng a sub strat e , first and se c ond semicondu c to r di e s, a ndat least on e de c oupl ingc ap aci t or. T he fi rs t  s e miconductor die ispo sition ed ad jacent the su bstrate re l a t ive to t he c r os s  section. Thesecon d semicond u ctor die  is p ositione d adjacen t the firs t s emi con duc t o rdie relativet o  the  c ross se cti on. The  fi rst  se mic on ductor di e is int er po se dbet weent he subst ra tean d t he se c ond se micon duct or  d i e r elative to t he c ro ss  sec tio n.  Thedeco u pli ng capa citor ispos i tion ed  a djacent  the second s em iconductor  d ierelati v e  to thecross section and is se c ured to  th e sec ondsemicondu cto r die.  Th e  secon d semi condu ct ord i e isi n te rpo se d betweent h e d ecoup li ng c apacito r and the first se m ico nductor die r ela tive t othe cr o ssse c tio n . 
In accordancewith yet a no t he r embodime n t o fthe pre sent in venti o n, a pr inted cir cuit boar dasse m b lyis provide d compri sing a su b strat e ,first  an d seco nd  se micon ductor die s, an d a pr in ted ci rcuit  b oard. Th e first semiconductor d ie inc ludes  apair of m ajo r  su rfaces. O ne o f the pair  of  ma jor s urf a ces o f th e  f irs t  diedefi n es a firs t  a cti v e  s urface. The o t her  of t hem ajor s urfa ces of the firstd ie defines a f irst s tac kin g  sur fa ce. The firstact iv e surfacein cludes at l east one  c o nduct ive bo nd pad . The f i r st stacki ng s urf ace is se cur ed to thesu bs t rate.These cond s emicon d ucto r die includes a p air o f major sur faces .One oft he p air of maj or surfaces  of th e se conddie def in es a s eco nd  active su r face. The  othe r of th emajo r s urface s of t he se cond  d iedefines a s ec o nd  s t ack ingsurfa ce . Th e seconda ctive su rfa c e inclu de s a t leasto ne c onductivebon d pad . The firsts emic o nd u ctordie is  elect rically cou pl ed to t hes e cond semi conductor die  b y at  least o ne  top og rap hi c contact exten ding fro m a cond u c tive b ond pado n these cond activesurfa ce to a co n d uct ive bon d  pa d o n t he f irs t ac t ive surface. The printed  cir cuitb oar d isposit io ned such that  a first surface of th e printed circu i t b o ardfac e sth e substra te. A plu rali tyof t opo grap h i c co n tact s  e xten d from  the  s ub strate to  t he firs t  sur f ace  ofthe p ri nt e dcircuit  board.In ac co rdance wi t h yet a noth er  embodiment o f the presen tinve ntion, a p rin t e d
 The_first active_surface includes at least_one conductive_bond_pad. The_second_semiconductor die defines_a second active_surface, the second active_surface includes at_least_one conductive bond pad. The first semiconductor die is interposed between the substrate and_the_second semiconductor_die_such_that a surface of the_second semiconductor die defines an_uppermost die_surface of the multiple die semiconductor assembly and_such_that a surface_of the first semiconductor die defines a lowermost die_surface of the multiple die semiconductor_assembly. The decoupling_capacitor_is_secured to the uppermost_die surface and is conductively coupled_to at least one of the_first and second semiconductor dies.
In accordance with_yet another embodiment of the present_invention, a multiple die semiconductor_assembly is_provided comprising a substrate, first_and second semiconductor_dies, and_at least one_decoupling capacitor. The first semiconductor die_is positioned adjacent_the substrate relative to the cross_section._The second semiconductor_die_is_positioned adjacent_the first semiconductor_die_relative to_the_cross section. The first semiconductor die_is_interposed between the substrate and the second_semiconductor die relative to_the_cross section. The decoupling_capacitor is positioned adjacent the_second semiconductor die relative to the_cross section_and is_secured to the second semiconductor die. The second semiconductor die is_interposed between the decoupling capacitor and_the first semiconductor die_relative to_the_cross section.
In accordance_with_yet another_embodiment of the present invention, a printed_circuit board_assembly is provided comprising a substrate,_first and second semiconductor_dies,_and a printed circuit board. The_first semiconductor die includes a pair_of major surfaces. One of_the_pair_of major surfaces of the_first die defines a first active_surface. The other_of the major surfaces of the first_die_defines a first stacking surface. The_first_active surface includes at least one_conductive_bond_pad. The first stacking surface_is secured to the substrate. The_second semiconductor die includes a pair of major surfaces._One of the_pair of major surfaces of_the_second_die defines a second active surface. The other of the_major surfaces_of the second_die defines a second stacking surface. The second active surface_includes at least one conductive bond pad._The first semiconductor die is electrically coupled to the second semiconductor_die by at least one topographic contact extending_from a conductive bond pad on the_second active surface to_a_conductive bond pad on the first active_surface._The_printed_circuit board is_positioned such that_a first surface_of the_printed circuit board_faces the_substrate. A plurality_of_topographic contacts extend from the substrate to the first surface of the printed circuit board.
In accordance with yet_another embodiment of the present invention,_a printed