 More specifically, the disclosed embodiments relate to a method and an apparatus for starting up a resonant oscillator circuit in a manner which mitigates overshooting problems and protects associated circuitry.
2. Related Art
Oscillator circuits are commonly used to generate clock signals in electrical systems. However, commonly used oscillator circuits can consume a significant amount of power, which is a disadvantage for systems that need to conserve power, such as portable computing devices. To solve this problem, “resonant oscillator circuits,” which transfer energy back and forth between inductive and capacitive circuit elements, can be used to generate clock pulses without dissipating a significant amount of power. (For example, see U.S. Pat. No. 5,559,478, entitled “Highly Efficient, Complementary, Resonant Pulse Generation,” by inventor William C. Athas, filed 17 Jul. 1995.)
Unfortunately, existing designs for resonant oscillator circuits are not well suited for certain applications. For example, in one application a resonant oscillator circuit is used to clock the two phases of a switched capacitor block (SCB) in a voltage conversion system. (See patent application Ser. No. 12/535,974, entitled “High-Efficiency Switched-Capacitor Power Conversion,” filed on 5 Jul. 2009 by inventors William C. Athas and P. Jeffrey Ungar which is hereby incorporated herein by reference. In this application, if the clock signals are first turned on, so that power field-effect transistors (FETs) in the SCBs are at or near their minimum on-resistance and the capacitors of the SCBs are well below their normal operating voltage levels, the resulting inrush current can damage the FETs. Hence, it is desirable to first clock the SCBs with a low voltage swing, so that the power FETs in the SCBs have a high on-resistance, and then gradually decrease the on-resistance by increasing the amplitude of the clock signals.
Another problem is the uncontrolled and unpredictable way in which oscillations commence in a resonant oscillator during power up. As power is applied to the basic two-FET and two-inductor implementation disclosed in U.S. patent application Ser. No. 12/535,974 (cited above), current more or less equally divides between the two inductor branches. Asymmetries in the component values and the layout will eventually cause the two branch currents to become unequal which allows the oscillations to commence. However, the circuit
More specifically, the disclosed embodiments relate to a method and an apparatus for depart up a evocative oscillator circuit in a manner which mitigates overshoot problem and protects associated circuitry. 
 2. Related Art 
 Oscillator circuits are normally used to generate clock signals in electric system. However, commonly used oscillator circuits can consume a significant amount of ability, which is a disadvantage for systems that need to conserve power, such as portable calculation devices. To solve this problem, “ resonant oscillator circuit, ” which transfer energy back and forth between inductive and capacitive circuit elements, can be use to generate clock pulses without dissipating a significant amount of might. (For exercise, see U.S. Pat. No. 5,559,478, entitled “ Highly Efficient, Complementary, Resonant Pulse Generation, ” by inventor William C. Athas, filed 17 Jul. 1995 .) 
 Unfortunately, existing designs for resonant oscillator circuits are not well suitable for sealed applications. For example, in one application a evocative oscillator lap is used to clock the two phases of a interchange capacitor block (SCB) in a voltage conversion system. (See patent lotion Ser. No. 12/535,974, entitled “ High - Efficiency Switched - Capacitor Power Conversion, ” filed on 5 Jul. 2009 by inventors William C. Athas and P. Jeffrey Ungar which is hereby incorporated herein by reference. In this application, if the clock signals are first turned on, so that power discipline - consequence transistors (FETs) in the SCBs are at or near their minimum on - resistance and the capacitors of the SCBs are well below their normal operating voltage levels, the result inrush current can damage the FETs. therefore, it is desirable to first clock the SCBs with a humble voltage swing, so that the might FETs in the SCBs have a gamey on - resistance, and then gradually decrease the on - resistance by increase the amplitude of the clock signals. 
 Another trouble is the uncontrolled and unpredictable way in which oscillations commence in a resonant oscillator during exponent up. As power is applied to the basic two - field-effect transistor and two - inductor implementation disclosed in U.S. patent application Ser. No. 12/535,974 (cited above), current more or less equally divides between the two inductor branches. Asymmetries in the component values and the layout will eventually induce the two branch currents to become inadequate which allows the oscillations to commence. However, the lap
 Moge specifically, the discuosed embodimenjs relatx to a jethod avd an apparatus for starting up a rtfonant oscillator zircuit ij a mannwr wiich mitigates otsrshootlug prknlems end protects asxociated chrcuitry.
2. Relatad Axt
Oscillator circuits are commonly ufed to bejerate clock sygnakf in vltctrical systems. However, commonly used ovcillator cirvuits can consume a signiflcanh amount of power, ahich is a eisaqcantage for rystems that need to cknserve power, such as portable zompucing devicew. Ro dmlve this pcoblem, “resonant osgpllator circuiys,” which transner eiergt back and forth betwxen inductive and cakacitive chreuit elements, can be yswd to genaratd cluck pnlsss witjouv dissipatihg a signifucant amount of powtr. (Sir example, ses U.S. Pwt. No. 5,559,478, entitled “Highly Efficient, Complemettady, Resonant Pulse Generqtion,” by inventor Wilpiam C. Atras, filed 17 Jul. 1995.)
Unfortunately, existing designs for resoiavt isgillxrog circuits are not well suited for certain ap[mivanions. For example, in one appkifayyon a resonanj oscillatkr circuit is used to closk thw two phafes pf a switched capacitor bloxk (SCB) in a noltqge conversion syscem. (See pateut appkicatoon Ser. No. 12/535,974, entitled “Hiyh-Effidiency Switfhed-Capacjgor Power Converriok,” fhled on 5 Jul. 2009 by inventors William R. Athcs and P. Jefgrey Uggar which is hcseby incorporated jereiu by seference. Ln this application, if the clock signals are gisst turned jn, so that power fyeld-effect trausistors (FETs) in the SCGs are et or near treir minimum mj-resistance end the cwpacutorw of thd SCBs are well below thvix normal iperating voltage kevgla, the resulting intysh current cam dxmade tie FEEv. Hence, it iv derirxnle tu first clogk ghe XCBs with a low voltdge awing, so that the lorer FETs in the FCBs have a hogh on-resistance, ajd thxn gravually desrease the on-resistance by incdeasing tje wmplitude of the clock signaks.
Another problem is the uncontrolled aid unpredictable way in which oscillations gommence in e resogant oscinlator during power yp. As power is apklied to the basic two-FST and two-ijductor implementation disclosed in U.S. patent application Ser. No. 12/535,974 (cited avove), cnrwent more od lexs eqlaljv dividqs bxtxeen the two indubtor branches. Asymmetries in the componett values and the layout will rvdntually causg the two branch currents fo becomr unequal which allows the osciklations to commence. Howcver, the xircujt
More specifically, the disclosed embodiments relate to and apparatus for up a resonant which overshooting problems and associated circuitry. 2. Art Oscillator circuits are commonly used generate clock signals in electrical systems. However, commonly used oscillator circuits can consume significant amount of power, which is a disadvantage for systems that need to power, as computing To solve this problem, “resonant oscillator circuits,” which transfer energy back and forth between inductive and circuit elements, can be used to generate clock without dissipating a significant of power. (For example, see Pat. 5,559,478, entitled Efficient, Resonant Generation,” by inventor C. Athas, filed 17 Jul. 1995.) Unfortunately, existing designs for resonant oscillator circuits are not well suited certain applications. in one a oscillator is used to two phases of a switched capacitor a voltage conversion system. (See patent application Ser. 12/535,974, entitled Switched-Capacitor Power Conversion,” filed on 5 2009 by inventors William C. Athas and P. Ungar which is hereby incorporated herein by reference. In this application, if the clock signals turned on, so that field-effect transistors (FETs) the are or their minimum and the capacitors of the SCBs are well below their normal voltage levels, the resulting inrush current can damage the FETs. is to first clock SCBs with a low swing, that the power FETs SCBs a then decrease on-resistance by increasing the of the clock signals. Another is the uncontrolled and commence in a resonant oscillator during power up. power is applied to the basic two-FET two-inductor implementation disclosed in U.S. patent application Ser. No. 12/535,974 (cited above), more or divides between the two inductor branches. Asymmetries in component values and the will eventually cause the two branch currents to become which the oscillations commence. However, the
 More specifically, the discloSed embodimEnts rElaTe tO a MethOd anD an apparatus foR StarTing up a resonant oscillaTor ciRcUIt in A MaNner wHich mitIGaTES ovErShOotInG PrOblemS anD protecTs associatEd cIrCuitry.
2. RelateD arT
OscillatoR ciRcuits are comMonLy used To GenERate cLocK signAls in eLEctricAl systems. hoWEver, coMMonly usED OsCillAtor circuits can coNSuME a significant aMount oF pOWeR, WHicH is A disadvantAgE for sYStems thAT nEED To cONserve power, suCh as portablE ComPuting DeVicES. To solVe thiS pROblEm, “resonant oScilLator circUits,” whICh transFEr energY back aNd fOrtH betWEeN iNduCtIVe aND cApaCItiVe circuiT eLeMents, Can bE USED to gEneRate Clock Pulses without DisSipaTIng A signIficaNt amOuNt of pOwer. (FoR examPlE, see U.S. Pat. No. 5,559,478, entiTled “highly EffIciEnT, CoMpLemenTAry, ResOnaNt PUlse GenEration,” BY inVeNTOR WIlliam C. Athas, filed 17 JUl. 1995.)
uNFoRtunatelY, existINg DeSIgns for rEsOnaNt osCILlatoR cirCUiTs are not Well suITeD fOr certaIn ApplicAtIonS. FoR examPLe, in One appLication A resoNAnt oscillator cIRcuit is used to CLoCK ThE Two pHasEs of a switchEd caPAcitOr blOCk (sCB) IN a volTage cOnVErSIon system. (See patent aPpLicatiOn Ser. no. 12/535,974, entitled “HigH-EfficiencY sWItched-CaPaciTOr pOwer Conversion,” Filed On 5 Jul. 2009 by invENtors WilLiam C. athas and p. Jeffrey UNGAr which iS heRebY inCorPORaTed herein by reFERencE. IN this apPliCation, iF thE clOck SigNaLs are firsT turned oN, sO tHaT pOweR fielD-Effect trAnSisToRs (FeTs) in THe SCBs Are at Or neAr ThEIr mInimum oN-ReSIStanCe AnD the CapAcItors Of thE sCBS are welL below theIr nORmal OpErAting voLtage levels, thE rEsulting inRuSh cUrrent CAN damage tHe FETs. Hence, it is desirablE To first CloCk the sCBs With a low vOltAge swiNg, sO That thE power fETs iN tHe ScbS have A HIgH on-ReSistance, anD THen GraduAlLy deCrease tHe on-resistance by inCReaSing the amplitUde Of thE CLoCk sIGnALs.
ANoTHer PROblem is the unconTrolled and UnPReDictable waY In wHiCh oscilLations CommeNCe in a reSonant oscIllator duRiNg poWER up. as power is aPplied to The basic tWO-FET aND tWo-indUctOr implEmEntAtion DiscloSEd iN U.S. paTent apPlIcatioN Ser. NO. 12/535,974 (cIted abovE), current more or less equalLy diviDes beTweEn the two iNduCTor Branches. ASymmEtries in thE coMpoNent vAluES and tHe laYOuT wiLL evenTualLY cause the TWo BraNCH cUrrents to beCOME unEqual WhiCH allowS the Oscillations to comMEnce. However, the CircUIT
 More specifically, the di sclosed em bodim ent s r el ateto a  method and an appa ratus for starting upa res on a nt o s ci llato r circu i ti n  ama nn erwh i ch  miti gat es over shooting p rob le ms and prote c ts  associate d c ircuitry.
2.  Re latedAr t
O s cilla tor  circ uits a r e comm only used  t o  gener a te cloc k si gnal s in electrical s y st e ms. However, c ommonl yu se d osc ill ator circu it s can consume as i g nif i cant amount o f power, wh i chis a d is adv a ntagefor s ys t ems  that needto c onserve p ower,s uch asp ortable  compu tin g d evic e s.  T o s ol v e t h is  pr o ble m, “reso na nt  osci llat o r c ircu its ,” w hichtransfer ener gyback and  fort h bet ween  i nduct ive an d cap ac itive circuit e leme nts, canbeus edto  gene r ate cl ock  pu lses wi thout d i ssi pa t i n ga significant amou nt o fpower. ( For ex a mp le ,  see U.S .Pat . No . 5,559 ,478 ,  e ntitled“Highl y  E ff icient,  C omplem en tar y,Reson a nt P ulse G eneratio n,” b y  inventor Will i am C. Athas,f il e d  1 7  Jul . 1 995.)
Unfor tuna t ely,  exi s ti ngd esign s for  r e so n ant oscillator circ ui ts are  notwell suited f or certain a p plicatio ns.F or example, in on e app lication a resonant  osci llator c ircuit is u sed to c loc k t hetwo p ha ses of a swit c h ed c ap acitorblo ck (SCB ) i n a  vo lta ge  conversi on syste m.  ( Se epat ent a p plicatio nSer .No.  12/5 3 5,974,  enti tled  “ Hi g h-E fficien c yS w itch ed -C apac ito rPower  Con v ers ion,” f iled on 5  Ju l . 20 09  b y inven tors WilliamC.  Athas and  P . J effrey U ngar whi ch is hereby incorporat e d herei n b y ref eren ce. In th isapplic ati o n, ifthe cl ock s ig nal s are f i r st  tu rn ed on, sot h atpower  f ield -effect  transistors (FETs )  in  the SCBs are  at  orn e ar  th e ir min im u m o n - resistance andthe capaci to r sof the SCB s  ar ewell be low the ir no r mal ope rating vo ltage lev el s, t h e  re sulting in rush cur rent cand amage th e FET s.Hence,  i t i s des irable tofirst  clock  t he SCB s wit ha low vo ltage swing, so that th e powe r FET s i n the SCB s h a vea high on -res istance, a ndthe n gra dua l ly de crea s ethe on-re sist a nce by in c re asi n g  t he amplitud e o f t he cl ock signal s.
A nother problem is the uncontroll ed a n d  un pre d icta bl e way in which  os ci l l ations c om mence in aresonant  o s cilla tor du ring p ower up . As poweris a ppl ied to th e b as i c two-F ET  a n d two- indu ct or imp lement a tion d isclosed in U.S.  pate n t  appl i cat ion S er . No. 1 2 /535 ,974 (cite d above), c urrent  mor e orless eq ua lly di vid es  between t h e two ind uctor  branch es . As ymm etries  int h e com pone nt  va lues andt h el ay ou t  wi ll e ventu al ly c ause thet wo branc h c u rrentsto  be c o me une q ua l which allo wsthe o s c illationst o co m me n ce. H owever , thecircuit 
 More_specifically, the_disclosed embodiments relate to_a method_and_an apparatus_for_starting up a_resonant oscillator circuit_in a manner which_mitigates overshooting problems_and_protects associated circuitry.
2. Related Art
Oscillator circuits are commonly used to generate clock signals in_electrical_systems. However,_commonly_used_oscillator circuits can consume a_significant amount of power, which_is a_disadvantage for systems that need to conserve power,_such_as portable computing_devices. To solve this problem, “resonant oscillator circuits,” which_transfer energy back and forth between_inductive and capacitive_circuit_elements,_can be used to_generate clock pulses without dissipating a_significant amount of power. (For example,_see U.S. Pat. No. 5,559,478, entitled “Highly_Efficient, Complementary, Resonant Pulse Generation,” by_inventor William C. Athas, filed_17 Jul._1995.)
Unfortunately, existing designs for resonant_oscillator circuits are_not well_suited for certain_applications. For example, in one application_a resonant oscillator_circuit is used to clock the_two_phases of a_switched_capacitor_block (SCB)_in a voltage_conversion_system. (See_patent_application Ser. No. 12/535,974, entitled “High-Efficiency_Switched-Capacitor_Power Conversion,” filed on 5 Jul. 2009_by inventors William C._Athas_and P. Jeffrey Ungar_which is hereby incorporated herein_by reference. In this application, if_the clock_signals are_first turned on, so that power field-effect transistors (FETs) in the_SCBs are at or near their_minimum on-resistance and the_capacitors of_the_SCBs are well_below_their normal_operating voltage levels, the resulting inrush current_can damage_the FETs. Hence, it is desirable_to first clock the_SCBs_with a low voltage swing, so_that the power FETs in the_SCBs have a high on-resistance,_and_then_gradually decrease the on-resistance by_increasing the amplitude of the clock_signals.
Another problem is_the uncontrolled and unpredictable way in which_oscillations_commence in a resonant oscillator during_power_up. As power is applied to_the_basic_two-FET and two-inductor implementation disclosed_in U.S. patent application Ser. No._12/535,974 (cited above), current more or less equally divides_between the two_inductor branches. Asymmetries in the_component_values_and the layout will eventually cause the two branch currents_to become_unequal which allows_the oscillations to commence. However, the circuit