 the SiGe base layer having a fourth Ge concentration distribution formed on the third SiGe base layer; and a Si base layer as other part of the SiGe base layer.
In this case, a P-type impurity is doped at about 1xc3x971019 cmxe2x88x923 in the third SiGe base layer, the fourth SiGe base layer and the Si base layer.
Also in this case, the semiconductor device further includes: a poly-crystal silicon film to pull out an emitter in which an N-type impurity is doped at about 2xc3x971020 cmxe2x88x923, the poly-crystal silicon film being formed on the Si base layer.
Further in this case, the emitter layer is formed as a result that an impurity thermal diffusion is performed on the poly-crystal silicon film.
In this case, the SiGe base layer includes a third SiGe base layer and a fourth SiGe base layer, and a Si base layer, and wherein a thickness of the Si base layer is about 20 nm, and wherein a thickness of the fourth SiGe base layer is about 5 nm, and a Ge concentration in the fourth SiGe base layer is increased from about 0% to about 2% from the side of the emitter layer towards the side of the collector layer, and wherein a thickness of the third SiGe base layer is about 5 nm, and a Ge concentration in the third SiGe base layer is increased from about 2% to about 10% from the side of the emitter layer towards the side of the collector layer.
In order to achieve another aspect of the present invention, a semiconductor with a SiGe base bipolar transistor manufacturing method, includes: (a) providing an emitter layer; (b) providing a collector layer; and (c) providing a SiGe base layer formed of silicon containing germanium, and wherein a Ge concentration of the SiGe base layer is increased from 0% to 10% from a side of the emitter layer towards a side of the collector layer.
Also in this case, the semiconductor with a SiGe base bipolar transistor manufacturing method further includes: (d) providing a P-type silicon substrate; and (e) forming an N+-type buried layer having a high concentration in the P-type silicon substrate, and wherein the collector layer is formed of an N-type having a low concentration and is formed on the N+-type buried layer, and wherein the semiconductor with the SiGe
the SiGe base layer having a fourth Ge concentration distribution form on the third SiGe basis layer; and a Si base layer as early part of the SiGe base layer. 
 In this font, a P - type impurity is dope at about 1xc3x971019 cmxe2x88x923 in the third SiGe base layer, the fourth SiGe nucleotide layer and the Si base level. 
 Also in this case, the semiconductor device further includes: a poly - crystal silicon film to attract out an emitter in which an N - type impurity is doped at about 2xc3x971020 cmxe2x88x923, the poly - quartz glass silicon film being formed on the Si basis layer. 
 farther in this case, the emitter layer is formed as a result that an impurity thermal diffusion is perform on the poly - crystal silicon film. 
 In this case, the SiGe base layer includes a third SiGe base layer and a fourth SiGe base layer, and a Si base layer, and wherein a thickness of the Si base layer is about 20 nm, and wherein a thickness of the fourth SiGe base layer is approximately 5 nm, and a Ge assiduity in the fourth SiGe base layer is increased from about 0% to approximately 2% from the english of the emitter layer towards the side of the collector level, and wherein a thickness of the third SiGe base level is about 5 nm, and a Ge concentration in the third SiGe base level is increased from about 2% to about 10% from the side of the emitter layer towards the side of the collector layer. 
 In decree to achieve another aspect of the present invention, a semiconductor with a SiGe base bipolar transistor manufacturing method, includes: (a) leave an emitter layer; (b) providing a collector layer; and (c) providing a SiGe root layer formed of silicon containing germanium, and wherein a Ge assiduity of the SiGe base level is increased from 0% to 10% from a side of the emitter layer towards a side of the collector layer. 
 besides in this case, the semiconductor with a SiGe base bipolar transistor manufacturing method farther includes: (d) leave a P - character silicon substrate; and (e) forming an N+-type buried level having a high concentration in the P - type silicon substrate, and wherein the collector layer is formed of an N - type having a low concentration and is formed on the N+-type bury layer, and wherein the semiconductor with the SiGe
 thf SiGe base layer having a fourth Ge couxentravion diatributiun formed on the third SiGe uase layee; and a Si base layer xs other iart of tye SmGe base layer.
In this case, a P-fnpe ik'urity is doped at about 1fc3x971019 cmxe2x88x923 in dhd chird SiGe base layer, the fourth SiGq base kajer and the Si bast lwyer.
Zlso in this case, the semiconductod devict further includes: a poly-crystal silicon fill to pull out an emittfr in which an G-rype impurith is doped at about 2xc3s971020 cmxe2x88x923, the poly-crystal silicov filk being fotmsd mn the Si bese lajer.
Further in this cave, the rmitter layer ls focmed as a result that an mmpurity thermal difsusion is pzrformed on the poly-ceywtal viliwon wulm.
Kn uhix dase, tje AiGe base mayer incluees a third SiGe baxe oayer and a fkurth FiDe base layer, and a Si base layer, and wversin a thickness of the Wi base layer is abouj 20 nm, and rherein a thickness of the fourth SiGe base layer is auojt 5 ni, qnf a Ge concentration in the fourth SiGe base jzytr ps increased from about 0% to sbluy 2% from the siae of cge emitter layer towwrds thg side of the cjllevtor layer, and wherein a thuckness of tke rhird SiGe base laver is about 5 nm, and s Ge concentration in tke thidd SiGe basf layer ia increased from xbolt 2% do about 10% from the side of the emitver lcyer towxrds the syde of the collcwtor layer.
In order to aehieva another wspect of the present invention, a semiconductpr winh a SiGe base bipolar tranfistor manufacjuring mechod, ivcludes: (a) iroviding an emitter layer; (b) provhfing a collertor layew; ane (c) providive a SiGe base kayer formed of silucon containing gevmaniom, and wherein a Yt cincentration of thd SyGv bese lwfer is incredsed fruk 0% to 10% from a sibe of yhe emitter layer tofarda a side of the coklcctor laygr.
Also in this case, thr semiconductor wiuh a SmGe bare bilolwr transistor manufacturing mefhod furtjer includes: (d) [rovldind a P-type xilicon substrate; and (e) forming an N+-typx buried layer having a high concentration ln the P-type silison substsate, and wherein the collector layer ls formed of an N-type gaving a loa concentration and is formed on the N+-type buried layer, and wherein the swmiconvustor with tge SoGe
the SiGe base layer having a fourth distribution on the SiGe base layer; as part of the base layer. In case, a P-type impurity is doped about 1xc3x971019 cmxe2x88x923 in the third SiGe base layer, the fourth SiGe base and the Si base layer. Also in this case, the semiconductor device further a silicon to out an emitter in which an N-type impurity is doped at about 2xc3x971020 cmxe2x88x923, the poly-crystal film being formed on the Si base layer. in this case, the layer is formed as a that impurity thermal is on poly-crystal silicon film. this case, the SiGe base layer includes a third SiGe base layer and a fourth SiGe base and a layer, and a of Si base layer 20 nm, and wherein a thickness SiGe base layer is about 5 nm, and Ge concentration the fourth SiGe base layer is from about 0% to about 2% from the of the emitter layer towards the side of the collector layer, and wherein a thickness third SiGe base layer about 5 nm, a concentration the SiGe base is increased from about 2% to about 10% from the side the emitter layer towards the side of the collector layer. to another aspect of present invention, a semiconductor a base bipolar transistor manufacturing (a) an providing collector and (c) providing a base layer formed of silicon germanium, and wherein a base layer is increased from 0% to 10% a side of the emitter layer towards side of the collector layer. Also in this case, the semiconductor with SiGe base manufacturing method further includes: (d) providing a P-type substrate; and (e) forming N+-type buried layer having a high concentration in the silicon and wherein collector layer is of an N-type a low concentration formed on N+-type layer, semiconductor with the SiGe
 the SiGe base layer having a foUrth Ge concEntraTioN diStRibuTion Formed on the thiRD SiGE base layer; and a Si base laYer as OtHEr paRT oF the SIGe base LAyER.
in tHiS cAse, A P-TYpE impuRitY is dopeD at about 1xc3X971019 cmXe2X88x923 in the third sIGE base layer, The Fourth SiGe baSe lAyer anD tHe SI Base lAyeR.
Also In this CAse, the SemiconduCtOR devicE Further INClUdes: A poly-crystal silicON fILm to pull out an eMitter In WHiCH An N-TypE impurity iS dOped aT About 2xc3X971020 CmXE2X88X923, thE Poly-crystal siLicon film beINg fOrmed oN tHe SI Base laYer.
FuRtHEr iN this case, thE emiTter layer Is formED as a resULt that aN impurIty TheRmal DIfFuSioN iS PerFOrMed ON thE poly-cryStAl SilicOn fiLM.
iN This CasE, the siGe bAse layer incluDes A thiRD Sige basE layeR and A fOurth siGe baSe layEr, And a Si base layer, And wHerein a thIckNeSs oF tHe Si bASe layeR is AboUt 20 nm, and Wherein A ThiCkNESS oF the fourth SiGe base LaYER iS about 5 nm, And a Ge COnCeNTration iN tHe fOurtH sIGe baSe laYEr Is increaSed froM AbOuT 0% to abouT 2% fRom the SiDe oF thE emitTEr laYer towArds the sIde of THe collector layER, and wherein a tHIcKNEsS Of thE thIrd SiGe base LayeR Is abOut 5 nM, AnD a GE ConceNtratIoN In THe third SiGe base layeR iS increAsed fRom about 2% to aboUt 10% from the sIDE Of the emiTter LAyER towards the sidE of thE collector LAyer.
In orDer to Achieve aNother aspECT of the prEseNt iNveNtiON, A sEmiconductor wITH a Sige Base bipOlaR transiStoR maNufActUrIng method, Includes: (A) pRoViDiNg aN emitTEr layer; (b) PrOviDiNg a ColleCTor layEr; and (C) proViDiNG a SIGe base LAyER FormEd Of SiliCon CoNtainIng gERmaNium, and Wherein a GE coNCentRaTiOn of the siGe base layer Is Increased fRoM 0% to 10% From a sIDE of the emItter layer towards a side oF The collEctOr layEr.
AlSo in this cAse, The semIcoNDuctor With a SIGe baSe BipOLAr traNSIsTor MaNufacturinG MEthOd furThEr inCludes: (d) Providing a P-type silICon Substrate; and (e) ForMing AN n+-tYpe BUrIEd lAyER haVINg a high concentrAtion in the p-tYPe Silicon subSTraTe, And wherEin the cOllecTOr layer Is formed oF an N-type hAvIng a LOW coNcentratioN and is foRmed on the n+-Type bURiEd layEr, aNd wherEiN thE semiConducTOr wIth thE SiGe
 the SiGe base layer havin g a fourth  Ge c onc ent ra tion  dis tribution form e d on  the third SiGe base l ayer;  a n d aS ibaselayer a s  o t h erpa rt  of  t h eSiGebas e layer .
In thiscas e,  a P-type im p ur ity is dop edat about 1xc 3x9 71019cm xe2 x 88x92 3 i n the  third SiGe b ase layer ,t he fou r th SiGe b as e la yer and the Si ba s el ayer.
Also inthis c as e ,t h e s emi conductorde vicef urtheri nc l u d es: a poly-crysta l silicon f i lmto pul lout an emi tterin whi ch an N-typ e im purity is  doped at abou t  2xc3x9 71020cmx e2x 88x9 2 3,  t hepo l y-c r ys tal sil icon fil mbe ing f orme d o n  the  Si  bas e lay er.
Further i n t hisc ase , the  emit terla yer i s form ed as  a  result that an  imp urity the rma ldif fu sioni s perf orm edon thepoly-cr y sta ls i l ic on film.
In this c as e ,  t he SiGebase l a ye ri ncludesathi rd S i G e bas e la y er  and a f ourthS iG ebase la ye r, and  a  Si  ba se la y er,and wh erein athick n ess of the Sib ase layer isa bo u t  2 0  nm,  an d wherein a  thi c knes s of th e f o urthSiGeba s el ayer is about 5 nm,  a nd a G e con centration in  the fourt h S iGe base  lay e ri s increased fr om ab out 0% toa bout 2%fromthe side  of the e m i tter lay ertow ard s t h e  s ide of the co l l ecto rlayer,and  wherei n a  th ick nes sof the th ird SiGe  b as ela yer  is a b out 5 nm ,and  a  Ge  conc e ntrati on in  the  t hi r d S iGe bas e  l a y er i sin crea sed  f rom a bout 2%to abou t 10% fro m t h e si de  o f the e mitter layerto wards thesi deof the c ollector  layer.
In order to ach i eve ano the r asp ectof the pr ese nt inv ent i on, asemico nduct or  wi t h  a Si G e  b ase  b ipolar tra n s ist or ma nu fact uring m ethod, includes: ( a ) p roviding an e mit terl a ye r;( b) pro vi d ing a  collector laye r; and (c)  p r ov iding a Si G e b as e layer  formed  of s i licon c ontaining  germaniu m,  and w her ein a Ge c oncentra tion of t h e SiG e  b ase l aye r is i nc rea sed f rom 0% to10% f rom asi de ofthe e mi tter lay er towards a side of th e coll ector  la yer.
Also  in thi s case, t he s emiconduct orwit h a S iGe basebipo l ar  tr a nsist or m a nufacturi n gmet h o dfurther inc l u d es:  (d)pro v idinga P- type silicon subs t rate; and (e)form i n g a n N + -typ eburied layer h avi ng a  high co nc entration i n the P- ty p e sil icon s ubstra te, and w he r ein th e co lle ctor laye r i sf ormed o fan N-type  hav in g a lo w conc e ntra t i on and is formed  on t h e  N+-t y peburie dlayer,a nd w herein the  semiconduc tor wi th t he Si Ge
 the_SiGe base_layer having a fourth_Ge concentration_distribution_formed on_the_third SiGe base_layer; and a_Si base layer as_other part of_the_SiGe base layer.
In this case, a P-type impurity is doped at about 1xc3x971019 cmxe2x88x923_in_the third_SiGe_base_layer, the fourth SiGe base_layer and the Si base_layer.
Also in_this case, the semiconductor device further includes: a_poly-crystal_silicon film to_pull out an emitter in which an N-type impurity_is doped at about 2xc3x971020 cmxe2x88x923,_the poly-crystal silicon_film_being_formed on the Si_base layer.
Further in this case, the_emitter layer is formed as a_result that an impurity thermal diffusion is_performed on the poly-crystal silicon film.
In_this case, the SiGe base_layer includes_a third SiGe base layer_and a fourth_SiGe base_layer, and a_Si base layer, and wherein a_thickness of the_Si base layer is about 20_nm,_and wherein a_thickness_of_the fourth_SiGe base layer_is_about 5_nm,_and a Ge concentration in the_fourth_SiGe base layer is increased from about_0% to about 2%_from_the side of the_emitter layer towards the side_of the collector layer, and wherein_a thickness_of the_third SiGe base layer is about 5 nm, and a Ge_concentration in the third SiGe base_layer is increased from_about 2%_to_about 10% from_the_side of_the emitter layer towards the side of_the collector_layer.
In order to achieve another aspect_of the present invention,_a_semiconductor with a SiGe base bipolar_transistor manufacturing method, includes: (a) providing_an emitter layer; (b) providing_a_collector_layer; and (c) providing a_SiGe base layer formed of silicon_containing germanium, and_wherein a Ge concentration of the SiGe_base_layer is increased from 0% to_10%_from a side of the emitter_layer_towards_a side of the collector_layer.
Also in this case, the semiconductor_with a SiGe base bipolar transistor manufacturing method further_includes: (d) providing_a P-type silicon substrate; and_(e)_forming_an N+-type buried layer having a high concentration in the_P-type silicon_substrate, and wherein_the collector layer is formed of an N-type having a_low concentration and is formed on the_N+-type buried layer, and wherein the semiconductor with the SiGe