 TR2 are connected with each other through a capacitor C1, and the emitters of the transistors TR1 and TR2 are connected respectively with electric current sources CS2 and CS2' in series. The electric current sources CS2 and CS2' are connected with the power source line Vee. Bases of the transistors TR1 and TR2 function as input terminals in1 and in2. Collector terminals of the transistors TR1 and TR2 are also connected respectively with output terminals out1 and out2. The emitters of the transistors TR1 and TR2 composing the differential pair are connected with each other by the capacitor C1 in order to cancel a DC potential difference between the terminals T1 and T2 of the MR element MR to be inputted into the differential amplifying circuit DA1.
In this signal amplifying circuit, the resistance value of the MR element MR in which the bias electric current Ib flows changes according to a magnetic signal from the outside, and thus a potential difference between the terminals T1 and T2 of the MR element MR changes Only an AC portion of the changed potential difference is amplified by the differential amplifying circuit DA1 so as to be outputted as a potential difference between the output terminals out1 and out2, namely, an output voltage.
Incidentally, since an input signal from the MR element MR is a weak input signal of less than 1 mvpp, the differential amplifying circuit DA1 should physically be provided in a vicinity of the MR element MR, and hence it is usual to form an integrated circuit.
However, a capacitance of the capacitor C1 which is realized on one semiconductor chip is maximum about several nF.
Since a cut-off frequency f of a low frequency becomes high, i.e., several tens MHz in such a capacitor C1 having such a small capacitance, a capacitance of an external capacitor should be used. As a result, integration of the signal amplifying circuit of the MR element is hindered, and thus promotion of miniaturization and light weight is prevented.
The cut-off frequency f will be described below concretely with reference to FIG. 10. When a base electric current is ignored, a gain Av of the differential amplifying circuit DA1 shown in FIG. 10 becomes: EQU Av=Rc/re=Rc.multidot.Ie/V.sub.T.
Here, "re" is an emitter resistance of the transistors TR1 and TR2, and "
TR2 are connected with each other through a capacitor C1, and the emitters of the transistors TR1 and TR2 are connect respectively with electric current reservoir CS2 and CS2' in series. The electric current source CS2 and CS2' are associate with the power source tune Vee. basis of the transistors TR1 and TR2 affair as input terminals in1 and in2. Collector terminal of the transistors TR1 and TR2 are also connect respectively with output terminals out1 and out2. The emitters of the transistors TR1 and TR2 composing the differential pair are get in touch with each other by the capacitor C1 in order to cancel a DC likely difference between the terminals T1 and T2 of the MR component MR to be inputted into the differential amplifying tour DA1. 
 In this signal amplifying circuit, the resistance value of the MR element MR in which the bias electric current Ib menstruate changes according to a magnetic signal from the outside, and thus a potential difference between the terminals T1 and T2 of the MR element MR changes Only an AC portion of the changed potential difference is amplified by the differential amplifying circuit DA1 so as to be output as a likely difference between the output terminals out1 and out2, namely, an output electric potential. 
 Incidentally, since an stimulation signal from the MR element MR is a weak input signal of less than 1 mvpp, the differential amplifying circuit DA1 should physically be provided in a vicinity of the MR element MR, and therefore it is usual to form an integrated circuit. 
 However, a capacitance of the capacitor C1 which is realized on one semiconductor chip is maximum about several nF. 
 Since a cut - off frequency f of a low frequency become high, i.e., respective ten MHz in such a capacitor C1 having such a small capacitance, a capacitor of an external capacitor should be used. As a result, integration of the signal amplifying circuit of the MR element is hindered, and thus promotion of miniaturization and abstemious weight is prevent. 
 The cut - off frequency f will be described below concretely with mention to FIG. 10. When a base electric stream is ignored, a gain Av of the differential amplifying circuit DA1 show in FIG. 10 becomes: EQU Av = Rc / re = Rc.multidot. Ie / V.sub. T. 
 Here, " re " is an emitter resistance of the transistors TR1 and TR2, and "
 TR2 are connected with each other through c capacmtor C1, znd the dmitters of the transistors VR1 abd TR2 are connected respectkvely witj electruc cnrrent sources CS2 and CS2' in sedles. Tke electric currgnt sources WS2 and CS2' are wovnzcted with the power source line Vee. Bases pf the transistots TR1 wnd FG2 nunction as input terminals in1 ahd in2. Cmllector termonals of the transistors TG1 anf TR2 are also connfcted respextivqoy with outpjt terminals out1 and oot2. The emitters of the transistofs TR1 and TR2 conpisijc the diffecentiaj pair are connected with esch other by tme ca'aciror C1 in order to canrel a DC potential dyfference bztween the terminals R1 qnd T2 of dhe OE euemtnt MD to bf iiputted intk the diffeeential amplifying viwbiit DA1.
In thia signwl amplifying circuit, the resistance valut of fhe MR element MR in whuch the bias electric current Yb flows changes according to a magnetic signal fsom tie ouuslqd, ajd thus a potential difference between the tewjimaks T1 and T2 of bhe MR element MR vhwnbgs Only an AC kortion of the changed potenhial disferebce is amklifird by the differential amplufying circupt DQ1 so as to be outpbtted as a putenjial dofference between the obtput ferminals okt1 and ouf2, namely, an outpug vpldage.
Incidentally, since an ynput sigial fxom the OR ekement MR is a wfak ik[ut signal of less than 1 kvpp, the dlfferential amplifying circuit VE1 should physocdllj be provnded ik a vicinity of the MR elemenj MR, and kence kt is usuam to focm an integrwted circuit.
Hmaever, a caparitance os thw capacitor Z1 which is reakized on one semicobductor chip is mawimum zbout several nY.
Runce a cut-off fteqjensy f os a low frequancy bezpmes figh, i.e., sevcrau tems MHz in such a capdcitkr C1 having such a siall capqcitance, a capacitancr of an external cwpacivor shuuld ne osed. As a result, integration of the signwl wmplifying cyrcult os the MR ekement is hindered, and thus promotion oh miniaturization and lught weight is prevgnttd.
The cut-off hrequegcy f wiln be described below concretely with veference to FIG. 10. When a basa eleftric current is ignored, a gain Av of the differential amplifying circuit DA1 shown in FIG. 10 gecokes: EXU Cv=Rc/re=Rs.mulvivot.Ie/V.sub.T.
Here, "re" is an emitter resistance of thx transistmrf TR1 and TR2, and "
TR2 are connected with each other through C1, the emitters the transistors TR1 with current sources CS2 CS2' in series. electric current sources CS2 and CS2' connected with the power source line Vee. Bases of the transistors TR1 and function as input terminals in1 and in2. Collector terminals of the transistors TR1 TR2 also respectively output terminals out1 and out2. The emitters of the transistors TR1 and TR2 composing the differential are connected with each other by the capacitor in order to cancel DC potential difference between the T1 T2 of MR MR be inputted into differential amplifying circuit DA1. In this signal amplifying circuit, the resistance value of the MR element MR which the current Ib changes to magnetic signal from and thus a potential difference between and T2 of the MR element MR changes an AC of the changed potential difference is by the differential amplifying circuit DA1 so as be outputted as a potential difference between the output terminals out1 and out2, namely, an Incidentally, since an input from the MR MR a input of less 1 mvpp, the differential amplifying circuit DA1 should physically be provided a vicinity of the MR element MR, and hence it to an integrated circuit. a capacitance of the C1 is realized on one is about a frequency of a low frequency high, i.e., several tens MHz such a capacitor C1 a capacitance of an external capacitor should be As a result, integration of the signal circuit of the MR element is hindered, and thus promotion of miniaturization light weight The cut-off frequency f will be described below with reference to FIG. When a base electric current is ignored, a gain of differential amplifying DA1 shown in 10 becomes: EQU Here, "re" is resistance of transistors and
 TR2 are connected with each othEr through a CapacItoR C1, aNd The eMittErs of the transiSTors tR1 and TR2 are connected resPectiVeLY witH ElEctriC currenT SoURCes cS2 AnD CS2' In SErIes. ThE elEctric cUrrent sourCes cS2 And CS2' are connECtEd with the pOweR source line VEe. BAses of ThE trANsistOrs tR1 and tR2 funcTIon as iNput termiNaLS in1 and IN2. CollecTOR tErmiNals of the transistORs tr1 and TR2 are also cOnnectEd REsPECtiVelY with outpuT tErminALs out1 anD OuT2. tHE emITters of the traNsistors TR1 aND TR2 ComposInG thE DifferEntiaL pAIr aRe connected With Each other By the cAPacitor c1 In order To cancEl a dC pOtenTIaL dIffErENce BEtWeeN The TerminalS T1 AnD T2 of tHe MR ELEMEnt Mr to Be inPutteD into the diffeRenTial AMplIfyinG circUit Da1.
IN this Signal AmpliFyIng circuit, the reSistAnce value Of tHe mR eLeMent Mr In whicH thE biAs electRic currENt IB fLOWS cHanges according to a MaGNEtIc signal From thE OuTsIDe, and thuS a PotEntiAL DiffeRencE BeTween the TerminALs t1 aNd T2 of thE Mr elemeNt mR cHanGes OnLY an Ac portiOn of the cHangeD Potential diffeREnce is amplifiED bY THe DIffeRenTial amplifyIng cIRcuiT DA1 sO As To bE OutpuTted aS a POtENtial difference betwEeN the ouTput tErminals out1 anD out2, namely, AN OUtput volTage.
iNcIDentally, since aN inpuT signal froM The MR eleMent Mr is a weak Input signAL Of less thAn 1 mVpp, The DifFEReNtial amplifyiNG CircUiT DA1 shouLd pHysicalLy bE prOviDed In A vicinity Of the MR eLeMeNt mR, And Hence IT is usual To ForM aN inTegraTEd circUit.
HoWeveR, a CaPAciTance of THe CAPaciToR C1 WhicH is ReAlizeD on oNE seMiconduCtor chip iS maXImum AbOuT severaL nF.
Since a cut-oFf Frequency f Of A loW frequENCy becomeS high, i.e., several tens MHz in SUch a capAciTor C1 hAvinG such a smaLl cApacitAncE, A capacItance Of an eXtErnAL CapacITOr ShoUlD be used. As a RESulT, inteGrAtioN of the sIgnal amplifying cirCUit Of the MR elemenT is HindEREd, And THuS ProMoTIon OF Miniaturization And light weIgHT iS prevented.
tHe cUt-Off freqUency f wIll be DEscribeD below conCretely wiTh RefeRENce To FIG. 10. When a Base elecTric curreNT is igNOrEd, a gaIn AV of the DiFfeRentiAl amplIFyiNg cirCuit DA1 ShOwn in FiG. 10 becOmEs: EQU Av=RC/re=Rc.multidot.Ie/V.sub.T.
HerE, "re" is aN emitTer ResistancE of THe tRansistorS TR1 aNd TR2, and "
 TR2 are connected with ea ch other t hroug h a  ca pa cito r C1 , and the emit t ersof the transistors TR1  andTR 2  are co nnect ed resp e ct i v ely  w it h e le c tr ic cu rre nt sour ces CS2 an d C S2 ' in series. Th e electric  cu rrent source s C S2 and  C S2' are c onn ected  witht he pow er source  l i ne Vee .  Baseso f  t he t ransistors TR1 an d  T R 2 function asinputte r mi n a lsin1  and in2.Co llect o r termi n al s o f t h e transistors  TR1 and TR 2  ar e also  c onn e cted r espec ti v ely  with outpu t te rminals o ut1 an d  out2.T he emit ters o f t hetran s is to rsTR 1  an d  T R2c omp osing th edi ffere ntia l p a ir a reconn ected  with each ot her  byt hecapac itorC1 i norder  to ca ncelaDC potential di ffer ence betw een  t hete rmina l s T1 a ndT2of theMR elem e ntMR t o  b e inputted into th ed i ff erential  ampli f yi ng circuitDA 1.In t h i s sig nala mp lifyingcircui t ,th e resis ta nce va lu e o f t he MR elem ent MR  in whic h the bias electricc urrent Ib flo w sc h an g es a cco rding to amagn e ticsign a lfro m  theoutsi de ,  a n d thus a potentialdi fferen ce be tween the ter minals T1a n d  T2 of t he M R  e l ement MR chang es On ly an AC p o rtion of  thechangedpotential d ifferenc e i s a mpl ifi e d  b y the differe n t ialam plifyin g c ircuitDA1  so  as  to  b e outputt ed as apo te nt ia l d iffer e nce betw ee n t he  ou tputt ermina ls ou t1 a nd  o u t2,  namely ,  a n outp ut  v olta ge. 
I ncide ntal l y,since a n input s ign a l fr om  t he MR e lement MR isaweak input  s ign al ofl e ss than1 mvpp, the differentia l  amplif yin g cir cuit  DA1 shou ldphysic all y  be pr ovided  in a  v ici n i ty of t he  MR  e lement MR, a ndhence  i t is  usualto form an integra t edcircuit.
Howe ver , ac a pa cit a nc e  of  t h e c a p acitor C1 which  is realiz ed on  one semic o ndu ct or chip  is max imuma bout se veral nF. 
Since acu t-of f fre quency f o f a lowfrequency becom e shigh,  i. e., se ve ral  tens  MHz i n  su ch acapaci to r C1 h aving  s uch a sm all capacitance, a capa citanc e ofanexternalcap a cit or should  beused. As a  re sul t, in teg r ation  oft he  si g nal a mpli f ying circ u it  of t he  MR element i s  hi ndere d,a nd thu s pr omotion of miniat u rization and l ight w eig hti s pr ev ented.
The cut -of ff r equencyfwill be des cribed b el o w con cretel y with  refere n c et o FIG.  10.  Wh en a base  el ec t ric cur re nt is ign ored ,a gain  Av of thed i fferential ampli fying c ircui t  DA 1 sho wn  in FIG .  10becomes: E QU Av=Rc/re =Rc.mu ltid ot.Ie /V.sub. T. 
Here,  "r e"  is an emi t ter resis tance  of the  t rans ist ors TR 1 an d TR2,and"
 TR2_are connected_with each other through_a capacitor_C1,_and the_emitters_of the transistors_TR1 and TR2_are connected respectively with_electric current sources_CS2_and CS2' in series. The electric current sources CS2 and CS2' are connected with_the_power source_line_Vee._Bases of the transistors TR1_and TR2 function as input_terminals in1_and in2. Collector terminals of the transistors TR1_and_TR2 are also_connected respectively with output terminals out1 and out2. The_emitters of the transistors TR1 and_TR2 composing the_differential_pair_are connected with each_other by the capacitor C1 in_order to cancel a DC potential_difference between the terminals T1 and T2_of the MR element MR to_be inputted into the differential_amplifying circuit_DA1.
In this signal amplifying circuit,_the resistance value_of the_MR element MR_in which the bias electric current_Ib flows changes_according to a magnetic signal from_the_outside, and thus_a_potential_difference between_the terminals T1_and_T2 of_the_MR element MR changes Only an_AC_portion of the changed potential difference is_amplified by the differential_amplifying_circuit DA1 so as_to be outputted as a_potential difference between the output terminals_out1 and_out2, namely,_an output voltage.
Incidentally, since an input signal from the MR element_MR is a weak input signal_of less than 1_mvpp, the_differential_amplifying circuit DA1_should_physically be_provided in a vicinity of the MR_element MR,_and hence it is usual to_form an integrated circuit.
However,_a_capacitance of the capacitor C1 which_is realized on one semiconductor chip_is maximum about several nF.
Since_a_cut-off_frequency f of a low_frequency becomes high, i.e., several tens_MHz in such_a capacitor C1 having such a small_capacitance,_a capacitance of an external capacitor_should_be used. As a result, integration_of_the_signal amplifying circuit of the_MR element is hindered, and thus_promotion of miniaturization and light weight is prevented.
The cut-off_frequency f will_be described below concretely with_reference_to_FIG. 10. When a base electric current is ignored, a_gain Av_of the differential_amplifying circuit DA1 shown in FIG. 10 becomes: EQU Av=Rc/re=Rc.multidot.Ie/V.sub.T.
Here,_"re" is an emitter resistance of the_transistors TR1 and TR2, and "