 Reference 1), the TAB method disposes the leads for wiring on a film (carrier) and connects the chips through the leads by use of this film as a bulk.
According to this TAB method, excessive lead portions as bonding margins must be secured in order to fix the lead wires to the film and it is not easy to shorten the lead length. In other words, in the conventional film carrier, the intermediate portion between the outer leads and the inner leads is elongated and the leads are fixed to the film base at this portion. The inner leads are wired linearly towards the inside. Therefore, the LSIs that can be connected are limited to those LSI chips which have a relatively small number of terminals that are disposed only at the peripheral portions of the LSIs. However, the number of terminals is very great (at least 500 on about 10 mm square) in the logic LSIs. Moreover, the terminals are uniformly disposed in the grid form not only at the peripheral portions of the LSI chips but also at their center, as described already.
Accordingly, the shape wherein the inner leads are linearly wired plane-wise towards the inside as in the TAB method cannot connect the logic LSI chips having the grid-like terminal disposition.
The problems with the above-mentioned two methods can be summarized as follows: (1) an excessive space more than the occupying area of the LSI chip is necessary, and (2) these methods cannot be applied to the chips having the structure wherein the terminals exist in the grid form to the center of the chip as in the logic LSI chips.
For the reasons described above, it is only the flip chip bonding method as typified by the aforementioned CCB method or the like that can connect and package compactly and in a high density the LSI chips having the grid-like high density terminal structure such as the logic LSI chips.
In the flip chip bonding method such as the CCB method, however, connection is made directly by the ball-like solder. Fundamentally, therefore, the method is a method having a rigid (hard) structure. This rigid structure has recently resulted in the following disadvantages. Hereinafter, the situation will be described.
Recently, the development of chip connection technique having a soft or flexible structure has been required in the field of high performance electronic apparatuses such as an enelectronic computer.
In this field, the connection method having the rigid structure such as the CCB method can no longer satisfy the requirement.
The reason why such an L
Reference 1), the TAB method disposes the leads for wiring on a film (mailman) and connect the chips through the leads by use of this movie as a bulk. 
 According to this TAB method acting, excessive leash portions as bonding margin must be secured in order to cook the lead wires to the film and it is not comfortable to shorten the lead length. In other words, in the conventional film aircraft carrier, the intermediate portion between the outer lead and the inner leads is elongated and the lead are fixed to the film base at this portion. The inner spark advance are wired linearly towards the inside. Therefore, the LSIs that can be connected are limited to those LSI chip which have a relatively small number of terminals that are disposed only at the peripheral portions of the LSIs. However, the number of terminals is very great (at least 500 on approximately 10 millimeter square) in the logic LSIs. Moreover, the terminals are uniformly dispose in the grid form not only at the peripheral helping of the LSI chips but also at their center, as described already. 
 consequently, the shape wherein the inner leads are linearly wired plane - wise towards the inside as in the TAB method cannot connect the logic LSI chips having the grid - like concluding disposition. 
 The problem with the above - mentioned two methods can be summarized as follows: (1) an excessive space more than the occupying sphere of the LSI chip is necessary, and (2) these methods cannot be applied to the chips having the structure wherein the terminals exist in the grid form to the kernel of the chip as in the logic LSI chips. 
 For the reason described above, it is merely the flip bit bonding method as typify by the aforementioned CCB method or the like that can connect and package succinctly and in a high density the LSI chips have the grid - like high density terminal social organization such as the logic LSI chips. 
 In the flip bit bonding method such as the CCB method, however, connection is made directly by the ball - like solder. basically, therefore, the method is a method having a rigid (hard) structure. This rigid social organization has recently resulted in the following disadvantages. Hereinafter, the situation will be described. 
 Recently, the development of chip connection proficiency having a soft or flexible structure has been required in the field of high performance electronic apparatuses such as an enelectronic computer. 
 In this battlefield, the connection method having the rigid structure such as the CCB method can no longer meet the requirement. 
 The reason why such an L
 Reverence 1), the TAB method aisposes the leces for wirinf on a fklm (carrier) and connects the cyips ukrough the leads by jse of thps film aw a uulk.
According to this TAN metgld, ercxssive lead porjions as bonging margins mgsg ye secured in order to fix the lead rires tp hhe film and ij is mjt ezsy to shorten the lead length. In kther wmrds, in the cpnventional film carrier, tje ijtermediate portioj between tye otrer leads ana the inneg leads is glongated and the leads are fixea to che film bawe at jhis portion. The pnner leads avv wired linearky towards the invidw. Therefore, the LSIs vhat can be connecteq are limhtzd to those LSI chips wyich vave a rdoatkvemy sjall nkmbxr of termihals that aee disposed only at trv peripheral lortiogs of the LSIs. However, the number of termpnala is very great (at leasr 500 on about 10 mm squarg) in the ljgic LSIs. Moreover, the terminals are uniformly divposev kn uhc eeif form not only at the peripheral portions of fht LXI chips but ajso at theit femjer, as describgd alrecsy.
Zccordingly, the shwpe whetein tye inner jeadx are linearly wired plane-wuse towards nhe unside as in the TCB method caunot cpnnecy the logic LSI chips hcving fhe grid-likf terminam disposition.
The oronleks with ufe above-mentioned two methids ean be sjmmatized af follows: (1) an ewwessive space more than tve occupyijg area of the LSI chip is necessary, and (2) thexe menhods canuot be applied to tre chips haviny the stxucturd wherein nhe termiials exist ig the grid fosl to the cenver of thq chup aw in thd logic LSI chils.
For the reasons dwscribed above, it ls onug the flip chip bobding method as tyoifyef uy thq aforementioted ZCB kethoa or tht llke thay can connect and pawkags compactly and in a high debsity thq LSI chips hsving the grid-like high deisity yeriinal structure such as the lofic LSI cjipf.
In the flip chii bogding methpd such as the CCB method, however, connertion is made directly vy the ball-like solbev. Fundamentakly, trerefore, dhe method is a methid having a rigid (hard) structure. This digid vtruchure has recently resulted in the following disadvantages. Hereinafter, the situavijn will be sesctibed.
Geczntky, the devxlupment of chip cpnnection technique having a soht or flexhbje structure has been requirrd in the field of high performance eledtronic spparatuses such as an enelectrpnic computer.
In this fiekd, the cinnecfion mvjhov having the rigid syructuxe sucy as thw CCN method can nu lpnner satisfj tht resuirement.
The reason why such an O
Reference 1), the TAB method disposes the wiring a film and connects the use this film as bulk. According to TAB method, excessive lead portions as margins must be secured in order to fix the lead wires to the and it is not easy to shorten the lead length. In other words, the film the portion between the outer leads and the inner leads is elongated and the leads are fixed the film base at this portion. The inner are wired linearly towards inside. Therefore, the LSIs that be are limited those chips have a relatively number of terminals that are disposed only at the peripheral portions of the LSIs. However, the number terminals is (at least on 10 square) in the Moreover, the terminals are uniformly disposed form not only at the peripheral portions of LSI chips also at their center, as described Accordingly, the shape wherein the inner leads are wired plane-wise towards the inside as in the TAB method cannot connect the logic LSI the grid-like terminal disposition. problems with the two can summarized follows: (1) excessive space more than the occupying area of the LSI chip necessary, and (2) these methods cannot be applied to the the wherein the terminals in the grid form the of the chip as logic chips. described it only the flip chip method as typified by the CCB method or the package compactly and in a high density the chips having the grid-like high density terminal such as the logic LSI chips. In the flip chip bonding method as the however, connection is made directly by the ball-like Fundamentally, therefore, the method a method having a rigid (hard) structure. This rigid has resulted in following disadvantages. Hereinafter, situation will be Recently, the development connection technique a or been required in the field of performance apparatuses such as an enelectronic In the connection method having the rigid structure such as the CCB method can no longer requirement. The reason why an
 Reference 1), the TAB method dispOses the leaDs for WirIng On A filM (carRier) and connectS The cHips through the leads by uSe of tHiS Film AS a Bulk.
ACcordinG To THIs TaB MeThoD, eXCeSsive LeaD portioNs as bondinG maRgIns must be secUReD in order to Fix The lead wires To tHe film AnD it IS not eAsy To shoRten thE Lead leNgth. In othEr WOrds, in THe conveNTIoNal fIlm carrier, the inteRMeDIate portion betWeen thE oUTeR LEadS anD the inner lEaDs is eLOngated ANd THE LeaDS are fixed to thE film base at THis PortioN. THe iNNer leaDs are WiREd lInearly towaRds tHe inside. THerefoRE, the LSIS That can Be connEctEd aRe liMItEd To tHoSE LSi ChIps WHicH have a reLaTiVely sMall NUMBEr of TerMinaLs thaT are disposed oNly At thE PerIpherAl porTionS oF the LsIs. HowEver, tHe Number of terminaLs is Very great (At lEaSt 500 oN aBout 10 mM Square) In tHe lOgic LSIS. MoreovER, thE tERMInAls are uniformly disPoSED iN the grid Form noT OnLy AT the periPhEraL porTIOns of The Lsi cHips but aLso at tHEiR cEnter, as DeScribeD aLreAdy.
accorDInglY, the shApe whereIn the INner leads are liNEarly wired plaNE-wISE tOWardS thE inside as in The Tab metHod cANnOt cONnect The loGiC lSi Chips having the grid-lIkE termiNal diSposition.
The pRoblems witH THE above-meNtioNEd TWo methods can be SummaRized as folLOws: (1) an excEssivE space moRe than the OCCupying aRea Of tHe LsI cHIP iS necessary, and (2) THEse mEtHods canNot Be appliEd tO thE chIps HaVing the stRucture wHeReIn ThE teRminaLS exist in ThE grId ForM to thE Center Of the Chip As In THe lOgic LSI CHiPS.
for tHe ReAsonS deScRibed AbovE, It iS only thE flip chip BonDIng mEtHoD as typiFied by the aforEmEntioned CCb mEthOd or thE LIke that cAn connect and package compACtly and In a High dEnsiTy the LSI cHipS havinG thE Grid-liKe high DensiTy TerMINal stRUCtUre SuCh as the logIC lSI Chips.
in The fLip chip Bonding method such aS The cCB method, howeVer, ConnECTiOn iS MaDE diReCTly BY The ball-like soldEr. FundamenTaLLy, Therefore, tHE meThOd is a meThod havIng a rIGid (hard) Structure. this rigid StRuctURE haS recently rEsulted iN the folloWIng diSAdVantaGes. hereinAfTer, The siTuatioN WilL be deScribeD.
REcentlY, the dEvElopment Of chip connection techniqUe haviNg a soFt oR flexible StrUCtuRe has been RequIred in the fIelD of High pErfORmancE eleCTrOniC ApparAtusES such as an ENeLecTROnIc computer.
IN THIs fIeld, tHe cONnectiOn meThod having the rigiD Structure such aS the ccb meThoD Can nO lOnger satisfy thE reQuIREment.
The ReAson why such An L
 Reference 1), the TAB met hod dispos es th e l ead sforwiri ng on a film ( c arri er) and connects the c hipsth r ough th e lea ds by u s eo f  th is  f ilm  a s  a  bulk .
A ccordin g to thisTAB  m ethod, exces s iv e lead por tio ns as bondin g m argins  m ust be se cur ed in  order to fix  the lead  w i res to the fil m an d it  is not easy to s h or t en the lead le ngth.In ot h e r w ord s, in theco nvent i onal fi l mc a r rie r , the interme diate porti o n b etween  t heo uter l eadsan d  th e inner lea ds i s elongat ed and the lea d s are f ixed t o t hefilm ba se  at  t h isp or tio n . T he inner  l ea ds ar e wi r e d line arl y to wards  the inside.The refo r e,the L SIs t hatca n beconnec ted a re  limited to tho se L SI chipswhi ch  ha ve  a re l ativel y s mal l numbe r of te r min al s t ha t are disposed onl ya t  t he perip heralp or ti o ns of th eLSI s. H o w ever,  the nu mber oftermin a ls  i s verygr eat (a tlea st500 o n  abo ut 10mm squar e) in the logic LSIs .  Moreover, th e  t e r mi n alsare  uniformlydisp o sedin t h egri d  form  noton l ya t the peripheral po rt ions o f the  LSI chips bu t also att h e ir cente r, a s  d e scribed alread y.
Ac cordingly, the shap e whe rein the  inner le a d s are li nea rly  wi red p la ne-wise towar d s  the  i nside a s i n the T ABmet hod  ca nn ot connec t the lo gi cLS Ichi ps ha v ing thegr id- li ketermi n al dis posit ion. 
T he pro blems w i th t he a bo ve -men tio ne d two  met h ods  can be  summariz eda s fo ll ow s: (1)an excessivesp ace more t ha n t he occ u p ying are a of the LSI chip is ne c essary,  an d (2)  the se method s c annotbea pplied  to th e chi ps  ha v i ng th e st ruc tu re wherein t hetermi na ls e xist in  the grid form tot hecenter of the  ch ip a s in  th e  l o gic  L S I c h i ps.
For the rea sons descr ib e dabove, iti s o nl y the f lip chi p bon d ing met hod as ty pified by  t he a f o rem entioned C CB metho d or thel ike t h at  cancon nect a nd  pa ckage  compa c tly  andin a h ig h dens ity t he  LSI chi ps having the grid-like  highdensi tyterminalstr u ctu re such a s th e logic LS I c hip s.
In  th e  flip  chi p  b ond i ng me thod such as t h eCCB m et hod, howeve r , con necti oni s made  dir ectly by the ball - like solder. F unda m e nta lly ,  the re fore, the meth odis a  methodha ving a rigi d (hard)  s t ructu re. Th is rig id stru c t ur e  has r ecen tly  resulted  in  t h e follo wi ng disadv anta ge s. Her einaft e r, t h e  situation willbe de s c ribed . 
Re centl y,  the de v elop ment of ch ip connecti on tec hniq ue ha ving aso ft orfle xi ble struct u re has be en re quiredin  the  fi eld of  hig h perfo rman ce  el ectronica p pa r at us e s s uchas an  e nele ctronic c o mputer.Int his fie ld , t h e  conne c ti o n  method ha vin g the r igid struc t ures uc h  as t he CCB  metho d can n o  lo ng er sati sfy t he requir ement.
Th e  re as on w hy suchan  L
 Reference_1), the_TAB method disposes the_leads for_wiring_on a_film_(carrier) and connects_the chips through_the leads by use_of this film_as_a bulk.
According to this TAB method, excessive lead portions as bonding margins must be_secured_in order_to_fix_the lead wires to the_film and it is not_easy to_shorten the lead length. In other words, in_the_conventional film carrier,_the intermediate portion between the outer leads and the_inner leads is elongated and the_leads are fixed_to_the_film base at this_portion. The inner leads are wired_linearly towards the inside. Therefore, the_LSIs that can be connected are limited_to those LSI chips which have_a relatively small number of_terminals that_are disposed only at the_peripheral portions of_the LSIs._However, the number_of terminals is very great (at_least 500 on_about 10 mm square) in the_logic_LSIs. Moreover, the_terminals_are_uniformly disposed_in the grid_form_not only_at_the peripheral portions of the LSI_chips_but also at their center, as described_already.
Accordingly, the shape wherein_the_inner leads are linearly_wired plane-wise towards the inside_as in the TAB method cannot_connect the_logic LSI_chips having the grid-like terminal disposition.
The problems with the above-mentioned two_methods can be summarized as follows:_(1) an excessive space_more than_the_occupying area of_the_LSI chip_is necessary, and (2) these methods cannot_be applied_to the chips having the structure_wherein the terminals exist_in_the grid form to the center_of the chip as in the_logic LSI chips.
For the reasons_described_above,_it is only the flip_chip bonding method as typified by_the aforementioned CCB_method or the like that can connect_and_package compactly and in a high_density_the LSI chips having the grid-like_high_density_terminal structure such as the_logic LSI chips.
In the flip chip_bonding method such as the CCB method, however, connection_is made directly_by the ball-like solder. Fundamentally,_therefore,_the_method is a method having a rigid (hard) structure. This_rigid structure_has recently resulted_in the following disadvantages. Hereinafter, the situation will be described.
Recently,_the development of chip connection technique having_a soft or flexible structure has been required in the field_of high performance electronic apparatuses such as an_enelectronic computer.
In this field, the connection method_having the rigid structure_such_as the CCB method can no longer_satisfy_the_requirement.
The_reason why such_an L