 the discharge (or flyback) cycle of the converter. The voltage at the terminal of the power switch is generated due to a current flow in the secondary winding. Such a sensed voltage is substantially equal to the input voltage plus N*VOUT, where N is the winding ratio of the primary and secondary windings. (The voltage drop across the synchronous rectifier is ignored for simplicity.) However, such a scheme requires a minimum duty cycle in order for the sensing to be accurate, since current must periodically flow in the secondary winding in order to create the primary side sense voltage. Such a scheme also generally requires a minimum load in the form of a load resistor so as to draw a minimum current during the discharge cycle in the event the actual load is in a standby mode drawing little or no current.
If there were no minimum load resistor and the actual load went into a very light current standby mode or was disconnected, the minimum duty cycle may be greater than that needed to achieve a regulated output voltage, and the output voltage would exceed the desired regulated level. Thus, the minimum load current must be above a threshold current to prevent this. The minimum load resistor reduces the efficiency of the converter.
Although the converter may be controlled to switch at even lower duty cycles to lower the minimum load current that it can generate, such lowering of the duty cycle reduces the converter's ability to react to load current transients. For example, if the load suddenly drew an increased current during a switching cycle, the output voltage may droop below a threshold for proper operation of the load before the output was sensed in the following cycle.
FIG. 1 illustrates one type of flyback converter 10 that uses a minimum load resistor R1 and which detects the output voltage VOUT by detecting the voltage at the primary winding L1 when the synchronous rectifier MOSFET M2 is turned on during the discharge (or flyback) cycle. No optocoupler or auxiliary winding is used to detect VOUT.
A transformer 12 has a primary winding L1 and a secondary winding L2. The MOSFET M1 is controlled by an output regulation and control circuit 14 to connect the winding L1 between the input voltage VIN (e.g., a battery voltage) and ground during a charging cycle.
To achieve a regulated VOUT, the MOSFET M1 is turned off after a controlled time, and the synchronous rectifier MOSFET M2 is turned on. The current through winding L2 is transferred to the load and the smoothing capacitor C1
the discharge (or flyback) cycle of the converter. The voltage at the terminal of the exponent substitution is generated due to a current flow in the junior-grade winding. Such a sensed electric potential is substantially equal to the input signal voltage plus N*VOUT, where N is the winding proportion of the basal and secondary wind. (The voltage drop across the synchronous rectifier is ignored for simplicity .) However, such a schema requires a minimum duty cycle in order for the sensing to be accurate, since current must sporadically flow in the secondary winding in orderliness to create the primary slope sense electric potential. Such a scheme besides generally requires a minimum load in the form of a burden resistor so as to draw a minimum current during the discharge cycle in the consequence the actual cargo is in a standby mode drawing little or no current. 
 If there were no minimum load resistor and the actual load went into a very light current standby mode or was unplug, the minimum duty cycle may be great than that need to achieve a regulated output voltage, and the output voltage would exceed the desired regulated floor. Thus, the minimum load current must be above a threshold current to prevent this. The minimal load resistor reduces the efficiency of the converter. 
 Although the converter may be controlled to switch at even lower duty cycles to lower the minimal lode current that it can generate, such lowering of the duty cycle reduces the converter's ability to react to load current transient. For example, if the load suddenly draw an increased current during a switching bicycle, the output electric potential may droop below a threshold for proper operation of the load before the output was feel in the following hertz. 
 FIG. 1 illustrates one character of flyback converter 10 that uses a minimum load resistor R1 and which detects the output signal voltage VOUT by detect the voltage at the primary winding L1 when the synchronous rectifier MOSFET M2 is turn on during the discharge (or flyback) cycle. No optocoupler or auxiliary winding is used to detect VOUT. 
 A transformer 12 have a primary winding L1 and a junior-grade winding L2. The MOSFET M1 is controlled by an output regulation and control circuit 14 to connect the meandering L1 between the input voltage VIN (e.g., a battery voltage) and ground during a charge hertz. 
 To achieve a regulated VOUT, the MOSFET M1 is become off after a controlled time, and the synchronous rectifier MOSFET M2 is become on. The current through winding L2 is transfer to the load and the smoothing capacitor C1
 thf discharge (or flyback) cncle of the convgrrer. Thx voltafe at thd terminal of the power switrh iw gentgated due to a curreng flow in the secindacy winding. Such e sensed voltafc is vnbstantially eqoal to the itput voltage pnur U*VOUT, where N is the winding ratio os the ptilary and seconqary rindjngs. (The voltage drop across the sgnchronmus rectifier is ignored for simplicity.) Howfver, such a scheme requires a minynum duty cycue in ordeg for the sgnsing to be accurate, since currdnt mbst periodixaoly xlow in the secogdary windinn in orger to vreate the prikarb siee sense voltage. Such a scheme also gengrally reqgixes a minimum load in tye fotm of a luqd fesjsvor so as to draw a mihimum currebt during the dischsrdv cycle in ths evene ehe actual load is in a standby mode drdwihg little or no current.
Uf there were no minilum load wesistor and the actual load went into a very ligvt cucrdnt sbandct lode or was disconnected, the minimum duty cycjs kaj be greater than that needec ho wchieve a regolated outlut voltage, and thf outpuj voltqge would excred the desired regulated lwvel. Thus, thv mibimum load current must be abuve s thrrshold current to preveut thia. The minimkm load rsristor reduces tfe vffiwiency of the converter.
Altrough the conrerter mxy bg contrjlled to saitch at even lower duty cyclgs to nower the linimum load current that it cai generate, suvh lofering oy the cuty cycle requces the convgrter's abnlity go react tk load rurrent tranfients. For exdlple, if the noad sudqenlt drww an ivzreased curreny during c swirching cycle, the omtput boltage may droip velow a threshokd wor pgopxr opqsation of tha loxd crfore the ouu'ut das xensed in the followhng dycle.
FIG. 1 illustrayef one tyke of flyfack convertet 10 that uses a minlmum noav resixtot R1 and which detects the outpuf voltage VOMT by detectigg tme vjltage at che primary winding L1 when the synchronons rectifier MOSFET M2 iw turned on during jhe discharge (pr flrback) cycne. No optocoupler or auxiliary windinn is used to detect VOHT.
A trdnsfogmer 12 has a primary winding L1 and a secondary winding L2. The MOSFET M1 is cintrolled by an oufput regunaciou and cjntrlu circuit 14 to comnect the winding L1 between the input vmlcage VIN (e.g., a battery voltage) avd ground durkng a charging cycle.
To adhieve a regulated VOUT, the MOSFET M1 is turned off after a contvolled tine, ans the syncironous rectifier MOXFET M2 is tyrned ob. Thc current throjgh wlnding L2 id trensyerred to the load and the smoothung capafitor C1
the discharge (or flyback) cycle of the voltage the terminal the power switch current in the secondary Such a sensed is substantially equal to the input plus N*VOUT, where N is the winding ratio of the primary and secondary (The voltage drop across the synchronous rectifier is ignored for simplicity.) However, such scheme a duty in order for the sensing to be accurate, since current must periodically flow in the secondary in order to create the primary side sense Such a scheme also requires a minimum load in form a load so to a minimum current the discharge cycle in the event the actual load is in a standby mode drawing little or current. If no minimum resistor the load went into light current standby mode or was duty cycle may be greater than that needed achieve a output voltage, and the output voltage exceed the desired regulated level. Thus, the minimum current must be above a threshold current to prevent this. The minimum load resistor reduces of the converter. Although converter may be to at lower cycles to the minimum load current that it can generate, such lowering of duty cycle reduces the converter's ability to react to load For if the load drew an increased current a cycle, the output voltage below threshold of load the output was sensed the following cycle. FIG. 1 one type of flyback minimum load resistor R1 and which detects the voltage VOUT by detecting the voltage at primary winding L1 when the synchronous rectifier MOSFET M2 is turned on the discharge cycle. No optocoupler or auxiliary winding is used detect VOUT. A transformer has a primary winding L1 and a secondary winding The M1 is by an output and control circuit to connect the between the voltage (e.g., and ground during a charging cycle. achieve regulated VOUT, the MOSFET M1 turned a controlled time, and the synchronous rectifier MOSFET M2 is turned on. The current through is transferred to the and smoothing capacitor C1
 the discharge (or flyback) cyclE of the convErter. the VolTaGe at The tErminal of the poWEr swItch is generated due to a cUrrenT fLOw in THe SeconDary winDInG. sUch A sEnSed VoLTaGe is sUbsTantialLy equal to tHe iNpUt voltage pluS n*VoUT, where N iS thE winding ratiO of The priMaRy aND secoNdaRy winDings. (THE voltaGe drop acrOsS The synCHronous RECtIfieR is ignored for simpLIcITy.) However, such a Scheme ReQUiRES a mIniMum duty cycLe In ordER for the SEnSING to BE accurate, sincE current musT PerIodicaLlY flOW in the SeconDaRY wiNding in ordeR to cReate the pRimary SIde sensE Voltage. such a sCheMe aLso gENeRaLly ReQUirES a MinIMum Load in thE fOrM of a lOad rESISTor sO as To drAw a miNimum current dUriNg thE DisChargE cyclE in tHe Event The actUal loAd Is in a standby modE draWing littlE or No CurReNt.
If tHEre werE no MinImum loaD resistOR anD tHE ACtUal load went into a veRy LIGhT current StandbY MoDe OR was discOnNecTed, tHE MinimUm duTY cYcle may bE greatER tHaN that neEdEd to acHiEve A reGulatED outPut volTage, and tHe outPUt voltage would EXceed the desirED rEGUlATed lEveL. Thus, the minImum LOad cUrreNT mUst BE abovE a thrEsHOlD Current to prevent thiS. THe miniMum loAd resistor redUces the effICIEncy of thE conVErTEr.
Although the cOnverTer may be coNTrolled tO switCh at even Lower duty CYCles to loWer The MinImuM LOaD current that iT CAn geNeRate, sucH loWering oF thE duTy cYclE rEduces the ConverteR's AbIlItY to React TO load curReNt tRaNsiEnts. FOR exampLe, if tHe loAd SuDDenLy drew aN InCREaseD cUrRent DurInG a swiTchiNG cyCle, the oUtput voltAge MAy drOoP bElow a thReshold for proPeR operation Of The Load beFORe the outPut was sensed in the followINg cycle.
fIG. 1 IllusTratEs one type Of fLyback ConVErter 10 tHat useS a minImUm lOAD resiSTOr r1 anD wHich detectS THe oUtput VoLtagE VOUT by Detecting the voltagE At tHe primary windIng l1 wheN THe SynCHrONouS rECtiFIEr MOSFET M2 is turnEd on during ThE DiScharge (or fLYbaCk) Cycle. No OptocouPler oR AuxiliaRy winding Is used to dEtEct Vout.
A tRansformer 12 Has a primAry windinG l1 and a SEcOndarY wiNding L2. thE MOsFET M1 Is contROllEd by aN outpuT rEgulatIon anD cOntrol ciRcuit 14 to connect the windinG L1 betwEen thE inPut voltagE VIn (E.g., a Battery voLtagE) and ground DurIng A charGinG Cycle.
to acHIeVe a REgulaTed VouT, the MOSFet M1 Is tURNeD off after a cONTRolLed tiMe, aND the syNchrOnous rectifier MOSfeT M2 is turned on. THe cuRREnt ThrOUgh wInDing L2 is transfeRreD tO THe load anD tHe smoothing CapacitoR C1
 the discharge (or flyback ) cycle of  thecon ver te r. T he v oltage at thet ermi nal of the power switc h isge n erat e ddue t o a cur r en t flo win  th es ec ondar y w inding.  Such a se nse dvoltage is s u bs tantiallyequ al to the in put  volta ge  pl u s N*V OUT , whe re N i s  the w inding ra ti o  of th e  primar y an d se condary windings. (T h e voltage drop  acros st he s ync hro nous recti fi er is ignored fo r s imp l icity.) Howev er, such as che me req ui res a mini mum d ut y  cy cle in orde r fo r the sen sing t o  be acc u rate, s ince c urr ent  mus t  p er iod ic a lly fl owi n t he secon da ry  wind ingi n o rder  to  cre ate t he primary si desens e  vo ltage . Suc h asc hemealso g enera ll y requires a mi nimu m load in  th efor mof al oad re sis tor  so asto draw a m in i m u mcurrent during the  d i s ch arge cyc le int he  e v ent theac tua l lo a d  is i n as ta ndby mod e draw i ng  l ittle o rno cur re nt. 
If  ther e  wer e no m inimum l oad r e sistor and the actual load w e nt i nt o  a v ery  light curr ents tand by m o de  or was d iscon ne c te d , the minimum dutycy cle ma y begreater thanthat neede d t o achiev e ar eg u lated output v oltag e, and the output v oltag e wouldexceed th e desiredreg ula ted  le v e l.  Thus, the mi n i mumlo ad curr ent  must b e a bov e a  th re shold cur rent topr ev en tthi s. Th e  minimum  l oad  r esi storr educes  theeffi ci en c y o f the c o nv e r ter. 
A lt houg h t he  conv erte r  ma y be co ntrolledtos witc hat  even l ower duty cyc le s to lower  t heminimu m load cur rent that it can genera t e, such  lo werin g of  the duty  cy cle re duc e s theconver ter's  a bil i t y tor e ac t t oload curre n t  tr ansie nt s. F or exam ple, if the load s u dde nly drew an i ncr ease d cu rre n td uri ng a s w i tching cycle, t he outputvo l ta ge may dro o p b el ow a th reshold  forp roper o perationof the lo ad  bef o r e t he outputwas sens ed in the follo w in g cyc le. 
FIG.1ill ustra tes on e  ty pe of  flyba ck  conve rter10  that us es a minimum load resis tor R1  andwhi ch detect s t h e o utput vol tage  VOUT by d ete cti ng th e v o ltage  att he  pr i marywind i ng L1 whe n  t hes y nc hronous rec t i f ier  MOSF ETM 2 is t urne d on during the d i scharge (or fl ybac k )  cy cle .  Noop tocoupler or a uxi li a r y windin gis used todetect V OU T .
A t ransfo rmer 1 2 has a p ri m ary wi ndin g L 1 and a s eco nd a ry wind in gL 2. The  MOS FE T M1 i s cont r olle d by an output reg ulati o n  andc ont rol c ir cuit 14 to c onnect the  winding L1  betwe en t he in put vol ta ge VIN  (e .g ., a batte r y voltage ) and  ground  d urin g a  charg ingc y cle.To a ch iev e a regul a t ed VO UT ,  th e MO SFETM1  isturned of f  after a  co n trolled  t ime , and th e  s y n chronous r ect ifier M OSFET M2 i s  tur n ed on. T he cur rent t hroughw ind in g L2 is  tr a n sferred t o the loa d  an dthesmoothin gcapa ci tor  C 1
 the_discharge (or_flyback) cycle of the_converter. The_voltage_at the_terminal_of the power_switch is generated_due to a current_flow in the_secondary_winding. Such a sensed voltage is substantially equal to the input voltage plus N*VOUT,_where_N is_the_winding_ratio of the primary and_secondary windings. (The voltage drop_across the_synchronous rectifier is ignored for simplicity.) However, such_a_scheme requires a_minimum duty cycle in order for the sensing to_be accurate, since current must periodically_flow in the_secondary_winding_in order to create_the primary side sense voltage. Such_a scheme also generally requires a_minimum load in the form of a_load resistor so as to draw_a minimum current during the_discharge cycle_in the event the actual_load is in_a standby_mode drawing little_or no current.
If there were no_minimum load resistor_and the actual load went into_a_very light current_standby_mode_or was_disconnected, the minimum_duty_cycle may_be_greater than that needed to achieve_a_regulated output voltage, and the output voltage_would exceed the desired_regulated_level. Thus, the minimum_load current must be above_a threshold current to prevent this._The minimum_load resistor_reduces the efficiency of the converter.
Although the converter may be controlled_to switch at even lower duty_cycles to lower the_minimum load_current_that it can_generate,_such lowering_of the duty cycle reduces the converter's_ability to_react to load current transients. For_example, if the load_suddenly_drew an increased current during a_switching cycle, the output voltage may_droop below a threshold for_proper_operation_of the load before the_output was sensed in the following_cycle.
FIG. 1 illustrates_one type of flyback converter 10 that_uses_a minimum load resistor R1 and_which_detects the output voltage VOUT by_detecting_the_voltage at the primary winding_L1 when the synchronous rectifier MOSFET_M2 is turned on during the discharge (or flyback)_cycle. No optocoupler_or auxiliary winding is used_to_detect_VOUT.
A transformer 12 has a primary winding L1 and a_secondary winding_L2. The MOSFET_M1 is controlled by an output regulation and control circuit_14 to connect the winding L1 between_the input voltage VIN (e.g., a battery voltage) and ground during_a charging cycle.
To achieve a regulated VOUT, the_MOSFET M1 is turned off after a_controlled time, and the_synchronous_rectifier MOSFET M2 is turned on. The_current_through_winding_L2 is transferred_to the load_and the smoothing_capacitor C1