 by Takahashi et al, IEEE 1992 Custom Integrated Circuits Conference 23.3.1-23.3.4. In that solution, different types of transistors are introduced to exclude undesirable leakage paths and to prevent oxide stress. This solution suffers from the disadvantage that it requires different fabrication techniques to produce the entire circuit, an expensive option.
Another problem displayed by the circuit 10 is that the p-channel device 12 does not provide any electrostatic discharge (ESD) clamping action for over-shoot conditions of any voltage present at the terminal OUT. Since the device 12 is held off under all over-shoot conditions of the voltage at the terminal OUT, the device 12 can not be used to clamp the output when electrostatic discharge occurs (in conventional output drivers the output devices and junction diodes are combined to reduce damage from electrostatic discharge). With this prior art circuit 10, additional devices (not shown) must be added to eliminate problems caused by electrostatic discharge; and this addition results in the circuit 10 occupying additional silicon area.
The circuit 10 also includes a method for isolating the n-well of the p-channel devices when the P+/N- diodes would otherwise be forwarded biased resulting in leakage current. P-channel transistor device 24 acts as a switch between the positive supply Vdd and the well bias source. The device 24 is directly controlled by the voltage at the terminal OUT and is disabled when the input voltage at the OUT terminal comes within a threshold voltage Vpt of the 3.3 volt source voltage therefore eliminating the leakage path to the well before the diodes can be forwarded biased. Since conduction by the device 24 is controlled directly by the voltage at the terminal OUT, care must be taken to protect the gate of the device 24 from electrostatic discharge damage. Such protection also adds extra circuitry to the silicon.
It is desirable to eliminate the range in which leakage current can occur in an off-chip driver circuit which receives input signals at its output terminal which input signals may have values greater than the internal source voltage of the driver circuit.
It is also desirable to provide protection against electrostatic discharge in an off-chip driver circuit without increasing the size of the circuit. 1. Technical Field
An aspect of the present invention relates to a conveyer device capable of conveying a sheet along a conveyer path.
2. Related Art
A conveyer device for conveying a sheet along a conveyer path formed inside is known. The conveyer device may include, for example, an image recording apparatus such as a printer and a multifunction peripheral device (
by Takahashi et al, IEEE 1992 Custom Integrated Circuits Conference 23.3.1 - 23.3.4. In that solution, different types of transistors are introduced to bar undesirable escape paths and to prevent oxide stress. This solution suffer from the disadvantage that it ask different fabrication proficiency to grow the entire tour, an expensive option. 
 Another problem display by the circuit 10 is that the p - duct device 12 does not leave any electrostatic discharge (ESD) clamping action for over - shoot conditions of any electric potential present at the terminal OUT. Since the device 12 is held off under all over - shoot conditions of the electric potential at the terminal OUT, the device 12 cannot be used to clamp the output when electrostatic discharge occurs (in ceremonious output driver the output devices and junction diode are combined to reduce damage from electrostatic discharge). With this prior art circuit 10, additional devices (not shown) must be added to eliminate problems caused by electrostatic discharge; and this addition results in the tour 10 occupying additional silicon sphere. 
 The racing circuit 10 besides includes a method for isolating the n - well of the p - channel devices when the P+/N- diodes would otherwise be forward biased resulting in leakage current. P - channel transistor device 24 acts as a switch between the positive supply Vdd and the well bias source. The device 24 is immediately controlled by the electric potential at the terminal OUT and is disabled when the input voltage at the OUT terminal comes within a threshold electric potential Vpt of the 3.3 volt source voltage therefore eliminating the leakage path to the well before the diodes can be forwarded biased. Since conduction by the device 24 is manipulate directly by the electric potential at the terminal OUT, care must be taken to protect the gate of the device 24 from electrostatic discharge damage. Such protective covering also total extra circuitry to the silicon. 
 It is desirable to excrete the range in which leakage current can occur in an off - chip driver lap which receives input signals at its output terminal which input signals may have values great than the internal source electric potential of the driver circuit. 
 It is also desirable to provide protection against electrostatic discharge in an off - chip driver circuit without increase the size of the circuit. 1. Technical Field 
 An aspect of the present invention relates to a conveyer device capable of conveying a plane along a conveyer belt path. 
 2. Related Art 
 A conveyer device for conveying a sheet along a conveyer path formed inside is know. The conveyer device may include, for example, an trope recording apparatus such as a printer and a multifunction peripheral device (
 by Takahashi et al, IEEE 1992 Cmstom Integrated Circuivs Confsrence 23.3.1-23.3.4. Kn that solution, different tbpes of teansistors are introduzed to exblude undwsireble leakage patia and to prevskt oxndx stress. This splution suxfers from the dkscdvantage that it requires different fabricstlon techniques to kroquce nht entire circuit, an expensive optjon.
Anotier problem disllayed by the circuit 10 is hhat the p-channel devife 12 does noj prjcide any eleztrostatic discharge (EAD) clamping action for over-shoog conbitions of qnt vlntage preseit at nhe terminal OUT. Sinca the drvice 12 is held ofh uneer all over-shoot convitions of the voltade at the tzrminal OUT, the devicw 12 can tot te urwd go dlemp the oktpnt when eledtrostatic eischarge occurs (in cjbventional oufput dwiders the output devices and junction dimdea are combined to reducw damage from electrodtatic difcharge). With this prior art circuit 10, additional davicea (nou whown) nudt be added to eliminate problems caused by ejscuroxtatic discharne; and this additipn rrfults in the zircuic 10 kccupying additionwl silison aeea.
The ciwcuiy 10 also includes a method fir isolating rhe n-well of the p-ehannel deviees whgn the P+/N- diodes would otherwnse be forwarded hiased reajlting in leakagd clrrett. P-channel transistor devyce 24 acts as c switch beteeen tre positivf supiny Vdd and the welp biad vource. The device 24 is directly controlled by the voltagg ad tve termiual OUB and is disablqd when the inkut voltaye at ghe OUT tegminal cokes within w threshold vmptage Vpt of the 3.3 vojt siurcw voltaed therefore elominating the leakate path to the welk bgfkre the diodes ecn be forwarded boasdd. Fijcx conqgction by tha dexicd 24 is zontrolled bifectky by the voltage at the terminal OUT, care mmst be tajen to pwotect the gaye of the device 24 vrom xlectrustatoc qischarge damage. Such protectikn also afds extra circuytry to the silieon.
It is desirable to eliminate the rangx in which leakage curtent can occur in an pnf-chip drivec circtit which receives input signqls at its output terminal which input signans maj have values greater than the internal source voltage of the driver circyit.
It ms also desirzble to pgovnde protestioi egainst electroststic discharge in an off-chip drmver circuht without increasing the size ow the circuit. 1. Technical Field
An aspedt of thr present invention relates to s conveyer device capablc of convwying a shevj auong a conveyer payh.
2. Relcted Aet
A conceyev device for cunvrylng a sheeh alpny a conveyer path formed inside iw knowb. Hhe conveyer devmce may inclmdt, for eqample, wn image recordihg aloaratos such as a ptinter and a miltifunction periphegal device (
by Takahashi et al, IEEE 1992 Custom Conference In that different types of undesirable paths and to oxide stress. This suffers from the disadvantage that it different fabrication techniques to produce the entire circuit, an expensive option. Another problem by the circuit 10 is that the p-channel device 12 does not provide electrostatic (ESD) action over-shoot conditions of any voltage present at the terminal OUT. Since the device 12 is held under all over-shoot conditions of the voltage at terminal OUT, the device can not be used to the when electrostatic occurs conventional drivers the output and junction diodes are combined to reduce damage from electrostatic discharge). With this prior art circuit 10, devices (not be added eliminate caused electrostatic discharge; and results in the circuit 10 occupying The circuit 10 also includes a method for the n-well the p-channel devices when the P+/N- would otherwise be forwarded biased resulting in leakage P-channel transistor device 24 acts as a switch between the positive supply Vdd and the source. The device 24 directly controlled by voltage the OUT is disabled the input voltage at the OUT terminal comes within a threshold Vpt of the 3.3 volt source voltage therefore eliminating the to well before the can be forwarded biased. conduction the device 24 is by voltage OUT, must taken to protect the of the device 24 from discharge damage. Such protection the silicon. It is desirable to eliminate the in which leakage current can occur in off-chip driver circuit which receives input signals at its output terminal which signals may greater than the internal source voltage of the circuit. It is also to provide protection against electrostatic discharge in an off-chip circuit increasing the of the circuit. Technical Field An of the present to a device of along a conveyer path. 2. Related A device for conveying a sheet a formed inside is known. The conveyer device may include, for example, an image recording apparatus a printer and a peripheral (
 by Takahashi et al, IEEE 1992 Custom integrated circuIts conFeRencE 23.3.1-23.3.4. In tHat solution, difFErenT types of transistors are IntroDuCEd to EXcLude uNdesiraBLe LEAkaGe PaThs AnD To PreveNt oXide strEss. This solUtiOn Suffers from tHE dIsadvantagE thAt it requires DifFerent FaBriCAtion TecHniquEs to prODuce thE entire ciRcUIt, an exPEnsive oPTIoN.
AnoTher problem displaYEd BY the circuit 10 is tHat the P-cHAnNEL deVicE 12 does not prOvIde anY ElectroSTaTIC DisCHarge (ESD) clampIng action foR OveR-shoot CoNdiTIons of Any voLtAGe pResent at the TermInal OUT. SiNce the DEvice 12 is HEld off uNder alL ovEr-sHoot COnDiTioNs OF thE VoLtaGE at The termiNaL OuT, the DeviCE 12 CAN not Be uSed tO clamP the output wheN elEctrOStaTic diScharGe ocCuRs (in cOnventIonal OuTput drivers the oUtpuT devices aNd jUnCtiOn DiodeS Are comBinEd tO reduce Damage fROm eLeCTROsTatic discharge). With ThIS PrIor art ciRcuit 10, aDDiTiONal devicEs (Not ShowN) MUst be AddeD To EliminatE problEMs CaUsed by eLeCtrostAtIc dIscHarge; ANd thIs addiTion resuLts in THe circuit 10 occupYIng additional SIlICOn ARea.
THe cIrcuit 10 also iNcluDEs a mEthoD FoR isOLatinG the n-WeLL oF The p-channel devices wHeN the P+/N- DiodeS would otherwiSe be forwarDED Biased reSultINg IN leakage currenT. P-chaNnel transiSTor devicE 24 acts As a switcH between tHE Positive SupPly vdd And THE wEll bias source. tHE devIcE 24 is direCtlY controLleD by The VolTaGe at the teRminal OUt aNd Is DiSabLed whEN the inpuT vOltAgE at The OUt TerminAl comEs wiThIn A ThrEshold vOLtAGE Vpt Of ThE 3.3 volT soUrCe volTage THerEfore elIminating The LEakaGe PaTh to the Well before the DiOdes can be fOrWarDed biaSED. Since coNduction by the device 24 is coNTrolled DirEctly By thE voltage aT thE termiNal ouT, care Must be Taken To ProTECt the GATe Of tHe Device 24 from ELEctRostaTiC disCharge dAmage. Such protectioN AlsO adds extra cirCuiTry tO THe SilICoN.
it iS dESirABLe to eliminate thE range in whIcH LeAkage curreNT caN oCcur in aN off-chiP drivER circuiT which recEives inpuT sIgnaLS At iTs output teRminal whIch input sIGnals MAy Have vAluEs greaTeR thAn the InternAL soUrce vOltage Of The driVer ciRcUit.
It is aLso desirable to provide prOtectiOn agaInsT electrosTatIC diScharge in An ofF-chip driveR ciRcuIt witHouT IncreAsinG ThE siZE of thE cirCUit. 1. TechniCAl fieLD
an Aspect of the PRESenT inveNtiON relatEs to A conveyer device caPAble of conveyinG a shEET alOng A ConvEyEr path.
2. Related ARt
A CoNVEyer deviCe For conveyinG a sheet aLoNG a conVeyer pAth forMed insiDE Is KNown. ThE conVeyEr device mAy iNcLUde, for eXaMpLE, an imaGe reCoRding aPparatUS sucH AS a printer and a mulTifunCTIon peRIphEral dEvIce (
 by Takahashi et al, IEEE1992 Custo m Int egr ate dCirc uits  Conference 23 . 3.1- 23.3.4. In that soluti on, d if f eren t  t ypesof tran s is t o rsar eint ro d uc ed to  ex clude u ndesirable  le ak age paths an d  t o preventoxi de stress. T his  solut io n s u ffers  fr om th e disa d vantag e that it  r e quires differe n t  f abri cation techniques to produce the en tire c ir c ui t ,  an  ex pensive op ti on.
A n other p r ob l e m  di s played by the  circuit 10 isthat t he  p- c hannel  devi ce 12does not pr ovid e any ele ctrost a tic dis c harge ( ESD) c lam pin g ac t io nfor  o v er- s ho otc ond itions o fan y vol tage p r e sent  at  the  term inal OUT. Sin cethed evi ce 12  is h eldof f und er all  over -s hoot conditions  ofthe volta geat  th etermi n al OUT , t hedevice12 cann otbe u s ed  to clamp the outp ut w he n electr ostati c  d is c harge oc cu rs(inc o nvent iona l  o utput dr iverst he  o utput d ev ices a nd  ju nct ion d i odes  are c ombinedto re d uce damage fro m  electrostati c  d i s ch a rge) . W ith this pr iora rt c ircu i t10, addit ional  d e vi c es (not shown) must  b e adde d toeliminate pro blems caus e d by elect rost a ti c  discharge; an d thi s addition resultsin th e circui t 10 occu p y ing addi tio nal  si lic o n  a rea.
The circ u i t 10  a lso inc lud es a me tho d f oriso la ting then-well o fth ep- cha nneld evices w he n t he  P+ /N- d i odes w ouldothe rw is e  be  forwar d ed b iase dre sult ing  i n lea kage cur rent. P -channeltra n sist or  d evice 2 4 acts as a s wi tch betwee nthe  posit i v e supply  Vdd and the well biass ource.The  devi ce 2 4 is dire ctl y cont rol l ed bythe vo ltage  a t t h e  term i n al  OU Tand is dis a b led  when  t he i nput vo ltage at the OUT t e rmi nal comes wit hin  a t h r es hol d  v o lta ge Vpt o f the 3.3 voltsource vol ta g ethereforee lim in ating t he leak age p a th to t he well b efore the  d iode s can  be forwar ded bias ed. Since condu c ti on by  th e devi ce  24  is c ontrol l eddirec tly by  t he vol tageat  the ter minal OUT, care must be  taken  to p rot ect the g ate ofthe devic e 24  from elec tro sta tic d isc h argedama g e.  Su c h pro tect i on also a d ds  ex t r acircuitry t o t hesilic on. It isdesi rable to eliminat e  the range inwhic h lea kag e  cur re nt can occur i n a no f f-chip d ri ver circuit  which r ec e ivesinputsignal s at it s ou t put te rmin alwhich inp utsi g nals ma yha v e valu es g re ater t han th e  int e r nal source volta ge of t he dr i ver  circ ui t.
It i s  als o desirabl e to provid e prot ecti on ag ainst e le ctrost ati cdischargei n an off- chipdriverci rcui t w ithout  inc r e asing  the  s ize  of the c i r cu i t.  1 .  Te chni cal F ie ld
A n aspecto f the pr ese n t inven ti onr e latest oa conveyer d evi ce ca p a ble of con v eyin g  a sheet  along  a con veyer p a th. 
2 . Relat edA r t
A conve yer devic e  fo rconv eying ash eetal ong  a  conveyer pathformed i nside is k nown.The conv e yer de vi ce may inclu de, f or example , animage r e cor din g a ppar atu s su c h as a printer and a mul tifu nctio n  pe riphe ral d ev ice (
 by_Takahashi et_al, IEEE 1992 Custom_Integrated Circuits_Conference_23.3.1-23.3.4. In_that_solution, different types_of transistors are_introduced to exclude undesirable_leakage paths and_to_prevent oxide stress. This solution suffers from the disadvantage that it requires different fabrication_techniques_to produce_the_entire_circuit, an expensive option.
Another problem_displayed by the circuit 10_is that_the p-channel device 12 does not provide any_electrostatic_discharge (ESD) clamping_action for over-shoot conditions of any voltage present at_the terminal OUT. Since the device_12 is held_off_under_all over-shoot conditions of_the voltage at the terminal OUT,_the device 12 can not be_used to clamp the output when electrostatic_discharge occurs (in conventional output drivers_the output devices and junction_diodes are_combined to reduce damage from_electrostatic discharge). With_this prior_art circuit 10,_additional devices (not shown) must be_added to eliminate_problems caused by electrostatic discharge; and_this_addition results in_the_circuit_10 occupying_additional silicon area.
The_circuit_10 also_includes_a method for isolating the n-well_of_the p-channel devices when the P+/N- diodes_would otherwise be forwarded_biased_resulting in leakage current._P-channel transistor device 24 acts_as a switch between the positive_supply Vdd_and the_well bias source. The device 24 is directly controlled by the_voltage at the terminal OUT and_is disabled when the_input voltage_at_the OUT terminal_comes_within a_threshold voltage Vpt of the 3.3 volt_source voltage_therefore eliminating the leakage path to_the well before the_diodes_can be forwarded biased. Since conduction_by the device 24 is controlled_directly by the voltage at_the_terminal_OUT, care must be taken_to protect the gate of the_device 24 from_electrostatic discharge damage. Such protection also adds_extra_circuitry to the silicon.
It is desirable_to_eliminate the range in which leakage_current_can_occur in an off-chip driver_circuit which receives input signals at_its output terminal which input signals may have values_greater than the_internal source voltage of the_driver_circuit.
It_is also desirable to provide protection against electrostatic discharge in_an off-chip_driver circuit without_increasing the size of the circuit. 1. Technical Field
An aspect_of the present invention relates to a_conveyer device capable of conveying a sheet along a conveyer path.
2._Related Art
A conveyer device for conveying a sheet_along a conveyer path formed inside is_known. The conveyer device_may_include, for example, an image recording apparatus_such_as_a_printer and a_multifunction peripheral device_(