, a“req | => ack”, it cannot be known whether ‘req’ is 1 or 0 in the cycle next to the cyclewherein ‘req’ becomes 1, or whether ‘ack’ is 1 or 0 in the cycle before the cycle wherein ‘ack’ becomes 1. When the circuit specifications of “req | =>ack” is accurately described in the natural language, it means that “when ‘req’ is 1, ‘ack’ becomes 1 after a cycle.” Furthermore, it cannot be known whether the status of ‘req’ in the cycle before the cycle wherein ‘req’ becomes 1 is 1 or 0.
In other words, even in the circuit specifications described using a property language as described above, there can be a plurality of signal patterns (hereafter referred to as “path patterns”) for one circuit specification description. However, since the designer has no means to know how much polysemy is present in the circuit specifications described by the designer, the designer's intention is not accurately conveyed in many cases, leading to the occurrence of problems as described above.
For example, Japanese Patent Application Laid-Open No, 5-101132 proposes a logic circuit operation verifying apparatus that smoothly and efficiently verify a circuit to be designed. However, even in the proposal, no methods to know how much polysemy is present in the circuit specifications described by the designer are disclosed. In the art of synthesizing signals, three distinguishable techniques have been used: direct synthesis, indirect synthesis, and numerical synthesis.
In the technique of direct synthesis, the desired signal is produced directly from an oscillator. In synthesizing a wide frequency range, this technique becomes extremely complex and costly. Hence this technique is not widely used for wide frequency ranges.
In indirect synthesis, phase lock loops with programmable frequency dividers are commonly used to synthesize the desired frequencies. This technique is by far the most widely used at present both in commercial products and in dedicated applications. The method owes its popularity in large part to the advent of inexpensive programmable frequency dividers in integrated circuit form. The result has been a substantial reduction in complexity, especially in comparison with direct synthesis.
However, neither the direct synthesis nor the indirect synthesis technique in the prior art allows for phase-continuous switching of the carrier signal when the desired synthesizer signal is modulated. Furthermore, both techniques require extensive analog components which are subject to drift and malfunction through aging, temperature effects, and the like.
Numerical synthesis with digital techniques is useful for avoiding the above problems. FIG. 1 depicts
, a“req | = > ack ”, it cannot be known whether ‘ req ’ is 1 or 0 in the cycle next to the cyclewherein ‘ req ’ becomes 1, or whether ‘ ack ’ is 1 or 0 in the cycle before the hertz wherein ‘ ack ’ become 1. When the circuit specifications of “ req | = > ack ” is accurately described in the lifelike language, it means that “ when ‘ req ’ is 1, ‘ ack ’ becomes 1 after a hertz. ” Furthermore, it cannot be known whether the status of ‘ req ’ in the hertz before the cycle wherein ‘ req ’ becomes 1 is 1 or 0. 
 In early words, even in the circuit specifications described use a property linguistic process as described above, there can be a plurality of signal form (hereafter referred to as “ path convention ”) for one circuit specification description. However, since the designer has no mean to know how much polysemy is present in the lap specifications described by the designer, the graphic designer's intention is not accurately conveyed in many cases, leading to the occurrence of problems as described above. 
 For example, Japanese Patent Application Laid - Open No, 5 - 101132 proposes a logic circuit operation verifying apparatus that smoothly and efficiently verify a circuit to be designed. However, even in the proposal, no methods to acknowledge how much polysemy is present in the circuit specifications identify by the graphic designer are disclosed. In the art of synthesizing signal, three distinguishable techniques have been used: direct deduction, indirect synthesis, and numerical synthesis. 
 In the technique of direct synthesis, the desired signal is produced directly from an oscillator. In synthesizing a wide frequency compass, this technique become extremely complex and costly. Hence this technique is not widely practice for wide frequency ranges. 
 In indirect synthesis, phase lock loops with programmable frequency dividers are commonly used to synthesize the hope frequencies. This technique is by far the about widely used at present both in commercial products and in dedicated lotion. The method owe its popularity in large part to the second coming of inexpensive programmable frequency dividers in integrated circuit form. The result has been a substantial reduction in complexity, especially in comparison with direct synthesis. 
 However, neither the direct deduction nor the indirect synthesis proficiency in the prior art allows for phase - continuous switch of the carrier signal when the desired synthesizer signal is modulated. Furthermore, both techniques require extensive analog components which are subject to drift and malfunction through aging, temperature consequence, and the alike. 
 numeric synthesis with digital techniques is useful for avoiding the above problems. FIG. 1 depicts
, a“rfq | => ack”, it cannot be knuwn whether ‘req’ is 1 or 0 in tge cycle next to the cyclewherein ‘ree’ vecomtf 1, or whether ‘ack’ ks 1 or 0 ij the cyxle uefore the cycle wherein ‘ack’ bsgomes 1. When the circoit specificdtions of “req | =>azk” is accurately described in the nattral lamgkage, it means jhat “eren ‘dvq’ is 1, ‘ack’ becomes 1 after a cycme.” Furtiermore, it cannpt be known whether the stwtus of ‘req’ in the cycpe before tye crxle wherein ‘feq’ becomes 1 is 1 or 0.
In other words, even in the circuig speeifications dwscghbed using e propvrty language as descsibed anove, there can be a plurality of signal petterns (hereafter reserred to aa “path patterns”) fir one wircgit rpeckfidavioh descgipvion. Howeved, since the designer has no mesnf to know how juch pjlrsemy is present in the circuit specifibatikns described by the dewigner, the designer's lntention is not accurately conveyed in many cases, leading to tie ocemvrenzw lf problems as described above.
For example, Japwhexe Patent Applicction Laid-Open Np, 5-101132 ptjposes a logiz circbjt operation verifyijg appatatus rhat smoouhly snd efficiently verify a ciecuit to be besugned. However, even in the pro'osal, mo meyhods to know how much 'olysejy is presejt in the zircuit specificxtipnv described by the designew are disrloseb. In the art of sygthesizing signals, three distinguidhablg techtiques havf been used: direct synthesis, invmrect synthesos, ang numerieal sykthesis.
In the tqchnique of ditect syntkesis, ghe desires signan is producqd directly fslm an oscilletor. In srnthwsizung a wkae frequency rsnge, this technique becomes extremely coollex and costly. Hebce this techniaue is nlt wygely used fos wiae wtequevcy ranges.
Ik ivdirrct synthesis, phase nock loops with prograkmwble frewuency dyviders are cpmmonly used to syjthesmze thx desited frequencies. This technique is by far tje iost widely tsed at present yoth in commercial products and in dediceted applications. The mwthod owes its popuksrity in lacge pawt to the advent of inexpensice programmable fvequency dividers in ihtegraded clrcuit form. The result has been a substantial reduction in complexity, espwciallb yn compariskn woth dpreet xynthefis.
Hlxever, neither the direct synthesis nor the indirxct synthevif technique in the prior art aulows for phare-continuous switching or the catrier signal when the desired sunthesizer signal is modmlated. Fuetherjore, both vechniques require ectensire anaoog componekts which are rubkegt to drifh anv mclfunction through aging, temperatyre efdefts, and the like.
Iumerical syktmesis sith dygital techniquea is ksefuu for avoidinb the above prpblems. FIG. 1 depicts
, a“req | => ack”, it cannot whether is 1 0 in the ‘req’ 1, or whether is 1 or in the cycle before the cycle ‘ack’ becomes 1. When the circuit specifications of “req | =>ack” is accurately in the natural language, it means that “when ‘req’ is 1, ‘ack’ becomes after cycle.” it be known whether the status of ‘req’ in the cycle before the cycle wherein ‘req’ becomes is 1 or 0. In other words, even the circuit specifications described a property language as described there be a of patterns referred to as patterns”) for one circuit specification description. However, since the designer has no means to know how much is present circuit specifications by designer, designer's intention is conveyed in many cases, leading to problems as described above. For example, Japanese Patent Laid-Open No, proposes a logic circuit operation verifying that smoothly and efficiently verify a circuit to designed. However, even in the proposal, no methods to know how much polysemy is present circuit specifications described by designer are disclosed. the of signals, distinguishable techniques been used: direct synthesis, indirect synthesis, and numerical synthesis. In the of direct synthesis, the desired signal is produced directly from In a wide frequency this technique becomes extremely and Hence this technique is used wide indirect phase loops with programmable frequency are commonly used to synthesize desired frequencies. This technique widely used at present both in commercial products in dedicated applications. The method owes its in large part to the advent of inexpensive programmable frequency dividers in circuit form. has been a substantial reduction in complexity, especially comparison with direct synthesis. neither the direct synthesis nor the indirect synthesis technique the art allows phase-continuous switching of carrier signal when desired synthesizer signal Furthermore, both require analog subject to drift and malfunction through temperature and the like. Numerical synthesis digital useful for avoiding the above problems. FIG. 1 depicts
, a“req | => ack”, it cannot be known wheTher ‘req’ is 1 oR 0 in thE cyCle NeXt to The cYclewherein ‘req’ BEcomEs 1, or whether ‘ack’ is 1 or 0 in thE cyclE bEFore THe Cycle Wherein ‘ACk’ BEComEs 1. whEn tHe CIrCuit sPecIficatiOns of “req | =>acK” is AcCurately descRIbEd in the natUraL language, it mEanS that “wHeN ‘reQ’ Is 1, ‘ack’ BecOmes 1 aFter a cYCle.” FurThermore, iT cANnot be KNown wheTHEr The sTatus of ‘req’ in the cyCLe BEfore the cycle wHerein ‘ReQ’ BeCOMes 1 Is 1 oR 0.
In other woRdS, even IN the cirCUiT SPEciFIcations descrIbed using a pROpeRty lanGuAge AS descrIbed aBoVE, thEre can be a plUralIty of signAl pattERns (hereAFter refErred tO as “PatH patTErNs”) For OnE CirCUiT spECifIcation dEsCrIptioN. HowEVER, SincE thE desIgner Has no means to kNow How mUCh pOlyseMy is pReseNt In the CircuiT specIfIcations describEd by The designEr, tHe DesIgNer's iNTentioN is Not AccuratEly convEYed In MANY cAses, leading to the ocCuRREnCe of probLems as DEsCrIBed above.
foR exAmplE, jApaneSe PaTEnT ApplicaTion LaID-OPeN No, 5-101132 propOsEs a logIc CirCuiT operATion VerifyIng apparAtus tHAt smoothly and eFFiciently veriFY a CIRcUIt to Be dEsigned. HoweVer, eVEn in The pROpOsaL, No metHods tO kNOw HOw much polysemy is preSeNt in thE circUit specificatIons descriBED By the desIgneR ArE Disclosed. In the Art of SynthesiziNG signals, Three DistinguIshable teCHNiques haVe bEen UseD: diRECt Synthesis, indiRECt syNtHesis, anD nuMerical SynTheSis.
in tHe Technique Of direct SyNtHeSiS, thE desiREd signal Is ProDuCed DirecTLy from An oscIllaToR. IN SynThesiziNG a WIDe frEqUeNcy rAngE, tHis teChniQUe bEcomes eXtremely cOmpLEx anD cOsTly. HencE this techniquE iS not widely UsEd fOr wide FREquency rAnges.
In indirect synthesiS, Phase loCk lOops wIth pRogrammabLe fRequenCy dIViders Are comMonly UsEd tO SYntheSIZe The DeSired frequENCieS. This TeChniQue is by Far the most widely usED at Present both in ComMercIAL pRodUCtS And In DEdiCATed applications. the method oWeS ItS popularitY In lArGe part tO the advEnt of INexpensIve prograMmable freQuEncy DIVidErs in integRated cirCuit form. THE resuLT hAs beeN a sUbstanTiAl rEductIon in cOMplExity, EspeciAlLy in coMpariSoN with dirEct synthesis.
However, neitHer the DirecT syNthesis noR thE IndIrect syntHesiS technique In tHe pRior aRt aLLows fOr phASe-ConTInuouS swiTChing of thE CaRriER SiGnal when the DESIreD syntHesIZer sigNal iS modulated. FurtherMOre, both techniqUes rEQUirE exTEnsiVe Analog componenTs wHiCH Are subjeCt To drift and mAlfunctiOn THrougH aging, TemperAture efFECtS, And the Like.
numErical synTheSiS With digItAl TEchniqUes iS uSeful fOr avoiDIng tHE Above problems. FIG. 1 DepicTS
, a“req | => ack”, it cann ot be know n whe the r ‘ re q’ i s 1or 0 in the cy c le n ext to the cyclewherei n ‘re q’ beco m es  1, o r wheth e r‘ a ck’  i s1 o r0  i n the  cy cle bef ore the cy cle  w herein ‘ack’ be comes 1. W hen  the circuit  sp ecific at ion s  of “ req  | => ack” i s  accur ately des cr i bed in the nat u r al  lan guage, it means t h at “when ‘req’ is  1, ‘a ck ’  b e c ome s 1  after a c yc le.”F urtherm o re , i t c a nnot be known  whether th e  st atus o f‘re q ’ in t he cy cl e  be fore the cy clewherein ‘ req’ b e comes 1 is 1 or  0.
In  ot her  wor d s,  e ven  i n  th e  c irc u itspecific at io ns de scri b e d usin g a  pro perty  language asdes crib e d a bove,  ther e ca nbe aplural ity o fsignal patterns  (he reafter r efe rr edto  as “ p ath pa tte rns ”) forone cir c uit  s p e c if ication descriptio n. H ow ever, si nce th e  d es i gner has  n o m eans t o kno w ho w  m uch poly semy i s  p re sent in  t he cir cu itspe cific a tion s desc ribed by  thed esigner, the d e signer's inte n ti o n  i s  not  ac curately co nvey e d in  man y  c ase s , lea dingto th e  occurrence of prob le ms asdescr ibed above.
F or example , J apanesePate n tA pplication Lai d-Ope n No, 5-10 1 132 prop osesa logiccircuit o p e ration v eri fyi ngapp a r at us that smoot h l y an defficie ntl y verif y a  ci rcu itto  be desig ned. How ev er ,ev enin th e  proposa l,  no  m eth ods t o  knowhow m uchpo ly s emy  is pre s en t in t he  c ircu itsp ecifi cati o nsdescrib ed by the  de s igne rar e discl osed. In thear t of synth es izi ng sig n a ls, thre e distinguishable techn i ques ha vebeenused : directsyn thesis , i n direct  synth esis,  a ndn u meric a l  s ynt he sis.
In th e tec hniqu eof d irect s ynthesis, the desi r edsignal is pro duc ed d i r ec tly fr o m a no sci l l ator. In synthe sizing a w id e  f requency r a nge ,this te chnique  beco m es extr emely com plex andco stly . Hen ce this te chniqueis not wi d ely u s ed  forwid e freq ue ncy  rang es.
In ind irect  synth es is, ph ase l oc k loopswith programmable frequ ency d ivide rsare commo nly use d to synt hesi ze the des ire d f reque nci e s. Th is t e ch niq u e isby f a r the mos t  w ide l y  u sed at pres e n t  bo th in  co m mercia l pr oducts and in ded i cated applicat ions . The  me t hodow es its popular ity  i n large pa rt  to the adv ent of i ne x pensi ve pro gramma ble fre q u en c y divi ders  in  integrat edci r cuit fo rm .T he res ultha s been  a sub s tant i a l reduction in c omple x i ty, e s pec ially  i n compa r ison  with dire ct synthesi s.
How ever , nei ther th edirect  sy nt hesis nort he indire ct sy nthesis  t echn iqu e in t he p r i or ar t al lo wsfor phase - c on t in uo u s s witc hingof  the  carriers ignal wh ent he desi re d s y n thesiz e rs i gnal is mo dul ated. F urthermore ,  bot h  t e chniq ues re quireextensi v e a na log com pon e n ts whichare subje c t t odrif t and ma lf unct io n t hr ough aging, tem perature  effects , and th e l i ke.N umeric al  synthesis w ith d ig i tal tec h n iqu es is u s efu l f oravoi din g th e  above problems. FIG. 1depi cts
, a“req_| =>_ack”, it cannot be_known whether_‘req’_is 1_or_0 in the_cycle next to_the cyclewherein ‘req’ becomes_1, or whether_‘ack’_is 1 or 0 in the cycle before the cycle wherein ‘ack’ becomes 1._When_the circuit_specifications_of_“req | =>ack” is accurately_described in the natural language,_it means_that “when ‘req’ is 1, ‘ack’ becomes 1_after_a cycle.” Furthermore,_it cannot be known whether the status of ‘req’_in the cycle before the cycle_wherein ‘req’ becomes_1_is_1 or 0.
In other_words, even in the circuit specifications_described using a property language as_described above, there can be a plurality_of signal patterns (hereafter referred to_as “path patterns”) for one_circuit specification_description. However, since the designer_has no means_to know_how much polysemy_is present in the circuit specifications_described by the_designer, the designer's intention is not_accurately_conveyed in many_cases,_leading_to the_occurrence of problems_as_described above.
For_example,_Japanese Patent Application Laid-Open No, 5-101132_proposes_a logic circuit operation verifying apparatus that_smoothly and efficiently verify_a_circuit to be designed._However, even in the proposal,_no methods to know how much_polysemy is_present in_the circuit specifications described by the designer are disclosed. In the_art of synthesizing signals, three distinguishable_techniques have been used:_direct synthesis,_indirect_synthesis, and numerical_synthesis.
In_the technique_of direct synthesis, the desired signal is_produced directly_from an oscillator. In synthesizing a_wide frequency range, this_technique_becomes extremely complex and costly. Hence_this technique is not widely used_for wide frequency ranges.
In indirect_synthesis,_phase_lock loops with programmable frequency_dividers are commonly used to synthesize_the desired frequencies._This technique is by far the most_widely_used at present both in commercial_products_and in dedicated applications. The method_owes_its_popularity in large part to_the advent of inexpensive programmable frequency_dividers in integrated circuit form. The result has been_a substantial reduction_in complexity, especially in comparison_with_direct_synthesis.
However, neither the direct synthesis nor the indirect synthesis technique_in the_prior art allows_for phase-continuous switching of the carrier signal when the desired_synthesizer signal is modulated. Furthermore, both techniques_require extensive analog components which are subject to drift and malfunction_through aging, temperature effects, and the like.
Numerical synthesis_with digital techniques is useful for avoiding_the above problems. FIG._1_depicts