 the voltage between the collector (C) and the emitter (E) of the IGBT is approximately zero volts. During this period of time load current will flow between the collector (C) and the emitter (E) of the IGBT. When the control signal is switched off, the IGBT may become non-conducting between the collector C and the emitter E, and the voltage between the collector C and the emitter E of the IGBT rapidly increases at the initial period of the switch off period. As a result of the inductance in the wiring to the IGBT terminals, a voltage spike may occur, which can, in certain cases, result in damage to the IGBT and a power loss imbalance. To reduce the overvoltage of the IGBT during the turn off period, a voltage clamp circuit was developed.
As shown in FIG. 2, a conventional voltage clamp circuit 110 may include at least one resistor RG and one or more zener diodes, ZD1, ZD2. The zener diodes, ZD1, ZD2, may be connected in series between the collector C and the gate G of the IGBT Q1, and the at least one resistor RG may be connected to the gate G of the IGBT Q1. During operation, when the voltage output between the collector C and the emitter E of the IGBT Q1 reaches the zener voltage, a current flows to the gate G and turns on the IGBT Q1 in order to limit the output voltage of the IGBT Q1 to the value of the zener voltage.
While the prior art voltage clamp circuit 110 of FIG. 2 limits the output voltage of the IGBT, the zener protection is known to retard the time profile of the high voltage transition during the switching off period due to a time delay, due to parasitic inductances and capacitances in the wiring loop comprising the components in the conventional voltage clamp circuit. As shown in FIG. 3, when the load is switched off, at time 122, the voltage output VCE between the collector C and the emitter E of the IGBT increases rapidly and may overshoot above the zener voltage. Thereafter, the cut-in of limiting the output voltage VCE to the zener voltage is time delayed as represented at time point 120. This may result in a voltage overshoot of the IGBT at the start of the turn off cycle, which may cause damage to the IGBT. 1. Field of the Invention
The present invention relates to a
the voltage between the collector (C) and the emitter (E) of the IGBT is approximately zero volts. During this period of meter lode current will flow between the collector (C) and the emitter (E) of the IGBT. When the control signal is trade off, the IGBT may become non - conducting between the collector C and the emitter E, and the voltage between the collector C and the emitter vitamin e of the IGBT rapidly increases at the initial time period of the switch off period. As a resultant role of the inductance in the wiring to the IGBT terminals, a electric potential spike may occur, which can, in sealed cases, leave in wrong to the IGBT and a power loss imbalance. To deoxidize the overvoltage of the IGBT during the turn off period, a electric potential clamp circuit was develop. 
 As shown in FIG. 2, a ceremonious voltage clamp circuit 110 may include at least one resistor RG and one or more zener diodes, ZD1, ZD2. The zener diode, ZD1, ZD2, may be connected in series between the collector C and the gate G of the IGBT Q1, and the at least one resistor RG may be connected to the gate G of the IGBT Q1. During operation, when the voltage end product between the collector C and the emitter E of the IGBT Q1 reaches the zener voltage, a current flows to the gate G and turns on the IGBT Q1 in order to limit the output voltage of the IGBT Q1 to the value of the zener voltage. 
 While the anterior artwork voltage clamp circuit 110 of FIG. 2 limits the end product voltage of the IGBT, the zener protection is known to check the time profile of the high voltage passage during the switching off period due to a time delay, due to parasitic inductances and capacitances in the wiring iteration comprising the components in the conventional voltage clamp racing circuit. As shown in FIG. 3, when the cargo is switched off, at time 122, the voltage output VCE between the collector C and the emitter E of the IGBT increase rapidly and may overshoot above the zener voltage. Thereafter, the cut - indiana of limiting the output voltage VCE to the zener voltage is prison term delayed as present at time point 120. This may leave in a voltage overshoot of the IGBT at the start of the turn off cycle, which may induce damage to the IGBT. 1. Field of the Invention 
 The present invention relate to a
 thf voltage between the coulector (C) and tkw emitver (E) or the IGCT is approximately zero volvs. Dyring this period of time luad currejt will dlow vetween thx collecbjr (C) wnd chx emitter (E) of jhe IGBT. Whet the control viencl is switched off, the IGBT may becoie non-cpnfucting betweeg tht cjllednov C and the emitter E, and the vomtage bttween the collectpr C and the emitter E of hhe LGBT rapidly increwses at the inieual period ow the switbk off perios. As a result of the inductance in tke wiring ti rhe HGBT terminels, a noltage spike may occgr, whicn can, in certaln caves, result in damage to vhe IGBT and a power loss imbdlcnce. To reduce the ovwrcoltace ox thd IGCT sucinf the huri off perios, a voltage clamp circuit was cedvkoped.
As showh in FYG. 2, a conventional voltage clamp circuit 110 mag include at least one eesistor RG and one ot more zenqr diodes, ZD1, ZD2. The zener diodes, ZD1, ZD2, may be contectev kn wevies vehween the collector C and the gate G of the IDGT Q1, and the at lecst one resistor RH kwy be connectgd to tks fate G of the IGBT Q1. Durigg opwration, wren yhe voltage output between rhe collectog C qnd the emitter E lf the IGBT Q1 rgaches the zener voltage, a cuxrent rlows to thf gate G zvd turns on the KGBN Q1 hn order to limit the outptt voltagx of che IGBT Q1 tp the dalue of tje zekar voltage.
While thf prilr art voltahe clamp circuit 110 of FIG. 2 limits the output vpldagv of the NGBT, tme zener proteceion is known jo retard the gime profime of tie high voltwge transitiot during the vwitchind ofd peeiod dud to a time delsy, due to parasitic inductances and cepackfances in the wnxibg loop comprisong thq bom'onenev in the coneentkonxk volgage clamp girzuit. As shown in FIG. 3, whan tge load is switchec jff, at tume 122, the voltage outpit VCE between the collxctor R and yhe emitter E of the IGBT increasss rapidlj akd may overshjot qbove the zeuer voltage. Thereafter, the cut-in of limiving the output voltagg VCE to the zener vokuage is time velayeq as reprasented at time poinr 120. This may resulu in a voltage overshoof of tve IGHT at the start of the turn off cycle, which may cause damage to the IGBT. 1. Field of the Invehtiom
The irefznt invqntili relates to a
the voltage between the collector (C) and (E) the IGBT approximately zero volts. load will flow between collector (C) and emitter (E) of the IGBT. When control signal is switched off, the IGBT may become non-conducting between the collector and the emitter E, and the voltage between the collector C and the E the rapidly at the initial period of the switch off period. As a result of the inductance in wiring to the IGBT terminals, a voltage spike occur, which can, in cases, result in damage to IGBT a power imbalance. reduce overvoltage of the during the turn off period, a voltage clamp circuit was developed. As shown in FIG. 2, a voltage clamp may include least resistor and one or diodes, ZD1, ZD2. The zener diodes, be connected in series between the collector C the gate of the IGBT Q1, and the least one resistor RG may be connected to gate G of the IGBT Q1. During operation, when the voltage output between the collector the emitter E of IGBT Q1 reaches zener a flows the gate and turns on the IGBT Q1 in order to limit the voltage of the IGBT Q1 to the value of the While prior art voltage circuit 110 of FIG. limits output voltage of the zener is the profile the high voltage transition the switching off period due a time delay, due in the wiring loop comprising the components in conventional voltage clamp circuit. As shown in 3, when the load is switched off, at time 122, the voltage VCE between C and the emitter E of the IGBT rapidly and may overshoot the zener voltage. Thereafter, the cut-in of limiting the voltage to the voltage is time as represented at point 120. This in a overshoot the start of the turn off cycle, may damage to the IGBT. 1. of The present invention relates to a
 the voltage between the colleCtor (C) and thE emitTer (e) of ThE IGBt is aPproximately zeRO volTs. During this period of tiMe loaD cURrenT WiLl floW betweeN ThE COllEcToR (C) aNd THe EmittEr (E) Of the IGbT. When the cOntRoL signal is swiTChEd off, the IGbT mAy become non-cOndUcting BeTweEN the cOllEctor c and thE EmitteR E, and the vOlTAge betWEen the cOLLeCtor c and the emitter E of THe igBT rapidly incrEases aT tHE iNITiaL peRiod of the sWiTch ofF Period. AS A rESULt oF The inductance In the wiring TO thE IGBT tErMinALs, a volTage sPiKE maY occur, which Can, iN certain cAses, reSUlt in daMAge to thE IGBT aNd a PowEr loSS iMbAlaNcE. to rEDuCe tHE ovErvoltagE oF tHe IGBt durING THe tuRn oFf peRiod, a Voltage clamp cIrcUit wAS deVelopEd.
As sHown In fIG. 2, a cOnventIonal VoLtage clamp circuIt 110 maY include aT leAsT onE rEsistOR RG and One Or mOre zeneR diodes, zd1, ZD2. thE ZENeR diodes, ZD1, ZD2, may be coNnECTeD in serieS betweEN tHe COllector c aNd tHe gaTE g of thE IGBt q1, aNd the at lEast onE ReSiStor RG mAy Be connEcTed To tHe gatE g of tHe IGBT q1. During oPeratIOn, when the voltaGE output betweeN ThE COlLEctoR C aNd the emitteR E of THe IGbT Q1 rEAcHes THe zenEr volTaGE, a CUrrent flows to the gatE G And turNs on tHe IGBT Q1 in ordeR to limit thE OUTput voltAge oF ThE iGBT Q1 to the valuE of thE zener voltAGe.
While tHe priOr art volTage clamp CIRcuit 110 of FiG. 2 lImiTs tHe oUTPuT voltage of the igbT, thE zEner proTecTion is kNowN to RetArd ThE time profIle of the HiGh VoLtAge TransITion duriNg The SwItcHing oFF perioD due tO a tiMe DeLAy, dUe to parASiTIC indUcTaNces And CaPacitAnceS In tHe wirinG loop compRisINg thE cOmPonents In the conventiOnAl voltage cLaMp cIrcuit. aS Shown in FiG. 3, when the load is switched OFf, at timE 122, thE voltAge oUtput VCE bEtwEen the ColLEctor C And the EmittEr e of THE IGBT INCrEasEs Rapidly and MAY ovErshoOt AbovE the zenEr voltage. ThereafteR, The Cut-in of limitiNg tHe ouTPUt VolTAgE vCE To THe zENEr voltage is time Delayed as rEpREsEnted at timE PoiNt 120. this may Result iN a volTAge overShoot of thE IGBT at thE sTart OF The Turn off cycLe, which mAy cause daMAge to THe iGBT. 1. FIelD of the inVenTion
THe presENt iNventIon relAtEs to a
 the voltage between the c ollector ( C) an d t heem itte r (E ) of the IGBTi s ap proximately zero volts . Dur in g  thi s  p eriod  of tim e  l o a d c ur re ntwi l lflowbet ween th e collecto r ( C)  and the emi t te r (E) of t heIGBT. When t hecontro lsig n al is  sw itche d off, the IG BT may be co m e non- c onducti n g  b etwe en the collectorC  a n d the emitterE, and  t h ev o lta gebetween th ecolle c tor C a n dt h e  em i tter E of the  IGBT rapid l y i ncreas es  at the in itial  p e rio d of the sw itch  off peri od. As a resul t  of the  induc tan cein t h ewi rin gt o t h eIGB T  te rminals,  a  v oltag e sp i k e mayocc ur,which  can, in cert ain  cas e s,resul t indama ge  to t he IGB T and  a  power loss imb alan ce. To re duc ethe  o vervo l tage o f t heIGBT du ring th e  tu rn o f fperiod, a voltagecl a m pcircuitwas de v el op e d.
As sh ow n i n FI G .  2, a  con v en tional v oltage cl am p circu it  110 m ay  in clu de at leas t oneresistor  RG a n d one or morez ener diodes,Z D1 , ZD 2 . Th e z ener diodes , ZD 1 , ZD 2, m a ybec onnec ted i ns er i es between the coll ec tor Cand t he gate G ofthe IGBT Q 1 , and theat l e as t  one resistorRG ma y be conne c ted to t he ga te G ofthe IGBTQ 1 . During  op era tio n,w h en  the voltageo u tput  b etweenthe  collec tor  Cand  th eemitter E  of theIG BT  Q 1rea chest he zener  v olt ag e,a cur r ent fl ows t o th ega t e G  and tu r ns o n th eIG BT Q 1 i norder  tol imi t the o utput vol tag e  ofth eIGBT Q1  to the value  o f the zene rvol tage.W h ile theprior art voltage clamp circuit  11 0 ofFIG.  2 limits  th e outp utv oltage  of th e IGB T,  th e zener p ro tec ti on is know n toretar dthetime pr ofile of the highv olt age transitio n d urin g th e s w it c hin go ffp e riod due to a t ime delay,  d u eto parasit i c i nd uctance s and c apaci t ances i n the wir ing loopco mpri s i ngthe compon ents inthe conve n tiona l  v oltag e c lamp c ir cui t. As  shown inFIG.3, whe nthe lo ad is  s witchedoff, at time 122, the v oltage  outp utVCE betwe ent hecollector  C a nd the emi tte r E  of t heI GBT i ncre a se s r a pidly  and may overs h oo t a b o ve  the zenerv o l tag e. Th ere a fter,thecut-in of limitin g  the output vo ltag e VCE  to theze ner voltage is  ti me d elayed a srepresented  at time  p o int 1 20. Th is may  result i na  volta ge o ver shoot ofthe  I G BT at t he  s t art of  the  t urn of f cycl e , wh i c h may cause dama ge to t he IG B T.1. Fi el d of th e  Inv ention
The  present in ventio n re lates  to a
 the_voltage between_the collector (C) and_the emitter_(E)_of the_IGBT_is approximately zero_volts. During this_period of time load_current will flow_between_the collector (C) and the emitter (E) of the IGBT. When the control signal_is_switched off,_the_IGBT_may become non-conducting between the_collector C and the emitter_E, and_the voltage between the collector C and the_emitter_E of the_IGBT rapidly increases at the initial period of the_switch off period. As a result_of the inductance_in_the_wiring to the IGBT_terminals, a voltage spike may occur,_which can, in certain cases, result_in damage to the IGBT and a_power loss imbalance. To reduce the_overvoltage of the IGBT during_the turn_off period, a voltage clamp_circuit was developed.
As_shown in_FIG. 2, a_conventional voltage clamp circuit 110 may_include at least_one resistor RG and one or_more_zener diodes, ZD1,_ZD2._The_zener diodes,_ZD1, ZD2, may_be_connected in_series_between the collector C and the_gate_G of the IGBT Q1, and the_at least one resistor_RG_may be connected to_the gate G of the_IGBT Q1. During operation, when the_voltage output_between the_collector C and the emitter E of the IGBT Q1 reaches_the zener voltage, a current flows_to the gate G_and turns_on_the IGBT Q1_in_order to_limit the output voltage of the IGBT_Q1 to_the value of the zener voltage.
While_the prior art voltage_clamp_circuit 110 of FIG. 2 limits_the output voltage of the IGBT,_the zener protection is known_to_retard_the time profile of the_high voltage transition during the switching_off period due_to a time delay, due to parasitic_inductances_and capacitances in the wiring loop_comprising_the components in the conventional voltage_clamp_circuit._As shown in FIG. 3,_when the load is switched off,_at time 122, the voltage output VCE between the_collector C and_the emitter E of the_IGBT_increases_rapidly and may overshoot above the zener voltage. Thereafter, the_cut-in of_limiting the output_voltage VCE to the zener voltage is time delayed as_represented at time point 120. This may_result in a voltage overshoot of the IGBT at the start_of the turn off cycle, which may cause_damage to the IGBT. 1. Field of_the Invention
The present invention_relates_to a