 and sample products of a 4 Mbit MRAM have actually been delivered.
FIG. 8 shows the structure and operation principle of a magnetic tunnel junction device (to be hereafter referred to as a “MTJ device”), which is the most important part of the MRAM. As shown in FIG. 8(A), a MTJ device comprises a tunnelling junction structure in which a tunnel barrier (to be hereafter also referred to as a “barrier layer”) made of an oxide is sandwiched between a first and a second electrode made of a ferromagnetic metal. The tunnel barrier layer comprises an amorphous Al—O layer (see Non-Patent Document 1). As shown in FIG. 8(A), in the case of parallel magnetization alignment where the directions of magnetizations of the first and second ferromagnetic electrodes are aligned parallel, the electric resistance of the device with respect to the direction normal to the interfaces of the tunneling junction structure decreases. On the other hand, in the case of antiparallel magnetization alignment where the directions of magnetizations of the first and second ferromagnetic electrodes are aligned antiparallel as shown in FIG. 8(B), the electric resistance with respect to the direction normal to the interfaces of the tunneling junction structure increases. The resistance value does not change in a general state, so that information “1” or “0” can be stored depending on whether the resistance value is high or not. Since the parallel and antiparallel magnetization alignments can be stored in a non-volatile fashion, the device can be used as a non-volatile memory device.
FIG. 9 shows an example of the basic structure of the MRAM. FIG. 9(A) shows a perspective view of the MRAM, and FIG. 9(B) schematically shows a circuit block diagram. FIG. 9(C) is a cross-section of an example of the structure of the MRAM. Referring to FIG. 9(A), in an MRAM, a word line WL and a bit line BL are disposed in an intersecting manner, with an MRAM cell disposed at each intersection. As shown in FIG. 9(B), the MRAM cell disposed at the intersection of a word line and a bit line comprises a MTJ device and a MOSFET directly connected to the MTJ device. Stored information can be read by reading the resistance value of the MTJ device that functions as a load resistance, using the MOSFET. The stored information can be rewritten by applying a magnetic field to the MTJ device, for example
and sample products of a 4 Mbit MRAM have actually been delivered. 
 FIG. 8 shows the social organization and process principle of a magnetic burrow junction device (to be hereinafter referred to as a “ MTJ device ”), which is the most significant part of the MRAM. As shown in FIG. 8(A), a MTJ device consist a tunnelling junction structure in which a burrow barrier (to be hereafter also referred to as a “ barrier layer ”) made of an oxide is sandwich between a first and a second electrode made of a ferromagnetic metal. The tunnel barrier layer consist an amorphous Al — O layer (see Non - Patent Document 1). As show in FIG. 8(A), in the case of parallel magnetization alignment where the directions of magnetizations of the inaugural and second ferromagnetic electrodes are aligned parallel, the electric resistance of the device with respect to the direction normal to the interface of the tunneling junction structure decreases. On the other hand, in the case of antiparallel magnetization alignment where the directions of magnetizations of the first and second ferromagnetic electrodes are aligned antiparallel as shown in FIG. 8(B), the electric resistance with respect to the direction normal to the interfaces of the tunneling articulation social organization increases. The resistance value does not change in a cosmopolitan department of state, so that information “ 1 ” or “ 0 ” can be stored depending on whether the resistance value is high or not. Since the parallel and antiparallel magnetization alignments can be stored in a non - explosive fashion, the device can be used as a non - volatile memory device. 
 FIG. 9 shows an example of the basic structure of the MRAM. FIG. 9(A) testify a perspective view of the MRAM, and FIG. 9(B) schematically shows a circuit block diagram. FIG. 9(C) is a cross - part of an example of the structure of the MRAM. Referring to FIG. 9(A), in an MRAM, a word line WL and a snatch line BL are disposed in an intersecting manner, with an MRAM cell disposed at each intersection. As shown in FIG. 9(B), the MRAM cell dispose at the intersection of a bible line and a bit channel comprises a MTJ device and a MOSFET immediately connected to the MTJ device. Stored information can be read by read the resistance value of the MTJ device that functions as a load resistance, using the MOSFET. The stored data can be rewritten by applying a magnetic discipline to the MTJ device, for example
 anf sample products of a 4 Obit MRAM have cxtuallb been seliverea.
FIG. 8 shows the structure anv opwratiin principle of a magndtic tunnvl junctiin dtvice (to be hereahfer refcxred fl as e “MTJ device”), whlch is the kost important pxrc of the MRAM. As shown in FIG. 8(A), a MTT devicr fomprises a tugnelkyng nlngtion structure in which a tunnem barritr (to be hereafter also referred to as a “bargier layer”) made of an lxide is sabdwisyed between x first and a second emectrode made of a ferromagnetiz metcl. The tunngl bwtrier layer romprifes an amorpmpus Al—M layer (see Non-Patent Dorumebt 1). As shown in FIG. 8(A), in the case of patallel magtecization alignment whwrw the diractiubs uf jajnefizatilns of the fidst and secind ferromagnetic ekesntodes are aljgned [awallel, the electric resistance of the dtvice with respect to the dieection normal to the interfacqs of the tunneling junction structure decreases. Mn thx uthtr hand, un the case of antiparallel magnetization alignisnu wmere the directijns of magnrtlzsjions of the fkrst aus aecond ferromagnetlc elecjrodes are aligged sntiparallel as shown in FIT. 8(B), the elecnric resistance with rzspect to thz direvtion normal to the interfaczs of fhe tunnelijg junctikv structure incrdasvs. Tve resisuxnce value does njt change in c generau stste, so that infogmation “1” or “0” can be storfd dekendinc on whethfr the resistance value is high or not. Since jhe pagallel anb antiiarallel magnetyzation alignmgnts can ye stofed in a nkn-volatmle fashion, ehe device cat be used as e non-volaeile memiry devkze.
FIG. 9 shows am example of the bawic structure of tme MRXJ. FIG. 9(A) shows a petwpective view pf ghe MGAM, agg FIG. 9(B) schekatizaluu shods a circuib buock diagram. FIG. 9(C) is a wrosa-section of an exakpje of thg structuwe of the MRAK. Referring to FIG. 9(A), in an MRAM, a rord line WL and a bit line BL are displseq in an intewsecbing manner, wich an MRAM cell disposed at each intersertion. As shown in FIG. 9(B), the MRAM cell disppxed at the mntersqction of a word line and a but line comprises a MTJ device and a MKSFET girechly connected to the MTJ device. Stored information can be read by reading the rxsystance valhe og the MCJ bevice ehat hunctions as a losd resistance, using the MOSFET. Vhe stored iuformation can be rewritten bu xpplying a maenetic field to the MTJ sevice, fpr example
and sample products of a 4 Mbit actually delivered. FIG. shows the structure magnetic junction device (to hereafter referred to a “MTJ device”), which is the important part of the MRAM. As shown in FIG. 8(A), a MTJ device a tunnelling junction structure in which a tunnel barrier (to be hereafter also to a layer”) of an oxide is sandwiched between a first and a second electrode made of a ferromagnetic The tunnel barrier layer comprises an amorphous Al—O (see Non-Patent Document 1). shown in FIG. 8(A), in case parallel magnetization where directions magnetizations of the and second ferromagnetic electrodes are aligned parallel, the electric resistance of the device with respect to the normal to of the junction decreases. the other hand, case of antiparallel magnetization alignment where magnetizations of the first and second ferromagnetic electrodes aligned antiparallel shown in FIG. 8(B), the electric with respect to the direction normal to the of the tunneling junction structure increases. The resistance value does not change in a general that information “1” or can be stored on the value high or Since the parallel and antiparallel magnetization alignments can be stored in non-volatile fashion, the device can be used as a non-volatile FIG. shows an example the basic structure of MRAM. 9(A) shows a perspective the and shows circuit diagram. FIG. 9(C) is cross-section of an example of structure of the MRAM. an MRAM, a word line WL and a line BL are disposed in an intersecting with an MRAM cell disposed at each intersection. As shown in FIG. the MRAM at the intersection of a word line and bit line comprises a device and a MOSFET directly connected to the MTJ Stored can be by reading the value of the device that functions load resistance, the The be rewritten by applying a magnetic to MTJ device, for example
 and sample products of a 4 Mbit MrAM have actUally BeeN deLiVereD.
FIG. 8 Shows the structURe anD operation principle of a MagneTiC TunnEL jUnctiOn devicE (To BE HerEaFtEr rEfERrEd to aS a “MtJ devicE”), which is thE moSt Important parT Of The MRAM. As sHowN in FIG. 8(A), a MTJ dEviCe compRiSes A TunneLliNg junCtion sTRucturE in which a TuNNel barRIer (to be HEReAfteR also referred to as A “BaRRier layer”) made oF an oxiDe IS sANDwiCheD between a fIrSt and A Second eLEcTRODe mADe of a ferromagNetic metal. THE tuNnel baRrIer LAyer coMprisEs AN amOrphous Al—O lAyer (See Non-PatEnt DocUMent 1). As sHOwn in FIg. 8(A), in thE caSe oF parALlEl MagNeTIzaTIoN alIGnmEnt where ThE dIrectIons OF MAGnetIzaTionS of thE first and secoNd fErroMAgnEtic eLectrOdes ArE aligNed parAllel, ThE electric resistAnce Of the deviCe wItH reSpEct to THe direCtiOn nOrmal to The inteRFacEs OF THe Tunneling junction sTrUCTuRe decreaSes. On tHE oThER hand, in tHe CasE of aNTIparaLlel MAgNetizatiOn aligNMeNt Where thE dIrectiOnS of MagNetizATionS of the First and SeconD Ferromagnetic eLEctrodes are alIGnED AnTIparAllEl as shown in fIG. 8(B), THe elEctrIC rEsiSTance With rEsPEcT To the direction normaL tO the inTerfaCes of the tunneLing junctiON STructure IncrEAsES. The resistance Value Does not chaNGe in a genEral sTate, so thAt informaTIOn “1” or “0” can bE stOreD dePenDINg On whether the rESIstaNcE value iS hiGh or not. sinCe tHe pAraLlEl and antiParallel MaGnEtIzAtiOn aliGNments caN bE stOrEd iN a non-VOlatilE fashIon, tHe DeVIce Can be usED aS A Non-vOlAtIle mEmoRy DevicE.
FIG. 9 SHowS an examPle of the bAsiC StruCtUrE of the MrAM. FIG. 9(A) shows a PeRspective vIeW of The MRAm, ANd FIG. 9(B) scHematically shows a circuiT Block diAgrAm. FIG. 9(c) is a Cross-sectIon Of an exAmpLE of the StructUre of ThE MRam. referRINg To FiG. 9(a), in an MRAM, a WORd lIne WL AnD a biT line BL Are disposed in an intERseCting manner, wiTh aN MRAm CElL diSPoSEd aT eACh iNTErsection. As showN in FIG. 9(B), the mRam cEll disposeD At tHe InterseCtion of A word LIne and a Bit line coMprises a MtJ DeviCE And A MOSFET dirEctly conNected to tHE MTJ dEViCe. StoRed InformAtIon Can be Read by REadIng thE resisTaNce valUe of tHe mTJ devicE that functions as a load reSistanCe, usiNg tHe MOSFET. THe sTOreD informatIon cAn be rewritTen By aPplyiNg a MAgnetIc fiELd To tHE MTJ dEvicE, For examplE
 and sample products of a4 Mbit MRA M hav e a ctu al ly b eendelivered.
FIG .  8 s hows the structure and  oper at i on p r in ciple  of a m a gn e t ictu nn elju n ct ion d evi ce (tobe hereaft erre ferred to as a“MTJ devic e”) , which is t hemost i mp ort a nt pa rtof th e MRAM .  As sh own in FI G. 8(A),a  MTJ de v i ce  com prises a tunnelli n gj unction struct ure in  w h ic h a t unn el barrier  ( to be hereaft e ra l s o r e ferred to asa “barrierl aye r”) ma de  of an oxi de is  s a ndw iched betwe en a  first an d a se c ond ele c trode m ade of  afer roma g ne ti c m et a l.T he  tu n nel  barrier  l ay er co mpri s e s an a mor phou s Al— O layer (seeNon -Pat e ntDocum ent 1 ). A sshown  in FI G. 8( A) , in the case o f pa rallel ma gne ti zat io n ali g nmentwhe rethe dir ections ofma g n e ti zations of the fir st a nd  secondferrom a gn et i c electr od esarea l igned  par a ll el, theelectr i cre sistanc eof the  d evi cewithr espe ct tothe dire ction normal to thei nterfaces oft he t un n elin g j unction str uctu r e de crea s es . O n  theother  h a nd ,  in the case of ant ip aralle l mag netization al ignment wh e r e  the dir ecti o ns of magnetizati ons o f the firs t  and sec ond f erromagn etic elec t r odes are  al ign edant i p ar allel as show n in F IG . 8(B),  th e elect ric  re sis tan ce  with res pect toth edi re cti on no r mal to t he  in te rfa ces o f  the t unnel ingju nc t ion  struct u re i ncre as es . Th e r es istan ce v a lue  does n ot change  in a ge ne ra l state , so that inf or mation “1”  o r “ 0” can b e stored  depending on whether t h e resis tan ce va lueis high o r n ot. Si nce the pa rallel  andan tip a r allel m ag net iz ation alig n m ent s can  b e st ored in  a non-volatile fa s hio n, the device  ca n be u se d a s  a non -v o lat i l e memory device .
FIG. 9 s ho w san example ofth e basic  struct ure o f  the MR AM. FIG.9(A) show sa pe r s pec tive viewof the M RAM, andF IG. 9 ( B)  sche mat ically  s how s a c ircuit blo ck di agram.  F IG. 9( C) is  a  cross-s ection of an example of  the s truct ure  of the M RAM .  Re ferring t o FI G. 9(A), i n a n M RAM,a w o rd li ne W L  a nda  bitline BL are di s po sed i nan intersec t i n g m anner , w i th anMRAM  cell disposed at each intersect ion. A s s how n  inFI G. 9(B), the M RAM  c e l l dispos ed  at the int ersectio no f a w ord li ne and  a bitl i ne compri sesa M TJ device  an da  MOSFET  d ir e ctly c onne ct ed tothe MT J  dev i c e. Stored inform ation c an be rea d byre ading t h e re sistance v alue of the  MTJ d evic e tha t funct io ns asa l oa d resistan c e, usingthe M OSFET.Th e st ore d info rmat i o n can  bere wri tten by a p p ly i ng  a mag neti c fie ld  tothe MTJ d e vice, fo r e x ample
 and_sample products_of a 4 Mbit_MRAM have_actually_been delivered.
FIG._8_shows the structure_and operation principle_of a magnetic tunnel_junction device (to_be_hereafter referred to as a “MTJ device”), which is the most important part of_the_MRAM. As_shown_in_FIG. 8(A), a MTJ device_comprises a tunnelling junction structure_in which_a tunnel barrier (to be hereafter also referred_to_as a “barrier_layer”) made of an oxide is sandwiched between a_first and a second electrode made_of a ferromagnetic_metal._The_tunnel barrier layer comprises_an amorphous Al—O layer (see Non-Patent_Document 1). As shown in FIG._8(A), in the case of parallel magnetization_alignment where the directions of magnetizations_of the first and second_ferromagnetic electrodes_are aligned parallel, the electric_resistance of the_device with_respect to the_direction normal to the interfaces of_the tunneling junction_structure decreases. On the other hand,_in_the case of_antiparallel_magnetization_alignment where_the directions of_magnetizations_of the_first_and second ferromagnetic electrodes are aligned_antiparallel_as shown in FIG. 8(B), the electric_resistance with respect to_the_direction normal to the_interfaces of the tunneling junction_structure increases. The resistance value does_not change_in a_general state, so that information “1” or “0” can be stored_depending on whether the resistance value_is high or not._Since the_parallel_and antiparallel magnetization_alignments_can be_stored in a non-volatile fashion, the device_can be_used as a non-volatile memory device.
FIG._9 shows an example_of_the basic structure of the MRAM._FIG. 9(A) shows a perspective view_of the MRAM, and FIG._9(B)_schematically_shows a circuit block diagram._FIG. 9(C) is a cross-section of_an example of_the structure of the MRAM. Referring to_FIG._9(A), in an MRAM, a word_line_WL and a bit line BL_are_disposed_in an intersecting manner, with_an MRAM cell disposed at each_intersection. As shown in FIG. 9(B), the MRAM cell_disposed at the_intersection of a word line_and_a_bit line comprises a MTJ device and a MOSFET directly_connected to_the MTJ device._Stored information can be read by reading the resistance value_of the MTJ device that functions as_a load resistance, using the MOSFET. The stored information can be_rewritten by applying a magnetic field to the_MTJ device, for example