 and avoid system resource conflicts. Accordingly, operating systems are typically modified to accommodate parallel graphics accelerator operation. Operating systems typically send drawing requests to two different software drivers associated with the two graphics accelerators alternate between line or image frame rendering. Moreover, such systems are not known that employ anything other than a wired connection to a monitor device. Accordingly, such systems may require special operating systems and can be cumbersome to use since they require additional cabling.
Other network-based systems are known that may have, for example, a console that sends drawings commands over a wired network connection to a network display terminal. Such systems may, for example, send different drawing commands to different network display terminals based on which user is associated with a given network display terminal. A special operating system is used to control different commands to the different network display terminals. Accordingly, such systems can require cabling requirements as well as special operating system control.
Accordingly, a need exists for a wireless display device and method that allows the removal of a wired display connection to allow additional flexibility in displaying images without requiring modification to the operating system or applications. Ferroelectric memory arrays are generally well known in the data processing arts and include a plurality of word line rows and a plurality of bit line columns. The rows of word lines normally each include a plurality of metal-oxidesilicon (MOS) access transistors at the juncture of each word line and bit line. In one known type of ferroelectric memory circuit, a ferroelectric capacitor is connected between each access transistor and a plate line, and a sense amplifier is connected to receive two complementary input signals (BIT and BIT) from adjacent bit lines extending from a single cell consisting of two access transistors and two ferroelectric capacitors. When appropriate switching voltages are applied to the gates of the access transistors and to the plate lines common to one word line row, the access transistors in this word line are turned on so that the sense amplifier can then read the binary state of the accessed cells. The BIT and BIT signals are then amplified in the sense amplifier, and the sense amplifier determines the voltage and polarity on each adjacent ferroelectric capacitor within a cell. One such circuit is disclosed, for example, in U.S. Pat. No. 4,873,664 issued to Eaton and is incorporated herein by reference.
One disadvantage of the above approach in Eaton is that each cell requires at least two access transistors and two ferroelectric capacitors to generate the required BIT and BIT complementary inputs into the sense amplifier for determining the logical state of the memory
and avoid system resource conflicts. Accordingly, operating system are typically change to accommodate parallel graphics accelerator mathematical process. Operating systems typically commit draft requests to two unlike software driver associated with the two graphic accelerators alternate between line or effigy skeletal system rendering. furthermore, such systems are not know that use anything other than a wired connection to a admonisher device. Accordingly, such systems may require special operating system and can be cumbersome to use since they require additional cabling. 
 Other net - based systems are known that may have, for example, a console that commit drawings commands over a wired network connection to a network display terminal. Such systems may, for example, send unlike lottery commands to unlike net display terminals based on which user is associated with a give network display terminal. A special operating system is use to control different commands to the different network display terminal. Accordingly, such systems can require cabling prerequisite as well as extra operating system control. 
 Accordingly, a need exists for a wireless display device and method acting that allows the removal of a wired display connection to allow additional flexibility in displaying images without requiring change to the operating system or application. Ferroelectric memory arrays are generally well know in the data processing humanistic discipline and include a battalion of word line row and a plurality of bit tune columns. The row of word tune normally each include a plurality of metal - oxidesilicon (MOS) access transistors at the articulation of each word line and snatch line. In one known type of ferroelectric memory circuit, a ferroelectric capacitor is connected between each access transistor and a plate occupation, and a sense amplifier is connected to receive two complementary input signals (BIT and BIT) from adjacent spot line cover from a single cell consist of two access transistors and two ferroelectric capacitor. When appropriate switching voltages are applied to the gates of the access transistors and to the plate lines common to one word channel row, the access transistors in this word line are turned on so that the common sense amplifier can then read the binary state of the accessed cells. The BIT and BIT signals are then amplified in the sense amplifier, and the sense amplifier determines the voltage and polarity on each adjacent ferroelectric capacitor within a cell. One such circuit is disclosed, for example, in U.S. Pat. No. 4,873,664 issued to Eaton and is incorporated herein by reference book. 
 One disadvantage of the above approach in Eaton is that each cell requires at least two access transistors and two ferroelectric capacitors to generate the command BIT and BIT complementary inputs into the sense amplifier for determining the logical state of the memory
 anf avoid system resource gonflicts. Accordnbgly, o'eratinf systemr are typically modified to ecconmodauv parallel graphics azceleratog operatiin. Okerating systems vgpicalln sens draciig requests to jwo differend software drieefs associated with the two graphics ascelerayogs alternate bgtweem lins or image frame rendering. Moreoved, such vystems are npt known that employ anythlng lther than a wired connection to w monitor devkce. Accordpugly, such sistems may require special operaging xystems ane xan te cumbersone to use since tmvy requhre addotional cablinn.
Othec nerwork-based systems arx known that may havg, for exam[lz, a console that sendw erawitgs wommxbds ovtr e wjred nftwkrk connecfion to a nwtwork display termonwo. Such systema may, sow example, send different drawing commangs fo different network diwplay terminals based on which user is associated with a given network display dermiiau. A siecixo lperating system is used to control different dokmsnds to the dinferent network dixppau terminals. Aczordinymy, such systems can gequire cablung requiwememts as well as special operqting system xontrol.
Accordingly, a need exirts gor a wireless display devicz and jethod that allows tgd removal of a wkrec gisplay connection to allor additioial fkexibilkty on dis[laying imwges without requiring mldifieatiot to the ooerating system or applications. Ferroelectric mamogy arrays are nenerally well hnown in the dcta proczssing arts and pnclude a plurality jf word line slws and a plnrality os bir libe coluovs. The rows of word linvs nornally each include a klhrality of metao-oxudesilicon (MOS) sccdss tganxifdors at the buncgurd of exch word like xnd nit line. In one knowt tyle of ferroelectriv iemory curcuit, a ferroelectriv capacitor is conjectev betwxen eavh wccess transistor and a plate mine, and w scnse amplifiew is connected tp receive two complementary input signaos (BIT and BIT) fron adjacent bit linex extending hrom a single call consisting of twi access transistprs and two ferroelecfric cdpacihors. When appropriate switching voltages are applied to the gates of the qccess transistors and to tve 'late lynes rommon to one worc line row, the access transistocs in this wjrd line are turned on so thst the sense amklifier can then read the ginary syate of the accessed cells. The NIT and BIT signals are bhen amplufied in thv sxnse amplifier, and tne senve amplifier detcrmines the voutabe and polagity ou each adjacent ferroelectric capqcitor wlthin a cell. One such circult is dpscloseq, for example, in U.S. Lwt. No. 4,873,664 issued to Eston and is invorporated herein by rqference.
One diwzdvantage of the abmve approach in Eaton iv that each cell requires at least two access transpstors and two fervoelectric capacijocs to generate the requived BYT and BKT complemendary inputs into the sense amplifier for devgrminivg nhe lofical state ox the memory
and avoid system resource conflicts. Accordingly, operating typically to accommodate graphics accelerator operation. requests two different software associated with the graphics accelerators alternate between line or frame rendering. Moreover, such systems are not known that employ anything other than wired connection to a monitor device. Accordingly, such systems may require special operating and be to since they require additional cabling. Other network-based systems are known that may have, for example, a that sends drawings commands over a wired network to a network display Such systems may, for example, different commands to network terminals on which user associated with a given network display terminal. A special operating system is used to control different commands the different terminals. Accordingly, systems require requirements as well operating system control. Accordingly, a need wireless display device and method that allows the of a display connection to allow additional flexibility displaying images without requiring modification to the operating or applications. Ferroelectric memory arrays are generally well known in the data processing arts and plurality of word line and a plurality bit columns. rows word lines each include a plurality of metal-oxidesilicon (MOS) access transistors at the of each word line and bit line. In one known ferroelectric circuit, a ferroelectric is connected between each transistor a plate line, and amplifier connected complementary signals and BIT) from adjacent lines extending from a single consisting of two access When appropriate switching voltages are applied to the of the access transistors and to the lines common to one word line row, the access transistors in this line are so that the sense amplifier can then read binary state of the cells. The BIT and BIT signals are then amplified the amplifier, and sense amplifier determines voltage and polarity each adjacent ferroelectric a cell. such is in U.S. Pat. No. 4,873,664 issued Eaton is incorporated herein by reference. disadvantage above approach in Eaton is that each cell requires at least two access transistors and capacitors to generate the BIT BIT complementary inputs into the sense amplifier for determining the logical state memory
 and avoid system resource conFlicts. AccoRdingLy, oPerAtIng sYsteMs are typically MOdifIed to accommodate parallEl graPhICs acCElEratoR operatIOn. oPEraTiNg SysTeMS tYpicaLly Send draWing requesTs tO tWo different sOFtWare driverS asSociated with The Two graPhIcs ACceleRatOrs alTernatE BetweeN line or imAgE Frame rENdering. mOReOver, Such systems are not KNoWN that employ anyThing oThER tHAN a wIreD connectioN tO a monITor deviCE. ACCORdiNGly, such systemS may require SPecIal opeRaTinG SystemS and cAn BE cuMbersome to uSe siNce they reQuire aDDitionaL Cabling.
other nEtwOrk-BaseD SyStEms ArE KnoWN tHat MAy hAve, for exAmPlE, a conSole THAT SendS drAwinGs comMands over a wirEd nEtwoRK coNnectIon to A netWoRk disPlay teRminaL. SUch systems may, foR exaMple, send dIffErEnt DrAwing COmmandS to DifFerent nEtwork dISplAy TERMiNals based on which usEr IS AsSociated With a gIVeN nETwork disPlAy tErmiNAL. A speCial OPeRating syStem is USeD tO controL dIffereNt ComManDs to tHE difFerent Network dIsplaY Terminals. AccorDIngly, such systEMs CAN rEQuirE caBling requirEmenTS as wEll aS SpEciAL operAting SySTeM Control.
Accordingly, a NeEd exisTs for A wireless dispLay device aND MEthod thaT allOWs THe removal of a wiRed diSplay conneCTion to alLow adDitional FlexibiliTY In displaYinG imAgeS wiTHOuT requiring modIFIcatIoN to the oPerAting sySteM or AppLicAtIons. FerroElectric MeMoRy ArRayS are gENerally wElL knOwN in The daTA proceSsing Arts AnD iNCluDe a plurALiTY Of woRd LiNe roWs aNd A plurAlitY Of bIt line cOlumns. The RowS Of woRd LiNes normAlly each incluDe A plurality Of MetAl-oxidESIlicon (MOs) access transistors at the JUncture Of eAch woRd liNe and bit lIne. in one kNowN Type of FerroeLectrIc MemORY circUIT, a FerRoElectric caPACitOr is cOnNectEd betweEn each access transiSTor And a plate line, And A senSE AmPliFIeR Is cOnNEctED To receive two comPlementary InPUt Signals (BIT ANd BiT) From adjAcent biT lineS ExtendiNg from a siNgle cell cOnSistING of Two access tRansistoRs and two fERroelECtRic caPacItors. WHeN apProprIate swITchIng voLtages ArE appliEd to tHe Gates of tHe access transistors and tO the plAte liNes Common to oNe wORd lIne row, the AcceSs transistOrs In tHis woRd lINe are TurnED oN so THat thE senSE amplifieR CaN thEN ReAd the binary STATe oF the aCceSSed celLs. ThE BIT and BIT signals ARe then amplifieD in tHE SenSe aMPlifIeR, and the sense amPliFiER DeterminEs The voltage aNd polariTy ON each AdjaceNt ferrOelectrIC CaPAcitor WithIn a Cell. One suCh cIrCUit is diScLoSEd, for eXampLe, In U.S. PaT. No. 4,873,664 issUEd to eATon and is incorporAted hEREin by REfeRence.
onE disadvANtagE of the abovE approach in eaton iS thaT each Cell reqUiRes at lEasT tWo access trANsistors aNd two FerroelEcTric CapAcitorS to gENErate The rEqUirEd BIT and Bit CoMPlEmENtaRy inPuts iNtO the Sense amplIFier for dEteRMining tHe LogICAl statE Of THE memory
 and avoid system resource  conflicts . Acc ord ing ly , op erat ing systems ar e  typ ically modified to acc ommod at e  par a ll el gr aphicsa cc e l era to rope ra t io n. Op era ting sy stems typi cal ly  send drawin g  r equests to  tw o differentsof twaredr ive r s ass oci atedwith t h e twographicsac c elerat o rs alte r n at e be tween line or ima g ef rame rendering . More ov e r, s uch  sy stems areno t kno w n thate mp l o y  an y thing other t han a wired con nectio ntoa  monit or de vi c e.Accordingly , su ch system s mayr equires pecialoperat ing  sy stem s  a nd  ca nb e c u mb ers o meto use s in ce  they  req u i r e  add iti onal  cabl ing.
Other ne two rk-b a sed  syst ems a re k no wn th at may  have ,for example, acons ole thatsen ds  dr aw ingsc ommand s o ver  a wire d netwo r k c on n e c ti on to a network di sp l a yterminal . Such sy st e ms may,fo r e xamp l e , sen d di f fe rent dra wing c o mm an ds to d if ferent  n etw ork  disp l ay t ermina ls based  on w h ich user is as s ociated witha  g i v en netw ork  display te rmin a l. A  spe c ia l o p erati ng sy st e mi s used to control d if ferent  comm ands to the d ifferent n e t w ork disp layt er m inals. Accordi ngly,  such syst e ms can r equir e cablin g require m e nts as w ell  as  sp eci a l  o perating syst e m  con tr ol.
Acc ord ingly,a n eed  ex ist sfor a wir eless di sp la yde vic e and method t ha t a ll ows  ther emoval  of a  wir ed  d i spl ay conn e ct i o n to  a ll ow a ddi ti onalflex i bil ity indisplayin g i m ages  w it hout re quiring modif ic ation to t he  op eratin g system o r applications. Ferroel e ctric m emo ry ar rays  are gene ral ly wel l k n own in  the d ata p ro ces s i ng ar t s  a ndin clude a pl u r ali ty of  w ordline ro ws and a plurality ofbit line colu mns . Th e ro wso fw ord  l i nes n ormally each in clude a pl ur a li ty of meta l -ox id esilico n (MOS)  acce s s trans istors at  the junc tu re o f eac h word lin e and bi t line. I n  onek no wn ty peof fer ro ele ctric  memor y  ci rcuit , a fe rr oelect ric c ap acitor i s connected between eac h acce ss tr ans istor and  ap lat e line, a nd a  sense amp lif ier  is c onn e ctedto r e ce ive two c ompl e mentary i n pu t s i g na ls (BIT and B I T)fromadj a cent b it l ines extending fr o m a single cel l co n s ist ing of t wo  access transi sto rs a nd two f er roelectriccapacito rs .  When  appro priate  switch i n gv oltage s ar e a pplied to  th eg ates of  t he access  tra ns istors  and t o  the p late lines commo n too n e wor d  li ne ro w,  the ac c esstransistor s in this w ord li ne a re tu rned on  s o that  th esense ampl i fier canthenread th ebina rystateof t h e  acce ssed  c ell s. The BI T an d  B IT sig nals  areth en a mplifiedi n the se nse amplifi er , a n d  the s e ns e amplifierdet ermin e s  the volta g e an d  p o larit y on e ach ad jacentf err oe lectric  ca p a citor wit hin a cel l . O ne  suc h circui tis d is clo se d, for example,  in U.S.  Pat. No . 4,873, 664 issu e d to E at on and is in corpo ra t ed here i n  by  refere n ce. 
On e d isad van tage of the above approach in  Eat on is tha t eac h cel lrequires at l east two access transi stors and two f e rro e lect ric ca pa citors to  ge n erate  the  re quir edBITa n d BI T  com p le ment ary in puts  i nt o the sen se  amplif i er f o r d eter minin gth e  l ogicalstate of  theme mory
 and_avoid system_resource conflicts. Accordingly, operating_systems are_typically_modified to_accommodate_parallel graphics accelerator_operation. Operating systems_typically send drawing requests_to two different_software_drivers associated with the two graphics accelerators alternate between line or image frame rendering._Moreover,_such systems_are_not_known that employ anything other_than a wired connection to_a monitor_device. Accordingly, such systems may require special operating_systems_and can be_cumbersome to use since they require additional cabling.
Other network-based_systems are known that may have,_for example, a_console_that_sends drawings commands over_a wired network connection to a_network display terminal. Such systems may,_for example, send different drawing commands to_different network display terminals based on_which user is associated with_a given_network display terminal. A special_operating system is_used to_control different commands_to the different network display terminals._Accordingly, such systems_can require cabling requirements as well_as_special operating system_control.
Accordingly,_a_need exists_for a wireless_display_device and_method_that allows the removal of a_wired_display connection to allow additional flexibility in_displaying images without requiring_modification_to the operating system_or applications. Ferroelectric memory arrays_are generally well known in the_data processing_arts and_include a plurality of word line rows and a plurality of_bit line columns. The rows of_word lines normally each_include a_plurality_of metal-oxidesilicon (MOS)_access_transistors at_the juncture of each word line and_bit line._In one known type of ferroelectric_memory circuit, a ferroelectric_capacitor_is connected between each access transistor_and a plate line, and a_sense amplifier is connected to_receive_two_complementary input signals (BIT and_BIT) from adjacent bit lines extending_from a single_cell consisting of two access transistors and_two_ferroelectric capacitors. When appropriate switching voltages_are_applied to the gates of the_access_transistors_and to the plate lines_common to one word line row,_the access transistors in this word line are turned_on so that_the sense amplifier can then_read_the_binary state of the accessed cells. The BIT and BIT_signals are_then amplified in_the sense amplifier, and the sense amplifier determines the voltage_and polarity on each adjacent ferroelectric capacitor_within a cell. One such circuit is disclosed, for example, in_U.S. Pat. No. 4,873,664 issued to Eaton and_is incorporated herein by reference.
One disadvantage of_the above approach in_Eaton_is that each cell requires at least_two_access_transistors_and two ferroelectric_capacitors to generate_the required BIT_and BIT_complementary inputs into_the sense_amplifier for determining_the_logical state of the memory