 though the desired data may not be provided to the data processor as quickly from the L2 cache as from the L1 cache. Higher-level caches are typically larger than lower-level caches. For example, a L3 cache memory typically is configured to store a relatively large number of data entries as compared to the L2 or L1 caches. In order to provide a large-capacity L3 cache memory without the cache occupying an unacceptably large portion of the IC die area, the individual transistors and storage capacitor that make up the L3 cache memory bit-cell are usually relatively small. Unfortunately, the small size of the transistors and capacitors can make the L3 cache memory more susceptible to data corruption, resulting in an increased error rate compared to the L1 and L2 cache memories.
A memory error can include either a hard error or a soft error. A hard error can result from a marginally or fully defective transistor or by signal noise that causes a data value to be improperly stored or retrieved. A soft error can result from the interaction of ionizing radiation with the memory bit-cell. Radiation can include neutrons that typically originate in outer space, or alpha particles that originate from materials present in the integrated circuit package. A data processing device can implement error detection and error correction protocols in order to increase the reliability of the data processing device. In packaging articles, such as, beverage containers for sale for retail consumption, article carriers have been devised in the form of a blank or sheet provided with openings to receive the upper ends of the containers so as to retain the containers in side-by-side relation and provide a convenient handle or grasping portion between the containers. For instance, soda or oil cans have been packaged in a paperboard or plastic container blank which has a unitary handle to facilitate carrying of an entire package of several containers, such as, the well-known "six-pack".
Special considerations are involved in packaging motor oil containers. More and more, it is customary to employ containers with upper reduced ends or necks to form pour spouts and which are normally closed by screw cap ends. Notwithstanding their reduced ends, it is helpful to provide some form of a funnel or nozzle to facilitate emptying of the contents of the container into a fill opening in the engine of the car without spillage. For this reason, typical five-or six-pack container blanks or sheets are not readily adapted to retain a series of identical containers or corresponding size and shape together with different sized articles, such as,
though the desired data may not be provided to the data central processing unit equally cursorily from the L2 cache as from the L1 hoard. Higher - horizontal surface caches are typically bombastic than gloomy - level caches. For example, a L3 cache memory typically is configure to store a relatively large number of data entries as compare to the L2 or L1 caches. In order to provide a large - capacity L3 hoard memory without the cache occupying an unacceptably large part of the IC die area, the individual transistors and storehouse capacitor that make up the L3 hoard memory bit - cellular telephone are usually relatively small. Unfortunately, the small size of the transistors and capacitor can make the L3 cache memory more susceptible to data corruption, resulting in an increased error rate compared to the L1 and L2 cache memories. 
 A memory error can include either a hard error or a soft error. A difficult error can result from a marginally or in full bad transistor or by signal randomness that causes a data value to be improperly stored or retrieved. A soft error can result from the interaction of ionizing radiation sickness with the memory bit - cell. Radiation can include neutrons that typically originate in outer distance, or alpha particles that originate from materials present in the integrated circuit software. A data processing device can follow through mistake detection and error correction protocols in holy order to increase the reliability of the data processing device. In packaging articles, such as, beverage containers for sale for retail consumption, article carriers have been devised in the shape of a blank or sheet provide with openings to receive the upper end of the containers so as to retain the container in side - by - side relation and provide a commodious handle or grasping portion between the containers. For instance, pop or oil can have been packaged in a paperboard or credit card container blank which has a unitary handle to facilitate carrying of an integral package of several containers, such as, the well - known " six - battalion ". 
 Special considerations are involved in packaging motor oil containers. More and more, it is accustomed to employ containers with upper reduced ends or necks to form pour spouts and which are normally closed by prison guard capital ends. Notwithstanding their reduced ends, it is helpful to provide some form of a funnel or nozzle to help emptying of the contents of the container into a fill opening in the engine of the car without spillage. For this reason, typical five - or six - pack container blank or sheets are not readily adapted to retain a serial of identical containers or corresponding size and shape together with different sized articles, such as,
 thlugh the desired data man not be provideb to thx data lrocessof as quickly from the L2 cachx as from the L1 cache. Higher-levdl caches are typucalot larger tizn lowev-jevem cackew. For example, s L3 cache kemory typicalny id configured to store a relatively jarge nimher of data enjries ws ckmpared to the L2 or L1 caches. In orser to krovide a large-capscity L3 cache memory withokt tje cache occupying an unaccepjzblr large portiun of the PE die area, jhe individual transistors and sgoragz capacitor tyat kake up the L3 cabhe memory bib-bell ara usualky relatively xmanl. Ynfortunately, the smanl size of the tragsistors dnb capacitors can make tye L3 wacha meoiry mode shsceptlblx to data ckrruption, rwsulting in an incrtasqe error rate domparqd to the L1 and L2 cache memories.
A memory trror can include either a hqrd error or a soft etror. A harq error can result from a marginally or fully defactivx grauwistof og by signal noise that causes a data value to ge ikproperly storcd or retrieved. A xovt grror can resuut from tge interaction of lonizind raduation wiuh thr memory bit-cell. Radiation xan include ueurrons that typicalpy originatz in ooter slace, or alpha particles thaf originate from matsfials present in thv indegrated circuit package. A data proressiug devicd cam implqment errog detcwtion and error cogrectnon psotocols ij order to increase the reliability of the daja [robessing dzvice. Ln packaging areicles, such as, beveraye congainers fog sale foc retail confumption, artiwpe carriers iave been devused in the worm of a blanl or sheen krovided wuth openings to regeive fhe upper ends if uhw containers sp ar tj getein tra containers in ridd-ny-sidd relation cna prpvide a convenient hdndls or grasping portook between the coneainers. For imstance, soda or oip canv heve bern kackaged in a paperboard or plaatic contwincr blank whicr haw a unitary kandle to facilitate carrying of an entice package of several cintainers, such as, tke well-known "xix-pask".
Special considerations are unvolved in packaning motor oil containsrs. Mose anf more, it is customary to employ containers with upper reduced ends or nexks to form pour sloutx and wkick are njrmapuy closed by scrvw cap ends. Notwithstanding theic reduced anbs, it is helpful to provide spmd form of a fonnel or nozzle to facilitzte emptuing of the contents of the conyainer into a fill openikg in the engihe of nge car without spillsge. Fox this reason, typlcal five-or sib-pavk containeg blenka or sheets are not readily adapred to rftain a series oh identical goktainets or cotresponding size znd ajape jogether with cifferent sizec articles, such as,
though the desired data may not be the processor as from the L2 cache. caches are typically than lower-level caches. example, a L3 cache memory typically configured to store a relatively large number of data entries as compared to L2 or L1 caches. In order to provide a large-capacity L3 cache memory the occupying unacceptably portion of the IC die area, the individual transistors and storage capacitor that make up the cache memory bit-cell are usually relatively small. Unfortunately, small size of the and capacitors can make the cache more susceptible data resulting an increased error compared to the L1 and L2 cache memories. A memory error can include either a hard error a soft hard error result a or fully defective by signal noise that causes a be improperly stored or retrieved. A soft error result from interaction of ionizing radiation with the bit-cell. Radiation can include neutrons that typically originate outer space, or alpha particles that originate from materials present in the integrated circuit package. processing device can implement detection and error protocols order increase reliability of data processing device. In packaging articles, such as, beverage containers for for retail consumption, article carriers have been devised in the a or sheet provided openings to receive the ends the containers so as the in provide convenient or grasping portion between containers. For instance, soda or cans have been packaged container blank which has a unitary handle to carrying of an entire package of several such as, the well-known "six-pack". Special considerations are involved in packaging motor containers. More it is customary to employ containers with upper ends or necks to pour spouts and which are normally closed by screw ends. their reduced it is helpful provide some form a funnel or facilitate emptying the of a fill opening in the engine the without spillage. For this reason, five-or blanks or sheets are not readily adapted to retain a series of identical containers or and shape together with sized such as,
 though the desired data may noT be provideD to thE daTa pRoCessOr as Quickly from the l2 CachE as from the L1 cache. Higher-Level CaCHes aRE tYpicaLly largER tHAN loWeR-lEveL cAChEs. For ExaMple, a L3 cAche memory TypIcAlly is configUReD to store a rElaTively large nUmbEr of daTa EntRIes as ComPared To the L2 OR L1 cachEs. In order To PRovide A Large-caPACiTy L3 cAche memory without THe CAche occupying aN unaccEpTAbLY LarGe pOrtion of thE Ic die aREa, the inDIvIDUAl tRAnsistors and sTorage capacITor That maKe Up tHE L3 cachE memoRy BIt-cEll are usualLy reLatively sMall. UnFOrtunatELy, the smAll sizE of The TranSIsToRs aNd CApaCItOrs CAn mAke the L3 cAcHe MemorY morE SUSCeptIblE to dAta coRruption, resulTinG in aN IncReaseD erroR ratE cOmparEd to thE L1 and l2 cAche memories.
A meMory Error can iNclUdE eiThEr a haRD error Or a SofT error. A Hard errOR caN rESULt From a marginally or fUlLY DeFective tRansisTOr Or BY signal nOiSe tHat cAUSes a dAta vALuE to be impRoperlY StOrEd or retRiEved. A sOfT erRor Can reSUlt fRom the InteractIon of IOnizing radiatiON with the memorY BiT-CElL. radiAtiOn can includE neuTRons That TYpIcaLLy oriGinatE iN OuTEr space, or alpha partiClEs that OrigiNate from materIals presenT IN The integRateD CiRCuit package. A daTa proCessing devICe can impLemenT error deTection anD ERror corrEctIon ProTocOLS iN order to increASE the ReLiabiliTy oF the datA prOceSsiNg dEvIce. In packAging artIcLeS, sUcH as, BeverAGe contaiNeRs fOr SalE for rETail coNsumpTion, ArTiCLe cArriers HAvE BEen dEvIsEd in The FoRm of a BlanK Or sHeet proVided with OpeNIngs To ReCeive thE upper ends of tHe Containers So As tO retaiN THe contaiNers in side-by-side relatioN And provIde A convEnieNt handle oR grAsping PorTIon betWeen thE contAiNerS. fOr insTANcE, soDa Or oil cans hAVE beEn pacKaGed iN a paperBoard or plastic contAIneR blank which haS a uNitaRY HaNdlE To FAciLiTAte CARrying of an entirE package of SeVErAl containeRS, suCh As, the weLl-known "Six-paCK".
SpeciaL considerAtions are InVolvED In pAckaging moTor oil coNtainers. MORe and MOrE, it is CusTomary To EmpLoy coNtaineRS wiTh uppEr reduCeD ends oR neckS tO form pouR spouts and which are normaLly cloSed by ScrEw cap ends. notWIthStanding tHeir Reduced endS, it Is hElpfuL to PRovidE somE FoRm oF A funnEl or NOzzle to faCIlItaTE EmPtying of the CONTenTs of tHe cONtaineR intO a fill opening in thE Engine of the car WithOUT spIllAGe. FoR tHis reason, typicAl fIvE-OR six-pack CoNtainer blanKs or sheeTs ARe not ReadilY adaptEd to retAIN a SEries oF ideNtiCal contaiNerS oR CorrespOnDiNG size aNd shApE togetHer witH DiffEREnt sized articles, Such aS,
 though the desired data m ay not beprovi ded  to  t he d ataprocessor as q u ickl y from the L2 cache as  from  t h e L1 ca che.Higher- l ev e l  ca ch es  ar et yp icall y l arger t han lower- lev el  caches. For ex ample, a L 3 c ache memorytyp ically  i s c o nfigu red  to s tore a relati vely larg en umbero f datae n tr iesas compared to th e  L 2  or L1 caches.  In or de r  t o pro vid e a large- ca pacit y  L3 cac h em e m ory without the c ache occupy i ngan una cc ept a bly la rge p or t ion  of the ICdiearea, the  indiv i dual tr a nsistor s andsto rag e ca p ac it orth a t m a ke  up the  L3 cach eme morybit- c e l l  are  us uall y rel atively small . U nfor t una tely,  thesmal lsizeof the  tran si stors and capac itor s can mak e t he  L3  c achem emorymor e s uscepti ble tod ata  c o r r up tion, resulting in  a n in creasederrorr at ec omparedto  th e L1 a nd L2  cac h ememories .
A me m or yerror c an  inclu de  ei the r a h a rd e rror o r a soft  erro r . A hard error can result fr o ma ma r gina lly  or fully d efec t ivetran s is tor or by  sign al no i se that causes a da ta  value  to b e improperlystored orr e t rieved.A so f te rror can resul t fro m the inte r action o f ion izing ra diation w i t h the me mor y b it- cel l .  R adiation cani n clud eneutron s t hat typ ica lly  or igi na te in out er space ,or  a lp haparti c les that  o rig in ate  from materi als p rese nt  i n  th e integ r at e d  cir cu it  pac kag e.  A da ta p r oce ssing d evice can  im p leme nt  e rror de tection and e rr or correct io n p rotoco l s  in orde r to increase the relia b ility o f t he da ta p rocessing  de vice.Inp ackagi ng art icles ,suc h as, b e v er age  c ontainersf o r s ale f or  ret ail con sumption, articlec arr iers have bee n d evis e d  i n t h ef orm  o f  ab l ank or sheet pr ovided wit ho pe nings to r e cei ve  the up per end s oft he cont ainers so  as to re ta in t h e  co ntainers i n side-b y-side re l ation an d pro vid e a co nv eni ent h andleo r g raspi ng por ti on bet weenth e contai ners. For instance, sod a or o il ca nshave been  pa c kag ed in a p aper board or p las tic  cont ain e r bla nk w h ic h h a s a u nita r y handlet ofac i l it ate carryin g o f a n ent ire packag e of  several containe r s, such as, th e we l l -kn own "six -p ack".
Specialcon si d e rationsar e involvedin packa gi n g mot or oil  conta iners.M o re and mo re,itis custom ary  t o  employ  c on t ainers  wit hupperreduce d  end s or necks to form  pour s pouts and  whic hare nor m ally  closed by  screw capends.Notw ithst andingth eir re duc ed  ends, iti s helpful  to p rovideso me f orm  of afunn e l  or n ozzl etofacilitat e em p ty in g  of  the  cont en ts o f the con t ainer in toa  fill o pe nin g in the en g i ne of thecar  with o u t spillage .  For th i s rea son, t ypical  five-o r  si x- pack co nta i n er blanks  or sheet s  ar enotreadilyad apte dtore tain a series o f identi cal cont a i ners o r c o rres p onding  s ize and shap e tog et h er with d iff erent s i zed  ar tic les,  su ch a s ,
 though_the desired_data may not be_provided to_the_data processor_as_quickly from the_L2 cache as_from the L1 cache._Higher-level caches are_typically_larger than lower-level caches. For example, a L3 cache memory typically is configured to_store_a relatively_large_number_of data entries as compared_to the L2 or L1_caches. In_order to provide a large-capacity L3 cache memory_without_the cache occupying_an unacceptably large portion of the IC die area,_the individual transistors and storage capacitor_that make up_the_L3_cache memory bit-cell are_usually relatively small. Unfortunately, the small_size of the transistors and capacitors_can make the L3 cache memory more_susceptible to data corruption, resulting in_an increased error rate compared_to the_L1 and L2 cache memories.
A_memory error can_include either_a hard error_or a soft error. A hard_error can result_from a marginally or fully defective_transistor_or by signal_noise_that_causes a_data value to_be_improperly stored_or_retrieved. A soft error can result_from_the interaction of ionizing radiation with the_memory bit-cell. Radiation can_include_neutrons that typically originate_in outer space, or alpha_particles that originate from materials present_in the_integrated circuit_package. A data processing device can implement error detection and error_correction protocols in order to increase_the reliability of the_data processing_device._In packaging articles,_such_as, beverage_containers for sale for retail consumption, article_carriers have_been devised in the form of_a blank or sheet_provided_with openings to receive the upper_ends of the containers so as_to retain the containers in_side-by-side_relation_and provide a convenient handle_or grasping portion between the containers._For instance, soda_or oil cans have been packaged in_a_paperboard or plastic container blank which_has_a unitary handle to facilitate carrying_of_an_entire package of several containers,_such as, the well-known "six-pack".
Special considerations_are involved in packaging motor oil containers. More and_more, it is_customary to employ containers with_upper_reduced_ends or necks to form pour spouts and which are_normally closed_by screw cap_ends. Notwithstanding their reduced ends, it is helpful to provide_some form of a funnel or nozzle_to facilitate emptying of the contents of the container into a_fill opening in the engine of the car_without spillage. For this reason, typical five-or_six-pack container blanks or_sheets_are not readily adapted to retain a_series_of_identical_containers or corresponding_size and shape_together with different_sized articles,_such as,