) panel, a backlight unit, and a driver. The TFT-LCD panel may have degradations as follows: first, degradation of characteristic values from standard design due to process deviations; second, degradation due to dust, poor cleaning at a film surface, and the like; and, third, degradation of characteristic variations due to static electricity and breakdown of thin film transistors or liquid crystal cells.
One of the degradations occurring in a TFT-LCD panel is the irregularity of combining a first substrate with an opposed second substrate, which results in reducing the sharpness of a displayed video or in leaking light when failing to meet the design margin.
Reference will now be made in detail to an LCD according to a related art, examples of which are illustrated in the accompanying drawings.
FIG. 1 shows a layout of an LCD according to a related art.
Referring to FIG. 1, a liquid crystal display generally comprises a number of ‘m’ gate lines G1 to Gm arranged in a first direction with a constant interval between the gate lines; a number of ‘n’ data lines D1 to Dn arranged in a second direction perpendicular to the respective gate lines G1 to Gm with a constant interval between the data lines; a plurality of pixel electrodes (not shown in the drawing) formed as a matrix in pixel areas defined by the crossing gate and data lines respectively; and a plurality of thin film transistors for applying data signals supplied through the respective data lines to the respective pixel electrodes by being switched according to signals of the gate lines.
Further, a pair of driver integrated circuits (ICs) 14 and 15 are installed at the sides of the gate and data lines, respectively, so as to supply gate and data driving signals thereto. Namely, a pair of pads (not shown in the drawing) are formed at the ends of the gate and data lines to which the driver ICs are connected.
FIG. 2 shows cross-sectional views of the LCD taken along a line I–I′ in FIG. 1.
Referring to FIG. 2, a gate insulating layer 22 is formed on a first substrate 21. An nth data line 23 is patterned on the gate insulating layer 22. A passivation layer 24 made of an insulator is formed over an entire surface of the substrate including the nth data line 23. A transparent conductive layer of indium tin oxide (ITO) 25 for applying a voltage to the liquid crystal display is patterned on the passivation layer 24.
A black matrix
) panel, a backlight unit, and a driver. The TFT - LCD panel may have degradation as take after: first, degradation of characteristic values from standard purpose due to process deviations; second, abasement due to dust, poor cleaning at a film open, and the like; and, third, degradation of characteristic variation due to static electricity and breakdown of thin film transistors or liquid quartz glass cells. 
 One of the degradations occurring in a TFT - LCD gore is the irregularity of combining a inaugural substrate with an opposed second substrate, which results in boil down the sharpness of a displayed video or in leaking light when fail to meet the design margin. 
 Reference will now be made in contingent to an LCD harmonize to a related art, examples of which are illustrated in the accompanying drawings. 
 FIG. 1 shows a layout of an LCD according to a related art. 
 Referring to FIG. 1, a melted crystal display generally constitute a number of ‘ m ’ gate lines G1 to Gm arranged in a inaugural direction with a constant interval between the gate lines; a numeral of ‘ n ’ data lines D1 to Dn arranged in a second direction perpendicular to the respective gate lines G1 to Gm with a ceaseless interval between the data lines; a plurality of pixel electrode (not shown in the draft) form as a matrix in pixel areas defined by the crossing gate and data line respectively; and a plurality of thin film transistor for applying datum signals supplied through the respective data lines to the respective pixel electrodes by being switch according to signals of the gate credit line. 
 Further, a couple of driver integrated circuits (ICs) 14 and 15 are installed at the sides of the gate and datum lines, respectively, so as to supply gate and data drive signals thereto. Namely, a couple of pads (not shown in the drawing) are form at the ends of the gate and data lines to which the driver ICs are connected. 
 FIG. 2 show cross - sectional views of the LCD subscribe along a line I – I′ in FIG. 1. 
 Referring to FIG. 2, a gate isolate layer 22 is formed on a first substrate 21. An nth datum line 23 is patterned on the gate insulating layer 22. A passivation layer 24 made of an insulator is formed over an entire open of the substrate include the nth data line 23. A transparent conductive layer of indium tin oxide (ITO) 25 for applying a voltage to the melted crystal display is patterned on the passivation layer 24. 
 A bootleg matrix
) pajel, a backlight unit, and a driver. The TYR-LCD penel mag have ddgradations as follows: first, dwgradqtion of characteristiz values vrom stabdarv design due to 'docess deviatjlns; vxcond, degradatipn due to gust, poor cleativg at a film surface, and the like; and, third, cehradation of crarabtqrisfpc variations due to static eledtricitj and breakdown og thin film transistors or liqkid crystal cells.
Oje of the dgfraqqtions occurfing in a UFC-LCD panel js the irregularity of combinine a fnrst substrqtw wljh an opposev secogd substrate, which rasults on reducing thc shacpnews of a displayed vidxo or in leaking ligrt when fdiming to meet the eewign karghn.
Rewwrevce wmll now bf mede in detajl to an LCE according to a rekaevc art, examplss of rhych are illustrated in the accompanying drzwings.
FIG. 1 shows a layoyt of an LCD accordinh to a rejated art.
Referring to FIG. 1, a liquid crystal displdy geiefaloy zimorises a number of ‘m’ gate lines G1 to Gm arrandsd ik a first directlon with a constany lnygrval between jhe gatz ljnes; a number of ‘n’ data lynes E1 to Dn awranbed in a second direction pwrpendicular ro the respective yate lines G1 to Bm wiyh a constant interval yetweeh the data pines; a pmjrality of pixel elvctrmdes (not shown in the drawyng) formev as c matrix in kixel aweas definfd by the crossing gate wnd dcta lhnes respeftively; and a plurality of thin film transistprv fmr applynng daba signals suppjied through tke respeetive aata lines to the respective pixel electrmfes by being switcheq acxordung to rkgnals of the bate lines.
Further, a pair of driver inbegrajes circuits (ICs) 14 ane 15 are installec ag tre smdes jx the gate atd dxta kines, respecunveoh, so as to supply gate atd dzta driving signalx bhereto. Nqmely, a [air of pads (mot shown in the dgawinj) are hormed at the ends of the gate and data lines to whlch the drivew ICw are connecced.
FIG. 2 shows cross-sectional views of thx LCD taken along a linw I–I′ in FIG. 1.
Referriug to FIG. 2, a jate igsulating layer 22 is formed on a first substratt 21. An nth data line 23 is pattesned ln the gate insulating layer 22. A passivation layer 24 made of an insulator iw formxd over an enfire surfdcz oy the stbstcave including the mth data line 23. A transparent coiductive ldyzr of indium tin oxide (ITO) 25 fpr applying a vultage to the liquid cryatal disllay is patterned on the passivstion layer 24.
A black matrlx
) panel, a backlight unit, and a TFT-LCD may have as follows: first, standard due to process second, degradation due dust, poor cleaning at a film and the like; and, third, degradation of characteristic variations due to static electricity breakdown of thin film transistors or liquid crystal cells. One of the degradations in TFT-LCD is irregularity of combining a first substrate with an opposed second substrate, which results in reducing the of a displayed video or in leaking light failing to meet the margin. Reference will now be in to an according a art, examples of are illustrated in the accompanying drawings. FIG. 1 shows a layout of an LCD according to a art. Referring 1, a crystal generally a number of lines G1 to Gm arranged in with a constant interval between the gate lines; number of data lines D1 to Dn arranged a second direction perpendicular to the respective gate G1 to Gm with a constant interval between the data lines; a plurality of pixel shown in the drawing) as a matrix pixel defined the gate and lines respectively; and a plurality of thin film transistors for applying signals supplied through the respective data lines to the respective by switched according to of the gate lines. a of driver integrated circuits and are sides the and data lines, respectively, as to supply gate and driving signals thereto. Namely, shown in the drawing) are formed at the of the gate and data lines to the driver ICs are connected. FIG. 2 shows cross-sectional views of the taken along I–I′ in FIG. 1. Referring to FIG. 2, gate insulating layer 22 formed on a first substrate 21. An nth data 23 patterned on gate insulating layer A passivation layer made of an formed over entire of the nth data line 23. A conductive of indium tin oxide (ITO) for voltage to the liquid crystal display is patterned on the passivation layer 24. A black
) panel, a backlight unit, and a drIver. The TFT-lCD paNel May HaVe deGradAtions as followS: FirsT, degradation of characteRistiC vALues FRoM stanDard desIGn DUE to PrOcEss DeVIaTions; SecOnd, degrAdation due To dUsT, poor cleaninG At A film surfaCe, aNd the like; and, ThiRd, degrAdAtiON of chAraCteriStic vaRIationS due to staTiC ElectrICity and BREaKdowN of thin film transiSToRS or liquid crystAl cellS.
ONE oF THe dEgrAdations ocCuRring IN a TFT-LCd PaNEL Is tHE irregularity Of combining A FirSt subsTrAte WIth an oPposeD sEConD substrate, wHich Results in ReduciNG the shaRPness of A displAyeD viDeo oR In LeAkiNg LIghT WhEn fAIliNg to meet ThE dEsign MargIN.
rEFereNce Will Now be Made in detail tO an lCD aCCorDing tO a relAted ArT, examPles of Which ArE illustrated in tHe acCompanyinG drAwIngS.
FiG. 1 shoWS a layoUt oF an lCD accoRding to A RelAtED ARt.
referring to FIG. 1, a liqUiD CRyStal dispLay genERaLlY CompriseS a NumBer oF ‘M’ Gate lInes g1 To gm arrangEd in a fIRsT dIrectioN wIth a coNsTanT inTervaL BetwEen the Gate lineS; a numBEr of ‘n’ data lines d1 To Dn arranged iN A sECOnD DireCtiOn perpendicUlar TO the RespECtIve GAte liNes G1 tO GM WiTH a constant interval bEtWeen thE data Lines; a pluraliTy of pixel eLECTrodes (noT shoWN iN The drawing) formEd as a Matrix in piXEl areas dEfineD by the crOssing gatE ANd data liNes ResPecTivELY; aNd a plurality oF THin fIlM transiStoRs for apPlyIng DatA siGnAls suppliEd througH tHe ReSpEctIve daTA lines to ThE reSpEctIve piXEl elecTrodeS by bEiNg SWitChed accORdING to sIgNaLs of The GaTe linEs.
FuRTheR, a pair oF driver inTegRAted CiRcUits (ICs) 14 And 15 are installEd At the sides Of The Gate anD DAta lines, Respectively, so as to supplY Gate and DatA drivIng sIgnals theRetO. NamelY, a pAIr of paDs (not sHown iN tHe dRAWing) aRE FoRmeD aT the ends of THE gaTe and DaTa liNes to whIch the driver ICs are COnnEcted.
FIG. 2 shows CroSs-seCTIoNal VIeWS of ThE lCD TAKen along a line I–I′ In FIG. 1.
ReferRiNG tO FIG. 2, a gate iNSulAtIng layeR 22 is formEd on a FIrst subStrate 21. An nTh data linE 23 iS patTERneD on the gate InsulatiNg layer 22. A pASsivaTIoN layeR 24 maDe of an InSulAtor iS formeD OveR an enTire suRfAce of tHe subStRate inclUding the nth data line 23. A traNspareNt conDucTive layer Of iNDiuM tin oxide (iTO) 25 fOr applying A voLtaGe to tHe lIQuid cRystAL dIspLAy is pAtteRNed on the pASsIvaTIOn Layer 24.
A black MATRix
) panel, a backlight unit,  and a dri ver.The  TF T- LCDpane l may have deg r adat ions as follows: first , deg ra d atio n  o f cha racteri s ti c val ue sfro ms ta ndard  de sign du e to proce ssde viations; se c on d, degrada tio n due to dus t,poor c le ani n g ata f ilm s urface ,  and t he like;an d , thir d , degra d a ti on o f characteristicv ar i ations due tostatic  e l ec t r ici tyand breakd ow n oft hin fil m  t r a n sis t ors or liquid  crystal ce l ls. 
One o fthe degrad ation so ccu rring in aTFT- LCD panel  is th e  irregu l arity o f comb ini nga fi r st  s ubs tr a tew it h a n  op posed se co nd  subs trat e , w hich  re sult s inreducing thesha rpne s s o f a d ispla yedvi deo o r in l eakin glight when fail ingto meet t hede sig nmargi n .
Refe ren cewill no w be ma d e i nd e t ai l to an LCD accord in g to  a relat ed art ,  e xa m ples ofwh ich  are i llust rate d  i n the ac compan y in gdrawing s. 
FIG.1sho wsa lay o ut o f an L CD accor dingt o a related ar t .
Referring t o  F I G .1 , aliq uid crystal  dis p laygene r al lyc ompri ses a  n u mb e r of ‘m’ gate lines  G 1 to G m arr anged in a fi rst direct i o n  with acons t an t  interval betw een t he gate li n es; a nu mberof ‘n’ d ata lines D 1 to Dnarr ang edina se cond directio n perp en dicular  to  the re spe cti vegat elines G1to Gm wi th  a  c on sta nt in t erval be tw een  t hedatal ines;a plu rali ty  o f  pi xel ele c tr o d es ( no tshow n i nthe d rawi n g)formedas a matr ixi n pi xe lareas d efined by the  c rossing ga te  an d data l ines res pectively; and a plural i ty of t hin  film  tra nsistorsfor  apply ing data s ignals  supp li edt h rough t he  re sp ective dat a lin es to  t he r especti ve pixel electrode s  by  being switch edacco r d in g t o  s i gna ls oft h e gate lines.
F urther, apa i rof driveri nte gr ated ci rcuits(ICs) 14 and15 are in stalled a tthes i des  of the ga te and d ata lines ,  resp e ct ively , s o as t osup ply g ate an d  da ta dr ivingsi gnalsthere to . Namely , a pair of pads (not s hown i n the  dr awing) ar e f o rme d at theends  of the ga teand  data  li n es to  whi c hthe drive r IC s  are conn e ct ed. F IG . 2 shows c r o s s-s ectio nal viewsof t he LCD taken alon g  a line I–I′ i n FI G .  1. 
Re f erri ng  to FIG. 2, agat ei n sulating  l ayer 22 isformed o na  firs t subs trate21. Ann t hd ata li ne 2 3 i s pattern edon the gat ein s ulatin g la ye r 22.A pass i vati o n  layer 24 made o f ani n sulat o r i s for me d overa n en tire surfa ce of the s ubstra te i nclud ing the  n th dat a l in e 23. A tr a nsparentcondu ctive l ay er o f i ndiumtino x ide ( ITO)  2 5 f or applyi n g  a vo lt a geto t he li qu id c rystal di s play ispat t erned o nthe p assiva t io n layer 24.A b lackm a trix
) panel,_a backlight_unit, and a driver._The TFT-LCD_panel_may have_degradations_as follows: first,_degradation of characteristic_values from standard design_due to process_deviations;_second, degradation due to dust, poor cleaning at a film surface, and the like;_and,_third, degradation_of_characteristic_variations due to static electricity_and breakdown of thin film_transistors or_liquid crystal cells.
One of the degradations occurring in_a_TFT-LCD panel is_the irregularity of combining a first substrate with an_opposed second substrate, which results in_reducing the sharpness_of_a_displayed video or in_leaking light when failing to meet_the design margin.
Reference will now be_made in detail to an LCD according_to a related art, examples of_which are illustrated in the_accompanying drawings.
FIG._1 shows a layout of_an LCD according_to a_related art.
Referring to_FIG. 1, a liquid crystal display_generally comprises a_number of ‘m’ gate lines G1_to_Gm arranged in_a_first_direction with_a constant interval_between_the gate_lines;_a number of ‘n’ data lines_D1_to Dn arranged in a second direction_perpendicular to the respective_gate_lines G1 to Gm_with a constant interval between_the data lines; a plurality of_pixel electrodes_(not shown_in the drawing) formed as a matrix in pixel areas defined_by the crossing gate and data_lines respectively; and a_plurality of_thin_film transistors for_applying_data signals_supplied through the respective data lines to_the respective_pixel electrodes by being switched according_to signals of the_gate_lines.
Further, a pair of driver integrated_circuits (ICs) 14 and 15 are_installed at the sides of_the_gate_and data lines, respectively, so_as to supply gate and data_driving signals thereto._Namely, a pair of pads (not shown_in_the drawing) are formed at the_ends_of the gate and data lines_to_which_the driver ICs are connected.
FIG._2 shows cross-sectional views of the_LCD taken along a line I–I′ in FIG. 1.
Referring_to FIG. 2,_a gate insulating layer 22_is_formed_on a first substrate 21. An nth data line 23_is patterned_on the gate_insulating layer 22. A passivation layer 24 made of an_insulator is formed over an entire surface_of the substrate including the nth data line 23. A transparent_conductive layer of indium tin oxide (ITO) 25_for applying a voltage to the liquid_crystal display is patterned_on_the passivation layer 24.
A black matrix