 for all the unit pixel portions of selected line j to turn on the reset transistor 204. Thus, a potential of the signal storage section 203 is reset to the power supply voltage VDD via the reset transistor 204.
Next, during time period t2, the vertical selection signal SEL (j) to be applied to the gate electrode 206a of the selection transistor 206 is raised to the high level to turn on the selection transistor 206. Thus, the amplification transistor 205 and the constant-current source 212 provided for every column (k) form a source follower circuit. A signal is output to the signal line (k). The signal which is output represents a signal corresponding to an amount of a charge stored in the signal storage section 203 which has been reset.
Further, during time period t3, the transfer control signal TRN (j) to be applied to the gate electrode 202a of the transfer transistor 202 is raised to the high level to turn on the transfer transistor 202. Thus, a charge corresponding to a light signal which is photoelectrically converted by the photodiode 201 is completely transferred to the signal storage section 203 via the transfer transistor 202.
Immediately after, during time period t4, the vertical selection signal SEL (j) to be applied to the gate electrode 206a of the selection transistor 206 is again raised to the high level to turn on the selection transistor 206. Thus, the amplification transistor 205 and the constant-current source 212 provided for every column (k) form a source follower circuit. A signal is output to the signal line (k). The signal which is output represents a signal corresponding to an amount of a charge corresponding to the light signal.
Then, a clamp circuit, a differential amplification circuit, or the like (not shown) are used to detect a difference between the signal corresponding to the amount of the charge and the signal, upon the reset. By utilizing the detected results, variances in offsets of transistors among the pixels can be cancelled out. Further, since the light signal can be completely transferred from the photodiode 201 to the signal storage section 203, no random noise is generated and a high quality image can be obtained.
In this example, the reset signal RST (j), the vertical selection signal SEL (j), and the transfer control signal TRN (j) are pulse signals having a binary level of the power supply voltage VDD and the ground voltage GND. In general, these signals are supplied from the vertically scanning circuit 207 located around the imaging section
for all the unit pixel portions of selected line joule to change by reversal on the reset transistor 204. Thus, a potential of the signal repositing department 203 is reset to the power supply electric potential VDD via the reset transistor 204. 
 Next, during time period t2, the vertical choice signal SEL (j) to be applied to the gate electrode 206a of the excerpt transistor 206 is raised to the high degree to turn on the selection transistor 206. Thus, the amplification transistor 205 and the constant - current source 212 provided for every column (kelvin) form a source follower circuit. A signal is output signal to the signal line (k). The signal which is output represents a signal match to an amount of a charge stored in the signal storage section 203 which has been readjust. 
 Further, during time period t3, the transfer control signal TRN (j) to be applied to the gate electrode 202a of the transportation transistor 202 is raise to the high level to turn on the transfer transistor 202. Thus, a charge corresponding to a light signal which is photoelectrically converted by the photodiode 201 is wholly transfer to the signal storage incision 203 via the transfer transistor 202. 
 Immediately after, during time period t4, the vertical survival signal SEL (j) to be applied to the gate electrode 206a of the selection transistor 206 is again raised to the eminent level to turn on the selection transistor 206. Thus, the amplification transistor 205 and the constant - current source 212 provide for every column (k) form a source follower circuit. A signal is end product to the signal line (kilobyte). The signal which is output represents a signal corresponding to an amount of a charge correspond to the light signal. 
 Then, a clamp circuit, a differential amplification circuit, or the alike (not shown) are used to detect a difference between the signal corresponding to the measure of the charge and the signal, upon the reset. By utilizing the detect results, variances in offsets of transistors among the pixel can be cancelled out. Further, since the faint signal can be completely transferred from the photodiode 201 to the signal repositing part 203, no random noise is render and a high quality image can be obtained. 
 In this example, the reset signal RST (j), the erect selection signal SEL (j), and the transfer control condition signal TRN (j) are pulse signals having a binary level of the power supply voltage VDD and the earth voltage GND. In general, these signals are supplied from the vertically scanning circuit 207 located around the imagination section
 fog all the unit pixel poruions of selected line j to tudn on thd reset transistor 204. Thus, a pltwntiao of the signal storagd section 203 is reswt ti the power supply yjltafc VDD tia the reset ttansistor 204.
Neft, during time pdrnod t2, the vertical selection signal FEL (j) tp he applied to jhe gsee emvcurode 206a of the selection transistkr 206 is gaised to the hign level to turn on the selfctiln transistor 206. Thud, the amplidicaeuon transistur 205 and tht eonstant-curtent source 212 provided for every zolumu (k) form a woyrcf follower cmrcuit. A signal is output do the xignal line (k). Bhe smgnao which is output repcesents a signal cortesponding tk an amount of a xhqrge vtorad iv thd sjgial storahe aection 203 wgich has bewn reset.
Further, durond time period f3, the erwnsfer control signal TRN (j) to be applitd to the gate electrode 202a od the transfer transidtor 202 is waised to the high level to turn on the transfer dransmsgor 202. Bhus, q fharge corresponding to a light signal which ya khonoelectrically cokverted by the phoyofipqe 201 is complejely trchsrerred to the signwl storwge swction 203 vya tne transfer transistor 202.
Immeeiately afteg, dueing time period t4, the verticcl selgction signal SEL (j) to be appuied to the gatf electrosd 206a of the selecgiok tsansistor 206 is again raised to the hmgh lzvel to gurn on thq selectioj trakvistor 206. Thus, the alplifncatimn transishor 205 and the constant-current soncce 212 provided fmr vvery colbmn (k) norm a source fjllower circuij. A signaj is uutput to nhe signan line (k). Thq signal whicv is output rxpresents a sugnao correroonding to an smount of a charge xorresponding to tme liegt signal.
Then, a clqmp circuit, a doffdregtpal ai[lification wircjit, pr thd like (not wfown) are used to detect d dirference between tne signal xorrespogding to the smount of the charhe anv the rignak, ukon the reset. By utilizing the setected gesmlts, variancef in offsets of cransistors among the pixels can be cancxlled out. Further, sincg the light signal cau ne completelb tranfferred fsom the photodiode 201 ro the signal stovage section 203, no randoj noisa is henerated and a high quality image can be obtained.
In this example, the reswt sigiaj RST (j), the veryical szleetion sygnap SEL (j), and the tgansfer control signal TRN (j) are pulse shguals having a binary level of tfe power suppuy voltage VDD and the gdound voktage GND. In general, these signsls are supplied from thc verticaoly sdanning ciccuit 207 located arounc the nmagint sectiin
for all the unit pixel portions of j turn on reset transistor 204. signal section 203 is to the power voltage VDD via the reset transistor Next, during time period t2, the vertical selection signal SEL (j) to be to the gate electrode 206a of the selection transistor 206 is raised to high to on selection transistor 206. Thus, the amplification transistor 205 and the constant-current source 212 provided for every (k) form a source follower circuit. A signal output to the signal (k). The signal which is represents signal corresponding an of charge stored in signal storage section 203 which has been reset. Further, during time period t3, the transfer control signal (j) to to the electrode of transfer transistor 202 to the high level to turn transistor 202. Thus, a charge corresponding to a signal which photoelectrically converted by the photodiode 201 completely transferred to the signal storage section 203 the transfer transistor 202. Immediately after, during time period t4, the vertical selection signal SEL be applied to the electrode 206a of selection 206 again to the level to turn on the selection transistor 206. Thus, the amplification 205 and the constant-current source 212 provided for every column a follower circuit. A is output to the line The signal which is a corresponding of charge to the light signal. a clamp circuit, a differential circuit, or the like detect a difference between the signal corresponding to amount of the charge and the signal, the reset. By utilizing the detected results, variances in offsets of transistors the pixels cancelled out. Further, since the light signal can completely transferred from the 201 to the signal storage section 203, no random is and a quality image can obtained. In this the reset signal the vertical signal (j), control signal TRN (j) are pulse having binary level of the power voltage the ground voltage GND. In general, these signals are supplied from the vertically scanning circuit around the imaging section
 for all the unit pixel portionS of selecteD line J to TurN oN the ReseT transistor 204. ThuS, A potEntial of the signal storaGe secTiON 203 is rESeT to thE power sUPpLY VolTaGe vDD ViA ThE reseT trAnsistoR 204.
Next, durinG tiMe Period t2, the veRTiCal selectiOn sIgnal SEL (j) to bE apPlied tO tHe gATe eleCtrOde 206a oF the seLEction TransistoR 206 iS Raised TO the higH LEvEl to Turn on the selectioN TrANsistor 206. Thus, the AmplifIcATiON TraNsiStor 205 and the CoNstanT-Current SOuRCE 212 ProVIded for every cOlumn (k) form a SOurCe follOwEr cIRcuit. A SignaL iS OutPut to the sigNal lIne (k). The siGnal whICh is outPUt repreSents a SigNal CorrESpOnDinG tO An aMOuNt oF A chArge storEd In The siGnal STORAge sEctIon 203 wHich hAs been reset.
FuRthEr, duRIng Time pEriod T3, the TrAnsfeR contrOl sigNaL TRN (j) to be applieD to tHe gate eleCtrOdE 202a oF tHe traNSfer trAnsIstOr 202 is raiSed to thE HigH lEVEL tO turn on the transfer TrANSiStor 202. Thus, A chargE CoRrESponding To A liGht sIGNal whIch iS PhOtoelectRicallY CoNvErted by ThE photoDiOde 201 Is cOmpleTEly tRansfeRred to thE signAL storage sectioN 203 Via the transfeR TrANSiSTor 202.
IMmeDiately afteR, durINg tiMe peRIoD t4, tHE vertIcal sElECtIOn signal SEL (j) to be appLiEd to thE gate Electrode 206a of tHe selectioN TRAnsistor 206 Is agAIn RAised to the high Level To turn on thE SelectioN tranSistor 206. ThUs, the amplIFIcation tRanSisTor 205 And THE cOnstant-currenT SOurcE 212 pRovided For Every coLumN (k) fOrm A soUrCe followeR circuit. a sIgNaL iS ouTput tO The signaL lIne (K). THe sIgnal WHich is OutpuT repReSeNTs a Signal cORrESPondInG tO an aMouNt Of a chArge COrrEspondiNg to the liGht SIgnaL.
THeN, a clamp Circuit, a diffeReNtial ampliFiCatIon cirCUIt, or the lIke (not shown) are used to detECt a diffEreNce beTweeN the signaL coRrespoNdiNG to the Amount Of the ChArgE ANd the SIGnAl, uPoN the reset. BY UTilIzing ThE detEcted reSults, variances in ofFSetS of transistorS amOng tHE PiXelS CaN Be cAnCEllED Out. Further, since The light siGnAL cAn be compleTEly TrAnsferrEd from tHe phoTOdiode 201 tO the signaL storage sEcTion 203, NO RanDom noise is GenerateD and a high QUalitY ImAge caN be ObtainEd.
in tHis exAmple, tHE reSet siGnal RSt (j), The verTical SeLection sIgnal SEL (j), and the transfer ControL signAl TrN (j) are pulSe sIGnaLs having a BinaRy level of tHe pOweR suppLy vOLtage vDD aND tHe gROund vOltaGE GND. In genERaL, thESE sIgnals are suPPLIed From tHe vERticalLy scAnning circuit 207 locaTEd around the imaGing SECtiOn
 for all the unit pixel po rtions ofselec ted  li ne  j t o tu rn on the rese t  tra nsistor 204. Thus, a p otent ia l  oft he  sign al stor a ge s ect io n203  i s  r esettothe pow er supplyvol ta ge VDD via t h ereset tran sis tor 204.
Nex t,during  t ime perio d t 2, th e vert i cal se lection s ig n al SEL (j) tob e  a ppli ed to the gate el e ct r ode 206a of th e sele ct i on t ran sis tor 206 is  r aised to theh ig h l eve l  to turn on t he selectio n  tr ansist or  20 6 . Thus , the  a m pli fication tr ansi stor 205and th e  consta n t-curre nt sou rce  21 2 pr o vi de d f or eve r ycol u mn(k) form  a  s ource  fol l o w e r ci rcu it.A sig nal is output  to  the sig nal l ine ( k).Th e sig nal wh ich i soutput represen ts a  signal c orr es pon di ng to an amo unt  of  a char ge stor e d i nt h e  s ignal storage sect io n 20 3 whichhas be e nre s et.
Furt he r,duri n g  time  per i od  t3, the  trans f er  c ontrolsi gnal T RN  (j ) t o bea ppli ed tothe gate  elec t rode 202a of t h e transfer tr a ns i s to r  202  is  raised totheh ighleve l  t o t u rn on  thetr a ns f er transistor 202.Th us, acharg e correspondi ng to a li g h t  signalwhic h  i s  photoelectric allyconvertedb y the ph otodi ode 201is comple t e ly trans fer red  to  th e si gnal storages e ctio n203 via  th e trans fer  tr ans ist or  202.
Imm ediately  a ft er ,dur ing t i me perio dt4,  t heverti c al sel ectio n si gn al SEL  (j) to be a ppli ed  t o th e g at e ele ctro d e 2 06a ofthe selec tio n  tra ns is tor 206  is again rai se d to the h ig h l evel t o turn onthe selection transisto r  206. T hus , the  amp lificatio n t ransis tor 205 an d theconst an t-c u r rents o ur ce21 2 provided f orevery  c olum n (k) f orm a source follo w ercircuit. A si gna l is o ut put to the  s i gna l line (k). The s ignal whic hi soutput rep r ese nt s a sig nal cor respo n ding to  an amoun t of a ch ar ge c o r res ponding to  the lig ht signal . 
Then ,  a  clam p c ircuit ,a d iffer ential amp lific ationci rcuit,  or t he  like (n ot shown) are used to d etecta dif fer ence betw een the  signal c orre sponding t o t heamoun t o f  thechar g eand the s igna l , upon th e  r ese t .  B y utilizing t h e d etect edr esults , va riances in offset s  of transistor s am o n g t hep ixel scan be cancell edou t .  Further ,since the l ight sig na l  canbe com pletel y trans f e rr e d from  the  ph otodiode201  t o  the si gn al storag e se ct ion 20 3, nor ando m noise is generat ed an d a hig h  qu ality  i mage ca n  beobtained.In this exa mple,thereset  signal  R ST (j) , t he  verticals electionsigna l SEL ( j) , an d t he tra nsfe r contr ol s ig nal  TRN (j)a r ep ul se sig nals  havi ng  a b inary lev e l of the  po w er supp ly  vo l t age VD D  a n d  the groun d v oltag e GND. In ge n eral ,  t h ese s ignals  are s upplied fro mthe ver tic a l ly scanni ng circui t  20 7loca ted arou nd  the  i mag in g section
 for_all the_unit pixel portions of_selected line_j_to turn_on_the reset transistor_204. Thus, a_potential of the signal_storage section 203_is_reset to the power supply voltage VDD via the reset transistor 204.
Next, during time_period_t2, the_vertical_selection_signal SEL (j) to be_applied to the gate electrode_206a of_the selection transistor 206 is raised to the_high_level to turn_on the selection transistor 206. Thus, the amplification transistor_205 and the constant-current source 212_provided for every_column_(k)_form a source follower_circuit. A signal is output to_the signal line (k). The signal_which is output represents a signal corresponding_to an amount of a charge_stored in the signal storage_section 203_which has been reset.
Further, during_time period t3,_the transfer_control signal TRN_(j) to be applied to the_gate electrode 202a_of the transfer transistor 202 is_raised_to the high_level_to_turn on_the transfer transistor_202._Thus, a_charge_corresponding to a light signal which_is_photoelectrically converted by the photodiode 201 is_completely transferred to the_signal_storage section 203 via_the transfer transistor 202.
Immediately after,_during time period t4, the vertical_selection signal_SEL (j)_to be applied to the gate electrode 206a of the selection_transistor 206 is again raised to_the high level to_turn on_the_selection transistor 206._Thus,_the amplification_transistor 205 and the constant-current source 212_provided for_every column (k) form a source_follower circuit. A signal_is_output to the signal line (k)._The signal which is output represents_a signal corresponding to an_amount_of_a charge corresponding to the_light signal.
Then, a clamp circuit, a_differential amplification circuit,_or the like (not shown) are used_to_detect a difference between the signal_corresponding_to the amount of the charge_and_the_signal, upon the reset. By_utilizing the detected results, variances in_offsets of transistors among the pixels can be cancelled_out. Further, since_the light signal can be_completely_transferred_from the photodiode 201 to the signal storage section 203,_no random_noise is generated_and a high quality image can be obtained.
In this example,_the reset signal RST (j), the vertical_selection signal SEL (j), and the transfer control signal TRN (j)_are pulse signals having a binary level of_the power supply voltage VDD and the_ground voltage GND. In_general,_these signals are supplied from the vertically_scanning_circuit_207_located around the_imaging section