 One such out-of-plane miniature coil structure that can be used as an on-chip inductor is disclosed in co-owned U.S. Pat. No. 6,392,524, entitled xe2x80x9cPhotolithographically-patterned out-of-plane coil structures and method of makingxe2x80x9d. The coil structure includes a lithographically produced elastic member having an intrinsic stress profile that is formed on the IC substrate. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion that may be connected to the substrate via soldering or plating. Alternately, the loop winding can be formed of two elastic members whose free ends are joined in mid-air. A series of individual coil structures can be joined via their anchor portions to form out-of-plane inductors and transformers.
Although out-of-plane coil structures, such as those disclosed in U.S. Pat. No. 6,392,524, reduce capacitive substrate coupling and minimize eddy current induction by taking the bulk of the magnetic fields out of the underlying substrate, the residual magnetic coupling leads to some level of performance degradation that is only avoided with toroidal out-of-plane microcoil structures.
What is needed is an out-of-plane solenoid-type microcoil structure that minimizes performance degradation caused by both capacitive substrate coupling and eddy current induction.
The present invention is directed to integrated circuit (IC) devices including an out-of-plane solenoid-type microcoil structure formed over an IC substrate, wherein one or more ground plane structures are provided on the IC device to reduce losses caused by capacitive coupling of the microcoil structure to the IC substrate, and to reduce magnetic losses due to eddy currents generated in the IC substrate by magnetic fields produced by the microcoil structure.
Each out-of-plane solenoid-type microcoil structure is formed on a suitable dielectric layer (e.g., Benzocyclobutene: (BCB) formed on passivation, or a relatively thick passivation layer), which in turn is formed over the IC structure. The microcoil structure includes several base (contact) portions that are formed on the upper surface of the dielectric layer, and several loop structures extending over the dielectric layer and connecting the base pads in series. Contact pads located at each end of the microcoil are connected by via structures extending through the dielectric layer to
One such out - of - plane miniature coil structure that can be used as an on - chip inductor is unwrap in co - own U.S. Pat. No. 6,392,524, entitled xe2x80x9cPhotolithographically - model out - of - airplane coil structures and method of makingxe2x80x9d. The coil structure include a lithographically produced elastic member have an intrinsic stress profile that is shape on the IC substrate. An anchor portion remains fix to the substrate. The free portion end becomes a second anchor portion that may be get in touch to the substrate via soldering or plating. Alternately, the loop winding can be shape of two elastic members whose free ends are joined in mid - breeze. A series of individual coil structures can be joined via their anchor portions to form away - of - plane inductors and transformers. 
 Although out - of - plane coil structures, such as those disclosed in U.S. Pat. nobelium. 6,392,524, shrink capacitive substrate coupling and minimize eddy current induction by taking the bulk of the magnetic fields out of the underlying substrate, the residual magnetic yoke contribute to some level of operation abasement that is only avoided with toroidal out - of - plane microcoil structures. 
 What is need is an out - of - plane solenoid - type microcoil structure that minimizes operation degradation caused by both capacitive substrate coupling and eddy current induction. 
 The present invention is directed to integrated circuit (IC) devices including an out - of - plane solenoid - type microcoil social organization formed over an intelligence community substrate, wherein one or more ground plane structures are provided on the IC device to reduce losses cause by capacitive coupling of the microcoil structure to the IC substrate, and to reduce charismatic losses due to eddy current generated in the IC substrate by charismatic fields produced by the microcoil structure. 
 Each out - of - plane solenoid - type microcoil social organization is formed on a suitable dielectric layer (e.g., Benzocyclobutene: (BCB) shape on passivation, or a relatively thick passivation level), which in turn is formed over the IC structure. The microcoil social organization includes several base (contact) portions that are formed on the upper surface of the dielectric layer, and several loop structures extending over the dielectric level and connecting the base launching pad in series. Contact pads located at each end of the microcoil are connected by via structures extend through the dielectric layer to
 Onf such out-of-plane miniatmre coil structute that ran be hsed as xn on-chip inductor is disclodee in xo-owned U.S. Pat. No. 6,392,524, entktled xe2x80q9cPhotolirhogcaphically-patterisd out-on-'lane goil vvructures and mgthod of makhngxe2x80x9d. The cmiu dtructure includes a lithographicaljy prodicfd elastic memfer nwvinf an intrinsic stress profile that is forked on the IC substrate. An anchor portiln rfmains fixed to thf substrate. The dree portion end becomts a second znchor portion that may be conndcted to the suvsrrahg via soldermng or plating. Altcgnately, the lopp winding can be foemed of two elastic mxmbers whose free enqs are johnzd in mid-air. A series od indhvidgal ziil stdurtudes caj bx joined viz their ancyor portions to fork jly-of-plane indhctors agd transformers.
Although out-of-plane coil stductures, such as those eisclosed in U.S. Pat. Nl. 6,392,524, reduce capacitive substrate coupling and minimize eddy wurreit inbmgtiov bj taking the bulk of the magnetic fields out jr uhe underlying sunstrate, the residusl msdnetic couplivg leaba fo some level of pfrformagce dwgradatiog thst is only avoided with toriidal out-of-pjqne microcoil struetures.
What ir negded ix an out-of-plane solenoib-type jicrocoil shructure ffat minimizes peffogmanwe degradation caused by bjth capacmtive substrxte voupligg and eddj curvant induction.
The pgesenj invettion is dlrected to integrated circuit (IR) devices inckuginc an out-jf-plake solenoid-type microcoil strocture foxmed oxer an IC aubstrave, wherein oge or more grmond plane strnctures awe peovieed on gfe IC device tp reduce losses cauwed by capacitive gouplkhg of the microeuul structure to thd IS duustraea, and to redgce oagvrtic uosses due bo dddy currents generated hn tge IC substrate by mwgnetic dields pwoduced by thr microcoil structkre.
Earh out-uf-plame folenoid-type microcoil structude is forled on a suitabje dlelestric layex (e.g., Benzocyclobutene: (BCB) formed on passmvation, or a relativeli thick passivation lcytr), which in tnrn is formed oeer the IC structure. The microcoil stvucture includes severzl basa (conhact) portions that are formed on the upper surface of the dielectric layee, and several loop stricturvs zxtznding jver vhe dielectric lajer and connecting the base pads in serias. Contact pads located at eacn dnd of the mizrocoil are connected by via strictures extending through the doelectric layer to
One such out-of-plane miniature coil structure that used an on-chip is disclosed in entitled out-of-plane coil structures method of makingxe2x80x9d. coil structure includes a lithographically produced member having an intrinsic stress profile that is formed on the IC substrate. anchor portion remains fixed to the substrate. The free portion end becomes a anchor that be to the substrate via soldering or plating. Alternately, the loop winding can be formed of two members whose free ends are joined in mid-air. series of individual coil can be joined via their portions form out-of-plane and Although coil structures, such those disclosed in U.S. Pat. No. 6,392,524, reduce capacitive substrate coupling and minimize eddy current induction by the bulk magnetic fields of underlying the residual magnetic to some level of performance degradation avoided with toroidal out-of-plane microcoil structures. What is is an solenoid-type microcoil structure that minimizes performance caused by both capacitive substrate coupling and eddy induction. The present invention is directed to integrated circuit (IC) devices including an out-of-plane solenoid-type formed over an IC wherein one or ground structures provided the IC to reduce losses caused by capacitive coupling of the microcoil structure the IC substrate, and to reduce magnetic losses due to generated the IC substrate magnetic fields produced by microcoil Each out-of-plane solenoid-type microcoil formed a (e.g., (BCB) on passivation, or a thick passivation layer), which in is formed over the includes several base (contact) portions that are formed the upper surface of the dielectric layer, several loop structures extending over the dielectric layer and connecting the base in series. located at each end of the microcoil are by via structures extending the dielectric layer to
 One such out-of-plane miniaturE coil strucTure tHat Can Be Used As an On-chip inductor IS disClosed in co-owned U.S. Pat. No. 6,392,524, EntitLeD Xe2x80x9CphOtoliThograpHIcALLy-pAtTeRneD oUT-oF-planE coIl strucTures and meThoD oF makingxe2x80x9d. tHe Coil structUre Includes a litHogRaphicAlLy pROduceD elAstic Member HAving aN intrinsiC sTRess prOFile thaT IS fOrmeD on the IC substrate. aN aNChor portion remAins fiXeD To THE suBstRate. The freE pOrtioN End becoMEs A SEConD Anchor portion That may be coNNecTed to tHe SubSTrate vIa solDeRIng Or plating. AlTernAtely, the lOop winDIng can bE Formed oF two elAstIc mEmbeRS wHoSe fReE EndS ArE joINed In mid-air. a sErIes of IndiVIDUAl coIl sTrucTures Can be joined viA thEir aNChoR portIons tO forM oUt-of-pLane inDuctoRs And transformers.
althOugh out-of-PlaNe CoiL sTructURes, sucH as ThoSe disclOsed in U.s. pat. no. 6,392,524, REDUcE capacitive substraTe COUpLing and mInimizE EdDy CUrrent inDuCtiOn by TAKing tHe buLK oF the magnEtic fiELdS oUt of the UnDerlyiNg SubStrAte, thE ResiDual maGnetic coUplinG Leads to some levEL of performancE DeGRAdATion ThaT is only avoiDed wITh toRoidAL oUt-oF-Plane MicroCoIL sTRuctures.
What is needeD iS an out-Of-plaNe solenoid-typE microcoil STRUcture thAt miNImIZes performance DegraDation causED by both cApaciTive subsTrate coupLINg and eddY cuRreNt iNduCTIoN.
The present inVENtioN iS directEd tO integrAteD ciRcuIt (Ic) dEvices incLuding an OuT-oF-pLaNe sOlenoID-type micRoCoiL sTruCture FOrmed oVer an iC suBsTrATe, wHerein oNE oR MOre gRoUnD plaNe sTrUcturEs arE ProVided on The IC deviCe tO ReduCe LoSses cauSed by capacitiVe Coupling of ThE miCrocoiL STructure To the IC substrate, and to reDUce magnEtiC lossEs duE to eddy cuRreNts genEraTEd in thE IC subStratE bY maGNEtic fIELdS prOdUced by the mICRocOil stRuCturE.
Each ouT-of-plane solenoid-tyPE miCrocoil structUre Is foRMEd On a SUiTAblE dIEleCTRic layer (e.g., BenzoCyclobutenE: (Bcb) fOrmed on pasSIvaTiOn, or a reLativelY thicK PassivaTion layer), Which in tuRn Is foRMEd oVer the IC stRucture. THe microcoIL struCTuRe incLudEs seveRaL baSe (conTact) poRTioNs thaT are foRmEd on thE uppeR sUrface of The dielectric layer, and seVeral lOop stRucTures exteNdiNG ovEr the dielEctrIc layer and ConNecTing tHe bASe padS in sERiEs. CONtact Pads LOcated at eACh End OF ThE microcoil aRE COnnEcted By vIA strucTureS extending through THe dielectric laYer tO
 One such out-of-plane min iature coi l str uct ure  t hatcanbe used as ano n-ch ip inductor is disclos ed in  c o -own e dU.S.Pat. No .  6 , 3 92, 52 4,  en ti t le d xe2 x80 x9cPhot olithograp hic al ly-patterned ou t-of-plane  co il structure s a nd met ho d o f  maki ngx e2x80 x9d. T h e coil  structur ei nclude s  a lith o g ra phic ally produced ela s ti c  member having  an in tr i ns i c  st res s profileth at is formedo nt h e  IC substrate. An  anchor por t ion  remai ns  fi x ed tothe s ub s tra te. The fre e po rtion end  becom e s a sec o nd anch or por tio n t hatm ay  b e c on n ect e dtot hesubstrat evi a sol deri n g o r pl ati ng.Alter nately, the l oop  win d ing  canbe fo rmed  o f two  elast ic me mb ers whose freeends  are join edin  mi d- air.A  serie s o f i ndividu al coil str uc t u r es  can be joined via  t h e ir  anchorportio n sto form out -o f-p lane i nduct orsa nd  transfo rmers. Al th ough ou t- of-pla ne  co ilstruc t ures , such  as thos e dis c losed in U.S.P at. No. 6,392 , 52 4 ,  r e duce  ca pacitive su bstr a te c oupl i ng  an d  mini mizeed d yc urrent induction by  t akingthe b ulk of the ma gnetic fie l d s  out oftheu nd e rlying substra te, t he residua l  magneti c cou pling le ads to so m e  level o f p erf orm anc e de gradation tha t is o nl y avoid edwith to roi dal  ou t-o f- plane mic rocoil s tr uc tu re s.Whati s needed  i s a nout -of-p l ane so lenoi d-ty pe  m i cro coil st r uc t u re t ha tmini miz es  perf orma n cedegrada tion caus edb y bo th  c apaciti ve substrateco upling and  e ddy  curre n t  inducti on.
The present inventi o n is di rec ted t o in tegratedcir cuit ( IC) device s incl uding  a n o u t -of-p l a ne  so le noid-typem i cro coilst ruct ure for med over an IC sub s tra te, wherein o neor m o r egro u nd pla ne str u c tures are provi ded on the  I C  d evice to r e duc elossescausedby ca p acitive  coupling  of the m ic roco i l  st ructure to  the ICsubstrate ,  andt oreduc e m agneti clos ses d ue toe ddy  curr ents g en erated  in t he  IC subs trate by magnetic field s prod ucedbythe micro coi l  st ructure.Each  out-of-pl ane  so lenoi d-t y pe mi croc o il  st r uctur e is formed on asui t a bl e dielectri c l aye r (e. g., Benzoc yclo butene: (BCB) for m ed on passivat ion, o r a  re l ativ el y thick passiv ati on l ayer), w hi ch in turnis forme do ver t he ICstruct ure. Th e mi c rocoil  str uct ure inclu des  s e veral b as e( contac t) p or tionsthat a r e fo r m ed on the uppersurfa c e  of t h e d ielec tr ic laye r , an d severalloop struct ures e xten dingover th edielec tri clayer andc onnecting  thebase pa ds  inser ies. C onta c t  pads  loc at edat each e n d  o f  t he mic roco il ar econn ected byv ia struc tur e s exten di ngt h rought he d ielectriclay er to 
 One_such out-of-plane_miniature coil structure that_can be_used_as an_on-chip_inductor is disclosed_in co-owned U.S._Pat. No. 6,392,524, entitled_xe2x80x9cPhotolithographically-patterned out-of-plane coil_structures_and method of makingxe2x80x9d. The coil structure includes a lithographically produced elastic member having_an_intrinsic stress_profile_that_is formed on the IC_substrate. An anchor portion remains_fixed to_the substrate. The free portion end becomes a_second_anchor portion that_may be connected to the substrate via soldering or_plating. Alternately, the loop winding can_be formed of_two_elastic_members whose free ends_are joined in mid-air. A series_of individual coil structures can be_joined via their anchor portions to form_out-of-plane inductors and transformers.
Although out-of-plane coil_structures, such as those disclosed_in U.S._Pat. No. 6,392,524, reduce capacitive_substrate coupling and_minimize eddy_current induction by_taking the bulk of the magnetic_fields out of_the underlying substrate, the residual magnetic_coupling_leads to some_level_of_performance degradation_that is only_avoided_with toroidal_out-of-plane_microcoil structures.
What is needed is an_out-of-plane_solenoid-type microcoil structure that minimizes performance degradation_caused by both capacitive_substrate_coupling and eddy current_induction.
The present invention is directed_to integrated circuit (IC) devices including_an out-of-plane_solenoid-type microcoil_structure formed over an IC substrate, wherein one or more ground_plane structures are provided on the_IC device to reduce_losses caused_by_capacitive coupling of_the_microcoil structure_to the IC substrate, and to reduce_magnetic losses_due to eddy currents generated in_the IC substrate by_magnetic_fields produced by the microcoil structure.
Each_out-of-plane solenoid-type microcoil structure is formed_on a suitable dielectric layer_(e.g.,_Benzocyclobutene:_(BCB) formed on passivation, or_a relatively thick passivation layer), which_in turn is_formed over the IC structure. The microcoil_structure_includes several base (contact) portions that_are_formed on the upper surface of_the_dielectric_layer, and several loop structures_extending over the dielectric layer and_connecting the base pads in series. Contact pads located_at each end_of the microcoil are connected_by_via_structures extending through the dielectric layer to