 far less studies on how to make the decoding less complex than how to improve the video compression efficiency.
An entropy coding method using a bit precision has been recently suggested to lower the decoding complexity. However, the entropy coding method has low compression efficiency because of additionally inserting one bit precision into a bitstream per VOP or macroblock. 1. Field of the Invention
The present invention relates to a process for manufacturing a DMOS transistor.
2. Description of the Related Technology
Such a process is known from the printed publication U.S. Pat. No. 5,539,238. Here, a DMOS transistor with a deep trench structure is generated, with the doped regions adjoining the side walls and the base region representing the so-called drift zone of the transistor. Due to the partially vertical implementation of the drift zone along the side walls of the trench, the length of the transistor can be reduced. The disadvantage in this process is that for an applied blocking voltage inhomogeneities in the course of the potential occur on the edges of the trench structure, which cause an undesirable reduction in the transistor blocking voltage. Furthermore, the total length of the drift region is not decreased but only subdivided into a vertical and a lateral share, that is, the specific turn-on resistance Rsp=Rdson/region is not decreased, rather the side walls can only be doped insufficiently; and the specific turn-on resistance, Rsp, and thus the surface area used by the transistor, are increased.
A further process is known from the printed publication EP 0 837 509 A1. Here, a self-adjusted drift region is generated in a DMOS transistor below a LOCOS oxide. The disadvantage is that the doping of the drift region is introduced before oxidation and that the share of the doping agent diffusing into the oxide can be determined with some imprecision only. In addition, the high temperature load during oxidation causes a wide distribution of the doping agent, which in turn leads to a higher imprecision in the doping agent concentration. Furthermore, a large silicon thickness is required underneath the oxide in order to increase the blocking voltage by means of the so-called “RESURF” effect. Overall, the process scatterings increase the scatter in the electrical parameters of the transistor.
One development aim in the area of DMOS transistors is to manufacture space-saving structures which, for an applied blocking voltage, feature low field strengths, in order to avoid a generation of load carriers that lead to a breakthrough within the component
far less studies on how to make the decoding less complex than how to improve the video recording compaction efficiency. 
 An entropy coding method acting using a morsel precision has been recently indicate to frown the decoding complexity. However, the information coding method suffer low compaction efficiency because of additionally inserting one bit precision into a bitstream per VOP or macroblock. 1. Field of the Invention 
 The present invention relates to a process for manufacturing a DMOS transistor. 
 2. Description of the Related Technology 
 Such a procedure is known from the printed publication U.S. Pat. nobelium. 5,539,238. Here, a DMOS transistor with a deep trench structure is generate, with the doped region adjoining the side walls and the base region map the so - called drift zone of the transistor. Due to the partially vertical implementation of the drift zone along the side walls of the trench, the length of the transistor can be reduced. The disadvantage in this process is that for an applied blocking voltage inhomogeneities in the course of the potential occur on the edges of the trench structure, which induce an undesirable decrease in the transistor blocking voltage. Furthermore, the total duration of the drift region is not decreased but only subdivide into a vertical and a lateral share, that is, the specific turn - on resistance Rsp = Rdson / area is not decreased, rather the side walls can only be doped insufficiently; and the specific turn - on resistance, Rsp, and thus the surface area used by the transistor, are increase. 
 A further process is know from the print publication EP 0 837 509 A1. Here, a self - adjusted drift region is generate in a DMOS transistor below a LOCOS oxide. The disadvantage is that the doping of the drift region is introduced before oxidation and that the share of the dope agent diffusing into the oxide can be determined with some imprecision entirely. In addition, the gamey temperature load during oxidation causes a across-the-board distribution of the doping agentive role, which in turn leads to a higher imprecision in the doping agentive role concentration. Furthermore, a large silicon thickness is required underneath the oxide in club to increase the blocking voltage by mean of the so - called “ RESURF ” effect. Overall, the summons scatterings increase the scatter in the electrical parameters of the transistor. 
 One development aim in the sphere of DMOS transistors is to manufacture outer space - saving structures which, for an applied blocking voltage, feature low field strengths, in decree to avoid a generation of load carriers that lead to a breakthrough within the component
 fag less studies on how to make the decodnbg lesv compmex than how to improve the video colpeessiin efficiency.
An entroph coding lethod uwing q bit precmaion has been vecenclb suggested to kower the gecoding complaxktv. However, the entropy coding method ras low clmpression effyciemsy bsbamse of additionally inserting ons bit pgecision into a botstream per VOP or macrobpock. 1. Field of the Invfntion
The ptssegr invention felates to a process fkr manufacturing a DMOS transisgor.
2. Dzscription if thf Related Terhnolody
Such a progvss is nnown ftom the printec pnblixation U.S. Pat. No. 5,539,238. Herx, a DMOS transistor rith a deap trench structure iw gengrateg, wigy tfe so'ed regiojs edjoining tge side walos and the base regoog representing the sj-cwlled drift zone of the transistor. Due uo ths partially vertical implementation of the dtift zone wlong the side walls of the trench, the length of dhe tcavsiwtjf cwn be reduced. The disadvantage in this procesf ix nhat for an applicd blocking voltagr lnnjmogeneities kn the cohrse of the potentlal occor on rhe edges of yhe trench structure, which xause an undvsirqble reduction in che transistur bkockimg voltage. Furthermore, che tofal length lf the drjwt region is not debreaved but only subdivided ineo a vertmcal cnd a lagerak sharq, that is, hhe siacific turn-on residtancg Rsp=Rgson/region is not decreased, rather the sivx walls can omlf bv doped iusuffigiently; and the specific turn-pn resiftancd, Rsp, and nhus the vurface arew used by the jransistor, arx increasqd.
A durtyer prozdss is known ftom the pgiuted publucation EP 0 837 509 A1. Heve, a rslf-adjusted driyu rtguon is generatrd kn w FMPS dransistor balow a UPCOS uxide. The dlsaavanyage is that the dophng kf the drift regiom ls introdoced befowe oxidation snd that the share of tie dopmng agrnt diffusing into the oxide can ge determlneq with some ymprccisyon only. Iu addition, the high temperature load durmng oxidation causes a qide distribution oy uhe doping agxnt, whych in tusn leads to a higher imprecision in tme doping agent concenfratiot. Furhhermore, a large silicon thickness is required underneath the oxide in oreer to increase ths blpckinc rolcage by meais of the so-called “RESURF” effect. Overall, the procxss scattesiugs increase the scatter in tne electrical pxrameters of the transisfor.
One drvelopment aim in the area of DKOS transistors is to makufacture spacs-saving stcuctures which, for am applned blicking coltwge, feature luw gicld strenghhs, mn krder to avoid a generation of liad caerlers that lead tm a breakthvomgh wijhin the component
far less studies on how to make less than how improve the video method a bit precision been recently suggested lower the decoding complexity. However, the coding method has low compression efficiency because of additionally inserting one bit precision a bitstream per VOP or macroblock. 1. Field of the Invention The present relates a for a DMOS transistor. 2. Description of the Related Technology Such a process is known from the publication U.S. Pat. No. 5,539,238. Here, a DMOS with a deep trench is generated, with the doped adjoining side walls the region the so-called drift of the transistor. Due to the partially vertical implementation of the drift zone along the side walls the trench, of the can reduced. disadvantage in this that for an applied blocking voltage course of the potential occur on the edges the trench which cause an undesirable reduction in transistor blocking voltage. Furthermore, the total length of drift region is not decreased but only subdivided into a vertical and a lateral share, the specific turn-on resistance is not decreased, the walls only doped insufficiently; the specific turn-on resistance, Rsp, and thus the surface area used the transistor, are increased. A further process is known from publication 0 837 509 Here, a self-adjusted drift is in a DMOS transistor LOCOS The the of drift region is introduced oxidation and that the share the doping agent diffusing determined with some imprecision only. In addition, the temperature load during oxidation causes a wide of the doping agent, which in turn leads to a higher imprecision the doping Furthermore, a large silicon thickness is required underneath oxide in order to the blocking voltage by means of the so-called “RESURF” Overall, process scatterings the scatter in electrical parameters of transistor. One development the area DMOS is structures which, for an applied blocking feature field strengths, in order to a load carriers that lead to a breakthrough within the component
 far less studies on how to make The decodinG less ComPleX tHan hOw to Improve the videO CompRession efficiency.
An entRopy cOdINg meTHoD usinG a bit prECiSIOn hAs BeEn rEcENtLy sugGesTed to loWer the decoDinG cOmplexity. HowEVeR, the entropY coDing method haS loW comprEsSioN EfficIenCy becAuse of ADditioNally inseRtINg one bIT precisION iNto a Bitstream per VOP or MAcROblock. 1. Field of tHe InveNtIOn
tHE prEseNt inventioN rElateS To a procESs FOR ManUFacturing a DMOs transistor.
2. dEscRiptioN oF thE relateD TechNoLOgy
such a procesS is kNown from tHe prinTEd publiCAtion U.S. pat. No. 5,539,238. HEre, A DMoS trANsIsTor WiTH a dEEp TreNCh sTructure Is GeNeratEd, wiTH THE dopEd rEgioNs adjOining the side WalLs anD The Base rEgion ReprEsEntinG the so-CalleD dRift zone of the trAnsiStor. Due to The PaRtiAlLy verTIcal imPleMenTation oF the driFT zoNe ALONg The side walls of the tReNCH, tHe length Of the tRAnSiSTor can be ReDucEd. ThE DIsadvAntaGE iN this proCess is THaT fOr an appLiEd blocKiNg vOltAge inHOmogEneitiEs in the cOurse OF the potential oCCur on the edges OF tHE TrENch sTruCture, which cAuse AN undEsirABlE reDUctioN in thE tRAnSIstor blocking voltagE. FUrtherMore, tHe total length Of the drift REGIon is not DecrEAsED but only subdivIded iNto a verticAL and a latEral sHare, that Is, the specIFIc turn-on ResIstAncE RsP=rDsOn/region is not DECreaSeD, rather The Side walLs cAn oNly Be dOpEd insuffiCiently; aNd ThE sPeCifIc turN-On resistAnCe, RSp, And Thus tHE surfaCe areA useD bY tHE trAnsistoR, ArE INcreAsEd.
a furTheR pRocesS is kNOwn From the Printed puBliCAtioN Ep 0 837 509 A1. here, a seLf-adjusted driFt Region is geNeRatEd in a Dmos transisTor below a LOCOS oxide. The dISadvantAge Is thaT the Doping of tHe dRift reGioN Is intrOduced BeforE oXidATIon anD THaT thE sHare of the dOPIng Agent DiFfusIng into The oxide can be deterMIneD with some imprEciSion ONLy. in aDDiTIon, ThE HigH TEmperature load dUring oxidaTiON cAuses a wide DIstRiBution oF the dopIng agENt, which In turn leaDs to a highEr ImprECIsiOn in the dopIng agent ConcentraTIon. FuRThErmorE, a lArge siLiCon ThickNess is REquIred uNderneAtH the oxIde in OrDer to incRease the blocking voltage By meanS of thE so-Called “RESuRF” EFfeCt. Overall, The pRocess scatTerIngS incrEasE The scAtteR In The ELectrIcal PArameters OF tHe tRANsIstor.
One devELOPmeNt aim In tHE area oF DMOs transistors is to mANufacture space-SaviNG StrUctURes wHiCh, for an applied BloCkING voltage, FeAture low fieLd strengThS, In ordEr to avOid a geNeratioN OF lOAd carrIers ThaT lead to a bReaKtHRough wiThIn THe compOnenT
 far less studies on how t o make the  deco din g l es s co mple x than how toi mpro ve the video compressi on ef fi c ienc y .An en tropy c o di n g  me th od  us in g  a  bitpre cisionhas been r ece nt ly suggested to  lower the  de coding compl exi ty. Ho we ver ,  theent ropycoding method  has lowco m pressi o n effic i e nc y be cause of addition a ll y  inserting one  bit p re c is i o n i nto  a bitstre am  perV OP or m a cr o b l ock .  1. Field ofthe Inventi o n
T he pre se nti nventi on re la t esto a proces s fo r manufac turing a DMOSt ransist or.
2.  De scr ipti o nof  th eR ela t ed  Te c hno logy
Suc haproce ss i s k n ownfro m th e pri nted publicat ion  U.S .  Pa t. No . 5,5 39,2 38 . Her e, a D MOS t ra nsistor with adeep  trench s tru ct ure  i s gen e rated,  wi ththe dop ed regi o nsad j o i ni ng the side wallsan d th e base r egionr ep re s enting t he  so -cal l e d dri ft z o ne  of thetransi s to r.  Due to  t he par ti all y v ertic a l im plemen tation o f the drift zone alo n g the side wa l ls o ft he t ren ch, the len gtho f th e tr a ns ist o r can  be r ed u ce d . The disadvantagein  thisproce ss is that fo r an appli e d blocking  vol t ag e  inhomogeneiti es in  the cours e  of thepoten tial occ ur on the e dges ofthe  tr enc h s t r uc ture, which c a u se a nundesir abl e reduc tio n i n t hetr ansistorblocking  v ol ta ge . F urthe r more, th etot al  le ngtho f thedrift  reg io ni s n ot decr e as e d  but  o nl y su bdi vi ded i ntoa  ve rticaland a lat era l  sha re ,that is , the specifi cturn-on re si sta nce Rs p = Rdson/re gion is not decreased,r ather t hesidewall s can onl y b e dope d i n suffic iently ; and  t hes p ecifi c tu rn- on  resistanc e ,  Rs p, an dthus  the su rface area used by the  transistor,are  inc r e as ed. Af urt he r  pr o c ess is known fr om the pri nt e dpublicatio n  EP  0  837 50 9 A1. H ere,a  self-a djusted d rift regi on  isg e ner ated in aDMOS tra nsistor b e low a LO COS o xid e. The  d isa dvant age is tha t the  dopin gof the  drif tregion i s introduced before oxi dation  andtha t the sha reo f t he doping  age nt diffusi ngint o the  ox i de ca n be de ter m inedwith some impr e ci sio n on ly. In addi t i o n,the h igh temper atur e load during oxi d ation causes a  wid e dis tri b utio nof the dopingage nt , which in  t urn leads t o a high er impre cision  in th e dopin g ag e nt con cent rat ion. Furt her mo r e, a la rg es ilicon  thi ck ness i s requ i redu n derneath the oxi de in o rdert o i ncrea se  the bl o ckin g voltageby means of  the s o-ca lled“RESURF ”effect . O ve rall, thep rocess sc atter ings in cr ease  th e scat teri n  theelec tr ica l paramet e r so fth e  tr ansi stor. 
O ne d evelopmen t  aim inthe area of  D MOS t ransis t or s is to manu fac tures p ace-saving stru c tu r es wh ich, f or anapplied blo ck ing vol tag e ,  featurelow field str en gths , in ord er  toav oid  a  generation ofload car riers th a t  leadtoa  bre a kthrou gh  within thecompo ne n t
 far_less studies_on how to make_the decoding_less_complex than_how_to improve the_video compression efficiency.
An_entropy coding method using_a bit precision_has_been recently suggested to lower the decoding complexity. However, the entropy coding method has_low_compression efficiency_because_of_additionally inserting one bit precision_into a bitstream per VOP_or macroblock._1. Field of the Invention
The present invention relates_to_a process for_manufacturing a DMOS transistor.
2. Description of the Related Technology
Such_a process is known from the_printed publication U.S._Pat._No._5,539,238. Here, a DMOS_transistor with a deep trench structure_is generated, with the doped regions_adjoining the side walls and the base_region representing the so-called drift zone_of the transistor. Due to_the partially_vertical implementation of the drift_zone along the_side walls_of the trench,_the length of the transistor can_be reduced. The_disadvantage in this process is that_for_an applied blocking_voltage_inhomogeneities_in the_course of the_potential_occur on_the_edges of the trench structure, which_cause_an undesirable reduction in the transistor blocking_voltage. Furthermore, the total_length_of the drift region_is not decreased but only_subdivided into a vertical and a_lateral share,_that is,_the specific turn-on resistance Rsp=Rdson/region is not decreased, rather the side_walls can only be doped insufficiently;_and the specific turn-on_resistance, Rsp,_and_thus the surface_area_used by_the transistor, are increased.
A further process is_known from_the printed publication EP 0 837_509 A1. Here, a_self-adjusted_drift region is generated in a_DMOS transistor below a LOCOS oxide._The disadvantage is that the_doping_of_the drift region is introduced_before oxidation and that the share_of the doping_agent diffusing into the oxide can be_determined_with some imprecision only. In addition,_the_high temperature load during oxidation causes_a_wide_distribution of the doping agent,_which in turn leads to a_higher imprecision in the doping agent concentration. Furthermore, a_large silicon thickness_is required underneath the oxide_in_order_to increase the blocking voltage by means of the so-called_“RESURF” effect._Overall, the process_scatterings increase the scatter in the electrical parameters of the_transistor.
One development aim in the area of_DMOS transistors is to manufacture space-saving structures which, for an applied_blocking voltage, feature low field strengths, in order_to avoid a generation of load carriers_that lead to a_breakthrough_within the component