, erasing and reading, charges move across a floating gate relying on charge coupling which determines a threshold voltage of a transistor under the floating gate. In other words, in response to an injection of electrons into the floating gate, the logical status of the floating gate turns from 1 to 0; on the contrary, in response to move electrons away from the floating gate, the logical status of the floating gate turns from 0 to 1.
The NAND flash memory contains a plurality of blocks, each block having a plurality of pages and each page dividing into a data area and a spare area. The data area which may have 512 bytes is used for storing data. The spare area is used for storing error correction code (ECC). However, the flash memory fails to change data update-in-place, that is, prior to writing data into a non-blank page, erasing a block including the non-blank page is required. In general, erasing a block take as much time as 10-20 times greater as writing into a page. If a size of written data is over an assigned block, the filled pages in the assigned block have to be removed to other blocks, and then erasing the assigned block is performed.
Furthermore, flash memory block may fail to access when in excess of one million times of erasures before the block is considered to be worn out. This is because the number of erasure times for a block is close to one million, charge within the floating gate may be insufficient due to current leakage of realized capacitor, thereby resulting in data loss of the flash memory cell, and even failure to access the flash memory. In other words, if erased over a limited times, a block may be unable to be accessed.
There are two kinds of NAND flash memory: one is a multi-level cell (MLC) NAND flash memory and the other is a single-level cell (SLC) flash memory. A cell of the MLC NAND flash memory includes a floating gate for storing various charge levels indicative of binary value 00, 01, 10, and 11. Therefore, each MLC NAND flash memory cell can store four values one time. Conversely, the SLC NAND flash memory cell has thinner oxide film between the floating gate and the source. During writing process, voltage is applied onto the floating gate, thereby the stored charge being driven to flow out through the source. Each SLC NAND flash memory cell may store only one-bit data, as is less than MLC
, erasing and reading, charges move across a float gate trust on charge coupling which determine a doorsill voltage of a transistor under the floating gate. In early words, in response to an injection of electrons into the float gate, the logical status of the float gate turns from 1 to 0; on the contrary, in response to move electrons away from the float gate, the logical status of the floating gate turn from 0 to 1. 
 The NAND flash memory contains a plurality of blocks, each pulley having a plurality of pages and each page dividing into a data sphere and a spare area. The data area which may have 512 bytes is use for store data. The spare area is used for storing error correction code (ECC). However, the flash memory fail to change data update - in - space, that is, prior to publish data into a non - blank page, erasing a block include the non - blank page is required. In general, erasing a block return as much time as 10 - 20 times greater as writing into a page. If a size of written data is over an assigned block, the filled pages in the assigned engine block get to be murder to other blocks, and then erasing the assign block is performed. 
 Furthermore, flash memory blockage may fail to access when in excess of one million times of erasures before the block is consider to be worn out. This is because the number of erasure times for a block is near to one million, charge within the float gate may be insufficient due to current leakage of realize capacitor, thereby resulting in data passing of the flash memory cellular telephone, and even failure to access the flash memory. In other word, if erased over a limited times, a block may be unable to be access. 
 There are two kinds of NAND news bulletin memory: one is a multi - level cell (MLC) NAND news bulletin memory and the other is a single - level cellular telephone (SLC) flash memory. A cell of the MLC NAND flash memory includes a floating gate for storing various charge degree indicative of binary value 00, 01, 10, and 11. consequently, each MLC NAND news bulletin memory cell can store four values one time. Conversely, the SLC NAND flash memory cell have thinner oxide film between the floating gate and the reservoir. During writing process, voltage is applied onto the floating gate, thereby the stored care being driven to flow out through the source. Each SLC NAND flash memory cell may store only one - spot data, as is less than MLC
, erwsing and reading, charger move across a floatiig gate relying on charge coupling which devermunes q threshold voltage of a transidtor undwr tie floating gate. In othev worsd, in cesponse to an lnjection ox electrons indo tke floating gate, the logical status jf the gllating gate tutns fgoi 1 tk 0; on the contrary, in response to jove eltctrons away from yhe floating gate, the logifal dtatus of the floahing gate todns drom 0 to 1.
The NAND flash memory conjains a plurality of blocks, each blocl having a pourwnity of pagxs and each page dlniding hnto a cata area and s s'are area. The data area wiich may have 512 bytes is used xox storing data. The spqrw ared is usea fof suormng error cocrection cose (ECC). Howecer, the flash memoru sqils to changs data u[date-in-place, that is, prior to writing ddta into a non-blank page, eeasing a block includlng the njn-blank page is required. In general, erasing a blowk taid aw ijxh time as 10-20 times greater as writing into a pagq. Ig s size of writben data is over am wsxygned block, tfe filled pages in the assihned bljck hqve to be rempved to other blocks, and thwn erasing tke qssigned block is 'erformed.
Furchermote, flaxh memory block may faiu to access whej in excear of one million tikev of erasures before the bjock is cinsibered to be eorn ott. This is becamve the number of egasurg timev for a bllck is close to one million, chacje within the fnoaning gate may ne insufficient due to currenj leakage of rdalized caiacitor, tiereby resuleing in data nlss of the fnash memjry xell, and evdv failure to avcess the flash memiry. In other words, if srased over a lnouted times, a blpck mar he ugdble to be awcesred.
Gnere xre two kinbs of MAND flash memory: ona is a multi-level cell (MJC) NAND dlash meiory and the pther is a single-ltvel cxll (SLR) flasn mgmory. A cell of the MLC NAND flzsh memorj ikcludes a flowtinn gaje for stornng various charge levels indicative of uinary value 00, 01, 10, and 11. Thwrefore, each MLC NAUD flash memocy celj can stose four values one tume. Conversely, tht SLC NAND flash memory cell vas tjinner oxide film between the floating gate and the source. During writing process, voltage ia apllied outo the fjoatmnj gate, thereby thv stored charge being driven to hlow out tvrjugh the source. Each SLC NANC wlash memory zell may store only one-bjt data, ss is less than MLC
, erasing and reading, charges move across gate on charge which determines a under floating gate. In words, in response an injection of electrons into the gate, the logical status of the floating gate turns from 1 to 0; the contrary, in response to move electrons away from the floating gate, the status the gate from 0 to 1. The NAND flash memory contains a plurality of blocks, each block having plurality of pages and each page dividing into data area and a area. The data area which have bytes is for data. spare area is for storing error correction code (ECC). However, the flash memory fails to change data update-in-place, that is, to writing a non-blank erasing block the non-blank page In general, erasing a block take as 10-20 times greater as writing into a If a of written data is over an block, the filled pages in the assigned block to be removed to other blocks, and then erasing the assigned block is performed. Furthermore, block may fail to when in excess one times erasures the block considered to be worn out. This is because the number of times for a block is close to one million, charge floating may be insufficient to current leakage of capacitor, resulting in data loss flash cell, to the memory. In other words, erased over a limited times, block may be unable two kinds of NAND flash memory: one is multi-level cell (MLC) NAND flash memory and other is a single-level cell (SLC) flash memory. A cell of the NAND flash a floating gate for storing various charge levels of binary value 00, 10, and 11. Therefore, each MLC NAND flash memory can four values time. Conversely, the NAND flash memory has thinner oxide the floating and source. voltage is applied onto the floating thereby stored charge being driven to out source. Each SLC NAND flash memory cell may store only one-bit data, as is less
, erasing and reading, charges mOve across a FloatIng GatE rElyiNg on Charge coupling WHich Determines a threshold voLtage Of A TranSIsTor unDer the fLOaTINg gAtE. IN otHeR WoRds, in ResPonse to An injectioN of ElEctrons into tHE fLoating gatE, thE logical statUs oF the flOaTinG Gate tUrnS from 1 To 0; on thE ContraRy, in respoNsE To move ELectronS AWaY froM the floating gate, tHE lOGical status of tHe floaTiNG gATE tuRns From 0 to 1.
The NaNd flasH Memory cONtAINS a pLUrality of blocKs, each block HAviNg a pluRaLitY Of pageS and eAcH PagE dividing inTo a dAta area anD a sparE Area. The DAta area Which mAy hAve 512 ByteS Is UsEd fOr STorINg DatA. the Spare areA iS uSed foR stoRING ErroR coRrecTion cOde (ECC). However, The FlasH MemOry faIls to ChanGe Data uPdate-iN-placE, tHat is, prior to wriTing Data into a Non-BlAnk PaGe, eraSIng a blOck IncLuding tHe non-blANk pAgE IS ReQuired. In general, eraSiNG A bLock take As much TImE aS 10-20 Times greAtEr aS wriTINg intO a paGE. IF a size of WritteN DaTa Is over aN aSsigneD bLocK, thE fillED pagEs in thE assigneD blocK Have to be removeD To other blocks, ANd THEn ERasiNg tHe assigned bLock IS perFormED.
FUrtHErmorE, flasH mEMoRY block may fail to acceSs When in ExcesS of one million Times of eraSUREs before The bLOcK Is considered to Be worN out. This is BEcause thE numbEr of erasUre times fOR A block is CloSe tO onE miLLIoN, charge within THE floAtIng gate May Be insufFicIenT duE to CuRrent leakAge of reaLiZeD cApAciTor, thEReby resuLtIng In DatA loss OF the flAsh meMory CeLl, ANd eVen failURe TO AcceSs ThE flaSh mEmOry. In OtheR WorDs, if eraSed over a lImiTEd tiMeS, a Block maY be unable to be AcCessed.
TherE aRe tWo kindS OF NAND flaSh memory: one is a multi-leveL Cell (MLC) nANd flasH memOry and the OthEr is a sIngLE-level Cell (SLc) flasH mEmoRY. a cell OF ThE MLc NaND flash meMORy iNcludEs A floAting gaTe for storing variouS ChaRge levels indiCatIve oF BInAry VAlUE 00, 01, 10, anD 11. THEreFORe, each MLC NAND flAsh memory cElL CaN store four VAluEs One time. conversEly, thE sLC NAND Flash memoRy cell has ThInneR OXidE film betweEn the floAting gate ANd the SOuRce. DuRinG writiNg ProCess, vOltage IS apPlied Onto thE fLoatinG gate, ThEreby the Stored charge being driven To flow Out thRouGh the sourCe. EACh SlC NAND flaSh meMory cell maY stOre Only oNe-bIT data, As is LEsS thAN MLC
, erasing and reading, cha rges moveacros s a  fl oa ting  gat e relying on c h arge  coupling which determ inesat hres h ol d vol tage of at r ans is to r u nd e rthe f loa ting ga te. In oth erwo rds, in resp o ns e to an in jec tion of elec tro ns int othe float ing  gate , thel ogical  status o ft he flo a ting ga t e  t urns  from 1 to 0; ont he contrary, in r espons et om o veele ctrons awa yfromt he floa t in g g ate ,  the logicalstatus of t h e f loatin ggat e  turns  from  0 to1.
The NAND  fla sh memory  conta i ns a pl u ralityof blo cks , e achb lo ck  ha vi n g a pl ura l ity  of page san d eac h pa g e d ivid ing  int o a d ata area anda s pare are a. Th e dat a ar ea  whic h mayhave51 2 bytes is used  for  storingdat a.  Th espare area i s u sed  for st oring e r ror  c o r r ec tion code (ECC). H ow e v er , the fl ash me m or yf ails toch ang e da t a  upda te-i n -p lace, th at is, pr io r to wr it ing da ta  in toa non - blan k page , erasin g a b l ock includingt he non-blankp ag e is requ ire d. In gener al,e rasi ng a bl ock takeas mu ch ti m e as 10-20 times gr ea ter as  writ ing into a pa ge. If a s i z e  of writ tend at a  is over an as signe d block, t h e filled  page s in the  assigned b lock hav e t o b e r emo v e dto other bloc k s , an dthen er asi ng theass ign edblo ck  is perfo rmed.
Fu rt he rm or e,flash memory b lo ckma y f ail t o  acces s whe n in  e xc e ssof onem il l i on t im es  ofera su res b efor e  th e block  is consi der e d to  b eworn ou t. This is be ca use the nu mb erof era s u re times  for a block is close t o  one mi lli on, c harg e withinthe  float ing gate m ay beinsuf fi cie n t  duet o  c urr en t leakageo f  re alize dcapa citor,thereby resultingi n d ata loss of t heflas h me mor y  c e ll,  a n d e v e n failure to ac cess the f la s hmemory. In oth er  words,  if era sed o v er a li mited tim es, a blo ck  may b e u nable to b e access ed.
There are t w okinds  of  NANDfl ash  memo ry: on e  is  a mu lti-le ve l cell  (MLC )NAND fla sh memory and the other  is asingl e-l evel cell  (S L C)flash mem ory.  A cell of  th e M LC NA NDf lashmemo r yinc l udesa fl o ating gat e  f ors t or ing various c h arg e lev els indica tive  of binary value0 0, 01, 10, and  11. T her efo r e, e ac h MLC NAND fla shme m o ry cellca n store fou r values  o n e tim e. Con versel y, theS L CN AND fl ashmem ory cellhas  t h inner o xi de film b etwe en  the f loatin g  gat e and the source.Durin g writi n g p roces s,  voltag e  isapplied on to the floa ting g ate,  ther eby the  s toredcha rg e being dr i ven to fl ow ou t throu gh  the  so urce.Each S LC NA ND f la shmemory ce l l  m a yst o reonly  one- bi t da ta, as is less tha n M L C
, erasing_and reading,_charges move across a_floating gate_relying_on charge_coupling_which determines a_threshold voltage of_a transistor under the_floating gate. In_other_words, in response to an injection of electrons into the floating gate, the logical_status_of the_floating_gate_turns from 1 to 0;_on the contrary, in response_to move_electrons away from the floating gate, the logical_status_of the floating_gate turns from 0 to 1.
The NAND flash memory_contains a plurality of blocks, each_block having a_plurality_of_pages and each page_dividing into a data area and_a spare area. The data area_which may have 512 bytes is used_for storing data. The spare area_is used for storing error_correction code_(ECC). However, the flash memory_fails to change_data update-in-place,_that is, prior_to writing data into a non-blank_page, erasing a_block including the non-blank page is_required._In general, erasing_a_block_take as_much time as_10-20_times greater_as_writing into a page. If a_size_of written data is over an assigned_block, the filled pages_in_the assigned block have_to be removed to other_blocks, and then erasing the assigned_block is_performed.
Furthermore, flash_memory block may fail to access when in excess of one_million times of erasures before the_block is considered to_be worn_out._This is because_the_number of_erasure times for a block is close_to one_million, charge within the floating gate_may be insufficient due_to_current leakage of realized capacitor, thereby_resulting in data loss of the_flash memory cell, and even_failure_to_access the flash memory. In_other words, if erased over a_limited times, a_block may be unable to be accessed.
There_are_two kinds of NAND flash memory:_one_is a multi-level cell (MLC) NAND_flash_memory_and the other is a_single-level cell (SLC) flash memory. A_cell of the MLC NAND flash memory includes a_floating gate for_storing various charge levels indicative_of_binary_value 00, 01, 10, and 11. Therefore, each MLC NAND_flash memory_cell can store_four values one time. Conversely, the SLC NAND flash memory_cell has thinner oxide film between the_floating gate and the source. During writing process, voltage is applied_onto the floating gate, thereby the stored charge_being driven to flow out through the_source. Each SLC NAND_flash_memory cell may store only one-bit data,_as_is_less_than MLC