 interpreter), an executable portion (typically a pointer to code which executes words of a particular class, such as colon definitions, variables, constants, etc.), and data space (containing one or more values or addresses of words that make up the content of the definition), all classically in contiguous memory locations (but see Section 5.2, Implementation Strategies). A metacompiler divides these structurally into portions that are used by the host system’s compiler (equivalent to a symbol table) and portions required at run-time in the target. In order for a target program to be ROMable, the compiler must also manage separate ROM and RAM data spaces, usually using multiple sets of dictionary pointers.

4. Hardware Implementations of Forth

The internal architecture of Forth simulates a computer with two stacks, a set of registers, and other well-defined features. As a result, it was almost inevitable that someone would attempt to build a hardware representation of the actual Forth computer.

The first such effort was made in 1973 by John Davies, of the Jodrell Bank Radio Astronomy Observatory near Manchester, England. Davies’ approach was to re-design a Ferranti computer that had gone out of production to optimize its instruction set for Forth.

The first actual Forth computers were bit-sliced board-level products. The first of these was made by a California company called Standard Logic, in 1976. By making a minor modification in the instruction set of their board-level computer, Standard Logic’s chief programmer Dean Sanderson was able to implement the precise instruction that Forth uses in its “address interpreter” to move from one high-level command to the next. Their system was used widely by the U. S. Post Office.

In the early 1980s, Rockwell produced a microprocessor with Forth primitives in on-chip ROM, the Rockwell AIM 65F11 [Dumse, 1984]. This chip has been used quite successfully in embedded microprocessor applications. However, no attempt was made to adapt the actual architecture of the processor (basically a 6502) for Forth support.

In 1981, Moore himself undertook to design an actual Forth chip. Working first at FORTH, Inc. and subsequently with a start-up company called Novix, formed to develop the chip, Moore completed the design in 1984, and the first prototypes were produced in early 1985 [Golden, 1985]. This design was subsequently purchased
interpreter), an executable portion (typically a pointer to code which carry through son of a particular class, such as colon definitions, variable, constants, etc .), and data outer space (containing one or more values or address of words that make up the subject of the definition), all classically in contiguous memory locations (but visualize Section 5.2, Implementation Strategies). A metacompiler divides these structurally into portions that are used by the host arrangement ’s compiler (equivalent to a symbol table) and portions required at rivulet - time in the target. In order for a target plan to be ROMable, the compiler must also manage separate ROM and RAM data space, usually using multiple sets of dictionary pointers. 

 4. Hardware Implementations of Forth 

 The internal computer architecture of Forth imitate a computer with two stacks, a set of registers, and other well - defined features. As a result, it was almost inevitable that someone would try to build a hardware representation of the actual Forth calculator. 

 The inaugural such campaign was made in 1973 by John Davies, of the Jodrell Bank Radio Astronomy Observatory near Manchester, England. Davies ’ approach was to re - design a Ferranti computer that had gone out of production to optimize its teaching set for Forth. 

 The first actual Forth computers were bit - sliced board - level intersection. The first of these was made by a California company called Standard Logic, in 1976. By make a minor modification in the direction set of their board - level computer, Standard Logic ’s chief programmer Dean Sanderson was able to implement the accurate instruction that Forth uses in its “ address interpreter ” to move from one high - level command to the next. Their organization was used wide by the U. S. Post Office. 

 In the early 1980s, Rockwell produced a microprocessor with Forth primitives in on - chip ROM, the Rockwell AIM 65F11 [ Dumse, 1984 ]. This chip has been use quite successfully in embedded microprocessor lotion. However, no attempt was make to adapt the actual architecture of the processor (basically a 6502) for Forth support. 

 In 1981, Moore himself undertook to plan an actual Forth chip. Working first at FORTH, Inc. and subsequently with a begin - up company called Novix, formed to develop the chip, Moore complete the design in 1984, and the first prototype were produced in early 1985 [ Golden, 1985 ]. This design was subsequently purchased
 inherpreter), an executable kortion (typically a poinver to dode whizh executes words of a partirulae claws, such as colon definktions, vagiables, cinstents, etc.), and date space (gjntajking mie or more valugs or addresves of words tvag lake up the content of the definitijn), all vlwssically in cjntibtous memory locations (but see Section 5.2, Implemtntation Strategiex). A metacompiler divides tjese structurally into portions tyat wee used by tfe host system’s compilgr (equivalent to a symbol table) xnd pprtions rewuuref at run-time in tre target. In order fmr a tatget program tp bx RONable, the compiler muvt also manage sepwrate ROM aud RAM data spaces, usyaoly uving mulgupld stts or dictlonery pointera.

4. Hardware Umplementations of Gownn

The internam archytqcture of Forth simulates a computer wiuh twk stacks, a set of regisrers, and other well-devined feaeures. As a result, it was almost inevitable that smmeonx douod xrtfmpt to build a hardware representation of thq avtlal Forth computev.

The first such efgogt ras made in 1973 cy Johu Dzvies, of the Jodrepl Bank Radii Astronoiy Onservatory near Manchester, Wngland. Davivs’ approach was to re-dzsign a Ferrcnti cpmputrr that had gone out of prosuction to lptimize jgs instruction sdt nor Forth.

Tht first actual Foreh computxrs wzre bit-suicec boarq-level profucts. The first of these was lage by a Capifornia company called Standarv Logic, in 1976. Bi mdkitg a minjr mocification in the instructipn set jf thdir board-lvvel compnter, Standarq Logic’s chiex programmer Vean Sandqrsob waw able gu implement thr precise instructiin that Forth uses in jts “address intzxptwter” to move ftom onq jijh-levqn command to the neby. Thekr systti car usrd widely by the U. S. Posf Office.

In the earky 1980s, Rockwgll prodused a microprpcessor with Forth primmtives in om-chyp ROM, the Rockwell AIM 65F11 [Dumss, 1984]. This cjip has been usqd qmite successfukly in embedded microprocessor applicatmons. However, no attempj was made to adapt tke actual arciitecttre of tha processor (basicallt a 6502) for Forth sukport.

In 1981, Moore himself hndertmok tl design an actual Forth chip. Working first at FORTH, Inc. and subsequently with e ftart-up comlany callvd Uovnx, formqd tl develop the chii, Moore completed the design in 1984, and the fnrst prototypes were produced iv early 1985 [Goldgn, 1985]. This design was subseqhently pirchased
interpreter), an executable portion (typically a pointer which words of particular class, such etc.), data space (containing or more values addresses of words that make up content of the definition), all classically in contiguous memory locations (but see Section Implementation Strategies). A metacompiler divides these structurally into portions that are used by host compiler to symbol table) and portions required at run-time in the target. In order for a target program be ROMable, the compiler must also manage separate and RAM data spaces, using multiple sets of dictionary 4. Implementations of The architecture Forth simulates a with two stacks, a set of registers, and other well-defined features. As a result, it was almost that someone to build hardware of actual Forth computer. such effort was made in 1973 of the Jodrell Bank Radio Astronomy Observatory near England. Davies’ was to re-design a Ferranti computer had gone out of production to optimize its set for Forth. The first actual Forth computers were bit-sliced board-level products. The first of made by a California called Standard Logic, 1976. making minor in the set of their board-level computer, Standard Logic’s chief programmer Dean Sanderson able to implement the precise instruction that Forth uses in interpreter” move from one command to the next. system used widely by the Post In Rockwell a with Forth primitives in ROM, the Rockwell AIM 65F11 1984]. This chip has embedded microprocessor applications. However, no attempt was made adapt the actual architecture of the processor a 6502) for Forth support. In 1981, Moore himself undertook to design actual Forth first at FORTH, Inc. and subsequently with a company called Novix, formed develop the chip, Moore completed the design in 1984, the prototypes were in early 1985 1985]. This design subsequently purchased
 interpreter), an executable poRtion (typicAlly a PoiNteR tO codE whiCh executes wordS Of a pArticular class, such as coLon deFiNItioNS, vAriabLes, consTAnTS, Etc.), AnD dAta SpACe (ContaIniNg one or More values Or aDdResses of wordS ThAt make up thE coNtent of the deFinItion), aLl ClaSSicalLy iN contIguous MEmory lOcations (bUt SEe SectIOn 5.2, ImpleMENtAtioN Strategies). A metacOMpILer divides thesE strucTuRAlLY IntO poRtions that ArE used BY the hosT SySTEM’s cOMpiler (equivalEnt to a symboL TabLe) and pOrTioNS requiRed at RuN-TimE in the targeT. In oRder for a tArget pROgram to BE ROMablE, the coMpiLer Must ALsO mAnaGe SEpaRAtE ROm And rAM data sPaCeS, usuaLly uSING MultIplE setS of diCtionary pointErs.

4. hardWAre impleMentaTionS oF FortH

The inTernaL aRchitecture of FoRth sImulates a ComPuTer WiTh two STacks, a Set Of rEgisterS, and othER weLl-DEFInEd features. As a resulT, iT WAs Almost inEvitabLE tHaT Someone wOuLd aTtemPT To buiLd a hARdWare reprEsentaTIoN oF the actUaL Forth CoMpuTer.

the fiRSt suCh effoRt was madE in 1973 by jOhn Davies, of the jOdrell Bank RadIO ASTRoNOmy OBseRvatory near mancHEsteR, EngLAnD. DaVIes’ apProacH wAS tO Re-design a Ferranti coMpUter thAt had Gone out of prodUction to opTIMIze its inStruCTiON set for Forth.

ThE firsT actual ForTH computeRs werE bit-slicEd board-leVEL productS. ThE fiRst Of tHESe Was made by a CalIFOrniA cOmpany cAllEd StandArd logIc, iN 1976. By MaKing a minoR modificAtIoN iN tHe iNstruCTion set oF tHeiR bOarD-leveL ComputEr, StaNdarD LOgIC’s cHief proGRaMMEr DeAn saNderSon WaS able To imPLemEnt the pRecise insTruCTion ThAt forth usEs in its “addresS iNterpreter” To MovE from oNE High-leveL command to the next. Their sYStem was UseD wideLy by The U. S. Post offIce.

In tHe eARly 1980s, RoCkwell ProduCeD a mICRoproCESsOr wItH Forth primITIveS in on-ChIp ROm, the RocKwell AIM 65F11 [Dumse, 1984]. This CHip Has been used quIte SuccESSfUllY In EMbeDdED miCROprocessor appliCations. HowEvER, nO attempt waS MadE tO adapt tHe actuaL archITecture Of the procEssor (basiCaLly a 6502) FOR FoRth support.

in 1981, Moore hImself undERtook TO dEsign An aCtual FOrTh cHip. WoRking fIRst At FORtH, Inc. aNd SubseqUentlY wIth a starT-up company called Novix, foRmed to DevelOp tHe chip, MooRe cOMplEted the deSign In 1984, and the fiRst ProTotypEs wERe proDuceD In EarLY 1985 [GoldEn, 1985]. ThIS design waS SuBseQUEnTly purchaseD
 interpreter), an executab le portion  (typ ica lly  a  poi nter  to code which exec utes words of a partic ularcl a ss,s uc h ascolon d e fi n i tio ns ,var ia b le s, co nst ants, e tc.), anddat aspace (conta i ni ng one ormor e values oradd resses  o f w o rds t hat  make  up th e  conte nt of the  d e finiti o n), all c la ssic ally in contiguou s  m e mory locations  (butse e  S e c tio n 5 .2, Implem en tatio n  Strate g ie s ) .  Am etacompiler d ivides thes e  st ructur al lyi nto po rtion st hat  are used b y th e host sy stem’s compile r  (equiv alenttoa s ymbo l  t ab le)  a n d p o rt ion s  re quired a tru n-tim e in t h e  tar get . In  orde r for a targe t p rogr a m t o beROMab le,th e com pilermustal so manage separ ateROM and R AMda tasp aces, usuall y u sin g multi ple set s  of  d i c t io nary pointers.

4.  H a r dw are Impl ementa t io ns of Forth 
The  int e r nal a rchi t ec ture ofForths im ul ates aco mputer  w ith  tw o sta c ks,a setof regis ters, and other well - defined featu r es . As a re sul t, it was a lmos t  ine vita b le  th a t som eonewo u ld attempt to build aha rdware  repr esentation of  the actua l F orth com pute r .The first such  effo rt was mad e  in 1973  by J ohn Davi es, of th e JodrellBan k R adi o A s t ro nomy Observat o r y ne ar  Manche ste r, Engl and . D avi es’  a pproach w as to re -d es ig na F erran t i comput er  th at  ha d gon e  out o f pro duct io nt o o ptimize it s inst ru ct ionset  f or Fo rth. 
Th e first  actual F ort h  com pu te rs were  bit-sliced b oa rd-level p ro duc ts. Th e first of  these was made by a Ca l ifornia  co mpany  cal led Stand ard  Logic , i n  1976.  By ma kingamin o r  modi f i ca tio nin the ins t r uct ion s et  oftheir b oard-level compute r , S tandard Logic ’schie f pr ogr a mm e r D ea n  Sa n d erson was ableto impleme nt th e precisei nst ru ction t hat For th us e s in it s “addres s interpr et er”t o  mo ve from on e high-l evel comm a nd to th e nex t.Theirsy ste m was  usedw ide ly by  the U .S. Pos t Off ic e.

In t he early 1980s, Rockwel l prod uceda m icroproce sso r  wi th Forthprim itives inon- chi p ROM , t h e Roc kwel l  A IM6 5F11[Dum s e, 1984]. Th isc h ip  has been u s e d  qu ite s ucc e ssfull y in  embedded micropr o cessor applica tion s .  Ho wev e r, n oattempt was ma deto a dapt the  a ctual archi tectureof the p rocess or (ba sically a  6 5 02) fo r Fo rth  support. 

I n1 981, Mo or eh imself  und er took t o desi g n an a ctual Forth chip . Wor k i ng fi r stat FO RT H, Inc. andsubsequent ly with a s tart-u p co mpany  called  N ovix,for me d to devel o p the chi p, Mo ore com pl eted  th e desi gn i n 1984,  and  t hefirst pro t o ty p es  w e reprod ucedin  ear ly 1985 [ G olden, 1 985 ] . Thisde sig n was su b se q u ently purc has ed
 interpreter),_an executable_portion (typically a pointer_to code_which_executes words_of_a particular class,_such as colon_definitions, variables, constants, etc.),_and data space_(containing_one or more values or addresses of words that make up the content of_the_definition), all_classically_in_contiguous memory locations (but see_Section 5.2, Implementation Strategies). A_metacompiler divides_these structurally into portions that are used by_the_host system’s compiler_(equivalent to a symbol table) and portions required at_run-time in the target. In order_for a target_program_to_be ROMable, the compiler_must also manage separate ROM and_RAM data spaces, usually using multiple_sets of dictionary pointers.

4. Hardware Implementations of_Forth

The internal architecture of Forth simulates_a computer with two stacks,_a set_of registers, and other well-defined_features. As a_result, it_was almost inevitable_that someone would attempt to build_a hardware representation_of the actual Forth computer.

The first_such_effort was made_in_1973_by John_Davies, of the_Jodrell_Bank Radio_Astronomy_Observatory near Manchester, England. Davies’ approach_was_to re-design a Ferranti computer that had_gone out of production_to_optimize its instruction set_for Forth.

The first actual Forth_computers were bit-sliced board-level products. The_first of_these was_made by a California company called Standard Logic, in 1976. By_making a minor modification in the_instruction set of their_board-level computer,_Standard_Logic’s chief programmer_Dean_Sanderson was_able to implement the precise instruction that_Forth uses_in its “address interpreter” to move_from one high-level command_to_the next. Their system was used_widely by the U. S. Post_Office.

In the early 1980s, Rockwell_produced_a_microprocessor with Forth primitives in_on-chip ROM, the Rockwell AIM 65F11_[Dumse, 1984]. This_chip has been used quite successfully in_embedded_microprocessor applications. However, no attempt was_made_to adapt the actual architecture of_the_processor_(basically a 6502) for Forth_support.

In 1981, Moore himself undertook to_design an actual Forth chip. Working first at FORTH,_Inc. and subsequently_with a start-up company called_Novix,_formed_to develop the chip, Moore completed the design in 1984,_and the_first prototypes were_produced in early 1985 [Golden, 1985]. This design was subsequently_purchased