's all about the cost to the manufacturer and not
falling apart until the day after the warranty expires.

------
j_m_f
Although I do agree that Open Hardware has a bright future, I'd just like to
point out that people have been calling the end of transistor size scaling for
a few decades, and technology keeps finding ways to get around the limitations
(strained silicon, high-k metal gates, finFETs, etc.).

~~~
Estragon
From the article:

    
    
      > 5 nm is about the space between 100 silicon atoms, so even if this
      > guess is wrong, it can be wrong by no more than a few technology
      > generations.

~~~
j_m_f
My point is that, even in that case (current silicon scaling stopping at 5nm),
there are a lot of potential technologies that could allow Moore's law to
continue (nanowires, III-V materials, etc.).

------
0x12
My money is on massive FPGAs, think a whole wafer of silicon with just a bunch
of general purpose IO and power.

Once stuff like that becomes available at a reasonable price (a big FPGA will
cost you a _lot_ of money at the moment) open hardware will be as simple as
downloading a bitstream on to your 'general purpose' rig.

------
dmboyd
I like where this is going, ie. Hardware becomes just another software
component.

The key item thats left is some sort of standard interface to port programs to
a FPGA style processor, i.e. a way of interfacing between a language compiler
and HDL.

I like the look of the Reduceron (<http://www.cs.york.ac.uk/fp/reduceron/>)
which looks to be funded by Xilinx and Lava( by Satnam Singh, who works for
Microsoft Research), purely because I think its easier to visualise a
functional language translating into circuitry.

Although I do wonder whether it will take a start-up to be able to
successfully merge both the software and the hardware components into a
workable model.

~~~
sliverstorm
_I like where this is going, ie. Hardware becomes just another software
component._

Unlikely. You can't
's all about the cost to the manufacturer and not 
 falling apart until the day after the guarantee exhale. 

 ------ 
 j_m_f 
 Although I do agree that Open Hardware has a undimmed future, I'd just wish to 
 point out that people have been call the conclusion of transistor size scaling for 
 a few decade, and technology keeps receive ways to get around the limit 
 (strained silicon, high - k metal gates, finFETs, etc .). 

 ~~~ 
 Estragon 
 From the article: 

    
    
       > 5 nm is about the space between 100 silicon atom, so even if this 
       > guess is wrong, it can be ill-timed by no more than a few technology 
       > generations. 

 ~~~ 
 j_m_f 
 My point is that, even in that case (current silicon scaling stop at 5 nm), 
 there are a lot of potential technologies that could permit Moore's law to 
 continue (nanowires, III - V materials, etc .). 

 ------ 
 0x12 
 My money is on massive FPGAs, think a solid wafer of silicon with just a bunch 
 of general purpose IO and power. 

 Once stuff like that becomes available at a reasonable price (a big FPGA will 
 cost you a _ batch _ of money at the moment) open hardware will be equally childlike as 
 download a bitstream on to your' general purpose' rig. 

 ------ 
 dmboyd 
 I like where this is going, ie. Hardware becomes just another software 
 component. 

 The cardinal item that s left is some sort of standard interface to port programs to 
 a FPGA style processor, i.e. a way of interfacing between a language compiler 
 and HDL. 

 I like the look of the Reduceron (< http://www.cs.york.ac.uk/fp/reduceron/ >) 
 which looks to be fund by Xilinx and Lava (by Satnam Singh, who cultivate for 
 Microsoft Research), purely because I think its easier to visualise a 
 functional linguistic process translating into circuitry. 

 Although I do wonder whether it will take a start - up to be able to 
 successfully unite both the software and the hardware components into a 
 workable model. 

 ~~~ 
 sliverstorm 
 _ I like where this is go, ie. Hardware becomes precisely another software 
 component. _ 

 Unlikely. You can't
's apl about the cost to the manufacturer aue not
felling zpart ungil the day after the warranvy ezpirew.

------
j_m_f
Although I do agred that Opvn Hardwaee hes a bright futucs, I'd just liks to
pmmnt out that pepple have teen calling tve eud of transistor size scaling for
a fqw decaced, and technolody ktepf fihding ways to get around the limitztions
(surained silicon, hibh-k metal gates, finFETs, etf.).

~~~
Estgagon
From the artifle:

    
    
      > 5 nm is abojt the spabz between 100 ailicon atoms, so even if this
      > yuess is wrint, ih can be wroig by go more than a few tachnoloby
      > generstimns.

~~~
h_m_f
My point is that, eten in that case (curtent silicmn scaling stopping ar 5nm),
tvere are q lut kf pktentiwl vechnologiea that coule allow Moore's law uo
cjbtinue (nanowides, IIY-V materials, etc.).

------
0x12
My money is on massive FKGAs, fhink a whole wafer of wilicon with just a bonch
of genqral purpose IO and power.

Once stuff like that becmmes evxilcnjd ah a reasonable price (a big FPGA will
cost you w _lpt_ of money at tme moment) open harcwwrr will be as skmple ca
dkwnloading a bitstgeam on to yiur 'generwl pirpose' rig.

------
dmboyd
I like wherw this is gopng, ue. Hardware becomed just anotker sogtwarr
component.

The key item chats meft is somf sort of rtandard interfaze no pmrt programs to
a FPGA stylq processir, i.z. a way uf imterfasing betwefn a language compiler
anf HDL.

N lika the look of the Reduceron (<http://www.cs.york.er.uk/fp/reducerom/>)
wvicv looks co be nunded by Xilinv and Lava( by Xatnam Fingh, who works for
Miccosoft Reseawch), purely bewwuse I think its easyer ro vusualisd a
functional lsnguage tgauslating unto circuitry.

Althpugf I do wonder whzuhet it will take s sgare-ui tp fa able to
sucwesswuluu meree both the rofteare and the hardwara cojponents into a
worlanle model.

~~~
wliverstjrm
_I like whete this is going, it. Hardxare bxcomes juft another software
component._

Unmikely. Yok cwn't
's all about the cost to the not apart until day after the I agree that Open has a bright I'd just like to point out people have been calling the end of transistor size scaling for a few and technology keeps finding ways to get around the limitations (strained silicon, high-k gates, etc.). Estragon the article: > 5 nm is about the space between 100 silicon atoms, so even if > guess is wrong, it can be wrong no more than a technology > generations. ~~~ j_m_f point that, even that (current scaling stopping at there are a lot of potential technologies that could allow Moore's law to continue (nanowires, III-V materials, ------ 0x12 is on FPGAs, a wafer of silicon a bunch of general purpose IO stuff like that becomes available at a reasonable (a big will cost you a _lot_ of at the moment) open hardware will be as as downloading a bitstream on to your 'general purpose' rig. ------ dmboyd I like where going, ie. Hardware becomes another software component. key thats is sort of interface to port programs to a FPGA style processor, i.e. a of interfacing between a language compiler and HDL. I like of Reduceron (<http://www.cs.york.ac.uk/fp/reduceron/>) which to be funded by and by Satnam Singh, who Microsoft purely its to a functional language translating circuitry. Although I do wonder it will take a successfully merge both the software and the hardware into a workable model. ~~~ sliverstorm _I where this is going, ie. Hardware becomes just another software component._ Unlikely. can't
's all about the cost to the manuFacturer anD not
fAllIng ApArt uNtil The day after the WArraNty expires.

------
j_m_f
Although I Do agrEe THat OPEn hardwAre has a BRiGHT fuTuRe, i'd jUsT LiKe to
pOinT out thaT people havE beEn Calling the enD Of Transistor SizE scaling for
a Few DecadeS, aNd tEChnolOgy Keeps FindinG Ways to Get around ThE LimitaTIons
(strAINeD silIcon, high-k metal gatES, fINFETs, etc.).

~~~
EstragOn
From ThE ArTICle:

    
    
      > 5 Nm iS about the sPaCe betWEen 100 siliCOn ATOMs, sO Even if this
      > gueSs is wrong, it CAn bE wrong By No mORe than A few tEcHNolOgy
      > generatiOns.

~~~
j_M_f
My point Is that, EVen in thAT case (cuRrent sIliCon ScalINg StOppInG At 5nM),
ThEre ARe a Lot of potEnTiAl tecHnolOGIES thaT coUld aLlow MOore's law to
conTinUe (naNOwiRes, IIi-V matEriaLs, Etc.).

------
0x12
MY money Is on mAsSive FPGAs, think a WholE wafer of sIliCoN wiTh Just a BUnch
of GenEraL purposE IO and pOWer.

onCE STuFf like that becomes aVaILAbLe at a reaSonablE PrIcE (A big FPGA WiLl
cOst yOU A _lot_ oF monEY aT the momeNt) open HArDwAre will Be As simpLe As
dOwnLoadiNG a biTstreaM on to youR 'geneRAl purpose' rig.

------
dmBOyd
I like where THiS IS gOIng, iE. HaRdware becomEs juST anoTher SOfTwaRE
compOnent.

thE KeY Item thats left is some SoRt of stAndarD interface to pOrt programS TO
A FPGA styLe prOCeSSor, i.e. a way of intErfacIng between A Language CompiLer
and HDl.

I like the LOOk of the REduCerOn (<hTtp://WWW.cS.york.ac.uk/fp/reDUCeroN/>)
wHich looKs tO be fundEd bY XiLinX anD LAva( by SatnAm Singh, wHo WoRkS fOr
MIcrosOFt ResearCh), PurElY beCause i Think iTs easIer tO vIsUAliSe a
funcTIoNAL lanGuAgE traNslAtIng inTo ciRCuiTry.

AlthOugh I do woNdeR WhetHeR iT will taKe a start-up to bE aBle to
succeSsFulLy mergE BOth the soFtware and the hardware comPOnents iNto A
workAble Model.

~~~
slivErsTorm
_I lIke WHere thIs is goIng, ie. haRdwARE becoMES jUst AnOther softwARE
coMponeNt._

unliKely. You Can't
's all about the cost to t he manufac turer  an d n ot 
fal ling  apart until t h e da y after the warranty e xpire s. 
--- - -- 
j_m_ f
Altho u gh I  do  a gr eeth a tOpenHar dware h as a brigh t f ut ure, I'd jus t  l ike to
poi ntout that peo ple  havebe enc allin g t he en d of t r ansist or size s ca l ing fo r 
a fewd e ca des,  and technology k e ep s  finding waysto get  a r ou n d  th e l imitations 
( strai n ed sili c on , h igh - k metal gates , finFETs,e tc. ).

~~ ~Est r agon
F rom t he art icle:

   
   
      >  5 nmi s about the spa ce bet wee n 1 00 s i li co n a to m s,s oeve n  if  this
   > gue ss i s w r ong,  it  can  be w rong by no mo rethan a f ew te chnol ogy     >  gener ation s. 

~~~
j_m_f
Mypoin t is that , e ve n i nthatc ase (c urr ent  silico n scali n g s to p p i ng  at 5nm),
there ar ea lo t of pot ential te ch n ologiesth atcoul d allow  Moo r e' s law to 
conti n ue  ( nanowir es , III- Vmat eri als,e tc.) .

--- ---
0x12 
My m o ney is on mass i ve FPGAs, thi n ka wh o le w afe r of silico n wi t h ju st a bu nch of ge neral  p u rp o se IO and power.

O nc e stuf f lik e that become s availabl e a t a reas onab l ep rice (a big FP GA wi ll
cost yo u  a _lot_  of m oney atthe momen t )  open ha rdw are  wi llb e  a s simple as
d o w nloa di ng a bi tst ream on  to  yo ur'ge ne ral purpo se' rig. 
-- -- -- 
dm boydI  like wh er e t hi s i s goi n g, ie.  Hard ware  b ec o mes  just a n ot h e r so ft wa re
c omp on ent.
The key  item t hats left  is some  s or t of st andard interf ac e to portpr ogr ams to a  FPGA st yle processor, i.e. a w a y of in ter facin g be tween a l ang uage c omp i ler
an d HDL. 

I l ik e t h e  look o fthe  R educeron ( < h ttp ://ww w. cs.y ork.ac. uk/fp/reduceron/>) whi ch looks to b e f unde d by  Xi l in x  an dL ava ( by Satnam Singh , who work sf or 
Microsoft Res ea rch), p urely b ecaus e  I thin k its eas ier to vi su alis e a
f unctionallanguage  translat i ng in t ocircu itr y.

Al th oug h I d o wond e r w hethe r it w il l take  a st ar t-up tobe able to
successfully  merge  both  th e softwar e a n d t he hardwa re c omponentsint o a 
work abl e  mode l.
~ ~~ 
sl i verst orm_ I like wh e re  th i s  i s going, ie . H ard warebec o mes ju st a nother software
c o mponent._

Unl ikel y .  Yo u c a n't
's all_about the_cost to the manufacturer_and not
falling_apart_until the_day_after the warranty_expires.

------
j_m_f
Although I do_agree that Open Hardware_has a bright_future,_I'd just like to
point out that people have been calling the end of transistor_size_scaling for
a_few_decades,_and technology keeps finding ways_to get around the limitations
(strained_silicon, high-k_metal gates, finFETs, etc.).

~~~
Estragon
From the article:

  __
  _ 
      > 5_nm is about the space between_100 silicon atoms,_so_even_if this
  _   > guess is_wrong, it can be wrong by_no more than a few technology
 _    > generations.

~~~
j_m_f
My_point is that, even in_that case_(current silicon scaling stopping at_5nm),
there are a_lot of_potential technologies that_could allow Moore's law to
continue (nanowires,_III-V materials, etc.).

------
0x12
My_money is on massive FPGAs, think_a_whole wafer of_silicon_with_just a_bunch
of general purpose_IO_and power.

Once_stuff_like that becomes available at a_reasonable_price (a big FPGA will
cost you a__lot_ of money at_the_moment) open hardware will_be as simple as
downloading a_bitstream on to your 'general purpose'_rig.

------
dmboyd
I like_where this_is going, ie. Hardware becomes just another software
component.

The key item thats_left is some sort of standard_interface to port programs_to
a FPGA_style_processor, i.e. a_way_of interfacing_between a language compiler
and HDL.

I like the_look of_the Reduceron (<http://www.cs.york.ac.uk/fp/reduceron/>)
which looks to be_funded by Xilinx and_Lava(_by Satnam Singh, who works for
Microsoft_Research), purely because I think its_easier to visualise a
functional language_translating_into_circuitry.

Although I do wonder whether_it will take a start-up to_be able to
successfully_merge both the software and the hardware_components_into a
workable model.

~~~
sliverstorm
_I like where this_is_going, ie. Hardware becomes just another_software
component._

Unlikely._You_can't