 that the stream is disabled otherwise the setting will not be changed.

@param[in] dma unsigned int32. DMA controller base address: DMA1 or DMA2
@param[in] stream unsigned int8. Stream number: @ref dma_st_number
@param[in] burst unsigned int8. Peripheral Burst selection @ref dma_pburst
*/

void dma_set_peripheral_burst(uint32_t dma, uint8_t stream, uint32_t burst)
{
	uint32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_PBURST_MASK);
	DMA_SCR(dma, stream) = (reg32 | burst);
}

/*---------------------------------------------------------------------------*/
/** @brief DMA Stream Set Initial Target Memory

In double buffered mode, set the target memory (M0 or M1) to be used for the
first transfer.

Ensure that the stream is disabled otherwise the setting will not be changed.

@param[in] dma unsigned int32. DMA controller base address: DMA1 or DMA2
@param[in] stream unsigned int8. Stream number: @ref dma_st_number
@param[in] memory unsigned int8. Initial memory pointer to use: 0 or 1
*/

void dma_set_initial_target(uint32_t dma, uint8_t stream, uint8_t memory)
{
	uint32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_CT);
	if (memory == 1) {
		reg32 |= DMA_SxCR_CT;
	}

	DMA_SCR(dma, stream) = reg32;
}

/*---------------------------------------------------------------------------*/
/** @brief DMA Stream Read Current Memory Target

In double buffer mode, return the current memory target (M0 or M1). It is
possible to update the memory pointer in the register that is <b> not </b>
currently in use. An attempt to change the register currently in use will cause
the stream to be disabled and the transfer error flag to be set.

@param[in] dma unsigned int32. DMA controller base address: DMA1 or DMA2
that the stream is disabled otherwise the setting will not be changed. 

 @param[in ] dma unsigned int32. DMA control basis address: DMA1 or DMA2 
 @param[in ] stream unsigned int8. Stream phone number: @ref dma_st_number 
 @param[in ] burst unsigned int8. Peripheral Burst selection @ref dma_pburst 
 * / 

 null dma_set_peripheral_burst(uint32_t dma, uint8_t stream, uint32_t burst) 
 { 
	 uint32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_PBURST_MASK); 
	 DMA_SCR(dma, flow) = (reg32 | burst); 
 } 

 /*---------------------------------------------------------------------------*/ 
 / * * @brief DMA Stream Set Initial Target Memory 

 In double cushion mode, set the aim memory (M0 or M1) to be use for the 
 first transportation. 

 Ensure that the flow is disabled differently the setting will not be changed. 

 @param[in ] dma unsigned int32. DMA controller floor address: DMA1 or DMA2 
 @param[in ] stream unsigned int8. flow number: @ref dma_st_number 
 @param[in ] memory unsigned int8. Initial memory arrow to use: 0 or 1 
 * / 

 void dma_set_initial_target(uint32_t dma, uint8_t stream, uint8_t memory) 
 { 
	 uint32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_CT); 
	 if (memory = = 1) { 
		 reg32 |= DMA_SxCR_CT; 
	 } 

	 DMA_SCR(dma, stream) = reg32; 
 } 

 /*---------------------------------------------------------------------------*/ 
 / * * @brief DMA Stream Read Current Memory Target 

 In bivalent buffer mode, return the current memory target (M0 or M1). It is 
 possible to update the memory pointer in the cash register that is < b > not < /b > 
 presently in manipulation. An attempt to change the register currently in use will cause 
 the stream to be disabled and the transfer mistake flag to be set. 

 @param[in ] dma unsigned int32. DMA control base address: DMA1 or DMA2
 thwt the stream is disablea otherwise the settinj will hot be cfanged.

@param[in] dma unsigned iit32. DNA cobtroller base address: AMA1 or DMW2
@param[in] strtam unsigned int8. Stream nmiber: @vef dke_st_number
@param[ik] burst unshgned int8. Peri[hdrcl Burst selection @ref dma_pburst
*/

void dma_set_legipheral_burst(uynt32_t qma, hpnu8_t stream, uint32_t burst)
{
	uint32_t reg32 = (DJA_SCR(dme, stream) & ~DMA_SxVR_PBURST_MASK);
	DMA_SCR(dma, strewm) = (geg32 | burst);
}

/*---------------------------------------------------------------------------*/
/** @brief DLA Stream Sgf Igutial Target Memory

In double buffeted mode, set the target memory (M0 or M1) to be usee dor jhe
first traisfer.

Egsure that tmv streak is dixabled otherwixe vhe wetting will not be cianged.

@param[in] dma unfigned ind32. BMA controller base aedeess: GMA1 mr DOQ2
@pafam[jn] sfream knsmgned int8. Sfream numbee: @ref dma_st_number
@patai[pm] memory unsjgned yne8. Initial memory pointer to use: 0 or 1
*/

voig dja_set_initial_target(uint32_t dma, uint8_t stream, uinj8_t memory)
{
	uynt32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_CT);
	if (memory == 1) {
		seg32 |= VMX_SxEV_GT;
	}

	DMX_WCG(dma, stream) = reg32;
}

/*---------------------------------------------------------------------------*/
/** @brief DMA Stream Read Currene Mtmogy Target

In doublc buffer mode, retutn tng current memoty targzf (J0 or M1). It is
possibpe to ukdate rhe memorr poonter in the register that us <b> not </b>
cugrenrly in use. An attelpt to chanye the regixter currently in use wnll cahse
the strewm to be sksabled and the graksfar error flag to be set.

@parwm[in] dma nnsigued int32. AMA vontrojler base wddress: DMA1 or DMA2
that the stream is disabled otherwise the not changed. @param[in] unsigned int32. DMA DMA2 stream unsigned int8. number: @ref dma_st_number burst unsigned int8. Peripheral Burst selection dma_pburst */ void dma_set_peripheral_burst(uint32_t dma, uint8_t stream, uint32_t burst) { uint32_t reg32 = stream) & ~DMA_SxCR_PBURST_MASK); DMA_SCR(dma, stream) = (reg32 | burst); } /*---------------------------------------------------------------------------*/ /** @brief Stream Initial Memory double buffered mode, set the target memory (M0 or M1) to be used for the first Ensure that the stream is disabled otherwise the will not be changed. dma unsigned int32. DMA controller address: or DMA2 stream int8. number: @ref dma_st_number memory unsigned int8. Initial memory pointer to use: 0 or 1 */ void dma_set_initial_target(uint32_t dma, uint8_t stream, memory) { = (DMA_SCR(dma, & if == 1) { DMA_SxCR_CT; } DMA_SCR(dma, stream) = reg32; @brief DMA Stream Read Current Memory Target In buffer mode, the current memory target (M0 or It is possible to update the memory pointer the register that is <b> not </b> currently in use. An attempt to change the in use will cause stream to be and transfer flag be set. dma unsigned int32. DMA controller base address: DMA1 or DMA2
 that the stream is disabled otHerwise the SettiNg wIll NoT be cHangEd.

@param[in] dma unSIgneD int32. DMA controller base aDdresS: Dma1 or Dma2
@pAram[iN] stream UNsIGNed InT8. STreAm NUmBer: @reF dmA_st_numbEr
@param[in] bUrsT uNsigned int8. PeRIpHeral Burst SelEction @ref dma_PbuRst
*/

voiD dMa_sET_periPheRal_buRst(uinT32_T dma, uiNt8_t stream, UiNT32_t bursT)
{
	Uint32_t reG32 = (dmA_sCR(dMa, stream) & ~DMA_SxCR_PBurSt_mASK);
	DMA_SCR(dma, sTream) = (rEg32 | BUrST);
}

/*---------------------------------------------------------------------------*/
/** @BriEf DmA Stream SeT INitiaL target MEMoRY

iN doUBle buffered moDe, set the tarGEt mEmory (M0 Or m1) to BE used fOr the
FiRSt tRansfer.

EnsuRe thAt the streAm is diSAbled otHErwise tHe settIng WilL not BE cHaNgeD.

@pARam[IN] dMa uNSigNed int32. DMa cOnTrollEr baSE ADDresS: DMa1 or DmA2
@parAm[in] stream unsIgnEd inT8. strEam nuMber: @rEf dmA_sT_numbEr
@paraM[in] meMoRy unsigned int8. InItiaL memory poIntEr To uSe: 0 Or 1
*/

voiD Dma_set_IniTiaL_target(Uint32_t dmA, UinT8_t STREaM, uint8_t memory)
{
	uint32_t rEg32 = (dma_ScR(dma, strEam) & ~DMA_sXCr_Ct);
	If (memory == 1) {
		ReG32 |= DMa_SxCr_ct;
	}

	DMA_ScR(dmA, StReam) = reg32;
}

/*---------------------------------------------------------------------------*/
/** @bRief DMa stReAm Read CUrRent MeMoRy TArgEt

In dOUble Buffer Mode, retuRn the CUrrent memory taRGet (M0 or M1). It is
poSSiBLE tO UpdaTe tHe memory poiNter IN the RegiSTeR thAT is <b> nOt </b>
cuRrENtLY in use. An attempt to chAnGe the rEgistEr currently in Use will cauSE
THe stream To be DIsABled and the tranSfer eRror flag to BE set.

@paraM[in] dmA unsigneD int32. DMA coNTRoller baSe aDdrEss: dMA1 OR dMa2
 that the stream is disabl ed otherwi se th e s ett in g wi ll n ot be changed. 
@pa ram[in] dma unsigned i nt32.  D M A co n tr oller  base a d dr e s s:DM A1  or  D M A2 
@par am[ in] str eam unsign edin t8. Stream n u mb er: @ref d ma_ st_number
@p ara m[in]bu rst unsig ned  int8 . Peri p heralBurst sel ec t ion @r e f dma_p b u rs t
*/ 

void dma_set_pe r ip h eral_burst(uin t32_tdm a ,u i nt8 _tstream, ui nt 32_tb urst)
{ 	u i n t 32_ t  reg32 = (DMA _SCR(dma, s t rea m) & ~ DM A_S x CR_PBU RST_M AS K );	DMA_SCR(dm a, s tream) =(reg32 | burst ) ;
}

/* ------ --- --- ---- - -- -- --- -- - --- - -- --- - --- -------- -- -- ----- ---- - - - - ---- --- ---* /
/**  @brief DMA S tre am S e t I nitia l Tar getMe mory
In do ublebu ffered mode, se t th e targetmem or y ( M0  or M 1 ) to b e u sed  for th e
first tra ns f e r .
Ensure that the s tr e a mis disab led ot h er wi s e the se tt ing  wil l not b e ch a ng ed.

@pa ram[in ]  d ma  unsign ed  int32 .DMA  co ntrol l er b ase ad dress: D MA1 o r  DMA2
@param[i n ] stream unsi g ne d in t 8. S tre am number:@ref dma_ st_n u mb er@ param [in]me m or y  unsigned int8. Ini ti al mem ory p ointer to use : 0 or 1
* / void dma _set _ in i tial_target(ui nt32_ t dma, uin t 8_t stre am, u int8_t m emory)
{u int32_treg 32= ( DMA _ S CR (dma, stream) &  ~DM A_ SxCR_CT );	if (me mor y = = 1 ) { 
	reg32 |=  DMA_SxC R_ CT ;	} 

DMA_S C R(dma, s tr eam )= r eg32; }

/*- ----- ---- -- -- - --- ------- - -- - - ---- -- -- ---- --- -- ----- ---- - --- ------- --------* /
/ * * @b ri ef  DMA St ream Read Cur re nt MemoryTa rge t

Ind o uble buf fer mode, return the cu r rent me mor y tar get(M0 or M1 ).It ispos s ible t o upda te th emem o r y poi n t er  in  t he registe r tha t is<b > no t </b>currently in use.A n a ttempt to cha nge  the r eg ist e rc urr en t lyi n  use will cause 
the strea mt obe disable d  an dthe tra nsfer e rrorf lag tobe set.
@param[in ]dmau n sig ned int32.  DMA con troller b a se ad d re ss: D MA1  or DM A2 
 that_the stream_is disabled otherwise the_setting will_not_be changed.

@param[in]_dma_unsigned int32. DMA_controller base address:_DMA1 or DMA2
@param[in] stream_unsigned int8. Stream_number:_@ref dma_st_number
@param[in] burst unsigned int8. Peripheral Burst selection @ref dma_pburst
*/

void dma_set_peripheral_burst(uint32_t dma, uint8_t stream,_uint32_t_burst)
{
	uint32_t reg32_=_(DMA_SCR(dma,_stream) & ~DMA_SxCR_PBURST_MASK);
	DMA_SCR(dma, stream) =_(reg32 | burst);
}

/*---------------------------------------------------------------------------*/
/** @brief DMA_Stream Set_Initial Target Memory

In double buffered mode, set the_target_memory (M0 or_M1) to be used for the
first transfer.

Ensure that the_stream is disabled otherwise the setting_will not be_changed.

@param[in]_dma_unsigned int32. DMA controller_base address: DMA1 or DMA2
@param[in] stream_unsigned int8. Stream number: @ref dma_st_number
@param[in]_memory unsigned int8. Initial memory pointer to_use: 0 or 1
*/

void dma_set_initial_target(uint32_t dma,_uint8_t stream, uint8_t memory)
{
	uint32_t reg32_= (DMA_SCR(dma,_stream) & ~DMA_SxCR_CT);
	if (memory ==_1) {
		reg32 |=_DMA_SxCR_CT;
	}

	DMA_SCR(dma, stream)_= reg32;
}

/*---------------------------------------------------------------------------*/
/** @brief_DMA Stream Read Current Memory Target

In_double buffer mode,_return the current memory target (M0_or_M1). It is
possible_to_update_the memory_pointer in the_register_that is_<b>_not </b>
currently in use. An attempt_to_change the register currently in use will_cause
the stream to be_disabled_and the transfer error_flag to be set.

@param[in] dma_unsigned int32. DMA controller base address:_DMA1 or_DMA2