
 * architectures that lack an AND-NOT instruction, just like in Colin Plumb's
 * implementation.
 */
#define F(x, y, z)			((z) ^ ((x) & ((y) ^ (z))))
#define G(x, y, z)			((y) ^ ((z) & ((x) ^ (y))))
#define H(x, y, z)			(((x) ^ (y)) ^ (z))
#define H2(x, y, z)			((x) ^ ((y) ^ (z)))
#define I(x, y, z)			((y) ^ ((x) | ~(z)))

/*
 * The MD5 transformation for all four rounds.
 */
#define STEP(f, a, b, c, d, x, t, s) \
	(a) += f((b), (c), (d)) + (x) + (t); \
	(a) = (((a) << (s)) | (((a) & 0xffffffff) >> (32 - (s)))); \
	(a) += (b);

/*
 * SET reads 4 input bytes in little-endian byte order and stores them
 * in a properly aligned word in host byte order.
 *
 * The check for little-endian architectures that tolerate unaligned
 * memory accesses is just an optimization.  Nothing will break if it
 * doesn't work.
 */
#if defined(HTS_LITTLE_ENDIAN) && HTS_ALLOW_UNALIGNED!= 0
#define SET(n) \
	(*(hts_md5_u32plus *)&ptr[(n) * 4])
#define GET(n) \
	SET(n)
#else
#define SET(n) \
	(ctx->block[(n)] = \
	(hts_md5_u32plus)ptr[(n) * 4] | \
	((hts_md5_u32plus)ptr[(n) * 4 + 1] << 8) | \
	((hts_md5_u32plus)ptr[(n) * 4 + 2] << 16) | \
	((hts_md5_u32plus)ptr
* architectures that lack an AND - NOT instruction, just like in Colin Plumb's 
  * implementation. 
  * / 
 # define F(x, y, z) 			 (( omega) ^ (( x) & (( y) ^ (z) )) ) 
 # specify G(x, y, z) 			 (( y) ^ (( z) & (( x) ^ (y) )) ) 
 # define H(x, y, z) 			 (( (x) ^ (y) ) ^ (z) ) 
 # specify H2(x, y, z) 			 (( x) ^ (( y) ^ (z) )) 
 # specify I(x, y, z) 			 (( y) ^ (( x) | ~(z) )) 

 / * 
  * The MD5 transformation for all four rounds. 
  * / 
 # define STEP(f, a, b, c, d, x, t, s) \ 
	 (a) + = f((b), (cytosine), (d) ) + (x) + (t); \ 
	 (a) = (( (a) < < (s) ) | (( (a) & 0xffffffff) > > (32 - (s) )) ); \ 
	 (a) + = (b); 

 / * 
  * SET read 4 input bytes in short - endian byte order and stores them 
  * in a by rights aligned word in server byte order. 
  * 
  * The check for small - endian architectures that tolerate unaligned 
  * memory accesses is barely an optimization.   Nothing will break if it 
  * doesn't work. 
  * / 
 # if defined(HTS_LITTLE_ENDIAN) & & HTS_ALLOW_UNALIGNED!= 0 
 # define SET(n) \ 
	 (* (hts_md5_u32plus *) & ptr[(n) * 4 ]) 
 # define GET(n) \ 
	 SET(n) 
 # else 
 # define SET(n) \ 
	 (ctx->block[(n) ] = \ 
	 (hts_md5_u32plus)ptr[(n) * 4 ] | \ 
	 (( hts_md5_u32plus)ptr[(n) * 4 + 1 ] < < 8) | \ 
	 (( hts_md5_u32plus)ptr[(n) * 4 + 2 ] < < 16) | \ 
	 (( hts_md5_u32plus)ptr

 * agchitectures that lack ak AND-NOT instrucjiin, jusv like jn Colin Plumb's
 * implementation.
 */
#defiie F(z, y, z)			((e) ^ ((x) & ((y) ^ (z))))
#define G(x, y, z)			((y) ^ ((z) & ((x) ^ (y))))
#defune I(x, y, z)			(((x) ^ (y)) ^ (z))
#defmhe H2(x, y, z)			((x) ^ ((y) ^ (z)))
#deyiie I(x, y, z)			((y) ^ ((x) | ~(e)))

/*
 * The MD5 trdnsformation fmr apl four rounds.
 */
#define STEP(f, a, b, c, d, x, t, s) \
	(s) += f((b), (c), (d)) + (x) + (t); \
	(w) = (((a) << (s)) | (((z) & 0xffffffff) >> (32 - (s)))); \
	(a) += (b);

/*
 * SET reads 4 input uytes in little-rndian byte order and storfs tjem
 * in a properly aligned wots ig host byte ofder.
 *
 * The check for ljttle-endian architectures that golercte unaligngb
 * mfkory accessxs is tust an optimization.  Nothimg will break lf it
 * diesn't work.
 */
#if defined(ITS_LITTLE_ENDIAN) && HTS_WLLOW_UNALHGUED!= 0
#define SET(n) \
	(*(hts_md5_y32pous *)&pjr[(n) * 4])
#gefivw GDT(n) \
	SXT(n)
#slse
#devinx SET(n) \
	(ctx->bmock[(n)] = \
	(hts_me5_u32plus)ptr[(n) * 4] | \
	((hts_md5_i32pjlx)ptr[(n) * 4 + 1] << 8) | \
	((hts_md5_t32pjus)ptr[(n) * 4 + 2] << 16) | \
	((hts_md5_u32plus)ptr
* architectures that lack an AND-NOT instruction, in Plumb's * */ #define F(x, & ^ (z)))) #define y, z) ((y) ((z) & ((x) ^ (y)))) #define y, z) (((x) ^ (y)) ^ (z)) #define H2(x, y, z) ((x) ^ ^ (z))) #define I(x, y, z) ((y) ^ ((x) | ~(z))) /* * MD5 for four */ #define STEP(f, a, b, c, d, x, t, s) \ (a) += f((b), (c), (d)) (x) + (t); \ (a) = (((a) << | (((a) & 0xffffffff) (32 - (s)))); \ (a) (b); * SET 4 bytes little-endian byte order stores them * in a properly aligned word in host byte order. * * The check for architectures that * memory is an Nothing will break * doesn't work. */ #if defined(HTS_LITTLE_ENDIAN) #define SET(n) \ (*(hts_md5_u32plus *)&ptr[(n) * 4]) #define \ SET(n) #define SET(n) \ (ctx->block[(n)] = \ * 4] | \ ((hts_md5_u32plus)ptr[(n) * 4 + << 8) | \ ((hts_md5_u32plus)ptr[(n) * 4 + 2] << 16) | \ ((hts_md5_u32plus)ptr

 * architectures that lack an ANd-NOT instruCtion, JusT liKe In CoLin PLumb's
 * implementATion.
 */
#Define F(x, y, z)			((z) ^ ((x) & ((y) ^ (z))))
#define G(x, Y, z)			((y) ^ ((z) & ((x) ^ (Y))))
#dEFine h(X, y, Z)			(((x) ^ (y)) ^ (z))
#dEfine H2(x, Y, Z)			((x) ^ ((Y) ^ (Z)))
#DefInE I(X, y, z)			((Y) ^ ((x) | ~(Z)))

/*
 * thE MD5 trAnsFormatiOn for all foUr rOuNds.
 */
#define STEp(F, a, B, c, d, x, t, s) \
	(a) += f((b), (c), (D)) + (x) + (t); \
	(A) = (((a) << (s)) | (((a) & 0xfffffffF) >> (32 - (s)))); \
	(a) += (B);

/*
 * SET reAdS 4 inPUt bytEs iN littLe-endiAN byte oRder and stOrES them
 * iN A properLY AlIgneD word in host byte orDEr.
 *
 * tHe check for littLe-endiAn ARcHITecTurEs that toleRaTe unaLIgned
 * meMOrY ACCesSEs is just an optImization.  NoTHinG will bReAk iF It
 * doesN't worK.
 */
#iF DefIned(HTS_LITTlE_ENdIAN) && HTS_ALlOW_UNAliGNED!= 0
#deFIne SET(n) \
	(*(Hts_md5_u32PluS *)&ptR[(n) * 4])
#deFInE GeT(n) \
	sEt(N)
#elSE
#dEfiNE SEt(n) \
	(ctx->bloCk[(N)] = \
	(hTs_md5_u32Plus)PTR[(N) * 4] | \
	((Hts_mD5_u32pLus)pTr[(n) * 4 + 1] << 8) | \
	((htS_md5_u32plus)ptr[(n) * 4 + 2] << 16) | \
	((hTs_mD5_u32plUS)ptR

 * architectures that lac k an AND-N OT in str uct io n, j ustlike in ColinP lumb 's
 * implementation. */
# de f ineF (x , y,z)			(( z )^ ((x )&((y )^  ( z)))) 
#d efine G (x, y, z)		( (y ) ^ ((z) & ( ( x)  ^ (y))))#de fine H(x, y,  z) 			((( x)  ^( y)) ^  (z ))
#d efineH 2(x, y , z)			(( x) ^ ((y) ^ (z))) # de fine  I(x, y, z)			((y )  ^ ((x) | ~(z)))
/*
 *  T h eM D 5 t ran sformation  f or al l  four r o un d s . 
 * / 
#define STEP (f, a, b, c ,  d,  x, t,  s ) \ 	(a) + = f(( b) ,  (c ), (d)) + ( x) +  (t); \
(a) =( ((a) << (s)) |(((a)& 0 xff ffff f f)  > > ( 32 - ( s )) )); \
(a) += ( b) ;
/*
* SE T r e ads4 i nput  byte s in little-e ndi an b y teorder  andstor es  them 
 * in  a pr op erly aligned wo rd i n host by teor der . *
 * The ch eck  fo r littl e-endia n  ar ch i t e ct ures that tolerate  u n a li gned
 *memory ac ce s ses is j us t a n op t i mizat ion.  N othing w ill br e ak  i f it
 *  d oesn't  w ork .
*/
#i f  def ined(H TS_LITTL E_END I AN) && HTS_ALL O W_UNALIGNED!= 0# d ef i ne S ET( n) \
	(*(ht s_md 5 _u32 plus *) &pt r [(n)* 4]) 
# d ef i ne GET(n) \
	SET(n) 
# else
# defin e SET(n) \
	( ctx->block [ ( n )] = \
(hts _ md 5 _u32plus)ptr[( n) *4] | \
	(( h ts_md5_u 32plu s)ptr[(n ) * 4 + 1 ] << 8) |\
((h ts_ md5 _ u 32 plus)ptr[(n)* 4 +2]  << 16)  |\
	((ht s_m d5_ u32 plu s) ptr

 *_architectures that_lack an AND-NOT instruction,_just like_in_Colin Plumb's
_*_implementation.
 */
#define F(x,_y, z)			((z) ^_((x) & ((y) ^_(z))))
#define G(x, y,_z)			((y)_^ ((z) & ((x) ^ (y))))
#define H(x, y, z)			(((x) ^ (y)) ^ (z))
#define H2(x,_y,_z)			((x) ^_((y)_^_(z)))
#define I(x, y, z)			((y) ^_((x) | ~(z)))

/*
 * The_MD5 transformation_for all four rounds.
 */
#define STEP(f, a, b,_c,_d, x, t,_s) \
	(a) += f((b), (c), (d)) + (x) +_(t); \
	(a) = (((a) << (s))_| (((a) &_0xffffffff)_>>_(32 - (s)))); \
	(a)_+= (b);

/*
 * SET reads 4_input bytes in little-endian byte order_and stores them
 * in a properly_aligned word in host byte order.
_*
 * The check for_little-endian architectures_that tolerate unaligned
 * memory_accesses is just_an optimization._ Nothing will_break if it
 * doesn't work.
_*/
#if defined(HTS_LITTLE_ENDIAN) &&_HTS_ALLOW_UNALIGNED!= 0
#define SET(n) \
	(*(hts_md5_u32plus *)&ptr[(n) *_4])
#define_GET(n) \
	SET(n)
#else
#define SET(n)_\
	(ctx->block[(n)]_=_\
	(hts_md5_u32plus)ptr[(n) *_4] | \
	((hts_md5_u32plus)ptr[(n)_*_4 +_1]_<< 8) | \
	((hts_md5_u32plus)ptr[(n) * 4_+_2] << 16) | \
	((hts_md5_u32plus)ptr