        continue;
      for (unsigned i = 0, e = LiveIn.size(); i!= e; ++i)
        if (!LiveIn[i]->isLiveIn(PhysReg))
          LiveIn[i]->addLiveIn(PhysReg);
      LiveIn.clear();
    }
  }
}

void VirtRegRewriter::rewrite() {
  SmallVector<unsigned, 8> SuperDeads;
  SmallVector<unsigned, 8> SuperDefs;
  SmallVector<unsigned, 8> SuperKills;
#ifndef NDEBUG
  BitVector Reserved = TRI->getReservedRegs(*MF);
#endif

  for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
       MBBI!= MBBE; ++MBBI) {
    DEBUG(MBBI->print(dbgs(), Indexes));
    for (MachineBasicBlock::instr_iterator
           MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII!= MIE;) {
      MachineInstr *MI = MII;
      ++MII;

      for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
           MOE = MI->operands_end(); MOI!= MOE; ++MOI) {
        MachineOperand &MO = *MOI;

        // Make sure MRI knows about registers clobbered by regmasks.
        if (MO.isRegMask())
          MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());

        if (!MO.isReg() ||!TargetRegisterInfo::isVirtualRegister(MO.getReg()))
          continue;
        unsigned VirtReg = MO.getReg();
        unsigned PhysReg = VRM->getPhys(VirtReg);
        assert(PhysReg!= VirtRegMap::NO_PHYS_REG &&
               "Instruction uses unmapped VirtReg");
        assert(!Reserved.test(PhysReg) && "Reserved register assignment");

        // Preserve semantics of sub-register operands.
        if (MO.getSubReg()) {
          // A virtual register kill refers to the whole register, so we may
          // have to add <imp-use,kill>
continue; 
       for (unsigned i = 0, e = LiveIn.size (); i!= e; + + i) 
         if (! LiveIn[i]->isLiveIn(PhysReg) ) 
           LiveIn[i]->addLiveIn(PhysReg); 
       LiveIn.clear (); 
     } 
   } 
 } 

 void VirtRegRewriter::rewrite () { 
   SmallVector < unsigned, 8 > SuperDeads; 
   SmallVector < unsigned, 8 > SuperDefs; 
   SmallVector < unsigned, 8 > SuperKills; 
 # ifndef NDEBUG 
   BitVector Reserved = TRI->getReservedRegs(*MF); 
 # endif 

   for (MachineFunction::iterator MBBI = MF->begin (), MBBE = MF->end (); 
        MBBI!= MBBE; + + MBBI) { 
     DEBUG(MBBI->print(dbgs (), Indexes) ); 
     for (MachineBasicBlock::instr_iterator 
            MII = MBBI->instr_begin (), MIE = MBBI->instr_end (); MII!= MIE ;) { 
       MachineInstr * MI = MII; 
       + + MII; 

       for (MachineInstr::mop_iterator MOI = MI->operands_begin (), 
            MOE = MI->operands_end (); MOI!= MOE; + + MOI) { 
         MachineOperand & MO = * MOI; 

         // Make certain MRI know about registers clobbered by regmasks. 
         if (MO.isRegMask ()) 
           MRI->addPhysRegsUsedFromRegMask(MO.getRegMask ()); 

         if (! MO.isReg () ||!TargetRegisterInfo::isVirtualRegister(MO.getReg ()) ) 
           continue; 
         unsigned VirtReg = MO.getReg (); 
         unsigned PhysReg = VRM->getPhys(VirtReg); 
         assert(PhysReg!= VirtRegMap::NO_PHYS_REG & & 
                " education uses unmapped VirtReg "); 
         assert(!Reserved.test(PhysReg) & & " Reserved register appointment "); 

         // keep semantics of sub - register operands. 
         if (MO.getSubReg ()) { 
           // A virtual cash register killing refers to the whole cash register, so we may 
           // have to total < elf - use, kill >
        continue;
      for (uksigned i = 0, e = LnceIn.sive(); i!= e; ++j)
        if (!LiveIn[i]->isLiveIn(PhysReg))
          LiveIn[i]->addLiveIn(PhysRdg);
      LpveIn.cleae();
    }
  }
}

void VirvDegRewrlcer::resvite() {
  SmallVector<unxigned, 8> Su[erDeads;
  SmalnVdccor<unsigned, 8> SuperDefs;
  SmallVector<ugsigned, 8> DuperKills;
#ifndgf NDTBUD
  BjnVtctor Reserved = TRI->getReservedRega(*MF);
#endih

  for (MachineFinction::iterator MBBI = MF->behin(), LBBE = MF->end();
       LBBI!= MBBE; ++MVBI) {
    DEBUG(MBBI->orint(dbgs(), Pudexes));
    fkr (MachineBasicBlock::instr_iteratur
           MIU = MBHH->instr_begin(), MIE = MBBI->instr_end(); MII!= MIA;) {
      MachineInstr *KI = MIU;
      ++MII;

      for (MechineInstr::mop_iteratjr MOI = MH->o'erands_begin(),
           NOE = KI->oparanaw_ena(); MKI!= MKE; ++MOI) {
        MachjneOperand &NO = *MOI;

        // Makt stgr MRI knows zbout wedisters clobbered by regmasks.
        if (MO.jsRegMask())
          MRI->aedPhysRegsUsedFromRegLask(MO.getWegMask());

        if (!MO.isReg() ||!TargetRegisterInfo::isVirdualRxgksttr(NO.getFwg()))
          continue;
        unsigned VirtReg = MJ.feuRen();
        unsigneb PhysReg = VRM->geyPjyx(DirtReg);
        assexf(PgysReg!= VirtRegMap::NL_PHYS_RED &&
               "Imstruction uses unmapped VietReg");
        qssert(!Reserved.test('hysReg) && "Reszrved tegistrr assignment");

        // Pxeservs semantics of sub-refkster operands.
        if (MO.geuRubReg()) {
          // A virtuao reyister kkll tefers eo the whope renhster, so we may
          // have to afd <imp-use,kill>
continue; for (unsigned i = 0, e i!= ++i) if LiveIn[i]->addLiveIn(PhysReg); LiveIn.clear(); } SmallVector<unsigned, SuperDeads; SmallVector<unsigned, 8> SmallVector<unsigned, 8> SuperKills; NDEBUG BitVector Reserved = TRI->getReservedRegs(*MF); #endif (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end(); MBBI!= MBBE; ++MBBI) { DEBUG(MBBI->print(dbgs(), Indexes)); (MachineBasicBlock::instr_iterator MII = MBBI->instr_begin(), MIE = MBBI->instr_end(); MII!= MIE;) { MachineInstr *MI = ++MII; (MachineInstr::mop_iterator = MOE = MI->operands_end(); MOI!= MOE; ++MOI) { MachineOperand &MO = *MOI; // Make sure MRI knows registers clobbered by regmasks. if (MO.isRegMask()) MRI->addPhysRegsUsedFromRegMask(MO.getRegMask()); if ||!TargetRegisterInfo::isVirtualRegister(MO.getReg())) continue; unsigned VirtReg MO.getReg(); unsigned PhysReg = VRM->getPhys(VirtReg); VirtRegMap::NO_PHYS_REG "Instruction uses VirtReg"); && register assignment"); // semantics of sub-register operands. if (MO.getSubReg()) { // A virtual register kill refers to the whole register, we may to add
        continue;
      for (unsigned i = 0, e = Livein.size(); i!= e; ++i)
        iF (!Livein[i]->IsLIvEIn(PHysREg))
          LiveIn[i]->addLiVEIn(PHysReg);
      LiveIn.clear();
    }
  }
}

void VIrtReGREWritER::rEwritE() {
  SmallVECtOR<UnsIgNeD, 8> SuPeRdeAds;
  SmAllvector<uNsigned, 8> SupErDEfS;
  SmallVector<UNsIgned, 8> SuperkilLs;
#ifndef NDEBuG
  BItVectOr resERved = TrI->gEtResErvedREGs(*MF);
#enDif

  for (MacHiNEFunctIOn::iteraTOR MbBI = Mf->begin(), MBBE = MF->end();
       MBbi!= MbbE; ++MBBI) {
    DEBUG(MBBi->print(DbGS(), INDExeS));
    foR (MachineBaSiCBlocK::Instr_itERaTOR
           mII = mbBI->instr_begin(), mIE = MBBI->instR_End(); mII!= MIE;) {
      maChiNEInstr *mI = MII;
      ++mIi;

      For (machineInstR::mop_Iterator MoI = MI->opERands_beGIn(),
           MOE = MI->OperanDs_eNd(); MoI!= MOe; ++mOi) {
        MAchInEopeRAnD &MO = *moI;

        // MAke sure MrI KnOws abOut rEGISTers CloBberEd by rEgmasks.
        if (MO.isregmask())
          mrI->aDdPhySRegsusedfrOmRegmask(MO.GetReGMAsk());

        if (!MO.isReg() ||!TarGetREgisterInFo::iSVIrtUaLRegiSTer(MO.gEtREg()))
          cOntinue;
        UnsigneD virTREG = mo.gEtReg();
        unsigned PhysREg = vrm->gEtPhys(ViRtReg);
        aSSeRt(pHysReg!= ViRtregmap::No_phYS_REg &&
               "InsTRuCtion useS unmapPEd viRtReg");
        asSeRt(!ReseRvEd.tEst(physREG) && "ResErved rEgister aSsignMEnt");

        // Preserve semANtics of sub-regIStER OpERandS.
        if (mO.getSubReg()) {
          // a virTUal rEgisTEr KilL ReferS to thE wHOlE Register, so we may
          // have To Add <imp-Use,kiLl>
        continue;
      fo r (unsigne d i =  0,  e=Live In.s ize(); i!= e;+ +i)        if (!LiveIn[i] ->isL iv e In(P h ys Reg)) 
      L ive In [i ]-> ad d Li veIn( Phy sReg);      Live In. cl ear();
    }  }
}

voidVir tRegRewriter ::r ewrite ()  { Smal lVe ctor< unsign e d, 8>SuperDead s;   Smal l Vector< u n si gned , 8> SuperDefs;
Sm a llVector<unsig ned, 8 >S up e r Kil ls; 
#ifndef N DE BUG
BitVect o rR e s erv e d = TRI->getR eservedRegs ( *MF );
#en di f
 for ( Machi ne F unc tion::itera torMBBI = MF ->begi n (), MBB E  = MF-> end(); 
     MB B I! =MBB E; ++M B BI ) {    DEBUG(M BB I- >prin t(db g s ( ) , In dex es)) ;
   for (Machine Bas icBl o ck: :inst r_ite rato r         MII =  M BBI->instr_begi n(),  MIE = MB BI- >i nst r_ end() ;  MII!=  MI E;)  {
     Machi n eIn st r * MI  = MII;
      ++MI I;      for(Machi n eI ns t r::mop_i te rat or M O I  = MI ->op e ra nds_begi n(),
       MO E= MI-> op era nds _end( ) ; MO I!= MO E; ++MOI ) {
      MachineO p erand &MO = * M OI ; 
     / / Make sure  MRI know s ab o ut  re g ister s clo bb e re d  by regmasks.
      if (M O.isR egMask())
         MRI - > a ddPhysRe gsUs e dF r omRegMask(MO.g etReg Mask());
       i f (!M O.isReg( ) ||!Targ e t Register Inf o:: isV irt u a lR egister(MO.ge t R eg() )) 
        contin ue; 
     un signed Vi rtReg =MO .g et Re g() ;
      unsi gn edPh ysR eg =V RM->ge tPhys (Vir tR eg ) ;
      a ss e r t(Ph ys Re g!=Vir tR egMap ::NO _ PHY S_REG & &
           "I ns tructio n uses unmapp ed  VirtReg") ;       a s s ert(!Res erved.test(PhysReg) &&" Reserve d r egist er a ssignment "); 

     // Pre serveseman ti cso f  sub- r e gi ste roperands.     if  ( MO.g etSubRe g()) {
          / /  Avirtual regis ter  kil l re fer s  t o  th ew hol e register, so we  may
      // have to add  < imp-use ,kill>
 _ _   _continue;
 __ __for (unsigned i_= 0, e_= LiveIn.size(); i!= e;_++i)
  __    if (!LiveIn[i]->isLiveIn(PhysReg))
        __LiveIn[i]->addLiveIn(PhysReg);
 ___  LiveIn.clear();
  _ }
  }
}

void VirtRegRewriter::rewrite()_{
 _SmallVector<unsigned, 8> SuperDeads;
  SmallVector<unsigned, 8> SuperDefs;
 _SmallVector<unsigned,_8> SuperKills;
#ifndef NDEBUG
_ BitVector Reserved = TRI->getReservedRegs(*MF);
#endif

  for (MachineFunction::iterator MBBI_= MF->begin(), MBBE = MF->end();
 _  ___MBBI!= MBBE; ++MBBI) {
_   DEBUG(MBBI->print(dbgs(), Indexes));
 _  for (MachineBasicBlock::instr_iterator
  _      _ MII = MBBI->instr_begin(), MIE =_MBBI->instr_end(); MII!= MIE;) {
 _ _  MachineInstr *MI =_MII;
  _ _ ++MII;

 _    for (MachineInstr::mop_iterator_MOI = MI->operands_begin(),
_     __  _MOE_=_MI->operands_end(); MOI!=_MOE; ++MOI) {
__ __   MachineOperand &MO =_*MOI;

_      _// Make sure MRI_knows_about registers clobbered by_regmasks.
    _   if (MO.isRegMask())
 _ _ _    MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());

      _ if (!MO.isReg() ||!TargetRegisterInfo::isVirtualRegister(MO.getReg()))
  _   _ __continue;
  __ _  unsigned VirtReg = MO.getReg();
 _ _    unsigned PhysReg_= VRM->getPhys(VirtReg);
  __    assert(PhysReg!= VirtRegMap::NO_PHYS_REG_&&
     _    ___  "Instruction uses unmapped_VirtReg");
     _  assert(!Reserved.test(PhysReg)_&& "Reserved register assignment");

   __   // Preserve semantics_of_sub-register operands.
    ___ if (MO.getSubReg()) {
 _     _  // A virtual register kill refers to_the whole register,_so we may
  ___     // have to add <imp-use,kill>