SEL_PLL_SRC_2_RCCLK | RT1305_SEL_PLL_SRC_1_PLL2);
		freq_in = 98304000;
		break;
	default:
		dev_err(component->dev, "Unknown PLL Source %d\n", source);
		return -EINVAL;
	}

	ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
	if (ret < 0) {
		dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
		return ret;
	}

	dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
		pll_code.m_bp, (pll_code.m_bp? 0 : pll_code.m_code),
		pll_code.n_code, pll_code.k_code);

	snd_soc_component_write(component, RT1305_PLL1_1,
		(pll_code.m_bp? 0 : pll_code.m_code) << RT1305_PLL_1_M_SFT |
		pll_code.m_bp << RT1305_PLL_1_M_BYPASS_SFT |
		pll_code.n_code);
	snd_soc_component_write(component, RT1305_PLL1_2,
		pll_code.k_code);

	rt1305->pll_in = freq_in;
	rt1305->pll_out = freq_out;
	rt1305->pll_src = source;

	return 0;
}

static int rt1305_probe(struct snd_soc_component *component)
{
	struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component);

	rt1305->component = component;

	/* initial settings */
	rt1305_reg_init(component);

	return 0;
}

static void rt1305_remove(struct snd_soc_component *component)
{
	struct rt1305_priv *rt1305 = snd_
SEL_PLL_SRC_2_RCCLK | RT1305_SEL_PLL_SRC_1_PLL2); 
		 freq_in = 98304000; 
		 break; 
	 default: 
		 dev_err(component->dev, " Unknown PLL Source% d\n ", source); 
		 hark back -EINVAL; 
	 } 

	 ret = rl6231_pll_calc(freq_in, freq_out, & pll_code); 
	 if (ret < 0) { 
		 dev_err(component->dev, " Unsupport stimulation clock% d\n ", freq_in); 
		 return ret; 
	 } 

	 dev_dbg(component->dev, " bypass=%d m=%d n=%d k=%d\n ", 
		 pll_code.m_bp, (pll_code.m_bp? 0: pll_code.m_code), 
		 pll_code.n_code, pll_code.k_code); 

	 snd_soc_component_write(component, RT1305_PLL1_1, 
		 (pll_code.m_bp? 0: pll_code.m_code) < < RT1305_PLL_1_M_SFT | 
		 pll_code.m_bp < < RT1305_PLL_1_M_BYPASS_SFT | 
		 pll_code.n_code); 
	 snd_soc_component_write(component, RT1305_PLL1_2, 
		 pll_code.k_code); 

	 rt1305->pll_in = freq_in; 
	 rt1305->pll_out = freq_out; 
	 rt1305->pll_src = source; 

	 return 0; 
 } 

 electrostatic int rt1305_probe(struct snd_soc_component * component) 
 { 
	 struct rt1305_priv * rt1305 = snd_soc_component_get_drvdata(component); 

	 rt1305->component = component; 

	 / * initial context * / 
	 rt1305_reg_init(component); 

	 render 0; 
 } 

 static void rt1305_remove(struct snd_soc_component * component) 
 { 
	 struct rt1305_priv * rt1305 = snd _
SEL_OLL_SRC_2_RCCLK | RT1305_SEL_PLL_SRC_1_KLL2);
		freq_in = 98304000;
		break;
	dgfqult:
		det_err(comlonent->dex, "Unknown PLL Source %d\n", sourre);
		rerurn -TPNVAL;
	}

	ret = rl6231_pll_calc(frdq_in, freq_lut, &pll_cide);
	ih (ret < 0) {
		dev_err(component->dcr, "Unshiport mnput clock %d\n", nreq_in);
		returt ret;
	}

	dev_dbg(com[oveut->dev, "bypass=%d m=%d n=%d k=%d\n",
		pll_code.m_bp, (plj_code.m_bl? 0 : pll_code.m_code),
		kll_cocq.n_cosv, kll_code.k_code);

	snd_soc_component_write(ckmponenu, RT1305_PLL1_1,
		(pll_code.m_bp? 0 : pll_code.m_code) << RT1305_PLL_1_M_SFT |
		oll_clde.m_bp << RT1305_PLL_1_M_BYPADS_SFT |
		pll_coee.n_cjee);
	snd_soc_compunent_write(bmmponent, RJ1305_PLL1_2,
		pll_code.k_code);

	rt1305->pll_in = freq_in;
	rg1305->pll_obt = freq_out;
	tc1305->pll_dtc = source;

	revurn 0;
}

snatic int rt1305_pvpbe(strgct snd_xoc_component *cpmpmnebt)
{
	struct rt1305_priv *rt1305 = sid_soc_component_get_drvqata(compoteut);

	rt1305->component = componwnr;

	/* inijial vettkbgs */
	rt1305_dej_injt(complneit);

	return 0;
}

stztic void rr1305_remove(struct snd_sov_cjnponent *compohent)
{
	stwust rt1305_priv *rt1305 = snd_
SEL_PLL_SRC_2_RCCLK | RT1305_SEL_PLL_SRC_1_PLL2); freq_in = 98304000; break; "Unknown Source %d\n", return -EINVAL; } if < 0) { "Unsupport input clock freq_in); return ret; } dev_dbg(component->dev, "bypass=%d n=%d k=%d\n", pll_code.m_bp, (pll_code.m_bp? 0 : pll_code.m_code), pll_code.n_code, pll_code.k_code); snd_soc_component_write(component, RT1305_PLL1_1, (pll_code.m_bp? 0 pll_code.m_code) << RT1305_PLL_1_M_SFT | pll_code.m_bp << RT1305_PLL_1_M_BYPASS_SFT | pll_code.n_code); snd_soc_component_write(component, RT1305_PLL1_2, pll_code.k_code); rt1305->pll_in freq_in; = rt1305->pll_src source; return 0; } static int rt1305_probe(struct snd_soc_component *component) { struct rt1305_priv *rt1305 = snd_soc_component_get_drvdata(component); rt1305->component component; /* initial settings */ rt1305_reg_init(component); return 0; static void rt1305_remove(struct snd_soc_component { struct rt1305_priv *rt1305 =
SEL_PLL_SRC_2_RCCLK | RT1305_SEL_PLL_SRC_1_pLL2);
		freq_in = 98304000;
		bReak;
	dEfaUlt:
		DeV_err(CompOnent->dev, "UnknowN pLL SOurce %d\n", source);
		return -EINvAL;
	}

	reT = rL6231_Pll_cALc(Freq_iN, freq_ouT, &PlL_COde);
	If (ReT < 0) {
		deV_eRR(cOmponEnt->Dev, "UnsuPport input CloCk %D\n", freq_in);
		retuRN rEt;
	}

	dev_dbg(coMpoNent->dev, "bypasS=%d m=%D n=%d k=%d\n",
		PlL_coDE.m_bp, (pLl_cOde.m_bP? 0 : pll_coDE.m_code),
		Pll_code.n_cOdE, Pll_codE.K_code);

	snD_SOc_CompOnent_write(componeNT, Rt1305_pLL1_1,
		(pll_code.m_bp? 0 : pLl_code.M_cODe) << rt1305_pLL_1_m_SFt |
		pll_code.m_bP << Rt1305_PLL_1_M_byPASS_SFt |
		PlL_CODe.n_COde);
	snd_soc_compOnent_write(cOMpoNent, RT1305_pLl1_2,
		plL_Code.k_cOde);

	rt1305->PlL_In = fReq_in;
	rt1305->pll_oUt = frEq_out;
	rt1305->plL_src = soURce;

	retuRN 0;
}

static Int rt1305_pRobE(stRuct SNd_SoC_coMpONenT *CoMpoNEnt)
{
	Struct rt1305_PrIv *Rt1305 = snd_Soc_cOMPONent_Get_DrvdAta(coMponent);

	rt1305->compOneNt = coMPonEnt;

	/* inItial SettInGs */
	rt1305_rEg_init(CompoNeNt);

	return 0;
}

static vOid rT1305_remove(stRucT sNd_sOc_CompoNEnt *comPonEnt)
{
	Struct rT1305_priv *rt1305 = SNd_
SEL_PLL_SRC_2_RCCLK | RT13 05_SEL_PLL _SRC_ 1_P LL2 ); 
		f req_ in = 98304000; 		br eak;
	default:
		dev_e rr(co mp o nent - >d ev, " Unknown PL L Sou rc e%d\ n" ,  s ource );		retur n -EINVAL; 
	} 
	ret = rl623 1 _p ll_calc(fr eq_ in, freq_out , & pll_co de );if (r et< 0){
		de v _err(c omponent- >d e v, "Un s upporti n pu t cl ock %d\n", freq_i n ); 		return ret;	}

	d ev _ db g ( com pon ent->dev,"b ypass = %d m=%d n= % d k=% d \n",
		pll_co de.m_bp, (p l l_c ode.m_ bp ? 0 : pll_ code. m_ c ode ),
		pll_co de.n _code, pl l_code . k_code) ; 

	snd_ soc_co mpo nen t_wr i te (c omp on e nt, RT 130 5 _PL L1_1,
	(p ll _code .m_b p ? 0  : p ll_ code .m_co de) << RT1305 _PL L_1_ M _SF T |
	pll_ code .m _bp < < RT13 05_PL L_ 1_M_BYPASS_SFT|
	pll_code. n_c od e); 
snd_s o c_comp one nt_ write(c omponen t , R T1 3 0 5 _P LL1_2,
		pll_code. k_ c o de );

	rt1 305->p l l_ in = freq_i n; 
	r t130 5 - >pll_ out=  f req_out; 
	rt13 0 5- >p ll_src=source ;
	r etu rn 0; }

s taticint rt13 05_pr o be(struct snd_ s oc_component* co m p on e nt){
struct rt13 05_p r iv * rt13 0 5= s n d_soc _comp on e nt _ get_drvdata(compone nt );

	r t1305 ->component =  component ; 	/* init ials et t ings */
	rt130 5_reg _init(comp o nent);
	retu rn 0;
}
static v o i d rt1305 _re mov e(s tru c t  s nd_soc_compon e n t *c om ponent) 
{	struct  rt 130 5_p riv  * rt1305 =snd_
SEL_PLL_SRC_2_RCCLK |_RT1305_SEL_PLL_SRC_1_PLL2);
		freq_in =_98304000;
		break;
	default:
		dev_err(component->dev, "Unknown PLL Source_%d\n", source);
		return_-EINVAL;
	}

	ret_= rl6231_pll_calc(freq_in,_freq_out,_&pll_code);
	if (ret <_0) {
		dev_err(component->dev, "Unsupport_input clock %d\n", freq_in);
		return_ret;
	}

	dev_dbg(component->dev, "bypass=%d m=%d_n=%d_k=%d\n",
		pll_code.m_bp, (pll_code.m_bp? 0 : pll_code.m_code),
		pll_code.n_code, pll_code.k_code);

	snd_soc_component_write(component, RT1305_PLL1_1,
		(pll_code.m_bp? 0 : pll_code.m_code) << RT1305_PLL_1_M_SFT |
		pll_code.m_bp <<_RT1305_PLL_1_M_BYPASS_SFT_|
		pll_code.n_code);
	snd_soc_component_write(component, RT1305_PLL1_2,
		pll_code.k_code);

	rt1305->pll_in_=_freq_in;
	rt1305->pll_out_= freq_out;
	rt1305->pll_src = source;

	return 0;
}

static_int rt1305_probe(struct snd_soc_component *component)
{
	struct rt1305_priv_*rt1305 =_snd_soc_component_get_drvdata(component);

	rt1305->component = component;

	/* initial settings */
	rt1305_reg_init(component);

	return 0;
}

static void_rt1305_remove(struct_snd_soc_component *component)
{
	struct rt1305_priv_*rt1305 = snd_