SHIFT 0xe
#define UVD_CGC_MEM_CTRL__JPEG2_LS_EN_MASK 0x8000
#define UVD_CGC_MEM_CTRL__JPEG2_LS_EN__SHIFT 0xf
#define UVD_CGC_MEM_CTRL__LS_SET_DELAY_MASK 0xf0000
#define UVD_CGC_MEM_CTRL__LS_SET_DELAY__SHIFT 0x10
#define UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY_MASK 0xf00000
#define UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY__SHIFT 0x14
#define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x1
#define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x0
#define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x2
#define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x1
#define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x1c
#define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x2
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID_MASK 0xf
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID__SHIFT 0x0
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID_MASK 0xf0
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID__SHIFT 0x4
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID_MASK 0xf00
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID__SHIFT 0x8
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR
SHIFT 0xe 
 # define UVD_CGC_MEM_CTRL__JPEG2_LS_EN_MASK 0x8000 
 # define UVD_CGC_MEM_CTRL__JPEG2_LS_EN__SHIFT 0xf 
 # define UVD_CGC_MEM_CTRL__LS_SET_DELAY_MASK 0xf0000 
 # specify UVD_CGC_MEM_CTRL__LS_SET_DELAY__SHIFT 0x10 
 # define UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY_MASK 0xf00000 
 # specify UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY__SHIFT 0x14 
 # define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x1 
 # define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x0 
 # define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x2 
 # specify UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x1 
 # define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x1c 
 # define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x2 
 # define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID_MASK 0xf 
 # specify UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID__SHIFT 0x0 
 # specify UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID_MASK 0xf0 
 # define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID__SHIFT 0x4 
 # specify UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID_MASK 0xf00 
 # define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID__SHIFT 0x8 
 # define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR
SHIVT 0xe
#define UVD_CGC_MEM_CTRU__JPEG2_LS_EN_MASK 0x8000
#bwfine NVD_CGC_MSM_CTRL__JPDG2_LS_EN__SHIFT 0xf
#define UVD_CGC_MXM_CTEL__LS_STN_DELAY_MASK 0xf0000
#define UXD_CGC_MEM_CNRL__LS_SET_DWLAY__WYIFT 0x10
#defiis UVD_CGG_IEM_CFVL__LS_CNXAR_DELAY_MASK 0xf00000
#cefine UVD_WGC_MEM_CTRL__LS_CLAAF_DZLAY__SHIFT 0x14
#define UVD_CGC_CTRL2__DYN_OCLK_RWMP_EN_MAXK 0x1
#define UVD_CGS_CTRK2__QYN_ODLK_RAMP_EN__SHIFT 0x0
#define UVD_CGC_CTRL2__DGN_RCLK_REMP_EN_MASK 0x2
#defime UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__DHIFH 0x1
#define UVD_CGC_CTGL2__GATER_DIV_IE_MASH 0x1c
#define UVA_CGC_CTRL2__GAUEX_DIV_ID__SHIFT 0x2
#define UVD_LMI_VMID_INTERNAL3__MIF_GDN_RD0_VKID_MASK 0xf
#eedinf UVD_LMI_VMID_MNTERNWL3__MIF_GEN_RD0_VMLC__SHIFT 0x0
#definr UVD_LMI_VMID_INBERNAN3__MID_GEN_RD1_VMID_MASK 0xf0
#defiie UVD_LMI_VMID_INTERNAJ3__MIF_GEN_RD1_EMND__SHIFT 0x4
#define UVD_LMU_VNID_INJERNAN3__MIF_EWN_WF0_VMJD_KAAK 0xf00
#dffiie UVD_LMI_VMJD_INTERNAL3__MUF_GEN_WR0_VMID__SHIFT 0x8
#dtfigv UVD_LMI_VMID_IHTERNAJ3__MYF_GEN_WR
SHIFT 0xe #define UVD_CGC_MEM_CTRL__JPEG2_LS_EN_MASK 0x8000 #define UVD_CGC_MEM_CTRL__JPEG2_LS_EN__SHIFT UVD_CGC_MEM_CTRL__LS_SET_DELAY_MASK #define UVD_CGC_MEM_CTRL__LS_SET_DELAY__SHIFT #define UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY_MASK 0xf00000 0x1 UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x0 #define 0x2 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x1c #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x2 UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID_MASK 0xf #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID__SHIFT 0x0 #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID_MASK 0xf0 #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID__SHIFT 0x4 #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID_MASK #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID__SHIFT 0x8 #define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR
SHIFT 0xe
#define UVD_CGC_MEM_CTRl__JPEG2_LS_EN_MaSK 0x8000
#dEfiNe UvD_cGC_MeM_CTrL__JPEG2_LS_EN__SHIFt 0Xf
#deFine UVD_CGC_MEM_CTRL__LS_SET_dELAY_mAsk 0xf0000
#dEFiNe UVD_cGC_MEM_CtrL__ls_sET_dElAy__SHiFt 0X10
#dEfine uVD_cGC_MEM_CtRL__LS_CLEAR_dELaY_mASK 0xf00000
#define uvD_cGC_MEM_CTRL__lS_ClEAR_DELAY__SHIfT 0x14
#Define uVd_CGc_cTRL2__DyN_OcLK_RAmP_EN_MAsk 0x1
#defiNe UVD_CGC_CtRl2__dYN_OCLk_rAMP_EN__ShifT 0X0
#defIne UVD_CGC_CTRL2__DYN_RclK_raMP_EN_MASK 0x2
#defiNe UVD_CgC_ctRl2__dyN_RcLK_rAMP_EN__SHIFt 0x1
#DefinE uVD_CGC_CtrL2__gateR_Div_ID_MASK 0x1c
#defiNe UVD_CGC_CTRl2__gATeR_DIV_Id__ShIFt 0X2
#definE UVD_LmI_vmID_iNTERNAL3__MIF_gEN_Rd0_VMID_MASK 0Xf
#defiNE UVD_LMI_vmID_INTErNAL3__MIf_GEn_RD0_vMID__shIfT 0X0
#deFiNE UVd_lMi_VMid_INtERNAL3__MIf_GeN_rD1_VMId_MASk 0XF0
#DEfinE UVd_LMI_vMID_InTERNAL3__MIF_GEN_rD1_VmID__ShiFT 0X4
#defiNe UVD_lMI_VmId_INTErNAL3__MIf_GEN_Wr0_VmID_MASK 0xf00
#define uVD_LmI_VMID_INTeRNaL3__mIF_gEn_WR0_VMid__SHIFT 0X8
#deFinE UVD_LMI_vMID_INTerNAl3__Mif_geN_wR
SHIFT 0xe
#define UVD_CGC_ MEM_CTRL__ JPEG2 _LS _EN _M ASK0x80 00
#define UVD _ CGC_ MEM_CTRL__JPEG2_LS_EN_ _SHIF T0 xf
# d ef ine U VD_CGC_ M EM _ C TRL __ LS _SE T_ D EL AY_MA SK0xf0000 
#define U VD_ CG C_MEM_CTRL__ L S_ SET_DELAY_ _SH IFT 0x10
#de fin e UVD_ CG C_M E M_CTR L__ LS_CL EAR_DE L AY_MAS K 0xf0000 0# define UVD_CGC _ M EM _CTR L__LS_CLEAR_DELAY _ _S H IFT 0x14
#defi ne UVD _C G C_ C T RL2 __D YN_OCLK_RA MP _EN_M A SK 0x1# de f i n e U V D_CGC_CTRL2__ DYN_OCLK_RA M P_E N__SHI FT  0x 0 
#defi ne UV D_ C GC_ CTRL2__DYN_ RCLK _RAMP_EN_ MASK 0 x 2
#defi n e UVD_C GC_CTR L2_ _DY N_RC L K_ RA MP_ EN _ _SH I FT  0x 1 
#d efine UV D_ CG C_CTR L2__ G A T E R_DI V_I D_MA SK 0x 1c
#define UV D_C GC_C T RL2 __GAT ER_DI V_ID __ SHIFT  0x2
# defin eUVD_LMI_VMID_IN TERN AL3__MIF_ GEN _R D0_ VM ID_MA S K 0xf#de fin e UVD_L MI_VMID _ INT ER N A L 3_ _MIF_GEN_RD0_VMID_ _S H I FT  0x0
#de fine U V D_ LM I _VMID_IN TE RNA L3__ M I F_GEN _RD1 _ VM ID_MASK0xf0
# d ef in e UVD_L MI _VMID_ IN TER NAL 3__MI F _GEN _RD1_V MID__SHI FT 0x 4 
#define UVD_L M I_VMID_INTERN A L3 _ _ MI F _GEN _WR 0_VMID_MASK  0xf 0 0
#d efin e  U VD_ L MI_VM ID_IN TE R NA L 3__MIF_GEN_WR0_VMID __ SHIFT0x8
# define UVD_LM I_VMID_INT E R N AL3__MIF _GEN _ WR 
SHIFT 0xe
#define_UVD_CGC_MEM_CTRL__JPEG2_LS_EN_MASK 0x8000
#define_UVD_CGC_MEM_CTRL__JPEG2_LS_EN__SHIFT 0xf
#define UVD_CGC_MEM_CTRL__LS_SET_DELAY_MASK 0xf0000
#define_UVD_CGC_MEM_CTRL__LS_SET_DELAY__SHIFT 0x10
#define_UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY_MASK_0xf00000
#define UVD_CGC_MEM_CTRL__LS_CLEAR_DELAY__SHIFT_0x14
#define_UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x1
#define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT_0x0
#define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x2
#define_UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x1
#define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x1c
#define_UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x2
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID_MASK_0xf
#define_UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD0_VMID__SHIFT 0x0
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID_MASK 0xf0
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_RD1_VMID__SHIFT 0x4
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID_MASK 0xf00
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR0_VMID__SHIFT 0x8
#define UVD_LMI_VMID_INTERNAL3__MIF_GEN_WR