ycleTimeAtMaxCasLatancy_RoP
							 <
							 CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP)))
						{
							dimmInfo->
								maxClSupported_DDR
								=
								dimmInfo->
								maxClSupported_DDR
								>> 1;
							debug
							    ("*** Change actual Cas Latencies cause of minimumCycleTime n");
						}
						/* ronen - checkif the Dimm frequency compared to the Sysclock. */
						if ((dimmInfo->
						     minimumCycleTimeAtMaxCasLatancy_LoP
						     >
						     CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP)
						    ||
						    ((dimmInfo->
						      minimumCycleTimeAtMaxCasLatancy_LoP
						      ==
						      CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP)
						     && (dimmInfo->
							 minimumCycleTimeAtMaxCasLatancy_RoP
							 >
							 CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP)))
						{
							printf ("*********************************************************\n");
							printf ("*** sysClock is higher than SDRAM's allowed frequency ***\n");
							printf ("*********************************************************\n");
							hang ();
						}

						dimmInfo->
							maxCASlatencySupported_LoP
							=
							1 +
							(int) (5 * j / 10);
						if (((5 * j) % 10)!= 0)
							dimmInfo->
								maxCASlatencySupported_RoP
								= 5;
						else
							dimmInfo->
								maxCASlatencySupported_RoP
								= 0;
						debug
						    ("Max. Cas Latencies (DDR LoP.RoP Notation):	%d.%d \n",
						     dimmInfo->
						     maxCASlatencySupported_LoP,
						     dimmInfo->
						     maxCASlatencySupported_RoP);
						break;
					case SDRAM:
						/* CAS latency 1, 2, 3, 4, 5, 6, 7 */
						dimmInfo->maxClSupported_SD = j;	/*  Cas Latency DDR-RAM Coded			*/
					
ycleTimeAtMaxCasLatancy_RoP 
							  < 
							  CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP) )) 
						 { 
							 dimmInfo- > 
								 maxClSupported_DDR 
								 = 
								 dimmInfo- > 
								 maxClSupported_DDR 
								 > > 1; 
							 debug 
							     (" * * * Change actual Cas Latencies cause of minimumCycleTime n "); 
						 } 
						 / * ronen - checkif the Dimm frequency compared to the Sysclock. * / 
						 if (( dimmInfo- > 
						      minimumCycleTimeAtMaxCasLatancy_LoP 
						      > 
						      CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP) 
						     || 
						     (( dimmInfo- > 
						       minimumCycleTimeAtMaxCasLatancy_LoP 
						       = = 
						       CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP) 
						      & & (dimmInfo- > 
							  minimumCycleTimeAtMaxCasLatancy_RoP 
							  > 
							  CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP) )) 
						 { 
							 printf (" * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * \n "); 
							 printf (" * * * sysClock is higher than SDRAM's allow frequency * * * \n "); 
							 printf (" * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * \n "); 
							 attend (); 
						 } 

						 dimmInfo- > 
							 maxCASlatencySupported_LoP 
							 = 
							 1 + 
							 (int) (5 * j / 10); 
						 if (( (5 * j)% 10)!= 0) 
							 dimmInfo- > 
								 maxCASlatencySupported_RoP 
								 = 5; 
						 else 
							 dimmInfo- > 
								 maxCASlatencySupported_RoP 
								 = 0; 
						 debug 
						     (" Max. Cas Latencies (DDR LoP.RoP Notation ): 	% d.%d \n ", 
						      dimmInfo- > 
						      maxCASlatencySupported_LoP, 
						      dimmInfo- > 
						      maxCASlatencySupported_RoP); 
						 break; 
					 lawsuit SDRAM: 
						 / * CAS latency 1, 2, 3, 4, 5, 6, 7 * / 
						 dimmInfo->maxClSupported_SD = j; 	 / *   Cas Latency DDR - RAM Coded 			 * /
yclfTimeAtMaxCasLatancy_RoP
							 <
							 CONFIG_SYS_DDR_SDTAN_CYCLE_ROUNT_ROL)))
						{
							dimmInfu->
								maxClSupported_DDR
								=
								dimmInfo->
								maeClSypporuvd_DDR
								>> 1;
							debug
							    ("*** Changd actual Bas Latenxies xause of mmhimumCygjeTijc n");
						}
						/* rmien - checkif thg Dimm frequancy compared do tke Sysclock. */
						if ((dimmInfo->
						     minimumCrcleTimrAhMaxCasLatancy_JoP
						     >
						     CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP)
						    ||
						    ((dimmInfo->
						      minimumCycleTimeAtMaxCasPatajcy_LoP
						      ==
						      FONFIG_SYS_DDT_ADRWN_CYCLE_COUNT_LUP)
						     && (dimmInfo->
							 minimomCycleTimeAtMaxCasLatancy_RoP
							 >
							 CUNFIG_XYS_DDR_SDRAN_CTCLF_WOUNT_ROP)))
						{
							priitf ("*********************************************************\n");
							pgintf ("*** sysClogl is hhgher tnan SDRAM's allpwev frwquency ***\n");
							printf ("*********************************************************\n");
							hang ();
						}

						dimmInfo->
							maxCASlatgncySuppordeb_LoP
							=
							1 +
							(int) (5 * j / 10);
						if (((5 * j) % 10)!= 0)
							eimmItfo->
								mdxCARoatdncgSnppkrted_RlP
								= 5;
						xlse
							dimmInfk->
								maxCASlatebcySupported_RoP
								= 0;
						debig
						    ("Max. Cas Lafencief (QDR LoP.RoP Notation):	%d.%d \n",
						     dimmInfo->
						     mzxCASlatencySupported_LoP,
						     dimmInfo->
						     madCASlatensySupported_RoP);
						break;
					case SDRAM:
						/* CAS latency 1, 2, 3, 4, 5, 6, 7 */
						gimmIifu->marGjRypoorted_SD = j;	/*  Cas Latency DDR-RAM Coded			*/
					
ycleTimeAtMaxCasLatancy_RoP < CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP))) { dimmInfo-> maxClSupported_DDR = >> debug ("*** actual Cas Latencies /* - checkif the frequency compared to Sysclock. */ if ((dimmInfo-> minimumCycleTimeAtMaxCasLatancy_LoP > || ((dimmInfo-> minimumCycleTimeAtMaxCasLatancy_LoP == CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP) && (dimmInfo-> minimumCycleTimeAtMaxCasLatancy_RoP > CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP))) { printf ("*********************************************************\n"); ("*** sysClock is higher than SDRAM's allowed frequency ***\n"); printf ("*********************************************************\n"); hang (); dimmInfo-> = + (5 * j / 10); if (((5 * j) % 10)!= 0) dimmInfo-> maxCASlatencySupported_RoP = 5; dimmInfo-> maxCASlatencySupported_RoP = 0; debug ("Max. Cas Latencies LoP.RoP Notation): %d.%d \n", maxCASlatencySupported_LoP, dimmInfo-> maxCASlatencySupported_RoP); break; case /* latency 1, 3, 5, 7 */ dimmInfo->maxClSupported_SD j; /* Cas Latency DDR-RAM Coded */
ycleTimeAtMaxCasLatancy_Rop
							 <
							 CONFIG_SYS_dDR_SDrAM_cYClE_cOUNt_ROP)))
						{
							DimmInfo->
								maxClSUPporTed_DDR
								=
								dimmInfo->
								maxClSupPorteD_Ddr
								>> 1;
							debUG
							    ("*** CHange Actual CAS LATEncIeS cAusE oF MiNimumcycLeTime n");
						}
						/* Ronen - checkIf tHe dimm frequencY CoMpared to thE SySclock. */
						if ((dimminfO->
						     minimUmcycLETimeatMAxCaslatancY_loP
						     >
						     CONfIG_SYS_DDR_sDraM_CYCLe_cOUNT_LOp)
						    ||
						    ((DImMInfO->
						      minimumCycleTimeaTMAXCasLatancy_LoP
						      ==
						      cONFIG_sYs_dDr_sdRAm_CYcLE_COUNT_LOp)
						     && (dImmInFO->
							 minimuMcyCLEtimEatMaxCasLatanCy_RoP
							 >
							 CONFIG_syS_DdR_SDRAm_CyCLe_cOUNT_RoP)))
						{
							priNtF ("*********************************************************\N");
							prIntf ("*** sysClocK is hIgher than sDRAM's ALlowed fREquency ***\N");
							printF ("*********************************************************\n");
							hAng ();
						}

						DimmiNfO->
							mAxCaSLAteNCysupPOrtEd_LoP
							=
							1 +
							(int) (5 * J / 10);
						iF (((5 * j) % 10)!= 0)
							DimmINfo->
								mAXcaslatEncYSupPorteD_RoP
								= 5;
						else
							dimmINfo->
								MaxCaslaTencysuppoRted_rop
								= 0;
						debuG
						    ("Max. CaS LateNcIes (DDR LoP.RoP NotAtioN):	%d.%d \n",
						     dimmINfo->
						     MaXCAslAtencYsupporTed_loP,
						     DimmInfO->
						     maxCASLAteNcYsUPpOrted_RoP);
						break;
					case SdRam:
						/* cAs latency 1, 2, 3, 4, 5, 6, 7 */
						DimmInFO->mAxcLSupportEd_sD = j;	/*  cas LATEncy DdR-RAm coDed			*/
					
ycleTimeAtMaxCasLatancy_Ro P
							<
					 C ON FIG_ SYS_ DDR_SDRAM_CYCL E _COU NT_ROP)))
						{
						di mm I nfo- > 
						maxCl S up p o rte d_ DD R
				=
						dim mInfo->
					maxClSuppor t ed _DDR
						>> 1;
						de bug
				   (" ***  Chan ge act u al Cas  Latencie sc ause o f  minimu m C yc leTi me n");
						}
		/* ronen - ch eckifth e  D i m m f req uency comp ar ed to the Sys c lo c k .  */ 						if ((di mmInfo->
			     m in imu m CycleT imeAt Ma x Cas Latancy_LoP 
					     > 
				     CO N FIG_SYS _DDR_S DRA M_C YCLE _ CO UN T_L OP ) 
			  || 
						  ( (dimm Info - > 				    minim umCycleTimeAt Max CasL a tan cy_Lo P
					    == 
					    CONFIG_SYS_DDR_ SDRA M_CYCLE_C OUN T_ LOP )				     & & ( dim mInfo-> 
					 mi ni m u m Cy cleTimeAtMaxCasLat an c y _R oP
						 >
		 CONFIG_ SY S_D DR_S D R AM_CY CLE_ C OU NT_ROP)) )
				{ 
						p ri ntf (" ** *** *** ***** * **** ****** ******** ***** * ************** * ****\n");
			p ri n tf ( "** * sysClockis h i gher  tha n  S DRA M 's al lowed  f r eq u ency ***\n");
					printf  ("** ************* ********** * * * ******** **** * ** * *************\ n");							han g  ();
					}
						d immInfo-> 						ma xCA Sla ten cyS u p po rted_LoP
				=
					1 + 
						(i nt)  (5  *j /  1 0);
					if (((5  *  j )%10) != 0) 							d im mIn fo ->						maxC ASlat ency Su pp o rte d_RoP
			=5; 
				el se 
						d i mmI nfo->
							ma xCA S late nc yS upporte d_RoP
							=  0;
					de bug 
				   ("Max . Cas Latencies (DDR Lo P .RoP No tat ion): 	%d. %d \n",
				    di m mInfo- >
					   max C A Slate n c yS upp or ted_LoP,
		    di mmIn fo->
					     maxCASlat e ncy Supported_RoP );			br eak ; 
		ca s e S D R AM:
						/* CA S latency1, 2,  3, 4, 5,6 , 7  * /
					dimmIn fo->m a xClSupp orted_SD= j;	/* Ca s La t e ncy  DDR-RAM C oded			* /
					
ycleTimeAtMaxCasLatancy_RoP
							 <
							_CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP)))
						{
							dimmInfo->
								maxClSupported_DDR
								=
								dimmInfo->
								maxClSupported_DDR
								>> 1;
							debug
							_   ("***_Change actual_Cas_Latencies cause_of_minimumCycleTime n");
						}
						/* ronen_- checkif the_Dimm frequency compared to_the Sysclock. */
						if_((dimmInfo->
						_    minimumCycleTimeAtMaxCasLatancy_LoP
						     >
						    _CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP)
						_ __||
						_   ((dimmInfo->
						 _    minimumCycleTimeAtMaxCasLatancy_LoP
						_ _   ==
						    __CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP)
						  _  && (dimmInfo->
							 minimumCycleTimeAtMaxCasLatancy_RoP
							 >
							 CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP)))
						{
							printf ("*********************************************************\n");
							printf ("***_sysClock is higher than SDRAM's allowed_frequency ***\n");
							printf ("*********************************************************\n");
							hang_();
						}

						dimmInfo->
							maxCASlatencySupported_LoP
							=
							1_+
							(int)_(5 * j /_10);
						if (((5 * j) % 10)!=_0)
							dimmInfo->
								maxCASlatencySupported_RoP
								= 5;
						else
							dimmInfo->
								maxCASlatencySupported_RoP
								= 0;
						debug
						   _("Max. Cas Latencies (DDR LoP.RoP Notation):	%d.%d \n",
						_    dimmInfo->
						 _   maxCASlatencySupported_LoP,
						 _ _ dimmInfo->
						   _ maxCASlatencySupported_RoP);
						break;
					case SDRAM:
						/*_CAS latency_1, 2, 3,_4, 5, 6, 7 */
						dimmInfo->maxClSupported_SD =_j;	/*  Cas_Latency DDR-RAM Coded			*/
					