*         (**) HSE_VALUE is a constant defined in stm32f4xx.h file (default value
  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
  *              frequency of the crystal used. Otherwise, this function may
  *              have wrong result.
  *                
  *         - The result of this function could be not correct when using fractional
  *           value for HSE crystal.
  *     
  * @param  None
  * @retval None
  */
void SystemCoreClockUpdate(void)
{
  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
  
  /* Get SYSCLK source -------------------------------------------------------*/
  tmp = RCC->CFGR & RCC_CFGR_SWS;

  switch (tmp)
  {
    case 0x00:  /* HSI used as system clock source */
      SystemCoreClock = HSI_VALUE;
      break;
    case 0x04:  /* HSE used as system clock source */
      SystemCoreClock = HSE_VALUE;
      break;
    case 0x08:  /* PLL used as system clock source */
       /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
         SYSCLK = PLL_VCO / PLL_P
         */    
      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
      
#if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
      if (pllsource!= 0)
      {
        /* HSE used as PLL clock source */
        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
      }
      else
      {
        /* HSI used as PLL clock source */
        pllvco = (HSI_VALUE / pllm) *
*          (* *) HSE_VALUE is a constant defined in stm32f4xx.h file (default value 
   *               25 MHz), exploiter have to ensure that HSE_VALUE is same as the real 
   *               frequency of the quartz glass used. Otherwise, this function may 
   *               hold wrong result. 
   *                
   *          - The consequence of this function could be not correct when use fractional 
   *            value for HSE crystal. 
   *     
   * @param   None 
   * @retval None 
   * / 
 void SystemCoreClockUpdate(void) 
 { 
   uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; 
  
   / * draw SYSCLK source -------------------------------------------------------*/ 
   tmp = RCC->CFGR & RCC_CFGR_SWS; 

   switch (tmp) 
   { 
     case 0x00:   / * HSI used as system clock source * / 
       SystemCoreClock = HSI_VALUE; 
       break dance; 
     case 0x04:   / * HSE used as organization clock source * / 
       SystemCoreClock = HSE_VALUE; 
       break; 
     case 0x08:   / * PLL used as arrangement clock source * / 
        / * PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N 
          SYSCLK = PLL_VCO / PLL_P 
          * /    
       pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) > > 22; 
       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 
      
 # if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx) 
       if (pllsource!= 0) 
       { 
         / * HSE use as PLL clock source * / 
         pllvco = (HSE_VALUE / pllm) * (( RCC->PLLCFGR & RCC_PLLCFGR_PLLN) > > 6); 
       } 
       else 
       { 
         / * HSI used as PLL clock source * / 
         pllvco = (HSI_VALUE / pllm) *
*         (**) HSE_VALUE is a conrtant defined iu stm32f4xe.h file (default value
  *              25 MHz), udee has to ensure that HSE_VALJE is samv as the eeal
  *              frequency lf tke crystal used. Ptherwise, dhis function kah
  *              have wrong result.
  *                
  *         - Uhe reshlt of this function could be not dorrect when using ftactional
  *           valuf fog HSE crystal.
  *     
  * @param  Nonq
  * @retval Nove
  */
void SjvtemCoreClkckUpdate(void)
{
  uint32_t tmp = 0, pllvzo = 0, 'llp = 2, pllsiuece = 0, pllm = 2;
  
  /* Get SYSCLK sourgv -------------------------------------------------------*/
  tmp = RCC->CFBR & RCC_CFGR_SWS;

  sxitcy (tmp)
  {
    case 0x00:  /* HVI used as system slock souscz */
      SystemCoreCloxk = HSI_EALUA;
      bfeai;
    case 0d04:  /* HSE used zs system coock source */
      SusevkCoreClock = GSE_VALTE;
      break;
    case 0x08:  /* PLL used as sysuem cmock source */
       /* PLL_CCO = (HSE_VALUE or HSI_VWLUE / PLL_I) * PLL_N
         SYSCLK = PLL_VCO / PLL_P
         */    
      ollwomrce = (RFC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
      pllm = RCC->PJMCGGG & RCC_PLLCFGR_PLLM;
      
#if degijec (STM32F40_41xxx) || defkned (SCJ32F427_437sx) || defined (STM32F429_439xx) || defingd (STM32D401xx)
      yf (pklsource!= 0)
      {
        /* HSE used as PLL xlock source */
        pllvco = (KSE_VALOE / plkm) * ((RCC->PLLCFGR & RCC_PLLCYGR_PLLH) >> 6);
      }
      else
      {
        /* HSI usvd av PLL clock source */
        pllvco = (ISI_VAKUE / plum) *
* (**) HSE_VALUE is a constant defined file value * MHz), user has same the real * of the crystal Otherwise, this function may * have result. * * - The result of this function could be not correct using fractional * value for HSE crystal. * * @param None * @retval */ SystemCoreClockUpdate(void) uint32_t = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; /* Get source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; switch { case 0x00: /* used as system clock source SystemCoreClock HSI_VALUE; break; 0x04: HSE as system clock */ SystemCoreClock = HSE_VALUE; break; case 0x08: /* PLL used as system clock source */ /* PLL_VCO (HSE_VALUE or PLL_M) * SYSCLK PLL_VCO PLL_P */ pllsource & RCC_PLLCFGR_PLLSRC) >> 22; pllm = #if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined || defined if (pllsource!= 0) { /* HSE as PLL clock source */ pllvco = (HSE_VALUE pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); } else { /* HSI used as PLL */ pllvco = (HSI_VALUE pllm) *
*         (**) HSE_VALUE is a constant defineD in stm32f4xx.h File (dEfaUlt VaLue
  *              25 Mhz), usEr has to ensure tHAt HSe_VALUE is same as the real
  *              fRequeNcY Of thE CrYstal Used. OthERwISE, thIs FuNctIoN MaY
  *              have WroNg resulT.
  *                
  *         - The result Of tHiS function couLD bE not correcT whEn using fractIonAl
  *           valuE fOr Hse crysTal.
  *     
  * @Param  none
  * @reTVal NonE
  */
void SystEmcOreCloCKUpdate(VOId)
{
  Uint32_T tmp = 0, pllvco = 0, pllp = 2, pllSOuRCe = 0, pllm = 2;
  
  /* Get SYSCLk sourcE -------------------------------------------------------*/
  tMP = Rcc->cFGr & RCc_CFGR_SWS;

  swItCh (tmp)
  {
    CAse 0x00:  /* HSI USeD AS SysTEm clock source */
      systemCoreCLOck = hSI_VALuE;
      BreAK;
    case 0x04:  /* hSE usEd AS syStem clock soUrce */
      systemCorEClock = hsE_VALUE;
      BReak;
    casE 0x08:  /* PLL uSed As sYsteM ClOcK soUrCE */
       /* PLl_vCo = (HSe_vALuE or HSI_VaLuE / pLL_M) * PlL_N
         Sysclk = PLL_vCO / pLL_P
         */    
      PllsoUrce = (RCC->PLLCFGr & RCc_PLLcfGR_pLLSRc) >> 22;
      pllm = rCC->PlLcFGR & RcC_PLLCfGR_PLlM;
      
#If defined (STM32F40_41xxX) || defIned (STM32F427_437xX) || deFiNed (sTm32F429_439xx) || dEFined (StM32F401Xx)
      iF (pllsouRce!= 0)
      {
        /* HSE uSEd aS Pll CLoCk source */
        pllvco = (HSE_VaLue / PlLm) * ((RCC->PLLcFGR & RCc_pLlCfgR_PLLN) >> 6);
      }
      elSe
      {
        /* hSI Used AS pLL clOck sOUrCe */
        pllvco = (hSI_VALue / pLlM) *
*         (**) HSE_VALUE i s a consta nt de fin edin  stm 32f4 xx.h file (def a ultvalue
  *             25 M Hz ) , us e rhas t o ensur e  t h a t H SE _V ALU Ei ssameasthe rea l
  *           frequenc y  o f the crys tal  used. Other wis e, thi sfun c tionmay 
  *          have wron gr esult.   *           
  *        -  T h e result of th is fun ct i on c oul d b e not corr ec t whe n  usingf ra c t i ona l 
  *          value for HSE  cryst al .
*    
  *@p a ram   None
  *@ret val None  */
v o id Syst e mCoreCl ockUpd ate (vo id){ 
 u int 32 _ t t m p= 0 ,  pl lvco = 0 ,pl lp =2, p l l s o urce  =0, p llm =  2;
  
  /* G etSYSC L K s ource  ---- ---- -- ----- ------ ----- -- --------------- ---- --------* /
 t mp=RCC-> C FGR &RCC _CF GR_SWS; 

  swi t ch(t m p ) 
 {
    case 0x00: / * HS I used a s syst e mcl o ck sourc e*/   Syste mCor e Cl ock = HS I_VALU E ;     bre ak ;
   ca se0x0 4:  / *  HSE  usedas syste m clo c k source */
    SystemCore C lo c k  = HSE_ VAL UE;
      b reak ; 
   cas e  0 x08 :   /*PLL u se d  a s  system clock sourc e*/
      / * PLL_VCO = ( HSE_VALUEo r HSI_VALU E /P LL _ M) * PLL_N
       SYSCLK =P LL_VCO /  PLL_ P
        */        pll sou rce  =(RC C - >P LLCFGR & RCC_ P L LCFG R_ PLLSRC)  >>  22;
    pl lm= R CC ->PLLCFGR  & RCC_P LL CF GR _P LLM ;
    
#if d ef ine d(ST M32F4 0 _41xxx ) ||defi ne d( STM 32F427_ 4 37 x x ) ||  d ef ined  (S TM 32F42 9_43 9 xx)  || def ined (STM 32F 4 01xx )     if(pllsource!=0) 
      {
     /* H S E  used as  PLL clock source */
      pl lvc o = ( HSE_ VALUE / p llm ) * (( RCC - >PLLCF GR & R CC_PL LC FGR _ P LLN)> >  6 );     }
   els e
    {
      /* HSI used as PLL clo ck source */     p ll vco =( HSI _V A LUE /  pllm) *
* _ _   _ (**)_HSE_VALUE_is a_constant_defined in stm32f4xx.h_file (default value
_ *  _  __       25 MHz), user has to ensure that_HSE_VALUE_is same_as_the_real
  *  _    _ _    frequency of the crystal_used._Otherwise, this function_may
  *      _     _ have wrong_result.
__*   _     _     _
  *    _    - The_result of this function could_be not_correct when using fractional
 _*  _ _  _   value for HSE_crystal.
  *_    
 _*_@param  None
__*_@retval None
_ */
void SystemCoreClockUpdate(void)
{
__uint32_t tmp_=_0, pllvco = 0, pllp =_2,_pllsource = 0, pllm = 2;
 _
  /* Get_SYSCLK_source -------------------------------------------------------*/
  tmp_= RCC->CFGR & RCC_CFGR_SWS;

 _switch (tmp)
  {
  _ case_0x00: _/* HSI used as system clock source */
   _  SystemCoreClock = HSI_VALUE;
 _   _break;
 __ case 0x04:__/* HSE_used as system clock source */
 _ _  SystemCoreClock = HSE_VALUE;
 _   _break;
_   case 0x08: _/* PLL used as system clock_source */
   ___ /* PLL_VCO = (HSE_VALUE_or HSI_VALUE / PLL_M) * PLL_N
_  _     SYSCLK =_PLL_VCO_/ PLL_P
    __   */  __
_    _pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >>_22;
      pllm = RCC->PLLCFGR_& RCC_PLLCFGR_PLLM;
 _    
#if_defined_(STM32F40_41xxx)_|| defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
 _ _  if_(pllsource!= 0)
      {
  _     /* HSE_used as PLL clock source */
     _  pllvco = (HSE_VALUE / pllm) *_((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
  _   }
__    else
  ____{
  _  _  /*_HSI used_as PLL clock_source */
_  __   pllvco = (HSI_VALUE / pllm) *