x300
#define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8
#define UVD_LMI_SWAP_CNTL__CM_MC_SWAP_MASK 0xc00
#define UVD_LMI_SWAP_CNTL__CM_MC_SWAP__SHIFT 0xa
#define UVD_LMI_SWAP_CNTL__IT_MC_SWAP_MASK 0x3000
#define UVD_LMI_SWAP_CNTL__IT_MC_SWAP__SHIFT 0xc
#define UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP_MASK 0xc000
#define UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP__SHIFT 0xe
#define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP_MASK 0x30000
#define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP__SHIFT 0x10
#define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP_MASK 0xc0000
#define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP__SHIFT 0x12
#define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP_MASK 0xc00000
#define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP__SHIFT 0x16
#define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP_MASK 0x3000000
#define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP__SHIFT 0x18
#define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP_MASK 0xc000000
#define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP__SHIFT 0x1a
#define UVD_LMI_SWAP_CNTL__RE_MC_SWAP_MASK 0x30000000
#define UVD_LMI_SWAP_CNTL__RE
x300 
 # define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8 
 # define UVD_LMI_SWAP_CNTL__CM_MC_SWAP_MASK 0xc00 
 # define UVD_LMI_SWAP_CNTL__CM_MC_SWAP__SHIFT 0xa 
 # define UVD_LMI_SWAP_CNTL__IT_MC_SWAP_MASK 0x3000 
 # specify UVD_LMI_SWAP_CNTL__IT_MC_SWAP__SHIFT 0xc 
 # define UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP_MASK 0xc000 
 # specify UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP__SHIFT 0xe 
 # define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP_MASK 0x30000 
 # define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP__SHIFT 0x10 
 # define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP_MASK 0xc0000 
 # specify UVD_LMI_SWAP_CNTL__CSM_MC_SWAP__SHIFT 0x12 
 # define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP_MASK 0xc00000 
 # define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP__SHIFT 0x16 
 # define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP_MASK 0x3000000 
 # specify UVD_LMI_SWAP_CNTL__DBW_MC_SWAP__SHIFT 0x18 
 # specify UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP_MASK 0xc000000 
 # define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP__SHIFT 0x1a 
 # specify UVD_LMI_SWAP_CNTL__RE_MC_SWAP_MASK 0x30000000 
 # define UVD_LMI_SWAP_CNTL__RE
x300
#devine UVD_LMI_SWAP_CNTL__VCPU_W_OC_SWAP__SHIFT 0x8
#deyune UVV_LMI_SWAL_CNTL__CM_MZ_SWAP_MASK 0xc00
#define UVD_LMI_SWA'_CNTO__CM_MC_WWAP__SHIFT 0xa
#define UVD_UMI_SWAP_CNNL__IT_MC_SWAP_MASJ 0x3000
#define UTS_LMI_SWAI_ENTL__IF_LC_SWCP__WHIFT 0xc
#define UVD_LMI_SWA[_CNTL__DB_R_MC_SWAP_KARK 0xc000
#define UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP__SHYFT 0xe
#drflne UVD_LMI_SWAP_SNTL__CF_W_MC_AWAP_MASK 0x30000
#define UVD_LMI_SWAP_CNTL__DB_W_JC_SWAP__SIIFT 0x10
#define UVC_LMI_SWAP_CNTL__CSM_MC_SWAP_MASK 0dc0000
#devine UVD_LMI_SWAP_CNTP__CSM_MC_SWAP__SYIFT 0z12
#define UVD_LOI_SWAP_CNTL__MP_REF16_MC_SWAP_MZSK 0xc00000
#define UVD_LMI_SWAP_CNTL__MP_REW16_MC_SWCP__SHIFT 0x16
#dedibe KED_LMI_SWAP_CNVL__DBW_MB_SWAP_MASK 0x3000000
#denpne UVD_NMI_SWAP_VNTL__DBW_MC_SWAP__SMIFT 0e18
#defune UVD_LMI_SWAP_CNTL__RB_WC_MC_SWAP_MASK 0xc000000
#define UVD_LMI_SWDP_ENTL__RB_WR_MC_SWAP__SHIFT 0x1q
#dwfine UVD_NMI_SDQP_CVTL__DE_KC_AWAP_MADK 0e30000000
#define UVD_MMI_SWAP_CNTL__EE
x300 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8 #define UVD_LMI_SWAP_CNTL__CM_MC_SWAP_MASK 0xc00 0xa UVD_LMI_SWAP_CNTL__IT_MC_SWAP_MASK 0x3000 UVD_LMI_SWAP_CNTL__IT_MC_SWAP__SHIFT 0xc #define #define 0x30000 #define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP__SHIFT #define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP_MASK 0xc0000 UVD_LMI_SWAP_CNTL__CSM_MC_SWAP__SHIFT 0x12 #define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP_MASK 0xc00000 #define 0x16 #define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP_MASK 0x3000000 #define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP__SHIFT 0x18 #define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP_MASK 0xc000000 #define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP__SHIFT 0x1a UVD_LMI_SWAP_CNTL__RE_MC_SWAP_MASK 0x30000000 #define UVD_LMI_SWAP_CNTL__RE
x300
#define UVD_LMI_SWAP_CNTL__VCPU_w_MC_SWAP__SHIfT 0x8
#deFinE UVd_LmI_SWaP_CNtL__CM_MC_SWAP_MASK 0XC00
#defIne UVD_LMI_SWAP_CNTL__CM_MC_SwAP__SHiFt 0Xa
#deFInE UVD_LmI_SWAP_CntL__it_mC_SwAp_MaSK 0X3000
#dEFiNe UVD_lMI_sWAP_CNTl__IT_MC_SWAP__ShIFt 0xC
#define UVD_LMi_sWaP_CNTL__DB_R_Mc_SWaP_MASK 0xc000
#defiNe UvD_LMI_SwAp_CNtl__DB_R_Mc_SWaP__SHIfT 0xe
#deFIne UVD_lMI_SWAP_CNtL__db_W_MC_SWap_MASK 0x30000
#dEFInE UVD_lMI_SWAP_CNTL__DB_W_MC_SwaP__shIFT 0x10
#define UVD_lMI_SWAp_CntL__csm_MC_sWAp_MASK 0xc0000
#defInE UVD_Lmi_SWAP_CNtl__Csm_mc_SWap__SHIFT 0x12
#define uVD_LMI_SWAP_CntL__Mp_REF16_MC_sWaP_MasK 0xc00000
#deFine UvD_lmI_SwAP_CNTL__MP_REf16_MC_SwAP__SHIFT 0x16
#Define uvD_LMI_SWap_CNTL__DBw_MC_SWAp_MAsK 0x3000000
#DefiNE UvD_lMI_sWap_CNtl__DbW_Mc_sWAp__SHIFT 0x18
#dEfInE UVD_LmI_SWap_cntL__RB_wR_Mc_SWAp_MASK 0Xc000000
#define UVD_LMi_SWaP_CNtl__RB_wR_MC_SwAP__SHiFT 0x1A
#dEfine uVD_LMI_sWAP_CnTl__RE_MC_SWAP_MASK 0x30000000
#dEfinE UVD_LMI_SWaP_CnTl__RE
x300
#define UVD_LMI_SWAP_ CNTL__VCPU _W_MC _SW AP_ _S HIFT  0x8 
#define UVD_L M I_SW AP_CNTL__CM_MC_SWAP_MA SK 0x c0 0 
#de f in e UVD _LMI_SW A P_ C N TL_ _C M_ MC_ SW A P_ _SHIF T 0 xa
#def ine UVD_LM I_S WA P_CNTL__IT_M C _S WAP_MASK 0 x30 00
#define U VD_ LMI_SW AP _CN T L__IT _MC _SWAP __SHIF T  0xc
# define UV D_ L MI_SWA P _CNTL__ D B _R _MC_ SWAP_MASK 0xc000# de f ine UVD_LMI_SW AP_CNT L_ _ DB _ R _MC _SW AP__SHIFT0x e
#de f ine UVD _ LM I _ S WAP _ CNTL__DB_W_MC _SWAP_MASK0 x30 000
#d ef ine UVD_LM I_SWA P_ C NTL __DB_W_MC_S WAP_ _SHIFT 0x 10
#de f ine UVD _ LMI_SWA P_CNTL __C SM_ MC_S W AP _M ASK  0 x c00 0 0#de f ine  UVD_LMI _S WA P_CNT L__C S M _ M C_SW AP_ _SHI FT 0x 12
#define UV D_L MI_S W AP_ CNTL_ _MP_R EF16 _M C_SWA P_MASK  0xc0 00 00
#define UVD_ LMI_ SWAP_CNTL __M P_ REF 16 _MC_S W AP__SH IFT  0x 16
#def ine UVD _ LMI _S W A P _C NTL__DBW_MC_SWAP_M AS K 0x 3000000#defin e  U VD _ LMI_SWAP _C NTL __DB W _ MC_SW AP__ S HI FT 0x18#defin e  U VD _LMI_SW AP _CNTL_ _R B_W R_M C_SWA P _MAS K 0xc0 00000
#d efine UVD_LMI_SWAP_C N TL__RB_WR_MC_ S WA P _ _S H IFT0x1 a
#define U VD_L M I_SW AP_C N TL __R E _MC_S WAP_M AS K  0 x 30000000
#define UV D_ LMI_SW AP_CN TL__RE
x300
#define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT_0x8
#define UVD_LMI_SWAP_CNTL__CM_MC_SWAP_MASK_0xc00
#define UVD_LMI_SWAP_CNTL__CM_MC_SWAP__SHIFT 0xa
#define UVD_LMI_SWAP_CNTL__IT_MC_SWAP_MASK_0x3000
#define UVD_LMI_SWAP_CNTL__IT_MC_SWAP__SHIFT_0xc
#define_UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP_MASK 0xc000
#define_UVD_LMI_SWAP_CNTL__DB_R_MC_SWAP__SHIFT_0xe
#define UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP_MASK 0x30000
#define_UVD_LMI_SWAP_CNTL__DB_W_MC_SWAP__SHIFT 0x10
#define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP_MASK_0xc0000
#define UVD_LMI_SWAP_CNTL__CSM_MC_SWAP__SHIFT 0x12
#define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP_MASK_0xc00000
#define UVD_LMI_SWAP_CNTL__MP_REF16_MC_SWAP__SHIFT 0x16
#define_UVD_LMI_SWAP_CNTL__DBW_MC_SWAP_MASK_0x3000000
#define UVD_LMI_SWAP_CNTL__DBW_MC_SWAP__SHIFT 0x18
#define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP_MASK 0xc000000
#define UVD_LMI_SWAP_CNTL__RB_WR_MC_SWAP__SHIFT 0x1a
#define UVD_LMI_SWAP_CNTL__RE_MC_SWAP_MASK 0x30000000
#define UVD_LMI_SWAP_CNTL__RE