<http://schema.org/description>
"...2-15 yrs experience in Physical Design Execution\nShould have good exposure to high frequency design convergence and descent exposure to physical design methodology\nMasters/Bachelors Degree in Electrical/Electronics science engineering with at least 5+ years of experience in IC design Experience in leading block level or chip level Timing closure &amp; Physical Design activities.\nWork independently in the areas of RTL to GDSII implementation Ability to collaborate and resolve issues wrt constraints..."^^<http://www.w3.org/2001/XMLSchema#string>
<https://tapwage.com/company/qualcomm/perl/jobs>