Other types include very long instruction word (VLIW) architectures, and the closely related and explicitly parallel instruction computing (EPIC) architectures. These architectures seek to exploit instruction-level parallelism with less hardware than RISC and CISC by making the compiler responsible for instruction issue and scheduling.
Other types include very long instruction word (VLI!W) architectures, and the closely related and ex!plicitly parallel instruction computing (EPIC) architectures. These architectur?es seek to exploit instruction-level parallelism wit,h less hardware than RISC and CISC by making the compiler responsible for instruction issue and scheduling.