EIS instructions longer than one word are two-word to four-word instructions depending on the specific instruction. The addresses point either to operands or to operand descriptors, which contain the actual operand address and additional information. The format of those instructions is: 1 1 2 2 2 3 word 0 7 8 7 8 9 5 +------------------+----------+-+------+ 0 | Variable field | OP |I| MF1 | +------------------+----------+-+------+ 1 |Operand descriptor 1 or indirect word | +--------------------------------------+ 2 .Operand descriptor 2 or indirect word . (optional) +- - - - - - - - - - - - - - - - - - - + 3 .Operand descriptor 3 or indirect word . (optional) +- - - - - - - - - - - - - - - - - - - + Variable field contains information relating to the specific instruction (18 bits). OP is the EIS opcode (10 bits). I is the interrupt inhibit bit. MF1 describes the address modification to be performed for descriptor 1 (6 bits). If operands 2 and 3 are present the variable field contains MF2 and MF3.
EIS instructions longer than one word are two-word to four-word instructions depending on the specific instruction. The addresses point either to operands or to operand descriptors, which contain the actual operand address and additional information. The format of those instructions is: 1 1 2 2 2 3 word 0 7 8 7 8 9 5 +------------------+----------+-+------+ 0 | Variable field | OP |I| MF1 | +------------------+----------+-+------+ 1 |Operand descriptor 1 or indirect word | +--------------------------------------+ 2 Operand descriptor 2 or indirect word . (optional) +- - - - - - - - - - - - - - - - - - - + 3 .Operand descriptor 3 or indirect word . (optional) +- - - - - - - - - - - - - - - - - - - + Variable field contains information relating to the specific instruction (18 bits). OP is the EIS opcode (10 bits). I is the interrupt inhibit bit. MF1 describes the address modification to be performed for descriptor 1 (6 bits). If operands 2 and 3 are present the variable field contains MF2 and MF3.