13. A distributed function programmable digital information processing system comprising: a. a plurality of processing elements including: (1) one or more input and output devices for providing information transfer to and from the system, (2) a plurality of data processors for performing data transformations on data received from other said processing elements in response to system control logic signals received from control processors and for providing output data to said output devices, said data processors each including one or more system control logic signal receivers for receiving, interpreting, responding to, and initiating data transformations in response to said system control logic signals received, and (3) a plurality of control processors for controlling said data processors and other said control processors by means of system control logic signals, said control processors each including one or more system control logic signal transmitters for generating, transmitting and receiving responses to said system control logic signals, and at least one of said control processors also including at least one system control logic signal receiver for receiving, interpreting, responding to, and initiating other said system control logic signals, and at least one of said control processors also including state defined control circuitry permitting said control processor to assume, in turn, two or more different states whereby the function performed by said control processor depends in part on its state to constitute the condition of state defined control; and b. electrical conductors interconnecting said processing elements including: (1) a plurality of dedicated system control logic signal conductor sets with each set interconnecting one said system control logic signal transmitter of one said processing element and one said system control logic receiver of another said processing element, to constitute one control arc interconnecting two processing elements, and (2) data lines interconnecting said processing elements and interconnecting said input and output devices with said processing elements, whereby all said processing elements in the system are connected to one or more other processing elements by said data lines, said dedicated control signal conductors or both and wherein said input and output devices are connected to said data processors or control processors only by said data lines; and wherein the number of said control arcs is equal to or greater than the total number of control and data processors and the control arcs interconnecting two or more processing elements describe a loop.
13. A distributed function programmable digital information processing system comprising: a. a plurality of processing elements including: (1) one or more input and output devices for providing information transfer to and from the system, (2) a plurality of data processors for performing data transformations on data received from other said processing elements in response to system control logic signals received from control processors and for providing output data to said output devices, said data processors each including one or more system control logic signal receivers for receiving, interpreting, responding to, and initiating data transformations in response to said system control logic signals received, and (3) a plurality of control processors for controlling said data processors and other said control processors by means of system control logic signals, said control processors each including one or more system control logic signal transmitters for generating, transmitting and receiving responses to said system control logic signals, and at least one of said control processors also including at least one system control logic signal receiver for receiving, interpreting, responding to, and initiating other said system control logic signals, and at least one of said control processors also including state defined control circuitry permitting said control processor to assume, in turn, two or more different states whereby the function performed by said control processor depends in part on its state to constitute the condition of state defined control; and b. electrical conductors interconnecting said processing elements including: (1) a plurality of dedicated system control logic signal conductor sets with each set interconnecting one said system control logic signal transmitter of one said processing element and one said system control logic receiver of another said processing element, to constitute one control arc interconnecting two processing elements, and (2) data lines interconnecting said processing elements and interconnecting said input and output devices with said processing elements, whereby all said processing elements in the system are connected to one or more other processing elements by said data lines, said dedicated control signal conductors or both and wherein said input and output devices are connected to said data processors or control processors only by said data lines; and wherein the number of said control arcs is equal to or greater than the total number of control and data processors and the control arcs interconnecting two or more processing elements describe a loop. 14. The distributed function programmable digital information processing system of claim 13 wherein: a. two or more control processors each include at least one system control logic signal receiver and are so interconnected by their control arcs and with at least one other processing element so that those processing elements along with their interconnecting control arcs describe a loop including three or more processing elements; and b. two or more control processors have state defined control of which at least one is one of said control processors forming said loop described by three or more processing elements and their interconnecting control arcs.