8. Apparatus for forming a binary superimposed code word for a record containing alphanumeric units of information, comprising: a generator circuit for forming a width b, weight K code word for each of said units of information; a register for storing a b bit binary word; means operable for logically OR'ing the contents of said register with one of said code words on a bit-by-bit basis and for storing the resulting word in said register; and means for sequentially operating said OR'ing means in response to the generation of each of said code words.
8. Apparatus for forming a binary superimposed code word for a record containing alphanumeric units of information, comprising: a generator circuit for forming a width b, weight K code word for each of said units of information; a register for storing a b bit binary word; means operable for logically OR'ing the contents of said register with one of said code words on a bit-by-bit basis and for storing the resulting word in said register; and means for sequentially operating said OR'ing means in response to the generation of each of said code words. 9. The invention defined in claim 8 wherein said generator circuit includes: (a) a hash coder for transforming alphanumeric units of information to an m-bit binary code; (b) a pseudo-random number generator for generating a particular number sequence in response to the value of said m-bit binary code; and (c) a memory circuit for storing the first K different numbers in said number sequence.