1. A method comprising: receiving a code sequence from an input interface including a processor, along with a hardware resource count specifying a number of hardware resources that are to be allocated for the code sequence, in a high-level language program; generating hardware acceleration logic for implementing the code sequence using the number of hardware resources specified by the hardware resource count, wherein the number of hardware resources is associated with an amount of logic used to implement the code sequence on a programmable device; and implementing the hardware acceleration logic on the programmable device.
1. A method comprising: receiving a code sequence from an input interface including a processor, along with a hardware resource count specifying a number of hardware resources that are to be allocated for the code sequence, in a high-level language program; generating hardware acceleration logic for implementing the code sequence using the number of hardware resources specified by the hardware resource count, wherein the number of hardware resources is associated with an amount of logic used to implement the code sequence on a programmable device; and implementing the hardware acceleration logic on the programmable device. 7. The method of claim 1 , wherein generating hardware acceleration logic includes generating hardware description language (HDL).