20. A computing device for invariant-guided abstraction within a design under verification the computing device comprising a processor, an input device, an output device, and a memory having program code that is executed by the processor, wherein the computing device: initiates a verification process for an identified design; generates one or more invariants corresponding to the design under verification by executing a proof algorithm with an input comprising at least a portion of the design and a specified resource limit, wherein in executing the proof algorithm, the computing device: establishes the pre-specified limit to enable less than a complete run of the proof algorithm on a design model, wherein the pre-specified resource limit is selected from among a time limit, a depth limit, and a hardware resource usage limit; and executes the proof algorithm for only the preset limit, wherein the proof algorithm iterates over a series of timesteps corresponding to states extending from an initial state (t0) to a subsequent state (tk) at which a proof condition holds true over a first k timesteps for a set of bounded invariants identified at the respective states, wherein said set of bounded invariants hold true for a particular state from the initial state and wherein the invariants each refer to one or more components of said design; deterministically assigns priority information to the one or more invariants generated, and to components of said design referenced by said invariants; and generates an abstracted design model by performing invariant-guided localization abstraction on the design model to utilizing the assigned priority information as a localization hint that results in abstractions that are at least one of (a) smaller abstractions and (b) easier to verify abstractions.
20. A computing device for invariant-guided abstraction within a design under verification the computing device comprising a processor, an input device, an output device, and a memory having program code that is executed by the processor, wherein the computing device: initiates a verification process for an identified design; generates one or more invariants corresponding to the design under verification by executing a proof algorithm with an input comprising at least a portion of the design and a specified resource limit, wherein in executing the proof algorithm, the computing device: establishes the pre-specified limit to enable less than a complete run of the proof algorithm on a design model, wherein the pre-specified resource limit is selected from among a time limit, a depth limit, and a hardware resource usage limit; and executes the proof algorithm for only the preset limit, wherein the proof algorithm iterates over a series of timesteps corresponding to states extending from an initial state (t0) to a subsequent state (tk) at which a proof condition holds true over a first k timesteps for a set of bounded invariants identified at the respective states, wherein said set of bounded invariants hold true for a particular state from the initial state and wherein the invariants each refer to one or more components of said design; deterministically assigns priority information to the one or more invariants generated, and to components of said design referenced by said invariants; and generates an abstracted design model by performing invariant-guided localization abstraction on the design model to utilizing the assigned priority information as a localization hint that results in abstractions that are at least one of (a) smaller abstractions and (b) easier to verify abstractions. 21. The computing device of claim 20 , wherein the computing device: incrementally refines and extends a sequence of sets of invariants representing bounded invariants and determines a relevance of the one or more design components referenced in the invariant clauses by executing code that causes the computing device to: evaluate, for each invariant, whether the invariant is an unbounded invariant that is first introduced at a specific timestep between the initial and the kth timestep; deterministically assign relative priorities to one or more design components referenced in the invariant based on the specific timestep at which the unbounded invariant is introduced; determine for each design component referenced by an invariant, if the design component has a priority that is equal to a highest priority assigned among the design components; and in response to the design component not having a priority equal to the highest priority assigned, identify the design component as a cutpoint and replace the design component with the cutpoint within the abstracted design.