15. The apparatus of claim 14 comprising a convolutional encoder which comprises means for storing a plurality of bits for expanding the number of bits in said second group of signals, by one, and means for converting the expanded bits from binary 1's to -1's and binary 0's to 1's.
15. The apparatus of claim 14 comprising a convolutional encoder which comprises means for storing a plurality of bits for expanding the number of bits in said second group of signals, by one, and means for converting the expanded bits from binary 1's to -1's and binary 0's to 1's. 16. The apparatus of claim 15 wherein said memory device is a read only memory.