5. The digital computer system of claim 4, wherein said memory means further comprises: memory arithmetic stack means containing a plurality of arithmetic stack frames, each one of said plurality of microinstruction stack frames for storing the state of execution of an arithmetic microinstruction, and said memory arithmetic stack means further comprises arithmetic stack control means responsive to the operation of said arithmetic means for providing control signals to said ALU arithmetic stack means and said memory arithmetic stack means for controlling the transfer of arithmetic stack frames between said ALU arithmetic stack means and said memory arithmetic stack means.
5. The digital computer system of claim 4, wherein said memory means further comprises: memory arithmetic stack means containing a plurality of arithmetic stack frames, each one of said plurality of microinstruction stack frames for storing the state of execution of an arithmetic microinstruction, and said memory arithmetic stack means further comprises arithmetic stack control means responsive to the operation of said arithmetic means for providing control signals to said ALU arithmetic stack means and said memory arithmetic stack means for controlling the transfer of arithmetic stack frames between said ALU arithmetic stack means and said memory arithmetic stack means. 7. The digital computer system of claim 5, wherein said memory means further comprises: instruction stack means responsive to the operation of said ALU means and containing at least one instruction stack frame for storing the state of execution of an instruction.