15. A system for performing garbage collection, comprising: a block address identifying a block of memory; and a first thread configured to: obtain a first reference bitmap comprising the block address and a plurality of mark bits; obtain a first reference; identify a mark bit of the plurality of mark bits based on the first reference; compare an address associated with the mark bit and the first reference to generate a comparison; select an existing word from a global bit map based on the block address and the comparison; calculate a new word based on the plurality of mark bits and the existing word; replace the existing word in the global bit map with the new word; reclaim the block of memory for reuse based on the global bit map after replacing the existing word; perform a bitwise negation operation on the existing word to generate a negated existing word; perform a bitwise AND operation on the negated existing word and the plurality of mark bits to generate a result; and identify a second reference based on the result, wherein the second reference is reachable.
15. A system for performing garbage collection, comprising: a block address identifying a block of memory; and a first thread configured to: obtain a first reference bitmap comprising the block address and a plurality of mark bits; obtain a first reference; identify a mark bit of the plurality of mark bits based on the first reference; compare an address associated with the mark bit and the first reference to generate a comparison; select an existing word from a global bit map based on the block address and the comparison; calculate a new word based on the plurality of mark bits and the existing word; replace the existing word in the global bit map with the new word; reclaim the block of memory for reuse based on the global bit map after replacing the existing word; perform a bitwise negation operation on the existing word to generate a negated existing word; perform a bitwise AND operation on the negated existing word and the plurality of mark bits to generate a result; and identify a second reference based on the result, wherein the second reference is reachable. 16. The system of claim 15 , wherein the first thread is further configured to: identify a mark bit of the plurality of mark bits based on the first reference; and compare an address of the plurality of addresses represented by the mark bit with the first reference.