7. The memory device of claim 1 , wherein the word line control unit comprises: a detector suitable for detecting the frequently activated word line; a comparator suitable for storing an address of the frequently activated word line when the frequently activated word line is detected, and comparing a currently inputted address with the stored address; and a word line controller suitable for activating a word line corresponding to the currently inputted address based on an active command, and activating the redundant word line when the frequently activated word line is activated and the frequently activated word line is detected.
7. The memory device of claim 1 , wherein the word line control unit comprises: a detector suitable for detecting the frequently activated word line; a comparator suitable for storing an address of the frequently activated word line when the frequently activated word line is detected, and comparing a currently inputted address with the stored address; and a word line controller suitable for activating a word line corresponding to the currently inputted address based on an active command, and activating the redundant word line when the frequently activated word line is activated and the frequently activated word line is detected. 8. The memory device of claim 7 , wherein the word line controller accesses the redundant word line instead of a word line corresponding to the currently inputted address when the currently inputted address is identical to the address stored in the comparator.