16. A short-word division method for use in a multiple modulus conversion (MMC) procedure, said MMC procedure obtaining a plurality of index values K.sub.0 -K.sub.L-1 associated with a respective plurality of moduli M.sub.0 -M.sub.L-1 said short-word division method comprising the steps of: initializing a variable k such that k=0; representing a binary expression (R.sub.k) as a number of short words, each of said short words having at least b bits; performing a short word division operation to determine a quotient (R.sub.k=1) and a remainder ##EQU23## and repeating said representing and performing steps for incremental values of k to thereby obtain said plurality of index values K.sub.0 -K.sub.L-1.
16. A short-word division method for use in a multiple modulus conversion (MMC) procedure, said MMC procedure obtaining a plurality of index values K.sub.0 -K.sub.L-1 associated with a respective plurality of moduli M.sub.0 -M.sub.L-1 said short-word division method comprising the steps of: initializing a variable k such that k=0; representing a binary expression (R.sub.k) as a number of short words, each of said short words having at least b bits; performing a short word division operation to determine a quotient (R.sub.k=1) and a remainder ##EQU23## and repeating said representing and performing steps for incremental values of k to thereby obtain said plurality of index values K.sub.0 -K.sub.L-1. 18. A method according to claim 16, wherein said representing step represents a binary input (R.sub.0) as l short words identified by x.sub.0 -x.sub.l-1, where said binary input is represented by the following expression: R.sub.0 =x.sub.0 +2.sup.b [x.sub.1 +2.sup.b [x.sub.2 + . . . +2.sup.b [x.sub.l-2 +2.sup.b x.sub.l-1 ]]].