2. The computer of claim 2, wherein: (a) said plurality of processors is arranged into first and second groups: (b) said plurality of crossbar switches is two crossbar switches in equal size: and (c) said plurality of exchange switches is a first set of switches with each switch having a fist output to a first crossbar switch and a second output to a second crossbar switch and a second set of switches with each switch having a firstinput from said first crossbar switch and a second input from said second crossbar switch.
2. The computer of claim 2, wherein: (a) said plurality of processors is arranged into first and second groups: (b) said plurality of crossbar switches is two crossbar switches in equal size: and (c) said plurality of exchange switches is a first set of switches with each switch having a fist output to a first crossbar switch and a second output to a second crossbar switch and a second set of switches with each switch having a firstinput from said first crossbar switch and a second input from said second crossbar switch. 2. The computer of claim 2, wherein: (a) said plurality of processors is arranged into first and second groups: (b) said plurality of crossbar switches is two crossbar switches in equal size: and (c) said plurality of exchange switches is a first set of switches with each switch having a fist output to a first crossbar switch and a second output to a second crossbar switch and a second set of switches with each switch having a firstinput from said first crossbar switch and a second input from said second crossbar switch.