1. A computer-implemented method for verification analysis comprising: obtaining a design description including a set of constraints wherein the set of constraints includes a multiplication constraint; analyzing the set of constraints to identify the multiplication constraint; performing, one or more processors, factorization of a number to produce factoring values that solve the multiplication constraint, wherein the factorization is performed on an overflow representation of the number; and solving a design problem within the design description based on the factoring values.
1. A computer-implemented method for verification analysis comprising: obtaining a design description including a set of constraints wherein the set of constraints includes a multiplication constraint; analyzing the set of constraints to identify the multiplication constraint; performing, one or more processors, factorization of a number to produce factoring values that solve the multiplication constraint, wherein the factorization is performed on an overflow representation of the number; and solving a design problem within the design description based on the factoring values. 25. The method of claim 1 further comprising caching a solution based on the factoring values.