18. A digital phase locked loop comprising: a forward path containing an integrator configured to provide an actuating signal, a loop filter configured to filter the actuating signal, and an oscillator that is digitally settable in terms of its output frequency; a feedback path containing a counter; an input feed for a frequency setting word into the forward path, which is coupled to an output of the counter in the feedback path for the purpose of changing the frequency setting word provided in the forward path based on the output frequency of the oscillator, wherein the frequency setting word comprises a first component and a second component and wherein, the first component of the frequency setting word is varied by a signal from the feedback path; and a correction device, coupled to the forward path and configured to correct an error component in the actuating signal output by the integrator in a manner dependent on the changed frequency setting word fed to the integrator.
18. A digital phase locked loop comprising: a forward path containing an integrator configured to provide an actuating signal, a loop filter configured to filter the actuating signal, and an oscillator that is digitally settable in terms of its output frequency; a feedback path containing a counter; an input feed for a frequency setting word into the forward path, which is coupled to an output of the counter in the feedback path for the purpose of changing the frequency setting word provided in the forward path based on the output frequency of the oscillator, wherein the frequency setting word comprises a first component and a second component and wherein, the first component of the frequency setting word is varied by a signal from the feedback path; and a correction device, coupled to the forward path and configured to correct an error component in the actuating signal output by the integrator in a manner dependent on the changed frequency setting word fed to the integrator. 19. The phase locked loop of claim 18 , wherein the correction device is coupled on an input side thereof to the input of the integrator and on an output side thereof to the output of the integrator.