1. A hardware processor comprising an integrated circuit chip processor, said integrated circuit chip processor comprising programmable intelligent search memory for content search, wherein said programmable intelligent search memory simultaneously performs regular expression based search and signature pattern based search, said programmable intelligent search memory for content search using a plurality of regular expressions, said regular expressions comprising a plurality of symbols or characters, said plurality of regular expressions further comprising a plurality of interval symbols, said regular expressions converted into a plurality of finite state automata(FSA) representing the functionality of said regular expressions for programming in said programmable intelligent search memory, said finite state automata comprising a plurality of states, said states derived from said symbols or characters of said regular expressions, said content comprising a plurality of input symbols provided as input to said programmable intelligent search memory, said programmable intelligent search memory comprising a plurality of FSA rule blocks to program said plurality of finite state automata and to search said content using said plurality of finite state automata to detect a match of said regular expressions in said content, said FSA rule block of the plurality of FSA rule blocks to program a finite state automata of said plurality of finite state automata and to search said content using said finite state automata to detect a match of a regular expression of said plurality of regular expressions in said content, said regular expression corresponding to said finite state automata, said FSA rule block further comprising: a) an interval symbol evaluation circuit to store and evaluate said plurality of interval symbols; b) a plurality of state blocks for evaluating state transitions and to generate a plurality of partial state transition signals; c) a state control block to store a current state vector, said current state vector to represent the current state of the evaluation of said finite state automata; and d) a match detect block to detect match of said regular expression with said content.
1. A hardware processor comprising an integrated circuit chip processor, said integrated circuit chip processor comprising programmable intelligent search memory for content search, wherein said programmable intelligent search memory simultaneously performs regular expression based search and signature pattern based search, said programmable intelligent search memory for content search using a plurality of regular expressions, said regular expressions comprising a plurality of symbols or characters, said plurality of regular expressions further comprising a plurality of interval symbols, said regular expressions converted into a plurality of finite state automata(FSA) representing the functionality of said regular expressions for programming in said programmable intelligent search memory, said finite state automata comprising a plurality of states, said states derived from said symbols or characters of said regular expressions, said content comprising a plurality of input symbols provided as input to said programmable intelligent search memory, said programmable intelligent search memory comprising a plurality of FSA rule blocks to program said plurality of finite state automata and to search said content using said plurality of finite state automata to detect a match of said regular expressions in said content, said FSA rule block of the plurality of FSA rule blocks to program a finite state automata of said plurality of finite state automata and to search said content using said finite state automata to detect a match of a regular expression of said plurality of regular expressions in said content, said regular expression corresponding to said finite state automata, said FSA rule block further comprising: a) an interval symbol evaluation circuit to store and evaluate said plurality of interval symbols; b) a plurality of state blocks for evaluating state transitions and to generate a plurality of partial state transition signals; c) a state control block to store a current state vector, said current state vector to represent the current state of the evaluation of said finite state automata; and d) a match detect block to detect match of said regular expression with said content. 2. A finite state automata of the claim 1 comprising ‘n’ states corresponding to ‘n’ symbols of said regular expression, said ‘n’ symbols comprising ‘m’ bits wherein ‘n’ and ‘m’ are each integer values greater than one.