1. A circuit for converting a first network packet into a second network packet, the circuit comprising: a state machine adapted to convert the first network packet into the second network packet according to at least one modification action from a textual language specification, wherein: each of the at least one modification action being one of an insertion action for inserting a data segment into the first network packet and a removal action for removing a data segment from the first network packet; the state machine including a plurality of states that each correspond to a pairing of a first data word from a first sequence of data words in the first network packet and a second data word from a second sequence of data words in the second network packet; each data word in the first and second network packets including a same number of a plurality of data units, the state for selecting the data units of the second data word from the data segment of each insertion action of the at least one modification action and the data units of both the first data word and a prior data word to the first data word in the first sequence; and each state specifying at least one next state that includes one of the states that corresponds the pairing of one of the first data word and a next data word after the first data word in the first sequence and one of the second data word and a next data word after the second data word in the second sequence; the state machine being configured to concurrently scan through a first plurality of data units in a first sequence of data words in the first network packet and a second plurality of data units in a second sequence of data words in the second network packet, wherein the scanning through the first plurality of data units is suspended throughout each insertion action, and the scanning through the second plurality of data units is suspended throughout each removal action; and a look-ahead stage, an operation stage coupled to the look-ahead stage, an insert/remove stage that includes the state machine and is coupled to the operation stage, and an interleave stage that is coupled to the insert/remove stage.
1. A circuit for converting a first network packet into a second network packet, the circuit comprising: a state machine adapted to convert the first network packet into the second network packet according to at least one modification action from a textual language specification, wherein: each of the at least one modification action being one of an insertion action for inserting a data segment into the first network packet and a removal action for removing a data segment from the first network packet; the state machine including a plurality of states that each correspond to a pairing of a first data word from a first sequence of data words in the first network packet and a second data word from a second sequence of data words in the second network packet; each data word in the first and second network packets including a same number of a plurality of data units, the state for selecting the data units of the second data word from the data segment of each insertion action of the at least one modification action and the data units of both the first data word and a prior data word to the first data word in the first sequence; and each state specifying at least one next state that includes one of the states that corresponds the pairing of one of the first data word and a next data word after the first data word in the first sequence and one of the second data word and a next data word after the second data word in the second sequence; the state machine being configured to concurrently scan through a first plurality of data units in a first sequence of data words in the first network packet and a second plurality of data units in a second sequence of data words in the second network packet, wherein the scanning through the first plurality of data units is suspended throughout each insertion action, and the scanning through the second plurality of data units is suspended throughout each removal action; and a look-ahead stage, an operation stage coupled to the look-ahead stage, an insert/remove stage that includes the state machine and is coupled to the operation stage, and an interleave stage that is coupled to the insert/remove stage. 4. The circuit of claim 1 , wherein one of the at least one modification action of the textual language specification includes a data position for the data segment of the modification action, the data position at a data unit of a data word from the first sequence of the first network packet.