17. A computer readable storage medium storing a computer program comprising instructions which, when executed by at least one computer system, cause the computer system to perform a process for assertion synthesis of circuitry, the process comprising: using the at least one computer system which comprises at least one processor and is programmed for performing: converting an assertion formula to sequence implication form using one or more rewrite rules, wherein the sequence implication form converted by the one or more semantic preserving rewrite rules is semantically equivalent to the assertion formula; optimizing a resulting state machine to reduce a number of states in the state machine that represents the circuitry; synthesizing a resulting formula, which is converted from the assertion formula, to the resulting state machine using context aware sequence synthesis, wherein the context aware sequence synthesis synthesizes the resulting formula based at least in part upon context of one or more sequences in the resulting formula; and verifying the circuitry using the state machine.
17. A computer readable storage medium storing a computer program comprising instructions which, when executed by at least one computer system, cause the computer system to perform a process for assertion synthesis of circuitry, the process comprising: using the at least one computer system which comprises at least one processor and is programmed for performing: converting an assertion formula to sequence implication form using one or more rewrite rules, wherein the sequence implication form converted by the one or more semantic preserving rewrite rules is semantically equivalent to the assertion formula; optimizing a resulting state machine to reduce a number of states in the state machine that represents the circuitry; synthesizing a resulting formula, which is converted from the assertion formula, to the resulting state machine using context aware sequence synthesis, wherein the context aware sequence synthesis synthesizes the resulting formula based at least in part upon context of one or more sequences in the resulting formula; and verifying the circuitry using the state machine. 21. The computer readable medium of claim 17 , wherein the method is applied to at least one form of Assertion Based Verification (ABV).