3. A stack according to claim 2, wherein the control cells are interconnected for communicating the storage state of the corresponding data storage cells to and from the adjacent control cells; and wherein each (n)th control cell in the array from the top of the stack includes a cell-state flip-flop for providing indication signals indicating the storage state of the (n)th data storage cell; a first control gate connected to the push gate between the (n)th data storage cell and the (n+1)th data storage cell for providing a push signal to said push gate in response to indication signals from the cell-state flip-flop of the (n)th control cell indicating that the (n)th data storage cell is full, from the cell-state flip-flop of the (n+1) the control cell indicating that the (n+1)th data storage cell is empty, and from the cell-state flip-flop of the (n-1)th control cell indicating that the (n-1)th data storage cell is full; and a second control gate connected to the pop gate between the (n)th data storage cell and the (n+1)th data storage cell for providing a pop signal to said pop gate in response to indication signals from the cell-state flip-flop of the (n)th control cell indicating that the (n)th data storage cell is empty, from the cell-state flip-flop of the (n+1)th control cell indicating that the (n+1)th data storage cell is full, and from the cell-state flip-flop of the (n-1)th control cell indicating that the (n-1)th data storage cell is empty.
3. A stack according to claim 2, wherein the control cells are interconnected for communicating the storage state of the corresponding data storage cells to and from the adjacent control cells; and wherein each (n)th control cell in the array from the top of the stack includes a cell-state flip-flop for providing indication signals indicating the storage state of the (n)th data storage cell; a first control gate connected to the push gate between the (n)th data storage cell and the (n+1)th data storage cell for providing a push signal to said push gate in response to indication signals from the cell-state flip-flop of the (n)th control cell indicating that the (n)th data storage cell is full, from the cell-state flip-flop of the (n+1) the control cell indicating that the (n+1)th data storage cell is empty, and from the cell-state flip-flop of the (n-1)th control cell indicating that the (n-1)th data storage cell is full; and a second control gate connected to the pop gate between the (n)th data storage cell and the (n+1)th data storage cell for providing a pop signal to said pop gate in response to indication signals from the cell-state flip-flop of the (n)th control cell indicating that the (n)th data storage cell is empty, from the cell-state flip-flop of the (n+1)th control cell indicating that the (n+1)th data storage cell is full, and from the cell-state flip-flop of the (n-1)th control cell indicating that the (n-1)th data storage cell is empty. 6. A stack according to claim 3, wherein each data storage cell is a static storage cell that includes a hold gate for completing a feedback loop in said storage cell, said hold gate being connected to the cell-state flip-flop in the corresponding control cell for completing said loop in response to an indication signal from said flip-flop indicating that said data storage cell is full.