2. The computing device as recited in claim 1 , wherein the one or more directed acyclic graphs include at least one node associated with one of the primitives used in at least one of the logical expressions, a value of the one of the primitives being evaluated to reflect the current state of the model when the node is visited in traversing the one or more directed acyclic graphs.
2. The computing device as recited in claim 1 , wherein the one or more directed acyclic graphs include at least one node associated with one of the primitives used in at least one of the logical expressions, a value of the one of the primitives being evaluated to reflect the current state of the model when the node is visited in traversing the one or more directed acyclic graphs. 3. The computing device as recited in claim 2 , further comprising a memory space to cache the value of each of the primitives that has been evaluated so that within a computational cycle, traversals of additional directed acyclic graphs need not re-compute the value of the previously evaluated primitives.