11. A protective system for preventing data word losses in the presence of a nuclear radiation event, or the like, while a memory is being accessed, said memory having at least one block of multi-bit data words stored therein, said block containing a particular number of data words at known memory locations, and said memory further including a multi-bit error correction word in said system including: means coupled to the member for accessing the multi-bit data words in the block of the different memory locations; first register means coupled to the accessing means for storing the address of each data word as the same is being accessed by the accessing means; second means coupled to the accessing means for altering the data word assessed thereby causing the data word to assume a predetermined bit configuration; second register means; logic circuit means coupled to the accessing means for forming a computed error correction word on all the words in the block including the altered data word and the error correction word, and for introducing the computed error correction word to the second register means for introduction into the memory to replace the altered word in the block at the memory location of the altered word; and nuclear radiation detection means for initiating the operation of the system.
11. A protective system for preventing data word losses in the presence of a nuclear radiation event, or the like, while a memory is being accessed, said memory having at least one block of multi-bit data words stored therein, said block containing a particular number of data words at known memory locations, and said memory further including a multi-bit error correction word in said system including: means coupled to the member for accessing the multi-bit data words in the block of the different memory locations; first register means coupled to the accessing means for storing the address of each data word as the same is being accessed by the accessing means; second means coupled to the accessing means for altering the data word assessed thereby causing the data word to assume a predetermined bit configuration; second register means; logic circuit means coupled to the accessing means for forming a computed error correction word on all the words in the block including the altered data word and the error correction word, and for introducing the computed error correction word to the second register means for introduction into the memory to replace the altered word in the block at the memory location of the altered word; and nuclear radiation detection means for initiating the operation of the system. 13. The protective system defined in claim 11, in which said logic means includes exclusive or logic so that the computed error correction word is the exclusive or sum of the data words in the block including the error correction word and the altered word.