14. A method for optimizing a digital circuit design, the method comprising steps of translating a first representation of the digital circuit design to a second representation of the digital circuit design, the second representation comprising a plurality of syntactic expressions, wherein at least half of the syntactic expressions identify a higher-order function of base Boolean values; identifying data and control in at least one of the first and second representations; and syntactically manipulating the plurality of syntactic expressions to form a third representation of the digital circuit design, wherein manipulating step comprises reducing a number of nodes within the syntactic expressions.
14. A method for optimizing a digital circuit design, the method comprising steps of translating a first representation of the digital circuit design to a second representation of the digital circuit design, the second representation comprising a plurality of syntactic expressions, wherein at least half of the syntactic expressions identify a higher-order function of base Boolean values; identifying data and control in at least one of the first and second representations; and syntactically manipulating the plurality of syntactic expressions to form a third representation of the digital circuit design, wherein manipulating step comprises reducing a number of nodes within the syntactic expressions. 17. The method for optimizing the digital circuit design as recited in claim 14 , wherein the second and third representations identify sets of cell elements that comprise multipiexers for implementing the digital circuit design.