10. Apparatus for reconstructing a block of previously encoded digital words as defined in claim 9 wherein said means for decreasing the count in said down counter means and for shifting said one digital word in said shift register means includes an AND gate having at least two input terminals, an OR gate having at least two inputs each one of which is connected to a different one of the bit positions in said down counter means, means for connecting the output of said OR gate to one of said at least two input terminals of said AND gate, and means for connecting a second one of said at least two input terminals of said AND gate to the end cell of said shift register means.
10. Apparatus for reconstructing a block of previously encoded digital words as defined in claim 9 wherein said means for decreasing the count in said down counter means and for shifting said one digital word in said shift register means includes an AND gate having at least two input terminals, an OR gate having at least two inputs each one of which is connected to a different one of the bit positions in said down counter means, means for connecting the output of said OR gate to one of said at least two input terminals of said AND gate, and means for connecting a second one of said at least two input terminals of said AND gate to the end cell of said shift register means. 11. Apparatus for reconstructing a block of previously encoded digital words as defined in claim 10 wherein said means responsive to the digital values present in said down counter means and to those present in the cells of said shift register means includes a second AND gate, one input of which is connected to the least significant bit position of said down counter means and a second input of which is connected to the end cell of said shift register means.