8. A heterogenous computing system comprising: a processor; an accelerator memory; and a compiler that identifies code regions in an application from which one or more offloadable tasks can be generated for the heterogenous computing system, wherein the identifying comprises: adding relaxed semantics to a directive based language in the heterogenous computing system for allowing a user to suggest rather than specify a parallel code region as an offloadable task candidate, wherein the offloadable task candidate is a sub-offload or a super-offload; and identifying one or more offloadable tasks in a neighborhood of code region marked by the directive based language.
8. A heterogenous computing system comprising: a processor; an accelerator memory; and a compiler that identifies code regions in an application from which one or more offloadable tasks can be generated for the heterogenous computing system, wherein the identifying comprises: adding relaxed semantics to a directive based language in the heterogenous computing system for allowing a user to suggest rather than specify a parallel code region as an offloadable task candidate, wherein the offloadable task candidate is a sub-offload or a super-offload; and identifying one or more offloadable tasks in a neighborhood of code region marked by the directive based language. 13. The heterogenous computing system of claim 8 , wherein the super-offload comprises declaring a code region larger than a code region specified by a developer as the offloadable task candidate.