15. The integrated circuit chip of claim 12 , wherein the at least one match detect block further comprises: a. a ‘n’ bit accept state vector memory circuit to store which of said ‘n’ states are accept states, said accept states used to detect when said at least one regular expression has matched with said content; and b. a match detect circuit to detect match in said content with said at least one regular expression.
15. The integrated circuit chip of claim 12 , wherein the at least one match detect block further comprises: a. a ‘n’ bit accept state vector memory circuit to store which of said ‘n’ states are accept states, said accept states used to detect when said at least one regular expression has matched with said content; and b. a match detect circuit to detect match in said content with said at least one regular expression. 16. The integrated circuit chip of claim 15 , wherein the at least one match detect block further comprises: a. a ‘n’ bit tag state vector memory circuit to store which of said ‘n’ states are tag states, said tag states used to detect when said at least one regular expression has partially matched with said content; and b. a tag match detect circuit to detect tag match in said content with said at least one regular expression to detect partial regular expression match or to detect sub-string match or a combination thereof.