4. The digital computer system of claims 1 or 2 or 3, wherein said processor means further comprises: arithmetic means connected from said bus means for performing arithmetic operations on certain of said instructions, said arithmetic means including arithmetic microcode control means for storing sequences of arithmetic microinstructions for controlling the operation of said arithmetic means, said arithmetic microcode control means responsive to the operation of said ALU means to provide said sequences of said arithmetic microinstructions to said arithmetic means, and ALU arithmetic stack means containing at least one arithmetic stack frame for storing the state of execution of an arithmetic microinstruction when the execution of said arithmetic microinstruction has been interrupted.
4. The digital computer system of claims 1 or 2 or 3, wherein said processor means further comprises: arithmetic means connected from said bus means for performing arithmetic operations on certain of said instructions, said arithmetic means including arithmetic microcode control means for storing sequences of arithmetic microinstructions for controlling the operation of said arithmetic means, said arithmetic microcode control means responsive to the operation of said ALU means to provide said sequences of said arithmetic microinstructions to said arithmetic means, and ALU arithmetic stack means containing at least one arithmetic stack frame for storing the state of execution of an arithmetic microinstruction when the execution of said arithmetic microinstruction has been interrupted. 8. The digital computer system of claim 4, wherein said memory means further comprises: instruction stack means responsive to the operation of said ALU means and containing at least one instruction stack frame for storing the state of execution of an instruction.