2. The computing system of claim 1 , wherein the automatically generating the model and the automatically generating the interface are for a simulation flow supported by the environment, and wherein in response to a request to create synthesized versions of the one or more user-defined modules the environment performs a synthesis flow wherein: automatically generating an interface further comprises synthesizing the interface at least by converting the set of access methods to the pipeline to a set of ports in a hardware description language; and performing simulations further comprises performing simulations on the one or more user-defined modules with workloads using the automatically generated model of the pipeline and the automatically generated model of the interface to determine one or more design evaluation metrics of the one or more user-defined modules.
2. The computing system of claim 1 , wherein the automatically generating the model and the automatically generating the interface are for a simulation flow supported by the environment, and wherein in response to a request to create synthesized versions of the one or more user-defined modules the environment performs a synthesis flow wherein: automatically generating an interface further comprises synthesizing the interface at least by converting the set of access methods to the pipeline to a set of ports in a hardware description language; and performing simulations further comprises performing simulations on the one or more user-defined modules with workloads using the automatically generated model of the pipeline and the automatically generated model of the interface to determine one or more design evaluation metrics of the one or more user-defined modules. 6. The computing system of claim 2 , wherein automatically generating an interface further comprises generating a value change trace of interface methods accessed in modules that enables low-level simulation of applied workload, and performing an equivalence check between high-level models with interface method access and low-level models with corresponding ports in the set of ports.