6. A data processing system, comprising: a processor; a plurality of programming idiom accelerators external to the processor; and a memory coupled to the processor, the memory comprising instructions which, when executed by the processor, cause the processor to: receive a portion of high level language program code; examine a series of instructions in the portion of high level language program code; determine whether the series of instructions comprises a recognized programming idiom from a plurality of predetermined programming idioms, wherein the set of predetermined programming idioms correspond to the plurality of programming idiom accelerators and wherein each of the plurality of programming idiom accelerators is a hardware device in the data processing system, wherein the plurality of programming idiom accelerators comprise a wake-and-go engine and a linked list acceleration engine; compile the high level language program to machine code; responsive to a determination that the series of instructions comprises a recognized programming idiom, insert into the machine code a begin hint instruction that marks a beginning of the recognized programming idiom at a next instruction in the machine code and an end hint instruction that marks an end of the recognized programming idiom, wherein a given programming idiom accelerator that corresponds to the recognized programming idiom is configured to perform a look-ahead operation to examine the machine code being pre-fetched for a thread being executed by a processor and to detect the begin hint instruction, wherein during execution of the machine code by the processor, the given programming idiom accelerator performs at least one action to accelerate execution of the programming idiom; detect a thread that is waiting for an event that modifies a data value associated with a target address; store the target address in a wake-and-go entry of a content addressable memory in association with a thread identifier of the thread; place the thread in a sleep state; and responsive to detecting a write to the target address, use the target address to address the content addressable memory and return, by the content addressable memory, a storage address of the wake-and-go entry, place the thread corresponding to the thread identifier in the wake-and-go entry in a non-sleep state, and determine whether the write to the target address is the event for which the thread is waiting.
6. A data processing system, comprising: a processor; a plurality of programming idiom accelerators external to the processor; and a memory coupled to the processor, the memory comprising instructions which, when executed by the processor, cause the processor to: receive a portion of high level language program code; examine a series of instructions in the portion of high level language program code; determine whether the series of instructions comprises a recognized programming idiom from a plurality of predetermined programming idioms, wherein the set of predetermined programming idioms correspond to the plurality of programming idiom accelerators and wherein each of the plurality of programming idiom accelerators is a hardware device in the data processing system, wherein the plurality of programming idiom accelerators comprise a wake-and-go engine and a linked list acceleration engine; compile the high level language program to machine code; responsive to a determination that the series of instructions comprises a recognized programming idiom, insert into the machine code a begin hint instruction that marks a beginning of the recognized programming idiom at a next instruction in the machine code and an end hint instruction that marks an end of the recognized programming idiom, wherein a given programming idiom accelerator that corresponds to the recognized programming idiom is configured to perform a look-ahead operation to examine the machine code being pre-fetched for a thread being executed by a processor and to detect the begin hint instruction, wherein during execution of the machine code by the processor, the given programming idiom accelerator performs at least one action to accelerate execution of the programming idiom; detect a thread that is waiting for an event that modifies a data value associated with a target address; store the target address in a wake-and-go entry of a content addressable memory in association with a thread identifier of the thread; place the thread in a sleep state; and responsive to detecting a write to the target address, use the target address to address the content addressable memory and return, by the content addressable memory, a storage address of the wake-and-go entry, place the thread corresponding to the thread identifier in the wake-and-go entry in a non-sleep state, and determine whether the write to the target address is the event for which the thread is waiting. 8. The data processing system of claim 6 , wherein determining whether the write to the target address is the event for which the thread is waiting comprises: determining, by the thread, whether the data value being written to the target address is a data value for which the thread is waiting.