24. An article of manufacture comprising a non-transitory computer accessible storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor or at least one processor core executing one or more threads, causes the at least one processor or the at least one processor core to perform a method for implementing a mixed-signal electronic design using standardized power data, the method comprising: at least one processor or at least one processor core executing a process, the process comprising: identifying a mixed-signal electronic design; identifying, generating, or modifying, with an aid of a standardized power format mechanism including or coupled with the at least one processor, standardized power data in a standardized power format having an illegal signal in the mixed-signal electronic design by introducing one or more changes to generate updated standardized power data from the standardized power data; implementing the mixed-signal electronic design by using the updated standardized power data including the illegal signal for manufacturing of a mixed signal electronic circuit, wherein the illegal signal is not recognized by a standardized power format framework for the standardized power format and comprises at least one of a power control signal or an expression including an incompatible or illegal signal to implement power intent for the mixed-signal electronic design.
24. An article of manufacture comprising a non-transitory computer accessible storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor or at least one processor core executing one or more threads, causes the at least one processor or the at least one processor core to perform a method for implementing a mixed-signal electronic design using standardized power data, the method comprising: at least one processor or at least one processor core executing a process, the process comprising: identifying a mixed-signal electronic design; identifying, generating, or modifying, with an aid of a standardized power format mechanism including or coupled with the at least one processor, standardized power data in a standardized power format having an illegal signal in the mixed-signal electronic design by introducing one or more changes to generate updated standardized power data from the standardized power data; implementing the mixed-signal electronic design by using the updated standardized power data including the illegal signal for manufacturing of a mixed signal electronic circuit, wherein the illegal signal is not recognized by a standardized power format framework for the standardized power format and comprises at least one of a power control signal or an expression including an incompatible or illegal signal to implement power intent for the mixed-signal electronic design. 25. The article of manufacture of claim 24 , the process further comprising: processing power related content in the mixed-signal electronic design using one or more native processes or modules in a standardized power format framework for the standardized power format; performing virtual port mapping for a port of a circuit design block in the mixed-signal electronic circuit to generate a virtual port for the port; instantiating an instance of the circuit design block in the mixed-signal electronic design using the virtual port, rather than the port in the circuit design block; and performing one or more analyses for the mixed-signal electronic circuit using the updated power data including the illegal signal and the instance of the circuit design block, wherein the act of implementing the mixed-signal electronic design also uses the instance of the circuit design block.