2. A speech recognition circuit according to claim 1 , wherein each lexical memory means stores lexical data as at least one lexical tree data structure, each lexical tree data structure comprises a model of words having common prefix components, and an initial component of each lexical tree data structure is unique.
2. A speech recognition circuit according to claim 1 , wherein each lexical memory means stores lexical data as at least one lexical tree data structure, each lexical tree data structure comprises a model of words having common prefix components, and an initial component of each lexical tree data structure is unique. 11. A speech recognition circuit according to claim 2 , wherein said control processor means is operative to pass a lexical tree identifier to a said processor, said processor is operative to read lexical data for the identified lexical tree from a corresponding said lexical memory means and to process said speech parameters using said read lexical data.