3. A decoding apparatus for decoding an error correction code interleaved on a transmitting side and deinterleaved on a receiving side comprising: a determining circuit for making determination as to whether decoding is acceptable or not word by word according to a result of decoding; an error position detector for obtaining error position data by detecting an error position in decoding bit by bit according to the result of decoding; an estimator for estimating an error position according to error position data detected by said error position detector in a first word before a correction object word as well as to error position data detected by said error position detector in a second word after said correction object word when said determining circuit determines that decoding is not acceptable; a correcting circuit for correcting said correction object word according to the error position estimated by said estimator; and a redecoder for executing redecoding processing according to a result of correction by said correcting circuit.
3. A decoding apparatus for decoding an error correction code interleaved on a transmitting side and deinterleaved on a receiving side comprising: a determining circuit for making determination as to whether decoding is acceptable or not word by word according to a result of decoding; an error position detector for obtaining error position data by detecting an error position in decoding bit by bit according to the result of decoding; an estimator for estimating an error position according to error position data detected by said error position detector in a first word before a correction object word as well as to error position data detected by said error position detector in a second word after said correction object word when said determining circuit determines that decoding is not acceptable; a correcting circuit for correcting said correction object word according to the error position estimated by said estimator; and a redecoder for executing redecoding processing according to a result of correction by said correcting circuit. 4. A decoding apparatus according to claim 3; wherein said error correction code is a BCH error correction code.