81. The apparatus of claim 80 , wherein said computing platform is further adapted to: represent said signs of differences as 2's-complement binary expressions in registers; and shift bits in at least some of said registers.
81. The apparatus of claim 80 , wherein said computing platform is further adapted to: represent said signs of differences as 2's-complement binary expressions in registers; and shift bits in at least some of said registers. 82. The apparatus of claim 81 , wherein said computing platform is further adapted to shift said bits by a number of bit positions based, at least in part, on a significance of differences represented in said registers.