8. A system, comprising: a processor for: monitoring a plurality of actions associated with at least one communication for lawful intercept purposes; correlating the actions into a communication flow independent of an address associated with the actions; and reporting the communication flow to a lawful intercept framework; wherein the system is operable such that the actions are correlated utilizing a unique identifier of a subscriber associated with the actions; wherein an address utilized to perform each action is determined to be associated with the unique identifier of the subscriber, and the correlation is based on the determination; wherein at least a portion of the actions are associated with a different address and each of the different addresses is associated with the unique identifier of the subscriber, such that the portions are correlated based on the determination that each address utilized to perform each action is associated with the unique identifier of the subscriber.
8. A system, comprising: a processor for: monitoring a plurality of actions associated with at least one communication for lawful intercept purposes; correlating the actions into a communication flow independent of an address associated with the actions; and reporting the communication flow to a lawful intercept framework; wherein the system is operable such that the actions are correlated utilizing a unique identifier of a subscriber associated with the actions; wherein an address utilized to perform each action is determined to be associated with the unique identifier of the subscriber, and the correlation is based on the determination; wherein at least a portion of the actions are associated with a different address and each of the different addresses is associated with the unique identifier of the subscriber, such that the portions are correlated based on the determination that each address utilized to perform each action is associated with the unique identifier of the subscriber. 9. The system of claim 8 , wherein the processor is coupled to memory via a bus.