15. The computer-readable memory device according to claim 11 , wherein said simplified code generated by said code generating unit is used to directly load an operand in the vector having said hint related to vector alignment into a register.
15. The computer-readable memory device according to claim 11 , wherein said simplified code generated by said code generating unit is used to directly load an operand in the vector having said hint related to vector alignment into a register. 16. The computer-readable memory device according to claim 15 , wherein said simplified code generated by said code generating unit is further used to directly operate said register loaded with said operand.