1. An Application Specific Integration Circuit (ASIC) for use in a hardware-implemented backend search engine for a low-power speech recognition system, said ASIC comprising at least: a scoring engine that includes logic circuitry adapted to read a plurality of active acoustic unit models from external memory, update each of the plurality of active acoustic unit models based on one or more corresponding senone scores received from an acoustic scoring engine for a current frame of sampled speech, write the plurality of active acoustic unit models back to the external memory, and enter a low-power state after writing the plurality of active acoustic unit models back to the external memory until processing for a subsequent frame of sampled speech is to begin; a transition engine that includes logic circuitry adapted to process the plurality of active acoustic unit models after the plurality of active acoustic unit models have been updated and written back to the external memory by the scoring engine in order to prune unlikely active acoustic unit models for the current frame of sampled speech, create or modify active acoustic unit models likely to be transitioned to, and identify any completed words, wherein the transition engine is in a low-power state while the scoring engine is processing the plurality of active acoustic unit models; and a language model engine that includes logic circuitry adapted to process any completed words identified by the transition engine for the current frame of sampled speech to identify one or more words that are likely to follow in the subsequent frame of sampled speech.
1. An Application Specific Integration Circuit (ASIC) for use in a hardware-implemented backend search engine for a low-power speech recognition system, said ASIC comprising at least: a scoring engine that includes logic circuitry adapted to read a plurality of active acoustic unit models from external memory, update each of the plurality of active acoustic unit models based on one or more corresponding senone scores received from an acoustic scoring engine for a current frame of sampled speech, write the plurality of active acoustic unit models back to the external memory, and enter a low-power state after writing the plurality of active acoustic unit models back to the external memory until processing for a subsequent frame of sampled speech is to begin; a transition engine that includes logic circuitry adapted to process the plurality of active acoustic unit models after the plurality of active acoustic unit models have been updated and written back to the external memory by the scoring engine in order to prune unlikely active acoustic unit models for the current frame of sampled speech, create or modify active acoustic unit models likely to be transitioned to, and identify any completed words, wherein the transition engine is in a low-power state while the scoring engine is processing the plurality of active acoustic unit models; and a language model engine that includes logic circuitry adapted to process any completed words identified by the transition engine for the current frame of sampled speech to identify one or more words that are likely to follow in the subsequent frame of sampled speech. 4. The ASIC of claim 1 wherein for each completed word, the language model engine is adapted to identify one or more expected words that are likely to follow the completed word using an n-gram analysis, wherein as part of the n-gram analysis the language model engine performs a lookup for trigrams for the completed word in the external memory using a hashing technique.