10. The speech recognition circuit of claim 1 , wherein the memory structure comprises a plurality of memory elements, the memory structure being adapted for independent lookup' of states in each of said memory elements.
10. The speech recognition circuit of claim 1 , wherein the memory structure comprises a plurality of memory elements, the memory structure being adapted for independent lookup' of states in each of said memory elements. 11. The speech recognition circuit of claim 10 , wherein one of said memory elements is configured to store data relating to a first lexical tree, and a second of said memory elements is configured to store data relating to a second lexical tree, the second lexical tree comprising a different model of words than the first lexical tree.