1. An apparatus of a transmitter, comprising: a bandpass filter (BPF) arranged to produce a transmitter output signal; and a digital front end (DFE) arranged to receive a carrier frequency signal, the DFE comprising: a zero crossing (ZC) pre-distorter (ZCPD) arranged to compensate for ZC distortion introduced by the BPF and produce code words to generate an input signal to be applied to the BPF; a linear phase interpolator (LPI) arranged to interpolate a first interpolated baseband in-phase quadrature-phase (IQ) signal and produce a second interpolated baseband IQ signal; ZC finder circuitry arranged to determine ZC positions of the second interpolated baseband IQ signal; Absolute Value Determiner (ABS) circuitry arranged to produce magnitudes of the second interpolated baseband IQ signal; Amplitude Determiner (AMP) circuitry arranged to determine the magnitudes of the second interpolated baseband IQ signal; and a synchronized First-In-First-Out (Sync FIFO) latch arranged to adjust clocking of the ZC positions and the magnitudes of the second interpolated baseband IQ signal to change a frequency of the ZC positions and the magnitudes of the second interpolated baseband IQ signal to a frequency of the carrier frequency signal and to produce output signals to the ZCPD.
1. An apparatus of a transmitter, comprising: a bandpass filter (BPF) arranged to produce a transmitter output signal; and a digital front end (DFE) arranged to receive a carrier frequency signal, the DFE comprising: a zero crossing (ZC) pre-distorter (ZCPD) arranged to compensate for ZC distortion introduced by the BPF and produce code words to generate an input signal to be applied to the BPF; a linear phase interpolator (LPI) arranged to interpolate a first interpolated baseband in-phase quadrature-phase (IQ) signal and produce a second interpolated baseband IQ signal; ZC finder circuitry arranged to determine ZC positions of the second interpolated baseband IQ signal; Absolute Value Determiner (ABS) circuitry arranged to produce magnitudes of the second interpolated baseband IQ signal; Amplitude Determiner (AMP) circuitry arranged to determine the magnitudes of the second interpolated baseband IQ signal; and a synchronized First-In-First-Out (Sync FIFO) latch arranged to adjust clocking of the ZC positions and the magnitudes of the second interpolated baseband IQ signal to change a frequency of the ZC positions and the magnitudes of the second interpolated baseband IQ signal to a frequency of the carrier frequency signal and to produce output signals to the ZCPD. 7. The apparatus of claim 1 , wherein compensation applied by the ZCPD to compensate for the ZC distortion caused by the BPF is: t ~ zc k = t zc k + A k - A k - 1 A k + A k - 1 · C 0 · T c where t zc k is an uncompensated ZC position, {tilde over (t)} zc k is a compensated ZC position, A k-1 is a pre-ZC magnitude, A k is a post-ZC magnitude, T c is a nominal carrier cycle length, and C 0 is a predetermined constant.