1. A method executed by a computer under the control of a program, said computer including a memory for storing said program, said method comprising the steps of: receiving in said computer a hardware description language description of an electronic circuit, said hardware description language description of said electronic circuit including circuit element descriptions and circuit connection descriptions, said circuit element descriptions defining datapath functions performed by said electronic circuit; storing in said memory a library with a plurality of hardware description language datapath library elements that perform specified datapath operations; parsing said circuit element descriptions of said hardware description language description of said electronic circuit into circuit element intermediate register transfer level (RTL) descriptions, each of said circuit element intermediate RTL descriptions including a first list of pointers to data structures with multiple input and output ports and a second list of pointers to data structures representing logical or mathematical expressions, and said hardware description language datapath library elements into datapath library element intermediate RTL descriptions, each of said datapath library element intermediate RTL descriptions including a first list of pointers to data structures representing input and output ports and a second list of pointers to data structures representing logical or mathematical expressions; transforming each of said circuit element intermediate RTL descriptions into a corresponding circuit element directed acyclic graph, thereby generating a set of circuit element directed acyclic graphs, each of said dampath library element intermediate RTL descriptions into a corresponding datapath library element directed acyclic graph, thereby generating a set of datapath library element directed acyclic graphs; synthesizing a datapath structure representing said electronic circuit, said synthesizing step including the step of matching said circuit element directed acyclic graphs with said datapath library element directed acyclic graphs to identify matched datapath library elements which perform said datapath functions defined by said circuit element descriptions; and generating a netlist of circuit elements selected from said matched datapath library elements.
1. A method executed by a computer under the control of a program, said computer including a memory for storing said program, said method comprising the steps of: receiving in said computer a hardware description language description of an electronic circuit, said hardware description language description of said electronic circuit including circuit element descriptions and circuit connection descriptions, said circuit element descriptions defining datapath functions performed by said electronic circuit; storing in said memory a library with a plurality of hardware description language datapath library elements that perform specified datapath operations; parsing said circuit element descriptions of said hardware description language description of said electronic circuit into circuit element intermediate register transfer level (RTL) descriptions, each of said circuit element intermediate RTL descriptions including a first list of pointers to data structures with multiple input and output ports and a second list of pointers to data structures representing logical or mathematical expressions, and said hardware description language datapath library elements into datapath library element intermediate RTL descriptions, each of said datapath library element intermediate RTL descriptions including a first list of pointers to data structures representing input and output ports and a second list of pointers to data structures representing logical or mathematical expressions; transforming each of said circuit element intermediate RTL descriptions into a corresponding circuit element directed acyclic graph, thereby generating a set of circuit element directed acyclic graphs, each of said dampath library element intermediate RTL descriptions into a corresponding datapath library element directed acyclic graph, thereby generating a set of datapath library element directed acyclic graphs; synthesizing a datapath structure representing said electronic circuit, said synthesizing step including the step of matching said circuit element directed acyclic graphs with said datapath library element directed acyclic graphs to identify matched datapath library elements which perform said datapath functions defined by said circuit element descriptions; and generating a netlist of circuit elements selected from said matched datapath library elements. 3. The method of claim 1 wherein said synthesizing step includes the steps of: receiving a spacial area value associated with each of several predefined multiplexers having different numbers of ports; representing multiplexers utilized in said synthesized datapath structure; and transforming a multiple port multiplexer into an equivalent tree structure of multiplexers in said synthesized datapath structure, said tree structure of multiplexers having an associated circuit layout area which is smaller than said multiple port multiplexer's associated circuit layout area.