10. The apparatus of claim 1 wherein said second video signal provides display including at least S characters per row and T rows/screen and wherein: said display control means includes a page refresh RAM of byte capacity no greater than S*T/n, wherein n is an integer greater than 1, and means for generating said second video signal in response to data read from said page refresh RAM, a conventional CRT chip emitting timing signals for reading out said page refresh RAM at U characters per row and V rows/screen, wherein S is greater than U or T is greater than V, said display control means further includes page refresh writing means for writing said page refresh RAM with signals to display T rows of text, each of S characters per row.
10. The apparatus of claim 1 wherein said second video signal provides display including at least S characters per row and T rows/screen and wherein: said display control means includes a page refresh RAM of byte capacity no greater than S*T/n, wherein n is an integer greater than 1, and means for generating said second video signal in response to data read from said page refresh RAM, a conventional CRT chip emitting timing signals for reading out said page refresh RAM at U characters per row and V rows/screen, wherein S is greater than U or T is greater than V, said display control means further includes page refresh writing means for writing said page refresh RAM with signals to display T rows of text, each of S characters per row. 11. The apparatus of claim 10 wherein S is the maximum number of characters per line of a typical text line and T is the maximum number of lines per page of a typical page.