11. The apparatus of claim 8 , wherein identifying the portion of the expression netlist having the at least one characteristic associated with the combinational loop further comprises computing a strongly connected component in the expression netlist, the strongly connected component corresponding to the identified portion of the expression netlist having the at least one characteristic associated with the combinational loop.
13. The apparatus of claim 11 , wherein detecting the presence of the combinational loop in the expression netlist further comprises identifying at least one input of the strongly connected component utilized to implement the combinational loop, and wherein translating the identified portions of the expression netlist into the bit-level circuit representation further comprises performing bit-blasting operations on a portion of the strongly connected component corresponding to the at least one input, which generates the bit-level circuit representation.