1. A computer implemented method for performing performance analysis for a target machine which comprises a software portion and a hardware portion, comprising: describing a design for the target machine as a network of logical entities; selecting at least one of the logical entities for a software implementation; implementing a source software program for the logical entities selected for the software implementation; generating an optimized assembler code for the software program, wherein the optimized assembler code is an assembly-language representation of the software implementation; performing a performance analysis using the optimized assembler code, wherein the act of performing the performance analysis is performed by a processor; generating a software simulation model in a high level language format based at least in part upon the optimized assembler code by annotating the software simulation model with information related to hardware on which the software implementation runs based at least in part upon a result of the act of performing the performance analysis to capture a dynamic interaction between tasks during runtime, wherein the act of annotating the software simulation model is performed during a time of the act of generating the software simulation model; storing the software simulation model on a computer usable storage medium; generating a hardware and software co-simulation model using the software simulation model; and storing at least the hardware and software co-simulation model on the computer usable storage medium or a second computer usable storage medium or displaying the at least the hardware and software co-simulation model on a display apparatus.
3. The method of claim 1 , further comprising selecting at least one of the network of logical entities for a hardware implementation, and using an existing software model of the hardware implementation from the at least one of the network of logical entities, wherein the hardware and software co-simulation model is generated using the existing software model of the hardware implementation.