1. A processor-implemented method for increasing the reliability of a circuit design by managing safe operating area assertion violations, the method comprising: using a processor that reads and executes instructions from a non-transitory storage medium for: transforming simulator output into descriptive data, regarding safe operating area assertion violations, wherein the descriptive data is compatible with a database; executing queries with the database on the descriptive data regarding the safe operating area assertion violations according to user input; and generating tangible query results regarding the safe operating area assertion violations for the circuit design to work for its intended purpose.
3. The method of claim 1 wherein the simulator output comprises numerical simulation results and safe operating area assertion violation messages.