7. The semiconductor memory cell MWA encoding apparatus of claim 6 , further comprising: table lookup logic coupled to the XOR logic to receive the DELTA_D and to index the plurality of potential MWA code words DELTA_C(I) from the table using the DELTA_D.
6. The semiconductor memory cell MWA encoding apparatus of claim 2 , entries in the delta encoding LUT determined by generating all bit combinations of a (2^m−1) bit word with at most two bits set to create LUT DELTA_C(I) values, decoding each LUT DELTA_C(I) value using an off-line MCRA decoder at a time prior to encoding to determine a LUT DELTA_D value corresponding to each LUT DELTA_C(I) value, and associating the LUT DELTA_D values and the corresponding LUT DELTA_C(I) values in the LUT.