4. The circuit of claim 3 , wherein the processor is further configured to locate entries in the guest TLB and root TLB having a common GPA domain, the processor writing the entry to the collapsed TLB based on the located entries in the guest TLB and root TLB.
3. The circuit of claim 1 , wherein the processor is further configured to write an entry to the collapsed TLB based on the entries in the TLB.