2. The integrated circuit of claim 1 , wherein the length module further comprises: an end value pipeline having a plurality of stages that calculate for each of the N symbols an end value as a cumulative length from a first symbol to the Nth symbol in the array of N symbols; and a symbol position stage that adds an end byte from a last symbol of a previous word to the cumulative length for each symbol and that splits each end value into an end byte and an end word, to obtain the end byte values and the end word values.
3. The integrated circuit of claim 2 , wherein the end values are split into two equal sized fields.