2. Apparatus as claimed in claim 1 wherein said third means comprises: gating means including first and second inputs for receiving the first and second series of constants from said second means and further including third input means; summation means and storage means for initially receiving the serial binary number supplied by said first means and comparing this number with a constant received from said second means during said first word time of the time frame and subsequently summing the constant received from said second means with a stored value of the previous summation; and means for detecting the sign of the word resulting from each summation by said summation means and presenting a signal indicative of the detected sign to said third input of said gating means during the following word time.
3. Apparatus as claimed in claim 2 wherein: said third means includes a J-K flip-flop for providing the sign detection; said gating means includes NAND gates which pass the constants from said first series if the sign of the previous word is positive and pass the second series of constants if the sign of the previous word is negative; and said fifth means includes storage means for providing the converted BCD number word output during the entire time frame following the conversion time frame.