11. A method of caching address translations in a memory architecture, comprising: storing translations between a first address domain and a second address domain to a first logical portion of a first cache; storing translations between the second addressing domain and a third address domain to a second logical portion of the first cache; storing translations between the first address domain and the third address domain, based on entries in the first cache, to a second cache; and storing tags associated with the translations of the first and second cache to a third cache; writing an entry to the third cache, the entry including a subset of fields populated from a corresponding translation stored at the second cache; detecting a deleted entry in at least one of the first logical portion and the second logical portion; invalidating corresponding entries in the second and third caches; and in response to detecting an absence of a matching entry in the second cache, matching the address request against the first cache, the address result corresponding to an entry in the first cache.
20. The method of claim 11 , wherein the first address domain is a guest virtual address domain, the second address domain is a guest physical address domain, and the third address domain is a root physical address domain.