13. The system of claim 11 further comprising: means for optimizing the design by reducing the number of copies of the circuit component.
11. The system of claim 9 further comprising: means for creating multiple copies of the circuit component, wherein representations of a lower-level circuit instance vary from one branch to another branch due to at least out-of-module-reference, automatic inserted connection module, Verilog-AMS defined parameter, or VHDL-AMS package reference; and means for representing the design using the multiple copies of the circuit component.