19. The method of claim 18 , wherein: the user-defined specification includes a description of an instruction's semantics which is independent of a target pipeline of the processor; and the hardware generation step includes generating as part of the processor hardware implementation a pipeline based on a pipeline description separate from the instruction semantics.
18. The method of claim 11 , wherein the user-defined specification includes a description of an instruction which requires a plurality of processor cycles to be processed.