3. The method of claim 1 , wherein the desired circuit structures represent logic structures at a higher level of organization than AOI (AND-OR-Invert) logic gates.
1. A method comprising: executing a design modification engine (DME) using one or more computers each comprising at least a processor and a memory, wherein executing the DME comprises: receiving a Register Transfer Language (RTL) code base representative of an integrated circuit; receiving a configuration file comprising transformation definitions and transformation commands defining where and how to transform existing code to modified code in the received RTL code base; parsing the received RTL code base, and automatically identifying, according to the definitions contained in the configuration file, sections of code within the received RTL code base as the received RTL code base is parsed; automatically transforming the identified sections of code according to the definitions contained in the configuration file, comprising rewriting the identified sections of code in a way that ensures that the transformed identified sections of code synthesize to desired circuit structures; and outputting a modified RTL code base comprising the transformed identified sections of code, wherein the modified RTL code base and the received RTL code base are representative of identical functionality.