16. The method of claim 14 , wherein the scheduling information includes a statement that an operation of an instruction exits a pipeline of the processor at a given stage.
14. The method of claim 11 , wherein the user-defined specification includes a statement specifying scheduling information of instructions used in the software development tools, and wherein the hardware generation step includes, based on the statement in the user-defined specification, determining whether and how to generate a description of at least one of pipeline logic, pipeline stalling logic and instruction rescheduling logic.