35. The system of claim 33 , wherein the decoders comprise content addressable memories embedded within the programmable logic device and configurable per the programmable resources of the programmable logic device to receive the outputs of the receivers and to source decode information to the logic.
33. The system of claim 28 , wherein: at least a portion of the receivers, the decoders, the logic, the parsing circuitry, the storage registers, and the controller comprise devices embedded within a programmable logic device; and another portion thereof comprise configured programmable resources of the programmable logic device.