15. The processor of claim 14 , further comprising a performance analyzer configured to analyze performance of said first memory virtualization technique as applied to said first application executing on said processor during said executing, wherein said dynamically selecting a second memory virtualization technique is dependent on said analyzing.
16. The processor of claim 15 , wherein to analyze performance of said first memory virtualization technique, said performance analyzer is configured to: monitor one or more of: a number of translation lookaside buffer (TLB) misses, a number of trap handler calls, a memory access time, a number of table look-up operations, a distribution of memory accesses, and a size of data structures accessed; and compare results of said monitoring to one or more performance criteria.