8. An integrated circuit for communicating with a network processor via a serial link interface, the integrated circuit comprising; a request pipeline configured to receive request data words from the network processor, wherein the request data words are organized into periodically repeating request link frames of a predefined word length; a link frame detector configured to identify a start of a request link frame comprising a plurality of words of a predefined word length; a training word generator configured to insert response training words into a response link frame; and a response pipeline output configured to send the response link frame to the network processor in response to detecting the start of the request link frame, wherein the response link frame has a response training word latency corresponding to a request training word latency.
9. The integrated circuit of claim 8 , wherein the integrated circuit comprises a knowledge based processor (KBP).