5. A circuit for recognizing a sequence of spelled character signals according to claim 4 wherein said modified candidate word generating means further comprises means jointly responsive to the absence of another probable character for substitution in the leftmost position of the array and the presence of an ignore mismatch character in the stored candidate word for generating a fourth signal; and means responsive to said fourth signal for forming a modified candidate word by shifting said ignore mismatch character to the adjacent left position of the stored candidate word.
6. A circuit for recognizing a sequence of spelled character signals according to claim 5 wherein said modified candidate word generating means further comprises means jointly responsive to the ignore mismatch character being in the leftmost position of the stored candidate word and the absence of a probable character for substitution in the next to leftmost position of the array for terminating said directory store selected reference word sequence searches.