3. The hardware finite automata manager of claim 1 , further comprising a memory coupled to the engine manager and configured to store a plurality of pre-fetch hardware finite automata designs, wherein the engine manager is effective to program the hardware finite automaton with the at least one program instruction so as to correspond to the at least one stored pre-fetch hardware finite automata design such that the programmed hardware finite automaton is effective to pre-fetch the data from the memory.
4. The hardware finite automata manager of claim 3 , wherein the engine manager is further effective to program the hardware finite automaton to: store the pre-fetched data in a cache associated with the particular core.