6. The character detection circuit of claim 4, further including: a peak detector having an input coupled to the output of said subtractor and a servo bit output adapted for signaling a positive peak value on the output of said subtractor based on said differences provided by said subtractor.
4. A character detection circuit for determining a character value for a signal having a frequency, said character detection circuit comprising: a delay element having an input for receiving sample values derived from the signal and an output adapted for providing a sample value received on said input after a predetermined period of time; and a subtractor having a first input coupled to said output of said delay element, a second input coupled to said input of said delay element, and an output adapted for providing a difference between a value provided to said first input and a value provided to said second input.