15. The computer program product of claim 8 , wherein the synthesized circuit description comprises a gate level netlist or a transistor level netlist.
8. A computer program product comprising: one or more computer readable storage media; program instructions stored on the one or more computer readable storage media, the program instructions comprising instructions for causing one or more processor(s) to perform the following operations: receiving, by the one or more processor(s), a text-based description of a logic circuit comprising a plurality of logic sub-circuits, wherein the text-based description comprises hierarchical hardware description language statements that define the logic circuit and the plurality of logic sub-circuits, determining within the text-based description, by the one or more processor(s), a set of circuit priority indicators that are explicitly indicated within the text-based description, for a corresponding set of the logic sub-circuits, synthesizing, by the one or more processor(s), the logic circuit according to the set of circuit priority indicators to provide a synthesized circuit description without requiring, or waiting for, estimation of a circuit slack for any of the plurality of logic sub-circuits; and fabricating the logic circuit using the synthesized circuit description wherein a circuit priority indicator is a function parameter.