2. A frequency sensing circuit according to claim 1 wherein said means for sampling comprises means for sampling at a rate that is N times the desired frequency to be sensed.
1. A frequency sensing circuit comprising: means for sampling an input signal; means coupled to said means for sampling, for encoding each sample as a digital signal at an output thereof; an adder having a first input coupled to the output of said means for encoding and having a second input and an output; delay means having an input coupled to the output of said adder for delaying signals applied thereto by an amount that is approximately an integral multiple of one-half the time period of the frequency to be sensed, said delayed signals being provided at an output; a multiplier having an input coupled to the output of said delay means and having an output coupled to said second input of said adder; means for clocking said multiplier at a rate of two or more times the desired frequency to be sensed; and means coupled to said frequency sensing circuit for deriving an output signal therefrom having a magnitude indicative of the presence of the frequency to be sensed in said input signal.