1. An execution unit for executing multiple context threads comprises: an arithmetic logic unit to process data for executing threads; control logic to control the operation of the arithmetic logic unit; context event switching logic including signal inputs from a plurality of shared resources with the signal inputs causing the context event logic to indicate that threads are either available or unavailable for execution; a set of memory location for storing a list of available threads that are ready to be executed; a set of memory locations for storing a list of unavailable threads that are not ready to be executed; general purpose register set to store and obtain operands for the arithmetic logic unit; a read transfer register for inputting data to the execution unit; a write transfer register for outputting data from the execution unit; wherein the read and write transfer register sets are divided into a plurality of banks and a plurality of relatively addressable windows that correspond to individual threads to execute in the processor and where execution of a read or write instruction to a memory location causes a corresponding read or write to a location in the transfer registers.