1. A memory storage access control circuit for coupled mask-programmed microcontrollers comprising an external program and data memory storage; a common data and address bus directly connected to the external program and data memory storage; a first microcontroller having a first plurality of bidirectionally operable ports and accessing the external program and data memory storage through the common data and address bus directly connected to the first plurality of bidirectionally operable ports; a second microcontroller having a second plurality of bidirectionally operable ports connected respectively in parallel to the first bidirectionally operable ports of the first microcontroller by way of a pin-to-pin connection and accessing the external program and memory storage through the common data and address bus, wherein the first microcontroller is operated as a master and wherein the second microcontroller is operated as a slave relative to the first microcontroller; a communication link furnished between the first microcontroller and the second microcontroller, wherein the communication link between the first microcontroller and the second microcontroller is controlled by software and hardware; a multiplexer furnishing logical means connected to the external program and data memory storage and to the first microcontroller and to the second microcontroller for multiplexing external memory storage release signals and for multiplexing external address release signals of the first microcontroller and of the second microcontroller by a multiplex signal, delivered by a port used as a slave select port of the first microcontroller, representing the master, and operated as an output wherein the first microcontroller, operating as the master, decides by way of its internal mask program which one of the first microcontroller and the second microcontroller should have access authorization to the external program and data memory storage, and wherein the external memory storage release signals and the external address release signals are fed as a memory storage access signal and an address access signal to the external program and data memory storage, and wherein simultaneously the multiplex signal is used to deliver the memory storage access signal to the second microcontroller, and wherein a mask program of that one of the first microcontroller and the second microcontroller, which has not received an external memory storage access authorization, operates bidirectionally operable ports of the microcontroller without the external memory storage access authorization as high resistency inputs; a plurality of microcontrollers up to an n-th coupled microcontroller, wherein n represents the total number of microcontrollers and is larger than 2, wherein m port outputs used as slave select port outputs of the first microcontroller operating as a master are used in order to form the multiplex signal and in order to multiplex external memory storage release signals and address release signals of those microprocessors operating as slaves, and in order to feed the external memory storage release signals and the address release signals to the external program and data memory storage as memory storage access signal and as address access signal, wherein n is smaller than 2m, wherein the multiplex signal accesses the logical means, which are provided as n to 1 multiplexer, and wherein the multiplex signal simultaneously commands the selected microcontroller to access the external program and data memory storage through slave select port inputs of the selected microcontroller; wherein the mask code of each one of the plurality of microcontrollers beginning with the second microcontroller, coupled to the master microcontroller, operates an acknowledgment port connector of each one of the plurality of microcontrollers beginning with the second microcontroller as an input with a pull-up resistor, and wherein the mask code switches the acknowledgment port connector as an output during the external memory storage access in order to deliver a message to a master of an external memory storage access; wherein the first microcontroller representing the master receives at its acknowledgment port connector a handshaking signal from a microcontroller of the plurality of microcontrollers beginning with the second microcontroller, wherein said handshaking signal is furnished to the master for the external memory storage access, and wherein this handshaking signal confirms the memory storage access and the end of the memory storage access of the slave to the master.