1. Resistive random access memory, comprising: a plurality memory cells comprising programmable material; the programmable material having selectively interchangeable resistive states; each of the memory cells being uniquely addressed through a bitline/wordline combination; and memory bits comprising multiple memory cells coupled together; the coupled memory cells within each memory bit being in the same resistive state as one another; wherein the memory bits comprise paired memory cells; and wherein the paired memory cells of memory bits are addressed by paired wordlines and individual bitlines.