1. A system for checking a program memory of a processing unit, comprising: an instruction counter connected to the program memory, wherein the instruction counter includes: a register connected to a first changeover switch configured to set the register content; and an ancillary counter connected to the register and configured to run through instruction address space of the program memory independently of program code during normal operation; wherein the ancillary counter includes a second changeover switch exchanging data between an intermediate memory and the register, wherein the second changeover switch is connected to the register via the intermediate memory.