1. A method for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system comprising: providing a system processor; providing an accelerator function unit (AFU) implemented in a field programmable gate array (FPGA) residing behind a Coherent Attached Processors Interface (CAPI) unit; providing an AFU system irritator in said AFU; said system processor configuring the AFU and enabling said AFU system irritator to execute; said system processor replicating said AFU system irritator to create additional irritation and said AFU system irritator being re-programmable.