1. A method for a cache coupled via a bus to a debug circuit, the method comprising: the bus receiving a request from the debug circuit, wherein the request comprises a target specifier, a cache specifier and a cache entry, wherein the target specifier specifies a target circuit which comprises the cache and is a target of the request from the debug circuit, and wherein the cache specifier specifies which cache within the target circuit is being accessed for the request; and in response to the bus receiving the request from the debug circuit, providing a response to the debug circuit via the bus, wherein the response comprises at least a portion of a tag address content corresponding to a cache entry in the cache, wherein the at least the portion of the tag address content comprises tag information actually stored in the cache itself, and wherein even when a dirty bit associated with the cache entry indicates that data stored in the cache entry is dirty, the data stored in the cache entry is provided to the debug circuit via the bus and neither the cache entry is modified nor the dirty bit is cleared.