1. A parallel computer architecture for voxel processing comprising: a plurality of processor elements constructed in a cube-like structure having a plurality of rows, columns, and planes, each processor element comprising a memory, a CPU, a float point unit, and six communication ports, each processor element connected via said communication ports to its nearest neighbor processor element, wherein said processor elements comprise internal, vertex, edge, and face processor elements and wherein said vertex, edge and face processor elements are in a cross-row, cross-column, and cross-plane communicable relationship with other vertex, edge and face processor elements, in said cross-row communicable relationship, a first processor element in a row is in direct communication with a last processor element in a previous row except for a first row, in said cross-column communicable relationship, a first processor element in a column is in direct communication with a last processor element in a previous column except for a first column, in said cross-plane communicable relationship, each of the processor elements in a first plane except processor elements in a first column of the first plane is in direct communication with a processor element from a previous column of the same row in a last plane.