1. Apparatus for processing data, said apparatus comprising: at least one memory having a plurality of memory storage locations associated with respective memory addresses; a self-test controller operable to control self-test of said at least one memory including generating physical memory address signals; and a mapping circuit operable to map said physical memory address signals generated by said self-test controller to corresponding logical address signals for use by said at least one memory to perform a memory test based upon a physical position of memory storage locations.