1. In an electronic design automation (EDA) software tool, a method for synthesizing a buffer tree, the method comprising: receiving a source node and a set of sink nodes; and constructing the buffer tree by recursively performing at least the following operations by starting from the set of sink nodes and progressively moving toward the source node: forming one or more clusters by grouping one or more sink nodes together; determining a capacitive load for each cluster; performing a table lookup on a lookup table based on the capacitive load to obtain an optimal size of a buffer or an inverter and an optimal spacing, wherein the lookup table associates capacitive load values with corresponding optimal buffer or inverter sizes and optimal spacing values; and placing the buffer or the inverter of the optimal size at one or more locations in the buffer tree based on the optimal spacing.