1. A method for operating a neuromorphic memory circuit, the method comprising: accumulating a dendrite leaky integrate and fire (LIF) charge over time on a conductive dendrite LIF line; transmitting an axon LIF pulse on a conductive axon LIF line; switching on a LIF transistor by the axon LIF pulse such that the LIF transistor provides a discharge path for the dendrite LIF charge through a programmable resistive memory element when the axon LIF line transmits the axon LIF pulse; transmitting a dendrite spike timing dependent plasticity (STDP) pulse if voltage at the dendrite LIF line falls below a threshold voltage; transmitting an axon STDP pulse on a conductive axon STDP line; switching on a STDP transistor by the axon STDP pulse, the STDP transistor providing an electrical path for the dendrite STDP pulse through the programmable resistive memory element when the axon STDP line transmits the axon STDP pulse.