1. A prefetch/predecode unit comprising: a prefetch buffer configured to store predecode data corresponding to a first plurality of instruction bytes, and wherein said prefetch buffer is further configured for storing a pointer indicating one of said first plurality of instruction bytes; and a control unit coupled to said prefetch buffer and coupled to receive a predecode request and a second plurality of instruction bytes, wherein said control unit is configured to predecode said first plurality of instruction bytes to generate said predecode data, and wherein said control unit is configured to interrupt predecoding of said first plurality of instruction bytes in response to receiving said predecode request, and wherein said control unit is configured to update said pointer according to a particular one of said first plurality of instruction bytes at which predecoding is interrupted, and wherein said control unit is configured to resume predecoding at said one of said first plurality of instruction bytes indicated by said pointer subsequent to predecoding said second plurality of instruction bytes.