1 A VLSI circuit for implementing in hardware any multiple output combinational circuit having the output functions expressed in logical sum-of-product equation, with m inputs, r outputs and n product terms p(k), comprising: a register with m bits for storing the input variables; n cells, a cell C(k) for determining the logical value of a product term p(k) of said equations for given inputs; a logical summing circuit, realised with r OR gates each one with n inputs, associated with said cell C(k) for receiving the logical value of product terms p(k) and outputting the r bits of output functions.