1. A method, in a data processing system comprising at least one hardware-implemented processor and at least one memory, for generating a logic design of an integrated circuit device, comprising: receiving, in the data processing system, an initial logic design representation of the integrated circuit device; identifying, by the data processing system, one or more areas of the initial logic design representation where logic elements in the one or more areas can be replaced with one or more multiplexer tree structures; replacing, by the data processing system, logic elements in the one or more areas of the initial logic design representation with multiplexer tree structures to generate a modified logic design representation; and outputting, by the data processing system, the modified logic design representation to a physical synthesis system to generate a physical layout of the integrated circuit device based on the modified logic design representation.