1. A processing unit configured to allow separate parallel memory spaces to be accesses using a unified memory space address, the processing unit comprising: a mapping unit configured to: extract a value from a window field in the unified memory space address; and determine whether the value corresponds to a local memory space, wherein unified memory space addresses within the local memory space window are accessible by individual threads; if the value corresponds to the local memory space, then map the unified memory space address to a local memory address that is accessible by a thread; or if the value does not correspond to the local memory space, then determine whether the value corresponds to a shared memory space, wherein unified memory space addresses within the shared memory space window are accessible by threads in thread arrays; if the value corresponds to the shared memory space, then map the unified memory space address to a shared memory address that is accessible by threads in a thread array; or if the value does not correspond to the shared memory space, then map the unified memory space address to a global memory address, wherein unified memory space addresses within the global memory space window are accessible by all threads in all thread arrays.