1. A processor comprising: a processor core; a memory unit coupled between the processor core and a main memory, the main memory comprises an unprotected region and a protected region that includes a secured page; and a page miss handler (PMH) coupled to the memory unit, the PMH to maintain access control information for the protected region, wherein the processor core is to: determine that a nested exception occurred while executing a first set of instructions for an application, wherein the nested exception is a second exception that occur during an execution of a handler for a first exception; in response to the nested exception occurring, invoke a first subroutine of the application, the first subroutine to forward exception context for the nested exception to a second subroutine of the application stored in the unprotected region; invoke, by the second subroutine, a third subroutine to execute a second set of instructions associated with the exception context for the one or more exceptions that occur within the first exception; invoke, by the second subroutine, the third subroutine to execute a third set of instructions associated with the exception context for the first exception; and resume executing the first set of instructions for the application.