1. A data processing system, the system comprising: a channel detector circuit, the channel detector circuit including: a branch metric calculator circuit operable: to receive a number of violated checks from a preceding stage, and to scale an intrinsic branch metric using a scalar selected based at least in part on the number of violated checks to yield a scaled intrinsic branch metric; and an intrinsic LLR calculator circuit operable to receive the scaled intrinsic branch metric and to calculate an intrinsic LLR output.