1. An apparatus, comprising: a processor configured to execute a set of instructions including instructions specifying as operands registers in a set of logical registers, wherein the processor includes: a set of physical registers available as rename registers; a circuit configured to store information indicating a current mapping between a) registers in the set of logical registers that are specified by instructions being executed by the processor and b) registers in the set of physical registers, wherein the circuit is further configured to use the stored information to determine that a dependency exists between: a first floating-point instruction in an instruction stream of the processor specifying a first portion but not other portions of a first of the set of logical registers as a destination; and a second, subsequent floating-point instruction in the instruction stream collectively specifying at least the first portion and a second portion of the first logical register as a source.