1. An apparatus for abstract memory addressing comprising: a processor for generating an abstract memory address; a base register for storing a base memory address; a first adder for adding the base memory address to the abstract memory address and generating a physical address for a device memory; a pointer register for storing the physical address, wherein the pointer register is coupled to the device memory; and a second adder coupled to the processor, the base register and the pointer register, the second adder for subtracting the base memory address from the physical address and generating the abstract memory address.