1. A method for generating a command file of a group of design rule check (DRC) rules for being used by a layout verification tool to verify the design of an integrated circuit, the method comprising: (a) selecting a process from a group of processes; (b) setting a set of parameters; and (c) extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a corresponding command file of DRC rules.