1. An integrated memory device, comprising: an array of memory cells for storing data; a memory cell selector operationally coupled to the array for selecting at least one memory cell of the array; a data interface adapted to store data provided to the data interface in a selected memory cell and to provide data stored in a selected memory cell to the data interface for retrieval; and a control circuit operationally coupled to the memory cell selector and the data interface, the control circuit comprising a signal modulator adapted to generate clock signals of different frequencies and, in a test mode of the integrated memory device, to provide a clock signal with a predefined clock frequency associated with a predefined operating parameter to a connection of the data interface.