1. A multithreaded computer system, comprising: a plurality of processor elements, each of which is operable to execute a process including a plurality of threads; and a control unit operable to switch threads to be executed in each processor element, wherein said control unit includes: a plurality of execution order registers, each of which is provided for a corresponding one of said processor elements, and which holds an execution order of threads to be executed by said corresponding processor elements; a plurality of counters, each of which is provided for a corresponding one of said processor elements, each counter counting an execution time period for a thread that is being executed by said corresponding processor element and generating a timeout signal when the counted time reaches a limit assigned to the thread; and a scheduling circuit operable to switch the thread that is being executed to the thread to be executed by each processor element based on the execution order held in said execution order register and the timeout signal.