1. A programmable logic device capable of changing an arithmetic operation function by changing a combination of a plurality of circuit blocks, comprising: a first arithmetic operation circuit and a second arithmetic operation circuit being different from each other in combination and connection states of the circuit blocks, and both performing the same arithmetic operation; and an output section being provided in each of the first arithmetic operation circuit and the second arithmetic operation circuit, and outputting arithmetic operation results of the first arithmetic operation circuit and the second arithmetic operation circuit to a verification circuit that verifies the arithmetic operation results.