1. A memory device comprising: a first electrode of a resistance change element which comprises a crystallized Si x Ge 1-x layer (0≦x<1); a second electrode of a resistance change element which comprises a metal element; a variable resistance part between the first and second electrode, the part comprising an amorphous Si layer; a control circuit controlling a filament in the amorphous Si layer, the filament comprising the metal element, and an inter layer between the Si x Ge 1-x layer and the amorphous Si layer, the inter layer isolating crystal structures of the Si x Ge 1-x layer and the amorphous Si layer from each other.