1. A computer-implemented method for generating a test pattern, the method comprising: selecting a first lwarx instruction; pseudo-randomly selecting a first address for the first lwarx instruction; building the first lwarx instruction using the first pseudo-random address into a test pattern; reserving the first pseudo-random address for a first stwcx instruction that is paired to the first lwarx instruction; selecting the first stwcx instruction; building the first stwcx instruction into the test pattern using the first pseudo-random address, wherein a first conflicting instruction does not exist in the test pattern between the first lwarx instruction and the first stwcx instruction.