1. A nonvolatile memory cell comprising: a floating gate MOS transistor including: a semiconductor body having a doping of a first type; first and second semiconductor regions having a doping of a second type, said first and second semiconductor regions spaced apart to form a channel region in between said first and second semiconductor regions in said semiconductor body; a floating gate disposed above said channel region in said semiconductor body; a floating gate dielectric disposed between said floating gate and said semiconductor conductor body; a control gate; a control gate dielectric disposed between said control gate and said floating gate; and a tunneling charge injector including: a conducting injector electrode from which charge is emitted; a grid insulator disposed adjacent said conducting injector electrode; a grid electrode disposed adjacent said grid insulator; a retention insulator disposed adjacent said grid electrode; and a floating gate electrode disposed adjacent said retention insulator and coupled to said floating gate of said floating gate of said floating gate MOS transistor.