1. A method of operating a digital processing system having only fixed point arithmetic hardware to multiply a fixed point number whose value is only known at runtime by a floating point constant known at compile-time comprising: loading a first fixed point mantissa and a first fixed point exponent from memory into a fixed point processor, the first fixed point mantissa and the first fixed point exponent representing a first floating point constant that was converted at compile-time into the first fixed point mantissa and the first fixed point exponent; multiplying the first fixed point mantissa by a first fixed point value for a runtime variable to calculate a first intermediate number using fixed point processor instructions; and shifting bits of the first intermediate number to the left or right based on the value of the first fixed point exponent to obtain a first result.