1. A method, comprising: adjusting a voltage on an access line coupled with a memory cell and a capacitor to a threshold voltage of a switching component; applying a voltage across the memory cell of a memory array; charging the capacitor coupled with the memory cell based at least in part on the voltage across the memory cell, wherein charging the capacitor comprises activating the switching component coupled with the access line; pulling, using the switching component, a current from the access line based at least in part on activating the switching component; determining an amount of charge on the access line based at least in part on pulling the current from the access line, wherein determining the amount of charge on the access line is based at least in part on a number of times the switching component pulls a portion of the current from the access line; and determining a logic state of the memory cell based at least in part on charging the capacitor and adjusting the voltage on the access line.