1. A method of testing an integrated circuit, comprising the acts of: determining at least one test pattern to be applied to the integrated circuit, the test pattern including a sequence of binary values, wherein only particular ones of the values are specified for testing, remaining ones of the values initially being unspecified; determining each of the unspecified values by setting each unspecified value as being equal to the immediately preceding value in the sequence at a predetermined probability greater than 0.5 and less than 1, each unspecified value otherwise being an inverse of the immediately preceding value; applying the test pattern to the integrated circuit; and determining a resulting state of the integrated circuit.