1. In a microprogrammed digital computer adapted for carrying out macroinstructions by means of microprograms, a microprogrammed control unit comprising: an addressable microprogram memory for storing a plurality of microprograms each composed of a plurality of microinstructions; means for sequentially reading out said microinstructions including a first addressing register connected to said microprogram memory and adapted to address the latter; an output register connected to store microprogram instructions read out from said microprogram memory; an addressable transcoding memory for storing a plurality of digital transcoding words; a second addressing register connected to said transcoding memory and adapted to address the latter; a decoding network connected to the output of said output register and through control gates to the output of said transcoding memory, said decoding network being responsive to a microinstruction received from said output register and to at least a portion of a transcoding word received from said transcoding memory for generating microcommands; a control network connected to receive said microcommands; and a communication network controlled by said control network, said communication network including a first communication path from the output of said transcoding memory to the input of said second addressing register, a second communication path from the output of said transcoding memory to said decoding network, a third communication path from a working register of the computer to the input of said second addressing register to transmit to said second register for storage therein an operating code of macroinstructions, and a fourth communication path from the output of said transcoding memory to said first addressing register; whereby at least a portion of a digital transcoding word read out from said transcoding memory provides addressing of said transcoding memory and of said microprogram memory.