1. A method for determining scan lanes, the method comprising: for a set of patterns, estimating a number of scan lanes to be utilized on an accelerator of a computer processor; iteratively incrementing the number of the scan lanes estimated for the set of patterns to optimize a throughput of the accelerator; distributing the set of patterns to the number of the scan lanes as a distribution, each one of the scan lanes having a predetermined number of engines; and evaluating a size of a memory space needed for the distribution to distribute the set of patterns onto the number of scan lanes.