1. A method, comprising: measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array; mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array; and selecting a column or row in the memory array to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.