1. A memory apparatus for use with a host system, the memory apparatus comprising: a plurality of memory circuits on a registered dual in-line memory module (R-DIMM); and one or more components electrically couplable to the host system, the one or more components being operable to present to the host system a simulated memory circuit where there is a difference in at least one aspect between the simulated memory circuit and one or more memory circuits of the plurality of memory circuits, wherein each memory circuit of the plurality of memory circuits is electrically coupled to at least one of the one or more components, where the one or more components are further operable to identify at least one memory circuit of the plurality of memory circuits that is not being accessed; and a chip on the R-DIMM operable to perform a power-saving operation on the at least one memory circuit identified as not being accessed.