1. A computer program product for providing access to registers available to program instructions of a program in a computer having a plurality of registers, each of said plurality of registers comprising a high order portion and a low order portion, each of said program instructions comprising an opcode specifying an operation, each of said program instructions comprising a register field for selecting any of said plurality of registers, the register field of a program instruction specifying a register of the plurality of registers for holding a corresponding register operand, the computer program product comprising a non-transitory tangible storage medium readable by a processing circuit and storing program product instructions for execution by the processing circuit for performing a method comprising: executing, by the processing circuit, said program instructions, the executing comprising: based on an instruction being an instruction of a first subset of said program instructions, wherein the first subset of said program instructions is configured to permit the register field to only access the high order portion of said plurality of registers, accessing, by the processing circuit, a register operand consisting of only the high order portion of a corresponding register; and based on an instruction being one of a second subset of said program instructions, wherein the second subset of said program instructions is configured to permit the register field to only access the low order portion of said registers, accessing, by the processing circuit, a register operand consisting of only the low order portion of the corresponding register; wherein, except for the register operand portion being accessed, each instruction of the first subset of said program instructions performs an identical function as a corresponding instruction of the second subset; and wherein main storage addresses are entirely from the low order portion of a register in a first addressing mode and are formed from a combination of the high order portion and the low order portion of a register in a second addressing mode, the method further comprising: based on determining that a high-word facility is installed, permitting execution of instructions of said first subset of instructions; and based on determining that the high-word facility is not installed, blocking execution of instruction of said first subset of instructions.