1. A Hardware Abstract Data Structure (HADS), comprising a General Interface (GI), a Control and Configuration Logic (CCL) and a Memory Pool (MP), wherein the GI is arranged to implement intercommunion between the HADS and a processor, receive a configuration command from the processor and send the configuration command to the CCL, the configuration command comprising at least information of a hardware data structure requiring to be configured, wherein the CCL is arranged to, in response to the configuration command received by the GI, configure the hardware data structure for the MP such that a memory block in the MP is configured in the required hardware data structure, the hardware data structure requiring to be configured is selected by the processer from a plurality of hardware data structures, and wherein the MP is arranged to store data.