1. An integrated circuit, comprising: a reconfigurable logic array comprising a plurality of cells electrically coupled via an interconnect and configured to perform an identified task; one or more of the plurality of cells designated as an active cell configured with a sensor that identifies a back pressure condition at an interface coupled to the active cell, wherein the active cell communicates a do-not-end-step signal in response to the back pressure condition; a controller electrically coupled to the interconnect and arranged to receive the do-not-end step signal and suspend execution of the identified task in the reconfigurable logic array_in response to a global counter of a number of iterations to perform the identified task.