1. A method comprising: connecting a first terminal of a correlated electron switch (CES) element, the CES element comprising a resistance and a capacitance, to a bitline responsive to a voltage signal on a wordline, wherein the CES element is responsive to application of a first voltage across the first terminal and a second terminal of the CES element while maintaining a first current through the CES element to place a memory state of the CES element in a first memory state, and wherein the CES element is responsive to application of a second voltage between the first terminal and the second terminal while maintaining a second current through the CES element to place the memory state of the CES element in a second memory state; and increasing the capacitance in response to transition of the CES element from the first memory state to the second memory state, the increased capacitance being capable of absorbing at least some excess charge on the first terminal and substantially dissipate the excess charge through the resistance if the first terminal is subsequently disconnected from the bitline.