1. A resistive random access memory (RRAM) cell, comprising: a transistor; and an RRAM structure electrically connected to the transistor and having a bottom electrode having a via portion and a top portion, wherein said via portion of the bottom electrode is embedded in a first RRAM stop layer; a resistive material layer over the bottom electrode and having a same width as the top portion of the bottom electrode; and a top electrode over the resistive material layer and having a smaller width than the resistive material layer, wherein a full width of the entirety of the top electrode is substantially constant.