1. An apparatus comprising: an array of memory cells; and decode circuitry coupled to the array and including logic configured to modify an address corresponding to at least one data element in association with performing a corner turn operation on the at least one data element; wherein the logic is configured to modify the address corresponding to the at least one data element on a per column select basis; and wherein the corner turn operation is an operation that adjusts a storage format of the at least one data element.