1. A method of generating at least one matched-filter vector from a reference PN sequence, the reference PN sequence having an initial state and a first clock rate, comprising the steps of: a) capturing an initial state of the reference PN sequence; and b) generating at least one fast-forward PN sequence from the captured initial state, the fast-forward PN sequence having chip values equivalent to chip values of the reference PN sequence and having a second clock rate greater than the first clock rate, wherein each matched-filter vector corresponds to one fast-forward PN sequence having a corresponding code-phase offset when compared to the code phase of the reference PN sequence.