1. A method for designing complex, mixed signal circuits, comprising: generating electronic data defining a baseline schematic design; generating a parameterized parasitic-aware netlist using the baseline schematic design; performing design and process parameter statistical optimization using the parameterized parasitic-aware netlist and mixed signal component specifications; determining whether one or more predetermined design specifications are satisfied; optimizing the parameterized parasitic-aware netlist if it is determined that the one more predetermined design specifications are not satisfied; and generating electronic data defining a schematic-optimal layout design if it is determined that the one or more predetermined design specifications are satisfied.