1. A method of operating a multiprocessor system comprised of at least first and second processors, a system control element and a three level memory hierarchy, including a main memory at memory level three, connected to said system control element, in which pages of information are stored at addressable locations, with each page of information being comprised of lines of information, including WRITE and SHARE flags which may be in one of two binary states, with the state of the WRITE flag determining if a page of information is writeable or read only by a processor, and the state of the SHARE flag determining if a page of information is shareable or non-shareable by all processors, with each flag being set in a predetermined state, at least first and second private caches at memory level two, connected to said systems control element, which are exclusively operative with said at least first and second processors, respectively, memory, at least third and fourth private caches at memory level one which are exclusively operative with said first and second processors, respectively, and are connected to said first and second private caches, respectively, and first and second shared caches at memory levels one and two, respectively, which are connected together, with the first shared cache being connected to said first and second processors and the second shared cache being connected to said system control element, with pages of information being stored in the caches at memory level two, and lines of information being stored in the caches at memory level one, with said information being accessed with respect to said addressable locations in said main memory, said method comprising the steps of: interrogating by a given processor, to access a selected line of a given page of information, the private and shared caches at memory level one, and if said line is stored therein, accessing same, and if not; interrogating by said given processor the private and shared caches at memory level two, and if said given page of information is stored therein, transferring said selected line from said given page from the cache at level two in which the selected line is stored, to the cache at level one which is connected thereto and accessing same, and if not; interrogating by said given processor said main memory at memory level three via said system control element, with said system control element examining the state of said WRITE and SHARE flags of said given page of information, with said page of information being transferred to said shared cache at memory level two when said WRITE and SHARE flags are each in a given predetermined state indicative of said given page of information being both writeable and shareable, and being transferred to the private cache at memory level two, which is exclusively operative with said given processor, when at least one of said WRITE and SHARE flags are not in said predetermined state, which is indicative of said given page of information not being both writeable and shareable; and transferring said selected line from said given page from the cache at level two in which the selected line is stored, to the cache at level one which is connected thereto for access by said given processor.