1. An apparatus, comprising: a memory circuit disposed on an integrated circuit (IC) die; a processor disposed on the IC die, coupled to the memory circuit, and configured and arranged to retrieve and execute instructions from the memory circuit; a power management circuit disposed on the IC die and configured to determine a value indicative of an amount of power available to power the IC die; and a boot loader circuit disposed on the IC die, coupled to the power management circuit, and configured to: select one of a plurality of boot images based on the determined value indicative of the amount of power available and respective power ranges associated with the plurality of boot images, wherein each power range of the respective power ranges is a function of a size of the associated boot image; load a set of instructions included in the selected one of the boot images into the memory circuit; and enable the processor to execute the set of instructions.