1. A Programmable Resistive Device (PRD) memory, comprising: a plurality of PRD cells, at least one of the cells comprising: at least one PRD including at least a diode and a Programmable Resistive Element (PRE) formed in a contact hole at a crossover of first conductor lines and second conductor lines located in two or more vertical layers; the PRE coupled to the respective first conductor line; and the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and a second active region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the PRE and the second active region coupled to the respective second conductor line, wherein the PRE of the at least one PRD is coupled to another PRD or shared between two PRDs whose diode is coupled to the respective second conductor line or the respective third conductor line, such coupling is facilitated by an extension that extends vertically through the second conductor line penetrating into the second conductor to couple to the PRE or the diode of the another PRD, and wherein the PRE is configured to be programmable by applying voltages to the first conductor line, the second conductor line and/or the third conductor line to thereby change its resistance for a different logic state.