1. A method for improving digital testing of an analogue or mixed-signal circuit, the method comprising: inputting a digitized input test sequence to a fault free version of the analogue or mixed signal circuit or computer simulation thereof; inputting the same digitized input test sequence to a version of the circuit or computer simulation thereof that has at least one specified fault, using an optimization algorithm to vary the input test sequence; monitoring the outputs of the fault free and faulty circuits for each test sequence; and identifying an optimized digitized input test sequence, wherein the optimized digitized input test sequence is used to identify a corresponding digitized output for use in a test mode.