1. A microcontroller comprising: a first memory configured to store instructions; a second memory configured to store data; a third memory including a contiguous first portion configured to store instructions and a contiguous second portion that is distinct from the first portion and configured to store data, wherein the first portion includes memory elements of a first width configured into one or more pairs to store instructions of a second width for output onto an instruction bus of the second width, and wherein the second portion includes memory elements of the first width configured to individually store data for output onto a data bus of the first width; and a central processing unit configured to execute instructions and process data, wherein the instructions are selected from the instructions stored in the first memory and the instructions stored in the first portion of the third memory, the data are selected from the data stored in the second memory and the data stored in the second portion of the third memory, wherein the central processing unit is coupled to the first memory and the first portion of the third memory via the instruction bus, and the central processing unit is coupled to the second memory and the second portion of the third memory via the data bus that is separate from the instruction bus.