1. A system comprising: non-volatile memory (“NVM”); volatile memory comprising: a plurality of validity counters associated with a plurality of super blocks of the NVM, a tree comprising a plurality of entries, wherein the tree provides a mapping between a plurality of logical block addresses (“LBAs”) and physical addresses of the NVM; and a bitmap for storing mapping statuses of the plurality or LBAs; and memory interface comprising control circuitry operative to: receive a request to unmap a LBA of the plurality of LBAs; consult the bitmap to determine whether the LBA is unmapped; in response to determining that the LBA is not unmapped, unmap the LBA in the bitmap; update at least one of the plurality of validity counters by consulting the tree; and update the tree to reflect the unmapped LBA only if tree memory usage decreases with the update.