1. A system for designing an integrated circuit, comprising: at least one processor; and at least one memory including computer program code for one or more programs, the at least one memory and the computer program code configured to, with the at least one processor, cause the system to: generate a schematic of the integrated circuit based on a set of system design rule constraints; receive a proposed device array layout from a device array design module, the device array design module being configured to generate the proposed device array layout free from the set of system design rule constraints; generate a revised schematic of the integrated circuit including the proposed device array layout; and determine if the revised schematic violates one or more of the system design rule constraints.