1. A system for counting a number of received packets and a number of bytes contained in the received packets, comprising: a first memory disposed in an integrated circuit, the first memory being configured as a first combination counter having a first set of bits for storing a subtotal of received packets, and a second set of bits for storing a subtotal of bytes contained in the received packets; a second memory that is external to the integrated circuit, the second memory being configured to store a total number of received packets and a total number of bytes contained in the received packets; and update circuitry configured to update the total number of packets stored in the second memory using the first set of bits from the first memory and to update the total number of bytes stored in the second memory using the second set of bits from the first memory, whenever either of the first set of bits or the second set of bits overflows in the first memory.