1. A non-volatile semiconductor memory device comprising: a plurality of non-volatile semiconductor memory cells; an interface; and a control circuit for controlling the non-volatile semiconductor memory cells, wherein the device supports a first output mode for continuously outputting (N+M)-byte (N is the n-th power of 2, n is positive integers) data via the interface, and a second output mode for continuously outputting K-byte (K is the k-th power of 2, k is positive integers) data via the interface, and wherein the first output mode is substantially transferred to output standby state after continuously outputting the data, and the second output mode is automatically transferred to a normal operation mode after continuously outputting the data.