1. An integrated circuit, comprising: virtual function hardware accelerator modules that serve to improve performance for at least some virtual machine; and a virtualization accelerator management module that maintains a hierarchical accelerator resource availability registry, wherein the hierarchical accelerator resource availability registry specifies latency information corresponding to different types of hardware acceleration resources that are available to the integrated circuit for assisting with Network Functions Virtualization (NFV), wherein the hierarchical accelerator resource availability registry is configured to assign a first speed grade to hardware acceleration resources that are presently active on the integrated circuit and to assign a second speed grade to hardware acceleration resources that can be retrieved from a local storage device, and wherein the second speed grade is different than the first speed grade.