1. A processor, comprising: a results buffer having a plurality of registers, each register for temporarily storing a result of an executed instruction prior to the result being written to a register file; a results buffer allocater that generates identification values, wherein each identification value identifies a register of the results buffer in which an executed instruction result can be temporarily stored; and a graduation buffer having a plurality of registers, wherein identification values generated by the results buffer allocater are temporarily stored as part of a linked-list data structure.