1. A method of optimizing memory access in a hierarchical memory system, comprising: determining a first layered performance matching ratio between a first layer of the hierarchical memory system and a second layer of the hierarchical memory system, wherein determining the first layered performance matching ratio comprises: summing: (1) a ratio of: (a) a first hit time value to (b) a first hit concurrency value with (2) a product of: (i) a first pure miss rate value and (ii) a ratio of: (a) a first pure average miss penalty value to (b) a first pure miss concurrency value; and multiplying: (1) the determined sum by (2) a ratio of: (a) a value corresponding to a portion of instructions of an executable instruction set that accesses the hierarchical memory system to (b) a value corresponding to a number of cycles per executable instruction when no misses occur; comparing the determined first layered performance matching ratio to a first threshold layered performance matching ratio; and adjusting, if the determined first layered performance matching ratio exceeds the first threshold layered performance matching ratio, at least one of a set of computer architecture parameters of the hierarchical memory system corresponding to the first layered performance matching ratio.