1. An Application-Specific Integrated Circuit (ASIC) for implementing functionality equivalent to functionality of a Field Programmable Gate Array (FPGA), the ASIC comprising: a plurality of sets of hybrid logic elements (HLEs), each set of HLEs implementing functionality equivalent to functionality of a corresponding logic element (LE) of the FPGA; and interconnection resources comprising a first plurality of programmable connections, each connection in the first plurality of programmable connections programmable to interconnect a respective first set of HLEs in the plurality of sets of HLEs and a respective second set of HLEs in the plurality of sets of HLEs; wherein each HLE in the plurality of sets of HLEs comprises: selection circuitry configured to output one of a first input signal and a second input signal based on a third input signal; logic circuitry configured to receive the output of the selection circuitry and to provide a logic signal that is a logical function of at least one of the first input signal, the second input signal, and the third input signal; and a second plurality of programmable connections configured to interconnect the selection circuitry and the logic circuitry in one of a plurality of arrangements.