1. A computer Probabilistic Set Associative Cache (PAC) cache memory physically organized as a direct mapped cache; configured to be accessed with a cache tag search policy of a set-associative cache, in which one or more extra bits in cache directory entries are employed in addition to a direct mapped cache tag in order to implement a (1+P)-way set associative cache, where P is an override probability parameter chosen to determine average associativity, wherein the one or more extra bits indicate a home location node from a plurality of nodes within a given set, wherein the cache tag search policy searches the home location node prior to a remainder of the plurality of nodes when searching the given set; and configured to be modified by a replacement algorithm which implements two different replacement algorithms in one, namely a direct mapped and a (1+P)-way set associative replacement algorithm, where 0<P<1, wherein each node of said plurality of nodes is usable to cache only a single address at a time, wherein a home location node is only a portion of cache memory, wherein the one or more extra bits must allow designating a location storing a single address within a set, wherein the cache directory is searched sequentially starting with the home location node to determine if the requested address is found (hit) or not (miss) in the cache, and wherein on cache misses a cache block in a direct mapped set position is evicted with 1-P probability, otherwise with P probability, a 2-way cache block replacement policy is used which evicts one of two cache blocks in a 2-way set.