1. A digital filter for processing a binary signal, said filter including delay stages for producing delayed replicas of said binary signal at a plurality of output taps, said filter further comprising: a plurality of weighting function circuits having inputs coupled to respective ones of said output taps for producing weighted binary signals; a plurality of adders coupled in a ladder network to additively and subtractively combine said weighted signals to produce a filtered digital output signal, said additively combining adders each being responsive to two of said weighted signals in binary form for producing digital sum signals in binary form, and said subtractively combining adders each being responsive to two of said weighted signals, one of which is in two's complement form, for producing digital difference signals; and means, coupled in series with the inputs of each of said subtractively combining adders, for converting the weighted signals applied thereto to offset two's complement form: whereby digital additions are performed in binary form and digital subtractions are performed in offset two's complement form.