1. An apparatus, comprising: a circuitry that is operable to perform both: calculation of a parity bit that is generated when encoding a first information bit using an LDPC (Low Density Parity Check) matrix such that the first information bit and the parity bit form at least part of a first LDPC coded signal; and syndrome checking calculation during decoding processing of a second LDPC coded signal to determine a best estimate of a second information bit encoded within the second LDPC coded signal.