1. A superconducting logic cell, comprising: at least one quantum phase-slip junction (QPSJ) for receiving at least one input and responsively providing at least one output, each QPSJ being configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, wherein the presence and absence of the quantized charge that is realizable as a constant area of current pulses in the output form two logic states, and wherein the at least one QPSJ is biased with a bias voltage.