1. A programmable logic device comprising: a plurality of logic blocks, the logic blocks adapted to generate user data during operation of the programmable logic device; a plurality of registers adapted to store the user data during a reprogramming operation of the programmable logic device; and configurable routing resources adapted to provide a programmed data path between the logic blocks and the registers before the reprogramming operation and a reprogrammed data path between the logic blocks and the registers after the reprogramming operation.