1. A data processing system, comprising: a plurality of interconnected system on a chip (SoC) units, wherein each SoC unit includes: one or more processing cores; one or more peripheral element interfaces coupled to the one or more processing cores; one or more external ports configured to allow communication of information between the one or more processing cores and other ones of the SoC units; a switching fabric coupled between the one or more processing cores; and a management engine coupled to the switching fabric and to each one of the one or more processing cores, wherein the management engine includes one or more management processors, a memory accessible by the one or more management processors, and instructions stored on the memory, wherein, upon execution, the instructions are configured to cause the one or more management processors to generate depth chart entries for a depth chart, wherein the depth chart entries are configured to enable routing of information to each of the SoC units, and wherein the depth chart is an array that is indexed by destination node; wherein the management engine is further configured to recover routing between the plurality of interconnected SoC units based on information derived from the depth chart.