1. An integrated circuit, comprising; a plurality of processors fabricated on a single substrate; and a third dimension memory electrically coupled with the plurality of processors and configured to emulate a first memory as an emulated first memory and configured to emulate a second memory as an emulated second memory, wherein the third dimension memory is fabricated directly above and in contact with the single substrate using a fabrication process in which memory cells for the emulated first memory are fabricated substantially coincident to memory cells for the emulated second memory.