1. A method comprising: in a computing system, simulating a device including a fixed logic region and a plurality of reconfigurable logic regions, the fixed logic region for performing fixed functionality and the plurality of reconfigurable logic regions reconfigurable for performing functionalities associated with a plurality of designs, wherein the plurality of designs includes a first design and a second design; and receiving a run-time parameter and reconfiguring at least one reconfigurable region of the plurality of reconfigurable logic regions from the first design to the second design in response to the run-time parameter while simulation of the device is running; and identifying at least one output signal that has a value corresponding to an indeterminate state after the reconfiguring of the at least one reconfigurable region and before a sub-system reset of the at least one reconfigurable logic region.