1. A method of attempting to store, successively, in a plurality of memory cells, a first plurality of input bits and a second plurality of input bits, comprising: (a) providing a mapping of bit sequences to cell levels of the memory cells, wherein the cell levels for each memory cell comprise a lower level and an upper level with each lower level having a lower threshold voltage than the corresponding upper level; (b) transforming the first plurality of input bits to a first plurality of transformed bits, using a first transformation, wherein the first transformation is biased downwards towards the lower half of the cell levels such that programming the transformed bits according to the mapping would result in more memory cells being programmed to the lower half of the cell levels than to the upper half of the cell levels; (c) programming at least a first portion of the memory cells to store the first plurality of transformed bits according to the mapping; and (d) subsequent to the programming of the at least first portion of the memory cells, and without erasing at least a second portion of the memory cells that includes the at least first portion of the memory cells: (i) determining, for the at least second portion of the memory cells, whether respective levels, of the at least second portion of the memory cells, that represent, according to the mapping, a second plurality of transformed bits obtained by transforming the second plurality of input bits using a second transformation, are accessible from the current respective cell levels of the at least second portion of the memory cells, wherein the second plurality of transformed bits are a representation of a codeword selected from a plurality of codeword representations of the second plurality of input bits generated using the second transformation, and (ii) only if the respective levels, of the at least second portion of the memory cells, that represent, according to the mapping, the second plurality of transformed bits obtained by transforming the second plurality of input bits using the second transformation, are accessible from the current respective cell levels of the at least second portion of the memory cells: programming the at least second portion of the memory cells to store the second plurality of transformed bits according to the mapping.