1. A method comprising: detecting valid values on a command/address (CA) bus at a memory device; transmitting, with a memory controller, a first pattern on the CA bus resulting in DRAM transmitting a first set of values on the Data pins producing a unique sum of ‘1’-s per byte sampling signals from the data pins after the first pattern is being transmitted to obtain a first sample; transmitting, with the memory controller, a second pattern on the CA bus resulting in DRAM transmitting a second set of values on the Data pins producing a unique sum of ‘1’-s per byte sampling signals from the data pins after the second pattern is being transmitted to obtain a second sample; using the first sample and the second sample to generate a data pin mapping.