1. A method for operating a memory cell comprising memory material and programmable to a plurality of resistance states including a higher resistance state and a lower resistance state, the method comprising: applying a first bias arrangement to the memory cell to establish the higher resistance state; applying a first voltage to the memory cell to induce a first current in the memory cell; applying a second voltage to the memory cell to induce a second current in the memory cell, the second voltage different from the first voltage; and selectively applying a second bias arrangement to the memory cell to establish the higher resistance state.