1. An intelligent feed switch for processing data, the switch comprising: a plurality of ports; switching logic; and a processor, wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP); wherein the switching logic and processor are co-resident within the intelligent feed switch; at least one of the ports being configured to receive a plurality of incoming feed-specific data packets, the feed-specific data packets corresponding to a plurality of different data feeds, the incoming feed-specific data packets comprising a plurality of messages, the messages comprising message data; at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the message data; wherein the at least one member comprises a processing pipeline; wherein the processing pipeline is configured to analyze the message data of the messages on a data consumer-specific basis and repacketize the messages into a plurality of outgoing data consumer-specific data packets; wherein the processing pipeline is further configured to perform the analysis and repacketization operations in a pipelined fashion as data packet data streams through the at least one member; and wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets.