1. A computer-readable storage medium having instructions stored therein for performing a process of synthesizing a behavioral description of a circuit into a structural description of the circuit, the process comprising: receiving the behavioral description of the circuit, the behavioral description including a first statement that is associated with a condition; identifying the condition associated with the first statement; identifying one or more other statements associated with the first statement, including: determining a downstream statement that depends on the first statement, and/or determining an upstream statement upon which the first statement depends; inferring one or more potential clock domains gated by the condition for logic associated with the first statement and the one or more other statements; scheduling logic associated with the first statement and the one or more other statements according to the one or more potential clock domains; and generating the structural description of the circuit, the structural description including a structural description of the scheduled logic.