1. A method of operation of a multi-slice processor, the multi-slice processor including a plurality of execution slices, wherein each execution slice comprises an age array comprising a plurality of logic units, wherein each logic unit stores a value representing a relative age between instructions, the method comprising: propagating, in response to a current instruction being in a hang state, a hang signal to the plurality of logic units of the age array; responsive to the hang signal, generating, from the plurality of logic units of the age array, a plurality of output values indicating a next instruction ready for execution; and issuing the next instruction for execution.