1. A non-volatile memory system, comprising: a set of non-volatile storage elements, said set includes a first subset of non-volatile storage elements and a second subset of non-volatile storage elements; and managing circuitry in communication with said set of non-volatile storage elements, said managing circuitry applies a soft programming voltage to said first subset of storage elements while inhibiting said second subset of storage elements from soft programming and applies said soft programming voltage to said second subset of storage elements while inhibiting said first subset of storage elements from soft programming, said managing circuitry verifies whether said set of storage elements is soft programmed and repeats application of said soft programming voltage to at least one of said first subset and said second subset if said set is not verified as soft programmed.