1. A non-volatile semiconductor memory comprising: a memory device comprising a memory array including a plurality of memory segments; and control circuitry operable to: define a plurality of zones each comprising a plurality of the memory segments; receive a plurality of sequential access write commands from a host to write sequential data to the memory device, wherein each sequential access write command identifies at least one logical block address (LBA); receive a plurality of random access write commands from the host to write random data to the memory device, wherein each random access write command identifies at least one LBA; map the LBAs for the sequential access write commands to a plurality of the memory segments to generate sequential mapping data; map the sequential mapping data to a first one of the zones; map the LBAs for the random access write commands to a plurality of the memory segments to generate random mapping data; and map the random mapping data to a second one of the zones.