1. An apparatus for performing a screening test of a semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, said processors being programmatically operable, said apparatus comprising: instruction/data signal synchronization means for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and trace comparison means for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information.