1. A system for generating a design structure comprising: logic to: detect memory address information corresponding to accessed data in a first instruction; detect memory address information corresponding to accessed data in a second instruction; compare the memory address information corresponding to the first instruction and the memory address information corresponding to the second instruction; detect, based on the comparison, that the accessed data in the first instruction and the accessed data in the second instruction are in a same data range of the memory device; and execute the second instruction using the accessed data from the first instruction.