1. A method of writing data in a memory cell array, in which two-terminal structured memory cells each having a variable resistive element capable of storing data according to an electric resistance change by application of an electric stress are arranged in a row and column direction, a plurality of word lines extending in the row direction and a plurality of bit lines extending in the column direction are provided, the memory cells on a same row are connected at one end to a common word line, and the memory cells on a same column are connected at the other end to a common bit line, the method comprising: writing data sequentially in a plurality of memory cells on a same row or a same column in the memory cell array based on a writing order of the plurality of memory cells to be written determined according to a memory cell wiring length and an increase/decrease direction of an electric resistance of each memory cell changed by the writing data, wherein the memory cell wiring length is defined by length of a same wiring of a selected word line or a selected bit line which is connected to the memory cell to be written from an electric connection point between a write voltage applying circuit and the same wiring to the memory cell to be written, and the write voltage applying circuit applies a voltage for writing data to the selected word line or the selected bit line.