1. A system including: a multithreaded processor comprising an event detector to detect a first event indication for a first thread; responsive to the detection of the first event indication for the first thread, to monitor a second thread being processed within the multithreaded processor to detect a clearing point for the second thread; and, responsive to the detection of the clearing point for the second thread, to clear a functional unit within the multithreaded processor for at least the first thread; a memory to store the plurality of threads; and a bus to deliver the plurality of threads to the multithreaded processor.