1. A method of accessing a configuration data space for a device, the device being connected to a processor through an interconnect, the method comprising: receiving a request from the processor to access the processor's addressable space, the request being generated in response to an instruction intended to access the device's configuration data space; accessing a map between the device's configuration data space and the processor's addressable space, the map having previously mapped the device's configuration data space to one or more pages of the processor's addressable space; and translating, using the map, the request from the processor into a configuration cycle on the interconnect to access the device's configuration data space.