1. Apparatus for processing data comprising: processing logic operable to perform data processing operations; and an instruction decoder for decoding program instructions to control said processing logic to perform data processing operations specified by said program instructions, wherein said instruction decoder, in response to a compare and branch instruction, comprises a decoder for: (i) performing a comparison between a first value stored in a first register and a second value stored in a second register; (ii) copying, in dependence upon a result of said comparison, a program counter value to a third register; (iii) determining a target branch address from a pre-programmed stored value and said program counter value; and (iv) branching to a sub-routine at said target branch address in dependence upon a result of said comparison.