1. An integrated circuit comprising: a logic region having a plurality of inputs and a register; a plurality of interconnects that route signals throughout the integrated circuit; input selection circuitry that provides selected signals from the plurality of interconnects to the inputs of the logic region; look-up table circuitry that receives the selected signals from the input selection circuitry and processes the selected signals to produce output signals; and bypass circuitry coupled between the plurality of interconnects and the register, wherein the bypass circuitry bypasses the input selection circuitry and the look-up table circuitry.