1. A normalization processing apparatus for receiving an input value of a size of a region on the number line which is determined based on an occurrence probability value of a current symbol, an input value of the lowest value in the region, and an input value of the number of non-output bits, and performing normalization processing in arithmetic coding using the received input values, the normalization processing apparatus comprising: a shift amount calculation unit configured to calculate a shift amount required for the input value of the size of the region to become equal to or greater than a setting value; a shift unit configured to perform shift processing upon the input value of the size of the region and the input value of the lowest value in the region based on the calculated shift amount; a prefix generation unit configured to calculate a prefix of an output bit string using the input value of the number of non-output bits and the input value of the lowest value in the region; a suffix generation unit configured to calculate a suffix of the output bit string using the input value of the lowest value in the region; a non-output bit calculation unit configured to calculate an output value of the number of non-output bits using the input value of the number of non-output bits, the input value of the lowest value in the region, and the calculated shift amount; and a bit string coupling unit configured to combine the prefix and the suffix to generate the output bit string using the calculated shift amount and the output value of the number of non-output bits, and to output the generated output bit string.