1. A nonvolatile memory, comprising: an array of memory cells, wherein each memory cell is programmable to a respective target state; read/write circuits for reading and programming a group of memory cells in parallel; said read/write circuits performing programming that comprises: providing a programming voltage incrementing with time for a finite period in the form of a staircase pulse train with a given step size; and programming the group of memory cells in multiple programming passes, and wherein the staircase pulse trains of successive programming passes are offset from each other by predetermined offset levels.