1. A data processing device for executing a multiply-shift-saturate instruction which multiplies a first signed source operand by a second signed source operand, normalizes a result, and saturates the result if an overflow is detected, comprising: source circuitry operable to hold said first signed source operand and said second signed source operand; multiply circuitry operable to multiply said first source operand by said second source operand operable to form said result conforming to a signed number representation scheme; shift circuitry operable to shift said result a predetermined number of bits; saturation circuitry operable to form a destination operand by setting all bits in said destination operand to a predetermined value if said shifted result incorrectly represents said result according to said signed number representation scheme; and destination circuitry operable to hold said destination operand.