1. A method for controlling access to a shared memory, comprising: concurrently scanning-in a plurality of read/write commands for respective transactions, wherein each of the plurality of read/write commands includes respective addresses and respective priorities, wherein each of the respective transactions is divisible into at least one beat, and wherein at least one of the respective transactions is divisible into multiple beats; dividing the plurality of read/write commands into respective beat-level read/write commands; generating respective sequences of beat-level read/write commands corresponding to the respective addresses with concurrent arbitrating of the respective beat-level read/write commands according to the respective addresses and the respective priorities; and concurrently dispatching the respective sequences of beat-level read/write commands to the shared memory.