1. A method of performing a pipelined process utilizing compute kernels to perform stages of processing in a processing unit having a plurality of processors, an on-chip memory, and access to an external memory, comprising: identifying dependencies between producer kernels and consumer kernels in a command queue; and generating an interleaved set of dispatch calls for at least one set of interdependent kernels in the command queue in which intermediate data results are maintained in the on-chip memory.