1. A data processing apparatus comprising: a processing unit for executing instructions; a cache structure for storing instructions retrieved from memory for access by said processing unit; and profiling logic for identifying a sequence of instructions that is functionally equivalent to an accelerator instruction; wherein upon said identification said accelerator instruction is stored in the cache structure as a replacement for a first instruction of said sequence, with instructions in said sequence of instructions other than said first instruction being unchanged as a result of said identification; and said accelerator instruction includes an indication to cause the processing unit to skip the remainder of said sequence when executing said accelerator instruction.