1. An apparatus comprising: an electronic memory comprising a set of IOs, the set of IOs including a plurality of main IOs and a plurality of spare IOs; a plurality of input/output ports coupled to the electronic memory; selection means for selecting a mapping between the plurality of input/output ports and a subset of the set of IOs; and switching means coupled between the set of IOs and the plurality of input/output ports for establishing electrical connections between the plurality of input/output ports and the subset of the set of IOs in accordance with the mapping.