1. A memory system comprising: a memory hub device integrated in a memory module; a memory device data interface integrated in the memory hub device that communicates with a set of memory devices coupled to the memory hub device and a cache integrated in the memory hub device; and a memory hub controller integrated in the memory hub device, wherein the memory hub controller controls the data that is read or written by the memory device data interface to the cache based on a determination whether one or more memory cells within the set of memory devices has failed.