1. A method for administering a set of at least one physical register in a data processing system, said data processing system having a processor that processes instructions out-of-order, wherein said instructions reference logical registers, and wherein each of said logical registers is mapped to the set of at least one physical register, said method comprising: in response to dispatch of at least one of said instructions, a register management unit of said processor determining via a logical register lookup whether a hit to a logical register associated with said dispatched instruction has occurred within at least one register mapper from a group of register mappers including an architected register mapper, a unified main mapper, and an intermediate register mapper; and if an instruction having a unified main mapping entry in said unified main mapper has finished but has not completed: said register management unit moving logical-to-physical register renaming data of said unified main mapping entry in said unified main mapper to said intermediate register mapper, and said unified main mapper releasing said unified main mapping entry prior to completion of said instruction, wherein said releasing of said unified main mapping entry increases a number of unified main mapping entries available for reuse.