1. A cache unit for use with a data processing unit for providing fast access to data and instruction words fetched from a main store coupled to said cache unit in response to commands received from said data processing unit, said cache unit comprising: an instruction buffer coupled to said main store and having a plurality of addressable locations for storing sequences of said instruction words; bistable instruction indicator means for storing a group of indicators corresponding in number to at least the maximum number of a predetermined type of read commands which can be in process at any one time; and, control means coupled to said indicator means, to said processing unit and to said instruction buffer, said control means including first means operative in response to each predetermined type of read command received from said processing unit to generate signals for switching one of said indicators of said group associated with said received predetermined type of read command from a first state to a second state simultaneous with switching the remaining indicators of said group to said first state and said control means further including second means coupled to said indicator means and to said instruction buffer, said second means being conditioned by said indicators for enabling said instruction buffer for writing therein only those instruction words transferred to said cache unit in response to a last one of said predetermined type of read command received from said processing unit as defined by the states of said group of indicators.