1. A computer-implemented method for verifying timing of a circuit including a victim and an aggressor in a crosstalk, comprising: identifying a failing path including the victim; using a first function analysis to determine whether an input of the aggressor and an input of the victim are correlated; calculating a switching value of an aggressor input which is correlated to a victim input; and using an iterative process to recalculate the switching value until an input switching time for the aggressor does not change and finding a corresponding final delay of the victim wherein one or more of the identifying, using and calculating steps are implemented using a computer.