1. An apparatus comprising: a processor to redundantly execute instructions in a first thread and a second thread, the processor including a first core to execute instructions of the first thread and to obtain a first load data from a memory of a memory hierarchy and to store the first load data in a cache of the memory hierarchy, and to execute instructions of the second thread, wherein the second thread is to independently access the first load data from the cache if the first load data is present therein, and otherwise from the memory hierarchy.