1. In a processing system having a memory with a plurality of storage locations, each storage location having a mark bit position which when set indicates that the storage location has been allocated for use and when reset indicates that the storage location is available for use, allocation means comprising: mark bit addressing means coupled to said memory to fetch in parallel mark bits from a plurality of sequential storage locations, said fetched mark bits forming a mark bit vector; checking means coupled to said mark bit addressing means for checking said mark bit vector for reset marked bits; and address formation means for forming addresses for those storage locations represented by the reset mark bits in said mark bit vector.