1. A data processing system comprising: a cache memory including a plurality of cache sections; a processor to temporarily sequester a first one or more cache sections of the cache memory and store at least a part of a version of a first processor microcode patch in the temporarily sequestered first one or more cache sections before firmware of the data processing system accesses the first one or more cache sections of the cache memory during a boot sequence; the processor operable to sequester a memory region in a main memory after initialization of the main memory during the boot sequence and copy the at least a part of a version of the first processor microcode patch to the sequestered memory region; and the processor operable to return the temporarily sequestered first one or more cache sections of the cache memory for use after the copying.