1. A processor comprising: a data path having a first bit width; a wide operand storage coupled to the data path for storing a wide operand, the wide operand storage having a capability of storing a wide operand having a size with a number of bits greater than the first bit width; a register file having the first bit width, the register file being connected to the data path and including storage for a wide operand specifier for specifying an address of the wide operand in a memory; and an execution unit coupled through the data path to the register file, when executing an instruction the execution unit referencing the register file to obtain information to allow retrieval of the wide operand from the memory and storage of the wide operand in the wide operand storage.