1. A method comprising: determining a sequence of signal transition representations associated with an input net of an indicated component in a register transfer level circuit design, wherein each signal transition representation of the sequence of signal transition representations represents a non-deterministic transition from a previous signal state to a set of one or more possible signal states; determining, based on the indicated component, an output sequence of signal transition representations derived from the sequence of signal transition representations associated with the input net; determining whether the output sequence of signal transition representations conforms to restrictions that restrict which signal transition representations can be adjacent to other signal transition representations; associating the output sequence of signal transition representations with an output net of the indicated component if the output sequence of signal transition representations conforms to the restrictions; and modifying the output sequence of signal transition representations to conform to the restrictions if the output sequence of signal transition representations does not conform to the restrictions and associating the modified output sequence of signal transition representations with the output net.