1. A memory circuit, comprising: a transistor flip flop circuit having a first active device with its current path connected between a first node and a zero state voltage and a second active device with its current path connected between a second node and said zero state voltage, said first node connected to the control electrode of said second active device and said second node connected to the control electrode of said first active device, with said first device having an initial nonconductive state and said second device having an initial conductive state; a blocking transistor device having its current path connected to said second node and its control electrode connected to said first node; an array transistor device having its current path connected between the current path of said blocking transistor and a word line and its control electrode connected to a bit line; a circuit path from said word line through the current paths of said array device, said blocking device, and said second active device representing a first stored information state, a second information state being represented by an open circuit due to said blocking device being nonconductive; said conduction state of said blocking device being controlled by the voltage state of said first node; said voltage state at said first node being selectably altered from said first state with said first active device nonconductive to a second state with said first active device conductive, by the transmission of a write voltage signal from said word line through the current paths of said array device and blocking device to said control electrode of said first active device turning it on and thus switching the flip-flop and turning said blocking device off.