1. A method for facilitating thread synchronization in a dataflow computing device having a plurality of processing elements, when the plurality of processing elements are employed for executing at least one thread, comprising the steps of: (a) dividing a control flow graph of a thread into a plurality of waves, wherein each wave comprises a connected, directed acyclic portion of the control flow graph, with a single entrance; (b) providing wave number tags to be used in identifying each individual dynamic instance of data used when executing a thread, each memory operation being annotated with its location in the wave and in regard to its ordering relationship with other memory operations in the wave, to define a wave-ordered memory, the wave-ordered memory ensuring that the results of earlier memory operations are visible to later memory operations; (c) annotating data values to include a thread identification indicating a specific thread with which each data value is associated, wherein each thread being executed has a different thread identification; and (d) including a memory fence instruction that, when executed, indicates a commitment to memory of prior load and prior store operations that have occurred during execution of a thread with which the memory fence instruction is employed.