1. A method comprising: receiving first parameter information associated with a peripheral for implementation on a programmable chip, the first parameter information received from a design tool user interface; identifying first port information associated with the peripheral; receiving second parameter information associated with a processor core for implementation on the programmable chip, the second parameter information received from the design tool user interface; identifying second port information associated with the processor core; dynamically generating a customized logic description using a processor, wherein the customized logic description includes the peripheral, the processor core, and customized interconnection logic coupling the peripheral to the processor core, wherein generating the customized interconnection logic comprises generating a logic description of a port interface between the peripheral and the processor core based on wiring information specified by the first port information and second port information; and implementing the peripheral, the processor core, and the customized interconnection logic on the programmable chip.