1. A multi-core processor comprising: a first processing core having a first pipeline depth, and second processing core to be used concurrently with the first processing core, the second processing core having a second pipeline depth that is smaller than the first pipeline depth and having lower performances compared to the first processing core, wherein a first thread is to be scheduled to run on the first processing core and a second thread is to be scheduled to run on the second processing core, wherein the first thread is a software binary translation of a third thread compatible with the second processing core, wherein the first thread is to be migrated to the second processing core based on a determination that the first thread may be run on the second processing core while maintaining an acceptable performance level, and wherein when the first processing core is placed in a lower power or performance state, the first thread is migrated back to the first processing core.