1. An apparatus comprising: a first processing element to execute a first transaction, which is to be included in a first portion of code, wherein a first memory location in a memory is to be updated in response to executing a first transactional write included in the first transaction; and a second processing element to execute a second transaction, which is to be included in a second portion of the code, wherein a tentative value to update a second memory location in a second memory is to be buffered in response to executing a second transactional write included in the second transaction.