1. An apparatus, comprising: a memory array; a buffer coupled to the memory array and configured to store data to the memory array; and a memory control unit coupled to the array and the buffer, the memory control unit configured to cause the buffer to store the data responsive, at least in part, to a first write command, the memory control unit further configured to cause the data to be stored in the memory array responsive, at least in part, to a flush command, the memory control unit further configured to interrupt the flush command to prepare for a read command or a second write command and resume the flush command once the read command or the second write command is performed.