1. A system for accelerated branch prediction using a fast index tree (FIT), the system comprising: a branch target buffer; a FIT structure comprising one or more tables indexing locations of entries in the branch target buffer, the one or more tables comprising a plurality of entries that each represents a node in a binary tree and specifies a first next predicted branch instruction in the branch target buffer along a branch not taken path and a second next predicted branch instruction in the branch target buffer along a branch taken path, wherein each node of the binary tree represents a branch instruction in a program code; and a processing circuit configured to perform a method comprising: determining that searching of the branch target buffer is to be performed under FIT control; saving a current search address for searching of the branch target buffer; searching the branch target buffer at the saved current search address for a branch prediction; determining a FIT next-search address based on reading the first next predicted branch instruction along the branch not taken path and the second next predicted branch instruction along the branch taken path for a next search level of predicted branches from the FIT structure; re-indexing the searching of the branch target buffer based on the FIT next-search address; determining whether the searching at the saved current search address located the branch prediction; based on the searching at the saved current search address locating the branch prediction, continuing the searching of the branch target buffer under FIT control with the current search address set based on the FIT next-search address; and based on the searching at the saved current search address failing to locate the branch prediction, re-indexing the searching of the branch target buffer with the saved current search address and performing the searching of the branch target buffer without FIT control.