1. An arithmetic and logic unit executing arithmetic operation and logic operation between a first operand and a second operand which are both one bit, according to a carry input of a carry signal, and first, second and third externally applied control signals which designate a type of arithmetic and logic operation, comprising: first NAND logic operating means for operating a NAND logic operation between the first operand, the second operand and the first externally applied control signal, and for outputting a result of the NAND logic operation; first EXOR logic operating means for operating an exclusive OR logic operation between the result of said first NAND logic operating means and the second externally applied control signal, and for outputting a result of the exclusive OR logic operation; OR logic operating means for operating an OR logic operation between the first operand and the second operand, and for outputting a result of the OR logic operation; second NAND logic operating means for operating a NAND logic operation between the result of said first EXOR logic operating means and the result of said OR logic operating means, and for outputting a result of the NAND logic operation; third NAND logic operating means for operating a NAND logic operation between the third externally applied control signal and the carry input of the carry signal, and for outputting a result of the NAND logic operation; and second EXOR logic operating means for operating an exclusive OR logic operation between the result of said second NAND logic operating means and the result of said third NAND logic operating means, and for outputting a result of the exclusive OR logic operation.