1. A computing device for process isolation, the computing device comprising: a processor, wherein the processor comprises a segmentation manager to: (i) load a logical address, wherein the logical address includes a segment selector and an effective address, wherein the segment selector comprises a binary field and the effective address comprises a binary field, and wherein the segment selector is indicative of a segment descriptor in a memory of the computing device that includes a segment base and an effective limit, wherein the segment base comprises a binary field and the effective limit comprises a binary field, and (ii) generate a linear address as a function of the logical address, the segment base, and the effective limit, wherein to generate the linear address comprises, for each bit of the logical address, to select a corresponding bit from the segment base in response to a corresponding bit of the effective limit equaling a first predetermined binary value and from the effective address in response to the corresponding bit of the effective limit equaling a second predetermined binary value.