1. A method of making a stacked integrated circuit, comprising: fabricating integrated circuit wafers for a plurality of functional circuit layers at least to a stage of completing active devices of the integrated circuit wafers, the functional circuit layers being in the form of integrated circuit dice, the integrated circuit dice of each of the functional circuit layers having a same die size; selecting a subset of the plurality of functional circuit layers for inclusion in the stacked integrated circuit; and stacking corresponding fabricated integrated circuit wafers corresponding to a selected subset of the plurality of functional circuit layers, including forming vertical interconnections between adjoining integrated circuit dice.