1. A method for facilitating prefetching for vector-indirect memory operations, comprising: receiving a vector-indirect prefetch instruction at a processor core, wherein the vector-indirect prefetch instruction specifies a virtual base address, and a plurality of offsets; performing a lookup in a translation-lookaside buffer (TLB) using the virtual base address to obtain a physical base address that identifies a physical page for the base address; sending the physical base address and the plurality of offsets to a cache; and at the cache, performing prefetching operations for the vector-indirect prefetch instruction by, adding the physical base address to the plurality of offsets to produce a plurality of physical addresses, and prefetching cache lines for the plurality of physical addresses into the cache.