1. A method for calibrating an analog-to-digital converter (ADC) converting an input voltage signal into a N bit output signal representing the input voltage signal, the method comprising: sampling the input voltage signal applied to the ADC; comparing the sampled input voltage signal with an output signal of a feedback digital-to-analogue converter (DAC); determining, in a search logic block of the ADC, a (N+1) bit code representation for a result of the comparison, the (N+1) bit code yielding the N bit output signal; and responsive to detection of the (N+1) bit code being equal to a predefined calibration trigger code, performing a calibration for one of the most significant bits of the (N+1) bit code by: replacing the (N+1) bit code by an alternative (N+1) bit code that yields the same N bit output signal; performing an additional comparison cycle using the alternative (N+1) bit code; determining, using the comparison results of the additional comparison cycle and of the preceding (N+ 1 ) th cycle, a sign of a DAC capacitor mismatch error; tuning, in accordance with the sign of the DAC capacitor mismatch error, a set of switchable binary scaled calibration capacitors in parallel to a capacitor of the DAC, the capacitor corresponding to the one bit of the most significant bits of the (N+1) bit code for which the calibration is performed.