1. A method comprising: querying fabrication measurements associated with at least one source of variation for at least one level of an integrated circuit design; defining the at least one source of variation in the integrated circuit design; modeling the at least one source of variation for at least two patterns in at least one level of the integrated circuit design as at least two sources of variability respectively; and defining shift and scale factors that modify the at least one source of variation for the at least one level of the integrated circuit design based on the fabrication measurements, wherein the modeling is performed by at least one computing device, and the modeling comprises using the shift and scale factors to model the at least two sources of variability.