1. An apparatus for managing data flow among a plurality of input/output devices, comprising: a core memory storing I/O data and control structures needed by the input/output devices; a processor, including local memory isolated from the core memory and storing control information and instructions used by routines executed by the processor managing data flow among the input/output devices; a first memory interface responsive to the plurality of input/output devices, including means, in communication with the plurality of input/output devices and the core memory, for transferring I/O data and control data between the input/output devices in the plurality of input/output devices and the I/O data and control structures in the core memory; a second memory interface responsive to the processor, including means in communication with the processor and the core memory, for transferring control data between control structures and I/O data in the core memory and the processor, and; a configuration interface, coupled with the plurality of input/output devices and the processor, for transferring control and status information concerning control structures and I/O data in the core memory between the plurality of input/output devices and the processor.