1. A hardware description language (HDL) design structure encoded on a machine-readable data storage medium, said HDL design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a test structure, wherein said HDL design structure comprises: an IC design comprising at least one device and at least one element; a library comprising at least one device under test (DUT), wherein the at least one DUT matches the at least one device; and a modified IC design comprising at least one control structure, the control structure coupled to the at least one DUT and the at least one element.