1. In a computer system, a method for synchronizing modification of a common data structure stored in an asymmetric reflective memory shared by a plurality of processors, comprising: in a first processor, storing a queue element in a global write-only address space of the asymmetric reflective memory, the asymmetric reflective memory to copy the queue element to a local read/write address space of a second processor, the queue element storing common data to be shared by the plurality of processors; in the first processor, storing a queue header in the global write-only address space, the asymmetric reflective memory to copy the queue header to the local read/write address space of the second processor; in the second processor, in response to detecting the queue element, reading the queue header and disabling the queue header, the reading and disabling performed atomically in the local read/write address space of the second processor; in the second processor, processing the common data stored in the queue element; and in the second processor, marking the queue element as processed in the global address space of the asymmetric reflective memory, the asymmetric reflective memory to copy the queue element to a local read/write address space of the first processor after marking.