1. A data processing system having a processor coupled to a bus, the data processing system comprising: access error detection circuitry, coupled to the bus, the access error detection circuitry detecting an access error in the data processing system; and access error response circuitry, coupled to the bus, the access error response circuitry initiating replacement of an existing value on the bus with a predetermined value when the access error has been detected, and the access error response circuitry continuing to replace the existing value on the bus with the predetermined value when the access error has been detected and a first indicator has been asserted.