1. A data processing system for supporting a virtual memory comprising: (a) a main memory and an external memory for storing data by page; (b) a processor including means for providing virtual addresses for reading and writing data from or into said main memory in the process of executing read and write instructions; (c) means including a buffer connected to said processor and responsive to a memory write start signal therefrom for storing temporarily in said buffer both said virtual addresses specified by a write instruction being executed by said processor and data from said processor to be written into a page of said main memory at physical addresses corresponding to said specified virtual addresses and for writing successively said data from said buffer into said page of said main memory at said physical addresses; (d) an address translator connected between said main memory and said buffer for translating said virtual addresses received from said buffer to said physical addresses and including means for producing a page fault signal to said processor when the desired page into which said data is to be written is not contained in said main memory at the time of said address translation; and (e) wherein said processor includes means for temporarily sending all virtual addresses and data relating to the execution of a given write instruction to said buffer, means for temporarily writing said virtual addresses and data from said buffer into a work area of said main memory in response to a page fault signal, means for effecting the loading of said desired page into said main memory from said external memory in response to the page fault signal and means for loading said virtual addresses and data from said work area into said buffer to write that data in said page loaded in said main memory at the physical addresses corresponding to the virtual addresses also stored in said buffer.