1. A microprocessor providing external diagnostic access comprising: a plurality of control registers; an internal bus coupled to said control registers; a test access port (TAP) configured to receive external programming signals in a serial format; said TAP including a first register that receives a first instruction command in said serial format and converts said first instruction command to a parallel format; a control register unit that receives, in said serial format, an address to one of said control registers for data access thereto, said control register unit being coupled to said TAP and said internal bus; said control register unit including a second register that converts data received in said serial format to said parallel format; in a write operation, said control register unit causing data to be transferred from said second register to said one of said control registers specified by said address responsive to said first instruction command; in a read operation, said control register unit causing data to be transferred from said one of said control registers to said second register responsive to said first instruction command.