1. An architecture for accessing a hardware device in a computer system comprising: a first bus; a second bus; a controller coupled with said first bus and having a master controller of said first bus and a slave controller of said second bus; and an input-output device having a master controller of said second bus; wherein said second bus is coupled between said input-output device and said controller, said master controller of said second bus is configured to transmit a data signal defined by a protocol of said second bus to said slave controller of said second bus, in order to drive said master controller of said first bus to access said hardware device.