1. A method comprising: executing a plurality of software threads by a plurality of processing units associated, said plurality of software threads is associated with at least one operation, wherein said plurality of processing units being communicatively associated with said hardware accelerator, wherein said at least one operation is one of a read request or a write request; generating at least one of said read request or said write request at said hardware accelerator based on said execution; generating at least one operation comprising PARAM and read request or write request at said hardware accelerator, wherein said hardware accelerator is associated with a plurality of buses, and wherein said hardware accelerator is accessible to said plurality of software threads associated with said plurality of processing units as a memory mapped device mapped into a pre-determined physical address range of each of said plurality of buses for ensuring contention resolution among said plurality of buses; checking, an operation specific condition of at least one software thread of said plurality of software threads, wherein said operation specific condition comprises an operation success or an operation failure based on at least one of said PARAM, said read request, or said write request; and updating, at least one of read value or write value and at least one state variable upon said operation specific condition being an operation success.