1. A square root processing unit for extracting a square root of an input operand in a normalized format in units of two bits, said square root processing unit comprising: a table information store means for storing an approximation of the reciprocal of said square root; and a means for retrieving information from said table information store means by an address composed of upper bits of said input operand; said table information store means including: an entry that is accessed by an address composed of N bits from the head of said input operand if top 2 bits of said input operand are 10 or 11, where said number N is a plus integer greater than or equal to three; and an entry that is accessed by an address composed of (N+1) bits from the head of said input operand if said top 2 bits are 01.