1. A computing device comprising: a processor; firmware to store error decoding logic particular to the computing device; a hardware component to detect an error in the computing device, and in response to issue an interrupt and halt the processor such that the processor is unable to execute any more computer-readable code; and, a debugging module to load the error decoding logic at reset of the computing device and to execute the error decoding logic in response to the interrupt being issued by the hardware component, wherein the debugging module does not use the processor to execute the error decoding logic, wherein the firmware is not part of the debugging module, and wherein the debugging module is not part of the hardware component.