1. A computing system, comprising: a plurality of processors; and a translator unit arranged to receive subject code configured to run on a subject computing system according to a first memory consistency model and generate corresponding target code for execution as a plurality of program threads on any of the plurality of processors, the translator unit comprising: a shared memory detection unit arranged to detect a request by a program thread to access a shared memory area; and a memory consistency protection unit arranged to selectively apply a second memory consistency model to identified instructions in the program thread in relation to accesses to the shared memory area.