1. In an SMP computer system with two or more identical, synchronous control input buses, a method of identifying errors comprising the steps of accumulating bits, for each synchronous control input bus, as bus data signature information which is a function of all current and previous monitored data on each cycle of a sampling period of that synchronous control input bus; and, then comparing portions of the signature information accumulated during said sampling period to determine synchronization of said two or more synchronous control input buses.