1. An integrated circuit comprising a plurality of digital signal processors ( 10 ), each comprising a signal processing core ( 22 ), a memory ( 20 ) coupled to the processing core ( 22 ), a multiplexed data input ( 16 ) coupled to the memory ( 20 ), for writing received data into the memory ( 20 ), and an output circuit ( 24 ) with an input coupled to the signal processing core ( 22 ) and a plurality of outputs for outputting data from the signal processing core ( 22 ); a remote write only structure ( 14 a - d ) coupling outputs of respective groups of the digital signal processors ( 10 ) each to the multiplexed data input ( 16 ) of a respective particular digital signal processor ( 10 ), the respective group for the particular digital signal processor ( 10 ) not including the particular digital signal processor ( 10 ).