1. A non-transitory computer-usable medium embodying computer program code, the computer program code comprising computer executable instructions configured for: inserting a transient hint into an instruction request stream to indicate a transient instruction, the transient instruction comprising an infrequently executed instruction, the infrequently executed instruction corresponding to an instruction in which a number of processor cycles between accessing the instruction would cause the instruction to pollute a cache; inserting a non-transient hint into the instruction request stream to indicate a non-transient instruction; processing the instruction request stream to identify the transient instruction; setting a transient instruction bit in a Special Purpose Register (SPR) when the transient instruction is identified; storing the transient instruction in a high-level cache; processing the transient instruction, wherein the transient instruction is not stored in a lower-level cache; resetting the transient instruction bit when a non-transient hint is detected; and, processing a non-transient instruction based upon transient instruction bit being reset, the processing including storing the non-transient instruction in the lower-level cache.