1. A programmable memory system for enabling one or more processor devices access to shared memory in a computing environment, said shared memory comprising one or more memory storage structures having addressable locations for storing data for said one or more processor devices, said system comprising: one or more first logic devices associated with a respective said one or more processor devices, each one or more first logic devices for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; a second logic device responsive to each said respective select signal for generating an address signal used for selecting a memory storage structure for processor access, wherein each processor device of said computing system is enabled memory storage access distributed across said one or more memory storage structures.