1. A sequence control circuit comprising: an instruction memory for storing each of instructions of a program; a plurality of branch address registers each for storing a branch address; a logic operation circuit for detecting a combination of flag values by receiving a plurality of flags; a program counter for outputting an address to the instruction memory; and a program counter controller for controlling the program counter according to a control word read from the instruction memory and for selecting one of the branch address register corresponding to a combination of the flag values; wherein the branch address stored in the branch address register selected by the program counter controller is loaded into the program counter.