1. A memory structure, comprising: a first level of memory comprising a first array of memory cells and a first access wiring structure having a first pattern of word lines and bit lines, wherein each memory cell in the first array of memory cells comprises a storage element and a first access device connected to the storage element and to the first access wiring structure; and a second level of memory comprising a second access wiring structure having a second pattern of word lines and bit lines, and a plurality of second access devices connected to the second access wiring structure, wherein the second access devices are connected to corresponding storage elements of the first level of memory, wherein the first pattern of word lines and bit lines of the first access wiring structure is different from the second pattern of word lines and bit lines of the second access wiring structure.