1. A method for speculatively retiring instructions younger than a lock instruction in a core of a processor, the method comprising: retiring the lock instruction, wherein the lock instruction remains pending after retirement until a store portion of the lock instruction is deemed to be committed to memory; saving checkpoint state of the processor responsive to retiring the lock instruction, the checkpoint state including data for rolling back state of the processor in the event of violation of an atomic property of the lock instruction or a fencing property of the lock instruction; and speculatively retiring an instruction younger than the lock instruction after retiring the lock instruction but before the store portion of the lock instruction is committed to memory.