1. A method for enabling a computer system containing a plurality of central processors (CPUs) to free the CPUs from doing detailed control operations required in transferring one or more pages of data in and between plural electronic memory media used by the computer system, the method comprising the steps of: issuing a start instruction by a first CPU executing a program in which the start instruction provides a transfer request containing a specification for transferring one or more pages of data from a source location to a destination location in the memory media; storing the transfer request in a queue element from which a page transfer (PT) processor obtains the transfer request, and setting a transfer-status indication in the queue element to an incomplete state to indicate work for the transfer request has not been completed, but indicating completion of the start instruction at the first CPU; generating a unique identifier as a token for each transfer request provided for each start instruction issued by any CPU, and storing a copy of the token by the CPU in association with each issued start instruction, and storing the token in the queue element receiving the transfer request provided by the issued start instruction; initiating work for the transfer request by the PT processor obtaining the transfer request from the queue element and controlling copying of page(s) of data from the source location to the destination location as represented in the specification contained in the transfer request; executing by the first CPU of other instructions in the program following the start instruction asynchronously with operations of the PT processor for the transfer request; setting the transfer-status indication in the queue element to a completed state by the PT processor when work is completed for the transfer request; later-executing in the program on any CPU a test asynchronous paging status (TAPS) instruction associated with the start instruction which was previously-executed, the associated TAPS instruction accessing the queue element and testing the state of the transfer-status indication; setting a condition code in the CPU executing the associated TAPS instruction to indicate the state of the transfer-status indication to indicate a current state of work for the transfer request by the PT processor, and indicating completion of execution of the TAPS instruction.