1. A circuit for implementing an artificial neuron, said circuit comprising: an integrator comprising a capacitor, the integrator configured to integrate an input signal in such a way as to produce at an output a signal of voltage Vmem; a signal generator comprising a voltage comparator, the signal generator linked to the output of the integrator and configured to produce two output signals when the voltage Vmem is above or equal to a predetermined voltage Vth, a first signal corresponding to an output pulse of a neuron and a second signal corresponding to a control pulse Vout; a resistive memory comprising stochastic switching properties implemented by two terminals and able to switch from a high resistance state to a low resistance state in a time Tset following a statistical distribution specific to said resistive memory, a first terminal being linked to a terminal of the capacitor of the integrator; and a transistor linked to a branch at zero potential as well as to a second terminal of the resistive memory, said transistor being furthermore configured to be controlled by a second output signal of the signal generator in such a way that in a presence of a pulse of voltage Vout, the transistor is turned on making the resistive memory switch from its high resistance state to its low resistance state, the resistive memory and the transistor forming a resistive path allowing the capacitor of the integrator to discharge in order to lower the voltage Vmem, wherein the transistor is directly connected to the second terminal of the resistive memory and to the branch at zero potential.