1. A simulation apparatus for a multicore system, the simulation apparatus comprising: a processing device; an architecture configuration unit configured to select a plurality of modules, to be synchronized in terms of function execution timing, based on timing information included in bundle data, and to configure a multicore system architecture model using the selected modules; and a simulation engine unit configured to acquire function execution timing information of the modules, synchronize the execution of functions by the modules based on the acquired function execution timing information, and output results of the synchronization of the execution of functions by the modules, wherein the modules comprise at least one master module which is configured to generate the bundle data and transmit the bundle data to another module.