1. A non-volatile semiconductor memory module comprising: a memory device; a memory controller operably coupled to the memory device, the memory controller operable to: receive a command from a host; split the command into one or more chunks, the one or more chunks comprising a first chunk comprising at least one logical block address (LBA); and check the first chunk against an active chunk coherency list comprising one or more active chunks to determine whether the first chunk is an independent chunk, and ready to be submitted for access to the memory device, or a dependent chunk, and deferred access to the memory device until an associated dependency is cleared.