1. In a microprogrammed data processor wherein a unique sequence of microwords are used to control execution of each processor instruction, an improved microword generation mechanism comprising: a first programmable logic array mechanism responsive to an operation determining portion of a processor instruction to be executed for providing the first microword of said unique sequence needed in the execution of this processor instruction; a second programmable logic array mechanism responsive to an operation determining portion of this same processor instruction to be executed for providing the second microword of said unique sequence needed in the execution of this processor instruction; and at least one additional programmable logic array mechanism responsive to an operation determining portion of this same processor instruction to be executed for providing the remainder of microwords of said unique sequence needed to execute this processor instruction; said microword generation mechanism having said first and second programmable logic array mechanisms that are smaller and have faster response time than the additional programmable logic array mechanism or mechanisms.