1. A memory management system, including: a plurality of processors; a shared memory that can be accessed from the plurality of processors; and a cache memory that is provided between the shared memory and each processor of the plurality of processors, and invalidation and write back of a specified region can be commanded from a program running on a processor; wherein programs running on the respective processors: invalidate an input data region storing input data in the cache memory using an invalidation command of a specified region immediately before execution of a program as a processing batch; and write back an output data region that stores output data in the cache memory to the shared memory using a write back command for a specified region immediately after execution of a program as a processing batch.