1. An apparatus for processing data under control of instructions, said apparatus comprising: a plurality of registers of a same type of register, said instructions including at least one instruction having a destination register specifier specifying which of said plurality of registers is a destination register for storing a processing result of said at least one instruction; a plurality of processing pipelines, each processing pipeline configured to process said instructions and to store processing results of said instructions in said plurality of registers; and instruction issuing circuitry configured to issue said at least one instruction for processing by one of said plurality of processing pipelines, said instruction issuing circuitry being configured to select said one of said plurality of processing pipelines in dependence upon a value of said destination register specifier of said at least one instruction.