1. An information processing apparatus comprising: a data storing device; first and second data input/output devices giving access to the data storing device; a clock generating device comprising a clock oscillating section generating a normal clock signal to be supplied to the second data input/output device, and a clock wait control section generating a wait clock signal having a cycle which is integer times as much as the normal clock signal has; a control signal selector switching access of the first data input/output device or the second data input/output device to the data storing device; and an access arranging device causing the clock oscillating section to stop the normal clock signal to the second data input/output device for one clock cycle, causing the clock wait control section to supply the wait clock signal to the second data input/output device, not allowing the second data input/output device to access the data storing device for one clock cycle, executing the access of the first data input/output device for the one clock cycle when a contention of the access of the first data input/output device and the second data input/output device to the data storing device is generated, and starting the access of the second data input/output device after the access of the first data input/output device for the one clock cycle is ended.