1. A method of manufacturing hardware circuitry, the method comprising: specifying assertions corresponding to an expected behaviour of a circuit using an assertion language for subsequent retrieval by a computer system; defining within the computer system symbol encoding and optimizations for Boolean expressions in said assertions, the symbol encoding and optimizations for subsequent use in automaton form as automata; converting with the computer system said assertions into automata, whereby at least portions of a predetermined subset of the automata are nondeterministic; adapting the generated automata with a threading unit to further allow tracking complex temporal chains of events of the expected behaviour; using said automata, combined with traditional circuitry, to design checker circuitry with the computer system; and implementing in hardware said checker circuitry.