1. A processing system comprising: a page table including a plurality of page table entries, where each of the plurality of page table entries includes information for translating a virtual address page to a corresponding physical address page; a translation lookaside buffer adapted to cache page table information; and memory management software responsive to changes in the page table to consolidate a run of contiguous page table entries into one or more page table entries having a larger memory page size, Y, and where the memory management software further determines whether the run of contiguous page table entries may be cached in an entry of the translation lookaside buffer that caches multiple page table entries, X, in a single translation lookaside buffer entry.