1. A method for storing data from a processor to memory, comprising: configuring at least one multiplexer located within a data path between a vector register file and a memory array; receiving a store vector instruction specifying at least one vector register containing vector data and a target memory address; misaligning the vector data as it passes through the at least one multiplexer; and storing the misaligned vector data in the memory array at a memory location specified by the target memory address.