1. A method for implementing trapless shadow page tables, the method comprising: intercepting, by a shadow page tables (SPT) accelerator device of a host system, a memory write operation originating from a virtual machine (VM) and directed to a guest OS page table of the VM, the guest OS page table being stored in a device memory of the SPT accelerator device; extracting, by the SPT accelerator device, a guest virtual address (GVA)-to-guest physical address (GPA) mapping in the memory write instruction; translating, by the SPT accelerator device, the GVA-to-GPA mapping into a GVA-to-host physical address (HPA) mapping; and writing, by the SPT accelerator device, the GVA-to-HPA mapping to a shadow page table of the host system.