1. A method for fabricating a MOS transistor for a two-terminal memory device, comprising: forming a gate recess into a surface of a semiconductor substrate; depositing an electrically insulating dielectric layer at least over a recess surface of the semiconductor substrate exposed by the gate recess; forming a recess gate over and at least in part within the gate recess, extending below the top surface of the semiconductor substrate; forming a source and a drain in the semiconductor substrate on opposing sides of the recessed gate; and forming the two-terminal memory device over the semiconductor substrate and in electrical series with the source or the drain.