1. A concurrent task and instruction processing device, comprising: task processing means including control pipeline means and sequencing means connected with said control pipeline means to control the input thereto for sequentially processing tasks by components thereof through said control pipeline means, said sequencing means including memory means and component selection means connected with said memory means to cause selected components to be withdrawn from said memory means and sequenced through said control pipeline means, said memory means including at least one of a task status word memory and a process status word memory, and said component selection means including indicator storage means and selector means connected with said indicator storage means for selecting indicators and coupling the same to said at least one of said task status word memory and said process status word memory for causing an output therefrom to said control pipeline means, whereby said control pipeline means provides multiple sequential output instructions determined by said task components processed therethrough; and data processing means including data storage means and function execution means, said data processing means being controlled by said output instructions from said task processing means so that said function execution means, responsive to said output instructions, causes data in said data storage means to be withdrawn therefrom and acted upon by said function execution means concurrently with task component processing through said control pipeline means.