1. A method of maintaining cache coherency in a multi-processor computer system having a plurality of processing units, each processing unit having at least one cache, comprising the steps of: copying a value associated with a memory block into a first cache block and a second cache block respectively located in a first cache and a second cache, wherein the first cache supports a first processing unit, and the second cache supports a second processing unit; assigning a first coherency state to the first cache block indicating that the first cache block contains a shared copy of the value and will exclusively source the value; and assigning a second coherency state to the second cache block indicating that the second cache block contains a shared copy of the value and has collision priority over any conflicting request to claim the memory block.