1. A method for capturing interconnectivity data for multi-pin devices in the design of emulator circuit boards, said method comprising: parsing, using a computer, an input/output definition file representing an integrated circuit design, said input/output definition file textually defining at least one device created by partitioning said integrated circuit design for application on at least one multi-pin device on an emulator circuit board; extracting, using the computer, input/output connectivity information for said at least one device from said input/output definition file, wherein the input/output connectivity information extracted from said input/output definition file includes references to one or more connector interfaces that are undefined in said input/output definition file, wherein the references to the one or more undefined connector interfaces comprise at least one of one or more signal names, one or more device names, or one or more signal destinations that do not have any corresponding definitions in said input/output definition file; generating, using the computer, connector interface definitions for the one or more undefined connector interfaces referenced in the input/output connectivity information extracted from said input/output definition file; extracting, using the computer, design-specific information related to said integrated circuit design from said input/output definition file; creating connections between one or more devices and one or more connectors within the emulator circuit board in response to extracting all relevant information from said input/output definition file and generating the connector interface definitions for the one or more undefined connector interfaces, wherein the connections created within the emulator circuit board reflect the integrated circuit design represented in said input/output definition file; and using the connections created within the emulator circuit board to test and verify the integrated circuit design represented in said input/output definition file prior to manufacturing a finished chip having the integrated circuit design.