1. A data processor comprising: a) at least one off-core execution unit; b) a CLIW memory for storing at least one Configurable Long Instruction Word (CLIW) instruction; and c) a core processor operative to retrieve said at least one CLIW instruction from said CLIW memory and forward at least a respective portion of said at least one CLIW instruction to at least one of said at least one off-core execution units.