1. A neuron circuit comprising: a plurality of field effect transistors having confined channels, with sources and drains of the field effect transistors being connected in series; a plurality of input terminals for receiving a plurality of input voltages, each of the input terminals being connected to a drain terminal of a corresponding one of the field effect transistors; a word line coupled to gates of the field effect transistors; and an output resistor coupled between ground and the sources and drains of the field effect transistors, a voltage across the output resistor being a weighted voltage utilized for generation of a neuron output voltage.