1. A die comprising test circuitry configured to test the die and further configured to test interconnections between the die and another die, the test circuitry comprising: a first input port configured to receive test stimuli; a first output port configured to send test responses, the first input port and the first output port being located at a first major surface on a same side of the die, wherein the test circuitry includes a data signal path within the die between the first input port and the first output port, such that the circuitry is configured to test the die using the test stimuli received through the first input port; at least one second output port configured to send test stimuli towards the other die; and at least one second input port configured to receive test responses from the other die, wherein the test circuitry includes a data signal path within the die between the first input port and at least one of the second output ports, and wherein the test circuitry includes a data signal path within the die between at least one of the second input ports and the first output port, such that the test circuitry is configured to test the other die using the test stimuli sent towards the other die.