1. A cache memory, comprising: a data array; a store queue configured to buffer synchronization operations and store operations; a pollution vector control that creates, within the store queue, respective pollution vectors to track which of multiple concurrent threads executed by an associated processor core are currently polluted by a store operation resident in the cache memory, wherein each pollution vector from among the respective pollution vectors has a width in bits that corresponds to a total number of threads that are executing on the associated processor core and a pollution vector bit corresponding to a specific thread is set within the pollution vector to indicate when the corresponding thread is polluted by the entry; and a store queue controller configured to set dependencies in a dependency data structure of the store queue based on the pollution vectors to reduce unnecessary ordering effects and dispatch store operations from the store queue in accordance with the dependencies indicated by the dependency data structure.