1. A computer which includes an ALU means for performing arithmetic, logic and related operations, an accumulator means connected to the ALU means for storing one of the operands on which the ALU means performs operations, a temporary register connected to the ALU means, memory means for storing a program having instructions and for storing data at data memory locations having respective address values, the memory means including a data pointer means for storing an address value designating a data memory location, and a set of additional registers, said computer further comprising a first means for transferring an address value of a data memory location to the data pointer means, and for transferring the data in the data memory location designated by the data pointer means to the temporary register, the transfer of the address value and the transfer of the data being conducted in a first instruction cycle, and a second means for causing the ALU means to perform an operation on the data in the accumulator means and the data in the temporary register, and transferring the result of the operation to the accumulator means and to the data memory location designated by the data pointer means so that the result of the operation performed by the ALU means can be transferred to the same data memory location from which data was originally transferred, the operation by the ALU means and the transfer of the result of the operation being conducted in a second instruction cycle immediately following the first instruction cycle.