1. A method for translating instructions for a processor, comprising: accessing a plurality of guest instructions that comprise multiple guest branch instructions; assembling the plurality of guest instructions into a guest instruction block; translating the guest instruction block into a corresponding native conversion block; storing a mapping of the guest instruction block to corresponding native conversion block in a conversion look aside buffer; and upon a subsequent request for a guest instruction, indexing the conversion look aside buffer to determine whether a hit occurred, wherein the mapping indicates the guest instruction has a corresponding converted native instruction in the native cache.