1. A computer system for thread sparing between cores in a processor, the system comprising: the processor, the processor comprising a processor controller and a plurality of cores in communication with the processor controller, the system configured to perform a method comprising: determining, by a first core of the plurality of cores of the processor, that a number of recovery attempts made by a first thread on the first core has exceeded a recovery attempt threshold; sending, by the first core to the processor controller in the processor, a request to transfer the first thread to another core of the processor; based on receiving the request, selecting, by the processor controller, a second core from the plurality of cores of the processor to receive the first thread from the first core, wherein the second core is selected based on the second core having an idle thread; transferring a last good architected state of the first thread from an error recovery logic of the first core to the second core; loading the last good architected state of the first thread by the idle thread on the second core; and resuming execution of the first thread on the second core from the last good architected state of the first thread by the idle thread; wherein transferring the last good architected state of the first thread from the error recovery logic of the first core to the second core comprises: selecting a second thread on the first core as a transferring thread, wherein the second thread is distinct from the first thread, and wherein the second thread is selected as the transferring thread based on a priority of the second thread; transferring the last good architected state of the first thread from the error recovery logic of the first core to a processor local memory of the processor controller by the transferring thread; and transferring the last good architected state of the first thread from the processor local memory to the second core by the processor controller.