1. A non-volatile memory device structure comprising: a bottom electrode comprising a first conductor material extending in a first direction; a top electrode comprising a second conductor material extending in a second direction, the first direction being approximately orthogonal to the second direction; a resistive switching material comprising an amorphous silicon-containing material disposed in an intersection region between the bottom electrode and the top electrode, the resistive switching material being characterized by at least a first resistance upon application of a first voltage, the first resistance being dependent on at least a first portion of a conductor structure comprising the second conductor material formed in a portion of the resistive switching material; and a layer of material configured in between the bottom electrode and the resistive switching material, the layer of material being configured to maintain at least the first portion the conductor structure in the portion of the resistive switching material, the layer of material acting as a tunneling barrier region configured to allow conductor species from the conductor to tunnel to the bottom electrode when the first voltage is applied and configured to inhibit conductor species from the conductor structure from migrating away from the bottom electrode when a second voltage having an amplitude less than the first voltage is applied.