1. A data processing circuit to which are input a certain target instruction and a prefix instruction for expanding the function of said target instruction, comprising: instruction code analysis means for inputting said prefix instruction, subsequently inputting said target instruction, and analyzing the operation details of instruction code thereof; and instruction execution means for executing said instructions based on said operational details analyzed by said instruction code analysis means, wherein: said instruction code analysis means comprises immediate-data expansion means for expanding immediate data necessary for the execution of the target instruction which is subjected to function expansion by said prefix instruction based on said prefix instruction, said instruction execution means executes said target instruction based on immediate data expanded by said immediate-data expansion means, and said instruction code analysis means comprises a prefix instruction function expansion means for changing the operational details of said prefix instruction based on the number of sequentially input prefix instructions having an identical format.