1. An arithmetic circuit comprising: means for generating as a first input a first set of m bits representing a first vector of a finite field GF(2m) and for generating as a second input a second set of m bits representing a second vector of said finite field; means for converting said first set of m bits into components of a matrix corresponding to said first vector; and means for multiplying each of said components by said second set of m bits, thereby to obtain as an output a vector product of said first and second inputs.