1. A computer-implemented method comprising: during a power-on sequence: determining a value to be written to a first register in a device, the device generating a signal which controls writes to a reprogrammable memory; saving the value to a location accessible in system management mode; and writing the value to the first register in the device; while executing in the system management mode: retrieving the saved value from the location; writing the retrieved value to a second register in the device; and responsive to a comparison indicating that the value written to the second register is equal to the value written to the first register, enabling a write to the reprogrammable memory; while executing in a mode other than the system management mode: writing to a third register in the device to effect a system management interrupt, wherein the retrieving the saved value occurs responsive to the system management interrupt.