1. Apparatus for use in linking the object code of a host processor with memory locations in a memory of a programmable signal processor to permit the host processor to partially control the programmable signal processor, where the object codes of the host processor and the signal processor are produced by separate compilation, said apparatus comprising: a) means for symbolically describing a processing task for said signal processor including means for symbolically indicating input to said processing task by said host processor; and b) means for producing by compilation signal processor object code representing said processing task for said signal processor, said means for producing by compilation being coupled to said means for symbolically describing and including means for producing a correspondence table in a format usable by a host processor code compiler, said correspondence table including a list of memory addresses in said programmable signal processor memory to be written to by said host processor in order to partially control said programmable signal processor.