1. A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory cells, said method comprising: executing an incremental step pulse programming (ISPP) operation on the MLC memory cells, wherein the ISPP operation includes a programming sequence of first through N th page programming operations, where N is an integer of 2 or more, wherein the programming sequence further includes an erase programming that is executed after the (N−1) th page programming operation and before the N th page programming operation, wherein the erase programming increases a threshold voltage distribution of erase cells among the MLC memory cells.