1. A hot patch system comprising: a read only memory storing a plurality of instructions; a cache memory storing alternate instructions for at least one instruction stored within the read only memory, each cache line within the cache memory having associated therewith one or more selection flags; a program counter coupled to the read only memory and to the cache memory, the program counter transmitting an address to both the read only memory and the cache memory; and cache control logic coupled to the cache memory, the cache control logic comparing selected information associated with an instruction stored at the address in the read only memory with counterpart selected information associated with an instruction stored at the address in the cache memory, wherein the selected information and counterpart selected information are selected based upon the one or more selection flags associated with a cache line corresponding to the address.