1. A memory architecture comprising programmable intelligent search memory for content search at line rate wherein said programmable intelligent search memory performs regular expression based search wherein said regular expression comprises a first symbol and a complex symbol, said complex symbol comprising a range symbol comprising a minimum value and a maximum value, wherein said regular expression is converted into a non-deterministic finite state automaton (NFA) representing the functionality of the regular expression, said programmable intelligent search memory comprising a memory circuit for processing the NFA, said memory circuit comprising: a) a first memory circuit to store said first symbol, to evaluate a first input symbol and to assert a first signal when said first input symbol matches the stored first symbol; b) a second memory circuit to store said range symbol, to evaluate a second input symbol and to assert a second signal when said second input symbol is within said minimum value and the maximum value of the stored range symbol; and c) a state transition circuit coupled to said first memory circuit and said second memory circuit to perform a state transition when said first signal or said second signal is asserted.