1. A crossbar memory array, comprising: a first array of nanowires of a first material; a second array of nanowires of a different second material oriented at an angle with the first array; and a plurality of non-crystalline silicon nanostructures, each intersection of the first array and the second array including one of the non-crystalline silicon nanostructures disposed between a nanowire of the first material and a nanowire of the second material to form a resistive memory cell; wherein at least one of the plurality of non-crystalline silicon nanostructures is a nanoscale pillar providing a contact point between the first and second arrays at exactly one intersection.