1. A dynamic probe comprising: a FPGA with at least one core; a debugging trace core having a multiplexer included in the FPGA, the trace core in communication with a plurality of signal banks, each signal bank comprising a plurality of signals in the at least one core, the multiplexer dynamically accessing the plurality of signal banks during test; and a logic analyzer external to the FPGA, in communication with the trace core and selecting the bank of signals to be sent from the trace core to the logic analyzer.