1. Fault simulation apparatus for simulating faults in a piece of equipment whose faults are to be simulated that is coupled to a VME bus, said apparatus comprising: a computer; and VME fault insertion apparatus coupled between the VME bus and the piece of equipment, said apparatus comprising: a slave VME bus for coupling the VME fault insertion apparatus to the piece of equipment: a plurality of address lines for coupling VME addresses between the VME bus and the piece of equipment; a plurality of data lines for coupling data between the VME bus and the piece of equipment; a plurality of request signal lines; a plurality of acknowledgment signal lines for data and interrupt handling; bus fault logic interposed in the request signal line, acknowledgment signal lines, and data lines, for selectively passing request signals, acknowledgment signals, and data between the VME bus and the piece of equipment, for intercepting normal bus data transmission, and for inserting user-defined data into the bus data that is transmitted to the equipment to simulate failures in the equipment in response to fault definition signals; a fault processor for receiving initialization data and control signals from the computer, for setting an address of the VME fault insertion apparatus, for outputting address select signals that decode the address lines, and for outputting fault definition signals to the bus fault logic that define the fault that is to be simulated in response to the initialization data and control signals derived from the computer; and function select logic coupled to the plurality of address lines for decoding the address lines in response to the address select signals provided by the fault processor that enable selected data paths through the bus fault logic.