1. A memory system, comprising: plurality of electronic chassis, each chassis further comprising: a plurality of controllers; a plurality of memory controllers communicating with at least some of the plurality of controllers; and a plurality of memory modules, wherein a group of memory modules of the plurality of memory modules is associated with at least one memory controller of the plurality of memory controllers; and wherein commands to write or to read strips of a stripe of a RAIDed data block, and a parity strip are routed to at least two of the memory controllers, and a same global sequence number (GSN) having a value is assigned to each of the strips by a controller of the plurality of controllers after the strips are received by the memory controllers.