1. A method for scheduling processing of a loop in a reconfigurable processor, the method comprising: generating a dependence graph of instructions for the processing of the loop; detecting an arrow of the dependence graph indicating inter-iteration dependence on the dependence graph; mapping a register file of the reconfigurable processor on the detected arrow of the dependence graph indicating the inter-iteration dependence on the dependence graph; and searching for schedules of the instructions for the processing of the loop based on the mapping.