1. A method for determining an improved process model that models one or more semiconductor manufacturing processes, the method comprising: receiving a first process model; receiving a 2-D-pattern detecting kernel which detects 2-D patterns; receiving a second set of empirical data which is associated with 2-D patterns in a test layout; and determining an improved process model using the first process model, the 2-D-pattern detecting kernel, the second set of empirical data, and the test layout.