1. In a data processing system having a central processing unit having an arithmetic unit for processing data in response to programmed machine instructions, and a control store for storing microcode program instructions and responsive to a said machine instruction for implementing said machine instruction, the improvement comprising a reconfigurable primary arithmetic logic unit, including a plurality of individually controlled secondary arithmetic logic units connected in a parallel arrangement for handling input groups of data, a data string manipulation circuitry for aligning data strings for processing by the primary arithmetic logic unit, and circuitry responsive to a microcode independent machine state for generating separate secondary arithmetic logic unit control signals for separately internally reconfiguring each said secondary arithmetic logic unit and for controlling said data string manipulation circuitry.