1. An application specific integrated circuit (ASIC) comprising: a processor; a first module configured to perform a first task when the first module is active; a first task-specific memory that is used only by said first module when performing said first task; a dedicated cache memory that is physically distinct from and non-contiguous to the first task-specific memory; and a cache controller connected to said first task-specific memory and configured to employ the first task-specific memory as the processor's cache memory, when said first module is not active, and to employ the dedicated cache memory as the processor's cache memory when said first module is active; wherein the dedicated cache memory is disabled from any use while the first task-specific memory is employed as the processors' cache memory.