1. A method for reducing the number of power and ground pins required to drive address signals to system memory, comprising: receiving address signals associated with a memory operation from a memory controller, wherein the address signals are received at a buffer chip, which is external the memory controller; receiving chip select signals associated with the memory operation at the buffer chip; using the chip select signals to identify an active subset of memory modules in the system memory, which are active during the memory operation; and using address drivers on the buffer chip to drive the address signals only to the active subset of memory modules, and not to other memory modules in the system memory; whereby the buffer chip requires fewer power and ground pins for the address drivers because the address signals are only driven to the active subset of memory modules, instead of being driven to all memory modules in the system memory.