1. A memory device, comprising: a memory array comprising a plurality of bits, wherein each bit comprises two memory cells each having a variable resistance; a formation circuit, coupled to the plurality of bits, and configured to cause a first memory cell and a second memory cell of a first bit to be at a low resistance state and at a high resistance state, respectively; and an authentication circuit, coupled to the plurality of bits, configured to designate a logical state to the first memory cell of the first bit and use the logical state of the first memory cell of the first bit to generate a physically unclonable function (PUF) signature.