1. An apparatus comprising: a processor coupleable to a shared memory that is shared by one or more other processors, wherein the processor is configured to execute transactional memory access operation to the shared memory; and the processor comprising executable code for resolving conflicts between a first thread and a second thread, the executable code comprising instructions for: setting a lock indication during execution of a transaction, the transaction acquiring access to a large region of memory, the lock indication indicating to the first thread and the second thread that the first thread has protected the large region of memory determining whether the lock indication is set during execution of the transaction; and, resetting the lock indication after execution of the transaction is committed.