1. Apparatus for processing data comprising: processing logic operable to perform data processing operations; and an instruction decoder operable to decode program instructions to control said processing logic to perform data processing operations specified by said program instructions; wherein said instruction decoder is responsive to a compare and branch instruction: (i) to perform a comparison between a first value stored in a first register and a second value stored in a second register; (ii) to determine a target branch address from a pre-programmed stored value; and (iii) to branch to a sub-routine at said target branch address in dependence upon a result of said comparison.