1. An integrated circuit with nonvolatile memory cells, comprising: circuitry accessing particular nonvolatile memory cells, the circuitry including: 1) conductive rows accessing the nonvolatile memory cells by row and 2) conductive columns accessing the nonvolatile memory cells by column; and programmable resistive elements of the nonvolatile memory cells, each of the programmable resistive elements conductively connected with the conductive rows and the conductive columns, wherein the programmable resistive elements are positioned vertically above the conductive rows and the conductive columns.