1. In a data processing system including a main processor conformed to execute instructions selected by a user, a plurality of input and output devices, a memory system comprising at least one main memory having stored thereon data or instructions and an accelerator memory adapted to temporarily store selected portions of said data or intructions, and an external bus system connected to said main processor, input and output devices and said memory system for communicating said data or instructions therebetween, the improvement comprising: recording means, connected to said memory system for maintaining a record of link codes identifying the order of relative usage of predetermined segments of said data or instructions concurrently stored in said accelerator memory; memory overlay means, connected between said accelerator and main memories and adapted to receive said link codes for selectively overlaying, in response to a code signal, segments of said data or instructions, requested by said processor and not currently in said accelerator memory, into segments thereof having least recent usage; and mapping means connected between said external bus system and said recording means for providing said code signal to said overlay means indicative of the presence of said segments in said accelerator memory.