1. A method comprising: (a) accessing from a computer-readable medium, with a computer, a timing database for a set of characterization memories, each characterization memory having different memory parameters, the timing database comprising timing characteristics for each of a plurality of variants of tiling each of the characterization memories to a memory resource on an integrated circuit, each variant of tiling each characterization memory to the memory resource being referred to as a tiling netlist, wherein the timing characteristics comprise, for each tiling netlist: evaluated timing characteristics corresponding to a first subset of combinations of input ramptimes and output loads of the tiling netlist; and estimated timing characteristics corresponding to a second, different subset of combinations of input ramptimes and output loads of the tiling netlist, which are mathematical functions of at least one of the timing characteristics for the first subset; (b) comparing, with the computer, memory parameters of a design memory having a known tiling variant with those of the characterization memories to identify a corresponding characterization memory; and (c) assigning the timing characteristics of the known tiling variant of the corresponding characterization memory to the design memory.