1. An apparatus comprising: logic, the logic at least partially comprising hardware logic, to insert one or more bubbles in one or more Execution Unit (EU) logic pipelines or one or more sampler logic pipelines of a processor to at least temporarily reduce execution of operations in one or more subsystems of the processor based at least partially on a comparison of a first value and one or more clamping threshold values, wherein the first value is to be determined based at least partially on a summation of products of one or more event counts and dynamic capacitance weights for one or more subsystems of the processor.