1. A processor that cyclically executes a plurality of threads in accordance with an execution time allocated to each of the threads, comprising: a reconfigurable integrated circuit; a reconfiguration unit operable to reconfigure a part of the reconfigurable integrated circuit based on a circuit configuration information set; a configuration information storing unit that stores therein circuit configuration information sets corresponding one-to-one to the threads; a control unit operable to put each thread into execution using the reconfigurable integrated circuit that has been reconfigured based on one of the configuration information sets that corresponds to the thread; and a selection unit operable, while a given thread put into execution by the control unit is being executed, to select a thread to be executed next, based on an amount of an area in the reconfigurable integrated circuit other than an area used by the given thread and an amount of an area in the reconfigurable integrated circuit required for reconfiguring the reconfigurable integrated circuit based on the circuit configuration information sets, wherein while the given thread is being executed, the control unit has the reconfiguration unit reconfigure the reconfigurable integrated circuit in part using an area that is not currently used for execution of the given thread, based on the circuit configuration information set corresponding to the thread selected by the selection unit.