1. In a digital computer of the type having a memory for storing words of data at addressable locations therein, an address generation apparatus for generating a single memory address from a software specified address consisting of a register identifier and offset identifier and from predetermined state information, comprising: a first register for holding said software specified address including said register identifier and said offset identifier; a first set of registers selectable from the portion of said first register containing said register identifier, each of said first set of registers containing said predetermined state information consisting of process, segment and pointer identifiers; a first selector means coupled to said first register and to said first set of registers to receive said register identifier for selecting one of said first set of registers; a second register, a portion of which is coupled to the portion of said first register containing said offset identifier and another portion of which is coupled to receive the portion of the selected one of said first set of registers containing said process and segment identifiers, said second register for holding at least four fields adapted to specify process and segment identifiers obtained directly from said process and segment identifiers of the selected one of said first set of registers and to further specify page and displacement identifiers obtained by partitioning said offset identifier from said first register; storage means including a plurality of memory locations, each holding a frame identifier, said storage means being directly addressable by the concatenation of said pointer identifier from the selected one of said first set of registers and said segment and page identifiers from said second register; and a third register, a portion of which is coupled to said storage means for receiving a selected frame identifier from said storage means and another portion of which is coupled to the portion of said second register containing said displacement identifier, said third register thereby said single memory address obtained by concatenating said frame identifier with said displacement identifier.