1. A register controlling apparatus, comprising: A CPU for outputting values of a register logical address, a first control signal and a local register pointer when a program routine is selected and a count value of available registers; a register controller for selectively adding the values of the register logical address and the local register pointer, and the count value of available registers in accordance with the first control signal from the CPU and outputting a register physical address; and a memory for writing data in a domain set by the register physical address of the register controller or reading the written data.