1. A simulator comprising: an interface configured to receive program code, wherein the program code includes one or more instructions that are vectorizable or have been vectorized, wherein a vectorized instruction is a P-wide vector instruction including operands which correspond to P lanes of single-instruction-multiple-data (SIMD) execution; and a vectorization unit; wherein in response to detecting a region of vectorized or vectorizable instructions in the program code, the vectorization unit is configured to: suspend execution of a time-based simulation; serially execute instructions in the region for at least two iterations using a functional-based simulation; store each checkpoint state generated between iterations of the at least two iterations; and resume the time-based simulation, in response to determining no memory dependencies exist within any two iterations of the at least two iterations.