1. A device that comprises a pure memristive logic gate, wherein the pure memristive logic gate consists essentially of a first input memristive device, a second input memristive device that are coupled in parallel to each other and an output memristive device that (a) is serially coupled to the first and second input memristive devices, (b) differs from the first and second input memristive devices, and (c) has a reverse polarity than the first and second input memristive devices; wherein the pure memristive device is controlled by a single control voltage; wherein the pure memristive logic gate is integrated with a memristive device crossbar that functions as a memristive memory array; and wherein the pure memristive logic gate is a NOR logic gate.