1. A computer-implemented method for generating a test pattern, the method comprising: selecting a first lwarx instruction; pseudo-randomly selecting a first pseudo-random address for the first lwarx instruction; including the first lwarx instruction with the first pseudo-random address into the test pattern; reserving the first pseudo-random address for a first stwcx instruction that is paired to the first lwarx instruction; selecting the first stwcx instruction; including the first stwcx instruction with the first pseudo-random address into the test pattern, wherein a first conflicting instruction does not reside between the first lwarx instruction and the first stwcx instruction in the test pattern.