1. A computer system for determining whether to abort or continue a transaction based on logical addresses, comprising: a memory; and a first processor in communication with the memory, the first processor having a dynamic address translation mechanism for translating logical addresses into real memory addresses, wherein the computer system is configured to perform a method comprising: determining, by the first processor, that a first logical address range has a common relationship with real memory addresses for all programs running on the computer system; executing, by a first thread of the first processor, a first transaction for accessing memory locations within the first logical address range; detecting, by the first processor, whether a store operation conflicts with the first transaction by comparing a logical address of the store operation with the first logical address range; based on the logical address of the store operation being within the first logical address range, aborting, by the first processor, the first transaction, and continuing execution of the store operation; and based on the logical address of the store operation not being within the first logical address range, continuing, by the first processor, execution of the first transaction, and continuing execution of the store operation.