1. A method of sharing a memory module between a plurality of processors comprising: dividing the memory module into n banks, where n&equals;at least 2, enabling the memory module to be accessed by one or more processors simultaneously; mapping the memory module to allocate sequential addresses to alternate banks of the memory; storing data words in memory, wherein data words in sequential addresses are stored in alternate banks due to the mapping of the memory; and providing a first signal path, the first signal path coupling a cache to a processor and the memory module when selected, the cache enabling the processor to fetch a plurality of data words from different banks simultaneously.