1. A reconfigurable Viterbi decoder comprising: a reconfigurable data path comprising a plurality of reconfigurable functional blocks, the plurality of reconfigurable functional blocks including: i) a reconfigurable branch metric calculation block; and ii) a reconfigurable add-compare-select and path metric calculation block; and a programmable finite state machine capable of controlling the reconfigurable data path, wherein the programmable finite state machine is capable of executing a plurality of context-related instructions associated with the reconfigurable Viterbi decoder.