1. A multiprocessor type fast Fourier analyzer comprising: three independent processors each having a single independent bus for address, data and control, a microprocessor connected to the independent bus and a memory connected to the independent bus; and means for establishing bidirectional data flow between each two adjacent independent buses comprising two separate random access memories and a processor controlled memory exchange unit connected to the two adjacent independent buses and to the separate random access memories for connecting the two adjacent independent buses alternately to the two separate random access memories, and wherein a first independent bus of a first processor is provided for realizing data acquisition and is connected to an analog to digital converter unit, wherein a first memory exchange unit is connected to the first bus and a second independent bus of a second processor, said second processor performing a FFT analysis, wherein a second memory exchange unit is connected to said second bus and to a third independent bus of the third processor for I/O control, with said third bus connected to a display, an I/O device and to a keyboard for programming and controlling the analyzer.