1. In a microcircuit device comprising a bank of at least two programming logic circuits, wherein each of said logic circuits includes a first fuse in series with a switching transistor, and a control line connected to the node between said first fuse and said switching transistor, and wherein a latch pulse source is wired to a control terminal of said switching transistor in order to generate on said control line a logic level representative of the status of said first fuse; an improvement for reducing the current drawn through said first fuse which comprises: in each of said programming logic circuit, a second fuse wired in series with said first fuse between said node and said switching transistor; and a bank-enabling circuit wired between said latch pulse source and a control terminal of the switching transistor of each of said logic circuits, said bank-enabling circuit comprising: a bank switching transistor and two bank fuses wired in series therewith, wherein said bank switching transistor has a control terminal connected to said latch pulse source, a first current-carrying terminal connected to a first pole of a supply voltage, a second current-carrying terminal wired to a first terminal of a first of said bank fuses; and a second of said bank fuses has a first terminal connected to a second terminal of said first bank fuse and a second terminal connected to an opposite pole of said supply voltage; whereby the burning of said first bank fuse disables said logic circuits, and the burning of said second bank fuse allows the passage of a latch pulse through said bank-enabling circuit toward said logic circuits.