1. In a logic simulation system, a reconfigurable interconnect network comprising: a plurality of simulation processors; a first reconfigurable interconnect stage configurable to receive outputs from the simulation processors; a second reconfigurable interconnect stage configurable to-receive outputs from the first reconfigurable interconnect stage; and a third reconfigurable interconnect stage configurable to receive outputs from the second reconfigurable interconnect stage, and further configurable to provide outputs to inputs of the second reconfigurable interconnect stage.