1. A computer system for executing a prefetch data machine instruction, defined for a computer architecture, the prefetch data machine instruction specifying a cache action to be performed, the system comprising: a memory; a cache in communication with the memory; and a processor in communication with the cache and the memory, the processor comprising an instruction fetching unit for accessing instructions from memory and one or more execution units for executing accessed instructions, the processor configured to perform a method comprising; executing, by the processor, the prefetch data machine instruction, the prefetch data machine instruction comprising an option field, the execution comprising: determining, by the processor, whether the option field specifies a data prefetch cache action or a cache line ownership operation, the data prefetch cache action for prefetching a cache line of data from memory to the cache, the cache line ownership operation for changing cache access ownership of a line of data in the cache; using a value of an immediate field of the prefetch data machine instruction to determine an address of an operand in memory; and based on determining the option field specifies a data prefetch cache action, the execution comprising performing, by the processor, the data prefetch cache action comprising fetching to the cache, a line of data associated with the address of the operand in memory; and based on determining the option field specifies a cache line ownership operation, the execution not-fetching the line of data to the cache or otherwise modifying content of the line of data in the cache, the execution only performing, by the processor, a cache line ownership operation, on a cache line already in the cache.