1. A method for performing a sequence of memory access operations on a processor accessing shared data within a multiple processor system, the method comprising: performing the following with a processor: setting a single flag associated with the processor into a first state; executing, by a first processor subsequent to the setting the single flag, a sequence of program instructions comprising at least one instruction accessing selected data elements within a local cache of the first processor, the local cache storing a subset of shared data accessed by multiple processors; receiving, at the first processor, a signal indicating a modification of data corresponding to data stored within the local cache, the signal indicating any modification to any storage location within a plurality of storage locations in the local cache of the first processor; based on receiving the signal indicating any modification to any storage location within a plurality of storage locations, setting, during the executing, the single flag into a second state, the second state of the single flag indicating the modification to any storage location within the plurality of storage locations in the local cache of the first processor; and subsequent to the executing the sequence of program instructions and based on the single flag being in the first state, outputting a control to select execution of a first program.