1. A system, comprising: a security device configured to receive a plurality of incoming packets from a plurality of data sources, each packet comprising a tag that identifies the respective data source, the security device comprising a plurality of programmable cryptographic modules, each of the cryptographic modules comprising: (i) a packet input engine, (ii) a cryptographic engine comprising a first lower systolic array configured for cryptographic functions, (iii) a packet output engine, and (iv) a plurality of field-programmable gate arrays (FPGAs) configured in a top systolic array layer, wherein a first FPGA of the FPGAs is coupled to the packet input engine, and a second FPGA of the FPGAs is coupled to the cryptographic engine, wherein the packet input engine comprises a second lower systolic array logically underneath the top systolic array layer and configured for packet routing, and wherein the first lower systolic array is logically underneath the top systolic array layer, wherein the security device further comprises at least one interface configured to route each of the plurality of incoming packets to one of the cryptographic modules for encryption to provide encrypted packets, wherein each packet is routed based on its respective tag, and the at least one interface is further configured to route the encrypted packets to an external data storage; an interchangeable input/output (I/O) panel; and an interchangeable I/O electronics card associated with the I/O panel, the interchangeable I/O electronics card configured to couple to the security device.