1. A functionally redefineable signal processing subsystem, comprising: a) a module interface supporting a function-specific module; b) a DSP in communication with said module interface for communicating data between said subsystem and said function-specific module; c) a host interface supporting a host, said host interface for receiving function-defining code corresponding to said function-specific module from said host, said function-defining code stored in an auxiliary memory; d) a DSP local memory interface, in communication with said DSP and coupleable to a local memory, said local memory for storing a replaceable portion of said function code, said replaceable portion of said function-specific code available for execution by said DSP.