1. A method of integrated circuit programmed data processor design comprising the steps of: selecting a benchmark application for the data processor; selecting an initial set of architecture parameters for the data processor; reconfiguring a reconfigurable compiler to generate program code adapted to run on said selected set of architecture parameters; compiling said benchmark application with said reconfigured compiler; reconfiguring a reconfigurable data processor simulator to simulate said selected set of architecture parameters; running said complied benchmark application on said reconfigured simulator; automatically synthesizing an integrated circuit physical layout of said selected architecture parameters; evaluating performance of said selected set of architecture parameters against a predetermined set of criteria from said running of said complied benchmark application on said reconfigured simulator and said synthesized integrated circuit physical layout; and if evaluation of said selected set of architecture parameters fails to meet said predetermined set of criteria, varying said selected architecture parameters and repeating said steps of reconfiguring said compiler, compiling said benchmark application, reconfiguring said simulator, running said complied benchmark application, automatically synthesizing an integrated circuit physical layout and evaluating performance, until evaluation of said selected set of architecture parameters meets said predetermined set of criteria.