1. A semiconductor storage device comprising: a primary memory; a mirror memory storing data corresponding to data stored in the primary memory; and a controller, wherein the controller comprises: a reverse mirror unit configured to store received data in the primary memory and the mirror memory, wherein the reverse mirror unit stores the received data without change in the primary memory, and stores the received data in the mirror memory after reordering and flipping bits of the received data; and an error reduction unit configured to read data from the primary memory and the mirror memory, wherein the error reduction unit reads first data from the primary memory, reads second data corresponding to the first data from the mirror memory and flips bits of the second data, outputs the first data when the first data and the second data match, and infers, when the first data and the second data do not match, that a bit error occurred in a dominant direction in one of the first data and the second data, infers data to be correct based on a position from which the first data were read from the primary memory, and outputs the data inferred to be correct.