1. A computer program product for implementing instruction optimization, the computer program product comprising: a non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: determining that at least two machine instructions of an instruction stream are eligible for optimization, wherein the being eligible comprises determining that the at least two machine instructions comprise a first instruction specifying a first target register and a second instruction specifying the first target register as a source register and a target register, wherein the second instruction is a next sequential instruction of the first instruction in program order, wherein the first instruction specifies a first function to be performed, and the second instruction specifies a second function to be performed; merging the two or more machine instructions into a single optimized internal instruction that is configured to perform functions of the two or more machine instructions employing operands specified by the two or more machine instructions, wherein the single optimized internal instruction specifies the first target register only as a single target register, wherein the single optimized internal instruction specifies the first and second functions to be performed, and the single optimized internal instruction stored in a single slot in an issue queue; and executing the single optimized internal instruction to perform the functions of the at least two machine instructions the executing including executing the first instruction followed by the second instruction.