1. A memory system comprising: a multi-bit flash memory device; and a flash controller configured to control the multi-bit flash memory device, wherein the flash controller is configured to output a series of commands, pointers, and addresses to the multi-bit flash memory device for read/program operations and further wherein the multi-bit flash memory device comprises: a memory cell array including memory cells arranged in rows and columns; a read/program circuit configured to perform read and program operations on the memory cell array; and a control block configured to control the read/program circuit in response to the pointer.