1. A memory control circuit comprising: a conversion circuit performing a conversion processing for parallel readout bit data formed from individual bits read out from memory cells of a nonvolatile memory, by setting the individual bit that is once again read out from the memory cell, which is previously determined to be successfully storing an expectation value, to a corresponding expectation value expected to be stored in the memory cell; and a determination circuit determining a result of a write processing to write parallel expectation value data to the nonvolatile memory, based on the parallel readout bit data converted by the conversion circuit and the parallel expectation value data.