1. A microprocessor that processes conditional non-branch instructions, wherein each conditional non-branch instruction specifies a condition, wherein each conditional non-branch instruction instructs the microprocessor to perform an operation if the condition is satisfied and to not perform the operation if the condition is not satisfied by condition flags of the microprocessor, the microprocessor comprising: a predictor, configured to provide a prediction about a conditional non-branch instruction; an instruction translator, configured to: translate the conditional non-branch instruction into a no-operation microinstruction when the prediction predicts the condition will not be satisfied; and translate the conditional non-branch instruction into a set of one or more microinstructions to unconditionally perform the operation when the prediction predicts the condition will be satisfied; and an execution pipeline, configured to execute the no-operation microinstruction or the set of microinstructions provided by the instruction translator.