1. A method for conducting equivalence checking of a circuit, comprising: receiving a register-transfer level (RTL) netlist representation of a circuit; receiving a power specification file for describing power requirements of the circuit; creating a low power gate netlist using the RTL netlist and the power specification file, wherein the low power gate netlist represents a design implementation of the circuit; creating a reference low power RTL netlist using the RTL netlist and the power specification file, wherein the reference low power RTL netlist represents a design specification of the circuit; and performing equivalence checking between the low power gate netlist and the reference low power RTL netlist.