1. A resistive memory cell bit-line, comprising: a reference branch including a reference resistor having a predetermined value, wherein the reference branch generates a reference current based on the predetermined value of the reference resistor; a cell branch including an adjustable memory resistor having a variable value, wherein the cell branch generates a cell branch current based on a selected value of the adjustable memory resistor; a sense amplifier having a first input coupled to the reference branch and a second input coupled to the cell branch; and a first pre-charge transistor coupled to a first pre-charge voltage and the cell branch, wherein the first pre-charge transistor is configured to pre-charge the cell-branch to the first pre-charge voltage prior to a read operation.