1. A process of fabricating a three-dimensional semiconductor device, comprising the steps of (1) preparing at least two semiconductor structures each including at least one semiconductor element and a conductor electrically connected at one end to said semiconductor element and having at the other end thereof an exposed surface portion, at least one of said semiconductor structures further including a thermally fusible insulating adhesive layer having a surface substantially coplanar with said exposed surface of said conductor, (2) positioning said semiconductor structures with respect to each other so that the exposed surface portions of the respective conductors of the semiconductor structures are spaced apart from and substantially aligned with each other, (3) moving at least one of said semiconductor structures with respect to the other until the exposed surface portions of the respective conductors of the semiconductor structures are brought into contact with each other, and (4) heating the semiconductor structures for causing said insulating adhesive layer of at least one of said semiconductor structures to thermally fuse to the other semiconductor structure with said semiconductor elements electrically connected together.