1. A microcomputer comprising: an instruction prefetch buffer to prestoring a plurality of instruction codes which are provided from a bus interface for fetching and processing a program from an external memory; a micro-instruction execution unit for executing a micro-instruction accessed by an instruction code; a micro-instruction storage means for storing a plurality of micro-instructions as well as information on the number of words of each micro-instruction and for providing an accessed micro-instruction to the micro-instruction execution unit as well as information on the number of words of this micro-instruction to the micro-instruction execution unit when the micro-instruction is accessed; and an instruction pointer value calculation means for adding information on the location of an instruction code required to read the micro-instruction in the instruction prefetch buffer to information on the number of words of the micro-instruction to obtain an instruction pointer value, wherein, during the period until preceding micro-instruction is executed by the micro-instruction execution unit, the instruction pointer value calculation means calculates the instruction pointer value and provides it to the instruction prefetch buffer to access a subsequent instruction code and provide a subsequent micro-instruction specified by the accessed instruction code to the micro-instruction execution unit.