1. A method of managing a coherent memory between a first processor and a second processor comprising: monitoring a flag register to determine whether data stored in a system coherent memory is available for processing, wherein the flag register notifies the second processor that data is available for processing in the system coherent memory; monitoring and recording the addresses of cache lines used by a first processor using a probe filter; receiving an address for a data that is available to be processed using the second processor; comparing the address for the data to the addresses recorded with the probe filter to determine whether the data has been exported by the first processor; in response to determining that data was not exported by the first processor, partitioning a second processor memory into a local memory and a coherent memory, wherein a portion of the coherent memory containing the recorded cache lines is stored in the local memory; and in response to determining that data was exported by the first processor, sending a probe to the first processor to retrieve the data exported by the first processor.