1. A method of scheduling execution of an instruction in a processor having at least one cascaded delayed execution pipeline unit having a plurality of execution pipelines that execute instructions in a common issue group in a delayed manner relative to each other, the method comprising: receiving an issue group of instructions; determining if at least one branch instruction is in the issue group, if so scheduling the least one branch instruction in a one of the plurality of execution pipelines based upon a first prioritization scheme; determining if there is an issue conflict for one of the plurality of execution pipelines; resolving the issue conflict by scheduling all but one of the at least one branch instruction causing the issue conflict in a different execution pipeline; scheduling execution of the issue group of instructions in the cascaded delayed execution pipeline unit.