1. A fail safe system for monitoring a multi-bit logic word, comprising: first multiplexing means for multiplexing the multi-bit logic word; second multiplexing means for multiplexing a multi-bit reference word; first gating means connected to the first multiplexing means for gating the output therefrom; second gating means connected to the second multiplexing means for gating the output therefrom; comparator means connected to the first and second gating means and responsive to the gated outputs therefrom for providing an alternating output when the gated outputs are in substantial agreement, and otherwise providing a constant level output; first means connected to the comparator and to the first multiplexing means and responsive to the alternating comparator output for providing an address for the first multiplexing means; second means connected to the comparator and to the second multiplexing means and responsive to the alternating comparator output for providing an address for the second multiplexing means; each of the first and second means including means connected to the comparator for dividing the frequency of the alternating output therefrom, counting means connected to the frequency dividing means and to a corresponding multiplexing means, and responsive to the divided comparator output for providing the address for said multiplexing means; and the counting means in each of the first and second means being normally synchronized, with an internal system failure rendering the counters desynchronized, whereupon the gated outputs are otherwise than in substantial agreement and the comparator means provides the constant level output.