1. A computer system comprising: an electronic circuit comprising: a system bus; a nonlocal memory coupled to the system bus; a processor coupled to the system bus; a module coupled to the system bus, the module comprising: a local memory, an address comparator, a plurality of base virtual address registers, a plurality of top virtual address registers, and a direct memory access (DMA) controller, wherein the address comparator is coupled to the local memory via a local bus, the address comparator is coupled to each of the plurality of base virtual address registers and the plurality of top virtual address registers, the DMA controller is configured to access the local memory and the nonlocal memory using virtual addressing, independently of the processor; and a memory management unit (MMU) coupled between the address comparator of the module and the system bus; wherein the address comparator is configured to: receive a first memory access specified to a first received virtual address from the DMA controller, wherein the first memory access is associated with a first software component of a plurality of software components implemented in the computer system, select a first base virtual address register and a first top virtual address register that are associated with the first software component, wherein the first base virtual address register and the first top virtual address register respectively store a base virtual address and a top virtual address that define a first range of virtual addresses from a plurality of ranges of virtual addresses, wherein each of the plurality of ranges of virtual addresses is assigned to the local memory, compare the first received virtual address to the base virtual address and to the top virtual address, in response to a combination of a first determination that the first received virtual address is at or above the base virtual address and a second determination that the first received virtual address is at or below the top virtual address: calculate an offset corresponding to the first received virtual address, and direct the first memory access directly to the local memory via the local bus, using the offset as a physical address in the local memory; and in response to a third determination that the first received virtual address is below the base virtual address or a fourth determination that the first received virtual address is above the top virtual address: direct the first memory access to the system bus via the MMU, wherein the MMU is configured to translate the first received virtual address of the first memory access into a physical address of the nonlocal memory according to a map for converting virtual addresses to physical addresses; and the processor is configured to execute instructions including instructions for accessing the local memory and the nonlocal memory.