1. An apparatus to perform pipelining comprising: a first circuit to determine a level of performance for processing one or more loops by a dynamic compiler; a second circuit to execute code optimizations to generate a pipelined schedule for the one or more loops that achieves the determined level of performance within a prescribed time period; and a third circuit to establish a dependence graph for the one or more loops and partition each dependence graph into stages based on the level of performance, wherein the level of performance is to be based on a calculated minimum initiation interval (MII) that is calculated via a Howard Iteration Policy (HIP) algorithm from the dependence graph, wherein the HIP algorithm is constrained to have a complexity that is less than exponential.