1. A method for processing a sequential stream of instructions in a computer system having a first and a second processing element, each of said processing elements having its own state determined by a setting of its own general purpose and control registers, comprising the steps of directing an initial instruction of said sequential stream of instructions to a first one of said processing elements, continuing processing said sequential stream of instructions using said first one of said processing elements, and forwarding any changes in the architectural state of the computer system to said second processing element, and when at any point in the processing of said sequential stream of instructions by said first processing element it becomes beneficial to have said second processing element take over continued processing of the same sequential instruction stream then, restoring with said second processing element the state that was forwarded and taking over continued processing of the same sequential instruction stream by processing said sequential instruction stream with said second processing element, said second processing element then during the processing of said sequential instruction stream by said second processing element forwarding any changes in the architectural state of the computer system to said first processing element; whereby said first and second processing elements during said processing of said sequential stream of instructions may be executing the very same instruction but only one of said processing elements is permitted to change the overall architectural state of said computer system which is determined by a combination of the states of said first and second processing elements.