1. An apparatus for performing encoding operations, the apparatus comprising: memory including a set of memory locations for storing L sets of Z-bit vectors, where Z is a positive integer greater than one and L is a positive integer; a vector unit operation processor including an accumulator and output device for passing computed Z-bit vector to the said memory in response to operation instructions; and a switching device coupled to the memory and to the vector unit operation processor, the switching device for passing a Z-bit vector between said memory and said vector unit operation processor in response to switch control information.