1. An electronic processor architecture for use with a memory having storage at physical addresses comprising: a processor; a memory cache; a cache control circuit caching memory data of a physical address by virtual address; a translation circuit for translating between a virtual address from the processor and a physical address; and a synonym tracking circuit receiving a given virtual address from the processor for access to the cache and (1) determining if the given virtual address is a synonym with an other virtual address mapping to a same given physical memory address of data in the cache; and (2) when the given virtual memory address is a synonym, accessing the memory cache using the other virtual address as an accessing address for the memory cache.