1. A parallel pulse signal processing apparatus, comprising: a plurality of pulse output arithmetic elements; a plurality of connection elements which connect predetermined elements of the arithmetic elements in parallel; and a gate circuit which selectively passes pulse signals received from the plurality of connection elements, wherein the pulse output arithmetic elements comprise: input means for inputting a plurality of time series pulse signals; modulation processing means for executing predetermined modulation processing on a basis of the input plurality of time series pulse signals; and pulse output means for outputting a pulse signal on a basis of a result of the modulation processing, and wherein said gate circuit counts, of the pulse signals output from the plurality of pulse output arithmetic elements and received from said plurality of connection elements, pulse signals corresponding to predetermined upper output levels, and passes the pulse signals corresponding to the predetermined upper output levels until a number of the counted pulse signals reaches a predetermined number.