1. A method to manufacture a chip multiprocessor having multiple processor cores, the method comprising: receiving performance or reliability information associated with each of the multiple processor cores, wherein the received performance or reliability information is determined prior to packaging of the chip multiprocessor by testing at least one computing submodule of each of the multiple processor cores; and storing the received performance or reliability information such that the stored performance or reliability information is used to adjust an operating parameter of at least one processor core of the multiple processor cores of the chip multiprocessor, wherein the performance or reliability information associated with each of the multiple processor cores comprises, for each of the multiple processor cores, frequency vs. power use information for the at least one computing submodule of each of the multiple processor cores.