1. A shared virtual memory management apparatus for ensuring cache coherence, comprising: s a shared virtual memory manager configured to allocate a shared virtual memory page shared by a plurality of cores and to manage cores' access to the allocated shared virtual memory page; a physical memory manager configured to allocate a physical memory page when a plurality of cores simultaneously access the allocated shared virtual memory page, and to update contents of the shared virtual memory page written by any of the cores in the allocated physical memory page; and a memory mapper configured to, when the contents of the shared virtual memory page written by any of the plurality of cores are updated in the physical memory page allocated by the physical memory manager, map the updated physical memory page to the shared virtual memory page of another core that does not perform a write operation to the shared virtual memory page.