1. An apparatus comprising a reconfigurable minimum operator (e.g., 1200 ) adapted to compare first and second multi-bit values to determine whether or not the first multi-bit value is less than the second multi-bit value, wherein: the reconfigurable minimum operator is selectively configurable to operate in a first operating mode (e.g., 5-bit mode), in which each of the first and second multi-bit values (e.g., A[4:0], B[4:0]) has a first number (e.g., 5) of bits; and the reconfigurable minimum operator is selectively configurable to operate in a second operating mode (e.g., 10-bit mode), in which each of the first and second multi-bit values (e.g., A[9:0], B[9:0]) has a second number (e.g., 10) of bits different from the first number of bits.