1. An apparatus comprising: a first nonvolatile data storage medium; a second nonvolatile data storage medium having a faster access time than the first nonvolatile data storage medium; a third data storage medium; a processor configured to: store address map information for the first nonvolatile data storage medium to the first nonvolatile data storage medium, the address map information including: mapping information between a logical band classified as a range of logical block addresses, and a virtual band corresponding to a physical area of the first nonvolatile data storage medium mapping information between a logical block address within the range of logical block addresses of the logical band, and a virtual address within the virtual band allocated to the logical band; store address map change data for the first nonvolatile data storage medium to the third data storage medium, the address map change data including: changes to the address map information since the address map information was last stored to the first nonvolatile data storage medium; a logical band number, a virtual band number allocated to the logical band, and a last virtual address in a consecutive sequence of occupied virtual addresses in the virtual band allocated to the logical band; store the address map change data to the second nonvolatile data storage medium when an abnormal power state is detected; when the power state is no longer abnormal: retrieve the address map information that was last saved to the first nonvolatile data storage medium; retrieve the address map change data from the second nonvolatile data storage medium; and update the address map information using the address map change data.