1. An apparatus for seeding differences in lock stepped processors, comprising: two or more processors operating in a lock step mode, wherein each of the two or more processors comprise: a processor-specific resource operable to seed the differences, processor logic to execute a code sequence, wherein an identical code sequence is executed by the processor logic of each of the two or more processors, and an output to provide a result of execution of the code sequence; and a lock step logic operable to read and compare the output of each of the two or more processors.