1. An instruction emulation system which translates target instructions into emulation instructions, the system comprising: a host processor which executes instructions formatted in accordance with a host processor instruction set; a target instruction memory in which the target instructions are stored, the target instruction memory having target instructions of differing types, the target instructions stored in the target instruction memory having non-uniform instruction length including a shortest target instruction length; an translation instruction memory, the translation instruction memory having sets of translating instructions for generating emulation instructions for each of the differing types of target instructions, the sets of translating instructions being formatted in accordance with the host processor instruction set, the emulation instructions also being formatted in accordance with the host processor instruction set, the emulation instructions generated for a particular target instruction being structured to accomplish a same activity as the particular target instruction for which it is generated; a jump table memory having a plurality of entries, each of the plurality of entries in the jump table having an entry length which is no greater than the shortest target instruction length, a selected target instruction in the target instruction memory having associated therewith a selected entry in the jump table memory, the selected entry in the jump table memory having stored therein a pointer to a specific one of the sets of translation instructions in the translation instruction memory.