1. A data processing circuit, the circuit comprising: a data detecting circuit configured to receive an input data set and at least one input vector in a first format, wherein the at least one input vector corresponds to a portion of the input data set, the data detecting circuit including: a first vector translation circuit configured to translate the at least one vector to a second format; a data detector core circuit configured to apply a data detection algorithm to the input data set and the at least one vector in the second format to yield a detected output; and a second vector translation circuit configured to translate a derivative of the detected output to the first format to yield an output vector.