1. A computer system comprising: a first board having an I/O controller hub including a main communication chipset; a common bus; and a plurality of Sibling boards coupled to said first board by said common bus, each of the Sibling boards comprising, a memory operative to host a Sibling operating system, and at least one CPU coupled to said memory, said Sibling board configured without a Sibling chipset; wherein at least one of the plurality of Sibling boards functions as a processing unit of said first board, and at least one of said Sibling boards is coupled to and shares said I/O controller hub.