1. A method of managing registers of a processor, the method comprising: providing a register mapping comprising a set of maps, each map of the set of maps comprising a plurality of map registers; providing a set of actual registers indirectly accessed by the processor via map entries of the set of maps of the register mapping, wherein the number of actual registers in the set of actual registers is greater than the number of map entries in the set of maps, and wherein the map entries of the set of maps reference only a subset of the set of actual registers at any given time; and managing updates to map entries of the set of maps of the register mapping by updating multiple map entries of at least one map of the set of maps responsive to executing a single update instruction.