1. A method for performing a sequence of memory access operations on a processor accessing shared data within a multiple processor system, the method comprising: performing the following with a processor: setting a flag into a first state; executing, by a first processor subsequent to the setting the flag, a sequence of program instructions comprising at least one instruction accessing selected data elements within a local cache of the first processor, the local cache storing a subset of shared data accessed by multiple processors; receiving, at the first processor, a signal indicating a modification of data corresponding to data stored within the local cache, the signal indicating any modification to any storage location within a plurality of storage locations in the local cache of the first processor; based on receiving the signal, setting, during the executing, the flag into a second state; and subsequent to the executing the sequence of program instructions and based on the flag being in the first state, outputting a control to select execution of a first program.