1. A method comprising: generating at least one equivalent cell noise model for a circuit under modeling, wherein the circuit under modeling comprises a plurality of cells useable in an integrated circuit design and the equivalent cell noise model is generated based on each one of the plurality of cells that have connections that terminate at ports of the circuit under modeling; and utilizing the at least one equivalent cell noise model in a hierarchical crosstalk noise analysis for the integrated circuit design; wherein the generating and utilizing steps are performed in accordance with at least one processing device.