1. A method for fusing instructions in a processor comprising: fetching a plurality of instructions, said plurality of instructions including a first instruction specifying a first operand destination, a second instruction specifying a second operand source, and a third instruction specifying a branch condition; and fusing a portion of the plurality of instructions into a single micro-operation, said portion including both the first and second instructions if said first operand destination and said second operand source are the same, and said branch condition is dependent upon the second instruction.