1. A computer having a processor programmed to execute processes comprising: a processing unit simulator; at least one hardware component simulator; a system bus simulator in communication with the processing unit simulator and the at least one hardware component simulator; and a bus monitoring unit (BMU) configured to monitor traffic between the processing unit simulator and the at least one hardware component simulator, wherein the BMU is further configured to record bus usage data in a non-transient computer readable storage medium, wherein the bus usage data includes a transaction time representing how long the at least one hardware component simulator takes to process a task.