1. A method of a memory controller to interface a processor to a memory comprising: fetching an instruction from the memory; and sending a filler instruction to the processor for the fetched instruction to be executed by the memory controller in response to a determination that the fetched instruction is to be executed by the memory controller based on a comparison of an opcode of the fetched instruction with stored information that indicates which opcodes are to cause a corresponding instruction to be executed by the memory controller, wherein the fetched instruction is to be executed by the memory controller and the filler instruction is to be executed by the processor.