1. A hardware device for concurrently processing a plurality of tasks associated with an algorithm which includes a number of processes some of which are dependant on binary decisions, said device comprising: a plurality of task units for processing data, making decisions and/or processing data and making decisions; a task interconnection logic means interconnecting the task units for communicating actions from a source task unit to a destination task unit; each of said task units including a processor for executing the steps of the associated task in response to a received request action; and, a status manager for handling actions from source task units and building actions to be sent to destination task units.