1. An avionics computing system comprising: a single processor having at least one core; an electronic memory system communicating with the processor and holding an operating system; a network interface communicating with an aircraft data network to connect to other aircraft equipment including navigation systems; a display communicating with the processor; wherein the operating system executes solely on the single processor to: load application into the electronic memory system together with configuration data indicating an application type of the applications being of Type-A, T e-B and Type-C; limit access of Type-A/B applications in the electronic memory system to the electronic memory, the display, and the processor according to predefined rules enforced by the operating system to block potential interference by an execution of the Type-A/B application with an execution of a Type-C application; wherein the Type-C application is design-approved to interact with the aircraft data network and the Type-A/B application is not design-approved to interact with the aircraft data network; wherein the operating system further executes solely on the single processor to read data from different buffers written to by both Type-C and Type-A/B applications and to identify the application type of the application writing to each given buffer from the configuration data of the application type and use that identification to composite and write the buffer data to the display so that data from a Type-C application cannot be occluded on at least a portion of the display by data from a Type-A/B application and so that at least a portion of data from a Type-C can be simultaneously viewed on the display with data from a Type-A/B application.