1. A method of simulating an electronic system comprising interconnected functional blocks, said method comprising the steps of: a)--inputting data into a digital computer which data concerns a low level description of each of said functional blocks; b)--extracting parameters from said low level description by using a central processing unit accessible to said digital computer which parameters define at least in part a dependence of said low level description on signal frequency and signal level; c)--storing said extracted parameters in a memory device accessible to said digital computer; d)--creating, by using said central processing unit, a high level macro model of each of said functional blocks from said extracted parameters; e)--interconnecting said high level macro models using said central processing unit; f)--applying an input signal to said interconnected high level macro models; g)--computing, by using said central processing unit, output signals of said interconnected high level macro models in response to the input signal, including computing the effect of the interaction of each high level macro model with its neighboring high level macro model; h)--monitoring the output signals of said interconnected high level macro models; i)--comparing the monitored output signals with predetermined values indicative of an expected performance of the electronic system; and j)--performing the following steps if the monitored output signals do not closely match said predetermined values i) extracting, by using said central processing unit, said stored parameters from said memory device; ii) modifying said low level description such that a closer match between said predetermined values and the monitored output signals is achieved; iii) extracting, by using said central processing unit, modified parameters from said low level description and replacing said stored parameters with said modified parameters; iv) creating high level macro models from said modified stored parameters by using said central processing unit; and v) repeating steps e through j until the monitored output signals closely match said predetermined values.