1. A memory architecture, comprising: an unprotected memory space configured to store encrypted information, said encrypted information corresponding to a plain text version thereof, said unprotected memory space is located outside a microprocessor; a message digest corresponding to said encrypted information; a first protected memory space configured to store at least a subset of operating system instructions, said first protected memory space is located outside said microprocessor; and a second protected memory space configured to store said plain text version of said encrypted information, said second protected memory space is located outside said microprocessor; wherein said operating system instructions in said first protected memory space operate on said plain text version of said encrypted information in said second protected memory space; wherein a random access memory comprises said unprotected memory space, said first protected memory space, and said second protected memory space.