1. A processor, comprising: a core; a prefetcher, including: a first logic to make speculative prefetch requests through a memory subsystem for an element for execution by the core; and a second logic to store prefetched elements in a cache; and a prefetcher control module, including: a third logic to determine a first count of memory accesses to a first type of memory; a fourth logic to determine a second count of memory accesses to a second type of memory; and a fifth logic to, based upon the first count, the second count, the first type, and the second type, reduce the speculative prefetch requests of the prefetcher.