1. A method of debugging software code comprising a plurality of instructions on a processor having at least two different instruction set operating modes, each mode for executing instructions of a different instruction set, comprising: receiving a target instruction set operating mode corresponding to a target instruction set prior to executing any code instructions; executing code instructions and, for each instruction executed, comparing the current processor instruction set operating mode, corresponding to the current instruction set, to the target instruction set operating mode, wherein the current instruction set and the target instruction set have at least one common instruction address; and triggering an alert if the current processor instruction set operating mode matches the target instruction set operating mode.