1. A method to predict a target address of an indirect branch instruction in a program executed by a processor, the method comprising: storing in an indirect branch predicted target table a plurality of predicted target addresses for indirect branch instructions, each predicted target address being indexed by a combination of an indirect path history and a taken and not-taken history, the indirect path history comprising at least a portion of target addresses for a plurality of previous indirect branch instructions, the taken and not-taken history comprising outcomes for a plurality of previous conditional branch instructions; receiving at an index generator information identifying an indirect branch instruction, the information identifying the indirect branch instruction comprising an address of the indirect branch instruction; obtaining at the index generator a running indirect path history and a running taken and not-taken history, the running indirect path history comprising at least a portion of predicted target addresses for a plurality of previously predicted indirect branch instructions, the running taken and not-taken history comprising outcomes for a plurality of previously predicted conditional branch instructions; amending one of the running indirect path history and the running taken and not-taken history to comprise at least a portion of the address of the indirect branch instruction; subsequent to the amending, combining at the index generator the running indirect path history and the running taken and not-taken history to generate an index for the identified indirect branch instruction; identifying a predicted target address in the indirect branch predicted target table using the index for the identified indirect branch instruction; and if the identified predicted target address is valid, predicting the target address of the identified indirect branch instruction to be the identified predicted target address.