1. A method for enhanced processing efficiency in a data processing system which includes multiple scalar processors and at least one vector processor and which processes an ordered sequence of intermixed scalar and vector instructions in a nonsequential order, said method comprising the steps of: coupling said ordered sequence of intermixed scalar and vector instructions to said multiple scalar processors and said at least one vector processor for processing therein; storing an indication of each instruction which is finished processing and an indication of each occurrence of an exception during processing of an instruction within a finish instruction array; initiating a first vector instruction within said at least one vector processor only in response to an indication within said finish instruction array that each scalar instruction which precedes said first vector instruction within said ordered sequence is finished processing; generating a vector advance signal in response to an initiation of each vector instruction within said at least one vector processor; and initiating a subsequent vector instruction within said at least one vector processor only in response to an occurrence of said vector advance signal and an indication within said finish instruction array that each scalar instruction which precedes said subsequent vector instruction within said ordered sequence of intermixed scalar and vector instructions is finished processing and no exception has occurred during processing of any scalar instruction which precedes said subsequent vector instruction within said ordered sequence of intermixed scalar and vector instructions wherein chained processing of vector instructions is accomplished.