1. A memory array comprising: at least one first memory unit comprising: a first first-electrode located in a first column; a resistance variable material over the first first-electrode; a first second-electrode over the resistance variable material and located in a first row; a second second-electrode over the resistance variable material and located in a second row, wherein the first first-electrode is capable of forming a first conductive pathway with the first second-electrode and a second conductive pathway with the second second-electrode, and; at least one second memory unit comprising a second first-electrode located in the first column, wherein the resistance variable material is over the second first-electrode, and wherein the second first-electrode is capable of forming a third conductive pathway with the second second-electrode.