1. A method, in a data processing system, for processing an instruction in a processor of the data processing system, comprising; receiving, in the processor of the data processing system, an instruction, the instruction including power/performance tradeoff information associated with the instruction, wherein the power/performance tradeoff information comprises one or more bits for specifying one or more types of power/performance tradeoff criteria, and wherein the one or more bits are set and associated with the instruction by a compiler prior to execution of the instruction based upon one or more of statically analyzing code in which the instruction is present and obtaining measurements of performance of the processor during execution of a previously compiled version of the code in a runtime environment; determining, by the processor, power/performance tradeoff priorities or criteria, specifying whether power conservation or performance is prioritized with regard to execution of the instruction, based on the power/performance tradeoff information; and processing, by the processor, the instruction in accordance with the power/performance tradeoff priorities or criteria identified based on the power/performance tradeoff information of the instruction, wherein processing the instruction in accordance with the power/performance tradeoff priorities or criteria comprises: retrieving processor architecture characteristic information which describes performance/power capabilities of hardware units in the processor architecture; and selecting one or more hardware units in the processor architecture to process the instruction based on a comparison of the power/performance tradeoff priorities or criteria with the performance/power capabilities of the hardware units in the processor architecture.