1. A memory protection circuit comprising: a memory access information register that stores memory access information related to memory areas of a memory which can be accessed by a plurality of virtual machines; and a first access determination circuit that determines whether to allow a virtual machine from among the plurality of virtual machines to access the memory areas based on a memory address when each of the plurality of virtual machines accesses the memory, information related to the plurality of virtual machines which access the memory, and the memory access information stored in the memory access information register, wherein the information related to the virtual machines which access the memory is output from a virtual machine scheduler that allocates execution time of programs to the virtual machines and determines an order of the virtual machines to be processed.