1. A method for executing instructions using a plurality of virtual cores for a processor, comprising: receiving an incoming instruction sequence using a global front end scheduler; partitioning the incoming instruction sequence into a plurality of code blocks of instructions; allocating the code blocks to a plurality of virtual cores of the processor, wherein each virtual core comprises a respective subset of resources of a plurality of partitionable engines, wherein each partitionable engine comprises a segment, a memory fragment, and a plurality of execution units, and wherein resources of each partitionable engine are operable to be partitioned to instantiate a virtual core with partitioned resources of other partitionable engines, and wherein communication between resources of each of the plurality of partitionable engines is supported by a global interconnection structure; and executing the code blocks by using the partitionable engines in accordance with a virtual core mode.