1. A computer implemented method for implementing an electronic design with connectivity and constraint awareness, comprising: using at least one processor or at least one processor core to perform a process the process comprising: identifying a schematic design view of the electronic design; identifying or initiating a layout of the electronic design; identifying a relevant constraint for an object, which is subject to a modification process, in the layout from one or more sets of constraints; and determining whether the relevant constraint for the object is satisfied by using connectivity information that is associated with the object when the object is created in the physical design and is identified without requiring extraction for the object from the layout.