1. A method of streaming data, comprising: streaming a read/write cycle dynamic data stream formed by serially clocking a plurality of dynamic words from a ring controller to a first device module of a plurality of hardware-compiled device modules arranged in a daisy chain topology with said first device module, from said first device module to a second device module of said plurality of hardware-compiled device modules, and from said second device module to said ring controller, each of said first device module and said second device module having a plurality of registers, each of said plurality of registers having a first register and a second register, wherein each of said first and said second registers having a dedicated clock, said dedicated clock in each of said first and said second registers of said plurality of registers providing a two-clock delay in each of said first device module and said second device module of said plurality of hardware-compiled device modules, wherein at initialization, said plurality of hardware-compiled device modules are configured and assigned an associated address value, said ring controller having no a priori knowledge of said associated address value; wherein said plurality of dynamic words includes a read/write operation instruction word and a read/write address indicator word, wherein said first device module is mapped to a first plurality of addresses and said second device module is mapped to a second plurality of addresses, wherein said streaming said read/write cycle dynamic data stream is performed by: streaming an initial form of said read/write cycle dynamic data stream from said ring controller to said first of a plurality of registers within said first device module, wherein said initial form of said read/write cycle dynamic data stream includes an initial form of said read/write operation instruction word and an initial form of said read/write address indicator word indicating at least one initial read/write binary address on which said initial form of said read/write operation instruction word instructs action to be taken; determining whether each of said at least one initial read/write binary address is within said first plurality of addresses using said plurality of registers within said first device module, and when it is determined that said at least one initial read/write binary address is within said first plurality of addresses associated with said first device module: reading a word stored in said first device module at said at least one initial read/write binary address onto said read/write cycle dynamic data stream when said initial form of said read/write operation instruction word instructs a read action to be taken at said initial read/write binary address; writing a stream-word from said initial form of said read/write cycle dynamic data stream to said first device module when said initial form of said read/write operation instruction word instructs a write action to be taken at said at least one initial read/write binary address; when it is determined that said at least one initial read/write binary address is not within said first plurality of addresses associated with said first device module: not acting on said at least one initial form of said read/write operation instruction word using said first device module; outputting a first-module-processed form of said read/write cycle dynamic data stream from said first device module, wherein said first-module-processed form of said read/write cycle dynamic data stream includes said read-word when said read-word is read using said first device module, and wherein said first-module-processed form of said read/write cycle dynamic data stream includes a first-module-processed form of said read/write operation instruction word and a first-module-processed form of said read/write address indicator word indicating a first-module-processed read/write binary address on which said first-module-processed form of said read/write operation instruction word instructs action to be taken; streaming said first-module-processed form of said read/write cycle dynamic data stream from said first device module to said second device module; determining whether each of said first-module-processed read/write binary address is within said second plurality of addresses using said plurality of registers within said second device module, and when it is determined that said first-module-processed read/write binary address is within said second plurality of addresses: reading a word stored in said second device module at said first-module-processed read/write binary address when said first-module-processed form of said read/write operation instruction word instructs a read action to be taken at said first-module-processed read/write binary address; writing a stream-word from said first-module-processed form of said read/write cycle dynamic data stream to said second device module when said first-module-processed form of said read/write operation instruction word instructs a write action to be taken at said first-module-processed read/write binary address; when it is determined that said first-module-processed read/write binary address is not within said second plurality of addresses: not acting on said first-module-processed form of said read/write operation instruction word using said second device module; outputting a second-module-processed form of said read/write cycle dynamic data stream from said second device module, wherein said second-module-processed form of said read/write cycle dynamic data stream includes said read-word read from said second device module when said read-word stored in said second device module is read using said second device module.