1. A computer implemented method of interactive application of constraints to sub-circuits in a circuit design stored in a computer readable medium, comprising: receiving from a first designer a selection of a sub-circuit; receiving from the first designer a constraint group comprising zero or more constraints; producing an information structure in computer readable medium that associates a graph representing a topology of the selected sub-circuit with the received constraint group; receiving from a second designer a selection of the information structure; using the graph to identify sub-circuit instances in the circuit design having the same topology as the selected sub-circuit; presenting to the second designer one or more of the identified sub-circuit instances and the received constraint group; and receiving from the second designer instruction as to application of the received constraint group to one or more of the presented sub-circuit instances.