1. A programmable logic circuit, comprising: an array having a plurality of inputs for receiving input terms and a plurality of outputs and means for combining selected ones of said input terms to form product terms at each of said array outputs; a J-K register having J and K inputs and at least one output; and logic means having inputs connected to the array outputs, and having first and second logic outputs connected to the J and K inputs respectively, for selectively connecting certain ones of said array outputs to either or both of the J and K inputs of said J-K register.