1. An electronic comparison system, comprising: a) a plurality of input stages, each configured to successively provide bits of a respective code word, starting with a most-significant bit thereof; b) a plurality of one-shots connected to respective ones of the input stages to successively receive the bits of the respective code words, wherein each one-shot is configured to successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then to provide a second, different bit value; c) an enable circuit connected to the outputs of the one-shots and configured to provide the enable signal if at least one of the one-shots is providing the first bit value.