1. A pipeline, comprising: a plurality of operational stages, the stages including: a pointer register stage which stores pointer information and updates; a pointer dependency checking stage located upstream of the pointer register stage, which determines if instruction pointer dependencies exist and stalls an instruction if necessary to resolve inter-instruction dependencies in the pointer register stage; a dependence checking stage located downstream of the pointer register stage and configured to perform checking on instructions and stall an instruction if necessary to resolve inter-instruction dependencies in an instruction register file; and at least one pointer functional unit configured to provide pointer information updates directly to the pointer register stage.