1. A method of testing an electronic circuit comprising a plurality of data transfer operators operating on memory resources defining a shared memory space, comprising: initializing the shared memory space, including writing data items to the shared memory space, each data item being unique in the shared memory space; partitioning all or some of the shared memory space into a plurality of disjoint memory blocks, the memory blocks being organized into one or more groups of blocks, each memory block belonging to one of the groups, and all memory blocks of the same group having the same size; executing a test scenario comprising at least one data transfer operation, each data transfer being a transfer defined on a given one of the data transfer operators and on a given group of blocks, for writing the content of a source block, to a destination block of the same group; and verifying the content of the shared memory space.