1. A semiconductor device comprising: an image processor which executes first calculation processing and second calculation processing for image data, the first calculation processing being different from the second calculation processing; and a data distribution circuitry which operates in a data output format of either a combination output format or a distribution output format, wherein the image data includes first pixel data and second pixel data, the second pixel data being adjacent to the first pixel data, wherein the image processor executes the first calculation processing and the second calculation processing for the first pixel data to generate first processed data and second processed data, respectively, wherein the image processor executes the first calculation processing and the second calculation processing for the second pixel data to generate third processed data and fourth processed data, respectively, wherein, in the combination output format, the data distribution circuitry outputs the first to the fourth processed data in synchronization with a first type of address, and wherein, in the distribution output format, the data distribution circuitry outputs the first and the third processed data in synchronization with a second type of address, and outputs the second and the fourth data in synchronization with a third type of address, the second type of address being different from the third type of address.