1. A computer-implemented method comprising: identifying, at a computing system, metal features in a metal layer of an integrated circuit design; generating, at the computing system, a graph based on spacing relationships between the metal features; predicting, at the computing system, which metal features are to be formed by a same mask in a multiple patterning lithography process using the graph; and generating, at the computing system, analysis data for the integrated circuit design based on the prediction of which metal features are to be formed by the same mask.