1. A computer-implemented method of merging storage elements on one or more multi-cycle signal distribution trees into multi-bit cells of an integrated circuit, the method comprising: determining, using a processor, initial placement regions and initial placement locations for a plurality of storage elements arranged in two or more levels on the one or more trees, the two or more levels of each of the one or more trees including a root level closest to a tree source of the respective one or more trees and a leaf level closest to a tree sink of the respective one or more trees; determining potential merge storage elements among the plurality of storage elements, the potential merge storage elements being eligible for merger; and merging one or more pairs of the potential merge storage elements across the one or more trees into the multi-bit cells based on satisfying an additional condition, wherein the additional condition is based on a source storage element among the plurality of storage elements for each potential merge storage element of the one or more pairs, and each source storage element corresponding with each potential merge storage element is arranged in a level among the two or more levels that is closer to the tree source than the potential merge storage element.