1. A method for manufacturing a semiconductor device, the method comprising: forming a dummy gate layer on a substrate; forming a hard mask layer on the dummy gate layer; forming a first doped portion in the dummy gate layer, wherein the first doped portion is formed to have an etching selectivity with respect to the other portion of the dummy gate layer; forming a plurality of etching masks respectively on portions of the hard mask layer; etching the hard mask layer and the dummy gate layer to respectively pattern the first doped portion and the other portion of the dummy gate layer into a plurality of first dummy gates and a plurality of second dummy gates, wherein a width of each of the first dummy gates is different from a width of each of the second dummy gates; forming a dielectric layer to peripherally enclose each of the first dummy gates and each of the second dummy gates; and replacing the first dummy gates and the second dummy gates with a plurality of first metal gates and a plurality of second metal gates respectively.