1. A parallel operation semiconductor integrated circuit device comprising: a plurality of first operational means for carrying out a predetermined operation of first data and predetermined second data; a plurality of second operational means provided corresponding to said plurality of first operational means, each for receiving an output of a corresponding first operational means at a first input; first connection means for cascade connecting said plurality of second operational means with each other, said first connection means comprising means for connecting said plurality of second operational means in a lateral connection in which an output of an upstream second operational means is connected to a second input of a second operational means subsequent to said upstream second operational means in the cascade connection; and nonlinear conversion means for carrying out a nonlinear conversion processing on an output of a final second operational means in the cascade connection.