1. A method, comprising: receiving, by a parallel processor, a multi-input bitwise logical operation instruction that specifies two or more input operands and a function operand, wherein a first input operand of the two or more input operands comprises a number of bits, each bit having a corresponding bit in each of the additional input operands in the two or more input operands, wherein a predicate operation controls whether individual threads in a group of threads execute a subsequent instruction without executing the multi-input bitwise logical operation instruction; writing the function operand to a lookup table within the parallel processor; and accessing the lookup table for each set of corresponding input operand bits in the two or more input operands to generate an output for the multi-input bitwise logical operation instruction.