1. A system for reducing a number of read ports for register pairs, the system comprising: a set of registers, and a set of wide registers, the set of registers and the set of wide registers being addressable by register fields of instructions; and a processing circuit coupled to said set of registers and said set of wide registers, configured to perform a method comprising: maintaining an active pairing indicator configured to have a first value or a second value, the first value indicating the wide operand is stored in a wide register, the second value indicating the wide operand is not stored in the wide register; based on the active pairing indicator, determining whether to read the wide operand from the wide register or a pair of registers; storing the active pairing indicator and values of the set of wide registers to a storage based on a request to store a register pairing status; and loading a saved pairing indicator and saved values of the set of wide registers from the storage respectively into an active pairing register and wide registers.