1. A computing system including a computing device, comprising: a simultaneous multi-threading (SMT) processor and a memory for storing executable computer-readable code that are executable by the SMT processor; at least one module deployed in the memory and executed by the SMT processor to obtain an adjustment factor for the SMT processor, wherein the adjustment factor is an equation for a representative curve of a number of thread state distribution curves; at least one module deployed in the memory and executed by the SMT processor to acquire an SMT usage estimate for the SMT processor made by a thread-aware operating system; and at least one module deployed in the memory and executed by the SMT processor to calculate an adjustment factor for the SMT usage estimate using the adjustment factor for the SMT processor or a lookup table from a repository of compensated estimate lookup tables.