1. An integrated circuit comprising: a plurality of cores wherein each of the plurality of cores is considered a local core with a plurality of neighboring cores, wherein each local core further comprises: a self test mechanism that executes at least one test on the local core and produces a local signature for the local core where the local signature characterizes the local core; and a self evaluation engine (SEE) that compares the local signature with a plurality of neighbor core signatures produced by the plurality of neighboring cores to determine a goodness value for the local core.