1. A computer-implemented method, comprising: requesting, by a first processor thread of a computer processor, access to exception tracking logic, the exception tracking logic being accessible by a plurality of processor threads; receiving, by the first processor thread, access to the exception tracking logic; executing, by the first processor thread, a process in slow mode; based on detecting an exception in the slow mode, storing, by the first processor thread, exception information about the exception in the exception tracking logic; copying the exception information from the exception tracking logic to a set of external registers outside the exception tracking logic; and releasing the exception tracking logic to allow access to the exception tracking logic by other processor threads of the plurality of processor threads.