1. A method comprising: modeling a system block of a system-on-chip (SoC) in a computer-implemented untimed functional model at an untimed functional level; generating a computer-implemented transaction level (TL) model of the system block at a transaction level (TL) using the untimed functional model; generating a computer-implemented cycle accurate (CA) model of the system block at a cycle accurate (CA) level using the TL model; and verifying functionality of the SoC by operating a processor to execute a software program using at least one of the TL model and the CA model.