1. A mathematical operation processing apparatus, comprising: a plurality of computing elements configured to perform different mathematical operations different from one another and produce mathematical operation results of the mathematical operations and condition codes; a condition code set register configured to retain the condition codes produced simultaneously by said computing elements as a condition code set; a condition code conversion section configured to perform predetermined conversion for the condition code set and output a result of the conversion as a conversion condition code set; and an operand supplying section configured to supply an operand for the mathematical operations in said computing elements based on the conversion condition code set.