1. A method, comprising: determining, by a computing device, that a current software thread of a plurality of software threads having an issuing sequence does not have a first instruction waiting to be issued to a hardware thread during a clock cycle; identifying, by the computing device, one or more alternative software threads in the issuing sequence having instructions waiting to be issued; selecting, during the clock cycle by the computing device, a second instruction from a second thread among the one or more alternative software threads in view of determining that the second instruction has no dependencies with any other instructions among the instructions waiting to be issued, wherein dependencies are identified in view of the values of a chaining bit extracted from each of the instructions waiting to be issued; and issuing, by the computing device, the second instruction to the hardware thread.