1. A microprocessor for processing instructions, comprising: a plurality of clusters for receiving the instructions, each of the clusters having a plurality of functional units for executing the instructions; and a plurality of register sub-files each having a plurality of registers for storing data for executing the instructions, wherein each of the clusters is associated with corresponding one of the register sub-files so that an instruction dispatched to a cluster is executed by accessing registers in a register sub-file associated with the cluster to which the instruction is dispatched.