1. A system for implementing processor management of transactions, the system comprising: a processing circuit configured to perform a method comprising: receiving an instruction from a thread, the instruction comprising an instruction type, the instruction executing within a transaction wherein the transaction effectively delays committing stores to memory until completion of the transaction; managing, by a processor, transaction nesting for the instruction based on the instruction type of the instruction, the transaction nesting comprising a maximum processor capacity, the transaction nesting management performing one or more of: enabling executing a sequence of a plurality of nested transactions within a transaction, supporting multiple nested transactions in a processor pipeline or generating and maintaining a set of effective controls for controlling a pipeline; and preventing, by a processor, the transaction nesting from exceeding the maximum processor capacity.