1. A method of cache block invalidation comprising the steps of: receiving a cache block invalidation command indicating a range of addresses to be invalidated; iterating said cache block invalidation command over address tags of all cache entries of a cache including comparing an address tag of each cache entry to said range of addresses to be invalidated, and if said address tag is within said range of addresses to be invalidated, setting a valid bit for data corresponding to said address tag to indicate an invalid state; and upon receipt of a cache access during said step of iterating comparing an address accessed by said cache access to said range of addresses to be invalidated, and if said address accessed by said cache access is within said range of addresses to be invalidated, generating a cache miss in response to said cache access.