1. A method of configuring a programmable integrated circuit device with a user logic design including a variable latency interconnect network and logic modules having features provided for dealing with latency, said method comprising: examining said variable latency of said interconnect network and said features of said logic modules provided for dealing with latency; assigning connections of said logic modules to said interconnect network according to said features of said logic modules provided for dealing with latency; incorporating results of said examining and said assigning into a configuration embodying said user logic design; and loading said configuration into memory of a programmable integrated circuit device.