1. A translation lookaside buffer for use in a processor that executes instructions from first and second processes, said first process addressing a first virtual memory space comprising a plurality of pages of a first page size and said second process addressing a second virtual memory space comprising a plurality of pages of a second page size, said translation lookaside buffer storing mappings of addresses in said first and second virtual memory spaces to a physical memory space and said translation lookaside buffer comprising: a memory having a first memory space for storing a plurality of virtual address identifiers and a second memory space for storing a corresponding plurality of physical page identifiers; indexing means, coupled to said memory, for creating an index address to a specific location in said first memory space for an input virtual address from a subset of bits of said input virtual address; an index selection circuit, coupled to said indexing means, for selecting said subset to comprise a first subset of bits if said input virtual address is an address in said first virtual memory space and for selecting said subset of bits to comprise a second subset of bits different than said first subset if said input virtual address is an address in said second virtual memory space; comparing means, coupled to said memory, for comparing a virtual address identifier stored in said first memory space at said index address with said input virtual address and for generating a match signal when said stored virtual address identifier matches said input virtual address, said comparing means comprising masking means for masking, with a first mask, comparisons of a first set of individual bits in said virtual address identifier to corresponding bits of said input virtual address when said input virtual address is an address in said first virtual address space and for masking, with a second mask, comparisons of a second set of individual bits in said virtual address identifier to corresponding bits of said input virtual address when said input virtual address is an address in said second virtual address space; and output means, coupled to said memory and to said comparing means, for outputting from said second memory space the physical page identifier corresponding to the matching stored virtual address identifier in response to said match signal.