1. A computer implemented method for performing transactional memory operations in a multi-processor transactional execution (TX) environment, the method comprising: executing an instruction to cause a transaction be executed, by a processor, in an atomic write-only transaction mode, execution in the atomic write-only transaction mode comprising: monitoring write-set cache lines of the transaction while in atomic write-only transaction mode; and based on detecting a write-set conflict, aborting the transaction; suppressing any transaction abort due to conflicts of a read-set generated while in the atomic write-only transaction mode; and absent any aborting, completing the transaction, the completing comprising committing transactional stores to memory and updating architecture states.