1. A computing system comprising: a store queue comprising a plurality of queue entries, wherein each queue entry is configured to store data for a committed store instruction; and a cache coupled to the store queue configured to convey information corresponding to a cache miss; wherein in response to a cache miss corresponding to a first committed store instruction, the store queue is configured to convey data to the cache that corresponds to a second committed store instruction, wherein the second committed store instruction follows the first committed store instruction in program order.