1. Apparatus for processing data comprising: processing circuitry to execute a sequence of program instructions including memory access instructions to generate non-volatile memory access requests to non-volatile memory; a persist buffer to store persist buffer data indicative of a sequence of persistent writes to said non-volatile memory; and a write controller responsive to said persist buffer data to control persistent writes to said non-volatile memory; wherein a persist barrier indicates for a set of persistent writes that any persistent writes of said set to said non-volatile memory preceding said persist barrier in said sequence of program instructions should be made before any of said set of persistent writes to said non-volatile memory following said persist barrier in said sequence of program instructions; said persist buffer data is indicative of a relative order of any persist barrier within said sequence of persistent writes to said non-volatile memory; said write controller is responsive to said persist buffer data to prevent writing to said non-volatile memory by persistent writes to said non-volatile memory following a given persist barrier within said sequence of program instructions before persistent writes to said non-volatile memory preceding said given persist barrier within said sequence of program instructions; further processing circuitry to execute a further sequence of program instructions including memory access instructions to generate non-volatile memory access requests to said non-volatile memory; a further persist buffer to store further persist buffer data indicative of a further sequence of persistent writes to said non-volatile memory and persist barrier instructions; and a further write controller responsive to said further persist buffer data to control writes to said non-volatile memory; wherein, when said persist buffer data is changed to represent one of a youngest write to said non-volatile memory by said processing circuitry and a youngest persist barrier instruction of said processing circuitry, said persist buffer is configured to send a snoop request to said further persist buffer to identify any writes to said non-volatile memory and any persist barrier instructions represented by said further persist buffer data upon which one of said youngest write and said youngest persist barrier instruction is dependent.