1. A method for efficiently determining the length of an instruction within a stream of instruction bytes processed by a microprocessor having a variable instruction length instruction set architecture, the method comprising: receiving each instruction byte and the next instruction byte of the stream and generating in response thereto a first length addend, a second length addend, and a select control; selecting as an output, for each associated instruction byte, one of the following inputs based on the associated select control: a zero input and the second length addend associated with each of the next three instruction bytes of the stream; and adding the associated first length addend and the associated selected output to generate the length of the instruction.