1. A level shift circuit that converts a level of an input signal, the input signal having a logic level at a first input electric potential and a logic level at a second input electric potential, and that generates an output signal, the output signal having a logic level at a first output electric potential corresponding to the first input electric potential and a logic level at a second output electric potential corresponding to the second input electric potential, the level shift circuit comprising: a first power-supply node to which the first output electric potential is supplied; a second power-supply node to which the second output electric potential is supplied; a latch unit having an input node and an output node from which the output signal is output, the latch unit being configured to receive power from the first power-supply node and the second power-supply node and to maintain, if an electric potential of the input node is identical to one of the first output electric potential and the second output electric potential, an electric potential of the output node to be the other one of the first output electric potential and the second output electric potential; a switching element that is provided between the first power-supply node and the input node and controlled to be in an OCN state or an OFF state; a control unit that controls the switching element to be in the ON state at a timing corresponding to the time when the logic level of the input signal changes from the first input electric potential to the second input electric potential; and a setting unit that changes an electric potential of the output node to the first output electric potential in a predetermined period just before the logic level of the input signal changes.