1. A method of global routing of integrated circuits based on localized routing optimization, the method comprising: defining, using a processor, one or more regions of an integrated circuit; assigning, using the processor, at least one optimization objective with each region defined; generating, using the processor, one or more constraints for each region, based on the assigned optimization objectives, wherein the generating comprises: adding corresponding optimization objectives in a region to a corresponding constraint for each of the one or more regions when solution space for nets contains a route that at least one segment is in the corresponding region; and performing, using the processor, global routing of each of one or more segments of a net of the integrated circuit according to the optimization objective and the one or more constraints of the region; causing, by the processor, the integrated circuit to be fabricated.