1. A memory cell comprising: a substrate; a first storage element overlying a first portion of the substrate for storing a first data bit in the memory cell; a second storage element overlying a second portion of the substrate insulating layer for storing a second data bit in the memory cell; an insulator electrically separating the first storage element from the second storage element, the insulator comprising a material that is different from the first and second storage element; a control electrode overlying the first storage element and the second storage element, the control electrode having a substantially planar lower surface and a substantially planar upper surface; and first and second current electrodes formed in the substrate, a portion of each of the first and second current electrodes respectively underlying a portion of the first storage element and the second storage element.