1. An apparatus, comprising: first and second execution pipelines configured to execute, in parallel, graphics instructions for respective first and second different portions of a frame of graphics data; and a register file coupled to the first and second execution pipelines and configured to store operands for the first and second execution pipelines; wherein the apparatus is configured, in response to determining that a graphics instruction imposes a dependency of the first pipeline on graphics data from the second portion of the frame that is assigned to the second execution pipeline, to: read a plurality of operands from the register file, including an operand assigned to the second execution pipeline; and select the operand assigned to the second execution pipeline as an input operand for the first execution pipeline; and wherein the apparatus is configured to execute instructions of a particular instruction set architecture (ISA), and wherein the particular ISA includes a restriction that operands for gradient-type instructions must be sourced from a register file.