1. An integrated circuit (IC) for using direct memory access (DMA) to initialize a programmable logic device (PLD), the IC operably coupled to the PLD, the PLD configurable to perform application specific functions, the IC comprising: an input/output (I/O) interface, the I/O interface converting a signal format between the IC and the PLD; and a PLD interface, the PLD interface including: a configuration and status register, the configuration and status register adapted to manipulate a control line of the PLD to configure the PLD in a programming mode via the I/O interface; a data buffer, the data buffer for temporarily holding PLD programming data received from a DMA control at a DMA speed, the PLD programming data configured to program the PLD to perform the application specific functions; and pacing logic, the pacing logic controlling a speed of transmitting the PLD programming data to a programming port on the PLD via the I/O interface at a PLD programming speed, the PLD programming speed being a different speed than the DMA speed, and in combination with the PLD configured in the programming mode based on manipulation of the control line, programming the PLD to perform the application specific functions.