1. A method for supporting memory mapped input output (MMIO) devices in a multi-node computer system, the multi-node computer system comprising an interconnect having a plurality of MMIO address space range registers, a plurality of central processor unit (CPU) nodes, a plurality of input output ( 10 ) nodes, each IO node including at least an MMIO device, the method comprising: determining a total amount of MMIO address spaces that are used by the multi-node computer system; determining a granularity of the MMIO address spaces based on the number of the MMIO address space range registers; and configuring the range registers of the interconnect based on the determined granularity.