1. A peripheral interface circuit, comprising: an interface sequencer, coupled to a peripheral memory through a peripheral interface; an input/output controller, coupled to a bus master through one or a plurality of bus interfaces; a register unit; and a data buffer, wherein the interface sequencer receives requests from the input/output controller and accesses the peripheral memory in response to the requests, wherein the input/output controller determines whether each of the received requests is a data access request or a register access request by determining whether type of the each of the requests is a data access type or a register access type, when the data access request is received from the bus master, the input/output controller determines whether target data corresponding to the data access request exist in the data buffer, when the register access request is received from the bus master, the input/output controller accesses a target register, in the register unit, corresponding to the register access request, wherein the data buffer is randomly accessed by address, if the target data of the data access request does not exist in the data buffer, the input/output controller sends an interface request to the interface sequencer to access the peripheral memory to receive the target data, and keeps a copy of at least the target data into the data buffer without moving other data stored in the data buffer, wherein the register unit controls a behavior of the peripheral interface circuit or reflect a status of the peripheral interface circuit, and the data buffer keeps the copy of one or more parts of the peripheral memory, wherein the bus master initiates requests to retrieve an identification code from the peripheral memory, wherein the bus master determines a type of the peripheral memory according to the identification code, and requests the interface sequencer to operate at a suitable transmission mode.