1. A method for reducing interrupt latency in a data processing system comprising: providing a storage device having a predetermined maximum number of storage locations; coupling data execution circuitry to the storage device for providing data to the storage device and storing the data in the storage device; coupling interrupt control circuitry to the data execution circuitry, the interrupt control circuitry interrupting the data execution circuitry; completing outputting stored data in the storage device, thereby having an associated interrupt latency resulting from outputting of the stored data; and dynamically changing storage utilization of the storage device to minimize the interrupt latency, the storage device having a utilization value that varies between a predetermined minimum number of storage locations and the predetermined maximum number of storage locations based upon an operating mode of the data processing system.