1. A processor comprising: one or more execution units; an instruction cache having one or more instructions stored therein for execution by the one or more execution units; and an instruction unit circuit coupled to the one or more execution units and which fetches the one or more instructions from the instruction cache and sends the one or more instructions to the one or more execution units for execution, wherein the instruction unit circuit comprises a local loop buffer and a plurality of physical instruction buffers, and wherein the instruction unit circuit is configured to: detect a presence of a single branch, backwards short loop within a stream of fetched instructions; determine whether the number of instructions of the single branch, backwards short loop is greater than a capacity of the local loop buffer, wherein the local loop buffer is a physical buffer separate from the plurality of physical instruction buffers and the instruction cache; and in response to determining that the number of instructions of the single branch, backwards short loop is greater than the capacity of the local loop buffer: generate a virtual loop buffer that is physically distributed substantially equally across the plurality of physical instruction buffers, wherein a portion of each of the plurality of physical instruction buffers is not allocated to the virtual loop buffer; buffer the instructions of the single branch, backwards short loop in the virtual loop buffer, wherein the instructions of the single branch, backwards short loop are distributed substantially equally across the plurality of physical instruction buffers based on the number of instructions of the single branch, backwards short loop; and retrieve the instructions of the single branch, backwards short loop from the virtual loop buffer for completing the single branch, backwards short loop by bypassing the instruction cache; and in response to determining the number of instructions of the single branch, backwards short loop is not greater than the capacity of the local loop buffer: buffer the instructions of the single branch, backwards short loop in the local loop buffer; and retrieve the instructions of the single branch, backwards short loop from the local loop buffer for completing the single branch, backwards short loop by bypassing the instruction cache.