1. An encoding system including a processor and a memory for encoding an event time series, the system comprising: a processor; and a memory, the memory storing instructions to cause the processor to execute: an inter-arrival time computing device configured to compute, using said processor, an inter-arrival time between a plurality of input events and computes a sequence of events; a transformation device configured to transform, using said processor, the inter-arrival time between the plurality of input events into discrete time symbols; and a mapping device configured to map, using said processor, the input events and the discrete time symbols using a dictionary to output a time gram.