1. A structural analysis tool for analyzing a structural framework of a circuit design during a design process implemented as a series of operating instructions stored on a non-transitory computer readable medium that direct the operation of a processor when initiated, said tool comprising: a structural analyzer configured to apply a structural rule to said circuit design in a synthesis or a pre-layout static timing analysis environment of said design process having valid timing data; and a structural assessor configured to generate structural data of said circuit design based on application of said structural rule by said structural analyzer.