1. A processor comprising: a requester to send a memory request, the memory request having a memory address of a memory that stores requested data; a record keeping structure to receive the memory request; circuitry to determine a last accessor of the memory address; circuitry to send a cache probe to the last accessor; circuitry to determine the last accessor no longer has a copy of the line; and circuitry to send a request for previously accessed version of the line, the request bypassing the tag-directories and obtaining the requested data from memory.