1. A system comprising: a symmetric multiprocessor (SMP), the SMP comprising a first processor node that comprises a non-data inclusive coherent (NIC) directory and a multilevel caching structure, the system configured to perform a method comprising: determining a first eviction entry of a highest-level cache in the multilevel caching structure of the first processor node of the SMP; determining that the NIC directory is not full; determining that the first eviction entry of the highest-level cache is owned by a lower-level cache in the multilevel caching structure; based on the NIC directory not being full and based on the first eviction entry of the highest-level cache being owned by the lower-level cache, installing an address of the first eviction entry of the highest-level cache in a first new entry in the NIC directory; invalidating the first eviction entry in the highest-level cache; determining a second eviction entry in the lower-level cache in the multilevel caching structure; determining that an entry corresponding to the second eviction entry is located in the NIC directory; determining that an entry corresponding to the second eviction entry is not located in another lower-level cache in the multilevel caching structure; based on the entry corresponding to the second eviction entry being located in the NIC directory and based on no entry corresponding to the second eviction entry being located in another lower-level cache of the multilevel caching structure, creating a second new entry corresponding to the second eviction entry in the highest-level cache; and invalidating the entry corresponding to the second eviction entry in the NIC directory.