1. Real-time software monitor and write protect apparatus comprising: means for providing a sequence of memory addresses in response to input of a sequence of data keys, said data keys occurring at selected times during execution of a program in a central processor, means for sequentially accepting said memory addresses and providing in response thereto a plurality of sequential legitimate codes, means for sequentially comparing said legitimate codes with selected portions of said data keys to provide therefrom a signal indicating the validity of said keys, and means for providing software isolation by specifying areas of memory that may not be altered in response to said sequence of data keys.