1. A programmable resistive memory, comprising: a plurality of multiple-bit programmable resistive memory cells, at least one of the multiple-bit programmable resistive memory cells having an programmable resistive element with 2 n (n>1) distinct resistance levels and at least one diode as program selectors; wherein the first and second terminals of the diode with a first and second types of dopants being built as the source/drain of a MOS device in a well for MOS devices or on the same polysilicon structure; a program control circuit to apply high voltage or high current pulses to program the programmable resistive cells; and a sensing circuit with at least 2 n −1 reference resistance levels to sense the programmable resistive cell into digital data, wherein the programmable resistive memory is configured to program to the desirable resistance level by repetitively turning on the program control circuit to program the multiple-bit programmable resistive memory cells, and wherein the sensing circuit is configured to verify the data until the desirable resistance level is reached, and wherein the program control circuit or the sensing circuit has at least one register to store program count or bit count.