1. A circuit emulation system comprising: a bus configured to host electronic communications; and one or more emulation processor circuits, each respective processor circuit comprising: a multiplexer communicatively coupled to the bus, the multiplexer configured to, during a first execution phase, execute an instruction of a first instruction set and transmit to the bus a first processor output according to the instruction, and, during a second execution phase, execute a second instruction of the first instruction set and transmit to the bus a second processor output according to the second instruction; a cluster of one or more processors communicatively coupled to the multiplexer, wherein a processor of the one or more processors is configured to generate the first processor output during the first execution phase and generate the second processor output from the first processor output during the second execution phase.