1. A system, comprising: a first region implemented in programmable circuitry of a programmable integrated circuit, wherein the first region comprises predefined interface circuitry configured to communicate with a host processor; a second region implemented in the programmable circuitry of the programmable integrated circuit, wherein the second region comprises a first hardware accelerated kernel of an OpenCL application; and a first monitor circuit implemented within the first region or the second region; wherein the first hardware accelerated kernel and the first monitor circuit are coupled to the interface circuitry of the first region and the first monitor circuit is operable responsive to control signals received from the host processor of a platform through the interface circuitry to store operation data for the first region or the first hardware accelerated kernel; and wherein the interface circuitry of the first region comprises an interconnect circuit coupled to the first hardware accelerator and the first monitor circuit.