1. A method of processing a circuit design specified in a hardware description language (HDL), the method comprising: for each of a plurality of nets of the circuit design, creating a trace memory structure, using a processor, during compilation of the HDL circuit design; wherein each trace memory structure comprises trace properties indicating whether tracing is active for the net; generating a transaction function during compilation for each net; wherein the transaction function is configured to invoke tracing for each net during simulation of the circuit design according to an evaluation of the trace properties for the net; wherein the trace properties for each net comprise a plurality of flags and each flag indicates whether one of a plurality of different trace functions is active for the net; and wherein each flag of the trace properties for a net is updatable during runtime of a simulation of the circuit design responsive to a user input.