1. A comprising: fetching a single instruction, wherein the single instruction includes a destination operand that specifies a destination vector register and a source operand that identifies content that indicates: a plurality of first vector registers, a first set of two or more indexes of each of the plurality of first vector registers, wherein each of the first set of indexes identifies a source data element in its corresponding one of the first vector registers, and a second set of two or more indexes of the destination vector register for each identified source data element; decoding the fetched single instruction; and executing the decoded single instruction which causes, for each of the first set of indicated indexes of each of the plurality of first vector registers, the source data element that corresponds to that indicated index of that one of the first vector registers to be stored in a set of one or more destination data elements that correspond to the second set of identified indexes of the destination vector register for that source data element.