1. A computer-implemented method of extracting datapath logic from an integrated circuit design, comprising: receiving a circuit description for the integrated circuit design which includes a plurality of cells interconnected to form a plurality of nets, by executing first instructions in a computer system; generating cell clusters from the circuit description, by executing second instructions in the computer system; evaluating the cell clusters to identify one or more cluster features in the cell clusters, by executing third instructions in the computer system; and selectively classifying the cell clusters as either datapath logic or non-datapath logic using one or more machine-learning models based on the one or more cluster features, by executing fourth instructions in the computer system.