1. A method comprising: responsive to detecting a system management interrupt (SMI), storing a first location in a portion of a physical memory to which an advanced programmable interrupt controller (APIC) is mapped prior to the SMI; and moving a mapping of the APIC to a second location in the physical memory for system management mode (SMM) execution, to reduce interference with accesses to system management random access memory (SMRAM) comprising a portion of the physical memory.