1. A method comprising: signaling at least one of a plurality of state registers of a processor that a processor power state of the processor is going to be changed to a zero processor power state from an active processor power state; based on the signaling, writing data stored as a plurality of state bits of the at least one of plurality of state registers to always on circuitry in the at least one register of the plurality of registers; changing a processor power state of the processor and of the state bits from the active processor power state to the zero processor power state to reduce power consumption, while maintaining a processor power state of the always on circuitry to maintain the plurality of state data stored in the always on circuitry.