1. A re-writable memory, comprising: a memory array including a plurality of two-terminal memory devices, each two-terminal memory device having a memory plug capable of reversibly switching from a first resistance state to a second resistance state; a first plurality of conductive lines arranged such that each of the two-terminal memory devices have a first terminal in electrical contact with one of the first plurality of conductive array lines; and a second plurality of conductive array lines arranged such that each of the two-terminal memory devices have a second terminal in electrical contact with one of the second plurality of conductive array lines; peripheral circuitry capable of receiving external signals, the peripheral circuitry causing a reference voltage to be applied to the first plurality of conductive lines in response to at least one of the external signals.