1. A data storage device, comprising: an array of memory cells arranged into rows and columns, each memory cell comprising a switching device in series with a resistive random access memory (RRAM) element; and a controller configured to select a bit set value from a plurality of bit set values each separately writable to the cells in the selected group to place said cells in a selected logical state, to write the selected bit set value to all of the memory cells in said group to place said cells in a baseline logical state, and to subsequently write user data to said group by overwriting user data from a host device to said group in relation to the selected bit set value so that a first portion of the cells in said group are written to a new logical state and a second portion of the cells in said group remain in the baseline logical state.