1. An apparatus for a register file, comprising: a plurality of multi-bit storage cells for storing a plurality of bits respectively corresponding to a plurality of threads; and a plurality of port groups, operatively coupled to said plurality of multi-bit storage cells, responsive to physical register identifiers; wherein said plurality of port groups are responsive to respective ones of a plurality of thread identifiers, each of the plurality of thread identifiers for uniquely identifying a particular thread from among a plurality of threads.