1. A method comprising: loading a block of N instructions starting from a first address in a first data memory; configuring a processor with a count value of N and address information to identify the first address and to identify a location in a very long instruction word (VLIW) memory (VIM) in response to a load VLIW (LV) instruction fetched from an instruction memory; and loading each of the N instructions in an instruction slot at the location in the VIM to create a VLIW comprising the N instructions.