1. A microcontroller comprising: means for storing a plurality of microinstructions at individually addressable storage locations; means for executing each of said microinstructions in a fixed time period comprising an input phase and an output phase, means for transferring the next microinstruction from said storing means to a control means during the executing of a current microinstruction; said executing means including an ALU unit having first and second input terminals and an output terminal; an ALU register connnected to said output terminal; a memory for storing data at a plurality of addresses; an auxiliary register for storing the same data supplied to one predetermined address of said memory; a first bus connecting the output of said memory to said one ALU input; a second bus connecting the output of said auxiliary register to said second ALU input; a third bus connecting the output of said ALU register to the input of said memory and said auxiliary register; said control means connected to said storing means and responsive to one instruction for generating (A) first and second gating signals to simultaneously gate the output of said memory and said auxiliary register to the inputs of said ALU during said input phase; (B) a load register signal to store the output of said ALU unit into said ALU register; and (C) a write memory signal during said output phase of said executing means whereby the byte of data transferred from said ALU register to said memory represents the results of a logical operation by said ALU unit on two operands stored in different locations of said memory.