1. A data processing system, the system comprising: a processing loop circuit, wherein the processing loop circuit includes a data detector and a soft decision decoder, wherein the data detector is operable to provide a detected output, and wherein the soft decision decoder is operable to apply a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output; a queuing buffer, wherein the queuing buffer is operable to store the soft decision output and the first hard decision output; a hard decision decoder, wherein the hard decision decoder is operable to access the first hard decision output and to apply a hard decoding algorithm to yield a second hard decision output; and wherein the data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge.