1. Error detection apparatus comprising: a binary word source; translator means, including input means connected to said binary coded word source for receiving a first plural-bit binary word, a plurality of registers for storing a corresponding plurality of said first words, and output means, including identifying means connected and responsive to said input means and said register means for producing a second plural-bit binary word which is related to said first work by identifying one of said plurality of register means storing one of said first words equal to a said first word received from said binary word source; and check means, connected to said binary word source and the output of said translator, including check signalling means for indicating the proper identification of one of said plurality of registers.