1. A semiconductor storage device, comprising: an input controller including a register, a comparator, and a mode controller; and a content-addressable memory block connected to the input controller, wherein each word circuit of the content-addressable memory block comprises: a k-bit 1st-stage sub-word circuit connected to search line 1 of the input controller; and an (n-k)-bit 2nd-stage sub-word circuit connected to search line 2 of the input controller, and the k-bit 1st-stage sub-word circuit and the (n-k)-bit 2nd-stage sub-word circuit are connected via a segmentation circuit.