1. A method for generating an encoded output signal from an input signal having a structure comprising a plurality of discrete signal units, the method comprising: inputting the input signal into a computer processor having software stored therein for executing a plurality of processing elements, wherein each processing element comprises a logic manifold association processor having an input and an output, and wherein each processing element generates a single output signal; forming a recursive loop between a pair of processing elements, wherein the output of each pair of processing elements is fed back into the input of the other processing element, and wherein at least one of the pair of processing elements further receives an element input comprising a small subset of the plurality of discrete signal units of the input signal; training a plurality of pairs of processing elements to store a plurality of reciprocal signal pairs, wherein when a first signal of a reciprocal signal pair of the plurality is input into a first processing element, the first processing element outputs a second signal of the reciprocal signal pair, and when the second signal of the reciprocal signal pair is input into a second processing element, the second processing element outputs the first signal, so that the reciprocal signal pair is locked within the pair of processing elements; wherein when the at least one of the pair of processing elements that receives the small subset of discrete signal units receives the input signal units, it forces the two processing elements to generate an encoded output associated with the subset of input signal units.