1. A method of making an integrated circuit structure, comprising the steps of: depositing a layer of tungsten (412); depositing a layer of titanium tungsten (416) over said layer of said tungsten; without breaking vacuum after said step of depositing a layer of titanium tungsten, depositing a first layer of amorphous silicon (418) over said layer of titanium tungsten; patterning said layers together to define a conductor (108, 220); encapsulating said conductor in a capping layer; annealing said encapsulated conductor at temperatures below the crystallization temperature of said first layer of amorphous silicon; and removing said capping layer.