1. A coprocessor (PL), comprising: a memory router configured to i) transfer data to/from an external memory device, the transfer of data being initiated by an external processing system (PS) and ii) distribute the data to a plurality of blocks within the PL; and at least one collection block configured to transfer data to/from the memory router, each collection block including a collection router configured to i) transfer data to/from the memory router, ii) transfer data to/from at least one collection router of a neighboring collection block, and iii) transfer data to/from blocks within the collection block, at least one programmable operator configured to i) transfer data to/from the collection router, and ii) perform a programmable operation on data received from the collection router, the PL unit configured to perform programmable operations on data transferred from the external memory and provide the operated-on data to the external memory with substantially zero overhead to the PS.