1. A method of squaring a binary finite field element by a data processing apparatus, the method comprising: receiving a binary finite field element at a first register, the binary finite field element comprising a sequence of binary values, wherein the first register includes a first plurality of register locations configured to store the sequence of binary values; accessing input components of the binary finite field element, the input components defined according to intervals in the sequence, wherein each of the input components includes one of the binary values from each of the intervals in the sequence; generating output components based on the input components using interconnect logic circuitry, wherein the interconnect logic circuitry includes a plurality of accumulation gates; and generating a square of the binary finite field element in a second register based on the output components, wherein the second register includes a second plurality of register locations configured to store the square of the binary finite field element.