1. A testing system for testing a circuit in an integrated circuit, the system comprising; a test sensor embedded on an integrated circuit chip with a circuit under test on the integrated circuit chip, wherein the test sensor comprises an envelope detector circuit operative to detect an envelope signal inputted to the test sensor from an output of the circuit under test; a source of an optimized stimulus operative to apply the optimized stimulus to the circuit under test, wherein the optimized stimulus is a radio frequency (RF) signal with a time-varying envelope; the test sensor being operative to detect, from the circuit under test, a test response to the optimized stimulus; and a prediction module predicting a measured specification for the circuit under test from the test response.