1. In conjunction with a processor that is configured to obtain virtual memory address translations by referencing table entries that normally each store a single address translation, a method comprising the following steps: configuring the processor to reference a single table entry to obtain a plurality of different address translations; generating a first memory fault when the processor attempts to reference said single table entry; temporarily loading a particular address translation in said single table entry in response to said first memory fault, wherein the processor obtains said particular address translation from said single table entry after said first memory fault; marking as invalid said single table entry after the processor has obtained said address translation; the processor having an address translation cache, wherein the marking step is performed without flushing the address translation cache.