1. A method comprising: generating an approximately timed (AT) model of a system block of a system-on-chip (SoC) at a transaction level (TL), wherein the AT model includes a four-phased communication including a start request, an end request, a start response, and an end response, the communication supporting non-blocking behavior; generating an untimed functional model of the system block at an untimed functional level, the untimed functional model configured to be invoked by the AT model; and generating a cycle accurate (CA) model of the system block at a cycle accurate (CA) level using the AT model.