1. A method for constructing a reduced set of instructions for operating a cross-connected dual-MAC processor having a complete command set including at least 4 two-input accumulator statements, at least 4 three-input accumulator statements, at least 4 dual two-input accumulator statements, at least 8 single product statements, and at least 12 dual product statements, comprising the steps of: including in said instruction set only two-input accumulate statements associated with a particular one of said two MAC processors; including in said instruction set said three-input accumulator statements; including in said instruction set said dual two-input accumulator statements and restricting said dual two-input accumulator statements to adjacently numbered pairs of accumulators; including in said instruction set only one single product statement; and including in said instruction set only one dual product statement from each of six symmetric dual product statement pairs.