1. A method of operating a processor comprising: renaming, as a physical register, a microcode architectural register used by a microcode instruction, the renaming storing a pointer that identifies the physical register as containing state information for the microcode architectural register; committing the state information to the microcode architectural register and updating a value of an indicator corresponding to the microcode architectural register to indicate that the pointer is active; and reclaiming the physical register to be available for renaming an instruction set architectural register, the reclaiming being according to the indicator.