1. A device comprising: a memory to store a plurality of instructions; and a processor to execute one or more instructions of the plurality of instructions in the memory to: receive program code, receive an input size and type information associated with inputs to the program code, determine, prior to execution of the program code and based on the input size and the type information, a portion of the program code that is executable by a graphical processing unit (GPU), when determining the portion of the program code that is executable by the GPU, the processor is to execute the one or more instructions to: compare portions of the program code to a degree of parallelism threshold, and determine the portion of the program code that is executable by the GPU based on comparing the portions of the program code to the degree of parallelism threshold, determine, prior to execution of the program code and based on the input size and the type information, a portion of the program code that is executable by a central processing unit (CPU), the portion of the program code that is executable by the CPU being different than the portion of the program code that is executable by the GPU, compile the portion of the program code that is executable by the GPU to create a compiled GPU-executable portion of the program code, compile the portion of the program code that is executable by the CPU to create a compiled CPU-executable portion of the program code, provide, to the GPU for execution, the compiled GPU-executable portion of the program code, and provide, to the CPU for execution, the compiled CPU-executable portion of the program code.