1. An anti-fuse memory, comprising: an anti-fuse magnetic tunnel junction (MTJ) memory cell; and a programming driver configured to drive the anti-fuse MTJ memory cell with a programming voltage, wherein the anti-fuse MTJ memory cell is configured to switch into an anti-parallel state in response to being driven with the programming voltage, and wherein the programming driver is further configured to drive the anti-fuse MTJ memory cell with the programming voltage so as to break down a dielectric barrier in the anti-fuse MTJ memory cell after the anti-fuse MTJ memory cell switches into the anti-parallel state.