1. A method of a signal processor for improving conflict miss cache performance in a data processing program having plural relocatable functions comprising the steps of: simulating, at the signal processor, operation of the data processing program to determine cache conflicts where portions of functions map to a same cache entry; forming conflict graphs corresponding to said determined cache conflicts; relinking the data processing program with at least one relocatable function relocated based upon said conflict graphs and, accordingly, improving said conflict miss cache performance; compiling the data processing program including generating symbolic information about function size and location; and wherein said step of simulating operation of the data processing program employees said symbolic information about function size and location.