1. A method of implementing a fault-tolerant computer system using symmetric multiprocessing computer systems, the method comprising controlling at least one of the symmetric multiprocessing computer systems by: creating virtual paging structures, a virtual paging structure being associated with a processor in the symmetric multiprocessing computer system and reflecting physical page access privileges to shared memory for the processor; and controlling access to shared memory based on physical page access privileges reflected in the virtual paging structures to coordinate deterministic shared memory access between processors in the symmetric multiprocessing computer system.