1. A multithreaded processor system comprising: a register file having N hardware threads, where N is an integer greater than or equal to one; an offline storage structure having M hardware threads, where M is an integer greater than or equal to one; and a thread control that transfers register values associated with at least one of the N hardware threads to registers of at least one of the M hardware threads and transfers register values of at least of one of the M hardware threads to registers of at least one of the N hardware threads.