1. A computer-implemented method for allocating an architectural register in a computer, wherein the computer includes a processor having an at least one or more mapping tables that manage relations between a plurality of architectural registers and a plurality of physical registers, the method comprising: detecting at least one or more available architectural registers to an allocation target virtual register; identifying a plurality of adjacent instructions to each of all instructions having the allocation target virtual register in a destination operand; counting a number of uses of an architectural register appearing in the destination operand for each of the architectural registers for the identified plurality of adjacent instructions; summing the numbers of uses of the architectural registers for each of an entry group having a same assignment rule for correlation with the architectural registers in the at least one or more mapping tables to calculate a total of the numbers of uses of entries for the entry group; and selecting the architectural register to be allocated to the allocation target virtual register among the detected plurality of available architectural registers.