1. A method comprising: analyzing, by a computing device, a logic gate design, of an application specific integrated circuit, having a plurality of logic gates; identifying, by the computing device, logic gates, of the plurality of logic gates, that are affected by toggling activity associated with an input of one or more of the plurality of logic gates; replacing, by the computing device and within the logic gate design, the identified logic gates with different logic gates that are not affected by the toggling activity, a quantity of the different logic gates being smaller than a quantity of the identified logic gates; and outputting, by the computing device, a new logic gate design for the application specific integrated circuit based on replacing the identified logic gates with the different logic gates, the application specific integrated circuit, with the new logic gate design, consuming less power than the application specific integrated circuit with the logic gate design.