1. A digital frontend circuit for a radio frequency (RF) transmitter, the digital frontend circuit comprising: a digital predistortion block for computing predistorted transmit signals according to a Volterra series approximation model, the digital predistortion block having an input for receiving input samples at a first sample rate and an output for providing the predistorted transmit signals at the first sample rate; a plurality of sub-sample delay elements, each of the sub-sample delay elements for providing a delay to an input sample as specified by the Volterra series approximation model, each of the delays provided by each of the sub-sample delay elements is based on a fraction of the first sample rate; and a selection circuit coupled to the digital predistortion block and to the plurality of sub-sample delay elements, the selection circuit selecting one of the plurality of sub-sample delay elements in response to a selection signal from the digital predistortion block, the selection signal for selecting a delay as specified by the Volterra series approximation model.