1. A central processor for a data processing system which system further includes a memory for storing instructions that are grouped in routines, at least one routine constituting a subroutine for processing information in an argument list, the first memory location of the subroutine storing a subroutine mask, and at least one other routine in the memory being a calling routine that utilizes the subroutine and that contains a subroutine calling instruction that includes an operation code, a first operand specifier for identifying a representation of the argument list to be passed from the calling routine to the subroutine and a second operand specifier for identifying the location of the subroutine mask in the memory, said central processor comprising: A. general purpose register means including: i. a plurality of general registers, the subroutine mask in the subroutine designating those of said general registers to be used by the subroutine, ii. a program counter register for addressing instructions in the memory, and iii. a stack pointer register for addressing locations in a memory stack including a block of consecutive memory locations, B. instruction decoding means for decoding the instruction operation codes, C. operand retrieval means connected to said instruction decoding means for decoding the first operand specifier from the subroutine when said instruction decoding means decodes an operation code as a subroutine calling instruction, D. control means connected to said general purpose register means, said instruction decoding means and said operand retrieval means for controlling the response of said central processor to the subroutine calling instruction and to the subroutine mask, said control means including means connected to said instruction decoding means and said general purpose register means for storing the contents of said program counter register and those general registers designated by the subroutine mask in the memory stack at locations specified by said stack pointer register prior to the execution of the subroutine thereby automatically to save processor state information for the calling routine.