1. In a recursive processor subject to error integration, the combination comprising: a. input terminal means for connection to a source of input data representing a time series, said input data being expressed in successive words in two's complement notation, b. a first two's complementer to which said input data from said input terminal means is coupled for inverting the sign of serial words coupled thereto in two's complement notation in response to a control signal, c. a numeric sub-processor coupled to the output of said first two's complementer for accepting input data in two's complement notation, said sub-processor being subject to a bias error which is consistently correlated with the sign of the input data, d. a second two`s complementer to which the output of said subprocessor is coupled for inverting the sign of serial words coupled thereto in two's complement notation in response to a control signal, and e. control means coupled to the control input of said first and second two's complementers to invert and reinvert respectively the sign of alternate words to substantially cancel said bias error without changing the sign of the output data stream.