1. A method of positioning all the individual elements of an interconnected configuration assembled into a unitary computational entity that satisfies at least one usefulness specification where said individual elements are of the type including semiconductor devices on a semiconductor chip, semiconductor chips on a modular package, modular packages on wiring supporting boards, and circuits in an array and where said usefulness specification includes wiring density and wiring net length comprising in combination the steps of providing a representation of the interconnected configuration of elements, providing a scoring capability capable of providing a measure of acceptability of a particular configuration of said elements with respect to at least one of wiring density and wiring net length and interdependently iteratively exchanging the position of subsets of said elements and for each subset accepting or rejecting the resulting arrangement in accordance with a measure provided by said scoring capability and varying the measure of acceptance of a subset position exchange in accordance with an incremental trend.