1. A method comprising: collecting related signals capable of having unrelated names into a Krutibus description; defining a bus capable of connecting the related signals in a bus definition file in the Krutibus description; providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus description; and providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.