1. A programmatic method for generating a circuit design from a functional specification according to at least one design objective, comprising steps of: forming an intermediate representation of the functional specification; analyzing the intermediate representation for identifying a physical instantiation that will possibly result in unacceptable interconnect delay or congestion; allocating functional units for performing operations of the intermediate representation, said allocating comprising selecting functional units from a plurality of candidate functional units; scheduling operations to occur at specified times on said selected functional units; and forming an architectural representation of the circuit design according to results of said scheduling.