1. A processor, comprising: a processor core, comprising: a first execution unit; and a second execution unit coupled to the first execution unit; and a peripheral device coupled to the second execution unit; wherein the second execution unit is configured to execute a complex instruction, and comprises: a status register comprising an execution control information field configured to store execution control information, wherein the execution control information specifies operational parameters of the peripheral device; and execution control logic configured to apply the execution control information to generate one or more execution control signals, and to control operation of the peripheral device via the execution control signals.