1. An apparatus that implements a store queue which holds pending stores and applies the stores to a memory subsystem of a processor in program order, the apparatus comprising: a content-addressable memory (CAM) which holds the stores that are pending and facilitates looking up the stores based on addresses for the stores; wherein the CAM does not keep track of program order between stores to different addresses; and a program-order queue which keeps track of program order between the stores in the CAM and thereby facilitates applying the stores to the memory subsystem in program order.