1. A processing system comprising: a source of instructions wherein each instruction is capable of containing one or more indirect addresses or data containing one direct address; a plurality of data memories for storng input and output data for said processing system and providing direct addresses; processing means coupled to said source of instructions and said plurality of data memories for processing data from said plurality of data memories according to the instructions from said sources of instructions and for generating direct addresses when instructed by said source of instructions; first pointer means comprising a plurality of first pointers each coupled to said data memories, to said processing means and to said source of instructions, said first pointers each comprising a plurality of first pointer register means each of which stores one direct address whereby said first pointer means receives indirect addresses from said source of instructions to address one first pointer register means to fetch data from one of said plurality of data memories for said processing means; and second pointer means comprising a plurality of second pointers each coupled to said data memories, to said processing means and to said source of instructions, said second pointers each comprising a plurality of second pointer register means each of which stoes one direct address, whereby said second pointer means receives indirect addresses from said source of instructions to address one second pointer register means to store data from said processing means in one of said memories.