1. A method of allocating separate memory spaces within a level-one (L1) cache, the method comprising: configuring a first set of entries in a static random access memory (SRAM) storage resource to function as a local and global data cache; configuring a second set of entries in the SRAM storage resource to function as direct mapped registers, wherein the direct mapped registers are internal to a processing unit; and arbitrating memory access requests received by the L1 cache from a first client that is configured to produce access requests that store data to the second set of entries and a second client that is configured to produce access requests that load data from the second set of entries, store data to the first set of entries, and load data from the first set of entries.