1. An integrated circuit comprising: a plurality of processor cores; a software-accessible storage to store an indication of a first event occurring within a software program, wherein the indication is to be stored in the software-accessible storage by software, and wherein the first event is re-configurable by the software, wherein the software-accessible storage includes a register whose bit locations each correspond at a given time to a different software event; a selection logic to select between an output of the software-accessible storage and a hardware-specific monitoring logic; and a hardware event counter to increment or decrement after an occurrence of a first bit of the bit locations being set to a “1” in the software-accessible storage when a corresponding software routine starts and to stop decrementing or incrementing after an occurrence of the first bit being cleared to a “0” when the corresponding software routine stops to indicate a count between the start and stop of the software routine.