1. A DCT circuit for forward discrete cosine transforming an N.times.N data f(x,y), where x,y=0. .. N-1, comprising: a preprocessing circuit receiving the N.times.N data and serially producing first pass modified terms ##EQU10## where j=O. .. N-1; a serial-to-parallel circuit receiving the first pass modified terms and outputting them column-wise; a computation circuit generating first pass transformed data f.sub.1 (x,y), where x,y=0. .. N-1, by evaluating the first pass modified terms of the serial-to-parallel circuit; and a parallel-to-serial circuit receiving the first pass transformed data and serially outputting them to a transpose memory; the pre-processing circuit also receiving the first pass transformed data and serially producing second pass modified terms ##EQU11## where i=O. .. N-1; the serial-to-parallel circuit also receiving the second pass modified terms and outputting them column-wise; the computation circuit also generating second pass transformed data by evaluating the second pass modified terms of the serial-to-parallel circuit; and the parallel-to-serial parallel circuit also receiving the second pass transformed data and serially outputting them as the N.times.N transformed data.