1. A design method of a hierarchical adaptive equalizer, the design method comprising: providing N delay elements; dividing the N delay elements into a plurality of adaptive algorithms, each of the adaptive algorithms having β delay elements; and logically structuring a hierarchical tree with the adaptive algorithms, the hierarchical tress comprising a levels, a top first level comprising β α−1 adaptive algorithms, a top second level comprising β α−2 adaptive algorithms, a bottom level comprising an adaptive algorithm, wherein N, α and β are integers not less than 1, and N is not less than β.