1. A decoder/multiplexer logic circuit capable of performing Boolean and fuzzy logic comprising: one or more AND NOT gates, each AND NOT gate comprising a circuit that performs conjunctions for 2 n possible combinations of truth values of n propositions, and each AND NOT gate configured to provide a measure of the difference between a first (X) and second (Y) input value, wherein the measure of the difference X−Y, is defined by: 1) when X=1 and Y=0, the measure of the difference is 1; 2) when X is less than Y, the measure of the difference is 0; and 3) is an increasing function of X and a decreasing function of Y when X is greater than Y.