1. A microcontroller comprising: a data memory divided into a plurality of memory banks; an address multiplexer for providing an address to said data memory; an instruction register providing a first partial address to a first input of said address multiplexer; a bank select register which is not mapped to said data memory for providing a second partial address to a said first input of said address multiplexer; and a plurality of special function registers mapped to said data memory, wherein said plurality of special function registers comprises an indirect access register coupled with a second input of said address multiplexer, and wherein said data memory comprises more than one memory bank of said plurality of memory banks that form a block of linear data memory to which no special function registers are mapped.