1. A bit-flipping sigma-delta modulator for a class D amplifier and comprising: a quantiser coupled to a bit-flipping means; one or more look-ahead quantisers; and a controller having inputs from the quantiser and the look-ahead quantiser and arranged to enable the bit-flipping means to provide a different output from that of the quantiser in order to reduce the quantised output transition rate of the modulator; a feedback circuit arranged to add a portion of the quantiser output to the input signal path of the modulator, and further comprising an integrator circuit in the input signal path between the input and the quantiser, the integrator circuit having a compensation circuit for adjusting the input to the quantiser when said previous modulator output has been changed by the bit flipping means from said previous quantiser output.