1. A method of forming a netlist for an electronic circuit, comprising: creating a Very High Speed Integrated Circuit Hardware Description Language (VHDL) file for a plurality of voltage domains, wherein the VHDL file includes a voltage domain attribute and a logic voltage attribute for a pin of the electronic circuit; reading the voltage domain attribute and the logic voltage attribute for the pin from the VHDL file; and synthesizing netlist instructions for the pin beginning with synthesizing netlist instructions within a voltage domain indicated by the voltage domain attribute and ending with synthesizing netlist instructions within a voltage domain indicated by the logic voltage attribute to form the netlist for the electronic circuit.