1. A method for estimating a rate of corruption of a plurality of storage bits in a logic circuit, comprising: on one or more processors, executing instructions for causing the one or more processors to perform operations including: inputting a description of an environment of the logic circuit, the description of the environment including a position of the logic circuit; estimating an atomic particle flux density at the position of the logic circuit as a function of the description of the environment; inputting a specification of the plurality of storage bits in the logic circuit; determining the rate of corruption of the plurality of storage bits as a function of the atomic particle flux density and a quantification of the plurality of storage bits in the logic circuit; and displaying the rate.