1. A method for processing register instructions in a data processor in which multiple instructions are processed concurrently, and therefore in which concurrent processing of certain register instructions causes a conflict between instructions, the method comprising the steps of: receiving a register instruction; identifying which of a plurality of register groups to which the register instruction is assigned, each register group including processor registers that are affected by execution of the register instruction; and controlling progress of the execution of the register instruction depending upon the identified register groups for the register instruction, in order to avoid conflicts with other concurrently processed instructions, through the further steps of: comparing the identified resister groups with register groups affected by the other concurrently processed instructions to determine one or more affected register groups; delaying the execution of the register instruction when a match exists between the identified register groups and the affected register groups; and executing the register instruction when no match exists between the identified register groups and the affected register groups.