1. A method of operating a memory device, comprising: reading memory cell data and coupling the memory cell data to a first input of a multiplex circuit; reading status data from a status register and coupling the status data to a second input of the multiplex circuit; selectively coupling either the first or second input to an input of a pipeline data buffer through the multiplex circuit, wherein the pipeline data buffer has a plurality of selectable propagation paths; selecting a propagation path for the pipeline data buffer; propagating the memory cell data or the status data through the pipeline data buffer; and outputting either the memory cell data or the status data on external data connections.