1. An emulation chip for verifying the functionalities of a user's electronic circuit design, comprising: hardware logic emulation resources that emulate at least a portion of the user's electronic circuit design, wherein the user's electronic circuit design is mapped to the hardware logic emulation resources that evaluate a plurality of Boolean equations, and wherein the hardware logic emulation resources generate a plurality of data bits and a plurality of control bits during emulation of the user's electronic circuit design to control the evaluation of an arithmetic operation; a decode circuit to generate an arithmetic evaluation instruction using the plurality of data bits and the plurality of control bits; and a first hardware arithmetic logic unit (ALU) block formed on the emulation chip, the first hardware ALU block including a hardware arithmetic logic unit that performs the arithmetic operation or a complex logical operation during emulation of the user's electronic circuit design in response to the arithmetic evaluation instruction and generates a return value provided to the hardware logic emulation resources.