1. A reconfigurable processor comprising: a plurality of processing elements, a connection state between the plurality of processing elements being reconfigurable, and the plurality of processing elements including one or more designated processing elements designated for processing an interrupt request; a controller configured to control the one or more designated processing elements to process the interrupt request; and a central register file configured to store processing results of the plurality of processing elements, wherein the processing elements not designated are processing elements for processing an instruction other than the interrupt request; and the controller reserves a portion of the central register file for processing the interrupt request.