1. A method of creating an equivalent circuit of a plurality of interconnects in a microelectronic device, comprising: identifying a first group of interconnects in the microelectronic device and a second group of interconnects in the microelectronic device, from the plurality of interconnects; modeling aggregate parasitic coupling of the first group of interconnects to the second group of interconnects as a first global circuit node having current and voltage parameters that reflect the aggregate parasitic coupling of the first group of interconnects to the second group of interconnects; and using the first global circuit node to create an equivalent circuit of the first group of interconnects.