1. A system for generating bit reliabilities, the system comprising: a detector that generates a detected sequence; and a post-processor that finds a first set of combinations of at least one error event in the detected sequence satisfying error correction constraints corresponding to a first bit value, finds a second set of combinations of at least one error event in the detected sequence satisfying error correction constraints corresponding to a second bit value, selects a first most likely error event from the first set and a second most likely error event from the second set, and generates a bit reliability based on the first and the second most likely error events.