1. A device comprising: a processor; and a hardware checksum module, wherein the checksum module calculates, for particular data, an updated checksum using unsigned twos-complement arithmetic, wherein the updated checksum is equivalent to a ones-complement checksum, wherein the unsigned twos-complement arithmetic operates as: 
 x 1= x−d; if (x1>0xffff), then x1=x1−1; where x is an original checksum, d is a ones-complement difference (m′−m) between first data associated with the updated checksum and second data (m) associated with the original checksum, and x1 is the updated checksum; wherein the processor appends the updated checksum to the particular data to make a data packet.