1. A method comprising: storing, in a memory, an intermediate representation of at least a portion of an executable source model including a plurality of interconnected blocks and configured to execute at a model rate, the intermediate representation including a plurality of components that correspond to the plurality of interconnected blocks of the at least a portion of the executable source model; searching, by a processor coupled to the memory, the intermediate representation to identify a set of components from the plurality of components of the intermediate representation that are functionally equivalent with each other; automatically generating, by the processor, an optimized intermediate representation of the at least a portion of the executable source model, the optimized intermediate representation including: a single shared component in place of the set of components identified as being functionally equivalent with each other, the single shared component configured to operate at a rate that is higher than the model rate, a serializer component coupled to the single shared component, the serializer component configured to convert a data path from a first vector width to a scalar or a second vector width, and a deserializer component coupled to the single shared component, the deserializer component configured to convert the data path from the scalar or the second vector width back to the first vector width; and generating from the optimized intermediate representation a hardware description language (HDL) description of the at least a portion of the executable source model.