1. A low-density parity-check (LDPC) decoding apparatus using a structuralized parity check matrix, comprising: a memory allocating means for multiplying reception data by an estimated channel value and storing a multiplied value in a memory including a plurality of memory block; an index storing means for storing a Read Only Memory (ROM) index, an address index and a permutation index for the stored data; a check node updating means for bringing the stored data in parallel based on the ROM index, the address index, and the permutation index and updating a check node; and a bit node updating means for updating a bit node based on the data stored in the memory and check node information updated in the check node updating means.