1. A method of testing and predicting failures of electronic and mechanical systems each comprising a plurality of units, said method comprising the steps of: (a) receiving data samples indicative of the operating status of each of said plurality of units of said system; (b) analyzing said data samples to determine any failures of any of said plurality of units and generating respective failure signals thereof; (c) directing said failure signals to a digital computer having a memory for storing a knowledge base comprising objects separately stored in memory and each object having a plurality of slots, said knowledge base having encapsulation, inheritance and polymorphism characteristics, said knowledge base further comprising a digraph model that determines predetermined target events and comprises nodes and AND gates that are connected by directed edges, each of said nodes corresponding to a particular failure of said plurality of units and each of said AND gates having a plurality of inputs, said nodes and AND gates being connected by the directed edges so that propagation therebetween and exit therefrom determines said target events, said propagation being determined by executable singletons and doubletons, each of said nodes, said AND gates and said doubletons being assigned as an individual object in memory; (d) classifying said failure signal as one of said singletons and doubletons and generating singleton and doubleton failure signals therefor; (e) identifying said singleton generated failure signal with its respective node, then delivering said node identification to its object and monitoring for the occurrence of its respective predetermined target event; and (f) identifying said doubleton generated failure signal with its respective node as well as its own identity and delivering said node identification to its object and said doubleton identification to its object, and monitoring for the occurrence of any predetermined target event.