1. A method for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts, the method comprising: obtaining an interrupt vector corresponding to a received interrupt; if the received interrupt is a regular interrupt, enabling interrupts in the processor so that a PNMI can be received While handling the regular interrupt, executing a regular interrupt handler using the interrupt sector as an input thereto, and disabling interrupts in the processor; and if the received interrupt is a PNMI, executing a PNMI interrupt handler using the interrupt vector as an input thereto.