1. A system for executing a program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process instructions of a second instruction set architecture, said system comprising: a representation unit for representing each portion of the program designed to run on a processor of the target computing system as one or more program threads to be executed on the host computing system, based upon classifying an instruction for its affects on local and shared resources; and at least one memory, said at least one memory designated, as based on said instruction classifying, into different portions to be used for a processing of said program threads, wherein said program threads can be executed selectively on different ones of said plurality of processors of said host computing system.