1. A variable precision floating point circuit comprising: a variable precision mantissa unit to selectively operate in any one of a plurality of precision modes wherein in each precision mode a level of parallelism in the variable precision floating point circuit is inversely proportional to a level of precision, multiple exponent units to selectively operate in one of a plurality of parallelism modes corresponding to a selected precision mode, and certainty calculation units to calculate certainty bounds of one or more outputs of the variable precision unit.