1. A method for enhancing lock acquisition in a multiprocessor system, the method comprising the steps of: sending a lock-load instruction from a first processor to a cache; in response to the lock-load instruction, setting a reservation flag for the first processor and sending lock data to the first processor; placing the lock data in target and shadow registers of the first processor; determining from the lock data whether lock is taken; upon a determination that the lock is taken, resending the lock-load instruction from the first processor to the cache; determining whether the reservation flag is still set for the first processor; upon a determination that the reservation flag is still set for the first processor, sending a status-quo signal to the first processor without resending the lock data to the first processor; and in response to the status-quo signal, copying the lock data from the shadow register to the target register.