1. An apparatus comprising: a first hardware processing element configured to execute a first transaction; a second hardware processing element configured to concurrently execute a second transaction; a first counter associated with the first processing element, the first counter configured to be updated in response to successful commitment of the first transaction; a second counter associated with the second processing element, the second counter configured to be updated in response to successful commitment of the second transaction; and reset logic to initiate a first reset signal to reset the second counter in response to a successful commitment of the first transaction when the first counter holds a predetermined value; priority logic configured to determine the first transaction is to receive priority to continue execution and the second transaction is to be aborted in response to a data conflict between the first and the second transaction based on a first counter value from the first counter and a second counter value from the second counter.