1. A device structure for a non-volatile random access memory formed on an insulating layer, the device structure comprising: a semiconductor body in contact with the insulating layer, the semiconductor body including a source, a drain, and a channel between the source and the drain; a control gate electrode in contact with the insulating layer; a floating gate electrode in contact with the insulating layer, the floating gate electrode disposed between the control gate electrode and the channel of the semiconductor body; a first dielectric layer between the channel of the semiconductor body and the floating gate electrode, the first dielectric layer composed of a first dielectric material that electrically isolates the floating gate electrode from the channel; and a second dielectric layer between the floating gate electrode and the control gate electrode, the second dielectric layer composed of a second dielectric material that electrically isolates the floating gate electrode from the control gate electrode.