1. A circuit comprising: a charge pump circuit configured to present a first output and a second output in response to a first phase comparator output signal and a second phase comparator output signal; a phase comparator circuit configured to provide said first and second phase comparator output signals in response to (i) a first input phase signal, (ii) a second input phase signal, and (iii) a reset signal; and a logic circuit configured to present said reset signal in response to said first and second outputs, and said first and second phase comparator output signals.