1. A computer-implemented design method of a logic circuit comprising: converting an algorithm of the logic circuit from an operation description having operators into a data flow graph having operation nodes executing the operators arranged in order of the executing; allocating execution steps in the data flow graph, and inserting registers storing output data from the operation nodes after execution of the execution steps; producing a data path of the logic circuit having operation units which served as the operation nodes and storage elements which served as the registers, and control information on the data path; and producing an operator/operation unit database configured to retrieve the operation units executing the operators from the operators and configured to retrieve the operators outputting data stored in the registers which served as the storage elements from the execution steps and the storage elements.