1. A method of operating a test device for a logic-based processing device comprising: accessing an original test program; generating a plurality of quick error detection (QED) test programs, each of the QED test programs including the original test program with additional instructions inserted at strategic locations within the original test program, wherein the additional instructions and the strategic locations vary between each of the QED test programs and the strategic locations of the additional instructions occur periodically in each one of the plurality of QED test programs, such that the number of instructions from the original test program between the strategic locations is the same for a given QED test program; and storing the plurality of QED tests programs on a non-transitory memory for later execution by the logic-based processing device.