1. In a microprogrammable computer of the type having data registers, an arithmetic logic unit, control lines for controlling the transfer of data between said data registers and said arithmetic logic unit, and a control memory comprising first circuit for storing microprograms and second circuit for executing said microprograms and for coupling the control information generated by said microprogram execution to said control lines, an improved indirect arithmetic control circuit comprising: addressable memory means for storing indirect arithmetic control information, addressing means for coupling the data from one of said data registers to said addressable memory means address inputs, and gating means responsive to a microprogram indirect arithmetic control instruction currently being executed by said control memory second circuit for coupling said indirect arithmetic control information to said control lines.