1. A method for determining the cause of a correctable memory error, comprising: detecting a correctable error during an access to a memory location in a main memory by a first processor, wherein the correctable error is detected by error detection and correction circuitry; reading tag bits for a cache line associated with the memory location, wherein the tag bits contain address information for the cache line, as well as state information indicating a coherency protocol state for the cache line; testing the memory location by causing the first processor to perform read and write operations to the memory location to produce test results; and using the test results and the tag bits to determine the cause of the correctable error, if possible.