1. A hardware-based method for preventing side channel attacks, comprising: receiving, in a cryptographic processor, a request for a cryptographic function; decomposing, in the cryptographic processor, the requested cryptographic function into a sequence of hardware operations, wherein the sequence of hardware operations includes an optional mathematical operation and a required mathematical operation; replacing each optional mathematical operation in the sequence of hardware operations with a dummy operation; performing, in a cryptographic hardware module, the dummy operation for each optional mathematical operation and the required mathematical operation for each required mathematical operation in the sequence of hardware operations; and generating an output for the cryptographic function, wherein the output is based on the required mathematical operation in the sequence of hardware operations.