1. An apparatus for operation in a computer platform, the apparatus comprising: a programmable accelerator (PA) including: a microcontroller (mC) to receive first programming information sent from a central processing unit (CPU) of the computer platform to the PA, the mC to provide a first programming of the PA based on the first programming information, wherein, after the first programming, the PA to receive from the CPU a task for processing a set of data; and a first data stream processing engine (DSPE) coupled to the mC, wherein the first programming loads a representation of a first data processing algorithm into the first DSPE, the representation including first instruction information for execution of a first instruction to perform multiple atomic operations, wherein the mC further to signal the first DSPE to process first data of the set of data according to the first data processing algorithm.