1. A method of reducing data path width restrictions on instruction sets for processors, the method comprising: providing a memory for storing wide operands, the wide operands having bit widths greater than the data path width; using a register file to store an address for the stored wide operand; when executing an instruction that specifies a wide operand, executing a series of operations to load the wide operand stored in the memory into a cache memory; executing the instruction using the wide operand from the cache memory; and storing results of the step of executing in a results register.