1. A method of operating a system of erasable and re-programmable non-volatile memory cells organized into a plurality of physical blocks of a minimum number of memory cells that are simultaneously erasable and wherein incoming blocks of data assigned logical block addresses are programmed into those of the plurality of physical blocks maintained as an erased block pool, comprising: identifying at least one of the plurality of physical blocks at a time other than those in the erased block pool for a wear leveling exchange by cycling through addresses of blocks in a characterized order, and exchanging the identified at least one of the plurality of physical blocks with a corresponding number of one or more physical blocks within the erased block pool.