1. A distributive function information processing system made up of interconnected processing elements for use in combination with one or more input or output devices such as display devices, keyboards, printers, cathode ray tubes and data links, comprising: a. a plurality of processing elements including: (1) one or more data processors for receiving, transforming and transmitting data in response to control signals, and (2) two or more control processors for generating and transmitting control signals for operating said system; b. a plurality of control arcs interconnecting said processing elements into a system, each said control arc consisting of: (1) control arc logic circuitry for generating and transmitting said control signals constituting a control arc transmitter, (2) control arc logic circuitry for receiving and interpreting said control signals constituting a control arc receiver, and (3) electrical connectors constituting control arc communication lines interconnecting said control arc transmitter and said control arc receiver into a control arc for conveying said control signals from transmitter to the receiver and for conveying responses to said control signals from receiver to transmitter whereby each control arc can pass said control signals in the direction from transmitter to receiver, said control arc logic circuits being located in and forming a part of said processing elements with the two logic circuits of each control arc being located in a different processing element with control arc transmitters being located only in said control processors, with control arc receivers being located in either control processors or data processors and with at least one control processor containing a control arc receiver whereby each control arc interconnects two processing elements for interconnecting said processing elements into said system, wherein the number of control arcs is equal to or greater than the total number of control and data processors, wherein said control arcs interconnecting two or more of the processing elements in a system describe a loop and wherein one said control processor includes, in addition to the control arc logic circuitry constituting a portion of one or more said control arcs, state defined control circuitry permitting said one control processor to assume, in turn, two or more different states to have state defined control whereby the control function performed by said one control processor depends in part on its state; c. input and output data lines for connecting one or more processing elements with one or more said input or output devices wherein the network created by processing elements when interconnected by said control arcs defines a mathematical graph in the sense of graph mathematics over the processing elements and wherein said processing elements constitute the nodes of the graph; and d. data path means for movement of data among said processing elements, said electrical connectors constituting control arc communication lines also constituting means for movement of data in the same direction as said control signals are moved thereby constituting a portion of said data path means; whereby said system may accept data from said input device, operate and transform data using a control scheme based on graph theory mathematics and produce data usable by said output device.