1. A computer-implemented process comprising: receiving into memory, from a hardware library store, information describing hardware libraries, the hardware libraries storing code used in a computer system to program a field programmable gate array (FPGA) to perform operations requested by one or more applications; receiving into memory, from an update server, information describing updates to the hardware libraries used to program the FPGA; updating the hardware libraries within the hardware library store according to the information received from the update server describing the updates; determining, at least in part from information regarding functionality of the one or more applications, that the FPGA is to be programmed with at least one of the updated hardware libraries; and programming the FPGA with the at least one of the updated hardware libraries.