1. A method in a data processing system for sharing data in a cache among multiple threads in a simultaneous multi-threaded (SMT) processor, said SMT processor executing said multiple threads concurrently during each clock cycle, said method comprising: dynamically allocating said cache for use among said multiple threads; portions of said cache capable of being designated to store private data that is used exclusively by only a first one of said multiple threads; said portions of said cache capable of being designated to store shared data that is used by any one of said multiple threads; and changing a size of said portions dynamically during execution of said multiple threads.