1. A method for verifying timing of a circuit including a crosstalk victim and aggressor, comprising: identifying a failing path including the victim; using a first function analysis to determine whether an input of the aggressor and an input of the victim are correlated; calculating a switching value of the aggressor input correlated to the victim input; and using an iterative process until an input switching time for the aggressor does not change and finding a corresponding final delay of the victim.