1. A method for reducing transaction conflicts in a computing environment with transactional memory, the computing environment including a cache configured to hold a plurality of cache lines, each cache line configurable with a coherency mode, each cache line associated with a high-conflict indicator, the method comprising: examining a first high-conflict indicator associated with a first cache line; based on the examining, placing the first cache line in a sub-line coherency mode, wherein cache control logic associated with the cache is configured to operate or manage a plurality of sub-cache line portions of the first cache line in the sub-line coherency mode; executing a transaction in the computing environment, the transaction accessing a memory address within the first cache line; and accessing and managing, while executing the transaction, only a relevant sub-cache line portion of the first cache line in the sub-line coherency mode, the relevant sub-cache line portion associated with the memory address, wherein the first cache line is a first-cache copy of the first cache line in a first cache, and wherein the first high-conflict indicator is associated with the first-cache copy, the method further comprising: determining, before executing the transaction, that a second-cache copy of the first cache line in a second cache is a high-conflict cache line; setting a second high-conflict indicator associated with the second-cache copy; and based on the setting the second high-conflict indicator, setting the first high-conflict indicator associated with the first-cache copy.