1. A method of operating a digital computer for reporting an error occurring during execution of a second computer program that is a translation of a first computer program, said first computer program including instructions from a first instruction set based upon a first instruction architecture, each of said instructions in said first computer program having a respective address, said second computer program including instructions from a second instruction set based upon a second instruction architecture, each of said instructions in said second computer program having a respective address, some of said instructions in said first computer program each having been translated into a respective plurality of said instructions in said second computer program, said error being caused by execution of one of said instructions in said second computer program, said method comprising the steps of: (a) aborting the execution of said second computer program when said error occurs; and then (b) determining a first address of said one of said instructions in said second computer program; (c) determining from said first address a second address of one of said instructions in said first computer program from which said one of said instructions in said second computer program was translated; (d) reporting that said error occurred, and using said second address to indicate that said error is associated with said one of said instructions in said first program; (e) wherein an address correlation table was generated during translation of said first computer program to obtain said second computer program, said address correlation table including entries each having an address of a respective instruction in said first computer program and an address of a first instruction in a set of instructions in said second computer program, not all of the addresses of the instructions in said first computer program being included in entries in said address correlation table, said set of instructions in said second computer program having been translated from said respective instruction in said first computer program, and wherein said step (c) of determining from said first address a second address includes referencing said address correlation table with said first address; and (f) wherein a boundary instruction bit map was generated during translation of said first computer program to obtain said second computer program, said boundary instruction bit map indicating instructions in said second computer program which begin sets of instructions translated from respective instructions in said first computer program, and wherein said step (c) of determining from said first address a second address further includes scanning said boundary instruction bit map between a first position in said bit map corresponding to said first address and a second position in said bit map corresponding to an address in said second computer program that is in an entry in said address correlation table, and when scanning said boundary instruction bit map counting indications in said bit map between said first position and said second position to obtain a count of instructions, reading from said entry in said address correlation table a third address in said first computer program, and determining said second address from said third address and said count of instructions.