1. A 3D graphics accelerator comprising: a fragment shading unit running multiple threads; a first on-chip cache, internal to said fragment shading unit, which stores cached instructions to be executed by said fragment shading unit; wherein the fragment shading unit first checks for data in said first cache, and if a miss occurs, then said fragment shading unit reads data from an external memory; and a second on-chip cache, internal to said fragment shading unit, which stores global data which can affect multiple fragments being shaded by said fragment shading unit; wherein neither fragment data nor texture data is routed through said first cache nor through said second cache; whereby said fragment shading unit can switch operations between threads in a lightweight manner.