1. A thread arbitration system for use in a processor, the system comprising: an array comprising a plurality of first entries, wherein each of the first entries may be allocated for use by a thread of a plurality of threads; a thread arbitration table comprising a plurality of second entries, wherein each entry of the second entries is configured to indicate a high threshold value corresponding to a thread of the plurality of threads; and control circuitry, wherein in response to determining a number of said plurality of first entries allocated by a given thread is greater than a corresponding high threshold value indicated by a selected second entry of the thread arbitration table, the control circuitry is configured to indicate the given thread is prevented from allocating further entries of the first entries.