1. A data processing systems having a branch instruction prefetching performance, said system comprising: main memory means (5) for storing information; buffer memory means (30, 40; 130, 140) coupled to said main memory means having a plurality of blocks for holding a copy of a portion of the information stored in said memory means (5) in said plurality of blocks; arithmetic operation control means (1) for executing instructions including a branch instruction; branch direction control memory means (2) coupled to said main memory means including at least one block corresponding to at least one of said blocks of said buffer memory means for storing a branch direction information obtained by execution of said branch instruction in a block in said branch direction control memory means corresponding to the block containing said branch instruction of said buffer memory means; and preceding control means (10) coupled to said branch direction control memory means and said buffer memory means including means for reading out from said branch direction control memory means said branch direction information and for reading out from said buffer memory means an instruction to be prefetched wherein a common directory means (30) is used for said branch direction control memory means and for said buffer memory means, means for predicting whether a branching will be successful or not based on the branch direction information stored in said branch direction control memory means when said instruction to be prefetched is a branch instruction, and means responsive to a result of said prediction for prefetching an instruction in a direction having a highest probability of being executed after said branch instruction has been executed.