1. A method for scheduling an instruction for dispatch to an execution unit, said method comprising: storing a first instruction in a first location within a waiting buffer; storing a second instruction, dependent on the first instruction, in a second location within the waiting buffer; generating a dependency vector for the second instruction, wherein the dependency vector has a bit set that indicates the second instruction is dependent on the first instruction; dispatching the first instruction for execution; clearing the set bit in the dependency vector in response to the first instruction being dispatched and prior to determination of source operands of the second instruction; and dispatching the second instruction after the set bit in the dependency vector is cleared.