1. A method of executing a shift instruction in a data processor, comprising the steps of: receiving the shift instruction having a source operand; decoding the shift instruction to provide a plurality of control signals; accessing a first extension bit from a first storage location and a second extension bit from a second storage location; shifting a shift value into a first bit of the source operand to generate a shifted data value, the shift value being determined in response to both the first extension bit and the second extension bit; and selectively modifying the first extension bit to provide a modified first extension bit in response to execution of the shift instruction.