1. A computer-implemented method comprising: selecting a shape included in a layout file corresponding to an integrated circuit; selecting a first contact and a second contact located on the shape; computing, by a processor, an adjoint system vector based upon a perturbed boundary of the shape; computing, by the processor, a resistance sensitivity between the first contact and the second contact using the adjoint system vector; computing, by the processor, a nominal resistance between the first contact and the second contact based upon a nominal boundary of the shape; and simulating the integrated circuit using the computed resistance sensitivity and the computed nominal resistance.