1. A method of global routing of integrated circuits based on localized routing optimization, the method comprising: defining, using a processor, one or more regions, one or more netgroups, and combinations thereof of an integrated circuit; associating, using the processor, at least one optimization objective with each region and/or each netgroup defined; generating, using the processor, one or more constraints for each region and/or each netgroup, based on the associated optimization objectives; and performing, using the processor, global routing of the integrated circuit according to the one or more constraints generated.