1. An apparatus comprising: at least one processor; a memory coupled to the at least one processor; a computer program residing in the memory, the computer program including a plurality of instructions; and an optimizing compiler residing in the memory and executed by the at least one processor, the optimizing compiler including a strength reduction mechanism that analyzes the computer program in a single pass by: constructing a control flow graph of the instructions in the computer program; building a dominator tree corresponding to the control flow graph that indicates which blocks in the control flow graph dominate other blocks in the control flow graph; determining an order of analyzing the instructions in the control flow graph in the single pass based on the dominator tree; constructing a candidate table of instructions in the computer program in an order determined by the dominator tree; generating at least one increment table by processing the candidate table; computing cost of each increment in the increment table; determining whether a selected increment in the increment table is profitable based on the computed cost; for each selected increment in the increment table, when the cost for the selected increment indicates the selected increment is profitable: inserting an initializer instruction for a temporary variable; and substituting at least one alternative instruction that references the temporary variable for at least one of the plurality of instructions in the computer program; wherein the strength reduction mechanism determines whether an operation in the computer program that has an unknown stride at compile-time could be improved by substituting at least one alternative instruction for the at least one of the plurality of instructions in the operation, and when the operation in the computer program that has an unknown stride at compile-time could be improved, substituting the at least one alternative instruction for the at least one of the plurality of instructions, wherein the strength reduction mechanism determines whether an operation in the computer program that has an unknown stride at compile-time could be improved by computing a number of operations to execute the at least one alternative instruction, computing a number of operations to execute the at least one of the plurality of instructions, and when the a number of operations to execute the at least one alternative instruction is less than the a number of operations to execute the at least one of the plurality of instructions, determining the operation in the computer program could be improved.