1. A subroutine linkage feature for a data processing system enabling the preservation of register contents of a requesting program and allocation of a dynamic work area for data generated during the subroutine operation, comprising: main storage means having sequentially addressable storage locations for storing information representing control signals and data signals; level storage means, said level storage means comprising a plurality of groups of prioritized level registers for storing and providing signals representative of significant information relative to program execution such as instruction addresses, level status indications and other information pertaining to the programs to be executed; level control means interconnected with said level storage means and responsive to sequencing control signals during operation of said system to operate said level storage means to select said level register groups for transfer of information to and from said level registers in accordance with a predetermined priority arrangement; an instruction source, said source providing signals representative of operations to be performed in said system as well as information to be utilized; sequencing means responsive to signals from said instruction source including signals representative of a subroutine operation for providing control signals in timed sequence and including means for generating subroutine call signals from calling programs during operation of individual programs determined by said level control means in said system together with related Register to Storage instruction signals, said Register to Storage instruction signals including signals representative of (1) a Register to Storage Operation, (2) the starting address of a block of selected storage locations in said main memory, (3) at least one register in said level level storage means, said at least one register including an instruction address indicative of the calling program, and (4) a number of storage location in said main memory comprising a dynamic work area to be accessed during a subroutine operation; microcode storage means having individual microcode storage locations for storing microcode signal sequences including a first signal sequence for activating said system according to a predetermined Register to Storage sequence to (1) transfer the contents of the selected at least one register from the level register group in current use to the selected block of said main storage and to (2) reserve the dynamic work area in the selected block specified by said Register to Storage instruction signals; microcode address means responsive to a single Register to Storage instruction signal set from said sequencing means to access in sequential order the microcode Register to Storage signal sequence in said microcode storage means; and decode means interconnected with said main storage means, said level control means, and said sequencing means and responsive to a microcode Register to Storage signal sequence as it is accessed to generate control signals to activate said main storage means, and said level control means in accordance with said predetermined Register to Storage signal sequence.