1. A system for global routing of integrated circuits, the system comprising: a memory storing computer readable instructions; and a processor for executing the computer readable instructions to cause the system to perform: responsive to initiating global routing on an integrated circuit: grouping, using a processor, a plurality of nets into a plurality of buckets, the grouping based on timing criticalities associated with the nets; assigning different target congestion ratios (TCRs) to each of the plurality of buckets, the TCRs selected based on the timing criticalities associated with the nets in the buckets; and executing, using the processor, for each of the plurality of nets: determining a TCR for the net based on the TCR assigned to the bucket containing the net; performing global routing of the net according to the TCR and to one or more constraints associated with the net; and in response to the performing global routing of the net resulting in violating at least one of the one or more constraints associated with the net and to a stopping criteria not being met: incrementing the TCR for the net by a specified amount; and repeating the performing global routing and incrementing until at least one of the performing global routing of the net results in all of the one or more constraints being met and a stopping criteria is met, wherein wires are placed on the integrated circuit based at least in part on the grouping, assigning, and executing.