1. A computing system comprising: a store buffer; a data cache; and control logic configured to: determine an instruction is a load instruction; mark the load instruction as a candidate for store-to-load (STL) data forwarding, in response to predicting the load instruction has a memory dependence on an older outstanding store instruction, wherein said predicting is based on determining a source operand of the load instruction corresponds to a stack memory region; in response to detecting the load instruction is marked as a candidate for STL data forwarding, process the load instruction as if the load instruction is dependent on an older store instruction; in response to detecting the load instruction is not marked as a candidate for STL data forwarding, process the load instruction as if the load instruction is not dependent on an older store instruction; to process the load instruction as if the load instruction is dependent on an older store instruction, prevent access of the data cache to obtain result data for the load instruction and access the store buffer to obtain the result data; and to process the load instruction as if the load instruction is not dependent on an older store instruction, prevent access of the store buffer to obtain the result data and access the data cache for the result data.