1. A bit field peripheral device responsive to bit field addresses, the device for being coupled to a microprocessor to provide bit field processing capability to the microprocessor, the microprocessor having a memory unit coupled thereto, the memory unit including dedicated memory locations dedicated to the device, the device comprising: bit field control logic for providing a bit field operation result to the microprocessor, the bit field operation result provided in response to a bit field address from the microprocessor, the bit field address accessing a memory location in the dedicated memory locations; and a bit field memory coupled to the bit field control logic, the bit field memory including a plurality of bit locations, the bit field control logic accessing at least one predetermined bit location of the bit field memory in response to the bit field address, the at least one predetermined bit location determined by the bit field address.