1. In a stack oriented computer system including a source of a plurality of instructions having a plurality of address couples which are used to address operands, an address coupled associative memory (ACAM) which associates the address couples with registers that are identified by respective register numbers and in which data values are stored, including: a) memory means for storing said plurality of instructions in a stack configuration; b) storage means for concurrently storing ones of said plurality of address couples; c) grouping means for forming a group from said plurality of instructions from said memory means, said group comprising at least three of said plurality of instructions; d) determination means for determining, based on a set of predetermined rules, if the instructions in the group are to be issued for execution in parallel as a single job or if the group is to be divided into two subgroups comprised of one of said instructions, and two of said instructions, respectively, and issued for execution as two separate jobs wherein said two of said instructions are to be issued for execution in parallel; e) dividing means for dividing the group of said plurality of instructions into two subgroups responsive to the determination made by the determination means; f) comparing means for receiving one of a) said group and b) said two subgroups and for determining if each of the plurality of address couples is stored in the ACAM; g) retrieval means, coupled to the ACAM, for providing register numbers which correspond to ones of the address couples stored in the ACAM, respectively; h) address couple associating means for storing a further address couple in said ACAM and for associating said further address couple with one of said registers if said comparing means has determined that said further address couple has not already been stored in the ACAM; and i) execution means for executing said at least three of said plurality of instructions as one of a) said single job and b) said two separate jobs based on said determination made by said determining means following addressing of said operands using said register numbers.