1. A digital processing unit for executing program instructions, each of said program instructions including an operator and an argument or operand, stored in at least two memories and comprising at least one first register of temporary storage of the operator of a current instruction of said program instructions to be executed and at least one second register of temporary storage of the argument or operand of said current instruction, comprising a protection circuit for submitting, upstream of said first register, said operator to a deciphering function if this operator originates from one of the memories or from an area of these memories, identified from the address provided by a program counter, said argument or operand being not submitted to said deciphering function.