1. A programmable CMOS-based nonlinear function synthesizer, comprising: a CMOS circuit having a plurality of bias inputs, a plurality of current outputs and a corresponding plurality of signal inputs, an n-th one of the current outputs in relation to its corresponding signal input defining a saturated nonlinear transfer function characterized by the relation, 
 tan h (α n x ), where α n is a positive integer/non-integer constant, and x represents a normalized voltage as the signal input; weighing circuitry comprised of current mirrors operable with each output of the plurality of current outputs to form a weighted output for each said output; summation circuitry connected to the weighted outputs, and providing an algebraic sum of the weighted outputs, the algebraic sum being characterized by the relation, y ⁡ ( x ) = ∑ n = 1 N ⁢ γ n ⁢ tanh ⁡ ( α n ⁢ x ) , where current y(x) represents the required nonlinear function, and γ n is a positive/negative integer/non-integer weighting factor for each value of n, where n is an integer between 1 and N, where N represents a total number of the current outputs; and programmable bias currents I B n connected to the bias inputs, where α n is a positive integer/non-integer constant that can be programmed by the bias inputs.