1. A memory control unit comprising: a descriptor fetch block configured to fetch a descriptor, which describes a work for controlling a nonvolatile memory device, from a volatile memory; an instruction fetch block configured to fetch an instruction set from an instruction memory through an address information, wherein the instruction fetch block obtains the address information from the instruction memory through an index information included in the fetched descriptor; a memory instruction generation block configured to generate a memory instruction by combining a descriptor parameter value included in the fetched descriptor with the fetched instruction set; and a direct memory access (DMA) block configured to directly access the volatile memory, wherein the descriptor fetch block includes: a descriptor queue configured to store an identification (ID) of the descriptor; and a descriptor fetch logic configured to fetch the ID of the descriptor from the descriptor queue, obtain a descriptor address of the volatile memory from the fetched ID of the descriptor, and request the DMA block to read out the descriptor corresponding to the obtained descriptor address from the volatile memory.