1. A memory error correction system, comprising: error correction cells of a phase change memory, the error correction cells associated with memory cells to store error correction entries, an error correction entry includes address information of a failed memory cell and a replacement cell that stores an in-place bit value associated with the failed memory cell; and a counter component that counts a number of error correction entries used to store error correction pointers, wherein if fewer than all the error correction entries are storing error correction pointers memory cells of a last correction entry to be used store a counter that indicates a number of error correction entries used to store error correction pointers.