1. In a computer system including a main memory means and a processor utilizing pointers having an Actual Segment Descriptor (ASD) Number logical address for accessing a next-required ASD Number logical address from said main memory means, a pointer logical address updating system for developing an updated pointer holding the ASD Number logical address, of newly targeted data, said system comprising: (a) said processor holding an original pointer and receiving instructions for accessing specified new data from any portion of memory, said specified new data to be subsequently identified by the updated pointer using an ASD Number logical address to locate a paged or unpaged segment and a displacement value to locate a word or character therein; (b) said main memory means for storing words of data in multiple word segments where each paged segment is organized in numbered pages with each page having a fixed number of words and multiple word segments of more or less words than a paged segment, said memory means including: (b1) an Actual Segment Descriptor (ASD) Table for linking the ASD Number logical address of the base location of the first data word in a particular segment with a physical address in said main memory means; (b2) a Page Table providing the ASD Number logical address for each page number in each paged segment; (c) means for accessing selected segments, pages, and words or characters from said main memory means via said pointers using said ASD Number logical address; (d) means for modifying the (ASD Number) logical address in said original pointer to enable subsequent access to said next required ASD Number logical address; said means for modifying including: (d1) means for accessing in one clock cycle, the ASD Number logical address and displacement value of said newly targeted data for insertion into said original pointer in place of the original ASD number and displacement value.