1. An arithmetic operating apparatus comprising: a register storing operands that are to be used for an arithmetic operation; one or more arithmetic operators performing, in response to a first instruction that specifies operands that are to be read from said register and one or more of the arithmetic operations to be carried out by said arithmetic operators and that has a number of bits, the specified arithmetic operations specified by the first instruction using the operands specified by the first instruction; and a setting unit setting, in one or more unused bits of the first instruction which bits are not used in an ordinary process, an extended instruction information that instructs at least one of said register and said arithmetic operators to execute, according to the first instruction, an extended process different from the ordinary process.