1. An apparatus, comprising: an array of memory cells; sensing circuitry coupled to the array; and a control component coupled to the sensing circuitry and including a sequencer having a register configured to store a first plurality of digits representing a numerical value; wherein the control component is configured to operate the sensing circuitry to store the first plurality of digits representing the numerical value in multiple columns of the array by: causing storing of a mask from a row of the array into the sensing circuitry, wherein the mask comprises a second plurality of digits corresponding to respective columns of the array and indicating whether or not the first plurality of digits are to be stored in a particular column; and for each digit of the first plurality of digits, causing storing of the digit, in parallel, to respective particular columns of the array as indicated by the mask by: responsive to the digit having a particular data value, performing, in parallel, a logical operation between the digits of the mask and respective digits stored in the respective particular columns of the array as indicated by the mask; and responsive the digit having a different particular data value, foregoing performance of the logical operation between the digits of the mask and respective digits stored in the respective particular columns of the array as indicated by the mask.