1. Non-transitory, tangible, computer readable media containing a computer-executable program configured to implement when run in a computer system a method of modeling performance of asynchronous circuits comprising: decomposing timing cycles of an asynchronous circuit into paths by creating cut points, assigning to each path a path budget; adding virtual clocks to break cycles and identify the start and end of the paths to be verified; verifying the timing performance of the asynchronous circuit, including using a static timing analysis tool to directly verify the timing budgets for the paths; and providing to a user a verification determination of the timing performance of the asynchronous circuit.