1. A memory module comprising: a first memory bank of substantially identical memory chips; a second memory bank of substantially identical memory chips; and a plurality of system bus connectors, wherein said first and second memory banks each comprise a plurality of pin assignments, one of said pin assignments from each said first and second memory banks is coupled to an associated one of said plurality of system bus connectors, at least one of said plurality of system bus connectors is coupled to non-identical pin assignments of said first and second memory banks, and said non-identical pin assignments have internal assignments for like functions in a bilaterally symmetrical arrangement.