1. A method for predicting an address following a branch instruction in a computer instruction stream, comprising: receiving a current address specifying an address of a current instruction; performing a first branch prediction operation to produce a first predicted address of a successive instruction following the current instruction in the computer instruction stream; initiating an instruction fetch operation using the first predicted address; performing a second branch prediction operation, which is slower and more accurate than the first branch prediction operation, using the current address to produce a second predicted address of the successive instruction following the current instruction in the computer instruction stream; comparing the first predicted address with the second predicted address; if the first predicted address is equal to the second predicted address, allowing the instruction fetch operation to proceed using the first predicted address; and if the first predicted address is not equal to the second predicted address, delaying the instruction fetch operation so that the instruction fetch operation can proceed using the second predicted address.