1. An apparatus, comprising: a plurality of memory cells; and circuitry configured to: read first data from a subset of the plurality of memory cells, wherein each memory cell of the subset of the plurality of memory cells is coupled to a first word line, and wherein at least one memory cell included in the subset of the plurality of memory cells stores information indicative of a programming status of at least a second word line; extract the programming status from the first data; estimate interference dependent upon the programming status; update a readout configuration dependent upon the estimated interference; and read second data from the subset of the plurality of memory cells dependent upon the updated readout configuration.