1. A computer-implemented method comprising: receiving a first sequence of virtual instructions of a virtual instruction set of a virtual instruction set architecture, wherein the first sequence of virtual instructions includes one or more load instructions having two-dimensional relative addressing, wherein each load instruction comprises a two-dimensional relative address comprising an x-offset and a y-offset, wherein the two-dimensional relative address represents a location in a region of image data relative to a location in the region of image data associated with a virtual processor; receiving, by a compiler, a request to translate the first sequence of virtual instructions of the virtual instruction set into a second sequence of object code instructions of an object code instruction set, wherein object code instructions of the object code instruction set are executable by each processing element of a processor comprising a two-dimensional array of processing elements and a two-dimensional shift-register array, wherein each processing element has a dedicated shift register of the two-dimensional shift-register array, and wherein each processing element is configured to shift data in a respective shift register dedicated to the processing element to another shift register dedicated to another processing element; and generating, by the compiler, the second sequence of object code instructions by translating one or more of the load instructions in the virtual instruction set into one or more shift instructions of the object code instruction set, including translating a respective two-dimensional relative address of each load instruction into one or more corresponding shift offsets and generating the one or more shift instructions of the object code instruction set using the one or more respective shift offsets.