1. A memory controller comprising: a global time controller configured to control a global time based on whether a stall is generated; a receiver configured to receive at least one memory access request, and to set a time tag of the memory access request using the global time; a memory access unit configured to access a memory based on the memory access request to store or load data to or from the memory; and an output unit configured to return the data at a time that is based on a comparison between the time tag and the global time.