1. A memory device comprising: a magnetic tunnel junction (MTJ) stack including a free layer, a barrier layer, and a pinned layer; a bottom electrode (BE) layer coupled to the MTJ stack, encapsulated in a planarized layer, and having a substantially common axis with the MTJ stack; and a contact layer embedded in the BE layer, the contact layer forming an interface between the BE layer and the MTJ stack, wherein the contact layer is a first anti-ferromagnetic (AFM) layer; and wherein the MTJ stack further includes a second AFM layer coupling the MTJ stack to the first AFM layer.