1. A multiplexing memory controller comprising: a number of channels that each stores a specification of memory-access-request servicing characteristics for the channel; a memory-request input through which the multiplexing memory controller receives memory-access requests from two or more processing entities, each memory-access request accompanied with a channel indication; and memory-controller logic that processes the received memory-access requests in order to provide memory-access-request servicing to each channel in accordance with the channel's memory-access-request servicing characteristics.