1. A processing unit comprising: a plurality of element processors capable of communicating with an external memory via the same memory port, each element processor having a logic unit, an arithmetic unit, and a register file; and a control processor for sending instructions and addresses to the plurality of element processors to operate the plurality of element processors; wherein at least two of the plurality of element processors pre-receive different parameter data to be used for the operation; store the parameter data in the corresponding register files; receive the same instruction that has been broadcast, for the operation, by the control processor; read the same data from the external memory via the memory port; and perform at least one of logic computation and arithmetic computation in accordance with the same instruction, with respect to the same data and the different parameter data.