1. A reversible resistive memory, comprising: a plurality of reversible resistive cells, at least one of the reversible resistive cells comprising: a reversible resistive film coupled to a first supply voltage line; and a diode including at least a first active region and a second active region, where the first active region having a first type of dopant and the second region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, both the first and second active regions residing in a common well, the first active region coupled to the reversible resistive film, and the second active region coupled to a second supply voltage line; wherein the active regions are fabricated from sources or drains of CMOS devices, and the common well is fabricated from a CMOS well, and wherein the reversible resistive film is configured to be programmable by applying voltages to the first and the second supply voltage lines to change the resistance into a different logic state in a reversible manner.