1. In an improved data processing system including a main memory for storing at least said data, peripheral device means for providing inputs to and outputs from said system, a CPU connected from said main memory for processing certain of said data, said CPU including clock means for providing timing signals for operation of said system and a system controller for controlling operation of said system, said system controller including a microprogram control store for storing a microprogram and having a plurality of pages of predetermined word length, said system further including I/O bus means connected from said CPU to said peripheral device means for transferring said data therebetween, and at least one parallel processor connected between said CPU and said main memory for parallel processing other certain of said data, the improvement comprising: said at least one parallel processor having associated therewith a separate CPU/parallel processor interface structure, said structure including extended microprogram control store means consisting of extension of said predetermined word length of at least one of said pages and having stored therein an extension of said microprogram for controlling operation of said at least one parallel processor; means responsive to the operation of said system controller controlling said system from the portion of said microprogram contained within said predetermined word length of said at least one of said pages and synchronized with said clock means for enabling the operation of said extended microprogram control store means; whereby the speed of operation of said system is increased since said at least one parallel processor operates upon said other certain of said data under control of said extended microprogram simultaneously and synchronously with operation of said CPU.