1. A microcomputer device comprising: an arithmetic/logic unit having first and second data inputs and data output; a data memory having an address input and having data input/output means; data bus means coupled to the first data input of the arithmetic/logic unit and coupled to the data input/output means of the data memory; program memory means having an address input and having an instruction output, the program memory storing instruction words; program address means connected to the address input of the program memory means; control means for generating control signals in response to instruction words, the control signals defining operation of the arithmetic/logic unit and transfer to and from the data bus means; program bus means coupled to receive instruction words from said instruction output for transfer to said control means, said program bus means coupled to said program address means; shifter means coupling said data output of the arithmetic/logic unit to said data bus means and operative to shift the data a selected number of bits in transferring data from said data output to the data bus means, said shift being in response to said control signals generated from an instruction word via said control means; and wherein the data output of the arithmetic/logic unit is coupled only to an accumulator and an output of accumulator is coupled to the data bus means via said shifter and to said second input of the arithmetic/logic unit directly without passing through the shifter.