1. A method for synthesizing a high-level language (HLL) program, comprising: on a programmed processor, performing operations including: in response to user input indicating one or more variables to observe in a function of the HLL program: adding a first code segment to the function in the HLL program; and for each of the one or more variables to observe, adding a respective second code segment to the HLL program; and generating a synthesized design from the HLL program, including: in response to encountering the first code segment during synthesis, instantiating a memory in the synthesized design; in response to encountering the second code segment during synthesis, instantiating a respective interface circuit in the synthesized design; wherein each interface circuit is configured to replicate in the memory a state of a corresponding variable during operation of a circuit implemented from the synthesized design; and generating a table that maps names of the one or more variables to respective memory addresses in the memory where respective states of the one or more variables are to be replicated by the interface circuit.