1. An integrated circuit comprising: processing nodes that are heterogeneous between each other and comprise processing resources that are different between each other, wherein the processing nodes comprise programmable processors; a memory that stores corresponding task definitions for different tasks to be executed by the processing nodes, the task definitions specifying processing resources for the different tasks, wherein the different tasks comprise programs for the programmable processors and the processing resources specified by the task definitions comprise program resources for executing the programs; and a plurality of hardware schedulers in at least a portion of the processing nodes, each of the plurality of hardware schedulers in a different processing node, the hardware schedulers assigning the different tasks to the processing nodes for execution by matching the processing resources specified in the task definitions with the processing resources of the processing nodes.