1. A distributed memory system, comprising a memory and a processor, the system configured to: receive and load memory pages into the memory and transmit memory pages from the memory as at least one packet communicated through a packet-based communication network configured to operate without packet-level acknowledgment of communications between a source and destination of a respective packet; transmit a first acknowledgement after receiving a first memory page and receive a second acknowledgement after receipt of a second memory page by the destination, independent of whether the first or second memory page comprises more than one packet communicated through the packet-based communication network; and request retrieval of a memory page not resident in the memory and evict a selected memory page from memory.