1. A resistance-variable memory device comprising: a memory cell connected to a first bitline; a reference cell connected to a second bitline; a high voltage circuit adapted to generate a high voltage from an externally provided power source voltage, wherein the high voltage is higher than the power source voltage; a precharging circuit adapted to charge the first bitline and the second bitline to the power source voltage, and to further charge the first bitline and the second bitline to the high voltage; a bias circuit adapted to provide a read current to the first bitline and the second bitline using the high voltage; and a sense amplifier adapted to detect a voltage level of the first bitline using the high voltage.