1. A method for analyzing a logic circuit comprising a plurality of components and channels for interchanging data between said plurality of components, wherein, for a simulation of a way in which the logic circuit functions, each component and each channel is assigned functional properties in a circuit model, which in a section of the method, is expanded by mechanisms for security analysis such that a respective component or a respective channel is assigned at least one defined security property and such that security-relevant data is linked to at least one defined security requirement and to a security status, and such that in a further section of the method the following method steps are performed via a simulation unit: checking to determine whether a security property of at least one of the respective component and the respective channel corresponds to a security requirement of the security-relevant data and generating a security risk report if the security property does not correspond the security requirement of the security-relevant data; applying a modeled attack to at least one of a component and a channel; and determining a vulnerability of the security property of at least one of the respective component and the respective channel to the applied modeled attack and generating an attack report if the vulnerability of the security property of at least one of the respective component and the respective channel to the applied modeled attack exists.