1. A circuit for decoding an N-bit gray coded count into a count of a unary code, comprising: a first cell having a first input and a first output; a second cell having a second input and a second output; a third cell having a third input and a third output, wherein the first output is gated by feedback from the second output, the second output is gated by feedforward from the first output and by feedback from the third output, and the third outputted is gated by feedforward from the second output, wherein the first, second and third inputs are each selected from gray code bits of the gray coded count and the logical complements of said gray code bits, and wherein the first, second and third outputs are each a different bit of the unary coded count or the logical complement of such a bit.