1. A decoder for a low density parity check code having a processor providing a method comprising: a) defining a set of code nodes including a set of variable nodes indexed by an integer n and a set of check nodes indexed by an integer m, wherein each variable node n is associated with a set of check nodes M(n) and each check node m is associated with a set of variable nodes N(m); b) initializing the variable nodes to have initial values L n (0) ; c) passing variable messages from each variable node n to the corresponding check nodes M(n); d) passing check messages from each check node m to the corresponding variable nodes N(m); and e) repeating steps (c) and (d) above in sequence until a termination condition is satisfied; wherein at least one of the code nodes broadcasts the same variable message or check message to all of its associated nodes on a single interconnection.