1. An event alignment control circuit, the circuit comprising: a delay table, wherein the delay table includes at least a first register and a last register, and wherein the delay table is operable to transfer data from the first register to the last register; a flag write controller circuit, wherein the flag write controller circuit is operable to receive an indication of assertion of an event flag and to write information relevant to the event flag to the first register of the delay table; and a signal reconstruction circuit, wherein the signal reconstruction circuit is electrically coupled to the last register, and wherein the signal reconstruction circuit reconstructs the event flag based at least in part on the information relevant to the event flag obtained from the last register.