1. A method to select a design from at least two different designs of a processor with at least two execution pipes and at least two registers, the method comprising: generating, by a processor, an optimized code stream for each design of the at least two different designs, wherein the at least two different designs comprise data for processor instruction latency and execution pipes, and wherein a code stream of processor instructions with corresponding register selections is provided for each design respectively, wherein the generating comprises reordering a corresponding code stream such that an optimum value for at least one design parameter is achieved without affecting operation results of the corresponding code stream; and selecting a design with the best optimum value for the respective optimized code stream.