1. A microprocessor, comprising: an indicator; and a plurality of processing cores; wherein each of the plurality of processing cores is configured to sample the indicator; wherein when the indicator indicates a first predetermined value, the plurality of processing cores are configured to collectively designate a default one of the plurality of processing cores to be a bootstrap processor; wherein when the indicator indicates a second predetermined value distinct from the first predetermined value, the plurality of processing cores are configured to collectively designate one of the plurality of processing cores other than the default processing core to be the bootstrap processor; and wherein the designated bootstrap processor fetches instructions at an architecturally-defined reset vector and executes the instructions.