1. A method, comprising: performing the following with electronic circuitry on a semiconductor chip: a) generating a first data structure that identifies dependencies within data operations to be performed on data elements within an input vector of a vector operation; b) generating a second data structure that identifies data element locations of said input vector that can be concurrently operated on by the vector operation without creating data conflicts, said second data structure created at least in part by masking the first data structure with a second data structure that indicates an order of execution for data operations having dependencies; c) forming a next input vector with data elements referenced by said second data structure; d) performing said vector operation on said next input vector; and, repeating a), b), c) and d) until said vector operation has been performed on all data element locations of said input vector, where, said first data structure and said second data structure are respectively updated with each iteration of a) and b).