1. A write filter cache system for protecting a microprocessor core from soft errors, comprising: a processor core operable to execute a main thread and a redundant thread; a write filter cache operable to store data associated with the main thread and data associated with the redundant thread; a comparator operable to compare the data associated with the main thread and the data associated with the redundant thread; and cache memory structure operable to store data from the write filter cache only if the data associated with the main thread and the data associated with the redundant thread are the same.