1. A method of operating a computer system that includes first and second processors and memory shared thereby, the method comprising: concurrently executing first and second instructions on respective ones of the first and second processors, the first and second instructions each reserving in a same predefined order plural respective locations of the memory, wherein, for at least the first instruction, signaling of a fault corresponding to a later reserved one of the respective locations depends on a value read from an earlier reserved one of the respective locations.