1. A current mirror circuit comprising: an input stage having an input port adapted to receive an input current, and a plurality of output stages coupled to said input stage and having output ports adapted to provide respective output currents in accordance with said input current, said input stage including a current mirror input transistor coupled to associated current mirror output transistors of said output stage, a buffer circuit having a control voltage compensation transistor coupled to said current mirror input transistor and said current mirror output transistors, and a current error-reduction transistor coupled in circuit with said control voltage compensation transistor and said current mirror input transistor, and an auxiliary turn-on current mirror circuit coupled with said buffer circuit; and a respective output stage further includes an output stage compensation circuit having a compensation current mirror transistor coupled in a current mirror configuration with said auxiliary turn-on current mirror circuit.