1. Matrix processing circuitry for performing QR decomposition of an input matrix, said matrix processing circuitry comprising: multiplication/addition circuitry for performing multiplication and addition/subtraction operations on a plurality of inputs; division/square-root circuitry for performing division and square-root operations on an output of said multiplication/addition circuitry; a first memory for storing said input matrix; a second memory for storing a selected vector of said input matrix; and a selector for inputting to said multiplication/addition circuitry any one or more of a vector of said input matrix, said selected vector, and an output of said division/square-root circuitry; wherein: on respective successive passes: a respective vector of said input matrix is read from said first memory into said second memory, and said matrix processing circuitry computes elements of a respective vector of an R matrix of said QR decomposition and replaces said respective vector of said input matrix in said first memory with said respective vector of said R matrix; and after all vectors of said input matrix have been processed, said first memory contains an output matrix of said QR decomposition.