1. A processing apparatus in an integrated circuit, comprising: a point-to-point data streaming interface; a first arithmetic logic unit (ALU) circuitry having at least one input port; a second ALU circuitry having at least one input port, wherein said second ALU circuitry processes branches; a register file; and multiplexer logic configured to selectively couple said register file and said point-to-point data streaming interface to said at least one input port of said first ALU circuitry and said at least one input port of said second ALU circuitry.