1. A system for implementing a Reed-Solomon computation of parity bytes of a codeword, comprising: an accumulator configured to hold a plurality of bits; and a logic circuit configured to iteratively compute a new bit for each bit held in the accumulator, such that after a last iteration of the computation the bits held in the accumulator correspond to the parity bytes, wherein for each bit held in the accumulator each iteration of the computation comprises computing an exclusive-OR of a fixed subset of bits held in the accumulator.