1. A system for determining a logical address of a transaction abort the system comprising: a processing circuit configured to perform a method comprising: receiving a plurality of instructions from an application; executing the plurality of instructions within a first transaction wherein the first transaction delays committing stores to memory until completion of the first transaction, at least one of the plurality of instructions including a first logical memory address, the first logical memory address corresponding to a first memory address; determining that the first memory address is equal to a second memory address stored in a conflict register; and based on the determining, saving the first logical memory address at a location available to the application as a logical address associated with a cross invalidate (XI) signal.