1. A method of performing arithmetic operation using a cache structure having a TAG register and a cache data memory, the method comprising the steps of: storing in the TAG register a plurality of known operands, each having a corresponding resultant derived from an arithmetic operation, the resultant being stored in a corresponding location in the cache data memory; inputting a new operand on which the arithmetic operation is to be performed to the TAG register; comparing the new operand to the plurality of the known operands; and determining if the new operand matches any of the known operands and if there is a match, outputting from the cache data memory the known resultant corresponding to the known operand that matched the new operand.