1. A system, comprising: a processor, and memory coupled to the processor, wherein the memory comprises program instructions executable by the processor to implement a compare and swap (CAS) based non-blocking load-linked/store-conditional (LL/SC) synchronization, wherein the synchronization includes: a load-linked sequence comprising a first CAS operation; and a store-conditional sequence comprising a second CAS operation; and wherein the synchronization targets a location containing an application value that does not include a version indication encoded integrally therewith.