1. A circuit including 32-bit carry look-ahead means, comprising data inputs for a first word (a.sub.i) and a second word (b.sub.i), where i=0, 1, 2. .. 31, and having a carry-in input, and further comprising: first means for producing single bit generate terms (g.sub.i), and second means for producing single bit propagate terms (p.sub.i), where i=0, 1, 2. .. 31, except i.noteq.3, 7, 11, 15, 19, 23, 27, and 31; third means for producing double bit generate terms (dg.sub.i+1), and fourth means for producing double bit propagate terms (dp.sub.i+1), where i=0, 2, 4. .. 30; and wherein said first, second, third and fourth means each receive said first and second words from said data inputs; fifth means for producing group (4 bit) generate terms (gg.sub.i+3), and sixth means for producing group (4 bit) propagate terms (gp.sub.i+3), where i=0, 8, 16, and 24; seventh means for producing double group (8 bit) generate terms (dgg.sub.i+7), and eighth means for producing double group (8 bit) propagate terms (dgp.sub.i+7), where i=0, 8, 16, and 24; and, wherein said fifth and seventh means each receive said double bit generate terms from said third means and said double bit propagate terms from said fourth means; and, wherein said sixth and eighth means each receive said double bit propagate terms from said fourth means; ninth means coupled to said carry-in input, said seventh means, and said eighth means for producing group carry terms (gc.sub.i) (for 8-bit blocks), where i=0, 8, 16 and 24; tenth means coupled to said first, second, fifth, sixth and ninth means for producing bit carry terms (c.sub.i), where i=0, 1, 2. .. 31.