1. A data processing device comprising: an instruction decoder ( 1 ) for decoding an instruction code in an arithmetic instruction; a controller ( 3 ) for detecting an effective data width of operation data to be processed for the arithmetic instruction based on the decode result from the instruction decoder ( 1 ), and for determining an instruction execution cycle number which is the number of cycles of the execution of the instruction corresponding to the effective data width detected; and an arithmetic operation unit ( 4 ) for executing the arithmetic instruction with the number of cycles for the instruction execution determined by the controller ( 3 ).