1. A system comprising: a first queue having a plurality of first queue entries, each of the first queue entries occupying a memory portion atomically accessible in a single memory access; a second queue having a plurality of second queue entries, each of the second queue entries occupying a memory portion atomically accessible in a single memory access; a third queue having a plurality of third queue entries, each of the third queue entries occupying a memory portion atomically accessible in a single memory access; a fourth queue having a plurality of fourth queue entries, each of the fourth queue entries occupying a memory portion atomically accessible in a single memory access; a first thread to write to the first queue; a second thread to write to the second queue; a multiplexer thread to read the first queue and the second queue and to write to the third queue and the fourth queue; a third thread to read from the third queue; and a fourth thread to read from the fourth queue.