1. An information processing apparatus which includes a data input layer, an arithmetic processing layer having at least one layer level and a plurality of processing modules corresponding to feature classes to be detected, a learning control circuit, and a processing module addition/deletion control circuit, said apparatus comprising: determination means for determining whether an error signal of an operation element output at a predetermined layer level in the arithmetic processing layer satisfies a predetermined condition in a predetermined learning step executed by the learning control circuit; and control means for, when said determination means determines that the predetermined condition is satisfied, executing control to cause the processing module addition/deletion control circuit to add at least one processing module in a layer of a level lower than the layer level.