1. A re-programmable antifuse field programmable gate array (FPGA) integrated circuit, said FPGA comprising: a power source; a plurality of CeRAM resistive switching elements forming a connection block, said switching elements capable of being switched from a conductive (ON) state to a non-conductive (OFF) state and back to a conductive (ON) state; a plurality of logic elements forming a logic block; a plurality of transistors forming a switching block; said transistors connected between said power source and said CeRAM resistive elements; a control circuit for applying control pulses to said transistors; and a microprocessor connected to said control circuit for turning said CeRAM switching elements OFF and ON to connect said logic elements to form said FPGA.