1. A processor for implementing a network of functional nodes and communication paths between the nodes, the processor comprising: a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes, wherein at least some of the signal paths are configured to pass a signal value represented according to a temporal pattern on the signal paths; wherein at least some of the circuit implementations of the functional nodes include circuitry for combining temporal patterns of a plurality of signals to form a temporal pattern of a combined signal; and wherein the processor comprises a plurality of circuit components for conversion between a signal value represented as a signal level and a signal value represented as a temporal pattern.