1. A state machine engine comprising: a state machine lattice comprises a plurality of configurable elements; an instruction buffer configured to provide a first instruction associated with an operation of the state machine engine; and an instruction insertion register configured to provide a second instruction associated with the operation of the state machine engine, wherein the state machine engine is configured to remove the first instruction from the instruction buffer in response to an indication that the operation of the state machine engine should be interrupted, wherein the instruction insertion register is configured to provide the second instruction to the state machine lattice in response to an indication that the operation of the state machine may be resumed, wherein the indication that the operation of the state machine engine may be resumed comprises an indication that the state machine lattice is able to analyze data and wherein the second instruction comprises an initialization instruction to indicate that instructions from the instruction buffer are forthcoming.