1. A method comprising: determining command operations for each of a plurality of different memory devices coupled to a memory controller, wherein at least two of the plurality of different memory devices have different erase or program architectures, and wherein the command operations include page read and page write for two or more protocol standards; decomposing each command operation into one or more primitives of one or more cycles and one or more durations of the one or more primitives and one or more delays after one or more primitives to implement timing parameters of the two or more protocol standards, wherein one or more command operations or one or more primitives differ from each other between the different memory devices and wherein the one or more primitives of one or more cycles are selected from a group consisting of command cycles, address cycles, and data cycles; and storing the one or more primitives along with a mapping between the command operations and the corresponding set of primitives in a command translation data structure of the memory controller, wherein the command translation data structure includes signal interface definitions for each corresponding set of primitives, and wherein at least two different memory devices have different signal interface definitions.