1. A computer system for counter-based wide fetch management, the computer system comprising: a processor; a counter management module associated with a set of counters; a cache memory; and a main memory, the system configured to perform a method comprising: assigning, by the counter management module, a counter from the set of counters, to a first memory region in the main memory, wherein the first memory region is allocated to a first application that is executed by the processor; maintaining, by the counter, a count of a number of times adjacent cache lines in the cache memory corresponding to the first memory region are touched by the processor within a predetermined duration since the assigning of the counter to the first memory region, wherein the processor touches the cache lines in conjunction with execution of the first application; updating, by the counter management module, a data fetch width indicator corresponding to the first memory region in response to the count being at least a predetermined threshold value within the predetermined duration since the assigning of the counter to the first memory region; and assigning, by the counter management module, the counter to a second memory region in the main memory in response to the count being less than the predetermined threshold value within the predetermined duration since the assigning of the counter to the first memory region.