1. A method comprising: during a write back stage at an execution unit of a plurality of execution units, comparing a write identifier associated with a result from an execution of a first instruction to a read identifier associated with a second instruction at an execution pipeline within an interleaved multi-threaded (IMT) processor that includes the plurality of execution units; storing the result at a register file; and storing the result at a local memory of the execution unit in response to determining that the write identifier matches the read identifier, wherein the result stored at the register file is provided from the register file to the execution unit without passing through the local memory.