1. A non-volatile memory device comprising: an array of non-volatile memory cells; and control circuitry coupled to the array to perform an erase operation on the non-volatile memory cells, wherein the erase operation comprises applying one or more erase pulses to the non-volatile memory cells and performing a convergence operation to recover over-erased non-volatile memory cells, wherein the convergence operation comprises holding a substrate body of the non-volatile memory cells at a constant voltage, and applying a variable voltage to another input of the non-volatile memory cells.