1. A memory subsystem comprising: a memory; and a memory controller that provides one or more data-stream interfaces, provides a random-access interface to individual memory cells and to two-dimensional memory regions, arbitrates among the data-stream interfaces and random-access interface to serialize concurrently requested memory accesses received through the data-stream interfaces and random-access interface, carries out memory accesses requested through the data-stream interfaces by writing data-stream input to memory, and carries out single-memory-cell and two-dimensional-memory-cell-region memory accesses requested through the random-access interface by reading values from, and writing values to, memory cells and two-dimensional memory-cell regions.