1. An apparatus comprising: a register set to store global control or status information for fault processing of a fault generated by an input/output (I/O) transaction requested by an I/O device; and an address translation structure to translate a guest physical address to a host physical address, the guest physical address corresponding to the I/O transaction and mapped to a domain, the address translation structure having at least an entry associated with the domain and domain-specific control information for the fault processing.