1. A method for verifying a circuit design, the method comprising: by a computing device, automatically analyzing a description of the circuit design to identify a clock domain crossing signal between a first node in a first clock domain and a second node in a second clock domain; by the computing device, automatically generating a description of a metastability effects generator for injecting metastability effects; performing a simulation test of the description of the circuit design using the description of the metastability effects generator; and outputting a coverage report regarding a result of the simulation of the description of the circuit design using the metastability effects generator.