1. An apparatus for performing testing of at least a portion of a system under test via a Test Access Port (TAP) configured to access the system under test, comprising: a first processor for executing instructions adapted for controlling testing of at least a portion of a system under test via the TAP; and a second processor for supporting an interface to the TAP; the first processor for detecting, during execution of the test instructions, TAP-related instructions associated with control of the TAP, and propagating the TAP-related instructions toward the second processor; the second processor for receiving the TAP-related instructions detected by the first processor and processing the TAP-related instructions; wherein the first processor is configured for performing at least one task contemporaneously with processing of the TAP-related instructions by the second processor.