1. A programmable resistive memory, comprising: a plurality of programmable resistive cells, at least one of the programmable resistive cells comprising: a programmable resistive element coupled to at least one diodes as program selectors fabricated in standard CMOS process; and at least one non-volatile register to store protection bit information, and wherein the data stored in the non-volatile register being operable to scramble addresses or data when accessing the programmable resistive memory.