1. An apparatus comprising: a non-volatile storage to store semiconductor integrated code (SIC) corresponding to platform independent code of a processor manufacturer, the SIC including an embedded processor logic to initialize a processor and at least one communication link that couples the processor to a system memory, and an embedded memory logic to initialize the system memory, wherein the SIC is to be executed responsive to a processor reset and prior to providing control to pre-boot code of an original equipment manufacturer (OEM), wherein the SIC is included in the non-volatile storage, the non-volatile storage including OEM basic input/output system (BIOS).