1. An apparatus comprising: a first processor and a second processor; a first set of memory and a second set of memory each communicatively coupled to the first processor and to the second processor; and a memory having instructions stored thereon that when executed by at least one processor direct the at least one processor to: execute for a first user a computing application as a first process, wherein the first user is bound to the first processor such that the first process executes on the first processor and does not execute on the second processor; execute for a second user a computing application as a second process, wherein the second user is bound to the second processor such that the second process executes on the second processor and does not execute on the first processor; move the first process from an execution state to a wait state; move the first process from the wait state to the execution state, wherein moving the first process from the wait state to the execution state includes determining that the first process executes on the first processor and not the second processor, and executing the first process on the first processor based on the determination; move the second process from the execution state to the wait state; and move the second process from the wait state to the execution state, wherein moving the second process from the wait state to the execution state includes determining that the second process executes on the second processor and not the first processor, and executing the second process on the second processor based on the determination.