1. An apparatus for channel equalization using a Viterbi algorithm, the apparatus comprising: a reconfigurable data path including: i) a reconfigurable branch metric calculation block correlating information from an output of a matched filter and channel parameters from a channel estimation circuit; and ii) a reconfigurable add-compare-select and path metric calculation block; and a programmable finite state machine capable of controlling the reconfigurable data path, wherein the programmable finite state machine executes a plurality of context-related instructions associated with the Viterbi algorithm.