1. A method of operating non-volatile storage that includes a plurality of non-volatile storage elements arranged as NAND strings and a plurality of word lines, each of the NAND strings having a first select transistor at a first end and a second select transistor at a second end, the method comprising: applying a sequence of programming voltages to a selected word line of the plurality of word lines, the selected word line associated with a group of the non-volatile storage elements; and applying a gate-to-source voltage (Vgs) to the first select transistor of a first of the NAND strings that has a magnitude that is lowered a plurality of times during the sequence of programming voltages, the Vgs is applied to the first select transistor while applying one of the programming voltages.