1. A computer system comprising: at least one random access memory; a secondary energy source connected to the at least one random access memory, the secondary energy source configured to supply power to the at least one random access memory during a power interruption in order to protect data stored on the at least one random access memory during the power interruption; and a processor in electronic communication with the at least one random access memory through a communication bus to enable the processor to read and write data to the at least one random access memory, the processor configured to: access memory resources on a source computer system to be backed up, the memory resources comprising a block of uncoded data; access the block of uncoded data from the memory resources of the source computer system; encode the block of uncoded data by use of a bit-marker-based encoding process, wherein bit markers are used to replace respective unique data vectors in the block of uncoded data, wherein the bit-marker-based encoding process comprises decomposing the block of uncoded data into a plurality of data vectors and mapping each data vector to a corresponding bit marker; store the encoded block of uncoded data in the at least one random access memory to produce a system clone of the memory resources of the source computer system, wherein the system clone is stored in the at least one random access memory of the computer system without the need for a conventional persistent storage device; identify a target computer system on which to restore the system clone of the source computer system; access the encoded block from the at least one random access memory; decode the encoded block using a bit-marker-based decoding process to produce a block of decoded data from the encoded block; and provide the block of decoded data to memory resources on the target computer system, wherein the computer system is separate from the source computer system.