1. Apparatus for processing data comprising: a programmable general purpose processor operating under program instruction control to perform data processing operations; a memory system coupled to said processor, said memory system operating to store data values to be processed by said processor; a hardware accelerator coupled to said processor and to said memory system and operating to perform data processing operations upon data values accessed in said memory system; a shared memory management unit coupled to said processor, said memory system and said hardware accelerator and operating to perform memory management operations in respect of memory accesses to said memory system by said processor and by said hardware accelerator; a first communication channel between said processor and said hardware accelerator for transferring at least control signals between said processor and said hardware accelerator; and a second communication channel coupling said hardware accelerator and said memory system for transferring data access operations between said hardware accelerator and said memory system, wherein said processor includes a load-store unit responsive to data access program instructions executed by said processor to perform data access operations upon said memory system for said processor and said second communication channel passes data access requests from said hardware accelerator to said load-store unit of said processor to perform data access operations upon said memory system for said hardware accelerator, wherein said processor includes a processing pipeline, said load-store unit being part of said processing pipeline, and said second communication channel injects data access requests from said hardware accelerator in to slots within said processing pipeline so as to use said load-store unit to perform data access operations upon said memory system for said hardware accelerator when said load-store unit not needed to perform data access operations upon said memory system for said processor.