1. A method, comprising: monitoring progress of a complex instruction comprising a multi-operation instruction; detecting that a plurality of memory operations are to complete for a first type of atomic operation (atomic op) event of the complex instruction comprising the multi-operation instruction; in response to a retirement signal of a corresponding memory operation of the complex instruction, incrementing a counter value of an instruction atomicity violation counter of a processor by a first constant; detecting that a second type of atomic op event of the complex instruction accesses a plurality of cache lines; in response to a split signal when the second type of atomic operation occurs, incrementing the counter value by a second constant different than the first constant; resetting the counter value responsive to the complex instruction completing; and in response to an event recording signal, recording the counter value in a log entry in conjunction with a trace of the complex instruction responsive to a coherency message associated with a memory access by a first thread having a dependency occurring during a pendency of the complex instruction, the counter value indicative of where in the complex instruction that an instruction atomicity violation has occurred, wherein the recorded counter value of the instruction atomicity violation counter when of a first set of values is to indicate a number of single memory operations of the complex instruction that have completed execution when the dependency was recorded and the recorded counter value when of a second set of values is to indicate a number of single and split memory operations of the complex instruction that have completed execution when the dependency was recorded, the first set of values and the second set of values non-overlapping.