1. A circuit, comprising: a phase detector configured to generate a control signal based on a comparison of a phase of a reference signal to a phase of a feedback signal; a first charge pump configured to generate a first current at a first node in response to the control signal; a second charge pump configured to generate a second current at a second node in response to the control signal; an isolation buffer coupled between the first node and the second node; an adder having a first input coupled to the second node; an auxiliary charge pump configured to generate a third current at a second input of the adder in response to a second control signal; an oscillator having an input coupled to an output of the adder, wherein the oscillator is configured to generate an output signal based on the output of the adder; a frequency divider circuit having an input coupled to an output of the oscillator, wherein the frequency divider circuit is configured to generate the feedback signal based on the output signal, wherein a ratio of a frequency of the output signal to a frequency of the reference signal comprises an integer portion of a divide ratio and a fractional portion of the divide ratio; a first fractional control module configured to provide a first factor to the frequency divider circuit, the first factor comprising the fractional portion of the divide ratio and quantization noise; an integrating circuit having an input coupled to an output of the first fractional control mode, the integrating circuit being configured to generate a phase signal based on the quantization noise; and a second fractional control module having an input coupled to an output of the integrating circuit, the second fractional control module being configured to generate the second control signal based on the phase signal.