1. A re-configurable, streaming vector processor comprising: a plurality of function units, each having one or more inputs for receiving a data value and an output for providing a data value; a re-configurable interconnection switch comprising one or more links, each link operable to couple an output of a function unit to an input of the one or more inputs of a function unit; and a micro-sequencer coupled to the re-configurable interconnection switch and operable to control the re-configurable interconnection switch.