1. An iterative decoder structure allowing parallel evaluation of parity equations comprising: a. received data inputs, b. a permuter to receive the received data inputs and current array outputs, and to generate a permuter output, c. a first adder, wherein the first adder receives the permuter output as a first input to the first adder and a difference array output as a second input to the first adder and generates a first adder output, d. a processor, wherein the processor receives the first adder output and generates an estimate output and a difference output, e. a difference array, wherein the difference array receives the difference output and outputs a difference array output, and f. a current array, wherein the current array receives the estimate output and presents a current array output to the permuter.