1. A method for processor virtualization in processor architectures comprising: identifying in the instruction set of a guest operating system one or more predefined instructions, wherein said one or more predefined instructions do not cause the processor to trap execution of said one or more predefined instructions; removing, replacing, or supplementing the identified one or more predefined instructions with at least one synthetic instruction that causes at least one exception to be trappable by a virtualization program, wherein said synthetic instructions are illegal to said architecture; and using at least one of said synthetic instructions to enable direct execution on a physical processor of instructions issued by said guest operating system; wherein said at least one of said synthetic instructions is executed from within guest kernel code.