1. A data processor comprising: an arithmetic portion incorporated in a floating point unit, wherein said arithmetic portion includes a plurality of multipliers supplied mantissa part of floating point number from respectively different data input signal line group and performing mutual multiplication of supplied mantissa parts; an aligner receiving outputs of respective multipliers and performing alignment shift, an exponent processing portion for generating number of alignment shift of said aligner and an exponent before normalization on the basis of generation an exponent part of said floating point number; a multi-input adder for adding the outputs of said aligner; and a normalizer for normalizing the output of said multi-input adder and said exponent before normalization.