1 ) A memory controller, comprising: a host interface to receive a plurality of write data values and a plurality of mask values, wherein a mask value in the plurality of mask values is capable of indicating whether a corresponding one of the plurality of write data values is to be excluded from a storage array within a memory device; a mask logic circuit, coupled to the host interface, to generate a mask key responsive to the plurality of write data values and the plurality of mask values, wherein the mask logic circuit includes a binary propagation tree; and a memory interface, coupled to the mask logic circuit, to output the plurality of write date values and the mask key to the memory device.