1. An application specific integrated circuit (ASIC) chip, comprising: one or more compiler-generated embedded memory instances of an ASIC compiler, at least one of said embedded memory instances including a universal register for storing an address of a defective subunit of the memory instance; a control block located on said ASIC chip outside of the memory instances, said control block including a defective memory register for storing an address of a defective memory subunit; means for transferring the address of a defective memory subunit from the defective memory register in the control block to the universal interface register in the memory instance; and means for comparing an incoming memory address to said address stored in said universal register.