1. A processor-implemented method comprising: identifying, by issue logic, that a simple fixed point instruction is ready to issue from a unified payload, wherein the simple fixed point instruction is executable by both a fixed point execution unit and a load-store execution unit; determining, by the issue logic, that the unified payload does not include a load-store instruction that is eligible to issue to the load-store execution unit; and issuing, by the issue logic, the simple fixed point instruction to the load-store execution unit in response to identifying that the simple fixed point instruction is ready to issue and determining that the unified payload does not include a load-store instruction that is eligible to issue.