1. A system for accelerating audio processing, the system comprising: a reconfigurable core processor that processes audio data received from system memory, and wherein the reconfigurable core processor is communicatively coupled to a register file and an auxiliary register file; a plurality of hardware accelerators, including multiply-accumulate (MAC) units executable to perform operations for accelerating the processing of audio data, the plurality of MAC units: coupled to the register file and the auxiliary register file, and sharing registers in each of the register file and the auxiliary register file with the reconfigurable core processor, and wherein the shared registers allow for parallel processing of audio data by the MAC units and the reconfigurable core processor; a source control unit that fetches operands for at least one of the plurality of MAC units from the shared registers; and a destination control unit that stores values derived by at least one of the MAC units in the shared registers, and wherein the derived values may be used to reconfigure an audio processing operation of the core processor.