1. A CMOS circuit comprising a p-channel transistor having source, drain and gate electrodes, an n-channel transistor having source, drain and gate electrodes, first means connecting said gate electrodes together, second means connecting said drain electrodes together, an input terminal directly connected to said first connecting means, means for applying to said input terminal an input waveform representative of binary data signals, an output terminal connected to said second connecting means, and means connecting at least one of said source electrodes to a pulsed power supply having a waveform that is in phase with said input waveform.