1. A data processing system that executes instructions which access a specific address in memory in a plurality of sequences, comprising: means for reordering said instructions from a first sequence to a second sequence to enable simultaneous execution of said instructions in said second sequence; means for storing said instructions in said first sequence, and for storing said instructions in said second sequence simultaneously; a plurality of execution means for simultaneously executing said instructions in said second sequence; and means for comparing, subsequent to execution of said instructions in said second sequence, whether the address of the non-executed instructions in said first sequence is the same as the address of the executed instructions in said second sequence, and for comparing an instruction number position in said means for storing of instructions in said first and second sequence which access the same address wherein, if the address is the same and the instruction number for instructions in said first sequence is less than the instruction number for instructions in said second sequence, the data processing system continues executing instructions in said second sequence.