1. A computer system comprising: a plurality of processor cores each configured to initiate access requests to a system memory by providing a physical address that is not associated with a corresponding virtual address, wherein the plurality of processor cores is subdivided into at least first and second subsets of the plurality of processor cores; and wherein the system memory is subdivided into paged and unpaged regions for each of the first and second subsets, wherein a first paged region associated with the first subset is located in an unpaged region with respect to the second subset, and wherein a second paged region associated with the second subset is located in an unpaged region with respect to the first subset; a first cache subsystem including a first cache memory, wherein the first cache subsystem is shared by each of the first subset of the plurality of processor cores; and wherein, responsive to receiving a memory access request from one of the first subset of the plurality of processor cores, the first cache subsystem is configured to: determine if a physical address of the memory access request is in the first paged region; and access a set of page attributes for a page corresponding to the physical address from a corresponding page attribute table responsive to determining that the physical address is within the first paged region, wherein the corresponding page attribute table is shared by each of the first subset of the plurality of processor cores.