1. A storage device management device connected to a random access memory, a first storage device having a lower rewrite count upper-limit than the random access memory, and a processor, comprising: the first storage device is a NAND flash memory in data is erased in units of blocks each of which includes pages, when the random access memory includes a free region sufficient to store write data which is a target of a write request from the processor, the write data is stored onto random access memory, and a first table which indicates which one, or both, of the random access memory and the first storage device and which region of the one, or both, of the random access memory and the first storage device stores data assigned with a logical address and a second table which indicates whether a region in the random access memory stores valid data and a time of the last access to the region are updated; data on the random access memory selected in the descending order of elapsed time from the last access is sequentially copied onto the first storage device, and a region in the random access memory which has previously stored the copied data is released, and the first table and a third table which indicates whether a region in the first storage device stores valid data and a time of the last access to the region are updated; when read data which is a target of a read request from the processor is stored on the random access memory, the read data is read from the random access memory to the processor; when the read data is stored on the first storage device, the read data is copied onto the random access memory and read from the random access memory to the processor; the management device receives a data update request; when update data which is an update request target is stored on the random access memory, the management device updates the update data on the random access memory; and when the update data is stored on the first storage device, the management device copies the update data onto the random access memory and updates the update data on the random access memory.