1. A processing system comprising: a first interconnect of a first data processor to communicate information between a portion of the first data processor and a first memory; a first debug module, of the first data processor, coupled to the first interconnect, the first debug module comprising: a first trace buffer to store data trace information of the first memory that meets a first data trace criteria of the first debug module; a first data trace filter module coupled to the first trace buffer to filter out data trace information stored at the first trace buffer that does not meet a second data trace criteria.