1. An improved phase detector circuit comprising: (a) a variable voltage controlled oscillator having a variable resistance means for varying the frequency of the oscillator output signal in response to a voltage correction signal; (b) counter means for receiving the output signal from the oscillator, for generating during each four clock cycles of the oscillator output signal a first phase detection enable signal during every fourth clock cycle, and a second phase detection enable signal during every first and second clock cycles, and further for generating a clock output; (c) a signal shaping means for receiving a data input signal of approximately the same frequency as the clock output of the counter means and for generating an approximately uniform width data output signal; (d) a first logical AND gate means for receiving the data output signal and the first phase detection enable signal and generating a first phase difference signal; (e) a second logical AND gate means for receiving the data output signal and the second phase detection enable signal and generating a second phase difference signal; and (f) a switchable voltage pulse generator comprising first and second transistor means in series coupled respectively to the output of said first and second logical AND gates, with the junction of the first and second transistors being coupled to the variable resistance means of the oscillator, for generating and transmitting a voltage correction signal to the variable resistance means of the oscillator in response to the presence of the first or second phase difference signals, wherein the voltage correction signal causes the variable resistance means to change the frequency output of the variable voltage controlled oscillator, thereby causing the clock output of the counter means to become synchronized with the frequency of the input data signal.