1. A method for recovering lost cache capacity in a multi core chip having at least one defective core comprising: identifying the cores contained in said chip that are viable cores; identifying at least one core contained in said chip that is defective; identifying the cache memory local to said defective core; determining the redistribution of said cache resources local to said at least one defective core among said viable cores; dividing said cache memory local to said at least one defective core according to said redistribution determination; determining the address information associated with the cache memory local to said at least one defective core; providing said address information associated with the cache memory associated with said defective core to at least one of said viable cores; supplementing the cache memory local to said viable cores with the cache memory associated with said defective core.