1. A method for implementing modal selection of a bimodal coherent accelerator in a computer system comprising: providing a system processor; providing a PCI-Express standard Vendor Specific Extended Capability (VSEC) structure or CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter; said system processor using the CAPI VSEC data in the configuration space of a CAPI-capable PCIE adapter and procedures defined in the Coherent Accelerator Interface Architecture (CAIA) to detect, enable and control a coherent coprocessor adapter over PCIE; and said system processor enabling the CAP I-capable PCIE adapter to be bimodal and operate in a conventional PCI-Express (PCIE) transaction mode or a CAPI mode utilizing CAIA coherence and programming interface capabilities.