1. A Programmable Resistive Device (PRD) memory, comprising: a plurality of PRD cells, at least one of the cells comprising: at least one PRD that including at least a diode and/or a Programmable Resistive Element (PRE) being fabricated in a contact hole at the crossovers of a plurality of the first and a plurality of second conductor lines located in more than two vertical layers; the PRE coupled to a first conductor line; the diode including at least a first active region and a second active region isolated from the first active region, where the first active region having a first type of dopant and a second active region having a second type of dopant, the first active region providing a first terminal of the diode, the second active region providing a second terminal of the diode, the first active region coupled to the PRE and the second active region coupled to a second conductor line, at least one PRE of one PRD being coupled to another PRD or shared between two PRDs whose diode being coupled to the second or a third conductor line; and wherein the PRE is configured to be programmable by applying voltages to the first, the second conductor lines and/or the third conductor line to thereby change its resistance for a different logic state.