1. A method for implementing a 1D stencil code via SIMD instructions on a computer that includes a plurality of vector registers, each having a number N of processing elements (PEs), the plurality of vector registers including a set of vector registers used to store stencil coefficients, a set of vector registers used to store data values, and a set of vector registers used to store results, the method comprising: receiving, by a processor, a number M of ordered stencil coefficients; loading, by the processor, stencil coefficients into M+N−1 consecutive coefficient vector registers of the set of coefficient vector registers, such that: the first PEs of the first M coefficient vector registers contain the M stencil coefficients in order, and the remaining N−1 PEs of the first coefficient vector register and the first PEs of the N−1 coefficient vector registers following the first M coefficient vector registers contain zeros; the subsequent PEs of the M+N−2 coefficient vector registers following the first coefficient vector register contain the value stored in the previous PE of the previous coefficient vector register; receiving, by the processor, at least M+N−1 data values; processing consecutive sets of N consecutive data values of the received data values by: loading, by the processor, each data value of the set of N consecutive data values into all PEs of a data vector register of the set of data vector registers; accumulating, by the processor, in a result vector register of the set of result vector registers, a sum of products of consecutive coefficient vector registers with data vector registers containing the consecutive data values; and outputting, by the processor, the contents of each result vector register containing a sum of the products of all the coefficient vector registers with a data vector register, wherein each result vector register containing a sum of all the products of all the coefficient vectors register with a corresponding data vector register is then reused for accumulating.