1. A method of operating a processor comprising a plurality of functional units arranged in one or more cores, comprising: configuring the functional units to operate in one of two discrete operational modes, a first discrete operational mode being implemented with the functional units in a standard core configuration using a first datapath, and a second discrete mode being implemented with the functional units in a spatial array configuration using a second datapath; receiving a block of operating instructions, the operating instructions including an indication of the operational mode to be utilized for the block; and dynamically reconfiguring the functional units at runtime to operate in one or the other discrete operational mode according to the received block of operating instructions.