1. A data storage system comprising: a processor; memory connected to the processor, the memory comprising a plurality of multi-level memory cells; a data storage element connected to the processor; and computer executable program code configured to execute on the processor, wherein the computer executable program code is configured to: identify a first multi-level cell in the plurality of multi-level cells as being prone to write errors; modify an incremental step programming pulse via applying more pulses to shift a mean voltage distribution associated with a least significant bit; and apply the modified incremental step programming pulse to the first multi-level memory cell.