1. A method of designing a system-on-chip, the method comprising: receiving a plurality of processing modules each representing in software one of a plurality of processing units of a system-on-chip; modeling, using at least one processor, communications from one or more of the plurality of processing modules to another of the one or more of the plurality of processing modules as accesses to memory; and generating a coherent memory module associated with the plurality of processing modules based on modeling the communications from the one or more of the plurality of processing modules as accesses to memory, the coherent memory module representing in software a coherent memory associated with the plurality of processing units.