1. Apparatus for processing data comprising: first execution circuitry configured to execute program instructions; second execution circuitry configured to execute program instructions; switching control circuitry coupled to said first execution circuitry and to said second execution circuitry and configured to control a switching operation between a first state in which program instructions are executed by said first execution circuitry and a second state in which program instructions are executed by said second execution circuitry, said switching operation including transferring at least some architectural state data from said first execution circuitry to said second execution circuitry, wherein said switching control circuitry is configured: to receive first latency indicating signals dependent upon a current state of said first execution circuitry from said first execution circuitry; to control switching from said first state to said second state in dependence upon said first latency indicating signals, said first latency indicating signals indicating a first latency incurred by switching from said first state to said second state; and to control said second execution circuitry to commence speculatively executing program instructions based upon a partial transfer of said at least some architectural state data before said first execution circuitry has finished executing program instructions; and wherein said at least some architectural state data comprises state data from registers within said first execution circuitry for which there are no pending write operations.