1. A method of switching between execution modes in a processor, the method comprising: detecting a first instruction when the processor is operating in a first execution mode; analyzing one or more bits of a target address of the first instruction; and determining whether to switch operation of the processor from the first execution mode to a second execution mode based on the one or more bits, wherein the one or more bits are alignment bits, and wherein the alignment bits are forcibly misaligned for the target address in one of the first execution mode or the second execution mode.