1. A directory-based cache coherence controller system for reducing latency associated with cache coherence directory misses on external caches in a shared distributed memory data processing system, comprising: a cache coherence directory; a directory cache; first caching logic for evaluating said cache coherence directory for possible presetting of a directory entry into said directory cache; second caching logic for setting a prefetch miss indicator in response to said prefetch evaluation resulting in a directory miss; first protocol logic for consulting said prefetch miss indicator during subsequent processing of a memory request corresponding to said directory entry; and second protocol logic for taking an accelerated snoop response action without reevaluating said directory based on said prefetch miss indicator being set.