1. An asynchronous logic element, comprising: a plurality of edges providing bit-level asynchronous communication with at least one contiguously neighboring logic element, each edge comprising: at least one input for receiving at least one input logic state token from a contiguously neighboring logic element; and at least one output for transferring an output logic state token to a contiguously neighboring logic element; and computational circuitry configured to perform a logic operation utilizing at least one received input logic state token as at least one input to produce an output logic state token reflecting the result of the logic operation, wherein the computational circuitry is neither globally or locally clocked, and wherein the input and output logic state tokens are implemented as charge packets and the charge packets are conserved during the logic operation.