1. A computer-implemented method for generating instructions to be executed in an integrated circuit, the integrated circuit comprising a plurality of processor cores interconnected by an interconnection network, the method comprising: accepting a plurality of programs, at least some of the programs including one or more communication operations to communicate with other programs; mapping each program to one or more of the processor cores; determining correspondence among communication operations in the programs; and mapping communication for corresponding communication operations to resources associated with the interconnection network.