1. An electronic device, comprising: a memory structure comprising an integer M of word storage locations; a shift register for storing a sequence of bits, wherein the sequence in the shift register comprises a number of bits equal to a ratio of 1/R 1 times the integer M; and circuitry for providing a clock cycle to the shift register for selected data operations with respect to any of the word storage locations, wherein the selected data operations are a data read or a data write; wherein in response to each clock cycle, received from the circuitry for providing the clock cycle, the shift register shifts the sequence; and wherein one bit in the sequence corresponds to an indication of one of the memory word storage locations from which a word will be read or into which a word will be written.