1. A method of facilitating translation of memory addresses, said method comprising: determining, by a processor, whether a first address translation structure of a first type is to be used to translate a memory address; based on the determining that a first address translation structure of the first type is to be used, accessing a second address translation structure of a second type, the second type being different from the first type, to determine a particular first address translation structure to be used and to obtain an origin address of that particular first address translation structure; and using the particular first address translation structure in translating the memory address.