1. A non-transitory computer-readable storage medium storing one or more instruction sequences executable on a multiprocessor to implement a multi-compare, single-swap synchronization operation that is linearizable non-blocking, the multi-compare, single-swap synchronization operation takes as input: expected contents of a plurality of targeted memory locations; and a new value for one of the plurality of targeted memory locations; the multi-compare, single-swap synchronization operation is configured to perform: determining whether contents of the plurality of targeted memory locations match the expected contents of the plurality of targeted memory locations; and modifying, at most, the one of the plurality of targeted memory locations; and said determining and said modifying are performed atomically.