1. A memory interface for use with a multiprocess memory system having a gating memory, the gating memory associating one or more memory access method modifiers with each of a plurality of memory locations of the memory system wherein the gating memory returns a particular one access method modifier for a particular one memory location responsive to a memory access instruction relating to the particular one memory location including an operand identifying an access method, the interface comprising: a request storage for storing a plurality of concurrent memory access instructions for one or more of the particular memory locations, each said memory access instruction issued from an associated independent thread context; an arbiter, coupled to said request storage, for selecting a particular one of said memory access instructions to apply to the gating memory; and a controller, coupled to said request storage and to said arbiter, for: storing said plurality of memory access instructions in said request storage; initiating application of said particular one memory access instruction selected by said arbiter to the gating memory; receiving the particular one access method modifier associated with said particular one memory location from the gating memory; and controlling access of the particular one memory location responsive to the access method using said particular one access method modifier.