1. A VLSI ROM with provision for redundancy comprising, in combination: a plurality of ROM cells each comprising a transistor; a plurality of surplus cells each having a transistor in series with a high resistance polysilicon resistor; and, means for selecting a surplus cell to replace one of said ROM cells, said surplus cell being irreversibly programmable to conductive logic state by the application of programming bias voltage across its transistor and associated resistor to establish a highly conductive condition for the resistor, and being representative of the non conductive logic state with the resistor intact at high resistance due to the absence of any application of programming bias voltage.