1. An antifuse disposed within an integrated circuit device, said antifuse comprising: a first metallization layer disposed within the integrated circuit device; an insulating antifuse layer disposed over said first metallization layer; a layer of amorphous silicon disposed over said insulating antifuse layer; a dielectric layer disposed over said layer of amorphous silicon; a via completely penetrating said dielectric layer; said via partially penetrating said amorphous silicon layer; a layer of titanium metal disposed within said via and reacted with said layer of amorphous silicon to form a region of titanium silicide extending vertically substantially all of the way through said layer of amorphous silicon; and a second metallization layer in electrical contact with said region of titanium silicide.