1. A method comprising: configuring an emulator to emulate a circuit design that is associated with a main memory, wherein the main memory is being modeled by one or more computing devices in communication with the emulator; configuring the emulator to emulate a cache memory that provides a subset of data stored by the main memory; performing, using the emulator, a part of an emulation process for emulating the circuit design; and during the part of the emulation process; updating stored values in the cache memory to synchronize the subset of the data between the cache memory and the main memory, responsive to determining that a power domain associated with the main memory is powered down, setting one or more values in the cache memory to indicate that the subset of data is corrupted, and based on determining that the circuit design is to perform a first read or write operation to the main memory, accessing the cache memory and determining whether the one or more values indicate that the subset of the data is corrupted.