1. A control and interconnection system for integrating a plurality of peripherals into a computer system having a reconfigurable processing environment comprising: a system core for processing data, an input module adapted to couple signals from associated peripherals to said system core and an output module adapted to direct signals from said system core to corresponding peripherals, wherein said system core comprises: a reconfigurable space for offloading at least some peripheral processing requirements to said system core, said reconfigurable space having hardware for supporting reconfigurable hardware programming and memory for supporting reconfigurable software programming of peripheral-specific or application-specific functionalities that are not related to system core processes; a supervising processor operatively configured to: provide control information to at least one peripheral associated with said control and interconnection system to coordinate performance characteristics of multiple peripherals based upon at least one determined operating condition; control the allocation of said reconfigurable space into a plurality of independent information processing workspaces, where each information processing workspace is defined by at least one of an allocated portion of said hardware for supporting reconfigurable hardware programming and an allocated portion of said memory for supporting reconfigurable software programming; and control the configuration of each allocated information processing workspace based upon programming instructions that implement peripheral defined functionalities; a general purpose processor for interaction with said memory of said reconfigurable space and for executing functions of said system core; and a peripheral controller arranged to direct the flow of information in said control and interconnection system by communicating data between said input module, said output module, and at least one of said reconfigurable space and said general purpose processor, wherein select input signals at said input module are associated with their associated information processing workspace in said reconfigurable space of said system core.