1. A computing system comprising: an interface configured to receive program code, wherein the program code includes one or more instructions that are vectorizable or have been vectorized, wherein a vectorized instruction is a P-wide vector instruction including operands which correspond to P lanes of single-instruction-multiple -data (SIMD) execution; a vectorization unit; and a processor configured to: perform a time-based simulation of instructions of the program code; suspend execution of the time-based simulation, in response to detecting a region of vectorized or vectorizable instructions in the program code; switch to a functional-based simulation of instructions of the program code and serially execute instructions in the region for at least two iterations using the functional-based simulation; store each checkpoint state generated between iterations of the at least two iterations; and resume the time-based simulation, in response to determining no memory dependencies exist within any two iterations of the at least two iterations.