1. A method of implementing a user design on a configurable integrated circuit (IC), said method comprising: a) receiving said user design wherein said user design comprises a plurality of user design memory blocks; b) mapping a first user design memory block of said plurality of user design memory blocks to a first set of addresses of a physical memory; c) mapping a second user design memory block of said plurality of user design memory blocks to a second set of addresses of said physical memory, wherein said first set of addresses does not overlap with said second set of addresses; d) mapping a first user design memory port to a first subcycle and a memory port of said physical memory; and e) mapping a second user design memory port to a second subcycle and said memory port of said physical memory.