1. In a general purpose computer having specialized functional units for parallel execution of instructions utilizing an instruction cache with one or more directories for parallel access to instructions issued to the functional units simultaneously, the instruction cache comprising: instruction cache lines each having a plurality of instruction cache fields coupled to respective functional units for controlling the functional unit to perform a specialized function; instruction dispatch means for loading the fields with instructions fetched from a main memory of the computer, said dispatch means decoding a portion of the instruction to determine the field into which the instruction is loaded, the dispatch means loading a first instruction on the line into a respective field according to the functional unit the instruction requires, the dispatch means loading additional instructions into respective fields on the line according to predetermined criteria; each line being addressable by the address of the first instruction only and having an address field pointing to an instruction to be executed after completion of the instruction sequence in the current line.