1. A method for processing a first instruction form and a second instruction form of an instruction set in a processor comprising the steps of: storing a plurality of instructions of the second form in a plurality of buffers proximate to a plurality of execution units; executing at least one instruction of the first instruction form in response to a first counter; and executing at least one instruction of the second instruction form in response to at least a second counter, wherein the second counter is invoked by a branch instruction of the first instruction form.