1. A computing platform, comprising: a non-volatile memory having a firmware boot program; and a CPU to execute the firmware boot program when the CPU is reset, the firmware boot program including instructions to create Power and Performance Management (PPM) interface data structures including an error injection table structure to provide error injection services to an Operating System (OS), wherein the PPM interface data structures are associated with a PPM interface which comprises PPM registers, PPM firmware components, and PPM tables, and wherein the PPM interface is to implement a platform control channel (PCC) to communicate with PPM functionality of the OS and PPM hardware features, wherein the OS is configured to: execute a first action to determine an error injection capability of a platform, receive a first response that includes a first error injection table of the error injection table structure, the first error injection table identifying one or more standard error types supported by the platform and at least one platform defined error type supported by the platform, choose, for injection, a first error type from among the one or more standard error types and the at least one platform defined error type, and execute a second action to instruct the platform to begin an error injection operation using the first error type.