1. A memory construction apparatus that constructs logical memories in designing an integrated circuit, comprising: a logical memory construction-processing section that reads several kinds of physical memories and registers prepared in advance as libraries, generates candidates for each logical memory, by combining only the physical memories or only the registers, or both the physical memories and the registers, so as to construct the logical memory that satisfies a logical condition defining a memory space, and selects highest priority candidates for the logical memories from the candidates according to priorities; an optimum construction extraction-processing section that extracts optimum logical memories satisfying the respective logical conditions from the highest priority candidates such that a limit number of usable physical memories and a limit number of usable registers are satisfied; and a circuit description-processing section that describes a circuit using the physical memories and the registers that construct each of the extracted optimum logical memories, to thereby generate a circuit description file.