1. A programmable compute system for executing an h.264 binary decode symbol instruction comprising: a first compute unit including a first range circuit responsive to the current rLPS current range and current value for calculating MPS and LPS range values and setting a first flag to select one of them; a range normalization circuit, responsive to the selected one of said MPS and LPS range values to provide normalized range; and a current rLPS circuit including a first look up table responsive to the state, said flag and said normalized range for generating the current context next rLPS; a second compute unit including a second range circuit responsive to the current rLPS range and value for calculating MPS and LPS range values and setting a second flag to select one of them; a value update circuit, responsive to the current value and the difference between the current range and current rLPS for calculating MPS and LPS value values and responsive to said second flag to select one of them; a value normalization circuit, responsive to said selected range value and said selected value value to provide the next value; and a current context update circuit responsive to current context MPS and state, for determining MPS and LPS state from a second look up table and selecting one of them in response to said second flag and generating an MPS and negated MPS bit and providing the next context MPS and state and the decode symbol; a third compute unit including a third range circuit, responsive to current rLPS, range and value for calculating MPS and LPS range values and setting a third flag to select one of them; a second range normalization circuit, responsive to the selected one of said MPS and LPS range values to provide normalized range; and a next new context rLPS circuit, responsive to the new context state and the normalized range to determine from a third look up table the next rLPS for the new context.