1. A semiconductor integrated circuit comprising: a bus; a memory connected to the bus; an arithmetic processing unit connected to the bus; a first DMA controller connected to the bus; and at least one functional block connected to the bus, the functional block including a functional macro which is configured to perform a process that realizes a given function, a second DMA controller which is configured to control data transfer between the memory and the functional macro, and an access condition setting unit which is configured to set an access condition regarding the DMA transfer between the memory and the functional macro.