1. A method of operating a processor, the processor comprising a rename map table (RMT) to store entries indicating assignments of physical registers to architected registers, each physical register having an associated physical register token and each architected register in an RMT entry having an associated architected register token, the method comprising: setting all architected register tokens in the RMT to a reset value in response to obtaining a potential pipeline flush instruction from a processor pipeline; in response to obtaining a producer instruction, where the producer instruction identifies an architected register as a target for a result of the producer instruction when executed: provided the architected register token associated with the architected register has a value equal to the reset value, assigning in the RMT a physical register indicated as free to the architected register and changing the value of the architected register token associated with the architected register to a value different from the reset value; and changing the value of the physical register token associated with the physical register to indicate the producer instruction; and allowing the producer instruction result to be written to the physical register assigned to the architected register in the RMT if the physical register token associated with the physical register has a value indicating the producer instruction.