1. A system, comprising: a memory array including a set of memory cells; a program circuit configured to apply a first set of programming pulses to the set of memory cells and apply one or more program verify pulses to the set of memory cells after a first delay from the application of the first set of programming pulses to the set of memory cells, the program circuit configured to apply a second set of programming pulses to the set of memory cells after a second delay from the application of the one or more program verify pulses to the set of memory cells; and a delay circuit configured to determine the first delay and the second delay based on a temperature associated with the set of memory cells.