1. A data processing method comprising the steps of: temporarily storing in a plurality of cache lines of a first level data cache data for manipulation by a central processing unit; controlling data transfers into and out of said first level data cache via a first level cache controller; temporarily storing in a plurality of cache lines of a second level data cache data for manipulation by said central processing unit; controlling data transfers into and out of said second level data cache via a second level cache controller; storing at said second level cache controller in a set of first memory attribute registers a plurality of memory access attributes for a corresponding address range of external memory including cacheability bits; and storing at said first level cache controller in a set of second memory attribute registers a copy of said cacheability bits of a corresponding one of said plurality of first memory attribute registers for said corresponding address range of external memory.