1. A task processing device comprising: a task control circuit that manages an execution state of a plurality of tasks executed in a plurality of processors; and a plurality of state registers each storing a processor ID of one of the plurality of processors that is an entity responsible for execution of a task of the plurality of a tasks, and state data of the task, wherein the state data comprises at least a READY state or a RUN state, wherein the task control circuit includes a determination circuit that identifies a state register from the plurality of state registers that stores a processor ID identical to a specified processor ID and identifies the state data of the task associated with the state register, wherein the one or more of the plurality of processors transmit a system call signal to the task control circuit when executing a system call instruction, and wherein, upon receipt of a first system call signal from a first processor of the plurality of processors, the task control circuit executes a task switch of the first processor by: inputting a processor ID of the first processor to the determination circuit as the specified processor ID; identifying a first task of the plurality of tasks being executed in the first processor by referring to processor management information wherein the processor ID of the first processor and a task ID of the first task being executed in the first processor are registered wherein the state data of the first task stored in a first state register of the plurality of state registers is the RUN state; identifying a second state register of the plurality of state registers storing a processor ID identical to the processor ID of the first processor and the state data of a second task of the plurality of tasks that is in the READY state by the determination circuit, and then selecting autonomously the second task to be executed by the first processor subsequently; saving process data of the first task from a processing register of the first processor into a predetermined storage area, and changing the state data of the first task from the RUN state to another state; loading process data of the second task into the processing register of the first processor; associating the processor ID of the first processor with a task ID of the second task in the processor management information; and changing the state data of the second task from the READY state to the RUN state, thereby executing the second task by the first processor.