1. A hardware debugging apparatus for a software-pipelined program, the hardware debugging apparatus comprising: a predicate setter configured to set a trigger iteration count value based on an iteration count and an execution block difference, in response to a trigger event occurring; and a predicate early generator configured to generate a predicate in advance for an execution block based on the trigger iteration count value, in response to execution of a processor restarting, wherein the execution block difference indicates a difference between an execution block in which the trigger event occurs and the execution block that has the predicate generated in advance.