1. A processing system, comprising: a processing core to execute a virtual machine managed by a virtual machine manager; and an address validation circuit operatively coupled to the processing core, to: determine, based on a page table entry, a tentative guest physical address corresponding to a guest virtual address, responsive to successfully identifying, in an address validation data structure, an entry referenced by the guest virtual address, validate the tentative guest physical address using the entry referenced by the guest virtual address, responsive to failing to identify the entry referenced by the guest virtual address, analyze a flag comprised by an extended page table entry mapping the tentative guest physical address to a host physical address, and responsive to determining, based on a value of the flag, that the entry of the address validation data structure is required, and the entry does not exist, signal an exit to a second application.