1. An integrated circuit comprising: a differential circuit comprising: a current mirror circuit formed in at least one front end of line (FEOL) device level of the integrated circuit, wherein the current mirror circuit comprises a first circuit branch and a second circuit branch that are coupled in parallel with one another, a first transistor and a second transistor formed in at least one FEOL device level of the integrated circuit, wherein the first and second transistors are respectively coupled in series with the first and second circuit branches of the current mirror circuit, the first transistor has a control gate electrode coupled to a noninverting input node, and the second transistor has a control gate electrode coupled to an inverting input node, an output node between the second circuit branch of the current mirror circuit and the second transistor, a first programmable resistive element formed in at least one back end of line (BEOL) wiring level of the integrated circuit, wherein the first programmable resistive element is coupled in series with the first transistor and the first circuit branch, and a second programmable resistive element formed in at least one BEOL wiring level of the integrated circuit, wherein the second programmable resistive element is coupled in series with the second transistor and the second circuit branch.