1. An apparatus for computing a max4 function comprising: a three input arithmetic logic unit having three inputs and an output, said three input arithmetic logic unit selectively configurable to perform the following combinations of three input operands a, b and c (a+b+c), (a+b−c), (a−b+c) and (a−b−c) and generate a corresponding Result at said output; register set having four registers connected to said output of said three input arithmetic logic unit storing four respective outputs; and a maximum selection circuit having four inputs connected to corresponding registers of said register set and an output, said maximum selection circuit selecting a signal at one of said four inputs having a maximum value for output at said output.