1. (New) A processor comprising: a virtual memory addressing unit; a data path; a register file comprising a plurality of registers coupled to the data path; an execution unit coupled to the data path, the execution unit capable of executing group floating-point operations in which multiple floating-point operands stored in partitioned fields of one or more of the plurality of registers are operated on to produce catenated results, wherein an elemental width of the floating-point operands is equal to or less than a width of the data path.