1. Within a computer-based Electronic Design Automation (EDA) tool executing within a computer, a method of macro inference comprising: translating a hardware description language (HDL) template into a macro template using an elaboration process of the EDA tool; translating a circuit design into a format corresponding to the macro template using the elaboration process of the EDA tool; matching, using the EDA tool, a portion of the translated circuit design with the macro template; replacing the portion of the circuit design matching the macro template with a macro associated with the macro template using the EDA tool, wherein an updated circuit design is generated; and storing the updated circuit design.