1. A method comprising: generating a branch node graph, by a branch node graph generator machine logic set, based, at least in part, upon a set of branch traces; generating a first assembly pattern file, for use with a first instruction set architecture (ISA)/microarchitecture set, by an assembly pattern generator machine logic set, based, at least in part, upon the branch node graph; and running the assembly pattern file on the first ISA/microarchitecture set to obtain first execution results.