1. A method of operating a microprocessor, comprising the steps of: first, receiving a plurality of instructions arranged in a sequence from a first instruction through a last instruction; second, identifying a branch instruction as one of the plurality of instructions, wherein the branch instruction has a target instruction address; third, determining for the branch instruction: a prediction value indicating whether or not program flow should pass to the target instruction address; and an accuracy measure indicating accuracy of past ones of the prediction value; fourth, identifying a data fetching instruction following the branch instruction in the plurality of instructions; and fifth, issuing a prefetch request for the data fetching instruction in response to the accuracy measure.