1. An apparatus for bit manipulation comprising: at least one input register within a computer processor; at least one output register within the computer processor; an input module configured to provision at least one unit of input data to the at least one input register; a data provisioning module configured to provision control data, wherein the control data is configured to provide information necessary to: partition the at least one unit of input data into a plurality of bit fields, where a length of a bit field is determined based on a capability of each bit in the bit field to be manipulated according to a common manipulation rule to achieve a particular result, and manipulate the plurality of bit fields in accordance with at least one manipulation rule to accomplish the particular result; an implementation module configured to: partition the at least one unit of input data into the plurality of bit fields in accordance with the control data, and manipulate each bit field in accordance with the control data to achieve the particular result in the at least one output register.