1. A host device comprising: one or more processors; a command queue interface executing on the one or more processors and configured to place a plurality of commands into a command queue in response to receiving one or more enqueue instructions from a process executing on the host device, the plurality of commands including a first command instructing the host device to transfer data between a first memory space associated with the host device and a second memory space associated with a graphics processing unit (GPU), the plurality of commands further including a second command instructing the host device to initiate execution of a task on the GPU; and a message passing interface executing on the one or more processors and configured to pass one or more messages between the process executing on the host device and a task executing on the GPU while the task is executing on the GPU and in response to receiving one or more message passing instructions from the process executing on the host device.