1. A data transfer system for accomplishing data transfers in an information processing system, said data transfer system comprising: a peripheral device; a first controller selectively coupled to said peripheral device; a memory unit; a primary bus; a secondary bus connected between said peripheral device and said memory unit, said secondary bus being separate from said primary bus; and a second controller connected to said first controller through said primary bus, said second controller being coupled to said memory unit, said second controller being selectively operable for controlling data transfers directly between said peripheral device and said memory unit over said secondary bus, said first controller being responsive to a data transfer request signal from said peripheral device for initiating a transfer cycle with said second controller, said second controller being responsive to said transfer cycle to selectively enable a data transfer directly between said memory unit and said peripheral device over said secondary bus, said second controller being operable to assert a transfer complete signal after said peripheral device acknowledges receipt of a transfer address, said transfer complete signal being operable to effect a release of said primary bus prior to a completion of said data transfer over said secondary bus.