1. A method for facilitating deduplication product testing in a computing environment by a processor in communication with a memory device, comprising: arranging data to be processed through the deduplication product testing into a single, continuous stream; applying at least one of a plurality of random modifications to the arranged data in a self-similar pattern exhibiting scale invariance; mapping a plurality of randomly sized subsets of the arranged data modified with the self-similar pattern into each of a plurality of randomly sized deduplication test files; and calibrating the plurality of randomly sized deduplication test files against input/output (I/O) trace data obtained in the computing environment.