1. A software development system for debugging software on a target system having a plurality of processors configured with shared memory, comprising: a setup utility that receives user input to define a hardware configuration of the target system; an initialization process that receives the hardware configuration information from the setup utility and creates a software memory map of the target system, loads drivers for each of the plurality of processors, activates a first debug session associated with a first processor of the plurality of processors and activates at least a second debug session associated with a second processor of the plurality of processors wherein each debug session is operable to transmit read requests and write requests to its associated processor; and a software memory bus that performs processing of shared memory access requests.