1. A method comprising: accessing a memory resource, not stored in a linear way, stored in a graphics processor in a graphics processor-specific format, using an application running on a central processing unit wherein a graphics processor specific format uses interleaved X and Y address bits and supports tiled resources to map portions of the memory resource to process virtual addresses; and performing swizzling translations of the graphics processor-specific format not using a linear array on said central processing unit so that said central processing can directly access said graphics processor-specific format using a linearization page table walk to map a virtual address to a virtual page that contains swizzled data; and supporting tiled resources by using an additional page table walk after the linearization on page table walk.