1. A Boolean logic device comprising: at least two SymFETs, with each of the at least two SymFETs including a top gate, a back gate, an insulator, a first graphene layer, a second graphene layer, a first oxide layer, and a second oxide layer, the insulator being disposed between the first and second graphene layers, the first and second graphene layers being disposed between the first and second oxide layers, the first and second oxide layers being disposed between the top and back gates, wherein conductivity of each of the at least two SymFETs is controlled at least in part by a first voltage supplied to the top gate and a second voltage supplied to the back gate; wherein the at least two SymFETs are configured in at least one of a parallel or series circuit arrangement such that input voltage is transformed to an output voltage.