1. A circuit comprising: at least one set of inputs from a first power supply domain; at least two cross coupled field effect transistors (FETs) connected to a second power supply domain, wherein the at least two cross coupled FETs are pFETs; a true logic gate connected to the first power supply domain and the at least two cross coupled FETs, wherein the true logic gate is comprised of at least one nFET and configured to generate a logic function based on the at least one set of inputs; and a complementary logic gate connected to the first power supply domain and the at least two cross coupled FETs, wherein the complementary logic gate is comprised of at least one nFET and configured to generate a complement of the logic function based on the at least one set of inputs, wherein the pFETs and nFETs are thin-oxide FETs.