1. A digital circuit design assist system for designing a desired digital circuit consisting of a plurality of hardware units and at least one firmware unit for controlling said digital circuit as a unit, said system comprising: a functional model storage unit for storing each functional model functionally expressing each of said hardware units by a hardware description language through a text editor by coding input; a logic synthesis means for converting said functional model into a structural model structurally expressed by said hardware description language; a structural model storage unit for storing said structural model; a language model library storage unit for storing a language model expressing each of a plurality of components constituting each of said hardware units by said hardware description language; and a hardware description language simulation means for verifying whether or not the logic of each said hardware unit is correct with regard to said functional model, said structural model and said language model, via a test model which supplies a test pattern to each of said functional models and each of said structural models, and receives outputs from the models to verify the behaviors of the models.