1. A microprogrammed control system comprising: a first memory for storing a microprogram having ordinary and branch instructions, the branch instruction including an operation code, a control code and an address, said first memory including an address input port; a second memory for storing instructions, which includes an address input port; an address register for storing an address of an instruction to be next executed, which includes an input port; address updating means for updating the address in the address register to a further next instruction; an instruction register for storing a currently executed instruction, which includes an input port; first means connected to the instruction register for generating a first signal when the instruction in the instruction register is the ordinary instruction and a second signal when the instruction is the branch instruction; second means connected to the first means and responsive to the first signal for transferring the instruction to be next executed which corresponds to the address in the address register from the first memory to the input port of the instruction register and for transferring the update address of the address updating means to the address input port of the address register; and third means connected to the first means and responsive to the second signal for transferring the branch address designated by the branch instruction into the address input port of the address register and for transferring an instruction designated by the control code of the branch instruction in the instruction register from the second memory to the input port of the instruction register, said branch address and said instruction from the second memory being stored in the address register and the instruction register in response to a clock pulse.