1. An input state detection circuit comprising: an input pin configured for receiving signals generated by a plurality of different types of input circuits; a state-detection circuit configured to provide an output characterizing the state of the input pin for a plurality of input states respectively corresponding to the plurality of different types of input circuits, the state-detection circuit having a plurality of comparators respectively having their high-level inputs directly coupled to the input pin, having their low-level inputs coupled between a power source and a ground node, and configured to provide a binary output that, when collectively processed with the binary outputs of the other comparators, indicates the state of the input pin, a resistor circuit connected in series between a first one of the comparators and the power source, for each pair of comparators having input pins connected in series, a resistor circuit connected therebetween, a resistor circuit connected between a last one of the comparators and the ground node; a negative-feedback operational amplifier having an output connected to the high-level input of the comparators, having a high-level input, a low-level input and a feedback circuit connecting the output to the low-level input; a resistor circuit connected between the high-level input of the negative-feedback operational amplifier and a feedback power source; and a resistor circuit connected between the high-level input of the negative-feedback operational amplifier and a feedback ground node.