1. A signal processor to process digital signals in a loop, the signal processor comprising: program memory to store a digital signal processing instruction within a loop; and a core processor including at least one signal processing unit to execute the digital signal processing instruction within the loop, and a pipe controller coupled to the program memory and the at least one signal processing unit, the pipe controller including a loop buffer to control the execution of the digital signal processing instruction within the loop, the pipe controller to read the digital signal processing instruction from the program memory and store it within the loop buffer, the at least one signal processing unit to execute the digital signal processing instruction within the loop from the loop buffer without rereading it from the program memory during execution of the loop.