1. A system comprising: a pattern-recognition processor; and a plurality of registers configured to store information related to the operational characteristics of the pattern-recognition processor, wherein the plurality of registers comprises: a first set of registers directly accessible by a device via a first address map; and a second set of registers, wherein the first and the second set of registers are directly accessible by the pattern-recognition processor via a second address map, wherein the device does not have direct access to the second address map, and wherein the second set of registers is indirectly accessible by the device via the first set of registers.