1. A target interface system for interfacing a hardware emulation system and a target system, comprising: target interface logic being distributed among a plurality of reconfigurable logic devices; and a memory structure that stores information associated with said target interface logic and being dividing into a plurality of hierarchical memory subspaces that organizes the information including at least one global memory that stores information associated with said target interface logic as a whole, at least one local memory subspace that stores information associated with a selected communication connection of said target interface logic, at least one dynamic memory subspace that stores information that can change with time, and at least one static memory subspace that stores information on a time-independent basis, wherein said memory structure thereby is flexibly extensible to support a predetermined number of said reconfigurable logic devices.