1. A universally accessible fully programmable memory built-in self-test (MBIST) system comprising: an MBIST controller including: an address generator configured to generate addresses for a memory under test; a sequencer circuit configured to deliver test data to selected addresses of said memory under test and reading out that test data; a comparator circuit configured to compare said test data read out of said memory under test to said test data delivered to said memory under test to identify a memory failure, and an externally accessible user programmable pattern register for providing a pattern of test data to said memory under test; and an external pattern programming device configured to supply a said pattern of test data to said user programmable pattern register.