1. A processor test apparatus that tests a processor, the apparatus comprising: a code obtaining unit that executes a test instruction of a test instruction sequence for testing the processor, and obtains a condition code set by a condition code setting instruction of the test instruction sequence; an instruction adding unit that produces a condition branching instruction branching to an error output instruction when a condition code that does not match the obtained condition code is supplied, and adds the produced condition branching instruction to the end of the condition code setting instruction of the test instruction sequence; and an instruction executing unit that causes the processor to execute the test instruction sequence to which the condition branching instruction is added by an advanced control scheme.