1. An apparatus comprising: a plurality of vector partial distance computation circuits each to calculate a partial sum and an accumulated distance for a set of vectors in a search space; a minimum sort network to sort a selected set of bits from the accumulated distances that indicate a minimum of the selected sets of bits from the vectors in the search space and whether the minimum is unique; a global control circuit to receive an output of the minimum sort network and to control aspects of operations of the plurality of vector partial distance computation circuits.