1. A computer system implementing a software architecture, having a processor to execute instructions providing for controlled responses to occurrences of interrupts, said system comprising: a) first task means for performing a first function in response to an occurrence of an interrupt, said first task means having a first priority level that is one of a predetermined set of priority levels; b) interrupt server task means for performing a second function in response to the occurrence of said interrupt, said interrupt server task means having a second priority level that is between predetermined ones of the priority levels of said predetermined set of priority levels, said second priority level being higher than said first priority level; and c) kernel means for selecting one of a schedulable set of tasks for execution by the processor based upon the relative priority levels of said schedulable set of tasks, said kernel means, responsive to said interrupt, providing for disabling recognition of said interrupt by said kernel means and including said interrupt server task means in said schedulable set of tasks in response to said interrupt, said server task means including means for including said first task means in said schedulable set of tasks.