1. A gated microelectronic device comprising: a source with a source ohmic contact having a source dopant type and a source dopant concentration and deforming a source linear extent and a source thickness; a drain with a drain ohmic contact having a drain dopant type and drain dopant concentration and defining a drain linear extent and a drain thickness a channel portion intermediate between said source and said drain, said channel portion having a channel portion dopant type and channel portion dopant concentration and defining a channel portion linear extent and a channel portion thickness; said channel portion having a dimension normal to the gate suitable to fully deplete in an off-state; an insulative dielectric in contact with said channel portion; a gate overlying said insulative dielectric; a gate contact applying a gate voltage bias to control charge carrier accumulation and depletion in said channel portion; the source dopant, the drain dopant, and the channel portion dopant are all of a same type