1. A programmable logic device comprising a plurality of logic array blocks, each of the logic array blocks including: a plurality of logic elements; and a plurality of LAB line circuits, each of which LAB line circuits can select only a LAB line signal from any of a plurality of signal sources that are connected to inputs of that LAB line circuit and that include some signal sources that are external to the logic array block that includes that LAB line circuit, and each of which LAB line circuits makes its LAB line signal available only for selection as an input to any of the logic elements in the logic array block that includes that LAB line circuit, each logic array block being without any local feedback lines that are dedicated to making an output signal of a logic element in the logic array block available for selection as an input to any of the logic elements in that logic array block without passing through a LAB line circuit of that logic array block, wherein each of the logic array blocks further includes: a dedicated connection from an output of a logic element in the logic array block to an input of at least two of the LAB line circuits of that logic array block, the dedicated connection being without any switching in its path all the way from the output of the logic element to the input of the at least two of the LAB line circuits.