1. A system comprising: a memory; one or more processors, coupled to the memory; a virtual machine executing on the one or more processors; and a hypervisor executing on the one or more processors to: activate a trap to the hypervisor prior to an execution of an instruction that loads an interrupt data structure on the virtual machine; read the interrupt data structure on the virtual machine; determine based on reading the interrupt data structure that the interrupt data structure points to an alternate page view; and responsive to determining that the interrupt data structure points to an alternate page view, disable a virtual machine function.