1. A method for performing a temporary processor mode context switch between a first mode and a second mode in a multi-mode architecture computer system (the “computer system”), said method comprising: establishing a “virtual=real” page (the “switch page”) where a virtual address used for said page is also a real memory address for said page; copying a set of transition code for performing a processor mode context switch to the switch page; jumping to the switch page for continued execution; disabling the memory management unit (MMU) of the computer system; modifying the mode control register to set a context bit from said first mode to said second mode; loading a new page table for said second mode; and reactivating the MMU of the computer system.