1. A parallel computer comprising: A. a plurality of processing elements each for processing data in response to commands, each processing element generating a global signal in response to selected conditions during processing, said processing elements further generating messages for transmission to other processing elements in response to selected commands, each message including an address of a destination processing element to receive the message; B. an interconnection network for receiving messages from the processing elements and for transferring them to destination processing elements in response to their respective addresses; C. plurality of host computers each for generating commands for controlling the processing of data and the generation of messages by the processing elements; and D. an interconnector including: i. a command distribution portion connected to said hosts and said processing elements, said command distribution portion being controlled to selectively establish one or more processing element partitions each comprising a selected disjoint plurality of said processing elements and to further selectively assign a said host computer to a processing element partition, said command distribution portion enabling commands from the host computer assigned to the processing element partition to control the processing elements of the processing element partition while the processing element partition is established; and ii. a global signal combiner portion for generating, for each processing element partition, a combined global signal representative of the global signals from the processing elements comprising the processing element partition and enabling the combined global signal to be provided to control processing by the processing elements.