1. A semiconductor device comprising: a multiplicity of logic blocks, and metal and via connection layers overlying the multiplicity of logic blocks for providing at least one permanent customized interconnect between various inputs and outputs thereof, wherein said customized interconnect is customized by a custom via layer; wherein said logic blocks include a logic array, said logic array including a multiplicity of logic cells, and at least one of: a multiplicity of device customized I/O cells, wherein said customized I/O cells are customized by said custom via layer; and a configurable RAM block, and wherein said RAM block configuration is customized by said custom via layer.