1. A method comprising: converting, by a computing device comprising one or more processors, program code into an intermediate representation comprising instructions for execution by a central processing unit (CPU); determining, by the computing device, one or more candidate memory references associated with an L1 data cache for storage in a tagless access buffer (TAB), the determination based at least in part on analysis of the instructions for the program code; and allocating, by the computing device, at least a portion of the one or more candidate memory references in the TAB.