1. A fault tolerant computer system comprising: a) multiple CPUs each having an independent clock and executing the same instruction stream in accordance with said independent clock, each CPU employing virtual memory addressing with paging; b) each CPU having a separate local memory, each said local memory being accessed only by one said CPU and not by other of said multiple CPUs, said access occurring without said CPU being subjected to access time overhead due to said CPU being voted and synchronized, each one of said local memories containing a first set of selected pages; c) a global memory accessed by all of said CPUs, said local memory for each CPU having faster access time than the global memory, the global memory containing a second set of selected pages different from said first set, and said second set being page-swapped with said first set in each said local memory upon demand so as to maintain identical most-used pages in each said local memory of each CPU, said demand being initiated by an aging routine to mark candidate pages that are not recently used in said local memory; and d) a disk memory accessed as an I/O device by said multiple CPUs and having an access time slower than said global memory, the disk memory containing pages in an address space of said virtual memory addressing of said multiple CPUs, and said pages contained in said disk memory being page-swapped with said global memory and local memory upon demand by said multiple CPUs.