1. A system comprising: a first fault register to store information associated with a faulting micro-operation relating to a non-prefetch memory access operation; a second fault register to store information associated with a faulting micro-operation relating to a prefetch memory access operation; and a first unit to determine whether a currently pending micro-operation (micro-op) relates to a non-prefetch operation or a prefetch operation, wherein said first unit drops said currently pending micro-op from a pipeline if (1) said currently pending micro-op relates to a prefetch memory access and (2) said currently pending micro-op has previously faulted.