1. A superscalar microprocessor capable of processing at least two program instructions at the same time and disposed on a single semiconductor integrated circuit, said superscalar microprocessor comprising: a plurality of registers storing a plurality of operands; an instruction issue control; a first set of independent processing logic circuits capable of performing a first set of functions, said first set of independent processing logic circuits being coupled to said instruction issue control to receive a first program instruction and being coupled to said plurality of registers to receive at least a first operand; a second set of independent processing logic circuits providing a second set of functions, wherein said first set of functions and said second set of functions are identical, said second set of independent processing logic circuits being coupled to said instruction issue control to receive a second program instruction and being coupled to said plurality of registers to receive at least a second operand.