1. A method, comprising: receiving an operating mode that specifies an operating mode for a multiplication operation, wherein the operating mode is one of a 32-bit floating-point mode and a dual 16-bit floating-point mode; determining, based on the operating mode, nine recoding terms for a mantissa of at least one floating-point input operand; computing, by a dual-mode multiplier array circuit that is configurable to generate partial products for either one 32-bit floating-point result or for two 16-bit floating-point results, the partial products based on the nine recoding terms; and processing the partial products to generate an output based on the operating mode.