1. A programmable integrated circuit, comprising: a plurality of interconnected logic blocks, each of the logic blocks comprising: a logic circuit having an input coupled to an input of the logic block, and further having first and second outputs; and an output multiplexer circuit comprising an arbiter coupled to receive ready signals provided with the first and second outputs of the logic circuit, and a first multiplexer having first and second data inputs respectively coupled to the first and second outputs of the logic circuit, a select input programmably coupled, in one of a plurality of operating modes of the output multiplexer circuit, to an output of the arbiter, and a data output coupled to a first output of the logic block.