1. A method of configuring an integrated circuit device using a high-level language, said method comprising: using a software tool on a processor, parsing a logic flow to be embodied as circuitry in said integrated circuit device, wherein said parsing further comprises: identifying a first invariant logic flow in a first level of a plurality of ranked levels of thread hierarchy of said logic flow, wherein each level of the plurality of ranked levels comprises at least one thread and the first invariant logic flow in the first level is invariant with respect to the first level; identifying a second invariant logic flow in a second level of the plurality of ranked levels, wherein the second invariant logic flow in the second level is invariant with respect to the second level; converting said first invariant logic flow in the first level and said second invariant logic flow in the second level into separate instruction blocks, each of the separate instruction blocks to be embodied as separate circuitry; incorporating said separate instruction blocks into a high-level language representation of a configuration of resources of said integrated circuit device; and compiling said high-level language representation to configure said integrated circuit device.