1. A processor comprising: a prefetch unit comprising a prefetch buffer, wherein the prefetch buffer comprises a plurality of entries, and wherein each entry of the plurality of entries is configured to store data describing a different prefetch stream, and wherein the prefetch unit is programmable by software executed on the processor to limit a first number of the plurality of entries that are concurrently in use to less than a total number of the plurality of entries, and wherein the first number is greater than zero; and a data cache coupled to the prefetch unit, wherein the prefetch unit is configured to generate prefetch requests responsive to the prefetch streams to prefetch data in to the data cache.