1. A computer-implemented method for evaluating, by a circuit evaluator operating via one or more processors, a circuit design having a compact representation of waveforms without simulating individual waveforms, the method comprising: determining, by the circuit evaluator operating via the one or more processors, a first mapping associated with a first instance of a first module of a register level circuit design and a second mapping associated with a second instance of the first module, wherein the first mapping is for mapping a first input sequence of signal transition representations received by the first instance to a common sequence of signal transition representations, and the second mapping is for mapping a second input sequence of signal transition representations received by the second instance to the common sequence; determining, by the circuit evaluator operating via the one or more processors, whether the first instance and the second instance have shared usage, wherein the shared usage is associated with a result sequence of signal transition representations that was generated by a previous propagation of the common sequence through the shared usage, and each signal transition representation represents a non-deterministic transition from a previous signal state to a set of one or more possible signal states; and in response to determining that the first instance and the second instance have the shared usage, mapping, by the circuit evaluator operating via the one or more processors, the result sequence of signal transition representations to an output sequence of signal transition representations for the second instance using the second mapping.