1. A semiconductor device comprising: a plurality of logic cells interconnected using via connections between routing tracks that are disposed among a plurality of layers, wherein said logic cells comprise: at least two three-input look-up tables; at least one two-input look-up table; a flip-flop; and wherein the look-up tables are interconnected so that any one look-up table can drive at least one input of at least one other look-up table and the flip-flop is connected to the look-up tables so that any look-up table can drive an input of the flip-flop.