1. A layout process comprising: identifying with a computer a group of circuit structures in a description of a circuit, wherein the circuit structures in the identified group are subject to a layout constraint in a constraint hierarchy associated with the description of the circuit, wherein at least a portion of the constraint hierarchy is defined by a user; identifying a set of layout constraints in the constraint hierarchy that applies to one or more of the circuit structures in the identified group; and placing and routing the identified group of circuit structures in a layout of the circuit, wherein the set of layout constraints are used to determine placement and routing for the identified group of circuit structures.