1. An apparatus comprising: replay logic to receive a recording, from a recording system, of a first software thread running a first macro-instruction, and a second software thread running a second macro-instruction, wherein the first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device, wherein the recording system to record interleavings between the first and second macro-instructions, wherein the replay logic is further to correctly replay the recording of the interleavings of the first and second macro-instructions precisely as they occurred, wherein correctly replaying includes replaying a local memory state of the first and second macro-instructions and a global memory state of the first and second software threads; and maintenance logic to maintain the information and allowing the replay logic to correctly replay the recording of the interleavings, wherein the recording is produced by the recording system and provided to the replay logic via one or more of hardware recorded log files, program binary, and a virtual machine (VM), wherein correctly replaying the recording having the interleavings comprises precisely reproducing each micro-instruction at a precise stage including enforcing the local memory state of the first macro-instruction or the second macro-instruction experiencing the instruction atomicity violation and the global memory state as observed by the first and second software threads, wherein the instruction atomicity violation is caused by an interleaving in one or more micro-instructions of the first macro-instruction with the second macro-instructions, wherein the recording system includes a hardware-based memory race recording (MRR) system using chunks, wherein a chunk refers to a logical grouping of multiple, sequential instructions from a single software thread including the first software thread or the second software thread, and wherein the chunk comprises a package chunk including encoding to provide information relating to a state of the first macro-instruction or the second macro-instruction, wherein the encoding includes a standard reference field (NTB) and an extended NTB, wherein the standard NTB includes a 16-bit NTB encoding, and wherein the extended NTB includes an NTB encoding that is greater than 16-bit NTB encoding.