1. A system for renaming source registers of instructions to be executed in a microprocessor, the system comprising: an instruction window comprising a plurality of storage locations each of which stores a single instruction that may be issued during a single processor cycle, wherein only a subset of the plurality of storage locations may be filled with new instructions in a single processor cycle; and a plurality of register renaming circuits, wherein each of the plurality of register renaming circuits is uniquely associated with a storage location in the subset of the plurality of storage locations and configured to determine if a new instruction stored in the corresponding storage location is dependent on any older instructions in the instruction window and to output a renamed source register address for the new instruction if such a dependency exists.