1. An apparatus comprising: a first region of logic; a second region of logic for configuring between a first logic design and a second logic design; and a first port for receiving at least one signal from the second region of logic and providing the signal to the first region of logic, wherein the first logic design includes a first probe point associated with a first node of the first logic design, the second logic design includes a second probe point associated with a second node of the second logic design, and a signal associated with the first or second nodes provided to the first port based on the logic design configured in the second region of logic.