1. An apparatus comprising computer hardware for use in generating paths for electrically conductive traces within a routing space comprising: means for receiving computer readable information representing a proposed physical layout of a routing space of an electronics system including locations of a first electronic component, a second electronic component, and obstacles within said proposed physical layout; means for creating an initial array of nodes within the proposed physical layout; means for adjusting within said proposed physical layout said initial array of nodes, said means for adjusting include locating a particular number of nodes between a pair of said obstacles, said particular number corresponding to a maximum number of traces that can pass between said obstacles, each of said nodes positioned between said pair of said obstacles representing a possible location of one of said traces that can pass between said obstacles; means for applying forces to ones of said nodes, wherein a magnitude of one of said forces applied to one of said nodes is proportional to a proximity of said one of said nodes to one of said obstacles; means for moving within said proposed physical layout each of said ones of said nodes in accordance with said forces applied to said one of said nodes; and means for creating a computer generated representation of a trace within said proposed physical layout of said routing space that connects the first electronic component to the second electronic component and passes between said pair of obstacles by selecting a path through said adjusted array of nodes, said trace comprising said path.