1. A microprocessor, comprising: a plurality of registers; and an instruction execution module, which is adapted to process a sequence of conditional tests, using an instruction set that comprises the following instructions: a test-and-condition instruction, which evaluates each of the conditional tests as true or false and responsive thereto sets respective values in the registers; a priority-test-branch instruction, which causes the instruction execution module, responsive to one of the conditional tests evaluating as true and to the respective values in the registers, to execute a priority code module; and a combination-test-branch instruction, which causes the instruction execution module, responsive to evaluations of the conditional tests and to the respective values in the registers, to execute a combination code module.