1. A content-addressable-memory device comprising: a plurality of content-addressable-memory sub-arrays that simultaneously perform a parallel comparison between a plurality of data sequences arranged in a row direction of memory cells storing three values of “1”, “0”, and “X” and a search data sequence input from outside, and outputs a result of the comparison for each of the data sequences; and a plurality of priority encoders that are provided in a one-to-one relation with each of the content-addressable-memory sub-arrays, and perform a processing for remedying a defect that occurs in the content-addressable-memory sub-arrays or the priority encoders in a process of receiving a result of the comparison for each of the data sequences, determining an address to be output by priority when the data sequences match in a plurality of addresses, and encoding the address.