1. A method for designing video processing architecture in accordance with a video processing a particular specification, comprising: generating a function graph that graphically represents criteria of the specification, the function graph having input from an external source and providing output to an external target, and including a plurality of functional nodes each for performing a specific data processing function, one or more data elements input to and/or output from a functional node, inter-node communication between the functional nodes, and control information provided by a functional node to control another functional node or inter-node-communication; generating a hardware architecture design for a video processing application; comparing the hardware architecture design to the function graph to determine if the design complies with the function graph; and in response to determining the hardware architecture design complies with the functional graph, providing a final architecture for register transfer level (RTL) implementation.