1. A method for characterizing an integrated circuit design, the method comprising: receiving a description of one or more leaf cells; describing the integrated circuit design in a high-level language using the description of the one or more leaf cells, wherein the description of the integrated circuit design includes specifying placement of the one or more leaf cells, and specifying connectivity between the one or more leaf cells; developing a physical layout design based on the high-level language description; extracting a critical path of the physical layout design; extracting a circuit netlist file based on the extracted critical path; defining instructions in the high-level language to perform one or more simulations on the circuit netlist file; performing the one or more simulations on the circuit netlist file, wherein the one or more simulations are performed to determine one or more values for one or more design parameters; and providing the one or more values for the one or more design parameters in a pre-defined output format based on the one or more simulations.