1. In a data processing system (DPS) comprising a microprocessor, a system bus and a memory connected to said microprocessor, via said system bus, for storing system tables and instructions to be executed by said microprocessor; said microprocessor being operable in a first addressing mode and a second addressing mode comprising an execution unit having a plurality of execution unit registers, a prefetch queue for storing prefetched instructions, a code selector register, and an instruction pointer register and at least one settable control register for selecting the addressing mode under which the microprocessor operates; a method for operating said DPS system comprising steps of: (a) initializing said system tables, (b) flushing instructions from said prefetch queue during a first time period, said first time period occurring immediately after step (a), which instructions had been prefetched prior to said first time period; (c) executing at least one instruction after step (b); (d) after the first time period and while said one instruction of step(c) is being executed, fetching instructions for sequentially performing the following steps: (d) (1) setting the control register to select one of the addressing modes; (d) (2) flushing prefetched instructions from said prefetch queue during a second time period occurring after the first time period, and (d)(3) setting said code selector register and said instruction pointer register.