1. A method for translating instructions for a processor, comprising: accessing a guest instruction; performing a first level translation of the guest instruction using a first level conversion table; outputting a resulting native instruction when the first level translation proceeds to completion; performing a second level translation of the guest instruction using a second level conversion table when the first level translation does not proceed to completion, wherein the second level translation further processes the guest instruction based upon a partial translation from the first level conversion table; and outputting the resulting native instruction when the second level translation proceeds to completion.