1. A computer implemented method of performing dynamic load balancing in simulating a circuit, comprising: identifying a plurality of simulation tasks to be performed; determining estimated processing durations corresponding to performance of the plurality of simulation tasks; distributing the plurality of simulation tasks to a plurality of processors according to the estimated processing duration of each simulation task, comprising partitioning the plurality of simulation tasks into corresponding plurality of subtasks, storing the corresponding plurality of subtasks in a task queue, and distributing the corresponding plurality of subtasks from the task queue to the plurality of processors for processing in accordance with simulation times of the corresponding plurality of subtasks; and wherein partitioning the plurality of simulation tasks further comprising partitioning a model evaluation task into multiple model evaluation subtasks, partitioning a load matrix task into multiple load matrix subtasks, and partitioning a solve matrix task into multiple solve matrix subtasks; and performing the plurality of simulation tasks at the plurality of processors in parallel.