1. A neural device comprising: a plurality of processor elements for processing input signals and generating an output signal responsive to said processing, each processor element including a plurality of input lines and an output line; a local bus having a plurality of conductors, each conductor being connected to one of said processor element output lines; and a plurality of switch elements, each switch element selectively connecting a local bus conductor to one of said processor element input lines, said switch elements defining network connectivity; where each said switch element comprises a transistor having a gate for receiving a first voltage and a fuse for connecting said gate to a second voltage, where said transistor is set to an OFF state when an externally-generated status signal changes said fuse to an open state, and where said processor element generates an output based on integrated weighted signals which are input from said input lines, and said switch elements switch ON or OFF in accordance with said status signal, said network connectivity being reconfigured based on said switching of said switch elements.