1. A method for managing memory in a computer comprising: using known memory-address constraints to identify at least one input set of potentially conflicting memory addresses; and for each of the at least one input set of potentially conflicting memory addresses, and iteratively for each of the memory addresses in the at least one input set: loading a current memory address, belonging to the at least one input set, into a processor cache; detecting whether an eviction occurs from the processor cache as a result of the loading of the current memory address into the processor cache; if an eviction is detected: adding the current memory address to a conflict set of memory addresses; flushing the processor cache; and loading the conflict set into the processor cache; if no eviction is detected, determining whether all of the input set of potentially conflicting memory addresses has been loaded into the processor cache and, if not, loading a next one of the input set of potentially conflicting memory addresses into the processor cache; whereby the input set of potentially conflicting memory addresses is determined to be partitioned into a plurality of partitions such that memory addresses that conflict in the processor cache belong to the same partition, whereas memory addresses belonging to different partitions do not conflict in the processor cache.