1. A non-transitory computer readable storage medium with executable instructions to characterize a coherency controller, comprising executable instructions to define: ports to receive processor trace information from a plurality of processors, wherein the processor trace information from each processor includes a processor identity and a condensed coherence indicator derived as a function of a processor synchronization signal and a shared memory miss signal, wherein processor synchronization signals define synchronization frames, wherein within a single synchronization frame with multiple memory miss signals, the condensed coherence indicator is incremented only once per synchronization frame, in response to the first memory miss signal of the multiple memory miss signals; and circuitry to produce a trace stream with trace metrics and condensed coherence indicators.