1. A processing system, comprising: a processor, comprising: an interrupt pin; a plurality of registers configured to store a plurality of processor state values; a stack pointer; and an automatic interrupt system configured to, upon detection of a first interrupt on the interrupt pin, and in preparation for entering an exception mode, cause: a first interrupt vector to be fetched, the stack pointer to be updated, and the plurality of processor state values to be read in parallel from the plurality of registers and stored to a plurality of memory locations specified by the updated stack pointer, prior to execution of an interrupt service routine, wherein the reading in parallel from the plurality of registers and the updating of the stack pointer are completed in a same single cycle.