1. A computer system comprising: one or more processors which process program instructions; a memory device connected to said one or more processors; and program instructions residing in said memory device for verifying a design for an electronic device having at least one functional unit by receiving a set of generic transaction types having associated parameters to stimulate the functional unit, applying the set of generic transaction types to the functional unit in a first simulation environment using an abstraction layer to interface with a first translation layer of the first simulation environment, and applying the set of generic transaction types to the functional unit in a second simulation environment which is larger than the first simulation environment using the abstraction layer to interface with a second translation layer of the second simulation environment, the second translation layer being different from the first translation layer.