1. In a computer system including means for generating a sequence of instruction signals which represent program instructions for performing designated computer operations, some instruction signals having data address portions which represent the addresses at which data involved in the corresponding operations is stored, said instruction signals being stored in memory means in said computer system, the improvement for disguising said program instructions comprising: a data memory in said memory means, said data memory having address input conductors and data output conductors; means for storing in said data memory data signals representing quantities referred to in said program instructions at the addresses specified in said data address portions of said instruction signals; scrambler means for scrambling the data address portions of said instruction signals in accordance with a predetermined cipher key; an instruction memory in said memory means; means for storing said instruction signals including those with scrambled data address portions in said instruction memory; means for reading said instruction signals out of said instruction memory; an unscrambler coupled in series with said data memory address conductors, said unscrambler being operable in accordance with said cipher key to unscramble any scrambled data address signals applied to the input thereof and to apply the unscrambled data address signals to said data memory address conductors; means for applying said scrambled data address signals read out of said instruction memory to the input of said unscrambler; and means for reading data out of said data memory at said unscrambled addresses in accordance with said program instructions for use in the corresponding computer operations.