1. A memory device comprising: a memory layer configured to store data; and a logic layer within the memory device coupled to the memory layer comprising: an Input/Output (“I/O”) port configured to receive a write command that comprises a write address and data; a memory map configured to maintain a memory table that associates a plurality of addresses with a plurality of memory locations in the memory layer and to return an associated memory location corresponding to the write address; and a controller coupled to both the I/O port and the memory map and configured to store the data in the associated memory location in the memory layer.