1. A circuit for adjusting the duty cycle of an input signal, comprising: a divide-by-two circuit having an input coupled to receive the input signal; a switched current source circuit having an input coupled to an output of the divide-by-two circuit, and an output coupled to an integrating capacitor; a slicer having a first input coupled to the integrating capacitor and a second input coupled to a reference signal; a logic circuit configured to combine an output of the slicer with the output of the divide-by-two circuit to generate an output signal having a frequency substantially equal to the frequency of the input signal.