1. A method for snooping updates to instructions which are within an instruction processing pipeline of a microprocessor, comprising: storing an address indicative of a plurality of instructions in a buffer when said plurality of instructions enter said instruction processing pipeline; comparing an update address indicative of a memory location being updated to said address stored in said buffer; flushing instructions subsequent to an instruction within said plurality of instructions in said pipeline if said comparing indicates that said update address corresponds to said address and a first condition is detected, and flushing said plurality of instructions from said instruction processing pipeline if said comparing indicates that said update address corresponds to said address and a second condition is detected; and discarding said address from said buffer when said plurality of instructions exit said instruction processing pipeline; wherein said first condition is a store operation by said microprocessor; and wherein said second condition is a snoop operation.