1. A method of securing a performance state change of a processor, the method comprising: detecting a request to change a current performance state of the processor to a target performance state, the processor having a plurality of performance states each including a target operating level and an operating level tolerance range; adjusting, in response to the request, the operating level tolerance range of the current performance state of the processor to include operating levels associated with a transition from the current performance state to the target performance state, wherein the operating level tolerance range associated with each performance state is defined by an upper bound threshold and a lower bound threshold; and when the target operating level of the target performance state is greater than the target operating level of the current performance state, changing the upper bound threshold of the current performance state to the upper bound threshold of the target performance state prior to increasing the operating level of the current performance state to the target operating level of the target performance state, and changing the lower bound threshold of the current performance state to the lower bound threshold of the target performance state following the increasing the operating level of the current performance state to the target operating level of the target performance state.