1. A logic simulator for simulating a logic circuit defined by a plurality of sentences, each sentence being identified by an identifier and comprising at least one operator and at least two variables which are operated on according to said at least one operator, said logic simulator comprising: an identifier memory for memorizing a plurality of identifiers each specifying one of said sentences, respectively; a model memory for memorizing a plurality of operators which carry out operations specified by said sentences; a variable memory for memorizing a plurality of initial values of the variables specified by said sentences; a flag memory for memorizing a plurality of flags in correspondence with said sentences, each of said flags being indicative of whether or not said initial values of the variables specified by each of said sentences are changed during said simulation of said sentences; a sentence calculating means connected to said identifier memory, said model memory, said variable memory, and said flag memory for carrying out calculation on one of said sentences at a time only when a change is indicated by one of said flags that corresponds to said one of said sentences, said sentence calculating means producing a result of said calculation based on at least one of said operators and at least two of said initial values of said variable, said at least one of said operators and said at least two of said initial values of said variables being specified by said one of said sentences; a result memory for memorizing an initial result value; and substituting means connected to said result memory and said sentence calculating means for substituting said result of said calculation for said initial result value.