1. An integrated circuit comprising: a digital processor for performing a signal processing function, said digital processor having a core processor unit; an embedded co-processor which implements a Viterbi decoding function, said co-processor having a branch metric unit for determining metrics for branches of a Viterbi trellis, said branch metric unit being capable of determining a plurality different types of branch metrics, and operating under the control of said core processor, and being adapted to determine any one of said plurality of different types of branch metrics.