1. A .mu.-law to floating point converter (100) including input terminals (10, 11-1, 11-2, 11-3, 12-1, 12-2, 12-3, 12-4) adapted to receive a .mu.-law code word, said code word including a sign bit representing polarity, characteristic bits representing segment value, and mantissa bits representing a code word quantizing step; output terminals (20, 21-1, 21-2, 21-3, 22-1, 22-2, 22-3, 22-4, 22-5) adapted to transmit a floating point representation of said code word, said representation including a sign, an exponent and a floating point mantissa; means (12) for extending said polarity and said segment value to first predetermined ones (20, 21-1, 21-2, 21-3) of said output terminals and characterized in that said converter further comprises: a translator (200) responsive to said segment value and to a prefixed quantizing step for providing a reference mantissa; means (90, 95) responsive to said reference mantissa and to said code word quantizing step for providing said floating point mantissa; means (23) for extending said floating point mantissa to second predetermined ones (22-1, 22-2, 22-3, 22-4, 22-5) of said output terminals whereby said floating point representation consists of said sign bit (20), said characteristic bits directly extended as said exponent (21-1, 21-2, 21-3), and said extended floating point mantissa (22-1, 22-2, 22-3, 22-4, 22-5).