1. A method of operating a test device for a logic-based processing device comprising: accessing an original test program; generating a family of one or more quick error detection (QED) test programs, each of the QED test programs including the original test program with additional instructions inserted at strategic locations within the original test program, wherein the additional instructions and the strategic locations vary between each of the QED test programs; and storing the one or more QED tests programs on a non-transitory memory for later execution by the logic-based processing device.