1. A method for decoding a set of bits using a processor, the method comprising: receiving initial bit states and associated reliability metrics for the set of bits; decoding a current hypothesis for correcting the set of bits, wherein the current hypothesis defines different bit states and associated reliability metrics for the set of bits; and if decoding the current hypothesis is not successful, decoding a subsequently ordered hypothesis, wherein the hypotheses are ordered such that their associated reliability metric is a monotonically non-decreasing sequence.