1. A mask configurable semiconductor device, comprising: a programmable logic circuit having a high impedance node; and an output of a multiplexer coupled to the high impedance node to configure the programmable logic circuit, the multiplexer including: two or more inputs; and one or more control signals, the control signals uniquely coupling a said input to the output of the multiplexer; and a plurality of read only memory elements (ROMs), a said ROM element coupled to each of said inputs to multiplexer, wherein the ROM elements are positioned substantially above or below the programmable logic circuit.