1. A method for addressing an instruction operand in a data processor having an addressable memory, comprising: (a) fetching a token in an instruction stream; (b) if said token represents a predetermined prefix code, (1) incrementing a count, and (2) repeating step (a); (c) if said token represents an instruction, determining an operand address at least partly specified by said instruction; (d) if said count is nonzero, (1) fetching a memory word at said operand address, (2) fetching a suffix value, (3) modifying said memory word in accordance with said suffix value so as to substitute a further address for said operand address, (4) decrementing said count, and (5) repeating step (d); (e) fetching an operand for said instruction in accordance with said operand address.