1. A processor comprising: a processing core to generate a memory request for application data in an application, the application data comprising a first virtual address page; and a virtual page group memory management (VPGMM) unit, coupled to the processing core; wherein the VPGMM unit includes a page table comprising a plurality of page table entries (PTEs), each PTE corresponding to a different one of a plurality of virtual address pages including the first virtual address page; wherein the VPGMM unit enables the application to assign one or more of the virtual address pages including the first virtual address page to a virtual page group (VPG) denoted by a VPG identification (VPGID); wherein the VPGMM unit includes a caching priority (CP) table, the CP table being indexed by the VPGID such that a CP value in an entry of the CP table indexed by the VPGID indicates a relative caching priority of the virtual address pages comprising the VPG; and wherein changing the CP value changes the relative caching priority of the virtual address pages comprising the VPG.