1. An apparatus, comprising: a program controller to fetch and issue instructions; and, an execution lane array that is coupled to a two dimensional shift register array structure, wherein, execution lanes of the execution lane array are located at respective array locations and are coupled to dedicated registers at same respective array locations in the two-dimensional shift register array structure, wherein the execution lanes each comprise at least one execution unit to execute the instructions, the two dimensional shift register array structure comprising more rows and columns than the execution lane array.