1. An asynchronous multiple-core processor comprising: a plurality of self-timed core processors linked with a network bus; a task divider executing on the asynchronous multiple-core processor and configured to: receive a task; divide the task into a plurality of sub-tasks; transmit, to a software library, an indication of a selected sub-task selected from among the plurality of sub-tasks; receive, from the software library, a compiled version of the selected sub-task; and transmit, to a sub-task scheduler, the compiled version of the selected sub-task; and the sub-task scheduler executing on the asynchronous multiple-core processor and configured to: receive the compiled version of the selected sub-task; determine current availability of the plurality of self-timed core processors; prepare a schedule for the execution of the compiled version of the selected sub-task in context with other compiled versions of sub-tasks; associate each compiled version of the sub-tasks with a core index for a respective one of the plurality of self-timed core processors; formulate, based on the schedule and the current availability, an instruction stream; and broadcast the instruction stream to all of the plurality of self-timed core processors.