1. A multiplexing memory controller comprising: a number of channels that each stores a specification of memory-access-request servicing characteristics for the channel; a memory-request input through which the multiplexing memory controller receives memory-access requests from two or more processing entities, each memory-access request accompanied with a channel indication; and memory-controller logic that processes the received memory-access requests in order to provide memory-access-request servicing to each channel in accordance with the channel's memory-access-request servicing characteristics; wherein each channel is associated with a number of registers that store values that specify the memory-access-request servicing characteristics for the channel, including a memory-access-request processing priority and a memory-access-request processing limit; and wherein each channel is associated with three-registers, including a shares register that stores a number of memory-access-resource shares, tokens register that stores a current number of memory-access-request-processing tokens, and a token-increment register that stores an indication of a number of memory-access-request-processing tokens to be allocated to the channel by the multiplexing memory controller during each token-refresh cycle.