1. A digital multiplier having a plurality of multiplier inputs and a plurality of multiplicand inputs comprising: first means responsive to three of said multiplier inputs for producing a selection signal representative of logic levels applied to said three multiplier inputs; and second means responsive to two adjacent ones of said multiplicand inputs and responsive to said selection signal for producing an output signal representative of one of said adjacent multiplicand inputs or the complement of one of said adjacent multiplicand inputs determined by said selection signal.