1. A digital processing system comprising: a memory means for the storing of words containing data and instructions that define operations on said data, each word contains M binary digits; an N (where N is less than M) binary digit parallel arithmetic and logic unit connected to said memory means and for performing said operations; and self-test means connected to said memory means and said arithmetic and logic means for summing the numeric value of the contents of said memory means into a plurality of binary digital sums and comparing said sums with corresponding constants, said self test means includes: first self test means for controlling the testing of a first portion of the M binary digits, second self test means for controlling the testing of a second portion of the M binary digits, and accumulator means for accumulating the results of the testing of the first and second portions.