1. A method for finding logical equivalence between a register transfer level abstraction and a synthesized netlist comprising: receiving a register transfer level abstraction and a synthesized netlist of the register transfer level abstraction; storing the register transfer level abstraction and the synthesized netlist into an equivalence representation model; associating one or more netlist terminals with one or more corresponding register transfer level entities based on a name of the register transfer level entity matching a name of a netlist terminal; simplifying the register transfer level abstraction and the synthesized netlist; minimizing one or more nets in the netlist by: determining immediate operands for each of the one or more nets; determining if the one or more nets of the netlist are logical equivalents based on the determined immediate operand; and associating the one or more determined nets and storing the associations in the equivalence representation model; matching each register transfer level wire to a netlist net by: traversing the register transfer level abstraction from a bottom wire to a top wire of the abstraction; minimizing each wire in the register transfer level abstraction by: determining immediate operands for each of the one or more register transfer level wires; determining if the register transfer level wire is a logical equivalent to one or more of the stored associated nets; and associating each register transfer wire with a determined equivalent net and storing the associations in the equivalence representation model; determining from the associations of the entities and terminals if each register transfer level wire is associated with a net of the same name; determining if each wire and net of the same name are logically equivalent; and determining a new candidate for a net if a wire and net of the same name are not logically equivalent and storing the new candidate net in the equivalence representation model.