1. A multiprocessor system comprising: a first processor core; a second processor core; a first prefetcher associated with the first processor core; a second prefetcher associated with the second processor core; an off-chip memory interface supporting prefetch operations associated with the first prefetcher and the second prefetcher; and a prefetch bandwidth allocator configured to partition a prefetch bandwidth associated with the off-chip memory interface into a first prefetch bandwidth partition associated with the first prefetcher and a second prefetch bandwidth partition associated with a second prefetcher.