1. A circuit arrangement for a data processing system for executing a plurality of tasks with a central processing unit having a processing capacity allocated to the processing unit, comprising: a circuit device configured to allocate the processing unit to specific tasks in a time-staggered manner for processing, so that the tasks are processed in an order to be selected and tasks not having a current processing request are skipped over in the order during the processing, wherein the circuit device includes a prioritization order control unit configured to determine the order in which the tasks are to be executed, and wherein, in response to each selection of a task for processing, the order of the tasks is redetermined and the selection is controlled so that for a number N of tasks, a maximum of N time units elapse until an active task is once more allocated processing capacity by the processing unit.