1. An analog to digital conversion apparatus comprising: an input multiplexor circuit having a plurality of analog input terminals for receiving a plurality of analog input signals, said input multiplexor circuit being responsive to a select input; an analog to digital converter circuit adapted to convert the selected analog signal into a digital signal; a conversion starting device adapted to send to said analog to digital converter circuit a conversion start signal on the basis of a selected trigger event of a plurality of trigger events, the conversion starting device being responsive to at least one select input; a sequencer coupled to the select input of the input multiplexor circuit and to at least one select input of the conversion starting device and adapted to control the analog to digital converter circuit to execute one sequence conversion on the basis of one conversion sequence instruction; and a FIFO register block adapted to receive a plurality of conversion sequence instructions and being able to queue each new received conversion sequence instruction if an actual conversion sequence is in progress and is adapted to control the sequencer to execute a new sequence conversion instruction after the actual conversion sequence is completely executed, wherein said conversion starting device comprises: a trigger multiplexor circuit having a plurality of input terminals for receiving respective triggering signals and a mask multiplexor circuit having a plurality of input terminals for receiving respective masking signals, the trigger and mask multiplexor circuits being responsive to respective select inputs; a logic operator block able to operate logic operations on two signals deriving respectively from the trigger multiplexor circuit and the mask multiplexor circuit, the logic operator block being responsive to a select input; and a polarity selection block receiving the output signal of the logic operator block and being able to generate the conversion start signal in response to a selected sensitivity, the polarity selection block being responsive to a select input.