1. A multiple-state One-Time Programmable (OTP) memory, comprising: a plurality of multiple-state One-Time Programmable (OTP) memory cells, at least one of the multiple-state One-Time Programmable (OTP) memory cells having an One-Time Programmable (OTP) element with N (N>2) distinct resistance states from R(0), R(1),. .. , to R(N−1), wherein R(0) being the virgin state; a program control circuit to apply high voltage or high current pulses to program the One-Time Programmable (OTP) cells; and a sensing circuit with at least N−1 reference resistance levels to sense the One-Time Programmable (OTP) cell into digital data, and wherein the One-Time Programmable (OTP) memory being configured to function as an N−1 time programmable memory by programming the One-Time Programmable (OTP) cells that have data 1s into the R(1) state the first time, by programming the One-Time Programmable (OTP) cells that have data 1s into the R(2) state the second time, until by programming the One-Time Programmable (OTP) cells that have data 1s into the R(N−1) state the N−1 time.