1. A method for servicing interrupts in a computer system having a memory and a plurality of processors coupled to one or more peripheral devices, comprising: receiving an interrupt request by a device driver within the computer system; storing, by the device driver, interrupt data in a portion of the memory, the interrupt data comprising: an identification of at least one processor of the plurality of processors capable of servicing the interrupt request; a priority of the interrupt request; a thread context; and an address for instructions to service the interrupt request; issuing, by the peripheral device, a memory write to the plurality of processors; storing, by the at least one processor, a current thread and switching to the thread context when the priority of the interrupt request is higher than an operational priority of the at least one processor; and using the address to access the instructions to service the interrupt request.