1. A method for functionally verifying the performance of a system on a chip (SOC) that includes a plurality of blocks, the method comprising: generating a verification log, including: automatically generating assertions for each of a plurality of blocks, each of the assertions including a predicate for a property of a block; executing verification cycles for each of the plurality of blocks including applying one or more stimuli to a block to generate verification information; and storing the verification information for each verification cycle in the verification log, the verification log including temporal data associated with each verification cycle; analyzing, by a processor coupled to a memory, the verification log, including identifying signatures by correlating a pattern of at least one of triggered and untriggered assertions in one or more blocks of the plurality of blocks to behaviors of at least one of the SOC and the one or more blocks of the plurality of blocks; categorizing, by the processor, the signatures according to the behaviors of the at least one of the SOC and the one or more blocks of the plurality of blocks; and storing, by the processor, the signatures based upon the categorization in a database.