1. A multi-stage receiver having a sequence of processing stages, at least one processing stage comprising: a first processing block adapted to receive an input signal and generate from the input signal one or more processing parameters; a delay block adapted to generate a delayed signal; and a second processing block adapted to apply the one or more processing parameters to the delayed signal to generate an output signal, wherein the delay block compensates for one or more processing delays associated with the generation of the one or more processing parameters by the first processing block.