1. A computer implemented method for relative offset branching in a reduced instruction set computing (RISC) architecture, the method comprising: fetching a branch instruction from an instruction stream having a fixed instruction width; acquiring a relative offset value from the instruction stream, the relative offset value formatted as an offset relative to a program counter value and sized as a multiple of the fixed instruction width; adding the relative offset value with the program counter value to form a branch target address value; loading the branch target address value into a program counter based on the branch instruction; and redirecting execution of the instruction stream to a next instruction based on the branch target address value in the program counter.