1. A computer-implemented method for generating a reconfigurable architecture for a hardware adaptive computing engine (ACE) having a set of one or more matrices, each matrix comprising a set of one or more computation units, each computation unit comprising a set of one or more computational elements, and the reconfigurable architecture being reconfigurable in real time when ACE configuration code is executed, the method comprising: profiling ACE configuration code to make measurements of a plurality of data parameters, wherein the code is executable and embodies a plurality of algorithmic elements, and wherein the code, when executed, causes a first function to be performed and a second function to be performed; based on the plurality of data parameters measured, selecting which of the algorithmic elements of the code are to be implemented in the reconfigurable architecture for the first function and the second function; receiving a plurality of hardware architecture descriptions of the sets of matrices, computation units and computational elements; based on the hardware architecture descriptions and the selected algorithmic elements, selecting one or more computational elements; selecting an interconnection network for causing the selected one or more computational elements to be connected together in a first architecture configuration in real time for performing the first function, and switching, when the ACE configuration code is executing, the interconnection network for causing the selected one or more computational elements to be connected together in a second architecture configuration for performing the second function, the switching including changing the connections among the computational elements based on the profiling to cause the computational elements to be connected in a first architecture configuration for performing the first function and cause the computational elements to be connected in a second, different architecture configuration for performing the second function.