1. An integrated circuit comprising: registers for holding data, the integrated circuit being capable of placing the registers in a low power condition in which their state is lost; a power domain capable of operating in a plurality of modes, the domain being capable of reading the registers and the current operating mode of the domain being dependent on the state of the registers; a memory; and a configuration controller for configuring the registers, the configuration controller having access to a set of mappings, each mapping indicating for the state of a first set of bits represented in the memory the state of a corresponding second set of bits storable in the registers, the first set having fewer bits than the second set; wherein the configuration controller is configured to perform a register configuration operation by reading the state of a first set of bits from the memory and populating the registers with the state of the second set of bits that corresponds to the state of that first set of bits.