1. A coherent computer system comprising: a memory shared by a processor and a coherent accelerator device (CAD), the memory comprising a work queue directly accessible by the CAD and the processor utilizing the same effective addresses; the CAD comprising: an accelerator functional unit (AFU) circuit and associated AFU logic to process data from the work queue to accomplish an accelerated function; and a version detector circuit and associated version detector logic to determine whether the AFU logic is the most recent version, and; the processor comprising an application and a CAD virtual machine (CAD VM) emulating the CAD while the CAD is unavailable due to the CAD retrieving AFU logic that is the most recent version, the work queue directly accessible by the CAD VM and the processor utilizing the same effective addresses.