1. A nanowire-crossbar latch array for storing input signals, the nanowire-crossbar latch array comprising: a number of signal wires; a first enable line crossing each signal wire, the first enable line interconnected to each signal wire by a nanowire junction, the first enable line controlling input-signal transmission in any of the signal wires to which the first enable line is interconnected by a field-effect transistor; a first control line crossing each signal wire, the first control line interconnected to each signal wire by a signal-storing nanowire junction; and a second control line crossing each signal wire, the second control line interconnected to each signal wire by a signal-storing nanowire junction.