1. A method of executing instructions in an instruction pipeline of a processor, the method comprising: detecting a conditionality-imposing control instruction which imposes dependent behavior on a conditionality block size number of one or more dependent instructions; prior to executing a first instruction, dependency-predicting that the first instruction is a dependent instruction of the conditionality-imposing control instruction, based on the conditionality block size and one or more parameters of the instruction pipeline; executing the first instruction based on the dependency-prediction; and when the first instruction is dependency-mispredicted, mitigating a penalty associated with the dependency-misprediction.