1. A method of generating a test harness for a hardware accelerator comprising: accessing a template simulation script corresponding to the hardware accelerator, the hardware accelerator including a plurality of inputs, a clock input, and a plurality of outputs; determining a number of clock cycles required to complete execution of the hardware accelerator; adding a first set of instructions to the simulation script to provide input parameters to the plurality of inputs during a test of the hardware accelerator; adding a second set of instructions to the simulation script to provide clock inputs for the determined number of clock cycles required to complete execution of the hardware accelerator to the clock input during the test of the hardware accelerator; adding a third set of instructions to the simulation script to access one or more output values from the plurality of outputs during the test of the hardware accelerator; and accessing a waveform template script corresponding to the hardware accelerator, the waveform template script, when executed, configured to display the input parameters, the clock inputs, and the accessed output values.