1. An apparatus, comprising: a processor that enables a clear state, the clear state to enable a non-secure processing function and to disable a security function; enables a secure state that comprises a temporary secure state and a non-volatile secure state, the secure state to enable a secure processing function; enables a transition from the temporary secure state to the clear state, wherein the transition to the clear state from the temporary secure state is enabled based on a reset pulse; and enables a transition from the non-volatile secure state to the clear state, wherein the transition to the clear state from the non-volatile secure state is enabled based on a power loss.