1. A computing system comprising: a CPU; a Northbridge coupled to the CPU; a Southbridge coupled to the Northbridge; and a system memory coupled to the Northbridge; wherein the Southbridge comprises: a PC interface configured to couple the Southbridge to the Northbridge; and a USB controller coupled to the PC interface, wherein the USB controller comprises: a scheduler that processes at least one schedule of transfer descriptors; a pointer cache coupled to the scheduler and configured to cache a plurality of pointers identifying locations in the system memory for the transfer descriptors in the schedule, wherein the pointer cache stores the pointer for each of the transfer descriptors in the schedule; and a data cache coupled to the scheduler and configured to cache only a portion of the plurality of transfer descriptors in the schedule.