1. A multidimensional multi-processor system, comprising: a plurality of co-processors; and a host processor connected to said co-processors through a bus for supplying multi-bit information, having a multi-dimensional processor number which at least includes a x-direction number and a y-direction number and a command, to said co-processors through said bus, said x-direction number, y-direction number and said command being respectively disposed in a first field portion, in a second field portion and in a third field portion of said multi-bit information supplied by said host processor; wherein each of said co-processors includes (a) first means for storing multi-dimensional information which includes at least x-direction information and y-direction information inherent to the co-processor, (b) second means for determining a relationship between said multi-dimensional information stored in said first means and a multi-dimensional processor number supplied by said host processor, (c) third means for responding to said second means when said relationship is found to be a predetermined one, to thereby cause said co-processor to respond to said command, wherein said x-direction number corresponds to said x-direction information and said y-direction number corresponds to said y-direction information, respectively, when said relationship is said predetermined one, (d) fourth means for determining whether said x-direction number supplied by said host processor is a first particular number which allows simultaneous communication between said host processor and co-processors in a row direction of a matrix of said plurality of said co-processors, (e) fifth means for determining whether said y-direction number supplied by said host processor is a second particular number which allows simultaneous communication between said host processor and co-processors in a column direction of said matrix of said plurality of said co-processors, and wherein said third means further responds to at least either one of said fourth means and fifth means when said x-direction number supplied by said host processor is said first particular number or said y-direction number supplied by said host processor is said second particular number so as to thereby cause said associated co-processor to respond to said command.