1. A method for interconnecting a live backplane having a data bus and a clock bus to at least a first two-wire I/O card having a data bus and a clock bus using interconnection circuitry, said method comprising: monitoring said backplane data bus and said backplane clock bus to determine a first condition indicative of whether said backplane may be interconnected with said first I/O card; monitoring said I/O card data bus and said I/O card clock bus to determine a second condition indicative of whether said first I/O card may be interconnected with said backplane; and interconnecting said backplane with said first I/O card when said first and second conditions have been met.