1. A method performed by a computer for comparing a first layout with a second layout, comprising: receiving, by an input device of a computer, a first input corresponding to a first layout of an integrated circuit (IC), wherein the first layout comprises a first basic layout element; receiving, by the input device of the computer, a second input corresponding to a second layout of the IC, wherein the second layout comprises a second basic layout element; forming, by a processor of the computer, a first trace of the first basic layout element, and a second trace of the second basic layout element, wherein the first trace is a first description that uniquely identifies the first basic layout element and its location, and the second trace is a second description that uniquely identifies the second basic layout element and its location; generating, by the processor of the computer, a first signature from the first input, wherein the first signature comprises a first trace signature representing the first trace for the first basic layout element; generating, by the processor of the computer, a second signature from the second input, wherein the second signature comprises a second trace signature representing the second trace for the second basic layout element; comparing, by the processor of the computer, the first signature and the second signature to determine whether the first layout is same as the second layout; and producing, by an output device of the computer, an output.