1. A method of programming a nonvolatile memory device including a plurality of first multi-level cells coupled to a first wordline and a plurality of second multi-level cells coupled to a second wordline adjacent to the first wordline, the method comprising: performing a first least significant bit (LSB) program operation that programs LSBs of first multi-bit data in the plurality of first multi-level cells; performing a second LSB program operation that programs LSBs of second multi-bit data in the plurality of second multi-level cells; and performing, after the second LSB program operation is performed, a first most significant bit (MSB) program operation that programs MSBs of the first multi-bit data in the plurality of first multi-level cells, the first MSB program operation including a first MSB pre-program operation that pre-programs, to an intermediate program state, third multi-level cells from among the plurality of first multi-level cells that are to be programmed to a highest target program state among a plurality of target program states, and a first MSB main program operation that programs the plurality of first multi-level cells to the plurality of target program states corresponding to the first multi-bit data, the first MSB pre-program operation and the first MSB main program operation being performed in one sequence, and the first MSB pre-program operation including, applying a program voltage to first bitlines coupled to the third multi-level cells; and applying an inhibit voltage to second bitlines coupled to fourth multi-level cells other than the third multi-level cells from among the plurality of first multi-level cells, the fourth multi-level cells including ones of the plurality of first multi-level cells that are to be programmed to one of the plurality of target program states adjacent to the highest target program state, and the inhibit voltage being higher than the program voltage, wherein during the first MSB main program operation, a same programming step programs the third multi-level cells having the intermediate program state and the fourth multi-level cells.