1. A computer implemented method for deriving a set of auxiliary verification statements comprising: accessing by a computer a device design, the device design having a plurality of power domains; accessing by the computer at least one verification statement; determining on the computer a set of properties instantiated in the at least one verification statement; synthesizing on the computer a set of auxiliary verification statements, the auxiliary verification statements corresponding to the set of properties and the plurality of power domains; saving the set of auxiliary verification statements to a memory storage location.