1. A method for generating and verifying isolation logic modules in a design of an integrated circuit (IC), the method comprising: specifying a plurality of voltage constraints defining at least one power domain in the design; iteratively checking, for each of the power domain, when an isolation logic module isolating the power domain exists in the design; verifying the correctness of the isolation logic module existing in the design, when the isolation logic module is identified; generating an isolation logic module for isolating the power domain, when the power domain is not correctly isolated; and inserting the generated isolation logic in the design.