1. A method of data processing in a multiprocessor data processing system including multiple vertical cache hierarchies supporting a plurality of processor cores, a system memory, and a system interconnect coupled to the system memory and the multiple vertical cache hierarchies, the method comprising: a first cache memory in a first vertical cache hierarchy issuing on the system interconnect a request for a target cache line; responsive to the request and prior to receiving a systemwide coherence response for the request, the first cache memory receiving from a second cache memory in a second vertical cache hierarchy by cache-to-cache intervention the target cache line and an early indication of the systemwide coherence response for the request; and in response to the early indication of the systemwide coherence response and prior to receiving the systemwide coherence response, the first cache memory initiating processing to install the target cache line in the first cache memory.