1. A system for tracking memory address collisions, comprising: a memory core controller, responsive to selecting a particular queue from among at least two queues to place an incoming event into within a particular entry from among a plurality of entries ordered by arrival into the particular queue each comprising a separate collision vector of a number of a plurality of bits corresponding to a number of a plurality of other entries in at least one other queue from among the at least two queues, operative to compare a memory address for the incoming event with each queued memory address for each queued event in the plurality of other entries ordered by arrival into the at least one other queue; and the memory core controller, responsive to the memory address for the incoming event matching at least one particular queued memory address from among each queued memory address for at least one particular queued event from among each queued event in the at least one other queue, operative to set at least one particular bit in a particular collision vector for the particular entry in at least one bit position from among the plurality of bits corresponding with at least one row entry position of the at least one particular queued memory address within the plurality of other entries, wherein each set at least one particular bit indicates a memory address collision between a later arriving particular entry in the particular queue and at least one particular queued event in the at least one other queue.