1. A method, executed by at least one processor, for hierarchical hardware mapping in a software design environment, the method comprising: providing a software design tool on a graphical interface of a computer system; receiving, in the software design tool, a selection of a graphical representation of a hardware electronic control unit (ECU); receiving, in the software design tool: a selection of a binding between a graphical representation of first software and the ECU, the selection defining a first hierarchical software level; and a selection of a binding between a graphical representation of second software and the ECU, the selection defining a second hierarchical software level; associating the first and second hierarchical levels to form a system composition in which the first hierarchical software level includes the second hierarchical software level; and storing the system composition for use in one or more software designs.