1. A method of accessing a server address space in a shared Peripheral Component Interconnect express (PCIe end point system comprising: initiating a memory access to at least one primary port memory map by a shared PCIe endpoint, the shared PCIe endpoint having a shared device, the shared PCIe endpoint coupled to a PCIe switch, the PCIe switch including a transport port, a PCIe bus coupling a microprocessor to the transparent port, the PCIe switch further including a primary address translation table, a server address space having associated therewith a server address; using the microprocessor, programming in the primary address translation table with the server address, the microprocessor being a part of a shared PCIe endpoint; and using the PCIe switch, re-directing the memory accesses, directed to the at least one primary port memory map, to the server address space according to the primary address translation table.