1. An integrated circuit modeling method comprising the steps of establishing functional cores of a software model of an integrated circuit; forming high level modules of the software model by selectively attaching external environment cooperative engagement functionality to the functional cores; creating one or more hardware description language modules of the integrated circuit; generating interface code with an interface generator from hardware specification inputs; providing the interface code to the external environment cooperative engagement functionality; and verifying the output of the hardware description language modules against output of the corresponding high level modules of the executable software model.