1. A method for computation in a programmable logic device (PLD), said PLD including a logic plane and a plurality of memory planes, said method comprising: storing configuration data and user data in said memory planes, said configuration data providing a configuration of said PLD, and said configuration of said PLD using said user data providing a single instruction in said computation; and sequentially reconfiguring said PLD in a series of configurations using said configuration data and user data, said series of configurations providing said computation, wherein each computation is comprised of computation steps, each computation step receiving input data, generating output data, and using programmable routing of said PLD to provide output data from one computation step as input data for another computation step.