1. A signal output adjustment circuit which adjusts output of control data corresponding to command data, the signal output adjustment circuit comprising: a decoder which decodes the command data read from a memory; a control register in which control data corresponding to first command data is set when the decoder determines that the command data is the first command data for setting control data; a buffer in which control data corresponding to second command data is stored when the decoder determines that the command data is the second command data for outputting control data; and an output adjustment circuit which reads the control data stored in the buffer and outputs the read control data in synchronization with a data fetch signal, based on a value set in the control register, wherein the output adjustment circuit sets at least one of permission/rejection of inversion output of the data fetch signal and output timing of the data fetch signal, based on the value set in the control register.