1. A method for changing a state of an on-chip system logic (OCSL) of an integrated circuit comprising: loading a set of instructions into an instruction register of a test access port state machine, the set of instructions including a minimum set of JTAG instructions and a set of supplemental instructions, wherein the set of supplemental instructions operates such that a particular instruction is designed to be executed in sequence after at least one previous instruction; loading a start instruction from the set of supplemental instructions; in response to the start instruction, initiating a function to modify the state of the OCSL from a first condition to a second condition; loading a stop instruction from the set of supplemental instructions; and in response to the stop instruction, terminating the function and returning the state of the OCSL from the second condition to the first condition.