1. A computer-implemented method of creating a built-in-self-test (BIST) organizational file for an integrated circuit (IC) chip, the method comprising: receiving a design file including a hierarchy of memory modules, each module including a plurality of memory wrappers; scanning each memory wrapper in each hierarchical level of memory modules for a BIST type; creating, based on the hierarchical level and the BIST type, an ordered list of memory wrappers; adding, based on the BIST type, a BIST engine for each memory wrapper listed in the ordered list; and adding a plurality of additional statements to the ordered list to create the BIST organizational file.