1. A method of fabricating a stacked semiconductor memory device, comprising: providing a semiconductor substrate that includes a functional circuit; forming a stack of memory cell array layers above the semiconductor substrate, wherein each of the memory cell array layers is oriented parallel to the semiconductor substrate, and each of the memory cell array layers comprises memory cells and memory cell selecting lines; and forming at least one connection layer independently of all of the memory cell array layers of the device, wherein the forming of the at least one connection layer comprises electrically connecting the memory cell selecting lines to the functional circuit, and the connection layer is oriented parallel to the semiconductor substrate.