1. In a data processing system comprising a memory unit storing instructions and data, a central processing unit coupled to said memory unit and processing successively in time a plurality of tasks using said instructions and data, each task being uniquely identified by a task identity number, and a memory management unit coupled to said memory unit and to said processing unit for translating logical addresses generated by said processing unit relating to said tasks into physical addresses in said memory unit, said memory unit comprising an addressable memory space which is divided into a plurality of pages, the improvement wherein said memory management unit comprises: task register means for storing the task identity number of the task currently being processed by said processing unit, said task identity number being loaded into said task register means by said processing unit, prior to processing said task, in response to said processing unit executing one of said instructions, page table means comprising a plurality of entries each storing one of said physical addresses corresponding to at least one logical address generated by said processing unit for each task, said page table means being responsive to said task identity number stored in said task register means and to one of said logical addresses generated by said processing unit for generating the physical address corresponding to said at least one logical address of said task currently being processed by said processing unit, page register means for storing an indication of the number of said plurality of tasks, said indications of said page register means also identifying the number of pages in said memory unit which are allocated to each task, said allocated number of pages per task being equal to said plurality of pages divided by said plurality of tasks, said page register means being loaded, prior to said processing unit processing the current task, by said processing unit in response to said processing unit executing a second one of said instructions, and wherein said page table means is also responsive to said indication of said page register means for generating said physical address, and wherein said plurality of entries of said page table means comprises a plurality of groups of entries, one group of entries corresponding to each task, wherein each entry of said page table means further comprises a last page indication portion, wherein the last page indication portion of the last entry of the group of entries corresponding to the task currently being processed by said processing unit is set to a predetermined state in response to said processing unit executing a third one of said instructions prior to processing said task, and wherein said memory management unit comprises means connected to the page table means responsive to said predetermined state of said last page indication portion for generating an interrupt to said processing unit when said task currently being processed by said processing unit is utilizing the last page allocated to it.