1. A basic non-volatile memory group comprising: (i) a plurality of individual memory cells (i.e., field effect transistors) which are stacked along any direction(s) out of the plane of a substrate and electrically connected in parallel by sharing the source and drain electrodes; (ii) a piece of semiconductor (e.g., Si or Ge) denoted as a semiconductor “fin”, the sidewalls or the whole body of which provide a plurality of conduction channels (with the direction of electrical current flow approximately parallel to the substrate plane) for the corresponding field-effect-transistors within the same basic memory group; (iii) the source and drain electrodes shared by all field effect transistors are located at two opposite sides of the conduction channel (i.e. the semiconductor fin); (iv) one or more than one side gate for each individual memory cell; and (v) a charge trap structure (sandwiched between a gate electrode and a conduction channel) as the storage medium for memory cells.