1. A method of regulating an execution of a program by a microprocessor having a plurality of instruction addresses, at least one of said instruction addresses having at least one instruction, at least one instruction of at least one of said instruction addresses being a control transfer instruction in which execution of said control transfer instruction effecting a transfer of control to a target instruction address, at least one of said instruction addresses containing a target-indicator instruction indicating that the at least one of said plurality of instruction addresses is a valid target for transfer of control, and at least one instruction address annotated with at least one target-tag field, the method comprising: (a) the microprocessor reading a control transfer instruction instructing the microprocessor to transfer control to a target instruction address; (b) the microprocessor reading the instruction at the target instruction address; (c) the microprocessor comparing the instruction at the target instruction address to at least one target-indicator instruction; considering the comparison to match only if the instruction at the target instruction address has at least one target-tag argument and at least one target tag argument of the instruction at the target instruction address matches at least one target-tag field annotating the target instruction address; and (d) the microprocessor executing the instruction at the target instruction address if the instruction at the target instruction address matches at least one target-indicator instruction, otherwise the microprocessor trapping to a handler.