1. A method for transforming a logic design into an integrated circuit to be laid-out on a base array, comprising: (a) generating a netlist for the logic design using a standard cell library; (b) identifying a logic function for a standard cell in the netlist; (c) identifying one or more primitive logic cells needed to duplicate the logic function of the standard cell, wherein each of the one or more primitive logic cells is not a standard cell; and (d) operating a computer to construct a primitive-based version of the standard cell using the identified one or more primitive logic cells, the primitive-based version of the standard cell to be laid-out on the base array.