1. A method of detecting defects in integrated circuits, comprising: applying a first manufacturing process to only a first portion on a starting material; applying a second manufacturing process, different from the first process, to only a second portion on the starting material; and comparing the first and second portions to each other using an image subtraction method of defect detection by subtracting an image of the first portion from an image of the second portion to detect systematic pattern defects present in one of the first and second portions.