1. An apparatus, comprising: an instruction execution control unit which fetches an instruction from a memory, said instruction is executed according to a microinstruction; and said instruction is classified into a plurality of types; wherein said types include a first type indicative of generating a condition code and a second type indicative of not generating said condition code, said condition code corresponds to a result of execution of said instruction; and a condition code generation unit which generates said condition code of said instruction corresponding to said first type during execution of said instruction corresponding to said second type being executed after said instruction corresponding to said first type, wherein said condition code generation unit generates said condition code upon a flag corresponding to said preceded instruction indicating said first type and said flag corresponding to said instruction under execution indicating said second type.