1. A method for improving the performance of an in-order processor comprising the steps of: detecting an exception at or before a completion point for an execution pipeline, wherein said execution pipeline comprises a backup pipeline and a regular pipeline, wherein said backup pipeline stores a copy of instructions issued to said regular pipeline; asserting an upper stall point to prevent instructions from entering said backup pipeline and said regular pipeline; asserting a lower stall point to prevent instructions from flowing out of said backup pipeline; flushing instructions younger than an instruction causing said exception in said regular pipeline; handling said detected exception; and allowing instructions to flow from said backup pipeline to said regular pipeline.