1. A processor comprising: a lock manager including a counter to maintain a count of aborted transactions and an inflation logic to control a mode of operation for a transactional memory system based at least in part on the count, the lock manager, in a first mode of operation, to enable a transaction to access data associated with a lock variable without acquiring the lock variable, use the data, commit if a value of the lock variable has not changed from the time of access to the time of commitment, and otherwise abort, wherein the lock manager is to increment the count of aborted transactions if the transaction is aborted, wherein the count is associated with a group of lock variables including the lock variable and the inflation logic is to dynamically change a mode of operation of the lock variable from an optimistic concurrency mode corresponding to the first mode of operation to a pessimistic concurrency mode based in part on the count.