1. A method comprising: receiving by a computer system an input program; dividing by the computer system code of the input program for execution by a system comprising a plurality of computation units interconnected by an interconnection network into memory analysis regions, with a memory analysis region including at least one scheduling region that is fully contained in exactly one memory analysis region; performing by the computer system memory analysis on each memory analysis region individually to partition static memory references into equivalence classes; identifying by the computer system the equivalence classes and for a standalone program without cache coherence, further comprising: determining whether the input program is standalone and has full control of its memory; and performing global analysis on memory accesses to divide memory accesses and objects into the equivalency classes.