1. A method for executing program instructions on a processor, comprising: issuing instructions for execution during a normal-execution mode; and upon encountering an unresolved data dependency during execution of an instruction, speculatively executing subsequent instructions in a lookahead mode to prefetch future loads, wherein when an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to an architectural register, and instead the architectural register is marked as invalid, and wherein not updating architectural registers eliminates the need to checkpoint the architectural registers prior to entering the lookahead mode.