1. A non-volatile memory storage system, comprising: a non-volatile storage array; an interface to a host system, the interface configured to receive a command from the host system; and a processor configured to process the command, the processor including: a high performance path, including a pre-allocated memory buffer, capable of submitting a plurality of parallel command accesses to the storage array, the high performance path configured to reduce command processing delay, and a low performance path capable of submitting a plurality of sequenced command accesses to the storage array, wherein the processor is configured to determine whether the command is suitable for processing with the high performance path.