1. A method of controlling region coherence in a shared-memory multiprocessor system, the method comprising: generating a request by a processor for a line of data storable in a first subregion of a region of system memory; determining a region coherence state of the first subregion which indicates whether another processor has cached at least one line of data of the first subregion; and updating a region coherence array (RCA) associated with the requesting processor responsive to determining the region coherence state of the first subregion.