1. A computing device configured to design a quantum circuit comprising: a first module configured to group entries other than identity (I) entries in a quantum Karnaugh map into one or more groups, and to determine a plurality of sets of groups, wherein each group is comprised of neighboring entries, and the number of the neighboring entries of each group is 2 n (n is an integer equal to or greater than zero); a second module configured to determine a plurality of quantum circuits corresponding to the quantum Karnaugh map based on the plurality of sets of groups, wherein the plurality of sets of groups are decomposed into C-NOT gates and single qubit gates; a third module configured to determine a number of single qubit gates and C-NOT gates required for each of the plurality of quantum circuits; and a selector configured to select a quantum circuit having a minimum number of single qubit gates and C-NOT gates among the plurality of quantum circuits.