1. A method for controlling access by the processor core of a semiconductor device to the local memory of the semiconductor device, comprising the steps of: performing a read operation to a first memory location; placing the content of the first memory location on a data bus coupled between the semiconductor device and the local memory; comparing the content of the first memory location to the content of a second memory location; and permitting the processor core to receive data from the local memory if the content of the first memory location is identical to the content of the second memory location.