1. An information processing method for performing processing according to a generated instruction by using a CPU that comprises at least one register, said method comprising the steps of: a step for judging whether or not each of said registers in said instruction is valid; a step for identifying a register whose value is changed by interrupt processing generated in said instruction; and a step for calculating a number of registers to be evacuated in said interrupt processing based on valid judgment information of said register and identification information of said register whose value is changed by said interrupt processing, and then determining whether or not said interrupt processing is permitted based on a calculation result thereof.