1. A method for managing memory in a processing system, comprising: allocating memory among a plurality of elements; configuring rules for each element, wherein at least some of the rules associated with a first type of element control updates to memory allocated to a second type of element; and providing a system clock defining a step interval during which certain of the rules are executed, wherein execution of the certain rules for two or more elements of the same type is order-independent during the step interval, wherein the plurality of elements are interconnected according to a graph representative of a neuronal network.