1. A computer program product for detecting conflicts and managing transaction execution (TX) memory, by a hierarchical cache of a multi-processor system, the hierarchical cache comprising a plurality of local caches and a higher level cache, wherein each local cache is associated with a corresponding single processor, wherein each cache comprises a cache controller, wherein the higher level cache is any one of a shared cache associated with a plurality of processors and a non-shared cache associated with a single processor, wherein the single processor is any one of a single thread core and a multi-threaded core, wherein the higher level cache supports any one of processors and processors having corresponding accelerators, the computer program product comprising: a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: beginning execution of a first transaction, by a first processor thread, the first transaction comprising memory access instructions, wherein the first transaction causes an accelerator co-processor associated with the first processor to perform an accelerator co-processor operation on behalf of the first processor, and wherein the accelerator co-processor operation is part of the first transaction, and wherein the first transaction and the accelerator operation are identified by a same transaction identifier (ID); setting transaction indicators, by the first processor, in a directory of the higher level cache, wherein store data of memory-operand-access operations are stored in the local cache, the transaction indicators comprising a first transaction identifier (ID), read-set indicators, and write-set indicators, wherein the first transaction ID comprises a processor number and thread number, wherein the transaction ID uniquely identifies each of a plurality of transactions executing on the plurality of processors and accelerator co-processors connected to the higher level cache; and setting transaction indicators, by the accelerator co-processor, in the directory of the higher level cache, wherein store operations of the accelerator co-processor bypass the local cache, wherein the transaction indicators comprise the first transaction identifier (ID) corresponding to the first transaction, read-set indicators, write-set indicators.