1. A method of erasing a chalcogenide variable resistance memory cell which includes at least a chalcogenide variable resistance memory element formed over a doped substrate of a first conductivity type, said doped substrate containing a well of a second conductivity type, the method comprising: applying to the chalcogenide variable resistance memory element a voltage that is less than a fixed voltage of the substrate to thereby induce an erase current to flow through the substrate and contained well and through the chalcogenide variable resistance memory element.