1. In a microcomputer containing an implementation of a finite state machine (FSM) that controls a process wherein a plurality of input signals received by the FSM correspond to monitored process conditions and output signals generated by the FSM correspond to commands that effect changes in parameters associated with the process, the FSM having a plurality of states and sets of selection vectors, logical data selectively stored in the selection vectors to define logical conditions, a method for implementing the FSM with minimized memory required by the microcomputer comprising the steps of: a) storing in a first portion of memory of said microprocessor only said sets of selection vectors containing said logical data; b) storing an index in a second portion of memory of said microcomputer for each state of said FSM, said index containing an address indicator corresponding to each set of said selection vectors; c) during the operation of said FSM in a current state, said microprocessor accessing one of said sets of selection vectors via reading a corresponding one address indicator from a corresponding index.