1. A memory controller circuit of an emulation system configured to execute read and write commands associated with memories of the emulation system, the memory controller comprising: a memory block of the emulation system, the memory block comprising: one or more memories configured to store one or more data bits at memory addresses in the one or more memories; and a comparator logic circuit coupled directly to the one or more memories and a first register configured to store a set of pattern bits, the comparator logic circuit configured to generate a set of one or more output bits based upon comparing at least a portion of the set of pattern bits received from the first register and a set of one or more data bits read from one or more of the one or more memories, in accordance with a query-type instruction such that the memory block is configured to emulate a content addressable memory (CAM) or ternary content addressable memory (TCAM) within the emulation system; and a test block of the emulation system, the test block comprising one or more circuits, including state machine circuit configured to, upon receiving a query instruction signal, transmit a special read instruction signal to the memory block, the special read instruction comprising the query-type instruction, the set of pattern bits to be stored into the first register, and a set of one or more memory addresses of the one or more data bits to be read into the comparator logic circuit, wherein the special read instruction further comprises an indication to the memory block that a CAM or TCAM query will begin and a parameter indicating an execution mode of the CAM or TCAM query.