1. A method for optimizing the storage of a working set of a plurality of lines of operating memory into a cache memory during execution of an application by a processor including the steps of: (a) tracing the application while it is running in the working set by the processor to obtain trace information. including cache access statistics for objects within the working set under a first caching scheme; (b) analyzing the cache access statistics by the processor to obtain collision information which reveals lines of operating memory that collide in cache memory; (c) determining a second cache mapping scheme which eliminates collisions between lines of operating memory by the processor, including the substep of: (c-1) assigning addresses to the objects using a cache-miss prediction algorithm; and (d) executing system calls by the processor to effect the second cache mapping scheme.