1. A non-volatile memory device structure, comprising: a substrate having a surface region; a first dielectric material overlying the surface region of the semiconductor substrate; a first cell, the first cell comprising a first wiring structure extending in a first direction overlying the first dielectric material, a second wiring structure extending in a second direction orthogonal to the first direction, a first contact region comprising a p+ polysilicon material, a first switching region comprising an amorphous silicon material disposed in a first via structure in a portion of a second dielectric material and in an intersection region between the first wiring structure and the second wiring structure; and a second cell, the second cell comprising the first wiring structure and a third wiring structure separated from the second wiring structure and parallel to the second wiring structure, a second contact region comprising the p+ polysilicon material, a second switching region comprising the amorphous silicon material disposed in a second via structure in a second portion of the second dielectric material, the first via structure comprising the first switching region being physically and electrically isolate from the second via structure comprising the first switching region; wherein the amorphous silicon material is substantially free of dopants.