1. A computer-implemented method for improving circuit reliability in circuit design so as to facilitate provision of a manufacturable description of a circuit, the method comprising: inputting a test stimulus, a stress test criterion, and a circuit schematic, to a computer-implemented circuit simulator; using the circuit simulator, simulating the circuit schematic; during the simulating, determining whether at least one circuit component is stressed by exposure to simulated conditions meeting the stress test criterion; modifying at least one of the circuit schematic and the test stimulus to increase the percentage of stressed circuit components, wherein modifying the circuit schematic comprises at least one of selectively bypassing voltage regulators and adding test connections; and tangibly outputting simulation results, in order to provide the manufacturable description of the circuit.