1. An integrated circuit device, comprising: a multi-dimensional interconnection network; and a plurality of input/out (I/O) cells located within the multi-dimensional interconnection network, each having a plurality of input terminals and at least one output terminal, wherein: a first subset of conductors is configured to form part of a normal-speed portion of the interconnection network; and a second subset of conductors is configured to form part of a second high-speed portion of the interconnection network, wherein each of the conductors of the high-speed portion is programmable to make at least part of a connection between the output terminal of substantially any one of the I/O cells and at least one of the input terminals of substantially any of the I/O cells.