1. A computer processing system comprising: a memory protection unit (MPU); a plurality of region descriptors associated with the MPU, wherein the region descriptors include address range and translation identifier values for a respective region of memory; a translation identifier control indicator (TIDCTL); and control logic operable to determine whether the translation identifier control indicator is in a first state, and if the translation identifier control indicator is in the first state, allow a first process being executed by the processing system to access a memory region allocated to a second process of the processing system.