1. A multiple-input, multiple-output system, comprising: M input ports configured to respectively receive a different one of M discrete-time input signals; an integrated inverse-sinc module configured to process the M discrete-time input signals to generate M discrete-time output signals in parallel; and M output ports configured to respectively provide a different one of the M discrete-time output signals; wherein the integrated inverse-sinc module is configured to generate the M discrete-time output signals such that, when the M discrete-time output signals are interleaved to produce a first signal, the first signal is equivalent to that produced by an inverse-sinc filter operating on a second signal created by interleaving the M discrete-time input signals.