1. A memory device, comprising: a number of memory cells; and control circuitry coupled to the memory cells and configured to: in response to a failure of an error correction operation performed on data associated with a determined state of the memory cells, perform a sense operation on the memory cells using a sensing voltage to determine soft data associated with a target state of the memory cells; perform an error correction operation on the soft data; and adjust a sensing voltage used to determine the target state if the error correction operation does not result in a failure.