1. A method implemented in a processing device having a processor that executes the method for: sampling power signals of the processing device, the power signals include information for power, voltage, and current for the processing device, and the power signals include rotations per minute readings for a fan of the processing device, and the power signals are sampled from an alternating current power supply feed and a direct current power supply draw, wherein the power signals are produced by the alternating current and direct current power supplies and are variable signals that vary in response to disk access, memory access, and movement of disk heads; wherein sampling further includes sampling a first alternating current (AC) or a first voltage from a power supply of the processing device to acquire a first value; and sampling a second direct current (DC) or second voltage from a power supply drawn from the processing device to acquire a second value; generating a bit from the power signals, wherein generating further includes combining the first and second value to derive bit, wherein the first and second values are logically combined and weighted based on a first upper and lower bound for the AC power supply relative to the first value and second upper and lower bound for the DC power supply relative to the second value; and concatenating the bit into a first register of the processing device, wherein the concatenated bit in the first register forms a portion of a random number.