1. A computer-readable memory storing a plurality of instructions for causing a processor to perform operations, the plurality of instructions comprising: instructions that cause the processor to determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream, the instructions that cause the processor to determine that multiple portions of a continuous event processing (CEP) query can be executed concurrently relative to an event in an event stream comprising: instructions that cause the processor to split the CEP query into a plurality of separate operators; instructions that cause the processor to determine a separate ordering constraint for each particular operator within the plurality of separate operators; instructions that cause the processor to determine an ordering constraint for the CEP query based at least in part on the ordering constraints that the processor determined for the plurality of separate operators; and instructions that cause the processor to determine, based on the ordering constraint for the CEP query, whether the multiple portions of the CEP query can be executed in a concurrent manner; and instructions that cause the processor to execute the multiple portions of the CEP query concurrently against a first event received via the event stream, the instructions that cause the processor to execute the multiple portions of the CEP query concurrently against a first event received via the event stream comprising: instructions that cause the processor to spawn multiple threads of execution that concurrently process the multiple portions of the CEP query against the first event received via the event stream in response to determining that the multiple portions of the CEP query can be executed in a concurrent manner.