1. A bifurcated scheduler for dispatching instructions in a multithreading processor configured to concurrently execute a plurality of threads, the scheduler comprising: first scheduler logic, configured to issue instructions of the plurality of threads to at least one execution unit of the processor; second scheduler logic, for enforcing a scheduling policy of the plurality of threads; and an interface, coupling said second scheduler logic to the first scheduler logic and to said at least one execution unit, said interface comprising: first signals, for said first scheduler logic to receive from said second scheduler logic a priority for each of the plurality of threads, wherein said first scheduler logic issues said instructions to said at least one execution unit based on said priorities; and second signals, for said second scheduler logic to receive instruction execution information for each of the plurality of threads, wherein said second scheduler logic updates said priorities based on said instruction execution information.