1. A cellular phone comprising: a random access memory (RAM); a wireless transceiver; and a processor coupled to the RAM and the wireless transceiver, the processor comprising: a plurality of levels of cache including a Level 1 (L1) cache; a plurality of integer registers; a plurality of registers in which to store floating-point data elements including 128-bit packed double operands that are to have two 64-bit double floating-point data elements; a plurality of status registers; an instruction pointer register; an instruction prefetcher to fetch instructions; a decoder to decode the fetched instructions including an instruction to perform a shift and exclusive OR (XOR) operation, wherein the instruction to perform the shift and XOR operation has a first source operand identifier to identify a first source operand, a second source operand identifier to identify a second source operand, an immediate field to specify a shift amount, and a field to identify the first and second source operands as being one of a 32-bit source operand and a 64-bit source operand; and an execution unit coupled to the decoder, such that the processor, in response to the instruction to perform the shift and XOR operation, is to: shift the first source operand by the shift amount specified by the immediate field, wherein the first source operand is a scalar value, XOR the shifted first source operand with the second source operand, and store a resulting shifted and XOR'ed value in a destination register, wherein the destination register is a scalar register; and a floating-point unit to operate on floating-point data elements.