1. A semiconductor storage device comprising: multiple memory strings each having a plurality of memory cells connected in series, each of the memory cells having a charge storage layer and a control gate; select transistors each provided for and connected in series with the memory cells of one of the memory strings; first and second blocks each configured with a plural number of the memory strings; word lines connected to the control gates of the memory cells; and select gate lines each connected to a gate of one of the select transistors, wherein: when data are written in the first block, after a select gate line connected to the gate of a select transistor of one of the memory strings in the first block is selected, the data are sequentially written in the memory cells in the memory string connected to the selected select gate line; and when data are written in the second block, after a word line connected to the control gates of memory cells of different memory strings in the second block is selected, the data are sequentially written in the memory cells of the different memory strings in the second block which have their control gates connected to the selected word line.