1. A method for operating a Reduced Instruction Set Computer (RISC) processor that executes normal RISC instructions and special RISC instructions, comprising the steps of: controlling the RISC processor to perform a single operation, using a single functional unit of the RISC processor, in response to each normal RISC instruction; and controlling the RISC processor to perform multiple operations, using multiple functional units of a non-data-bus data path of the RISC processor in parallel, in response to each special RISC instruction, wherein said functional units are chosen from a group consisting of arithmetic units and logic units.