1. A neuromorphic compiler comprising: a placement module to provide analytic placement of neurons in a neural network description, the analytic placement to produce placed neurons; a smoothing module to perform diffusion-based smoothing of the placed neurons; a legalization module to adjust locations of the placed neurons following the diffusion-based smoothing to correspond to legal locations of neuromorphic neurons within a neural fabric; and a simulated annealing module to refine locations of the placed neurons within the neural fabric using simulated annealing following location adjustment by the legalization module, wherein one or both of the neural fabric and the neuromorphic neuron within the neural fabric comprises a physical circuit, the neural fabric being configured to implement a synaptic time-multiplexed (STM) neuromorphic network.