1. A method comprising: clamping a signal of a wordline to a particular voltage so as to isolate at least one non-volatile memory element of an array of non-volatile memory elements of an integrated device in response to a start of a power up procedure for the integrated device, the integrated device comprising a peripheral device including a memory controller capable of accessing the at least one non-volatile memory element at least in part by generating the signal of the wordline, the power up procedure comprising applying an external power source signal to the integrated device followed by powering one or more first voltage sources to generate one or more programming signals for a write operation on the at least one non-volatile memory element and one or more second voltage sources for powering the peripheral device, the at least one non-volatile memory element being isolated from the one or more first voltage sources and the one or more second voltage sources so as to protect a current memory state of the at least one non-volatile memory element during the power up procedure; powering the one or more first voltage sources and the one or more second voltage sources; and unclamping the signal of the wordline following the powering of the one or more first voltages sources and the one or more second voltage sources.