1. A method of processing in a multiprocessor data processing system including a memory hierarchy including a store-through upper level cache, a lower level cache and a system memory, said method comprising: in response to executing a load-and-reserve instruction in a processor core, wherein said load-and-reserve instruction is characterized by setting a reservation in a unit of reservation logic: the processing core sending a load-and-reserve operation for an address to said lower level cache of said memory hierarchy, invalidating data for said address in said store-through upper level cache, and placing data returned from said lower level cache of said memory hierarchy into said store-through upper level cache.