1. A processor apparatus comprising: an instruction set including: a complex conditional branch instruction for performing respective comparison operations on a plurality of conditions that make up a complex condition specified therein, for comparing results of the comparison operations with a branching condition value specified therein, and for performing branching to a branch target specified therein, based on the comparing result; and a condition setting instruction for specifying a complex condition and one condition out of a plurality of conditions that make up the complex condition and for setting said one condition; said apparatus further comprising: a complex condition setting storage unit that stores one or more complex conditions, each of which is made up of a plurality of conditions set on execution of a plurality of said condition setting instructions; a condition comparison unit that performs, on execution of said complex conditional branch instruction, respective comparison operations on the plurality of conditions that make up said complex condition specified by said complex conditional branch instruction, out of the one or more complex conditions stored in said complex condition setting storage unit; and a complex condition branching decision unit that compares the results of the comparison operations performed by said condition comparison unit with the branching condition value specified by said complex conditional branch instruction to determine whether or not branching to the branch target specified by said complex conditional branch instruction is to be performed.