1. A method for verifying target data that includes circuit data cells and cellviews used in a circuit design, the method comprising: receiving an indication of at least one policy, the at least one policy referencing at least one rule, wherein the at least one rule is applied in accordance with a particular stage of multiple stages in a design flow for producing a finalized circuit design; and initiating a verification process on the target data using at least one processor by performing at least one verification check on the target data in accordance with the at least one rule, wherein the verification process includes an option to override at least one attribute of the at least one rule and to customize the at least one verification check.