1. A ROM-based multiple match system comprising: a plurality of input hitlines that communicate digital information related to whether an input word matches at least one stored word within an addressable memory; a ROM, coupled to the input hitlines, that processes the digital information using a plurality of column pairs, each column pair having a first column that is complimentary to a second column; and combinational logic, coupled to the ROM, that digitally processes data from the ROM and provides a multiple match output signal identifying an occurrence of a multiple match to the input word.