1. A three-dimensional mask-programmable read-only memory including a plurality of mask-programmable read-only memory levels stacked above and coupled to a semiconductor substrate, comprising: a first memory cell comprising a first resistive layer; a second memory cell comprising a second resistive layer; a third memory cell comprising said first and second resistive layers; wherein each of said first, second and third memory cells comprises a quasi-conduction layer, and said first, second and third memory cells have different current-voltage characteristics.