1. A processor comprising: an instruction execution pipeline having a functional unit to execute an instruction that compares vector elements of a vector against an input value, each of the vector elements and the input value having a first respective section to store a location of a byte sequence within data and a second respective section to store the byte sequence of the data, the functional unit having: comparison circuitry to compare respective byte sequences of the vector elements against the input value's byte sequence to identify a number of matching bytes for each comparison from the second respective sections; and difference circuitry to determine respective distances between said vector elements' byte sequences and said input value's byte sequence within said data from the first respective sections.