1. A method for calculating at least one multiply-sum of two carry-less multiplications of two input operands, the method comprising: using input data busses for said input operands and an output data bus for an overall calculation result, each bus comprising a width of 2n bits, where n is an integer greater than one; calculating said carry-less multiplications of said two input operands for a lower level of a hierarchical structure; calculating said at least one multiply-sum and at least one intermediate multiply-sum for a higher level of the hierarchical structure based on said carry-less multiplications of the lower level; and outputting a certain number of multiply-sums as overall calculation result dependent on mode of operation using the full width of said output data bus.