1. A method of decoding a macroinstruction, the macroinstruction including an operational code (opcode) and a specification of an operand, the method comprising: generating a first micro-instruction for execution by an execution unit of a processor, the first micro-instruction being generated responsive to an opcode of the macroinstruction; and generating a second micro-instruction for execution by an execution unit of the processor as a micro-instruction distinct and separate from the first micro-instruction, the second micro-instruction being generated responsive to only the specification of the operand of the macroinstruction, wherein the specification of the operand requires an operand data shifting operation or a memory address calculation operation prior to execution of the first micro-instruction generated responsive to the opcode of the macroinstruction.