1. A computer system, comprising: compression logic configured to compress a plurality of instructions having a same instruction function, wherein each of the plurality of instructions comprises at least one operand, wherein the operands in each of the plurality of instructions are allocated to a plurality of consecutive registers, and wherein a compressed instruction comprises compression data; decompression logic configured to decompress the compressed instruction, wherein the compression data is utilized to generate a plurality of decompressed instructions; and instruction queue logic configured to store the plurality of decompressed instructions, wherein the instruction queue logic is further configured to partition an instruction register for processing the plurality of decompressed instructions in a first instruction queue and a second instruction queue.