1. A system for accessing flash memory, the system comprising: a memory having a set of computer readable computer instructions, and a processor for executing the set of computer readable instructions, the set of computer readable instructions including: establishing a physical memory address space which includes a flash memory portion; detecting, with respect to the physical memory address space, an access request; maintaining an adapter cache to facilitate an interface with respect to the flash memory portion of the physical memory address space; accessing, using a load-store technique to process the access request using the adapter cache, the flash memory portion of the physical memory address space; determining, in response to processing the access request by a field-programmable gate array adapter, that a set of requested data is not in the adapter cache; establishing, in response to determining that the first set of requested data is not in the adapter cache, a first interrupt; retrieving, from the flash memory portion of the physical address space, the set of requested data; and establishing, in response to retrieving the set of requested data from the flash memory portion of the physical address space, a second interrupt.