1. A processor-implemented method, comprising: inputting a behavioral description of a circuit; inputting a simulation test bench for the circuit; inputting a library that includes at least one synchronous element; wherein the synchronous element includes code that, when simulated, outputs tracking information including a minimum number of clock cycles between state changes for terminals of the synchronous element; wherein the code is not implemented in a realization of the circuit and is used only for simulation of synchronous elements; synthesizing the behavioral description to generate a netlist description of the circuit; wherein the netlist description includes at least one instance of the synchronous element; simulating the netlist description using the simulation test bench and the library; and wherein the simulating outputs a description of all multi-cycle paths in the netlist description based on the tracking information output by all instances of the synchronous element in the netlist description.