1. Apparatus for decoding a selectable computer operation code, said apparatus including clock means for generating sequential timing signals, and a programmable logic array comprising an AND array to which a selected operation code is provided as an input and an OR array from which decoded output signals appear as sequential output signals, characterized by: the AND array providing for each selectable operation code a corresponding unique output; a plurality of sequencer means, one sequencer means for each unique output from the AND array, at least one sequencer means being coupled to said clock means and being responsive to said sequential timing signals produced by said clock means and to its corresponding unique output from said AND array for generating for the corresponding operation code a plurality of sequential time state signals comprising the input to said OR array; and said OR array being responsive to said sequential time state signals for generating a plurality of decoded sequential output signals representing a decoding of said corresponding operation code.