1. A nonvolatile memory cell string comprising: two or more cell devices formed in series on a wall type semiconductor protruded from a semiconductor substrate with a predetermined length along one direction to form the cell string, wherein one end of the cell string is electrically connected to outside through one or more string selection transistors formed on one end of the wall type semiconductor, wherein each of the cell devices is formed on a first semiconductor layer doped with a specific type of impurity on an upper part of the wall type semiconductor and a second semiconductor layer doped with a type of impurity opposite to the first semiconductor layer for forming a PN junction at a lower part of the first semiconductor layer, wherein a gate insulating layer stack covering the PN junction is formed on a part of the wall type semiconductor, the gate insulating layer stack containing a charge storage of each of the cell devices; and wherein a gate electrode of each of the cell devices is formed on the gate insulating layer stack in transverse direction of the wall type semiconductor, the gate electrode covering the PN junction.