1. An integrated circuit comprising a plurality of digital signal processors, each comprising a signal processing core, a memory coupled to the processing core, a multiplexed data input coupled to the memory, for writing received data into the memory, and an output circuit with an input coupled to the signal processing core and a plurality of outputs for outputting data from the signal processing core; a remote write only structure coupling outputs of respective groups of the digital signal processors each to the multiplexed data input of a respective particular digital signal processor for that respective group, the respective group for the particular digital signal processor not including the particular digital signal processor.