1. A memory space translation mechanism for emulating a first data processing system on a second data processing system, the first data processing system including at least one user program and at least one executive program for managing operations of the first data processing system, a hardware platform including a plurality of input/output devices and a memory for storing data and programs, and at least one user task performing user level program operations and at least one executive task performing executive program operations, wherein the user and executive tasks generate first data processing system virtual addresses referring to locations in the first data processing system memory and the first data processing system includes an input/output level including a plurality of input/output drivers for controlling first data processing system input/output devices in response to first data processing system executive and user task operations, including a memory management unit for translating first data processing system virtual addresses into physical addresses in the first data processing system memory, and wherein the first data processing system memory includes a first data processing system system area for use by the data processing system executive tasks and at least one first data processing system user area for use by the first data processing system user tasks and wherein access privileges to each first data processing system system memory area is determined by the type of task associated with a first data processing system virtual address referencing the first data processing system memory area and the type of the first data processing system system memory area, and wherein each first data processing system virtual address includes a virtual address and an area type value representing the type of first data processing system system memory area, the memory translation mechanism executing in the second data processing system to perform first data processing system memory operations for first data processing system executive and user tasks executing on the second data processing system and comprising: a second data processing system system memory organized as a plurality of memory segments, wherein first memory segments of the second data processing system memory are designated to correspond to first data processing system system memory areas and second memory segments of the second data processing system memory are designated to correspond to first data processing system user memory areas, and wherein each memory segment corresponds to a type of first data processing system system task and thereby to a type of a first data processing system memory area, an interpreter for mapping first data processing system virtual addresses into the memory segments of the second data processing system memory, including an address translation mechanism, including a task type memory for storing an identification of the type of a task corresponding to a first data processing system virtual address, a segment adder for determining a memory segment of the second data processing system memory corresponding to the first data processing system virtual address, including reading the identification of the type of the task corresponding to the first data processing system virtual address from the task type memory, reading the area type value from the first data processing system virtual address, and determining a memory segment of the second data processing system memory corresponding to the type of the first data processing system task and thereby to the type of first data processing system area referenced by the first data processing system virtual address, a memory pool mapping mechanism, including a pool memory for storing memory pool identifiers, each memory pool identifier corresponding to a first data processing system task, and the memory pool mapping mechanism being responsive the first data processing system task associated with the first data processing system virtual address for providing the corresponding memory pool identifier, and a plurality of pseudo device drivers in the second data processing system, each pseudo device driver corresponding to a first data processing system input/output device, each pseudo device driver including a segment mapping mechanism, including a segment pool memory residing in the second data processing system memory for storing entries relating memory pool identifiers with segment base addresses identifying the locations in the second data processing system memory of the first and second memory segments of the second data processing system memory, the segment mapping mechanism being responsive to the memory pool identifier associated with the first data processing system virtual address for providing a corresponding base address identifying the location of the corresponding memory segment of the second data processing system memory in the second data processing system memory.