1. A three-device non-volatile memory cell comprising: a first resistive device; a second resistive device; and a third resistive device; in which the first resistive device, the second resistive device, and the third resistive device each comprise a doped region; in which the doped regions of the first resistive device, the second resistive device, and the third resistive device are coupled to a common conductor, and in which one of the first resistive device, the second resistive device, and the third resistive device is functionally mutually complimentary with one of the other of the first resistive device, the second resistive device, or the third resistive device at any time after initialization of the memory cell.