1. An integrated circuit structure for use in identifying a parallel disconnect signal provided on an analog transmission medium, the integrated circuit structure comprising, a central processing unit that executes instructions to perform data processing operations, the data processing operations including a successive approximation analog-to-digital conversion operation to provide a digital output signal based upon an input data signal; a pulse width modulation (PWM) element that converts the digital output signal generated by the central processing unit to a square-wave output signal having a duty cycle corresponding to the digital output signal, the PWM element adapted for connection to an external low pass filter that is not formed as part of the integrated circuit structure such that the square-wave output signal is provided as an input to the external low pass filter, the external low pass filter providing an output signal corresponding to the duty cycle of the square-wave output signal; and an input port adapted for connection to an output of an external comparator that is not formed as part of the integrated circuit structure, the external comparator receiving as inputs the output of the external low pass filter and the parallel disconnect signal provided by the analog transmission medium and providing said external comparator output a digital signal corresponding to a difference between the output of the external low pass filter and the signal provided by the analog transmission medium, the input port connected to provide the output of the comparator as the input data signal to the central processing unit.