1. A spike domain asynchronous neuron circuit comprising: a first spike to exponential circuit for emulating kinetic dynamics at a neuron input and converting voltage spikes into exponentials, the first spike to exponential circuit having a first plurality of voltage-type spike domain inputs and having a first voltage-type spike exponential output; a first adjustable gain circuit for emulating homeostatic plasticity coupled to the first voltage-type spike exponential output and having a first current output; a neuron core circuit coupled to the first current output for emulating a neuron core and having a spike encoded voltage output; a filter and comparator circuit coupled to the spike encoded voltage output and having a gain control output coupled to the first adjustable gain circuit for controlling a gain of the first adjustable gain circuit; and an adjustable delay circuit for emulating an axonal delay coupled to the spike encoded voltage output and having an axonal delay output.