1. A microprocessor to be connected to a first memory through a first bus and to a second memory through a second bus, the microprocessor comprising: a processing unit; a program access bus connected to said processing unit; a data access bus connected to said processing unit; and a bus interface unit connected to the first and second buses, to said program access bus and to said data access bus, said bus interface unit comprising a first switching circuit for connecting said program access bus to either the first bus or the second bus in accordance with a program access request sent by said processing unit, and a second switching circuit for connecting said data access bus to either the first bus or the second bus in accordance with a data access request sent by said processing unit.