1. A semiconductor memory device comprising: a write data controller writing data received with an address to a first memory cell corresponding to the address and simultaneously storing the data in a data register; an address controller decoding and storing the address in an address register; and a read data controller outputting data from a second memory cell corresponding to an address received with a data read command if the received address is different from the address stored in the address register, and outputting the data stored in the data register if the received address is equal to the address stored in the address register.