1. A system, comprising: a memory having a plurality of memory blocks; a memory directory having a read/write bit associated with each memory block of the plurality of memory blocks and logic configured to set the read/write bit when the memory block associated with the read/write bit has been read by more than one processor and written by at least one other processor and presence bits associated with each memory block of the plurality of memory blocks that indicate which processors have or have had a copy of the associated memory block; and at least two processors, wherein each processor includes a cache to store one or more memory blocks of the plurality of memory blocks as cache lines and logic configured to update the presence bits in the memory directory when replacing an unmodified one of the cache lines in the cache of the processor only when the associated read/write bit is set.