1. A method of register allocation in a computer instruction set having tiered instructions that accesses differing numbers of registers comprising the steps of: making a first preliminary attempt to allocate registers using an initially specified register set for each instruction; if the first preliminary attempt to allocate registers fails identifying any tiered instruction having an initially specified register set less than all registers having an input or output variable not register allocatable, and making a second preliminary attempt to allocate registers using the initially specified register set for each instruction except using a less restrictive register set for the identified tiered instructions.