1. An integrated circuit design platform, comprising: a field programmable gate array (FPGA) prototype device comprised of: a circuits layout comprising a plurality of field programmable logic blocks and a plurality of layers of field programmable interconnects; and a set of input/output pad structures; and a first region within the circuits layout, said region having registers at one or more boundaries of the region, said registers capable of coupling to said input/output pad structures; and a metal programmable gate array (MPGA) production device fabricated separately from the FPGA prototype device, the MPGA production device comprised of: a substantially identical circuit layout as in the first region of the FPGA; and a substantially identical layout of one or more layers of programmable interconnects as in the first region of the FPGA; wherein, a design mapped to the first region of the FPGA is identically mapped to the MPGA.