1. An apparatus comprising: a memory management unit configured to receive memory access requests from a plurality of I/O devices and to implement a protection mode; wherein, while executing in the protection mode, the memory management unit is configured to prevent memory accesses by the plurality of I/O devices by mapping each of the memory access requests to the same set of memory address translation data; and wherein, while not executing in the protection mode, the memory management unit is configured to permit memory access requests from the plurality of I/O devices by mapping different memory access requests to different respective sets of memory address translation data.