1. A method for processing instructions in a data processor in which instructions may be issued out of program order, the method comprising the steps of: issuing and executing a first instruction; initiating issuance of a second instruction during a speculative time window of the first instruction, the speculative time window occurring after the first instruction is issued; executing the issued second instruction when the first instruction is executed in a first manner; reissuing the second instruction and executing the reissued second instruction when the first instruction is executed in a second manner which is different than the first manner; identifying an occurrence of at least one cache miss when multiple load instructions are executed; issuing and executing a load instruction after an occurrence of at least one cache miss is identified; delaying issuance of a dependent instruction during a speculative time window of the first load instruction, when the dependent instruction depends on the instruction; and issuing the dependent instruction after the speculative time window of the load instruction has elapsed, and executing the issued dependent instruction.