1. A data processor, comprising: a first port; a second port; a first storage circuit for storing a plurality of control values; a second storage circuit; a first switch circuit coupled between the first port and the second port, the first switch circuit being in either a conducting mode or a non-conducting mode in response to a first one of the plurality of control values; and a first tap circuit coupled between the first port and the second storage circuit, the first tap circuit being in either the conducting mode or the non-conducting mode in response to a second one of the plurality of control values, wherein if first information is transferred into said data processor by way of said first port said first tap circuit does not require that said first information include any address information in order for said first tap circuit to determine if at least a portion of said first information is to be stored in said data processor.