1. A method for forming a first plurality of memory cells, the method comprising: forming a plurality of substantially parallel first conductors extending in a first direction at a first height above a substrate; forming a plurality of first semiconductor pillars at a second height above the substrate, wherein the second height is different from the first height; forming a plurality of first silicide layers above the first semiconductor pillars; forming a plurality of first dielectric rupture antifuses disposed above the first silicide layers.