1. A test apparatus that tests a device under test, comprising: a test module that communicates with the device under test to test the device under test; and a control apparatus that executes a first test program and a second test program, stores an execution order of the first test program and the second test program, causes the test module to perform a first test and a second test corresponding respectively to the first test program and the second test program, receives a first test result corresponding to the first test and a second test result corresponding to the second test from the test module, and performs result processes on the first test result and the second test result in parallel such that, among the result processes, a predetermined result process common to the first test result and the second test result is performed on the first test result and the second test result in an order indicated by the stored execution order, wherein the test module includes a first memory and a second memory that store the first test result and the second test result, and the test module performs the first test and the second test such that at least a portion of a result processing time period of the first test, which is from when the first test result stored in the first memory begins to be transmitted to the control apparatus to when performance of the result processes on the first test result by the control apparatus is finished, overlaps with at least a portion of a test execution time period of the second test, which is from when the second test is begun to when the second test result is stored in the second memory.