1. A programmable logic device, comprising: a function cell that provides a result logic value in response to one or more input logic values and a function vector, the function cell having an arithmetic logic circuit that in a first mode is operable to provide the result logic value as an arithmetic combination of the input logic values and in a second mode is operable to provide the result logic value as a logical combination of the input logic values, the arithmetic combination and the logical combination both determined by the function vector.