1. A system for secure execution of processor instructions, the system comprising: a first memory containing boot code and an image encrypted with a first key; a secure embedded processor system, comprising: a processor; an instruction cache in communication with said processor; a memory controller in communication with said instruction cache; and a security controller in communication with said instruction cache; and a second memory, external to said secure embedded processor system, in communication with said first memory, said memory controller, and said security controller, such that said image encrypted with said first key is transferred to said second memory, decrypted by said security controller, and re-encrypted by said security controller using a second key, and such that a cache line of said image encrypted with said second key is then read from said second memory, decrypted with said second key, and stored in staid instruction cache for execution by said processor.