1. A system comprising: a memory device including a plurality of memory buffers and a direct memory access (DMA) descriptor structure, the DMA descriptor structure comprising a transfer command and associated data transfer information and encryption/decryption information that is configured in a two dimensional, tree-linked structure; and a DMA controller communicatively coupled to the memory device, the DMA controller configured to transfer data to/from the memory buffers and encrypt/decrypt the data based on the transfer command and data transfer information and encryption/decryption information provided by the DMA descriptor structure.