1. An apparatus, comprising: a plurality of pages, wherein each page of the plurality of pages includes a plurality of memory cells; wherein each memory cell of the plurality of memory cells included in a given page of the plurality of pages shares a common isolation layer; and wherein each memory cell of the plurality of memory cells included in the given page of the plurality of pages is configured to store a quantity of electrical charge representative of a data value; and a processor configured to: store data in each memory cell of the plurality of memory cells included in a first page of the plurality of pages; store first protective data in memory cells included in a second page of the plurality of pages, wherein the second page is adjacent to the first page; and store second protective data in memory cells included in a third page of the plurality of pages, wherein the third page is adjacent to the second page.