1. A prefabricated programmable memory array comprising: a plurality of ternary content-addressable memory modules; at least one memory module of a type other than ternary content-addressable memory; a plurality of input ports; a plurality of output ports; a reconfigurable input logic fabric programmable to selectively interconnect said plurality of input ports with said plurality of ternary content-addressable memory modules and said at least one memory module of said type other than ternary content-addressable memory; and a reconfigurable output logic fabric programmable to selectively interconnect said plurality of output ports with said plurality of ternary content-addressable memory modules and said at least one memory module of said type other than ternary content-addressable memory.