1. An apparatus for facilitating management of instruction violations, comprising: replay logic to receive a recording, from a recording system, of a first software thread running a first macro instruction, and a second software thread running a second macro instruction, wherein the first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device, wherein the recording system to record interleavings between the first and second macro instructions; and the replay logic is further to correctly replay the recording of the interleavings of the first and second macro instructions precisely as they occurred, wherein correctly replaying includes replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.