1. A method for use in embedding a problem in a target processor, the problem represented as a problem graph having a number of decision variables and the target processor represented as a hardware graph having a plurality of vertices coupleable via a number of edges, the method comprising: in a first stage, successively generating a number of sets of connected subgraphs, each set including a respective subgraph for each decision variable in the problem graph, where adjacent decisions variables in the problem graph are mapped to respective vertices in the hardware graph, the respective vertices which are connected by at least one respective edge in the hardware graph; and in a second stage, following the first stage, refining the connected subgraphs created in the first stage such that no vertex represents more than a single decision variable.