1. In a heterogeneous computer system for executing software having at least one performance processor, a processor supporting logic supporting said at least one performance processor for executing tasks of said software and a hypervisor processor consuming less power than said at least one performance processor, a bridge logic device comprising: a hypervisor operation logic maintaining status of said system under said at least one performance processor; a processor language translator logic translating between processor languages of said at least one performance and said hypervisor processors; and a high-speed bus switch having first, second and third ports for relaying data across any two of said three ports bidirectionally and connected to said at least one performance processor at said first port, to said hypervisor processor via said processor language translator logic at said second port and to said processor supporting logic at said third port.