1. A queue comprising: a first queue memory being configured to receive and enqueue pointers, the first queue memory having a first access time; a second queue memory in communication with the first queue memory, the second queue memory having a second access time, the first access time being shorter than the second access time, the first queue memory permitting multiple pointers to be enqueued in the first queue memory within a single port cycle of the queue; and control logic configured to transfer a plurality of pointers from the first queue memory to the second queue memory in a single transfer cycle.