1. A resistance-switching memory cell, comprising: first and second electrodes; a conductive or semiconductive intermediate layer electrically between, and in series with, the first and second electrodes; a resistance-switching layer electrically between, and in series with, the first electrode and the conductive or semiconductive intermediate layer; and a breakdown layer electrically between, and in series with, the second electrode and the conductive or semiconductive intermediate layer, the breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state.