1. A debug system for processors in a multiprocessor system interconnected by a multi-node communication network, the system comprising: a debug network separate from the communication network, the debug network structured to operate regardless of a state of the processors; and a plurality of slave units coupled to the debug network, each of the plurality of slave units coupled to one of a respective plurality of processors in the multiprocessor system through a bi-directional information link and structured to retrieve information from and write data to its respective processor, at least one of the plurality of slave units structured to retrieve information from its respective processor while the respective processor is in operation, and also structured to retrieve information from its respective process while the respective processor is in a locked state because of a fault in execution.