1. An out of order processor, comprising: a distributed load queue and a distributed store queue that maintain single program sequential semantics while allowing an out of order dispatch of loads and stores across a plurality of cores and memory fragments; wherein the processor allocates other instructions besides loads and stores beyond the actual physical size limitation of the load/store queue; and wherein the other instructions can be dispatched and executed even though intervening loads or stores do not have spaces in the load store queue, wherein each of the plurality of cores within the processor includes a load queue and a store queue and an extension for the respective load queue and store queue for avoiding deadlocks by allocating deadlocked loads or stores in program order from a point of the load or store that causes a deadlock until the load or store queue has free entries available.