1. A method for working around a processing flaw in a processor, the method comprising: fetching at least one instruction from a memory location; decoding the at least one instruction; performing, in response to the decoding, an opcode compare operation with the at least one instruction and a set of values within at least one opcode compare register; and marking, based on the opcode compare operation, the instruction with a pattern, wherein the pattern indicates that the instruction is associated with a processing flaw.