1. A vector signaling code decoder comprising: a sorting circuit including a crossbar switch and one or more comparators configured to rank at least a subset of values of an input vector signaling code, wherein the comparators are further configured to perform pairwise comparisons among at least the subset of the values of the input vector signaling code; a voting circuit configured to designate ranked values as representing particular code elements; and a decoding circuit configured to translate sets of particular code elements into a decoded vector signaling code result.