1. A computing system, comprising: an intercomect means for providing information transfer; a main memory coupled to the interconnect means; an I/O adapter, coupled to the interconnect means, the I/O adapter including a translation map, the translation map mapping I/O page numbers to memory address page numbers, the trmslation map including coherence indices; and, a processor, coupled to the interconnect means, the processor including a cache and instruction execution means for, in response to an instruction executed by the processor, generating a coherence index to be stored in the translation map, the instruction execution memos performing in hardware a hash operation to generate the coherence index, wherein the I/O adapter is not contained within the processor; wherein when the I/O adapter forwards the coherence index from the I/O adapter to the processor during performance of a data transfer, the processor uses the coherence index to detect whether an updated version of relevant data resides within the cache, and when the processor detects that an updated version of relevant data resides within the cache, the updated version of relevant data is used for the data transfer rather than stale data within the main memory.