1. A method comprising: detecting assertion of an error pin by a processor system comprising at least a main processor and a chipset, the assertion of the error pin an indication to reboot the processor system, and the detecting by a reset circuit; notifying a management processor distinct from the main processor that the error pin is asserted, the notifying by the reset circuit; writing to a plurality of registers in the chipset, the writing by the management processor; de-asserting a reset pin of the main processor; and then executing by the main processor an error-handling code to generate an error log.