1. A multiprocessor comprising: a plurality of processor groups mutually connected via a first bus, each including at least one processor; a main storage memory for storing various kinds of data, said main storage memory being shared by each of processors forming each of said plurality of processor groups connected via a second bus; a cache memory arranged to each of said processors, for storing various kinds of data in said main storage memory in cache lines; a cache control unit for controlling a data read/write operation between each of said processors and said cache memory in a copy-back mode; a directory memory for storing the registration status of data stored in said main storage memory to said cache memory; and a directory control unit for storing the registration status of said cache memory into said directory memory in cache lines formed with a plurality of sublines when the value stored in said cache memory and the value stored in said main storage memory are in the same shared state and for updating no value stored in said main storage memory when said processor rewrites the value stored in said cache memory and for controlling to store the status of said cache memory and a destination holding a latest value into said directory memory in sublines in the case of a dirty status where the value stored in said cache memory is the latest value and the value stored in said main storage memory is an old value; said processor including an elapsed time counting unit for counting an elapsed time between the time an access signal is transmitted to said main storage memory and the time a response signal is received, and for outputting a time-out signal when a response signal is not received after said counted elapsed time has exceeded a predetermined time-out time; said directory control unit including a cache-access-issuance information returning unit for returning to a processor as an access source in the event that access to said cache memory has occurred in said main storage memory to be accessed; said processor as an access source including a time-out time resetting unit for resetting said time-out time predetermined in said elapsed time counting unit in response to notification from said cache-access-issuance information returning unit; said elapsed time counting unit recounting an elapsed time based on the time-out time reset in said time-out time resetting unit.