1. A computer system, comprising: a register file addressed by a register address; an execution unit configured to receive a source operand from the register file and to write a result into the register file; and an implied storage control logic configured to: make a first comparison of a target register address from a current instruction with a target register address of a preceding instruction; make a second comparison of the target register address from the preceding instruction against a source register address of the current instruction; and at runtime of the current instruction; cause the execution unit to interpret the current instruction as a store instruction if the first comparison is logically true and the second comparison is logically false.