1. A memory system comprising: an array of memory cells of a first type; a register having memory cells of a second type, wherein the second type of memory cells are configured to stabilize data therein more quickly than the first type of memory cells; and control circuitry coupled to the array and the register, wherein the control circuitry is configured to read data from the register when a read operation is directed at least in part to a memory location to which a preceding write operation was directed.