1. A method to automatically design a custom integrated circuit, comprising: a. receiving a specification of the custom integrated circuit including computer readable code and one or more constraints on the custom integrated circuit; b. automatically generating a computer architecture for the computer readable code that best fits the constraints; c. automatically determining an instruction execution sequence based on the code profile and reassigning or delaying the instruction sequence to spread operation over one or more processing blocks to reduce hot spots; d. continuously evaluating and optimizing one or more factors including physical implementation, and local and global area, timing, or power at an architecture level above RTL or gate-level synthesis; e. automatically generating a software development kit (SDK) and the associated firmware automatically to execute the computer readable code on the custom integrated circuit; f. automatically generating associated test suites and vectors for the computer readable code on the custom integrated circuit; and g. automatically synthesizing the designed architecture and generating a computer readable description of the custom integrated circuit for semiconductor fabrication.