1. A semiconductor device, comprising: a test port configured to communicate with a test system; a test command controller coupled to communicate with the test port; a peripheral module configured to communicate with the test command controller; a processor; a test memory configured to communicate with the test command controller and the processor; wherein the test command controller is configured to issue a first set of one or more instructions to test the peripheral module and to issue a second set of one or more instructions to the processor to process information in the test memory resulting from the test of the peripheral module.