1. A method, executed by one or more processors, for optimizing placement of a logic network, the method comprising: determining, by the one or more processors, a resource for placement and a desired location for the resource; reserving, by the one or more processors, via a placement memory, a plurality of potential locations for the logic element that are proximate to the desired location; determining, by the one or more processors, a best location from the plurality of potential locations; and placing, by the one or more processors, the logic element at the best location.