1. A method comprising: receiving a first memory request associated with a first address; in response to receiving the first memory request, determining, via a control module within a load/store module, a first predicted coherency state of a first cache location associated with the first address by selecting the first predicted coherency state from a plurality of possible states based on a type of a first pending bus transaction associated with the first address, the first pending bus transaction resulting from a second memory request received prior to the first memory request, the type of the first pending bus transaction selected from the group consisting of a load transaction and a store transaction; determining, via the control module, a first bus transaction based on the first predicted coherency state; and communicating the first bus transaction.