1. An apparatus, comprising: an instruction execution control unit which fetches an instruction executed according to a microinstruction, said instruction is classified into a plurality of types, from a memory; wherein said types include a first type indicative of generating a condition code and a second type indicative of not generating said condition code, said condition code corresponds to a result of execution of said instruction; and a condition code generation unit which generates said condition code of said instruction corresponding to said first type on condition that said instruction corresponding to said second type is executed next to said instruction corresponding to said first type.