1. A data processing apparatus, comprising: a processor core for processing a sequence of data processing instructions; a plurality of coprocessors for executing coprocessor instructions provided within the sequence of data processing instructions, each coprocessor instruction having a virtual coprocessor number associated therewith for use in identifying which of the plurality of coprocessors is to execute that coprocessor instruction; for each coprocessor instruction with its associated virtual coprocessor number there being multiple coprocessors within the plurality that may execute that coprocessor instruction, the data processing apparatus further comprising: coprocessor determination logic arranged to determine for each virtual coprocessor number, based on a mapping, which coprocessor is assigned that virtual coprocessor number, and hence will execute instructions associated with that virtual coprocessor number.