1. A discrete Fourier transform calculation apparatus, comprising: a plurality of multiplier units; and a plurality of butterfly calculation units, each butterfly calculation unit to perform calculations for at least two stages of a fast Fourier transform (FFT) algorithm, wherein each butterfly calculation unit includes: a respective memory device to store input data for the corresponding at least two stages of the FFT algorithm, a respective butterfly calculator coupled to the respective memory device, and a respective controller coupled to the respective memory device and the respective butterfly calculator, the respective controller to control the respective butterfly calculator to perform calculations for at least a second one of the corresponding at least two stages of the FFT algorithm before all butterfly calculations for a first one of the corresponding at least two stages of the FFT algorithm have been completed by time sharing the respective butterfly calculator; and wherein the plurality of butterfly calculation units and the plurality of multiplier units are coupled in series.