1. A computer-implemented method for providing a multi-memristive synaptic element for a cognitive computing system, said multi-memristive synaptic element comprising an array of memristive devices, said method comprising: arbitrating, by a programmed hardware processor, a synaptic weight allocation, a related synaptic weight being represented by a synaptic weight variable of said multi-memristive synaptic element, updating, using said programmed hardware processor, said synaptic weight variable by a delta amount, and assigning, by the programmed hardware processor, said memristive devices to elements of a clock-like ordered circular list for selecting a particular memristor of said memristive devices requiring to be updated by a deterministic, periodic global clock that points to a different memristor at every clock tick, such that said multi-memristive synaptic element has a larger dynamic range and a more linear conductance response than a single memristor synaptic element, wherein a number of said ordered list of elements in said ordered circular list and an increment rate for said ordered circular list relate to each other in such a way that during consecutive iterations of selections at least one sub-element is different.