1. An apparatus comprising: a communication interface configured to communicate with a host device; a non-volatile memory comprising one or more memory chips each comprising an arithmetic logic unit configured to perform mathematical computation functionality; and at least one controller in communication with the communication interface and the non-volatile memory, and configured to: receive a command from the host device; in response to the command, send an instruction to the one or more memory chips to apply the mathematical computation functionality to one or more values previously stored in a respective memory chip in order to generate one or more results; and send to the host device at least a part of the one or more results.