1. A method comprising: receiving a code region and a pair of vector translation instructions demarcating a beginning and an end of the code region, the code region including a first set of vector instructions defined in an instruction set of a source processor; translating the code region into translated code, the translated code including a second set of vector instructions defined in an instruction set of a target processor: executing the translated code by the target processor to produce a result value, the result value being the same as an original result value produced by the source processor executing the code region; and storing the result value at a location that is not a vector register, the location being the same as an original location used by the source processor to store the original result value.