1. An apparatus, implemented in a computer system, for emulating a hardware bus lock, the computer system comprising a central processing unit (CPU) executing an operating system (O/S), processors, and a main memory, the apparatus, comprising: a fault handler module operating on the CPU, the fault handler module including an emulation module; the main memory accessible by the CPU and the processors, the main memory comprising a reserved memory block and a page table; a bus lock semaphore stored in the reserved memory block, wherein the bus lock semaphore is invisible to the O/S; and a page table semaphore stored in the reserved memory block, wherein exclusive access to native page tables is maintained, and wherein page tables cross reference virtual addresses and physical addresses.