1. A nonvolatile semiconductor memory device comprising: a first selection transistor connected to a bit line; a second selection transistor connected to a common source line; a memory cell connected in series between the first and second selection transistors; and writing means for carrying out a writing on the memory cell; wherein the writing means is configured to apply a potential corresponding to a writing-blocked state via the bit line to the memory cell when the writing is not carried out, and the writing means applies a potential voltage to the bit line corresponding to a threshold value when the writing is carried out on the memory cell.