1. A memory device comprising: a metal-oxide memory element programmable to a plurality of resistance states; and a controller including logic to apply bias arrangements to the metal-oxide memory element, the bias arrangements including: a first bias arrangement to establish a first resistance state in the plurality of resistance states, the first bias arrangement comprising a first voltage pulse; and a second bias arrangement to establish the first resistance state if the memory element is not in the first resistance state after applying the first bias arrangement, the second bias arrangement comprising a second voltage pulse having a pulse height across the metal-oxide memory element which is greater than that of the first voltage pulse, wherein the first resistance state corresponds to a resistance value higher than that of a second resistance state in the plurality of resistance states, and the bias arrangements further include: a third bias arrangement to change the resistance state from the first resistance state to the second resistance state, the third bias arrangement comprising a third voltage pulse having a voltage polarity across the metal-oxide memory element the same as that of the first and second voltage pulses.