1. A processor unit for a shared-memory computer comprising: a processor; a local memory system executing a protocol to share data with at least one other processor unit; a conflicts resolution circuit executing a hardware program to: (i) detect a critical section in an executing program and begin speculative execution of the critical section without acquisition of a lock; (ii) in the event of a conflict with another processor unit executing the critical section and needing to write to data within the critical section, establishing a priority between the processor units to resolve the conflict without acquisition of the lock.