1. A method of estimating a circuit delay, the method being implemented by a delay estimation apparatus, the method comprising: receiving by the delay estimation apparatus device parameters corresponding to a circuit; determining an electrical effort of each stage in the circuit; determining an estimate transition for each stage in the circuit based on the determined electrical effort; determining an effective fanout at an input of an initial stage; determining an initial gate delay based in part on an electrical effort at the output of the initial stage, an initial input signal slope, and the effective fanout; and determining a gate signal transition time based on an electrical effort of the initial stage, fanout and at least one subsequent stage.