1. A method of verifying functionality of an integrated circuit design to improve the manufacturing of integrated circuits there-from, the method comprising: defining a plurality of verification scopes of an integrated circuit design as part of a verification plan; executing, with at least one processor, a plurality of verification runs within two or more verification scopes to generate verification results; selecting at least two verification runs to merge verification results together; merging like named scenarios together for each verification scope to generate merged verification results; saving the merged verification results into a merge database; and generating a verification report for the integrated circuit design from the merged verification results saved in the merge database.