1. A method of operating a processor, the method comprising: retrieving a first operand of a very long instruction word (VLIW) instruction from a first data read port of a register file coupled to the processor, during a first time period; maintaining access to the register file via the first data read port during a second time period; and retrieving a second operand of the VLIW instruction from the first data read port during the second time period, wherein the VLIW instruction comprises a total number of operands and the register file comprises a total number of data read ports, such that the total number of operands of the VLIW instruction is greater than the total number of data read ports of the register file.