1. A programmable logic device, comprising: a first row of programmable logic regions; a second row of programmable logic regions that is parallel to and immediately adjacent to the first row of logic regions; a first conductor associated with each logic region of the first row that extends to the second row of logic regions, the first conductor being a conduit for which logic region output signals provided by the logic regions of the first row are applied substantially directly to the logic regions of the second row; a second conductor associated with each of the logic regions in the first and second rows and extending from the associated logic region adjacent a first subplurality of others of the logic regions in the respective first and second rows that are adjacent to the associated logic region on a first side of the associated logic region; a third conductor associated with each of the logic regions in the first and second rows and extending from the associated logic region adjacent a second subplurality of still others of the logic regions in the respective first and second rows that are adjacent to the associated logic region on a second side of the associated logic region; and first programmable logic connector circuitry associated with each of the logic regions in the second row and operative to selectively apply the logic region output signal of a logic region of the first row or the logic region output signal of the associated logic region to either or both of the first and second conductors associated with that logic region.