1. A programmable integrated circuit comprising: (a) a plurality of programmably configurable logic blocks for carrying out program-defined logic functions; and (b) a programmably configurable interconnect network for providing program-defined routing of signals between the plurality of programmably configurable logic blocks, wherein said configurable logic blocks each includes: (a.1) input signal receiving means distributed about the configurable logic block for conveying a received set of input signals into the configurable logic block; (a.2) output signal dispensing means distributed about the configurable logic block for dispensing from the configurable logic block, a set of output signals developed within the configurable logic block; (a.3) to-LUT input-subset selecting means coupled to the input signal receiving means for selecting and outputting a programmably-defined subset of the received set of input signals; (a.4) first programmable memory means for storing a plurality of lookup bits, said lookup bits defining one or more lookup functions; (a.5) first lookup bits select means, coupled to the first programmable memory means and to the to-LUT input-subset selecting means, for selecting and outputting a subset of the stored lookup bits in accordance with the subset of input signals output by the to-LUT input-subset selecting means, wherein the combination of the first programmable memory means and the first lookup bits select means defines a first lookup table means (first LUT means); and (a.6) from-LUT output routing means, coupled to the first LUT means and responsive to supplied routing control signals, for receiving the output subset of stored lookup bits, for partitioning the output subset into a plurality of output sub-subsets and for selectively routing respective ones of said output sub-subsets to a respective one or more of the output signal dispensing means in accordance with the supplied routing control signals.