1. A snoop filter apparatus associated with a single processing unit of a computing environment having multiple processing units, each processing unit having one or more cache memories associated therewith, said snoop filter comprising: a first memory storage means adapted to track cache line addresses of data that have been loaded into a cache memory level of its associated processor; means for receiving snoop requests from one or more memory writing sources; and snoop check logic means for comparing an address of a received snoop request against addresses stored in said memory storage means; and, means for forwarding said received snoop request to said processor in response to matching an address in said memory storage means, or otherwise discarding said snoop request, whereby a number of snoop requests forwarded to a processing unit is significantly reduced thereby increasing performance of said computing environment.