1. A method for image address to memory address mapping comprising the steps of demultiplexingly mapping pixels of a two axis (A.times.A) square array image into 2.sup.N memory banks such that memory elements corresponding to any 2.sup.N consecutive pixels of any row and any column of said image reside in different banks and can be accessed simultaneously, said mapping yielding a stream of corresponding row or column oriented pixels with each pixel being identified by its image row and column positions, assigning a designated memory bank and an address therein to each of said pixels by demultiplexing said stream wherein said demultiplexing further comprises processing each said image pixel address to obtain (1) a modulo 2.sup.N number for said designated memory bank by derivation from the lower N bits of said image row and column pixel address, and (2) said address in said designated memory bank as one of a sequence of numbers according to the sum of the image row plus twice a number equal to the result of ANDING binary bits of the image column number and respective binary bits of a number equal to A/2.sup.N.