1. A device comprising: a first processor having an associated first cache and a second processor having an associated second cache; and a cache manager implemented in a hardware-logic and operable to compare an execution of an instruction group by the first processor while a first cache management policy is applied to the associated first cache and an execution of the instruction group by the second processor while a second cache management policy is applied to the associated second cache; select from the first cache management policy and the second cache management policy a cache management policy likely to provide a substantially optimum execution of the instruction group; and associate the selected cache management policy with the instruction group.