1. A cryptographic processing apparatus comprising: at least one register configured to store data for operation; a first operation block configured to execute an operation in accordance with data stored in said register; a second operation block configured to execute a logic operation between one of a register-stored value and a key and an operation result of said first operation block; and a decode block configured to decode binary data in units of the predetermined number of bits to convert said binary data into decode data having the number of bits higher than the number of bits of said binary data, wherein an operation result of said second operation block is stored in said register, and said decode block is arranged such that data propagating along a signal wiring from a supply block of at least one of register-stored value and a round key and said first operation block to said second operation block is supplied in a state where binary data is decoded in units of the predetermined number of bits to be converted into decode data having the number of bits higher than the number of bits of the bindery data.