1. A snoop control method applied to an information processing apparatus including main memories and system controllers connected to CPUs having cache memories, the snoop control method of the system controller comprising: receiving a memory access request from any of the CPUs and notifying other system controllers of the memory access request; judging, when the memory access request from any of the CPUs for each of the cache memories in the CPU is received, whether object data requested by the memory access request conflicts with object data requested by a prior access request received earlier than the memory access request and whether the object data requested by the memory access request is present in any of the cache memories; selecting the status of the cache memory of the CPU; notifying the other system controller of a snoop processing result in which the status selected at the selecting and the cache memory are associated; and setting a final status as the status of the system controller based on priority of each status of other system controllers included in the information processing apparatus.