1. A method of reducing power consumption of a processor, the method comprising: analyzing workload of the processor to build a model that predicts from cues a probability of a forthcoming reduction of the workload and associated performance needs of the processor for a duration of time; monitoring ongoing computing workload to identify current or recent cues that are identical or substantially similar to the historical cues; generating a forecast of future performance requirements based on the current or recent cues, the forecast including a predicted length of the forthcoming reduction of the workload; and transitioning to a reduced performance state for a period of time when the predicted length of the reduction in workload is long enough such that a cost-benefit analysis shows a net power savings when taking into consideration the power required to transition back to a higher performance state to handle an increase in forthcoming workload.