1. A processing device, comprising: a data prefetcher to generate a data prefetch address based on at least one of a linear address, a stride, or a prefetch distance, the data prefetch address associated with a data prefetch request; a translation lookaside buffer (TLB) prefetch address computation component communicably coupled to the data prefetcher, the TLB prefetch address computation component to generate a TLB prefetch address based on at least one of the linear address, the stride, the prefetch distance, or an adaptive offset; and a cross page detection component communicably coupled to the data prefetcher and the TLB prefetch address computation component, the cross page detection component to: determine that the data prefetch address or the TLB prefetch address cross a page boundary associated with the linear address; and cause a TLB prefetch request to be written to a TLB request queue based on determining that the data prefetch address or the TLB prefetch address cross the page boundary associated with the linear address, the TLB prefetch request for translation of an address of a linear page number (LPN) that is based on at least one of the data prefetch address or the TLB prefetch address.