1. A graphics system, comprising: a partitioned tiled graphics memory having a plurality of partitions each including at least one dynamic random access memory (DRAM); a graphics processing unit including an address translation module to translate virtual addresses into physical addresses, said address translation module operative to map a physical memory address to a partition number; and a tag RAM assigned to each partition storing compression tags indicative of a compression status associated with tiles stored in said partitioned graphics memory; a virtual memory in which page table entries are used to store information for mapping page table entries to tag RAM addresses including a bit aligned starting offset address of memory pages in a software representation of tag address space, said page table entries' supporting both a power-of-two and a non-power of two number of partitions; wherein said page table entries utilizes a common software tag RAM address mapping for all partitions.