1. A computer system having one or more processors and a system memory, the computer system comprising: a first processor; a cache coupled to the first processor; a first bus controller; a system bus coupled to both the first bus controller and the system memory, the first bus controller sending a data transfer request for transferring data to the system bus; a second bus controller coupled to both the cache and the system bus, the second bus controller both snooping the data transfer request and sending a snoop request to the cache; detector circuitry for determining whether the snoop request has a valid entry in the cache; and data transmission circuitry for, upon determining that the snoop request has a valid entry in the cache, catching the data from the system bus and sending the data to the cache for update.