1. An apparatus for processing addition between a first data and a second data, each of said first and second data being in one of binary logic and multivalued logic, comprising: first input means having parallel inputs of binary logic and multivalued logic for receiving said first data, and for outputting a first set of bit data representing said first data; second input means having parallel inputs of binary logic and multivalued logic for receiving said second data, and for outputting a second set of bit data representing said second data; adding means connected to said first input means and said second input means for adding said second set of bit data and said first set of bit data; and output means, connected to said adding means, for converting output of said adding means into data in binary logic and multivalued logic, in parallel, and for outputting converted data in binary logic and multivalued logic, in parallel.