1. A method for providing interface compatibility between two hierarchical collections of integrated circuit (IC) design objects, comprising: establishing an associative correspondence between a design object from a first hierarchical collection and a design object from a second hierarchical collection; generating a port compatibility map based on determination that a particular associative correspondence includes a pair of design objects, one from each hierarchical collection, that are port-compatible; and reducing said port compatibility map to determine a set of design object pairs that allow replaceability between said first and second hierarchical collections.