1. A method for sorting elements in hardware structures, said method comprising: selecting a plurality of elements to order from an unordered input queue (UIQ) within a predetermined range in response to finding a match between at least one most significant bit of said predetermined range and corresponding bits of a respective identifier associated with each of said plurality of elements, wherein said UIQ comprises a plurality of out of order elements; presenting each of said plurality of elements to a respective multiplexer; generating a select signal for an enabled multiplexer associated with each element in response to finding a match between at least one least significant bit of a respective identifier associated with each of said plurality of elements and a port number of said ordered queue; and forwarding a packet associated with a selected element identifier to a matching port number of said ordered queue from said enabled multiplexer.