1. An apparatus comprising: a first controller module that includes a first memory and a first processor; and a second controller module that includes a second memory and a second processor, wherein the first processor executes a process including: sending an update instruction to the second processor to update firmware in the second memory, and requesting the second processor to transmit area information indicating a location of a cache area in the second memory in which a cache is held, when updating of the firmware in the second memory is completed, and providing an instruction to reset the location of the cache area based on the area information, and the second processor executes a process including: obtaining area information indicating the location of the cache area in the second memory according to the request from the first processor, transmitting the area information to the first processor, and resetting the location of the cache area in the second memory based on the instruction to reset provided by the first processor.