1. A device for loading and executing a program instruction, the device comprising: an instruction fetch unit for loading an instruction specified by an address in the main memory; a first cache memory for holding the instruction loaded by the instruction fetch unit; a second cache memory for associating an instruction with one or more addresses in the main memory storing the instruction and for holding the associated instruction and addresses, and for specifying the instruction associated with the address on the basis of an address acquired from the instruction fetch unit; a determining unit for holding in the second cache memory any instruction meeting predetermined requirements among the instructions stored in the first cache memory; and a selecting unit for selecting the loading source of the instruction when the instruction to be loaded by the instruction fetch unit is held in either the first cache memory or the second cache memory.