1. A programmable logic cell comprising: a logic circuit having three inputs and at least one output; at least three multiplexers having inputs and outputs; and a plurality of programmable elements coupled between said three inputs and at least one output of said logic circuit and said inputs and said outputs of said plurality of multiplexers such that any one of a D Flip-flop, a D Latch, and a three-input LUT can be realized by programming selected ones of said programmable elements.