1. A multi-processor computer system comprising: a plurality of processors; a plurality of caches, each of said plurality of caches operatively connected to one of said plurality of processors; a first system control unit operatively associated with one of said plurality of processors and operatively connected to one of said plurality of caches, said system control unit having a cache flushing engine operatively connected to said one of said plurality of caches; a second system control unit operatively associated with said first system control unit and operatively connected to said cache flushing engine; a memory operatively connected to said second system control unit; and said first system control unit responsive to an update of one of said caches associated therewith to flush said update to said second system control unit and assure said update is entered into said memory.