1. A computer implemented method for incorporating operand isolation in an integrated circuit design, said method comprising the steps of: a) accessing a netlist describing said integrated circuit design, said netlist having nodes and connections between said nodes; b) traversing nodes of said netlist to construct an activation signal function for a node of said netlist, said activation signal function indicating all states in which an output signal generated by said node is used by said integrated circuit design and all states in which said output signal is not used; c) synthesizing an activation signal generation circuit based on said activation signal function of said node; and d) within said netlist, adding a blocking circuit in the path of an input to said node and adding said activation signal generation circuit to said node to control said blocking circuit.