1. A hardware implemented method to create an ordering of grid blocks for a parallel processing preconditioner, the method comprising: defining a mesh of grid blocks that represents a problem domain to be solved by an iterative method which uses the parallel processing preconditioner; determining a dominant direction for the mesh of grid blocks; defining a plurality of kernels, each kernel comprising matrix elements connecting within one or more adjacent lines of the grid blocks oriented along the dominant direction; determining how many lines are included in each kernel and how the lines are arranged within each kernel; determining how many colors will be used to divide the full set of kernels into colored subsets of kernels; assigning a color designation to each kernel, in such a way that kernels have no interactions, or weak interactions with other kernels having the same color; defining an order of processing from a first color to a last color; defining an order of processing of each kernel within that color; defining an order of grid blocks within each kernel along the dominant direction from one end of the kernel to the other end of the kernel; and adding each corresponding grid block to the matrix in the defined order.