1. A method comprising: executing, by a computing system, a string of instructions to complete a transaction of a first thread of a transaction program, beginning with one instruction of said string of instructions; and managing memory access to a shared memory location for transaction data of the first thread, the shared memory location accessible by the first thread and a second thread, the shared memory location being an increment of real system memory, each increment of real system memory having a ‘private to transaction’ (PTRAN) tag directly addressable as part of each increment of real system memory, the managing comprising: determining whether said one instruction is part of an active atomic instruction group (AIG) of instructions associated with the transaction of the first thread, said active AIG identifying a group of memory locations that are to be updated in an atomic fashion; based on determining that said one instruction is part of said active AIG: inspecting a PTRAN tag associated with the shared memory location to determine whether there is an active transaction associated with the shared memory location; based on determining that there is no active transaction associated with the shared memory location, updating the PTRAN tag associated with the shared memory location to indicate that the shared memory location is part of the active AIG, and locating a transaction table in physical main data storage which provides for entries in an active mode for said active AIG: based on determining that there is an active transaction associated with the shared memory location, determining whether the shared memory location is already part of the transaction table; and wherein all of the entries in the transaction table correspond to the first thread, and all storage locations inspected or modified by instructions of said active AIG remain pending until the computing system indicates that the storage locations should be committed; and based on determining that said one instruction is not part of an active AIG, executing a next instruction under normal execution mode.