1. A content addressable memory (CAM) device, comprising: a CAM array coupled to receive a comparand; a filter circuit coupled to the CAM array, wherein the filter circuit is coupled to receive input data, the input data including a first one or more bits having a first order position and a second one or more bits having a second order position being one of lower than or higher than the first order position, wherein the filter circuit is configured to provide the first one or more bits to the comparand in the first order position and transpose the second one or bits of the input data to a third order position in the comparand, the third order position being the other of the lower than or higher than the first order position; and wherein the filter circuit comprises switch circuitry coupled to receive the input data, and control logic coupled to the switch circuitry.