1. A method comprising: in a data storage device including a controller, a memory, and a second memory, performing, by the controller: storing, into the second memory, data read from a first word line of the memory during a first read operation; initiating a first decode operation of the data at an error correction code (ECC) hard bit decoder; and in response to the first decode operation initiated at the ECC hard bit decoder indicating that the data is uncorrectable by the first decode operation: identifying one or more bits of the data that correspond to a disturb condition test pattern, wherein the disturb condition test pattern is based at least in part on a state of one or more neighbor cells to a particular cell that stores the one or more identified bits; changing a value of the one or more identified bits of the data stored in the second memory to generate first modified data in the second memory; and initiating a second decode operation at the ECC hard bit decoder using the first modified data; and in response to the second decode operation indicating that the first modified data is uncorrectable by the second decode operation: initiating a second read operation of a second word line of the memory to determine second states of one or more cells of the second word line; identifying a second bit of the data that corresponds to a second disturb condition test pattern based on at least one state of the second states; and changing a value of the second bit of the data to generate second modified data.