1. A host coupled to a switched fabric including one or more fabric-attached I/O controllers, comprising: a processor; a host memory coupled to said processor; and a host-fabric adapter coupled to said processor and provided to interface with said switched fabric, which caches selected translation and protection table (TPT) entries from said host memory for a data transaction, and flushes individual cached translation and protection table (TPT) entry in accordance with a translation cacheable flag.