1. A method for secure communication, the method comprising: mapping, using a security processor, a first bit of a multibit control vector stored in a non-volatile memory to a first input/output (I/O) physical bus in a plurality of on chip I/O physical buses; mapping, using the security processor, a second bit of the multibit control vector to a second I/O physical bus in the plurality of on chip I/O physical buses; and controlling operation of the first I/O physical bus and the second I/O physical bus by modifying the mapped first and second bits of the multibit control vector.