1. A method of obtaining data values stored within a memory circuit having a plurality of memory cells, each of the plurality of memory cells having a resistance value representative of the data stored therein, each of the memory cells connected to a source of ramp step signals and to a sum line, the method comprising: a) generating a first ramp step signal and providing the first ramp step signal to a first memory cell to cause the voltage on the sum line to increase at a rate proportional to the resistance value of the first memory cell; b) differentiating the sum line voltage to provide an output voltage proportional to the resistance value of the first memory cell; c) generating a subsequent ramp step signal and providing the subsequent ramp step signal to a subsequent memory cell to cause the voltage on the sum line to ramp at a rate proportional to the resistance value of the subsequent memory cell; d) differentiating the sum line voltage to provide an output voltage proportional to the resistance value of the subsequent memory cell; and e) repeating steps c) and d) for each of the plurality of memory cells.