1. A method for run-to-run control and sampling optimization in a semiconductor manufacturing process, the method comprising steps of: determining a process output and corresponding metrology error associated with an actual metrology for a current processing run in the semiconductor manufacturing process; determining a predicted process output and corresponding prediction error associated with a virtual metrology for the current semiconductor manufacturing processing run; assigning a first weight to the metrology error and a second weight to the prediction error, the first and second weights being indicative of a confidence in the metrology error and prediction error, respectively; and controlling at least one parameter corresponding to a subsequent semiconductor manufacturing processing run as a function of the metrology error, the first and second weights, and the prediction error; wherein said semiconductor manufacturing process is executed to fabricate at least one wafer.