1. A controller for a dynamic random access memory (DRAM)-based semiconductor storage device (SSD) system, comprising: an interface for receiving and converting serial data to 64 bit data; a data converter coupled to the interface for converting the 64 bit data to 128 bit data, wherein memory addresses for storage of the 64 bit data in a set of DRAM units are analyzed to determine a matching address; and a memory controller coupled to the data converter for receiving and storing the 128 bit data in the set of DRAM units coupled to the memory controller.