1. A process of operating a nonvolatile memory cell, the process comprising: setting a multi-bit selection value that is unique to an operation to perform on the memory cell; decoding the multi-bit selection value into a selection signal to a multi-level voltage source; applying the selection signal to the multi-level voltage source to select one of multiple different voltage levels; and applying the selected voltage level to a gate of a nonvolatile storage element in the memory cell.