1. A method for producing an integrated circuit having one or more field programmable gate arrays, and a plurality of inputs and outputs, comprising the steps of: designing wafer bank layers for said integrated circuit, wherein said wafer bank layers provide a plurality of selectable functional blocks; fabricating said wafer bank layers; designing mask programmed interconnect layers for said integrated circuit, wherein said interconnect layers interconnect selected ones of the plurality of the functional blocks; fabricating said interconnect layers on said wafer bank layers; and fabricating finishing layers on said interconnect layers to produce said integrated circuit; and wherein at least one least one of said plurality of inputs and outputs is field programmable.