1. A packet parsing processor, comprising: a state-graph unit to store parsing instructions for content inspection of network packets at memory locations representative of packet parsing states; and a parsing engine, having an input/output coupled to an input/output of the state-graph unit to receive the parsing instructions and having an input coupled to receive a network packet, the parsing engine to execute a first parsing instruction located at a current packet parsing state against a byte steam from the network packet to determine a next packet parsing state.