1. A method for testing an integrated device comprising memory, the method comprising: providing a test device; at least one of: connecting N data inputs of the memory to a given data output of the test device, and connecting N data outputs of the memory to a given data input of the test device, wherein N is an integer ≧2; transferring test data from the test device to the memory and writing the transferred test data to memory cells of the memory; reading data from memory cells of the memory and transferring the read data from the memory to the test device; and comparing the data read from the memory with the test data written to the memory to identify faults of the memory.