1. A microcomputer device comprising: a semiconductor integrated circuit having an arithmetic/logic unit, a plurality of registers for storing data and memory addresses, parallel busses for interconnecting the arithmetic/logic unit and the registers, and control means for generating command signals for controlling operation of the arithmetic/logic unit and accessing the busses and registers all within the integrated circuit; wherein the control means includes a memory array for storing multi-bit microinstruction words defining said command signals, the array having a first output to said busses for parts of the microinstruction words and a second output for complete microinstruction words, the second output including a plurality of N bits in parallel, the first output including a plurality of M bits in parallel, where N and M are integers and N is much greater than M; and addressing means for separately applying first and second types of micro addresses to the array via said registers and busses, the addressing means including first circuitry for selecting said parts of microinstruction words by said first type of micro addresses, the addressing means including second circuitry for selecting said complete microinstruction words by said second type of micro addresses.