1. A design support system that is formed by using an information apparatus and provides a user interface for supporting design of an integrated circuit, the integrated circuit including an interface circuit for communicating with a processor device that implements a predetermined function by executing a program; a user logical circuit that is hardware implementing a predetermined function; and an I/O register circuit having an I/O register used for transmission and receipt of data between the processor device and the user logical circuit, the design support system comprising: an I/O register access information extracting part that generates I/O register access information on the basis of first behavior level design data which is design data at a behavior level subjected to modeling for the integrated circuit, the I/O register access information including information on access control from the user logical circuit to the I/O register and information on a specification of the I/O register; an address map edit processing part that generates address map information including information on association of an SW register with an HW register, on the basis of the I/O register access information and association of an SW address with an HW address, the association of the SW address with the HW address being acquired through the user interface, the SW register being a register defined on the processor device side, the HW register being a register defined on the user logical circuit side, the SW address being an address used when the processor device accesses the I/O register, the HW address being an address used when the user logical circuit accesses the I/O register; and an I/O register automatic generating part that generates second behavior level design data which is design data at the behavior level describing an internal structure of the I/O register circuit described in the first behavior level design data, on the basis of the first behavior level design data and the address map information.