1. A semiconductor device comprising: a logic array comprising a multiplicity of logic cells, said logic cells having a multiplicity of inputs and a multiplicity of outputs, each logic cell including at least one flip-flop and at least one multiplexer, said logic array also comprising at least one standard metal layer; and metal connection layers overlying said logic array for interconnecting various inputs and outputs thereof in a customized manner; wherein the connections between at least one of said multiplexers and one of said flip-flops are customized to create at least one flip-flop with synchronous enable.