1. A semiconductor chip comprising: a load circuit comprising a single, first bloom filter; a store circuit comprising a single, second bloom filter; and one or more processing units, to execute ordered parallel threads out-of-order, coupled to said load circuit and said store circuit, said load circuit to access the single, second bloom filter to detect younger stores for load operations of said ordered parallel threads, and said store circuit to access the single, first bloom filter to detect younger loads for store operations of said ordered parallel threads.