1. A processing device, comprising: a hardware transactional memory (HTM) hardware contention manager to cause a bounded transaction to be translated to an unbounded transaction, the unbounded transaction to acquire a global hardware lock for the unbounded transaction, the global hardware lock read by bounded transactions that abort when the global hardware lock is taken; and an execution unit communicably coupled to the HTM hardware contention manager to execute a instructions of the unbounded transaction without speculation, the unbounded transaction to release the global hardware lock upon completion of execution of the instructions.