1. A processor comprising: a plurality of cores each to independently execute instructions; and a power control unit (PCU) coupled to the plurality of cores to control power consumption of the processor, the PCU including a mapping logic to receive a performance scale value from an operating system (OS) and to dynamically calculate a dynamic performance-frequency mapping based at least in part on the performance scale value and a workload scalability value for a workload to be executed on the processor, and a frequency control logic to dynamically determine a target operating frequency based at least in part on the dynamic performance-frequency mapping, the performance scale value and one or more processor constraints.