1. A system, comprising: a plurality of memory devices, each comprising: a memory array; and a refresh circuit comprising control logic for monitoring predetermined conditions of the memory array and for providing a refresh complete signal when a refresh operation on the memory array is complete, based on the monitoring of the memory device; the system further comprising: a power management circuit coupled to the plurality of memory devices for controlling power provided to the memory devices based on a combined refresh complete signal from the plurality of memory devices; and a programmable controller adapted to receive criteria to control the operation of the power management circuit.