1. A quantum processor, comprising: a plurality of qubits arranged on a surface of a substrate, each of the qubits in the plurality of qubits communicatively coupleable to at least one other qubit in the plurality of qubits, where: a number of outermost ones of the plurality of qubits form a perimeter of the plurality of qubits, and a number of inner ones of the plurality of qubits form an interior of the plurality of qubits, the inner ones of the plurality of qubits spaced inwardly from the outermost ones of the plurality of qubits, a first set of the number of inner ones of the plurality of qubits having a first connectivity, and a second set of the number of inner ones of the plurality of qubits having a second connectivity, the second connectivity greater than the first connectivity.