1. A microprocessor, comprising: a read-only memory, configured to store an exception handler to handle an exception condition, wherein the exception handler is a non-user microcode program developed by designers of the microprocessor, the exception handler including a conditional branch instruction; a first fetch unit, configured to fetch instructions of a user program that includes a user program instruction that causes the exception condition; an execution unit, configured to execute the user program instructions fetched by the first fetch unit and to execute instructions of the exception handler, and configured to save a state in response to detecting the exception condition caused by the user program instruction; and a second fetch unit, configured to fetch the exception handler instructions from the memory, and configured to resolve the conditional branch instruction based on the saved state without sending the conditional branch instruction to the execution unit to resolve the conditional branch instruction.