1. A nonvolatile memory controller for controlling a nonvolatile memory, wherein the nonvolatile memory includes a plurality of blocks, each of the blocks includes a plurality of memory cells and is an erase unit of data in the nonvolatile memory, each of the memory cells is capable of recording N bit of information (wherein N is an integer of 1 or more), degradation in characteristics of the memory cells differs according to an amount of information that is recorded, and wherein the nonvolatile memory controller includes: a control unit for controlling reading, writing and erasure of data to and from the nonvolatile memory; and a stress table for recording a degradation level of the memory cells in the block units, and wherein the control unit records, in the stress table, the degradation level of the memory cells according to the amount of information stored in the memory cells for each cycle of data erasure from the blocks.