1. A method of operating a digital system having a processor and a memory, comprising the steps of: executing a plurality of program tasks on the processor; requesting a memory transaction responsive to a first one of the plurality of program tasks by providing a transaction address to be accessed and an identifier value indicative of the first program task; detecting an error condition that prevents normal completion of the memory transaction; and recovering from the error condition by using the identifier value provided with the memory transaction request to identify the first program task as the source of the memory transaction request.