1. An instruction tracing method, comprising: incrementing a counter value by a first predetermined constant responsive to detecting a first type of atomic operation (atomic op) event; incrementing the counter value by a second predetermined constant responsive to detecting completion of a second type of atomic op event; resetting the counter value responsive to a complex instruction completing; and recording a value of an atomicity counter in conjunction with a trace of the complex instruction responsive to a coherency event associated with a memory access by a first thread occurring during a pendency of the complex instruction.