1. A configurable computing array, comprising: a semiconductor substrate having a first side and a second side; at least a configurable computing element formed on said first side of said semiconductor substrate for storing at least a portion of a look-up table (LUT) for a math function; at least a configurable logic element formed on said second side of said semiconductor substrate for selectively realizing a logic function from a logic library; a plurality of through-substrate vias through said semiconductor substrate for coupling said configurable computing element and said configurable logic element; wherein said configurable computing array realizes a math function by programming said configurable computing element and said configurable logic element.