1. A fast scheduler for operating on a processor, the fast scheduler comprising: a computer usable medium product having computable readable code embodied therein including: a routine for acquiring a sliding window including three consecutive instruction from a memory which is coupled to the processor; a routine for analyzing the tree-instruction sliding window in two successive examination operations; and a routine for applying a plurality of rules to the three instructions within the sliding window to determine when to reorder scheduling of the instructions within the sliding window.