1. A thin film transistor array panel comprising: a substrate; a plurality of gate lines formed on the substrate; a plurality of common electrodes formed on the substrate and made of transparent material; a plurality of data lines intersecting the gate lines; a plurality of thin film transistors connected to the data lines and the gate lines; and a plurality of pixel electrodes connected to the thin film transistors and overlapping the common electrodes, wherein the pixel electrodes include a first sub-pixel electrode separated a distance from a second sub-pixel electrode.