1. A method of metal patterning in the fabrication of an integrated circuit comprising: providing an insulating layer over semiconductor device structures in and on a semiconductor substrate; providing openings through said insulating layer to said semiconductor substrate and to said semiconductor device structures to be contacted; depositing a barrier metal layer conformally over said insulating layer and within said openings; depositing a metal layer over said barrier metal layer; covering said metal layer with an antireflective coating other than amorphous silicon or dye resist; covering said antireflective coating with photoresist and patterning said photoresist to provide a photoresist mask; etching away said antireflective coating, said metal layer and a portion of the thickness of said barrier metal layer where said layers are not covered by said photoresist mask; removing said photoresist mask; and etching away all remaining said barrier metal layer not covered by said metal layer wherein all remaining said antireflective coating is also removed completing said metal patterning in the fabrication of said integrated circuit.