1. An electronic device including a semiconductor memory, the semiconductor memory comprising: cell arrays for storing data, each cell array including a plurality of resistive storage cells for storing data; current code generation blocks including a current code generation block coupled to a corresponding cell array to be operable during a test operation and structured to provide a test current to flow through at least two first resistive storage cells in the corresponding cell array, obtain an average current corresponding to an average value of the test current, and generate current codes based on the average current; and sensing blocks including a sensing block coupled to the corresponding cell array and structured to compare a read current flowing through a second resistive storage cell of the corresponding cell array, with a reference current, and thereby sensing data of the second resistive storage cell, wherein the semiconductor memory is operable associated with the corresponding cell array to adjust current amounts of the read current flowing through the second resistive storage cell or the reference current based on values of the current codes.