1. In implementing an emulation circuit from a netlist description of a design, said design receiving a plurality of clock sources, a method comprising the steps of: analyzing said netlist description to identify, for each storage instance receiving a clock signal in said design, a clock path connecting said clock signal to one of said clock sources from which said clock signal is derived; and implementing a predetermined clock path portion in a programmable logic device circuit dedicated for clock generation, said predetermined clock path portion creating global clock signals.