1. A computer system comprising: a harvardizer configured to receive comingled instructions and data and produce separated instructions and data; a first encryptor connected to the harvardizer to receive the separated data and generate encrypted data; a data memory connected to the first encryptor configured to receive the encrypted data; a first decryptor connected to the data memory to decrypt the encrypted data; a second encryptor connected to the harvardizer to receive the separated instructions and generate encrypted instructions; an instruction memory physically separate from the data memory connected to the second encryptor, the instruction memory configured to receive the encrypted instructions; a second decryptor connected to the instruction memory to decrypt the encrypted instructions; and one or more processors connected to the first and second decryptors and configured to process the separated instructions and data, the one or more processors including a first transformation execution engine to process sixteen-bit decrypted data and decrypted instructions, a second transformation execution engine to execute thirty-two bit decrypted data and decrypted instructions, and a third transformation execution engine to execute sixty-four bit decrypted data and decrypted instructions, wherein the data memory and the instruction memory are configured in a pure Harvard architecture format.