1. A method of programming multiple bits in a NAND flash memory device, comprising: programming a memory cell with a Least Significant Bit (LSB); storing the LSB into a cache register from the memory cell; programming the memory cell with a Most Significant Bit (MSB) that is stored in a main register; storing a data bit into the main register from the memory cell during a first verifying operation; storing a data bit into the cache register from the memory cell during a second verifying operation; and transferring the data bit to the main register from the cache register.