1. A method for determining vectorization configurations in a computer processor architecture, the method comprising: identifying a vectorizable loop in a computer program; identifying a memory access pattern of data required for implementing said loop in said architecture; computing a set of candidate configurations of resources required for vectorizing said data in said architecture, wherein said computing step comprises configuring a vector pointer register of said architecture in support of either of reorder-on-read use and reorder-on-write use of a vector element file of said architecture; selecting one of said candidates in accordance with predefined selection criteria; and implementing said selected vectorization configuration in said architecture.