1. An apparatus comprising: a receiver to receive a memory request, the memory request to request a block of data to begin at a particular address, the particular address to be unaligned to an alignment boundary of a memory line of a memory, the receiver to send at least a first read request to the memory to request the data block; a generator to receive the data block, generate a first completion packet to include a first portion of the data block, and generate a second completion packet to include a second portion of the data block; and a transmitter to send the first completion packet before the second completion packet.