1. A computer implemented method for prefetching data for a processor by a prefetching unit, the method comprising: receiving one or more addresses by the prefetching unit, wherein the addresses are provided by the processor executing a first piece of a program logic, the addresses being provided by means of a processor instruction, and wherein the processor instruction is called by an enqueuing command in a first piece of program logic; enqueuing each of the addresses to a recording-list by the prefetching unit, wherein each enqueued address corresponds to one position in the recording-list; identifying, by the prefetching unit one of the positions in the recording-list as a jump position; providing, by the prefetching unit the identified jump position to a frame-shifter of the prefetching unit; using a sub-list of the recording-list being defined by a shiftable frame as a playback-list; shifting the frame along the recording-list by the frame-shifter to provide an updated playback-list, wherein the shifting is triggered by executing of a frame-shift command contained in a second piece of the program logic and wherein the jump position constitutes the first position of the updated playback-list; fetching data from a second memory, wherein the fetched data is identified by addresses within the updated playback-list; and transferring the fetched data to a first memory, wherein the first and the second memories are caches within a multi-level cache of the processor.