1. A device for executing a cryptoalgorithm, wherein the cryptoalgorithm comprises a group of operations including a first and a second sub-group, comprising: a central processing unit for performing the first sub-group and for performing a flow control of the cryptoalgorithm; and a hardware circuit for performing the second sub-group, wherein the hardware circuit comprises a first register having a rotational ability, a second register having a rotational ability, a multiplexer, a substitution memory for storing a bit substitution rule, and a control register for controlling the multiplexer depending on a bit pattern written into the control register by the central processing unit, the first register and the second register being connected to a data bus, the multiplexer and the substitution memory, wherein the data bus is arranged between the central processing unit and the hardware circuit.