1. An apparatus comprising a memory management unit (MMU) for providing partitioned translation caches, comprising: a translation cache configured to provide a plurality of translation cache entries each defining an address translation mapping; a partition descriptor table configured to provide a plurality of partition descriptors defining a corresponding plurality of partitions of the translation cache, each partition of the plurality of partitions comprising one or more translation cache entries of the plurality of translation cache entries; and a partition translation circuit configured to: receive a memory access request from a requestor; determine a translation cache partition identifier (TCPID) of the memory access request; identify one or more partitions of the plurality of partitions based on the TCPID; and perform a cache operation on a translation cache entry of the one or more translation cache entries of the one or more partitions.