1. A method for coalescing regions on a virtualized programmable logic device, the method comprising: configuring a first function on a first subregion on the virtualized programmable logic device, wherein the first subregion borders an unused subregion on the programmable logic device; and migrating the first function operated on the first subregion to a second function operated on a second subregion on the virtualized programmable logic device; and releasing the first subregion from the first function, wherein the second function is configured to perform a same task as the first function, and wherein the released first subregion and the unused subregion together form a larger unused subregion on the virtualized programmable logic device.