1. A field programmable gate array device comprising: a plurality of programmable logic blocks programmed in a first configuration to perform one or both of an access function and a management function with respect to a plurality of non-volatile memory modules; and a communication interface coupled to at least a subset of said programmable logic blocks and configured to provide a high data transfer rate connection to an external random access memory device, wherein said at least a subset of said programmable logic blocks are programmed in said first configuration to perform one or both of said access function and said management function at least in part using data sent via said communication interface, wherein the plurality of programmable logic blocks as configured in the first configuration implement a first algorithm to perform one or both of said access function and said management function and are further configured to be reprogrammed in place to be configured in a second configuration, instead of the first configuration, wherein the second configuration implements a second algorithm that replaces the first algorithm, and wherein the second algorithm comprises a new settling time cache characteristic.