1. An interface system for matching control code signals and data signals between a data processing unit and a controller which employ different control code formats, comprising: a control register for receiving control code signals from the data processing unit and having an input and an output; a first read-only memory circuit responsive to the output of said control register and programmed to provide discrete control signals corresponding to the control code signals in said control register; a second read-only memory circuit responsive to the output of said control register and programmed to convert the control code signals in said control register into corresponding commands in the control code format of the controller; clock means initiated upon loading of the control code signals into said control register for operating said first and second read-only memory circuits; decoder means responsive to the discrete control signals of said first read-only memory circuit for applying discrete controls to the controller to condition its registers to receive commands or data signals and for generating a select signal; and means responsive to said select signal generated by said decoder means for selectively applying either commands from said second read-only memory circuit or data signals from the data processing unit to the controller.