1. A memory array for a multi-port memory having a common memory interface and a plurality of memory ports through which the memory array is accessed, the memory array comprising: a memory array having (r·s·t) memory locations, the memory array organized as a first memory sub-array accessible through a first of the plurality of memory ports as a (m×t) memory array and organized as a second memory sub-array accessible through a second of the plurality of memory ports as a (n×t) memory array, both m and n being multiples of r and the sum of (m/r) and (n/r) equal to s, the memory array further organized as a common memory array accessible through the common memory interface as a (r×s×t) memory array.