1. A computing system with transactional memory, comprising: a multithreaded microprocessor configured to support the transactional memory, the microprocessor configured to execute complex instructions using millicode by a millicode mode and an atomic instruction group (AIG) mode, the microprocessor comprising: an address history table (AHT) coupled to load and store units, the load and store units configured to write information entries in the AHT, the AHT coupled to instruction execution pipelines and configured to write information into the AHT from the instruction execution pipelines; millicode mode state registers and AIG state registers coupled to the instruction execution pipelines; general purpose registers coupled to millicode assist setup logic, the millicode assist setup logic coupled to millicode registers, the general purpose registers coupled to the AHT and configured to enable contents of the AHT to be copied or moved to the general purpose registers of the microprocessor and also copied or moved to the millicode registers by the millicode assist setup logic over interfaces provided for the millicode registers, the millicode registers configured to be utilized by millicode instructions based on the millicode being executed.