1. In a data processing system having a first processor generating address and data signals, at least one peripheral unit having a plurality of registers for storing parameter data which controls the operation of said peripheral unit, at least selected ones of said registers being device specific registers, and means responsive to said address and said data signals for transferring said parameter data from said first processor to said registers, apparatus for allowing a software program written for use with a different peripheral unit to operate with said peripheral unit, said apparatus comprising means responsive to said address and said data signals for generating a flag signal when said parameter data is being transferred from said first processor to said device specific registers; means responsive to said flag signal for temporarily disconnecting said first processor from said peripheral unit; and means responsive to said address and data signals for providing and writing alternate parameter data into said device specific registers.