1. A memory system, comprising: a real memory having a plurality of real address locations, wherein each of said real address locations is associated with a corresponding one of a plurality of virtual address locations, wherein said virtual address locations are divided into an architecturally visible virtual memory region and a behavioral virtual memory region; an address converter for converting an effective address to an architecturally visible virtual address and a behavioral virtual address, wherein said architecturally visible is utilized to access said architecturally visible virtual memory region and said behavioral virtual address is utilized to access a behavioral virtual memory region; a fetch prediction means, stored within said behavioral virtual memory region of said virtual memory, for providing a behavioral virtual address of a next fetch instruction block; and an address translator for translating said behavioral virtual address of a next fetch instruction block predictor to a real address associated with said real memory.