1. A resistance variable memory element comprising: a first electrode; a first chalcogenide glass layer electrically coupled to said first electrode; a second chalcogenide glass layer over said first chalcogenide glass layer; a metal containing layer between said first and second chalcogenide glass layers; a metal layer over said second chalcogenide glass layer; a conductive adhesion layer over said metal layer; and a second electrode electrically coupled to said conductive adhesion layer.