1. An integrated circuit to support multi-media processing of image data, comprising: a scalable clustered memory storage subsystem including: a set of memory clusters and a hub to support inter-cluster memory traffic between individual memory clusters in the group of memory clusters and traffic with an external interface; each individual memory cluster having an intra-cluster bus, a set of storage devices coupled to the intra-cluster bus, and access arbitration logic to control access to the set of storage devices; and a high bandwidth interface to couple read/write ports of the scalable clustered memory storage subsystem to a set of processing units for parallel multi-media processing; wherein a baseline design of the scalable clustered memory storage subsystem has the hub, intra-cluster buses, and read/write ports capable of supporting a range of memory clusters up to a maximum number of memory clusters with the memory capacity chosen prior to fabrication by selecting the number of memory clusters in the set of memory clusters that are fabricated into the integrated circuit.