1. An apparatus, comprising: a processor and a memory communicatively connected to the processor, the processor configured to: receive topology information describing a set of topology elements of a topology; assign respective classifications to the topology elements in the set of topology elements based on a set of topology abstraction policies; and determine, for each of the topology elements of the set of topology elements based on the respective classifications of the topology elements, whether to select the topology element for inclusion in an abstract representation of the topology.