1. A method for controlling multiple DMA tasks, the method comprises: receiving multiple DMA task requests; defining multiple buffer descriptors for each of a plurality of DMA channels wherein at least two buffer descriptors comprise timing information that control an execution of cyclic time based DMA tasks; selecting a DMA task request out of the multiple DMA task requests; executing a DMA task or a DMA task iteration using different I/O ports during different DMA task iterations, and updating the buffer descriptor associated with the selected DMA task request to reflect the execution; and jumping to the stage of selecting.