1. A method, comprising: multiplying, by a computer processor, two operands of a particular width in a base 2 representation and storing a result of the multiplying in one or more destination registers, wherein the multiplying includes: performing, by a multiplier circuit, a sequence of multiply operations, wherein the multiplier circuit is configured to perform multiplications of operands having a maximum width that is smaller than the particular width; and using, for each of the sequence of multiply operations, portions of each of the two operands as inputs to the multiplier circuit, wherein the portions are less than the entirety of each of the two operands and are represented in base 2; wherein, for one or more of the sequence of multiply operations, the computer processor stores a result using only a portion of one of the one or more destination registers; and wherein the sequence of multiply operations is performed by the multiplier circuit without using a carry flag between any of the multiply operations.