1. A memory device comprising: a memory element including a first electrode, a second electrode, and a silicon layer disposed between the first electrode and the second electrode, wherein: the memory element is capable of being in a first state, a second state, and a third state, a first data is written to the memory element being in the first state so that a potential of the first electrode is higher than a potential of the second electrode, whereby the memory element being in the second state is obtained, a second data is written to the memory element being in the first state so that a potential of the second electrode is higher than a potential of the first electrode, whereby the memory element being in the third state is obtained, and R 1 >R 2 >R 3 is satisfied when a resistance of the memory element being in the first state is R 1 , a resistance of the memory element being in the second state is R 2 , and a resistance of the memory element being in the third state is R 3 .