1. An apparatus, comprising: an instruction execution pipeline coupled to register space, said instruction execution pipeline having an execution unit to execute a first instruction and a second instruction wherein: i) said register space is to store a first data structure to be replicated when said execution unit executes said first instruction and to store a second data structure to be replicated when said execution unit executes said second instruction, said first and second data structures both being packed data structures, data values of said first packed data structure being twice as large as data values of said second packed data structure, said first data structure being four times as large as said second data structure; ii) said execution unit includes replication logic circuitry to replicate said first data structure when executing said first instruction to create a first replication data structure, and, to replicate said second data structure when executing said second instruction to create a second replication data structure; and iii) said instruction execution pipeline includes masking circuitry to individually mask specific elements of said first replication data structure as part of said first instruction's execution and individually mask specific elements of said second replication data structure as part of said second instruction's execution.