1. For a nonvolatile memory having an array of memory cells, each memory cell having a control gate and a channel defined by a source and a drain, a method of programming in parallel a group of memory cells, comprising: (a1) for each of the group of memory cells, coupling an associated voltage source to each channel to bring it to a program-enabling or program-inhibiting voltage depending on whether each said memory cell is designated to be programmed or program-inhibited; (a2) decoupling the associated voltage source from the channel of each said cell while allowing the program-enabling or program-inhibiting voltage to be held dynamically at the channel; and (a3) programming the group of memory cells by applying programming voltages to the control gates thereof.