1. A method for debugging a runtime configuration of a first processing arrangement, the first processing arrangement including at least one register file and a plurality of arithmetic-logic-units (ALUs) that operate on complex instructions, which instructions define a simultaneous operation of the plurality of ALUs, the method comprising: modifying the configuration to cause state information to be stored in a memory; and providing the state information from the memory to a debugger for debugging the configuration based on the state information; wherein: the configuration is of at least one of a function and an interconnection of at least one of the ALUs and one or more of the at least one register file; and the first processing arrangement is adapted to, while configured with the configuration, cyclically execute a plurality of operations.