1. An apparatus for distributed hardware device simulation, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of: identifying a plurality of hardware components of the distributed hardware device; providing software components simulating the functionality of each hardware component, wherein each software component is installed on a distinct compute node of a plurality of compute nodes of a distributed processing system, wherein: the plurality of compute nodes are configured in a tree network topology and each compute node is assigned a unique rank, each rank uniquely identifying a compute node's location in the tree network topology for point-point data communications and for collective operations; each compute node comprises one or more computer processing cores, a computer memory, and input/output adapters, and the compute nodes are coupled for data communications by a plurality of independent data communications networks; receiving, in a first software component installed on a first compute node, one or more messages representing an input to the hardware component corresponding to the first software component; simulating the operation of the hardware component by the first software component, thereby generating an output of the first software component representing the output of the hardware component; sending, from the first software component installed on the first compute node to at least a second software component installed on a second compute node, one or more messages representing the output of the hardware component corresponding to the first software component, wherein the one or more messages are transmitted via at least one of the plurality of independent data communications networks; simulating the operation of the hardware component by the second software component using the output of the first software component representing the output of the hardware component as an input, thereby generating an output of the second software component representing the output of the hardware component; and determining, from the one or more messages of the first software components, whether the corresponding hardware device as designed is valid, including verifying that the output messages do not include error messages and verifying that the output messages include output values that are within acceptable ranges.