1. A method of operating a processor to fetch and execute a plurality of instructions, the method comprising: a) operating the processor in a first mode to execute a first subset of instructions in the plurality of instructions, with each instruction in the first subset executed no more than one time each time the instruction is fetched; and b) operating the processor in a second mode to execute a second subset of instructions in the plurality of instructions, with each instruction in the second subset executed a plurality of times each time the instruction is fetched.