1. An information processing device including a read-only memory, including executable instructions or data, a processor capable of addressing said read-only memory and fetch said executable instructions or data across a bus, a CAM device connected to said bus and arranged to compare the addresses requested by the processor with the elements of a vector of addresses to be patched and, if the address requested by the processor matches with one of the elements of the vector, to present to the processor a substitution executable instruction or data in place of an executable instruction or data addressed by the processor in the read-only memory; the CAM device being a MRAM device comprising a plurality of MRAM memory cells, each MRAM memory cell comprising at least one magnetic tunnel junction.