1. A processor comprising: a cache memory; and logic coupled to the cache memory to receive at least a portion of an address to reference a data item; associate the portion of the address with a metaphysical extension, wherein the metaphysical extension includes only a single metaphysical identifier bit which when set indicates that a cache line of the cache memory has metadata associated with a data item and an address space identifier bit per processing element of the processor; and determine a metadata entry of the cache memory to access metadata associated with a data item held in a data item entry of the cache memory based on the address and the metaphysical extension.