1. A method, comprising: monitoring, at a predictor, a history of memory access information associated with one or more cache lines; predicting, at the predictor, a future demand for the one or more cache lines by a processor core based on the history of memory access information; speculatively modifying, at the predictor, coherence permissions for the one or more cache lines based on the predicted future demand, wherein speculatively modifying coherence permissions comprises modifying data access permissions to the one or more cache lines prior to the processor core initiating a memory access request to access data at the one or more cache lines; and granting permission, at the predictor, to the processor core to access the one or more cache lines for a future memory access request.