1. A device comprising: a content addressable memory (CAM) cell including a single floating gate transistor; and a circuit to compare a value of data stored in the CAM cell with a value of a selected data from one of a first data received at a first line coupled to the CAM cell and a second data received at a second line coupled to the CAM cell, wherein the circuit further includes a pair of transistors to control a value at a node, based on the value of the data stored in the CAM cell, to determine whether the value of the data stored in the CAM cell matches the value of the selected data.