1. A reconfigurable neural network circuit, comprising: an electronic synapse array comprising multiple digital synapses interconnecting a plurality of digital electronic neurons, wherein each neuron comprises an integrator that integrates input spikes and generates a spike signal when the integrated input spikes exceed a threshold; a first learning module and a second learning module for reconfiguring a pre-synaptic neuron and a post-synaptic neuron, respectively, in the synapse array, wherein each learning module is independently reconfigurable; and a control module for reconfiguring the synapse array, the control module comprising a global finite state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons among said neurons, to sequentially access the synapse array.