1. A memory device, comprising: sense amplifier circuitry operable to evaluate data read from a memory array included in the memory device responsive to a bias voltage applied to the sense amplifier circuitry; a current sink operable to sink a bias current; and a resistive element coupling the current sink to the sense amplifier circuitry, wherein the bias voltage applied to the sense amplifier circuitry corresponds to the voltage drop across the resistive element and current sink as induced by the bias current.