1. A non-volatile memory device structure, comprising: a semiconductor substrate having a surface region; a first dielectric material overlying the surface region of the semiconductor substrate; a first cell comprising a first switching region that comprises a resistive switching material and is disposed between a first bottom electrode and a first top electrode, wherein the first bottom electrode comprises a first portion of a conductive contact layer, wherein the conductive contact layer extends from the first cell to a second cell in a first direction overlying a first wiring structure that extends in the first direction overlying the first dielectric material, wherein the first top electrode is in electrical contact with a second wiring structure extending in a second direction orthogonal to the first direction, wherein the resistive switching material is disposed in a first via structure of a second dielectric material that is in an intersection region between the first wiring structure and the second wiring structure, and wherein the first via structure has sidewalls that are substantially linear over an entire depth of the first via structure; and the second cell comprising a second switching region that comprises the resistive switching material and is disposed between a second bottom electrode and a second top electrode, wherein the second bottom electrode comprises a second portion of the conductive contact layer, wherein the second top electrode is in electrical contact with a third wiring structure separated from and parallel to the second wiring structure, and wherein the first via structure comprising the first switching region is physically and electrically isolated from the second via structure comprising the second switching region; wherein the resistive switching material is configured to support formation of a conductive filament from metal material of the first top electrode or the second top electrode.