1. A microinstruction controllable processor comprising: a program memory containing a series of microprograms, each microprogram containing a set of microinstructions; means for addressing said program memory to provide an operative microprogram; means controlled by said operative microprogram for sequentially providing operative microinstructions from the set of microinstructions associated with said addressed microprogram; means for writing microprograms into said program memory of selected address locations therein; and means controlled by a processor control field of said provided operative microinstruction for providing signals to control the processor; said program memory addressing means including a second memory separate from said program memory the individual words of which are selected by said program memory and communicated to said program memory addressing means under control of a provided operative microinstruction; and means controlled by said operative microinstruction for enabling said program memory write means so as to selectively change certain ones of said microprograms.