1. A computing system comprising: a first requestor and a second requestor configured to send memory access requests; a memory comprising a plurality of partitions; a memory controller coupled to the memory; and an arbitration circuit comprising an interface, wherein the arbitration circuit is configured to: receive a plurality of memory access requests from the first requestor and the second request via the interface; select a given memory access request of the plurality of memory access requests, wherein the given memory access request targets a memory location within a given partition of the plurality of partitions; identify one or more other memory access requests of the stored plurality of memory access requests targeting memory locations within the given partition; and send the given memory access request and the identified one or more other memory access requests to the memory controller to be serviced out of order.