1. A three-term input floating-point adder-subtractor comprising: cancellation detection means for detecting that two out of three terms cancel out each other in an operation; selection means for outputting, when the cancellation detection means detects that two terms cancel out each other, the remaining one term as a result; digit adjusting means for making a digit adjusting shift with a width of 2n+3 bits where n is a bit width of a mantissa and using a least significant bit as a sticky bit; addition and subtraction means for carrying out addition and subtraction on three terms with the bit width; and rounding means for normalizing the result and carrying out rounding in an RN (nearest value) mode using an (n+3)th bit from a highest digit as a new sticky bit.