1. A method for re-configuration of a processor having plural cores, the method comprising: executing a thread having plural instructions at a first of the plural cores; detecting a predetermined multi-core characteristic of one or more of the instructions of the thread with logic operating on the processor while the thread is executing on the first core; re-configuring the processor to have plural cores perform the one or more instructions; and performing speculative execution of the thread at one or more of the plural cores to synchronize the one or more of the plural cores to an instruction at the first of the plural cores.