1. A method for controlling a processor comprising: obtaining, with a control unit of the processor, a control flow instruction identified by a program counter value stored in a program counter register, the control flow instruction including a target value indicative of a target program counter value for the control flow instruction; and selecting, with the control unit of the processor, one of the target program counter value and a minimum resume counter value as a value to load into the program counter register, the minimum resume counter value being indicative of a smallest resume counter value from a set of one or more resume counter values associated with one or more inactive threads, each of the one or more resume counter values being indicative of a program counter value at which a respective inactive thread should be activated, the minimum resume counter value being stored in a minimum resume counter register in the processor, the minimum resume counter register being updated when at least one of the resume counter values is set to a value.