1. A method for applying stress conditions to integrated circuit device samples during accelerated stress testing, the method comprising: partitioning each of the integrated circuit device samples into a first region having a first functional element; partitioning each of the integrated circuit device samples into at least one second region having at least one second functional element; applying a first stress condition to the first region having the first functional element; applying a second stress condition to the at least one second region having the at least one second functional element; determining a first portion of the integrated circuit device samples that have functionally failed based on the applying of the first stress condition; determining a second portion of the integrated circuit device samples that have functionally failed based on the applying of the at least one second stress condition; and deriving an acceleration model parameter based on the determining of the first and the second portion of the integrated circuit device samples that have functionally failed.