1. A media processor for the processing of media based upon instructions, comprising: a single chip comprising a) a first processing layer wherein said first processing layer has at least two processing units, at least one program memory, and at least one data memory, each of said processing units, program memory, and data memory being in communication with one another, b) a second processing layer wherein said second processing layer operates in parallel to said first processing layer and has at least two processing units, at least one program memory, and at least one data memory, each of said processing units, program memory, and data memory being in communication with one another, wherein at least one of said two processing units in each of said first and second processing layers performs line echo cancellation functions on received data and wherein at least one of said two processing units in each of said first and second processing layers performs encoding or decoding functions on received data; and e) a task scheduler adapted to receive a plurality of tasks from a source and distributing said tasks to each of said first and second processing layers for execution in a parallel, pipelined manner.