1. A method in a multiprocessor data processing system including a plurality of cache memories including a cache memory, the method comprising: issuing, by the cache memory, a read-type operation for a target cache line; while waiting for receipt of the target cache line requested by the read-type operation, monitoring, by the cache memory, to detect a competing store-type operation for the target cache line; in response to receiving the target cache line: installing the target cache line in the cache memory; and setting a coherence state for the target cache line installed in the cache memory based on whether the competing store-type operation is detected.