1. A memory network of interconnected processing modules, comprising: a child processing module for receiving input data, the child processing module generating lower level characterization data that represent patterns and/or sequences found in the input data, the child module outputting the lower level characterization data; a parent processing module for receiving the lower level characterization data, the parent processing module generating higher level characterization data that represent patterns and/or sequences found in the lower level characterization data; the parent module providing feedback to the child module for linking the higher level characterization data to the lower level characterization data.