1. A signal processing apparatus for processing a plurality of multi component information signals to produce therefrom a multi component output signal representative of the median value of said plurality of multi component information signals comprising: a multiplicity N of signal component processing sections each of which comprises: a plurality of storage register means each of which stores the multiple components of a respective information signal; and a majority decision circuit, coupled to receive a prescribed one of the componets of each information signal stored in said plurality of storage register means and producing an output signal component representative of the majority of the prescribed ones of the components of each information signal coupled thereto from said storage register means; and wherein each of the first through (N-1).sup.th processing sections further includes a plurality of control buffer means each of which is coupled to receive the components of a respective information signal stored in a respective one of said plurality of storage register means, and is controlled by the output of the majority decision circuit of that signal processing section to selectively modify the components of the information signal received thereby and couples the selectively modified components to a respective storage register means of the next succeeding stage; and output register means for storing the output signal components produced by the majority decision circuits of said multiplicity N of processing sections as said multi component output signal.