1. A memory system, comprising, a plurality of controllers; a plurality of memory channel controllers communicating with at least some of the plurality of controllers; and a plurality of memory modules, wherein a group of memory modules is associated with a memory channel controller of the plurality of memory channel controllers; wherein individual strips of a stripe of a RAIDed data block, and a parity strip are routed to at least one of the memory channel controllers, and a same global sequence number (GSN) is assigned to each of the strips after the strips are received by the memory controller.