1. An apparatus comprising: a plurality of computational cores, each core comprises properties having at least some statistical independency from other of said computational cores, said properties being set independently of each other of said computational cores, each core being able to independently produce an output indicating recognition of at least one previously learned signal responsive of at least one input to said plurality of computational cores, and at least one decision unit for receiving said output from each said computational core and making an identification of said at least one input based on each said output.