1. A system comprising automated test equipment, the system comprising: a test processor configured to provide a signal to a device under test based on a sequence of instructions defining an evaluation of test vectors, wherein each of the test vectors is mapped onto a fixed number of signal states or signal transitions; wherein the test processor is configured to map a current test vector onto a set of signal states or signal transitions in dependence on a current instruction; and wherein the test processor is configured to select a number less than the number of the fixed number of the signal states or signal transitions of the current test vector to be provided in the signal in dependence on the current instruction.