1. A method of maintaining coherency in a multi-processor system comprising: establishing a state including: a write-data-invalid (WDI) state for a first cache entry in a first cache, wherein the WDI state comprises permission for a first processor associated with the first cache, to write to one or more higher levels of memory hierarchy for a write request to the cache entry by the first processor, and wherein the WDI state is treated as an invalid state for a read request to the first cache entry by the first processor.