1. A method for converting a netlist of an integrated circuit from a first library to a second library, said first library including logic cells AND, OR and NOT, said second library including logic cells NAND and NOR, said method comprising steps of: topologically sorting logic cells of said netlist from outputs to inputs; replacing AND and OR cells of said netlist with NOT, NAND and NOR cells; and performing simplification of said netlist in a topological order.