1. A computational system (10) for use with a host processor (12) having a memory unit (12a) therein, comprising: at least one single-instruction multiple-data (SIMD) computational circuit component (16) having a first timing characteristic for processing inputs from an external device and for producing outputs thereto, wherein such inputs and outputs have a second timing characteristic that is different from said first timing characteristic; at least one controller component (14) including transfer means (22) for effecting control instructions and bi-directional parallel data communications between said computational circuit component (16) and such external device.