1. An arithmetic device comprising: a plurality of parallel processors; and a processor configured to control the plurality of parallel processors so as to calculate an approximate solution of an equation by using a first algorithm and a second algorithm switchably, each of the first algorithm and the second algorithm being algorithms providing an iterative method, the second algorithm causing a divergence more likely than the first algorithm, the second algorithm being performed more efficiently by the plurality of parallel processors than the first algorithm, the first algorithm and the second algorithm being switched each other between at least one pair of iterative steps of the iterative method.