1. A computer implemented method for reducing redundant read-modify-write code sequences in non-vectorizable code, the computer implemented method comprising: receiving, by a complier, a portion of code wherein the portion of code includes non-vectorizable operations that affect multiple sub-parts of a storage location; identifying a series of instruction sequences within the portion of code, wherein the series of instruction sequences performs at least one non-vectorizable operation on a number of sub-parts of a storage location, wherein the number of sub-parts of the storage location corresponds to a length of a register; replacing, by the compiler, loads in the series of instruction sequences with uses of the register; and introducing, by the compiler, one store operation for the series of instruction sequences.