1. A method, comprising: shifting test stimuli into a first portion of a plurality of scan chains in a circuit one bit per scan chain to form a new test pattern; applying the new test pattern to the circuit; shifting out previously compacted test response data stored in a second portion of the plurality of scan chains one bit per scan chain; compacting a test response corresponding to the new test pattern with the previously compacted test response data to generate newly compacted test response data in the second portion of the plurality of scan chains; and repeating the above operations for a predetermined number of times.