1. A non-transitory program storage device, readable by a processing unit and comprising instructions stored thereon to cause one or more processing units to: process commands received for a graphics processing unit (GPU) by a first hardware thread of a multicore microcontroller of the GPU; enable a second hardware thread of the multicore microcontroller to obtain performance analysis data of the GPU while the first hardware thread processes the commands; and disable the second hardware thread from obtaining the performance analysis data while the first hardware thread continues to processes the commands by having the first hardware thread instruct the second hardware thread to stop obtaining the performance analysis data.