1. An apparatus comprising: a memory comprising a plurality of solid-state non-volatile memory cells; and a processing circuit connected to the memory and configured to direct execution of a plurality of read error recovery routines responsive to at least one uncorrectable read error in a data set retrieved from the memory, wherein the recovery routines are executed in a selected order based on an elapsed recovery time parameter for each the recovery routines and an estimated probability of success for each of the recovery routines.