1. A data processing apparatus comprising: memory means for storing microinstructions including a specific microinstruction; microinstruction executing means, coupled to said memory means, for executing a selected one of said microinstructions by a pipeline process and for outputting an operation result, said executing means including register means for storing a parameter having a first value; and microinstruction address generating means for generating an address of said specific microinstruction in said memory means when one of the microinstructions executed by said microinstruction executing means indicates that said specific microinstruction should be executed instead of a currently executed microinstruction if a predetermined event occurs: and control means for having said microinstruction executing means execute said specific microinstruction read from said memory means in response to the address of the specific microinstruction when said predetermined event occurs so that said first value of said parameter is changed to a second, corrected value which should be replaced by said first value of said parameter used in an immediately previous pipeline process; wherein said microinstruction executing means executes said currently-executed microinstruction again using said second, corrected value of said parameter after said second, corrected value is obtained by said correction means.