1. A synapse MOS transistor, comprising: a substrate; a source region extending in a first direction on said substrate; a drain region extending in said first direction on said substrate; and a plurality of gate electrodes each formed directly over said substrate and each extending across said substrate from said source region to said drain region in a second direction perpendicular to said first direction; each of said plurality of gate electrodes having a width in said first direction different from the widths of the others of said plurality of gate electrodes, wherein said synapse MOS transistor conducts a different amount of current in response to an input signal being applied to a different one of said plurality of gate electrodes.