1. A method for compiling a hardware description language (HDL) specification for simulation of a circuit design, the method comprising using one or more processors to perform operations including: elaborating the circuit design from the HDL specification, the circuit design including instances of a plurality of modules; and generating and storing on a storage device, simulation code that models the circuit design, the simulation code including: for each hardware configuration of each of the plurality of modules, a respective first function configured and arranged to model the hardware configuration of the module using a set of nets indicated in one or more arguments of the function; and a second function configured and arranged to simulate first and second ones of the instances that have a same hardware configuration of a same one of the plurality of modules, by performing operations including: in response to an indication to simulate the first instance, executing a function call to the respective first function, corresponding to the hardware configuration and module of the first and second instances, with a first set of nets corresponding to the first instance indicated by one or more arguments in the function call; and in response to an indication to simulate the second instance, reexecuting the function call to the respective first function, with a second set of nets corresponding to the second instance indicated by the one or more arguments in the function call.