1. An apparatus for acquiring data of fail memory, comprising: a pattern generator generating a pattern for testing a device under test (DUT) and transmitting the pattern to the DUT, the pattern generator receiving DUT data from the DUT, wherein the DUT is connected to the pattern generator, records the pattern received from the pattern generator and retrieves the DUT data corresponding to the pattern recorded therein; a data transmitter connected to the pattern generator and receiving the pattern and the DUT data from the pattern generator, the data transmitter transmitting the DUT data and the pattern received from the pattern generator to a failure analyzer; and the failure analyzer connected to the data transmitter, receiving the DUT data and the pattern from the data transmitter and comparing the DUT data and the pattern to produce failure analysis information.