1. A microcontroller comprising: a first memory operable to store instructions for normal operational use of the microcontroller; a second memory operable to store patch code instructions during debugging of the instructions within the first memory; and a central processing unit (CPU) operable to fetch the instructions from the first memory and the patch code instructions from the second memory, wherein the second memory is operable to store the instructions for normal operational use of the microcontroller or data after the debugging of the instructions within the first memory is completed.