1. A memory device, comprising: a plurality of non-volatile memory cells; and a write circuit adapted to flow a write current through an unconditioned first selected cell having a first block address associated with a pending write command received from a host to write the first selected cell to a selected data state, and to concurrently pass a thermal preconditioning current through a second selected cell having a second block address not associated with any pending write command received from a host, the second block address selected in response to the first block address.