1. A digital system, comprising: a processor core capable of being coupled to a first memory containing executable instructions and a second memory with a faster speed than the first memory, and configured to execute one or more instructions of the executable instructions from the second memory; and a cache control unit configured to be coupled to the first memory, the second memory, and the processor core to fill at least the one or more instructions from the first memory to the second memory before the processor core executes the one or more instructions, wherein the cache control unit is further configured to: examine instructions being filled from the first memory to the second memory to extract instruction information containing at least branch information; create a plurality of tracks based on the extracted instruction information; and fill the at least one or more instructions based on one or more tracks from the plurality of instruction tracks.