1. A computer processor comprising: a plurality of operand storage elements that store operand data values; and execution logic including a number of functional units operably coupled to the plurality of operand storage elements, wherein the execution logic is configured to perform operations that access said operand data values stored in the plurality of operand storage elements; wherein said operand data values include a predefined None operand data value that is indicative of a missing operand value; wherein said operations include a RETIRE operation that specifies first data representing a number of operand data values that is intended to be retired in a predefined machine cycle, wherein the first data is selected from i) an integer value representing a static count of operand data values that is intended to be retired in the predefined machine cycle, and ii) a list of one or more tags specifying scalarity and element width for a corresponding operand data value that is intended to be retired in the predefined machine cycle, wherein the number of tags in the list represents a static count of operand data values that is intended to be retired in the predefined machine cycle; and wherein, during execution of the RETIRE operation, zero or more None operand data values are selectively retired in the predefined machine cycle based on comparison of the first data representing the number of operand data values specified by the RETIRE operation and second data representing the number of operand data values to be retired as a result of execution of other operations by the execution logic in the predefined machine cycle.