1. A pixel processing system comprising: an instruction folding mechanism configured to: check data independency between first and second instructions associated with a first program; and generate a third instruction associated with a second program, wherein the third instruction is a combination of the first and second instructions, and wherein the first and second instructions are operable to output data to different components in a register; and a pixel shader configured to: receive the third instruction from the instruction folding mechanism; decode the third instruction and execute the second program and; wherein the pixel shader includes a configuration to output the data to the different components in the register responsive to execution of the second program.