1. A method for controlling interruption of a processor for processing interruption in accordance with an interrupt level, comprising the steps of: (a) determining an interrupt level in a course of execution of a predetermined instruction; (b) saving internal information of said processor; (c) setting an address for restore processing for the saving into a program counter as an instruction to be next executed and terminating execution of said predetermined instruction; (d) not carrying out the restore processing but carrying out interrupt processing in response to termination of execution of said predetermined instruction; and (e) returning to an interrupted point of said predetermined instruction by the restore processing executed from an address set in said program counter after termination of interrupt processing and resuming processing from a return point.