1. A method for scheduling a plurality of instructions in a computing system, the method comprising: generating a plurality of instruction lineages, the plurality of instruction lineages assigned to one or more registers and each of the plurality of instruction lineages having at least one node representative of an instruction from the plurality of instructions; scheduling the plurality of instructions based on a node order and the assignment of the one or more registers, wherein the node order is based on respective priority values associated with each of the nodes.