1. In a peripheral processing system having a bus, a memory storing program information operatively connected to the bus, and a central processing unit operatively connected to the bus which is responsive to program information stored in the memory, a data terminal subsystem which is operatively connected to the bus comprising: a coaxial cable; a plurality of data terminals having preassigned mutually exclusive address codes connected both physically and electrically in parallel for bidirectional communication solely along the coaxial cable, each terminal including electronic circuitry for passively monitoring the coaxial cable for the appearance on the cable of the preassigned address code thereof, and actively communicating along the cable only in response to the appearance of the preassigned address code on the coaxial cable; and a key station multiplexer operatively connected to both the bus and the coaxial cable, the multiplexer being responsive to the central processing unit and including electronic circuitry for transmitting and receiving encoded messages along the coaxial cable and the bus.