1. A method comprising: providing, by an operating system, instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system; converting, by an abstraction layer, respective identifiers of the plural hardware threads to a core identifier representing the core; presenting, by the abstraction layer, the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application.