1. A method of simulating interconnect lines in an electronic design automation simulation, the method comprising: partitioning the interconnect lines into groups of interconnect lines, wherein each group of interconnect lines does not have interactions with any of the other groups of interconnect lines and wherein at least one of the groups of interconnect lines contains at least three interconnect lines; and modeling the interconnect lines in each group, wherein the modeling includes at least one of modeling mutual inductances and modeling of mutual capacitances.