1. A method comprising: in response to a processor request for accessing a virtual memory address, finding in a virtual page table, a first page-translation entry (PTE) matching the virtual address, and having a first physical page number; in response to finding said first PTE, finding in the virtual page table a second PTE representing a contiguous physical page to a physical page represented by the first PTE and having a second physical page number; coalescing the first and second page PTEs into a single translation-lookaside buffer (TLB) entry; and in further response to said processor request, accessing physical memory corresponding to said virtual memory address after said coalescing.