1. A memory device having a crossbar array, the memory device comprising: a first array of first electrodes extending along a first direction; a second array of second electrodes extending along a second direction, each second electrode having a polycrystalline semiconductor layer including silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array, wherein each intersection of the first array and the second array defines a two-terminal resistive memory cell.