1. A special purpose processor comprising: a FPGA implementing a neural model, the neural model including multiple neural elements the FPGA including multiple cores to implement neural elements, the cores processing data in parallel, the processing in the cores including presynaptic calculations using input values and weights, postsynaptic calculations to produce postsynaptic outputs using the results of the presynaptic calculations and plasticity calculations to modify the weights, the input values being provided to the cores by looping through a connection table to get pointers for an output storage table, the pointers indicating the inputs for the cores in a predefined order.