1. An interconnection fabric in an integrated circuit, comprising: a root network; a first plurality of networks; a second plurality of networks, each network of the root network, the first plurality of networks, and the second plurality of networks comprising a respective first plurality of ports and a respective second plurality of ports, wherein each port of the first plurality of ports and the second plurality of ports comprises a plurality of pins, wherein the pins of the first plurality of ports to selectively couple to the pins of the second plurality of ports through switches of the respective network; a third plurality of networks, each of the third plurality of networks comprising a first plurality of ports and a second plurality of ports, wherein each port of the first plurality of ports and the second plurality of ports comprises a plurality of pins, wherein a plurality of pins of a respective port of the second plurality of ports of the root network are connected to the pins of a respective port of the first plurality of ports of a respective network of the first plurality of networks, wherein a plurality of pins of a respective port of the second plurality of ports of each of the first plurality of networks are connected to the pins of a respective port of the first plurality of ports of a respective direct descendant network of the second plurality of networks, wherein a plurality of pins of a respective port of the second plurality of ports of each of the second plurality of networks are connected to the pins of a respective port of the first plurality of ports of a respective direct descendant network of the third plurality of networks, and wherein a plurality of pins of a first port of the second plurality of ports of a first network of the third plurality of networks are connected to the pins of a plurality of ports selected from the first plurality of ports of respective ancestral networks of the root network, the first plurality of networks and the second plurality of networks.