1. A multiprocessor control apparatus comprising: a first processor which executes a first instruction code; a second processor which executes a second instruction code, the second processor being different from the first processor; an instruction converting section which converts the second instruction code into the first instruction code executable by the first processor; a control section which switches between a first mode for operating the first processor and the second processor and a second mode for suppressing an operation of the second processor compared to an operation of the first processor; and a hypervisor which chooses which one of a first program group constituted of the first instruction code, and a second program group constituted of the second instruction code is to be executed, wherein, in the first mode, the first processor executes the first program group constituted of the first instruction code, and the second processor executes the second program group constituted of the second instruction code independently from the first processor, and wherein, in the second mode, the hypervisor converts the second instruction code in the second program group into the first instruction code executable by the first processor, using the instruction converting section, and allows the first processor to execute the first instruction code converted from the second instruction code and the first instruction code in the first program group in parallel in a time-sharing manner.