1. A system comprising: a processor; a coprocessor coupled to the processor, the coprocessor comprising coprocessor core logic and a microcode store; memory coupled to the processor and the coprocessor; wherein the microcode store is operable to provide one or more microinstructions to the coprocessor core logic to generate one or more native machine instructions corresponding to an abstract instruction received at the coprocessor; wherein the coprocessor is operable to store the one or more native machine instructions in the memory; wherein the processor is operable to execute the one or more native machine instructions stored in the memory, and wherein the coprocessor is operable to generate one or more native machine instructions to explicitly control the coprocessor.