1. A translation lookaside buffer (TLB) comprising: a content addressable memory (CAM) having a plurality of entries each storing a virtual address corresponding to one of a plurality of address translations; enable logic configured to, responsive to a TLB query, enable searching of selected ones of the CAM entries that correspond to a thread that initiated the TLB query, wherein the thread that initiated the TLB query is one of a plurality of threads executing on a processor, and wherein the enable logic is further configured to inhibit searching of CAM entries that are not associated with the thread that initiated the TLB query; a mask vector storage unit configured to store a plurality of mask vectors, wherein each of the plurality of mask vectors uniquely corresponds to one of the plurality of threads executing on the processor, wherein each mask vector includes a plurality of bits each uniquely corresponding to one of the plurality of CAM entries, wherein each bit, when set, indicates that the thread corresponding to that mask vector is associated with the CAM entry corresponding to that bit.