1. A method of changing resistance states in a non-volatile memory integrated circuit, comprising: applying a first voltage pulse to a non-volatile memory cell including a steering element in series with a state change element, said first voltage pulse having a first staffing value, said non-volatile memory cell being in a first resistance state prior to applying said first voltage pulse; changing an amplitude of said first voltage pulse at a substantially constant slope to a first ending value during said applying to increase an amount of bias applied to said non-volatile memory cell; determining whether said non-volatile memory cell has reached a second resistance state after applying said first voltage pulse; applying a second voltage pulse to said non-volatile memory cell if said non-volatile memory cell has not reached said second resistance state, said second voltage pulse having a second starting value; changing an amplitude of said second voltage pulse at a substantially constant slope to a second ending value during said applying said second voltage pulse.