1. A method for reducing the number of times in-flight loads are searched by store instructions in a multi-threaded processor comprising: freezing load issue for a thread t_old for a number of cycles; rejecting a t_new load instruction; sending notification to the rest of the processor that the t_new load instruction has been rejected; snooping a load reorder queue (LRQ) of a t_old for any load which comes from a cache line L accessed by the load instruction and then forces such loads to be re-executed; and changing ownership of cache line L to thread t_new.