1. A memory device comprising: an array of addressable three-level memory cells; a coding circuit to be input with three-bit strings and to generate corresponding ternary strings based upon a code; a program circuit to be input with the ternary strings and to store them in respective pairs of three-level memory cells; a read circuit to read stored ternary strings in the respective pairs of three-level memory cells; and a decoding circuit to be input with the stored ternary strings and to generate corresponding strings of three bits based upon the code.