1. In a computer-based system employing a CPU, a memory subsystem, and at least one bus master interface module, a method comprising: monitoring a signal used to adaptively control a throttling of said CPU; monitoring said CPU for a CPU power state; monitoring said CPU for a CPU performance state; and performing dynamic arbitration of memory accesses, by said CPU and said at least one bus master interface module, to said memory subsystem based on, at least in part, said monitorings.