1. An apparatus that dynamically allocates physical registers in a windowed processor architecture, comprising: a processor; a physical register file within the processor; a register map within the processor that is configured to map architectural registers defined within an executing program to physical registers within the physical register file; and a window allocation mechanism within the processor that is configured to allocate a new name space for a register window without allocating physical registers for the register window; thereby allowing the physical registers to be dynamically allocated as needed instead of being allocated at window initialization time.