1. An apparatus comprising: circuitry at a controller resident on a non-volatile dual in-line memory module (NVDIMM); a receive component for execution by the circuitry to receive an error scanning request; an error component for execution by the circuitry, responsive to the error scanning request, to scan a device physical address range for a non-volatile memory at the NVDIMM and identify uncorrected errors in the device physical address range, the non-volatile memory capable of providing persistent memory for the NVDIMM; and an indicate component for execution by the circuitry to indicate device physical addresses having the identified uncorrected errors to a basic input/output system (BIOS) for a computing platform coupled with the NVDIMM.