1. Apparatus for testing circuit assemblies comprising: means for storing data relating to a topology of a circuit assembly; means for storing testing data for said circuit assembly; means for performing tests on said circuit assembly in accordance with said testing data and storing test results therefrom; means for generating and storing possible causes of test failures based, at least in part, on the stored topology; means for predicting test results which can be caused by said possible causes of test failures; logic means for detecting inconsistencies between observed test results and predicted test results, and means responsive to detected inconsistencies from said logic means for indicating possible causes of test failure which are consistent with said observed test results.