1. A memory, comprising: a memory cell array including a plurality of memory cell blocks, wherein each memory cell block has a plurality of non-volatile memory cells; an access operation detecting portion configured to detect an access operation for a prescribed number of the memory cells; and a refresh portion configured to rewrite data in the memory cells, to read data from and rewrite data to the memory cells in a power-down state, and to read data from and rewrite data to the memory cells included in at least one of the memory cell blocks of the prescribed number of memory cells based on at least the detected access operation.