1. A data processing unit for a computer processor, the data processing unit comprising: register access circuitry capable of accessing one or more data operands responsive to a data access instruction; permute circuitry capable of performing a permutation operation responsive to said data access instruction; and execution circuitry, said circuitry being arranged such that, in use, a permutation operation is performed in series with (i) register access and (ii) execution of a data processing operation on the or each operand accessed.