1. A computing core comprises: memory that is partitioned into a user section and a kernel section, wherein the user section is divided into a first set of pillars that is based on a first dispersed storage network (DSN) memory set within a DSN, wherein the kernel section is divided into a second set of pillars that is based on a second DSN memory set within the DSN; and a memory controller operably coupled to the memory, wherein the memory controller is operably to: dispersed storage error encode a first data segment of user data into a set of encoded user data slices; store the set of encoded user data slices in the first set of pillars that is based on the first DSN memory set within the DSN of the user section; dispersed storage error encode a second data segment of system data into a set of encoded system data slices; and store the set of encoded system data slices in the second set of pillars that is based on the second DSN memory set within the DSN of the kernel section.