1. Programmable logic device circuitry comprising: a plurality of regions of programmable logic; general purpose interconnection circuitry programmably configurable to allow outputs of substantially any of the regions to be applied to inputs of substantially any of the regions; function-specific block (“FSB”) circuitry; and routing circuitry programmably configurable to route outputs of the FSB circuitry to only a subset of the regions, wherein the routing circuitry is adapted to route FSB outputs for output driving by output driver circuitry of the regions in the subset, and wherein the output driver circuitry of the regions in the subset is adapted to drive signals into the general purpose interconnection circuitry.