1. An integrated circuit comprising: a first interconnect; at least one vertically oriented semiconductor body disposed over the first interconnect, wherein a first end of the at least one vertically oriented semiconductor body is in electronic contact with the first interconnect; a gate layer surrounding an active channel portion of the at least one vertically oriented semiconductor body and configured as a second interconnect; and a third interconnect disposed over the gate layer, wherein a second end of the at least one vertically oriented semiconductor body is in electronic contact with the third interconnect.