1. An asynchronous logic element, comprising: a plurality of edges providing bit-level asynchronous communication with at least one contiguously neighboring logic element, each edge being configured to contain at least one state token having a value of “0” or “1”; and self-timed computational circuitry configured to perform a logic operation, the computational circuitry having at least one input and at least one output, each computational circuitry input being configured to pull a state token from an edge and each computational circuitry output being configured to push a state token onto an edge, the computational circuitry being configured to utilize at least one state token pulled from an edge as at least one logic input to produce an output state token reflecting the result of the logic operation and to push the output state token from the computational circuitry output onto an edge, wherein the logic circuitry is configured to perform the logic operation when the computational circuitry inputs contain valid state tokens and the computational circuitry outputs are empty.