1. In a computing environment, a method of monitoring performance of one or more architecturally significant processor caches coupled to a processor, the method comprising: executing an application on one or more processors coupled to one or more architecturally significant processor caches, wherein the application utilizes the architecturally significant portions of the architecturally significant processor caches; and generating metrics related to performance of the architecturally significant processor caches as a result of utilizing the architecturally significant portions of the architecturally significant processor caches.