1. In a field programmable logic device having a programmable interconnect structure and a plurality of logic blocks, each logic block comprising at least one lookup table having memory cells which can be loaded from a bitstream during configuration of said field programmable logic device and loaded from said interconnect structure during operation of said field programmable logic device, a method of using said field programmable logic device comprising the steps of: configuring said logic blocks by loading said bitstream into said memory cells; operating said field programmable logic device in a first configuration loaded from said bitstream for a first period of time; after said first period of time, reconfiguring at least one of said logic blocks by loading data from said interconnect structure into at least one of said memory cells; and operating said field programmable logic device in a second configuration determined by both said bitstream and said interconnect structure for a second period of time.