1. Stacked protocol interface circuitry for a programmable integrated circuit device having a programmable logic portion, wherein: said stacked protocol interface circuitry is hard logic on said programmable integrated circuit device that is separate from, and connected to, said programmable logic portion of said programmable integrated circuit device; said stacked protocol interface circuitry comprises: a protocol stack module, implemented in hard logic, including a plurality of stages for respective protocol layers progressing from a stack input to a stack output, each said layer stage having a layer stage input and a layer stage output, a respective selectable bypass at said layer stage input of each of at least one of said layer stages, and programmable selection circuitry coupled to the respective selectable bypass; and signals arriving at said layer stage input are selectably directed to one of (a) said respective layer stage, and (b) said respective bypass.