1. A hardware prefetch tablewalk system for a microprocessor, comprising: a tablewalk engine, comprising: tablewalk logic configured to perform a tablewalk operation to translate a received virtual address into a translated address; a comparator configured to compare priority values and to provide a comparison value; and priority logic that is configured to: receive a new tablewalk request that includes a virtual address and a priority value; to initiate a new tablewalk operation by said tablewalk logic for translating a virtual address associated with said new tablewalk request into a corresponding translated address when said tablewalk logic is not currently performing a tablewalk operation; and to cause said tablewalk logic to flush a current tablewalk operation and to initiate said new tablewalk operation when said comparison value indicates that said new tablewalk request has a higher priority value than said current tablewalk operation; and a hardware prefetch engine that is configured to submit a hardware prefetch tablewalk request received by said tablewalk engine to perform a hardware prefetch tablewalk operation using a lowest priority value.