1. A method for use in a computer system, the computer system having a translator for translating instructions executable in a source instruction set Architecture into instructions executable in a target instruction set Architecture, the method comprising the steps of: a) the translator determining a probability of a first block of instructions following an order of execution to a second block of instructions, said probability consisting of a ratio of a taken counter and a used counter, said taken counter represents a number of times the first block of instructions follows the order of execution to the second block of instructions, and said used counter a number of times the first block of instructions has been executed; and b) in response to the probability exceeding a predetermined threshold, the translator generating a hyperblock of instructions representing the first and second block of instructions translated, and combined in the order of execution.