1. A system comprising: one or more processors; a host configured to execute instructions in an output language (OL); a guest communicatively coupled to the host, the guest configured to issue a sequence of instructions in an input language (IL); and a binary translator configured to convert the sequence of IL instructions of the guest into a corresponding sequence of OL instructions of the host, the binary translator comprising computer-executable instructions directing the one or more processors to: calculate a first index by evaluating a function with P as an argument, where P is a procedure entry address of a called IL subroutine that is to be translated into an OL subroutine; store a corresponding OL return address in a return target cache at a location indicated by the first index; execute an OL subroutine translation of the called IL subroutine; and upon completion of execution of the OL subroutine translation: in a launch block of instructions, request to retrieve an OL target address from the return target cache at a location indicated by a second index; generate a fault when the launch block is unbound, wherein the launch block is unbound when the first index is different from the second index; scan the return target cache for a third index that points to a confirm block with a predicted IL return address that matches an IL return address from a stack for the called IL subroutine; and replace the second index with the third index.