1. A method of accelerating memory operations using virtualization information comprising: executing a hypervisor on hardware resources of a computing system; creating a plurality of domains under the control of the hypervisor; allocating to each domain memory resources comprising accessible memory space that is exclusively accessible by that domain; allocating to each domain one or more processor resources; identifying domain layout information comprising a boundary of accessible memory space of each domain; providing the domain layout information to each processor resource; and configuring each processor resource to implement, on a per domain basis, a restricted coherency protocol based on the domain layout information, wherein the restricted coherency protocol bypasses, relative to the domain, downstream caches when a cache line falls within the accessible memory space of that domain.