1. A digital signal processor comprising: (a) signal processor circuit elements comprising: a serial access data memory having at least two data channels; multiplier means arranged to multiply at least three variables by respective coefficients and sum the products, including means arranged to detect overflow in an output signal of the multiplier means and substitute predetermined saturation values for said output signal; at least two shift registers; input interface means; output interface means; (b) a crossbar switching network arranged selectively to interconnect said circuit elements; and (c) a control circuit arranged to respond to each of a plurality of predetermined instructions to control the crossbar network to interconnect said circuit elements in corresponding predetermined ways, whereby a selected sequence of instructions supplied to the control circuit causes said circuit elements to be interconnected by the crossbar network in a selected sequence of ways chosen to effect a desired signal processing function.