1. A multi-bit data flip-flop, comprising: input multiplexers coupled to receive mode select signals and configured to select between input data bits for a data mode of operation and input scan bits for a scan mode of operation based upon the mode select signals; master latches coupled to receive and latch outputs from the input multiplexers for the data mode of operation and for the scan mode of operation; and slave latches coupled to receive and latch outputs from the master latches for the data mode of operation and for the scan mode of operation, the slave latches being further coupled to provide propagated input scan bits to the input multiplexers for the scan mode of operation; and wherein the input multiplexers, master latches, and slave latches are further configured to operate in an initialization mode of operation, based upon activation of one or more initialization signals, to propagate a fixed input scan bit through the multi-bit data flip-flop to initialize output bits for the multi-bit flip-flop to a common logic state.