1. A microprocessor having a privileged architecture register that is modifiable by a privileged mode instruction, the microprocessor comprising: an execution core, for receiving the privileged mode instruction and for modifying the privileged architecture register upon execution of the privileged mode instruction, wherein the privileged architecture register is not modifiable when the microprocessor is executing unprivileged instructions; wherein the privileged mode instruction comprises a first operand that is an immediate value to specify a particular bit field within the privileged architecture register to be modified upon execution of the privileged mode instruction; and whereby said privileged architecture register is modified atomically when the privileged mode instruction executes without first requiring that the privileged architecture register be read.