1. An integrated circuit comprising: a first non-volatile memory array comprising a plurality of first non-volatile memory cells; and a second non-volatile memory array comprising a plurality of second non-volatile memory cells, each of the plurality of second non-volatile memory cells having substantially the same features as the plurality of first non-volatile memory cells, wherein dimensions of the features of the first and second non-volatile memory cells are substantially the same except that a channel width of each second non-volatile memory cell in the second non-volatile memory array is larger than a channel width of each first non-volatile memory cell in the first non-volatile memory array.