1. A system comprising: a host processor; a system memory associated with the host processor; a bus coupled to the host processor; and a graphics processor coupled to the bus, the graphics processor to receive a workload from the host processor and including, a plurality of caches, and a kernel to issue a thread group for execution of the workload on the graphics processor in response to the graphics processor detecting a thread-related condition of one or more of the plurality of caches, wherein the graphics processor is to initiate one or more coherency messages in response to the thread-related condition of one or more of the plurality of caches, and the thread-related condition is to be associated with the execution of the workload on the graphics processor, wherein the thread group contains a plurality of threads and each of the plurality of threads includes a corresponding coherency message, and wherein the graphics processor is to enable cache coherency operations to be initiated at a kernel or sub-kernel level.