1. A method in a computing node, having at least a processor, at least one memory cache associated with said processor and access to a main memory with a plurality of memory locations each having a memory address, for efficiently processing memory writes comprising the steps of: upon detection of a memory write for a target memory address, a memory subsystem at said node determining if at least one memory cache has said target memory address in the cache; and implementing said memory write at least one time based on said determining.