1. A boundary-scan-compliant component, the boundary-scan-compliant component having a test access port (TAP) and a forwarded clock interface including data and forwarded clock input pins for receiving signals from and sending signals to external test circuitry during a test operation, the boundary-scan-compliant component comprising: a first and second input buffer coupled to each of the data input pins, the first input buffer being responsive to the forwarded clock; input an instruction register coupled to the TAP, the instruction register for receiving IEEE 1149.1 defined and other test instructions provided by the external test circuitry at the TAP; a boundary scan register coupled to the TAP, the boundary scan register including boundary scan cells associated with each of the input pins and connected to the output of each input buffer coupled thereto; a TAP controller for generating control signals to capture data from outputs of the input buffers into the boundary scan cells to which the input buffers are connected and to shift the captured data through the boundary scan cells in response to test instructions received by the instruction register; and compliance control circuitry, responsive to the instruction register and the TAP controller, for selectively coupling outputs of the first and second input buffers connected to each data input pin for capture by the BSR cell with which the input pin is associated, the compliance control circuitry coupling each BSR cell to the second input buffer when the instruction register has been loaded with one of the IEEE 1149.1 defined test instructions and coupling the BSR cell to the first input buffer when the instruction register has been loaded with one of the other test instructions corresponding to an input threshold voltage test of the data input pins.