1. A data processing apparatus, comprising: a central processing unit for executing a plurality of instruction codes; a data bus connected to said central processing unit; memory means, connected to said data bus, for storing data received from said central processing unit via said data bus; identification means, connected to said data bus, for identifying a predetermined instruction code from the plurality of instruction codes, the predetermined instruction code requiring said central processing unit to access said memory means; and logic operation means, connected to said data bus, said central processing unit and said identification means, for operating on data when the predetermined instruction code is identified, by receiving data from said memory means via said data bus, executing a first operation using the received data to produce data, and writing the produced data in said memory means, said logic operation means receiving, executing and writing while said central processing unit is executing a second operation as instructed by the predetermined instruction code, thereby completing the first operation in less time than said central processing unit would take to complete the first operation.