1. A method for reducing transfer latencies in fencepost buffering comprising the steps of: providing a cache between a network controller and a host entity with shared memory wherein the cache has a top cache and a bottom cache; fetching a first and second descriptor address location from shared memory wherein the first descriptor address location is a location of an active descriptor and the second descriptor address location is a location of a reserve descriptor; copying the active descriptor to the top cache; and issuing a command to DMA for transfer of the active descriptor.