1. A multi-core simulation method of a multi-core simulation system, which comprises a multi-core simulator configured to perform simulation on a plurality of core models and a host processor configured to perform the multi-core simulator, the multi-core simulation method comprising: allocating, to a working memory, a shared translation block cache commonly used for the plurality of core models; reading a first target instruction to be performed in a first core model; generating a first translation block corresponding to the first target instruction and provided with an instruction set used in the host processor; performing the first translation block in the first core model after the first translation block is stored in the shared translation block cache; reading a second target instruction to be performed in a second core model; searching the shared translation block cache for a translation block including same content as that of the second target instruction; and performing the first translation block in the second core model when the first target instruction includes same content as that of the second target instruction.