1. A variable architecture digital computer comprising: a microprogram module containing a plurality of microprogram routines; an instruction module having an instruction register divided into a plurality of bytes in excess of the number of bytes of an instruction word, said instruction register capable of shifting the contents of said register in byte increments under the control of said microprogram routines; a program module having a memory divided into a program memory and a data memory, said program memory being the source of said instruction words; a processor module to perform operations on data from said data memory and said instruction register under the control of said microprogram routines; means for sequencing said microprogram routines; means for inputting and outputting data to and from said data memory under the control of said microprogram module; and means for controlling the operations of each element of said computer under the control of said microprogram module.