1. A memory management device connectable to a non-volatile main memory and a processor comprising: an acquiring unit acquiring logical addresses from the processor; an address conversion unit converting logical addresses acquired by the acquiring unit into physical addresses of the non-volatile main memory; and an access unit reading data from memory areas of the non-volatile main memory designated by physical addresses at reading, and writing data to memory areas of the non-volatile main memory designated by physical addresses at writing, wherein the non-volatile main memory includes at least two regions, and the access unit determines which region to write writing data based on access frequency information associated with the writing data.