1. A computer program product for implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or cracked sequence, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being readable and executable by a processing circuit to cause the processing circuit to: recognize register operand and integer terms associated with the ADDPCIS instruction; and set a value of a target register associated with the ADDPCIS instruction in accordance with the integer term summed with another term by: obtaining a next instruction address (NIA), moving an architecturally defined register file from a first temporary register to a general purpose register, and adding a shifted immediate constant to a value stored in a second temporary register.