1. A memory device, comprising: a first memory partition including a first plurality of memory locations; a second memory partition including a second plurality of memory locations; and an operation instruction decoder configured to decode a received instruction as a next partition command to perform a memory access at a same memory location of the second memory partition as a previous memory location of a previous memory access of the first memory partition, wherein: the operation instruction decoder decodes an initial received instruction that includes a first memory address for the previous memory location of the first memory partition, a first memory partition identification, and a function to be performed; the memory device comprises a 3D cross-point (3D XP) memory array; the initial received instruction comprises: a first plurality of bits identifying the first memory address at a first storage plane within the first memory partition of the 3D XP memory array, a second plurality of bits identifying a second memory address at a second storage plane within the first memory partition of the 3D XP memory array, and a third plurality of bits indicating the function; and the next partition command comprises a fourth plurality of bits indicating that the first memory address, second memory address, and function are to be applied at the second memory partition of the 3D XP memory array.