1. A processor system, comprising: a multichannel memory operable to store data values; a program memory operable to store Compound CISC (CCISC) instructions; and a processor operable to execute a computer program assembled with at least a portion of the compound CCISC instructions, to retrieve a CCISC instruction from the program memory, to access at least two data values in the multichannel memory based on the executed computer program, and to operate on the at least two data values in the multichannel memory based on the C-CISC instruction, wherein the processor retrieves the CCISC instruction, accesses the at least two data values, and operates on the at least two data values during a same clock cycle.