1. A Josephson logic circuit including first and second input signal lines and operatively connected to receive a reference electric potential, comprising: a first Josephson element operatively connected to the first input signal line and to receive the reference electric potential; a second Josephson element operatively connected to the second input signal line and to receive the reference electric potential; first and second resistors connected in series to each other at a first node and directly connected to the first input signal line and the second input signal line, respectively; a third Josephson element operatively connected to the first node and to receive the reference electric potential; an output signal line operatively connected to the first node; and offset means, operatively connected to said first and second Josephson elements, for supplying an offset current to said first and second Josephson elements.