1. A method of providing and receiving signals comprising: providing a first single-ended signal by: disabling a high-speed differential input buffer having a first input coupled to a first pad; providing the first single-ended signal to a low-speed output buffer using a first double-data rate register; enabling the low-speed output buffer using a tristate register comprising a first flip-flop and a second flip-flop, the second flip-flop having an input coupled to an output of the first flip-flop; and providing the first single-ended signal on the first pad using the low-speed output buffer; and receiving a second single-ended signal by: disabling the high-speed differential input buffer having a second input coupled to a second pad; and receiving the second single-ended signal on the second pad using a low-speed input buffer.