1. In a processor having a performance model configured to receive an instruction stream, an instruction trace generation method, comprising: generating a testcase for a millicoded instruction in an instruction trace pool, wherein the millicoded instruction is included in a parent instruction trace; processing the testcase to generate a millicode instruction trace snippet; editing the millicode instruction trace snippet to generate a templatized millimode snippet; processing the parent instruction trace; in response to encountering the millicoded instruction in the parent instruction trace, accessing the templatized millimode snippet; updating the templatized millimode snippet with a value from the parent instruction trace; and generating a millicoded instruction trace from the updated templatized millimode snippet.