1. A processor comprising: root key generation logic to generate a root key, the root key generation logic including a source of static and entropic bits; key derivation logic coupled with the root key generation logic, the key derivation logic to derive one or more keys from the root key; cryptographic primitive logic coupled with the root key generation logic to perform cryptographic operations; and a security boundary containing the root key generation logic, the key derivation logic, and the cryptographic primitive logic.