1. A virtual multi-processor system comprising: a plurality of logic processors; a logic processor controller configured to allocate a time slice to each of the logic processors to control the logic processors so that the logic processors sequentially run in a time-sharing manner; an interrupt handler processing-time table; and an external interrupt controller configured to, when a request for an interrupt processing occurs, acquire interrupt processing time corresponding to the interrupt processing from the interrupt handler processing-time table, and then allow one of the logic processors that has a time slice longer than the interrupt processing time and that runs next to execute the interrupt processing, wherein when time for the interrupt processing is longer than a remaining time slice of a currently running logic processor, the external interrupt controller changes the remaining time slice to zero via the logic processor controller, and allows the logic processor that runs next to execute the interrupt processing.