1. A system LSI having a plurality of ordinary operation modes and a plurality of special modes in response to the clock state supplied to a central processing unit, comprising: the first memory means storing a clock control library for controlling the clock state transition between said ordinary operation modes; a system control circuit having a register and carrying out the clock state transition between said ordinary operation mode and said special mode in response to the change of the value of said register, and also carrying out the clock state transition among said ordinary operation modes in response to said clock control library; a clock generation circuit receiving a plurality of standard clocks and generating the clock supplied to said central processing unit according to the control of said system control circuit; and the second memory means storing an application program; wherein call of said clock control library and change of said register value are controlled by said application program.