1. A reconfigurable detector comprising: at least one array of a plurality of pixels, each of the plurality of pixels selected to receive and read-out an input; wherein the pixel array is divided into at least one pixel group for conducting a common predefined analysis, wherein each of the pixel groups is comprised of at least two pixels; each of the plurality of pixels having a programmable circuitry, in communication therewith, each of said circuitry being programmed with a dynamically configurable user-defined function such that each of said circuitry receives the input from the selected pixel and outputs a modified input; and a summing circuit in communication with the plurality of programmable circuits, said summing circuit designed to sum the modified inputs from the common pixel group in a single binning instruction to generate a scalar output for the pixel group.