1. A logical operations functional block for an execution unit of a processor, the logical operations functional block including a first input data link for a first operand and a second input data link for a second operand, wherein the execution unit includes a register connected to an error correction code detection unit, the logical operations functional block comprising: a look-up table configured to receive an error correction code syndrome from the error correction code detection unit; and a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit.