1. A method for programming in a memory device, comprising: programming selected memory cells connected to a selected word line (WLn) of a set of word lines, the selected memory cells are programmed to a plurality of target data states, and memory cells which are to remain in an erased state are also connected to the selected word line, the programming is performed by performing a plurality of program-verify iterations for the selected word line, each program-verify iteration of the plurality of program-verify iterations is performed by applying a program voltage followed by performing a verify test for one or more target data states of the plurality of target data states, and the program voltage is stepped up in the plurality of program-verify iterations; and during each program voltage, applying a first pass voltage to a word line (WLn+1) in the set of word lines which is adjacent to the selected word line and after the selected word line in a word line programming order, while applying a second pass voltage to a word line (WLn−1) in the set of word lines which is adjacent to the selected word line and before the selected word line in a word line programming order, wherein during one or more initial program-verify iterations of the plurality of program-verify iterations, the first pass voltage exceeds the second pass voltage by a difference, the first pass voltage becomes progressively smaller during subsequent program-verify iterations of the plurality of program-verify iterations, and the difference becomes progressively smaller during the subsequent program-verify iterations.