1. A method, in a logically partitioned data processing system, for controlling depth and latency of exit of a virtual processor's idle state, the method comprising: generating, by a virtualization layer, a cede latency settings information (CLSI) data; responsive to booting a logical partition, communicating, by said virtualization layer, said CLSI data to an operating system (OS) of said logical partition; determining, by said OS, a particular idle state of a virtual processor under a control of said OS, wherein said determining is based upon said CLSI data; and responsive to said OS calling said virtualization layer, communicating, by said OS, said particular idle state of said virtual processor to said virtualization layer for assigning said particular idle state and wake-up characteristics to said virtual processor.