1. A low density parity check (LDPC) decoder in a digital video broadcasting (DVB) system in a digital video broadcasting (DVB) system, comprising: a memory configured to store a log-likelihood ratio (LLR) value of bits output from a demapper, and an LLR message exchanged between a variable node and an inspection node; and a node processor configured to compare a code rate of an LDPC code to a threshold value, select a function F(x)-based sum-product decoding algorithm as a decoding algorithm in response to the code rate being less than or equal to the threshold value, select a min-sum decoding algorithm as the decoding algorithm in response to the code rate being greater than the threshold value, and decode the LLR message based on the selected decoding algorithm, wherein the node processor comprises one or more decoders configured to decode the LLR message based on the function F(x)-based sum-product decoding algorithm in response to the function F(x)-based sum-product decoding algorithm being selected, decode the LLR message based on the min-sum decoding algorithm in response to the min-sum decoding algorithm being selected, and wherein the one or more decoders are configured to complementarily perform the decoding.