1. A bit stream multiplexer that couples a communication Application Specific Integrate Circuit (ASIC) to a high-speed bit stream media, the bit stream multiplexer comprising: a first transmit data multiplexing integrated circuit having an input that receives a first plurality of bit streams at a first bit rate from the communication ASIC and an output that produces a second plurality of bit streams at a second bit rate, the second plurality having fewer bit streams than said first plurality; a second transmit data multiplexing integrated circuit having an input that receives the second plurality of bit streams at the second bit rate and an output that produces a single bit stream at a line bit rate, the single bit stream having a predetermined bit order; a media interface that receives the single bit stream output at the line bit rate and couples the single bit stream output at the line bit rate to the high-speed bit stream media; and wherein the first plurality of bit streams is received by the first transmit data multiplexing integrated circuit in a first input order such that a multiplexing hierarchy of the first transmit data multiplexing integrated circuit produces the second plurality of bit streams having a first output order to such that a multiplexing hierarchy of the second transmit data multiplexing integrated circuit produces the single bit stream in the predetermined order.