1. A programmable integrated circuit comprising: (a) a plurality of programmably configurable logic blocks for carrying out program-defined logic functions; (b) a programmably configurable interconnect network for providing program-defined routing of signals between the plurality of programmably configurable logic blocks, wherein said configurable logic blocks each includes: (a.1) a programmable first memory area for storing a function-defining first set of lookup bits; (a.2) a programmable second memory area for storing a function-defining second set of lookup bits; (a.3) first select means coupled to the first memory area and responsive to a supplied first plurality of input signals for selecting and outputting a subset of the first set of lookup bits in accordance with the first plurality of input signals, wherein the combination of the first memory area and the first select means defines a first lookup table (first LUT); (a.4) second select means coupled to the second memory area and responsive to a supplied second plurality of input signals for selecting and outputting a subset of the second set of lookup bits in accordance with the second plurality of input signals, wherein the combination of the second memory area and the second select means defines a second lookup table (second LUT); (a.5) function substituting means, coupled to receive the output of the second LUT and responsive to a supplied substitution control signal, for selectively outputting in accordance with the substitution control signal one or another member of a group comprising the output of the second LUT and an alternate output; (a.6) first internal connect means for coupling the output of the first LUT such that said coupled output of the first LUT defines the substitution control signal and thereby the output of the first LUT determines whether one or another member of said group comprising the output of the second LUT and the alternate output is output by the function substituting means.