1. A computer implemented method for extracting an Input/Output buffer information specification (IBIS) simulation model of a semiconductor device that comprises a first semiconductor chip including a first output buffer having an output node connected to a first pad and a second semiconductor chip including a second output buffer having an output node connected to a second pad, wherein the first and second pads are connected to a single external connection terminal, one of the first and second output buffers is controlled to be active, and the other is controlled to be inactive, the method comprising: extracting, using a computer, an AC characteristics model of the first output buffer in an IBIS simulation model by executing a transistor-level circuit simulation using a net list that includes output transistors of the first and second output buffers; calculating, using the computer, an output capacitance model of the first output buffer in the IBIS simulation model by adding output capacitances of the first and second output buffers of the net list together; and synthesizing, using the computer, an IBIS simulation model of the first output buffer viewed from the external connection terminal by using the AC characteristics model and the output capacitance model of the first output buffer.