1. A data processing system comprising: a central processing unit; a multi-port cache array coupled to said central processing unit; a cache loader, coupled to said multi-port cache array; a main memory unit, comparatively slow to said cache array, coupled to said cache loader; a plurality of asynchronous clock interrupts, coupled to said central processing unit; an interrupt controller, coupled to said central processing unit, for managing real time data streams into said cache array; an execution quantizer coupled to said interrupt controller, wherein said execution quantizer limits any interrupts on said central processing unit from said plurality of asynchronous clock interrupts from executing after a fixed execution quantization (EQ) time; and gating logic, coupled to said execution quantizer, for gating off any interrupts received during a cache load or cache unload operation of a quantized block so as to allow said interrupts to be processed after completion of said cache load or unload operation.