1. An integrated electronic memory circuit operating in response to an external memory access signal, comprising: memory means for storing binary data in an array of memory locations, said memory means having a characteristic write time period during which data storage into said array is enabled; first data signal providing means for providing input data signals to said memory means, for storage by said memory means as binary data at respective memory locations; and write signal generator means internal to the integrated electronic memory circuit for generating, in response to said external memory access signal, an internal write signal during a prescribed time period causing said memory means to accept input data signals from said first data signal providing means for storage in said array, including means for adjusting the prescribed time period to substantially equal in time duration to said characteristic write time period, and in duration no longer than a time period during which said first data signal providing means provides input data signals to said memory means.