1. A system for executing variable width vector processing instructions, comprising: at least one vector register with a configurable width, operable to store a vector; at least one processing unit, communicably coupled to the at least one vector register, operable to execute code of at least one program that includes at least one variable vector processing instruction, at least one vector register width instruction configured to allow the at least one processing unit to adjust the configurable width, and supplies a vector registry width of the at least one vector register in response to executing the at least one vector register width instruction; wherein the at least one processing unit processes the at least one variable vector processing instruction utilizing the at least one vector register with the configurable width set by the vector registry width supplied by the at least one processing unit.