1. A computer-implemented method of mapping an electronic circuit to resources in a time-multiplexed field programmable gate array (TM-FPGA), the method comprising: obtaining a representation of the electronic circuit from a user; using the computer to automatically partition the electronic circuit into a plurality of clusters; and using the computer to automatically assign each cluster in the plurality of clusters to a context of the time-multiplexed field programmable gate array (TM-FPGA).