1. A memory comprising: a first group of resistive memory cells in a memory configured to implement a programmable logical function, wherein an output from the first group of resistive memory cells depends on all of the values stored in the first group of resistive memory cells, the first group of resistive memory cells comprising: a plurality of first resistive memory cells connected to each other in a series having two extremes, each first resistive memory cell in the group comprising: a resistive memory element for storing a resistance value; and a memory element access device for controlling access to the resistive memory element, the memory element access device connected in parallel to the resistive memory element; a group access device for controlling access to the first resistive memory cells, the group access device connected to one of the extremes; and a second group of resistive memory cells connected in parallel to the first group of resistive memory cells.