1. An integrated circuit, comprising: a communication network including a plurality of segments each structured to transfer data at independently controllable regular clock intervals; and a plurality of microprocessors intercoupled between the plurality of segments of the communication network, each of the plurality of microprocessors structured to operate independently from one another and at an independently controllable clock rate, and each having: a sending port structured to send a data message from its associated processor over the communication network, the data message including data and a first protocol signal that describes a validity of the data to be sent, and a receiving port structured to receive data for its associated processor from the communication network, the receiving port structured to send a second protocol signal over the communication network that describes a present ability of the receiving port to receive data.