1. A method for supporting different modes of multi-threaded speculative execution on a processor, comprising: executing two or more threads in a first multi-threaded speculative-execution mode; switching to a second multi-threaded speculative-execution mode by configuring circuits in the processor to enable the second multi-threaded speculative-execution mode; and switching the threads from executing in the first multi-threaded speculative-execution mode to executing in the second multi-threaded speculative-execution mode; wherein configuring the circuits involves configuring a per-register status indicator array to enable the per-register status indicator array to store status information for the second multi-threaded speculative-execution mode.