1. A method of generating a random address mapping for a non-volatile memory (NVM), comprising: identifying a number of bits (N) in a physical address space of the NVM; selecting at least one bit (G) of the N bits of the physical address space to be used for global interleaving, where G is less than N; determining a number of bits equal to N minus G (N-G) to be used for local interleaving; mapping the at least one G bit using a mapping function for global interleaving; interleaving (N-G) bits using an interleaving function for local interleaving; and generating a combined mapping comprising the mapped at least one G bit and the interleaved (N-G) bits.