1. An apparatus for generating addresses, said apparatus coupled to a microprocessor having addressable memory and a clock means for generating clocking signals, said microprocessor adapted for executing instructions for storing and retrieving data words at locations identified by the generated addresses in said addressable memory, said apparatus comprising: a. Means for selecting a predetermined range of addresses in said addressable memory during storage or retrieval of data words by said microprocessor initiated by at least one transition one of said clock means signals, b. Means for calculating a numerical value representative of at least one of said addresses within said range associated with any particular data word during the execution of an instruction for the storing or retrieving of data words by said microprocessor concurrent with the selection of said range of addresses by said selecting means, initiated by at least one transition of one of said clock means signals, said selecting, and said calculating means operatively connected to said microprocessor and said clock means, said means for calculating including: first means for generating a digital value representative of a relative address, at least one first register for storing said digital value representative of said relative address during at least one transition of said clocking signal, said register operatively connected to said first generating means, second means for generating a digital value representative of an absolute address, at least one second register for storing said digital value representative of said absolute address, adding means responsive to said clocking signal for adding at least a portion of said digital values of said first and second registers such that the resulting digital value is representative of an address within said selected range of said addresses, said adding means being operatively connected to said registers, and wherein said first register is operatively coupled to said first generating means and wherein said second register is operatively coupled to said second generating means, and c. means for coupling said numerical value to said microprocessor whereby said microprocessor may access said particular data word associated with said address.