1. A RISC processor supporting an X86 virtual machine, characterized in comprising an instruction module, a decoder, a look-up table, a fixed-point operation component and a floating-point operation component, wherein: the instruction module is adapted for storing a virtual machine instruction set that supports the X86 virtual machine; the decoder is adapted for, during the decoding of an instruction of the virtual machine instruction set, distinguishing the virtual machine instruction set mode of the instruction, decoding the instruction according to the distinguished virtual machine instruction set mode, and outputting the decoded instruction to the fixed-point operation component or the floating-point operation component; the look-up table is adapted for storing the jump addresses in an X86 program and the MIPS jump addresses, and quickly looking up the translations from the jump addresses in the X86 program to the MIPS jump addresses according to the out put of the decoder; the fixed-point operation component is adapted for making a processing on the fixed-point instruction of the virtual machine instruction set according to the output of the decoder and outputting the execution result; and the floating-point operation component is adapted for making a processing on the floating-point instruction of the virtual machine instruction set according to the output of the decoder and outputting the execution result.