1. A method for speculatively retiring instructions younger than a lock instruction in a core of a processor, the method comprising: retiring the lock instruction, wherein the lock instruction remains pending after retirement until a store portion of the lock instruction is deemed to be committed to memory; saving a checkpoint state of the processor responsive to retiring the lock instruction, the checkpoint state including data for rolling back state of the processor in the event of violation of an atomic property of the lock instruction or a fencing property of the lock instruction; speculatively retiring an instruction younger than the lock instruction after retiring the lock instruction but before the store portion of the lock instruction is committed to memory; detecting violation of one of the atomic property or the fencing property of the lock instruction by detecting, from a thread other than the thread executing the lock instruction, a request to allow a store to occur to either the memory address specified by the lock instruction or to the memory address specified by a completed load instruction from the same thread as the lock instruction that is younger than the lock instruction; and responsive to detecting the violation, rolling back state of the processor via the checkpoint state.