1. A method comprising: performing data processing using a main processor in response to a stream of data processing instructions, said data processing instructions including at least one coprocessor instruction; providing two source registers and a destination register for said at least one coprocessor instruction; providing a coprocessor instruction that includes an opcode specifying a data processing operation to be performed by the coprocessor and a coprocessor identification field for identifying a target coprocessor for the coprocessor instruction; and executing an instruction to extract values from said source registers and to place the values in said destination register, said instruction including information from which to determine the offset of the values to enable those values to be extracted from said source registers.