1. A high performance digital circuit, comprising: an FET digital subcircuit having a plurality of input signal terminals and a subcircuit output signal node characterized by a large source capacitance; a negative feedback amplifier in shunt feedback configuration having its input terminal connected to said subcircuit output signal node for providing a low impedance path for current around said capacitance and having an amplifier output terminal; said feedback amplifier comprising: a first P-channel FET device having a source connected to a relatively high supply voltage and a drain connected to said amplifier output terminal and to the drain of a first N-channel FET device having its source connected to a relatively low supply voltage; said first P-channel FET device having a gate electrode connected to said amplifier input terminal and said first N-channel FET device having a gate electrode connected to said amplifier input terminal; a second N-channel FET device and a second P-channel FET device mutually connected in parallel between said amplifier input and output terminals, with the gate of said second N-channel FET device connected to said relatively high supply voltage and the gate of said second P-channel FET device connected to said relatively low supply voltage; whereby said digital subcircuit with high output capacitance can be operated at a high speed.