1. A non-volatile memory device, comprising: a plurality of memory cells including at least one first memory cell connected to a first wordline and at least one second memory cell connected to a second wordline; a page buffer connected to the memory cells through bitlines; and a control logic configured to control the page buffer to program the first memory cell based on a first threshold voltage state order and the second memory cell based on a second threshold voltage state order in a program operation, the first and second threshold voltage state orders being different, and to read each of the first memory cell and the second memory cell according to different read schemes in a read operation.