1. An apparatus, comprising: a plurality of memory cells; and circuitry coupled to the plurality of memory cells, wherein the circuitry is configured to: initiate a read of a memory cell of the plurality of memory cells; determine a first voltage dependent upon data stored in the read memory cell, wherein the first voltage is determined at a first time period from the initiation of the read of the memory cell; determine reconstructed data dependent upon the first voltage; and determine a second voltage second voltage dependent upon the data stored in the read memory cell responsive to a determination that the first data contains an uncorrectable error, wherein the second voltage is determined at a second time period from the initiation of the read of the memory cell, wherein the second time period is greater than the first time period.