1. A processor comprising: a plurality of general purpose registers; cryptographic logic to encrypt and decrypt information, the cryptographic logic to support a Data Encryption Standard (DES) algorithm, a triple DES (3DES) algorithm, a Rivest-Shamir-Adleman (RSA) algorithm, and a Diffie Hellman algorithm; an on-die read only memory to store bootstrap security logic to copy code from a non-volatile memory device to a dynamic random access memory and to verify an authenticity and integrity of the code; and a plurality of execution units coupled to the plurality of general purpose registers, the on-die read only memory, and the cryptographic logic, wherein the processor is to execute the bootstrap security logic when booted up to enable a secure execution environment, wherein the processor is to support a first security privilege level to execute security functions or services, a second security privilege level to execute third-party supplied security code, and access to virtual address spaces inside and outside a secure memory partition by code at the first security privilege level.