1. A non-volatile memory formed on semiconductor material, comprising: a rectangular array of trenches extending into a top surface of the semiconductor material along first and second directions across the top surface that are orthogonal to each other, the individual trenches having a cross-sectional shape in the first direction including first opposing walls that are substantially perpendicular with the top surface and joined at their bottom by a bottom surface that is substantially parallel with the top surface, the individual trenches having a cross-sectional shape in the second direction including second opposing walls extending between the bottom and lop surfaces, a pair of charge storage elements formed as spacers along the first opposing walls of individual trenches with space therebetween in the first direction but without extending outside of the trenches in the first direction beyond the first opposing walls, the pair of charge storage elements extending in the second direction between the second opposing walls of the individual trenches, at least first conductive control gates positioned within the trenches between the charge storage elements in the first direction in a manner to be individually field coupled with at least one of the charge storage elements in the trench and being separated from the bottom surfaces of the trenches by a dielectric, the first control gates being connected to first conductive control lines that extend in the second direction, and ion diffusion regions located within the semiconductor material at least at the bottom surfaces of the individual trenches between the pair of charge storage elements in the first direction, the ion diffusion regions of the trenches being connected together along the second direction as bit lines.