1. A method of performing template-based classification of a circuit design, the method comprising: reading a template file that defines a plurality of channel-connected-region (CCR) templates; formatting a graph for each of the CCR templates; identifying a plurality of CCRs based on a partitioned netlist file that defines a given circuit design; generating a graph for each of the identified CCRs; and identifying a matching CCR template graph for each generated CCR graph.