1. A memory system, comprising: a non-volatile memory device including a normal region in which Most Significant Bits (MSBs) and Least Significant Bits (LSBs) stored in memory cells are simultaneously accessed, a hot region in which MSBs stored in memory cells are accessed, and a cold region in which LSBs stored in memory cells are accessed; and a memory controller for controlling the non-volatile memory device, wherein the memory controller includes: a read/write counter for counting the number of times that a read operation is performed and the number of times that a write operation is performed for each of a plurality of logical clusters to thereby produce a counting result; and a region selector for mapping each of the logical clusters to one region among the normal region, the hot region and the cold region based on the counting result to thereby produce mapping data, wherein the region selector maps logical clusters whose number of write operations is equal to or greater than a first threshold value to the normal region, and maps a logical cluster whose number of read operations is equal to or greater than a second threshold value and a value obtained by dividing the number of read operations by the number of write operations is equal to or greater than a third threshold value to the hot region among the logical clusters whose number of write operations is smaller than the first threshold value, and maps a logical cluster whose number of read operations is equal to or greater than the second threshold value and a value obtained by dividing the number of read operations by the number of write operations is smaller than the third threshold value to the cold region among the logical clusters whose number of write operations is smaller than the first threshold value.