1. A computer implemented method for processing a sequence of binary encoded scalar instructions, each instruction including an operation code, prior to fetching for execution in a data processing system, which places constraints on parallel instruction execution, including the steps of: transferring said sequence of binary encoded scalar instructions from a data storage unit to an instruction compounding unit; assigning each operation code in said sequence of instructions to one of a plurality categories based on a function performed by said data processing system in response to said operation code, the number of said categories being less than the number of operation codes in said sequence of instructions; storing in said data processing system matrix data that encodes which instruction pairs in said sequence of instructions are compoundable based on the category assigned to the operation code of each adjacent instruction of said instruction pairs; processing groups of instructions in said compounding unit to generate a compounding instruction for instruction pairs by comparing to said matrix data the category assigned in said assigning step respectively to each instruction of the instruction pairs in said group of instructions.