1. A computer implemented method for register allocation in a multi-threading data processing environment, the computer implemented method comprising: determining that a thread of an application in the data processing environment needs a higher number of physical registers than a second number of physical registers in a set of physical registers that is available to allocate to the thread; configuring the thread to utilize a logical register that is mapped to a memory register, wherein a physical register is a hardware register, the memory register comprises memory space configured to operate as an additional physical register outside the set of physical registers, wherein the logical register is a data structure that the thread references in a manner the thread references a physical register in the set of physical registers, and wherein the thread performs an operation on the logical register to cause the operation on one of the physical register and the memory register; and executing the thread.