1. An apparatus for generating a dynamic instruction dispatch priority for each of a plurality of threads concurrently executing in a multithreaded processor, the apparatus comprising for each of the plurality of threads: a storage element, for storing a dynamically updated workload level of the thread; parameter inputs, specifying a plurality of workload ranges; and comparison logic, coupled to said storage element and said parameter inputs, configured to output an instruction dispatch priority for the thread based on which of said plurality of workload ranges said workload value falls into.