1. A counter circuit configured to simultaneously maintain individual character match count values for a plurality of overlapping substrings of an input string of characters that match a portion of a regular expression stored in a plurality of rows of content addressable memory (CAM) cells of a ternary CAM device, comprising: control logic having inputs to receive an active signal, an increment signal, and a reset signal from one or more of the CAM rows, having a control input to receive a mode select signal, and having outputs to generate an increment counter signal, a reset counter signal, and an output enable signal; a counter circuit having inputs to receive the increment counter and reset counter signals, and having an output to generate a count value CNT; and compare logic having inputs to receive CNT, a target count value N, and the output enable signal, having a first output to generate a first output signal OUT 1 indicating whether 0<CNT<N, and having a second output signal OUT 2 indicating whether CNT≧N.