title: makefile: foreach "make -C" call
body: <p>here is part of my makefile:</p>
  
  <pre><code>PATH := $(shell pwd)
  EDIR := impl
  EFFECTS := $(filter-out $(EDIR), $(shell find $(EDIR) -maxdepth 1 -type d))
  ALLMAKES := $(patsubst %, $(PATH)/%, $(EFFECTS))
  
  
  all:
        $(foreach c,$(ALLMAKES),$(MAKE) -C $(c))
  </code></pre>
  
  <p>So essentially, I want to call make for all directories in the "impl" directory without "impl" itself. I understand that make will remember the last directory it was at when last called with the -C argument which is why I give the absolute path everytime. What make echos seems to be what I want:</p>
  
  <pre><code>make -C &lt;projectdir&gt;/impl/thing1 make -C &lt;projectdir&gt;/impl/thing2 make -C &lt;projectdir&gt;/impl/thing3
  </code></pre>
  
  <p>The issue is that make doesn't accomplish the command and simply prints:</p>
  
  <pre><code>make: make: Command not found. 
  </code></pre>
  
  <p>I can call "make -C &lt;path&gt;" for each of the directories individually outside of the makefile but it doesn't work in the foreach call. I have tried this instead but it doesn't work either:</p>
  
  <pre><code>$(foreach c,$(ALLMAKES),$(shell make -C $(c)))
  </code></pre>
  
  <p>Any ideas?</p>