title: How to produce a armv5 binary by zig builed-exec
body: <h2>Host</h2>
  <p>Here is a running binary in target system</p>
  <pre><code>readelf -h asterisk
  </code></pre>
  <pre><code>ELF Header:
    Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00
    Class:                             ELF32
    Data:                              2's complement, little endian
    Version:                           1 (current)
    OS/ABI:                            UNIX - System V
    ABI Version:                       0
    Type:                              EXEC (Executable file)
    Machine:                           ARM
    Version:                           0x1
    Entry point address:               0x1ee30
    Start of program headers:          52 (bytes into file)
    Start of section headers:          3431360 (bytes into file)
    Flags:                             0x4000002, Version4 EABI, &lt;unknown&gt;
    Size of this header:               52 (bytes)
    Size of program headers:           32 (bytes)
    Number of program headers:         8
    Size of section headers:           40 (bytes)
    Number of section headers:         27
    Section header string table index: 26
  </code></pre>
  <p>The target system cpu info</p>
  <pre><code>Processor   : ARMv6-compatible processor rev 5 (v6l)
  BogoMIPS    : 648.80
  Features    : swp half thumb fastmult edsp java
  CPU implementer : 0x41
  CPU architecture: 6TEJ
  CPU variant : 0x1
  CPU part    : 0xb36
  CPU revision    : 5
  
  Hardware    : Comcerto 1000 (EVM)
  Revision    : 0000
  Serial      : 0000000000000000
  </code></pre>
  <p>The dmesg info</p>
  <pre class="lang-sh prettyprint-override"><code>dmesg | head
  </code></pre>
  <pre><code>Initializing cgroup subsys cpuset
  Initializing cgroup subsys cpu
  Linux version 2.6.33.5 (root@Jason.openvox) (gcc version 4.1.2) #5 Mon Jan 29 20:07:16 CST 2018
  CPU: ARMv6-compatible processor [4117b365] revision 5 (ARMv6TEJ), cr=00c5387d
  CPU: VIPT aliasing data cache, VIPT aliasing instruction cache
  Machine: Comcerto 1000 (EVM)
  Memory policy: ECC disabled, Data cache writeback
  On node 0 totalpages: 30720
  free_area_init_node: node 0, pgdat c0399e54, node_mem_map c03c2000
    DMA zone: 240 pages used for memmap
  </code></pre>
  <h2>zig build-exec</h2>
  <p>Tried build with</p>
  <pre class="lang-sh prettyprint-override"><code># running ./hello Aborted
  zig build-exe -target arm-linux-none -mcpu=arm1136j_s hello.zig
  # Aborted
  zig build-exe -target arm-linux-eabi -mcpu=arm1136j_s hello.zig
  # Illegal instruction
  zig build-exe -target arm-linux-eabi hello.zig
  </code></pre>
  <p>tried v4 &amp; v5 mcpu, but build failed</p>
  <ul>
  <li>arm710t</li>
  <li>arm1020e</li>
  <li>arm1020t</li>
  <li>arm1022e</li>
  </ul>
  <pre><code>ld.lld: warning: lld uses blx instruction, no object with architecture supporting feature detected
  ld.lld: error: undefined symbol: __sync_val_compare_and_swap_4
  &gt;&gt;&gt; referenced by heap.zig:352 (/usr/lib/zig/std/heap.zig:352)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.heap.PageAllocator.alloc)
  &gt;&gt;&gt; referenced by Mutex.zig:101 (/usr/lib/zig/std/Thread/Mutex.zig:101)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.Thread.Mutex.AtomicMutex.lockSlow)
  &gt;&gt;&gt; referenced by StaticResetEvent.zig:149 (/usr/lib/zig/std/Thread/StaticResetEvent.zig:149)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.Thread.StaticResetEvent.AtomicEvent.timedWait)
  &gt;&gt;&gt; referenced 2 more times
  
  ld.lld: error: undefined symbol: __sync_fetch_and_add_1
  &gt;&gt;&gt; referenced by debug.zig:284 (/usr/lib/zig/std/debug.zig:284)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.debug.panicImpl)
  
  ld.lld: error: undefined symbol: __sync_fetch_and_sub_1
  &gt;&gt;&gt; referenced by debug.zig:305 (/usr/lib/zig/std/debug.zig:305)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.debug.panicImpl)
  
  ld.lld: error: undefined symbol: __sync_lock_test_and_set_4
  &gt;&gt;&gt; referenced by Mutex.zig:81 (/usr/lib/zig/std/Thread/Mutex.zig:81)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.Thread.Mutex.AtomicMutex.lock)
  &gt;&gt;&gt; referenced by Mutex.zig:88 (/usr/lib/zig/std/Thread/Mutex.zig:88)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.Thread.Mutex.AtomicMutex.unlock)
  &gt;&gt;&gt; referenced by Mutex.zig:123 (/usr/lib/zig/std/Thread/Mutex.zig:123)
  &gt;&gt;&gt;               zig-cache/o/750724e51d9b1b9d610b91ec3f30a585/hello.o:(std.Thread.Mutex.AtomicMutex.lockSlow)
  error: LLDReportedFailure
  </code></pre>
  <hr />
  <p>But go cross build can running in target</p>
  <pre class="lang-sh prettyprint-override"><code># produce EABI5 &amp; armv5
  GOOS=linux GOARM=5 GOARCH=arm CGO_ENABLED=0 go build hello.go
  </code></pre>
  <p>So I guess the problem is zig produce EABI5 or armv6, but <strong>none</strong> of armv5 mcpu can pass the build, how can I produce a EABI4 or armv5 binary by using zig ?</p>
  <p><strong>Related PR</strong></p>
  <ul>
  <li><a href="https://github.com/ziglang/zig/pull/10756" rel="nofollow noreferrer">https://github.com/ziglang/zig/pull/10756</a></li>
  </ul>