title: Data Memory Barrier (DMB) in CMSIS libraries for Cortex-M3s
body: <p>In the CMSIS definitions for gcc you can find something like this:</p>
  
  <pre><code>static __INLINE void __DMB(void) { __ASM volatile ("dmb"); }
  </code></pre>
  
  <p>My question is: what use does a memory barrier have if it does not declare "memory" in the clobber list?</p>
  
  <p>Is it an error in the core_cm3.h or is there a reason why gcc should behave correctly without any additional help?</p>