title: Variable expansion in makefile for loop
body: <pre><code>APPS = a b c
  
  a_OBJ = x.o y.o z.o
  b_OBJ =  p.o q.o r.o
  c_OBJ = s.o t.o k.o
  
  all:
      for i in $(APPS);   \
      do
         echo $("$${i}_OBJ");  \
      done;
  </code></pre>
  
  <p>In the above given sample Makefile I want to print the list of obj files inside the for loop but the list is not getting expanded as expected, what  exactly am I missing here for the proper expansion of the OBJ lists.</p>