title: Automatic generate target From Source List Make File
body: <p>I have this directory structure. </p>
  
  <pre><code>app/
     src
     include
     lib/
         src
     maincode/
             main.cc
             Makefile
  </code></pre>
  
  <p>I want to generate automatic target from the source list in makefile. So I don't have to write rule for each file. </p>
  
  <p>Example </p>
  
  <pre><code>source=\
          ../src/a.cpp
          ../src/ab.cpp
          ../lib/src/b.cpp
  </code></pre>
  
  <p>I want to write rule like </p>
  
  <pre><code>%.o:%.cpp
  </code></pre>
  
  <p>so that I don't have to repeat rule for each file. 
  How I can achieve this ?</p>