title: Find AMAT and CPI of Multi-level cache for a processor
body: <p>Can anyone help me with this question? It is my computer architecture homework. I have no idea how to solve this. I know only this formula. AMAT = Hit time + (miss rate * miss penalty). However, I know that this formula cannot apply to this problem. I also don't know how to find CPI.</p>
  
  <p>Assume that main memory accesses take 70 ns and that memory accesses are 36% of all instructions. L1 and L2 caches are attached to a processor P. The specification of the two caches can be listed as follows: 
  L1: size 2KB, miss rate = 8%, and hit time (time needed if a word is found in L1 ) is 0.66ns
  L2: size = 1 MB. miss rate = 95%, and hit time is 5.62ns</p>
  
  <p>What is the AMAT (Average Memory Access Time) for P? Assume the base CPI (Cycle per Instruction) of 1.0 without any memory stalls (a word is found in L1), what is the total CPI for P?  </p>