title: Does the CPU stall when access external memory(SRAM) via FSMC
body: <p>I am using a STM32f103 chip with a Cortex-m3 core in a project. According to the manual <a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337i/CHDIJAFG.html" rel="nofollow">3.3.1. Cortex-M3 instructions</a>,  load a 32bit word with a single LRD instruction takes 2 CPU cycles to complete (assuming the destination is not PC). </p>
  
  <p>My understanding is that this is only true for reading from internal memories (Flash or internal SRAM)</p>
  
  <p>When reading from an external SRAM via the FSMC, it must take more cycles to complete the read operation. During the read operation, does the CPU stall until the FSMC is able to put the data together? In other words, do I lose CPU cycles when accessing external memories?</p>
  
  <p>Thank you. </p>
  
  <p>Edit 1: Also assume all access are aligned 32bit access.  </p>