title: Confused About UNIX Makefile $< and $?
body: <p>So I'm learning about makefiles, however the $&lt; and $? are really confusing me. Speaking of which, $@ also confuses me.</p>
  
  <p>What if there are multiple targets, then what does $@ refer to, the first one? And what if you want to refer to the second target, are you just screwed?</p>
  
  <p>With $&lt;, my teacher told me it refers to the current prerequisite. However, he had an example in his slide as follows:</p>
  
  <pre><code>.SUFFIXES: .c .o .cxx
  
  .c.o:;$(CC) $(CFLAGS) -c $&lt;
  
  .cxx.o:; $(CXX) $(CXXFLAGS) -c $&lt;
  </code></pre>
  
  <p>This doesn't make any sense to me. How the hell can $&lt; refer to anything if there are no dependencies? In lines 2 and 3 there aren't any dependencies.</p>
  
  <p>As far as $? goes, I heard it was the newer prerequisite list, and this is just total jargon to me.</p>
  
  <p>Thanks for any help guys, I've tried google for the past hour but it's all in the same terse UNIX speech that is somewhat hard for me to understand.</p>
  
  <p><strong>EDIT:</strong> I should add, I'm confused by the notation in lines 2 and 3. In the beginning of each line, what does it mean to have each suffix(.c.o and .cxx.o respectively) crammed together like that without any spaces?</p>