title: How do Hardware Description Languages differ from General Purpose languages at the low level?
body: <p><strong>Question:</strong></p>
  
  <p>How do Hardware languages (HDLs) differ from general purpose languages such as Python, Java, etc. In particular, what is the primary trade-off that causes general purpose languages to be sub-optimal for FPGA's when compared to VHDL and Verilog?</p>
  
  <hr>
  
  <p><strong>Context:</strong></p>
  
  <p>I'm a programmer but definitely work at a high level of abstraction such as JavaScript, tinkering with API's, etc. My low-level knowledge is very limited but I am playing around with an FPGA and have some novice questions that I cannot solve with Google or Wikis. </p>
  
  <p>Considering I am a novice, please do not vote harshly against this post. Just state your suggestions for the question and I will happily revise! :)</p>
  
  <hr>
  
  <p><strong>Example:</strong></p>
  
  <p>For example, why isn't everyone just coding FPGAs and ASICs with Python or C# instead of Verilog or VHDL? I understand that there are some Python libraries, but I have read that they are limited in their viable use-cases. I would greatly appreciate someone shining some light on why HDLs are necessary and beneficial and why general purpose languages are not optimal in comparison for these scenarios.</p>
  
  <p>Thanks in advance!</p>