title: How to make sure a piece of code never leaves the CPU cache (L3)?
body: <p>The latest Intel's XEON processors have 30MB of L3 memory which is enough to fit a thin type 1 Hypervisor.</p>
  
  <p>I'm interested in understanding how to keep such an Hypervisor within the CPU, i.e. prevented from being flushed to RAM or, at least, encrypt data before being sent to memory/disk.</p>
  
  <p>Assumes we are running on bare metal and we can bootstrap this using DRTM (Late Launch), e.g. we load from untrusted memory/disk but we can only load the real operating system if we can unseal() a secret which is used to decrypt the Operating System and which take place after having set the proper rules to make sure anything sent to RAM is encrypted. </p>
  
  <p>p.s. I know TXT's ACEA aka ACRAM (Authenticated Code Execution Area aka Authentication Code RAM) is said to have such guarantee (i.e. it is restrain to the CPU cache) so I wonder if some trickery could be done around this.</p>
  
  <p>p.p.s. It seems like this is beyond current research so I'm actually not quite sure an answer is possible to this point.</p>