title: Do we have to enable or disable PCI interrupts on every layer, or only at the closest to hardware?
body: <p>I'm implementing a PCIe driver, and I'd like to understand at what level the interrupts can be or should be enabled/disabled. I intentionally do not specify OS, as I'm assuming it should be relevant for any platform. By levels I mean the following:</p>
  
  <ul>
  <li>OS specific interrupts handling framework</li>
  <li>Interrupts can be disabled or enabled in the PCI/PCIe configuration space registers, e.g. COMMAND register</li>
  <li>Interrupts also can be masked at device level, for instance we can
  configure device not trigger certain interrupts to the host</li>
  </ul>
  
  <p>I understand that whatever interrupt type is being used on PCIe (INTx emulation, MSI or MSI-X), it has to be delivered to the host OS.</p>
  
  <p>So my question is really -- do we actually have to enable or disable interrupts on every layer, or it's sufficient only at the closest to hardware, e.g. in relevant PCI registers?</p>