title: RANDOM 0, 1, -1 IN VERILOG
body: <p>I would like to generate random decimal number 0, 1 or -1 in verilog, that I can add it to my basic signal and get some noise on it with it. 
  I tried with </p>
  
  <pre><code>reg [1:0] SIGNAL_noise_ii;
  SIGNAL_noise_ii &lt;= {$random}%2;
  </code></pre>
  
  <p>but it doesnt work the way I want.</p>
  
  <p>Could someone give me advice what to do?</p>
  
  <p>Thanks</p>