title: How can I separate long statements into lines in Verilog
body: <p>For example, I have a single long statement:</p>
  
  <pre><code>    $display("input_data: %x, 
                output_data: %x,
                result: %x",
                input_data,
                output_data,
                result);
  </code></pre>
  
  <p>How can I make it into single statement and multiple lines in Verilog?</p>