title: What does wildcard mean in makefile?
body: <p>I found the following lines in a makefile tutorial, but I have some problem with the bold lines.</p>
  
  <p>In 1 line, if I write </p>
  
  <pre><code>program_C_SRCS:=$(*.c)
  </code></pre>
  
  <p>it does not work. So please tell me what is 
  wildcard word in doing here. Is this word is specific to the makefile only?</p>
  
  <p>In tutorial it is written that second line will perform the test substitution. Can anyone tell me something about this text substitution?</p>
  
  <p>Please excuse me if my questions are very basic because I am new to make filestuff.</p>
  
  <p><a href="https://sites.google.com/site/michaelsafyan/software-engineering/how-to-write-a-makefile" rel="noreferrer">link of tutorial</a></p>
  
  <pre><code>CC:=g++
  program_NAME:=myprogram
  **program_C_SRCS:=$(wildcard *.c)**  # 1 line 
  program_CXX_SRCS:=$(wildcard *.cc)
  **program_C_OBJ:=$(program_C_SRCS:.c=.o)** # 2 line
  program_CXX_OBJ:=$(program_CXX_SRCS:.c=.o)
  program_OBJ:= $(program_C_OBJ) $(program_CXX_OBJ)
  </code></pre>