title: How to modify Makefile to support cross compilation?
body: <p>I have the following Makefile:</p>
  
  <pre><code>CC=g++
  
  top_srcdir=$(SRC_DIR)/cpp/src/
  
  INCLUDES:= -I $(top_srcdir) -I $(top_srcdir)command_classes -I $(top_srcdir)platform -I $(top_srcdir)value_classes
  LIBS:= -lopenzwave -lpthread -ludev
  LDFLAGS += -L$(SRC_DIR) -Wl,-R$(SRC_DIR) '-Wl,-R$$ORIGIN'
  
  all:    ozw
  
  ozw: Main.cpp
      $(CC) $(INCLUDES) -c Main.cpp -o ozw-power-on-off.o
      $(CC) $(LIBS) $(LDFLAGS) ozw-power-on-off.o -o ozw-power-on-off.out
  
  clean:
      rm -rf *.o *.out
  </code></pre>
  
  <p>I execute it with the following command:</p>
  
  <pre><code>  make ARCH=$TARGET_ARCH \
         CROSS_COMPILE=$TARGET_PREFIX \
         SRC_DIR=$ROOT/$PKG_BUILD
  </code></pre>
  
  <p>But it ignores <code>ARCH</code> and <code>CROSS_COMPILE</code> values. I tried to replace <code>$(CC)</code> with <code>$(MAKE)</code> and added <code>-$(MAKEFLAGS)</code>, but it was saying <code>Nothing to be done for 'Main.cpp'</code>.</p>
  
  <p>How can I fix it and add cross compilation support?</p>