title: Generate Block Compile Time If-Else Parameterized
body: <p>I'm looking to be able to parametric some behavioral level Verilog using the generate block. The module is for a re-configurable readout and FIFO block, mainly so we can code this up one and just use a parameter at the top level. </p>
  
  <p>Lets say we have:</p>
  
  <pre><code>always @(posedge write_out_clk or posedge RESETN)
   begin
     if (RESETN)          
      SENSE_ADDR &lt;= 0;
     else if (enb[0] == 1)
          SENSE_ADDR &lt;= 1;   // for example but may be some other wire/bus etc
     else if (enb[1] == 2)
          SENSE_ADDR &lt;= 1;   // for example but may be some other wire/bus etc
     else
      SENSE_ADDR &lt;= SENSE_ADDR;
     end
   end
  </code></pre>
  
  <p>This is behavioral so the specifics of implementation are left to the compiler with user given timing constraints etc. This works for 'n' else-if statements within the block if I hard code them, currently synthesis and simulation are both working for 16 statements. </p>
  
  <p>My question however is how to parameterise this using generate? Clearly if 'n=8' its not too much of a big deal to hard code it. What if 'n=64' or 'n=128' etc. Seems a shame to hard code it if the rest of the module is fully parameterized using the generate for 'n'...</p>
  
  <p>I have tried doing something like:</p>
  
  <pre><code>genvar elseif_generate;
  generate
     for (elseif_generate=0; elseif_generate&lt;FIFO_SUB_BLOCKS; elseif_generate=elseif_generate+1)
     begin: elseif_generate_logic
     always @(posedge write_out_clk or posedge RESETN)
      begin
      if (RESETN)
          SENSE_ADDR &lt;= 0;
      else if (enb[elseif_generate] == 1)
          SENSE_ADDR &lt;= some_wire[elseif_generate];
      else
          SENSE_ADDR &lt;= SENSE_ADDR;
      end
     end
  endgenerate
  </code></pre>
  
  <p>This however leads to Multi-source errors for the output wire 'SENSE_ADDR'. This leads me to the further question. Clearly a generate block is not suitable here but how would I go about implementing parameterised code replication for this block? Basically I want the functionality of the behavioral, hard coded if-else always block in a parameterised form...</p>