title: How to specify an integer array as generic in VHDL?
body: <p>I am trying to create a generic driver for an SPI based IO expander. The idea is to pass initialization values in the instantiation, that matches the requested IO setup.</p>
  
  <p>My current attempt look like this :</p>
  
  <pre><code>entity max7301_simple is
     generic ( 
          IO_cfg : array (1 to 7) OF integer range 0 to 255 := (16#55#, 16#55#, 16#55#, 16#55#, 16#55#, 16#55#, 16#55#)
             );
       port  (
          -- Application interface :
          clk_i       :   in std_logic;        -- input clock, xx MHz.
          rst_i       :   in std_logic;        -- sync reset.
          en_i        :   in std_logic;        -- enable, forces re-init of pins on MAX7301.
          output_i    :   in std_logic_vector(27 downto 0);   --data to write to output pins on MAX7301
          irq_o       :   out std_logic;       -- IRQ, TODO: what triggers, change on inputs ?
          input_o     :   out std_logic_vector(27 downto 0);  --data read from input pins on MAX7301
          -- MAX7301 SPI interface
          sclk        :   out std_logic;        -- SPI clock
          din         :   in std_logic;        -- SPI data input
          dout        :   out std_logic;       -- SPI read data
          cs          :   out std_logic        -- SPI chip select
      );
  end max7301_simple;
  </code></pre>
  
  <p>The problem is with the IO_cfg array, i have tried various attempts w/wo init values etc. And cannot seem to figure how to specify the array.</p>
  
  <p>I belive to have read that you can pass an array as generic, but still haven't got much luck with it.  Xilinx ISE just tells med "syntax error near 'array' " wich is not informative enough to get me forward.</p>
  
  <p>Any help would be appreciated</p>
  
  <p>I always need 7 values, when instantiating this module. </p>