title: Having trouble with Verilog inout wires
body: <p>For the record, I'm a complete Verilog newbie. I'm writing a module that uses a few bidirectional buses.</p>
  
  <pre><code>inout wire [KEY_SIZE-1:0] prevKey;
  inout wire [TAG_SIZE-1:0] prevTag;
  
  inout wire [KEY_SIZE-1:0] nextKey;
  inout wire [TAG_SIZE-1:0] nextTag;
  </code></pre>
  
  <p>I know how I read things off of the bus, but how do I write something onto it? If I use an assign statement to a <code>reg</code>, will the value of the <code>reg</code> get clobbered when new data comes onto the wire? Is dealing with an <code>inout</code> port worth the hassle, or should I just make an <code>input</code> and and <code>output</code> bus for each?</p>