title: how to manage c files dependencies in make
body: <p>i'm starting with make and i was searching how to automaticly generate dependencies for my c files, i found this piece of code :</p>
  
  <pre><code># pull in dependency info for *existing* .o files
  -include $(OBJS:.o=.d)
  
  
  # compile and generate dependency info
  %.o: %.c
      gcc -c $(CFLAGS) $*.c -o $*.o
      gcc -MM $(CFLAGS) $*.c &gt; $*.d
  </code></pre>
  
  <p>what i don't understand is when i generate the dependencies file %.d, i already have built the %.o file, so what it the point to creating this dependencies file, and the -include i executed before everything so no dependencies file will exist.</p>