title: Different ways to to trigger a SMI for a processor
body: <p>I am writing some firmware code running in the System Managemnt Mode (SMM) on an Intel platform. I want to fully understand how my SMI handler get started.</p>
  
  <p>I read from the Intel Manual that:</p>
  
  <blockquote>
    <p>The only way to enter SMM is by signaling an SMI through the SMI# pin
    on the processor or through an SMI message received through the APIC
    bus.</p>
  </blockquote>
  
  <p>And I also read that a <strong>synchronous SMI</strong> can be triggered by writing to an <strong>I/O port</strong>.</p>
  
  <p>My understanding is like this:</p>
  
  <p>SMM is just a special operating mode of a processor. Based on my previous experience, whenever I want to change the state of a processor, such as enabling <em>paging</em> or enterring <em>protected mode</em>, I usually modify the <strong>control register</strong> or <strong>Model Specific Registers (MSR)</strong>. These registers are part of the processor and I can buy it that some internal magic happens if I change some bits of them. </p>
  
  <p>But what does the above <strong>I/O port</strong> mean? Where does this port pointing to? If writing to a port can trigger a SMI as well, how is the <em>port-writing-approach</em> related to the canonical ways of <em>SMI# pin</em> and the <em>SMI message</em>? And is this port number changeable?</p>