title: VHDL how to use a std_logic_vector as index for an array
body: <p>I want to use std_logic_vector as index for an array, for example:</p>
  
  <pre><code>Data: in std_logic_vector(7 downto 0);
  signal counter : std_logic_vector(3 downto 0);
  
  output &lt;= Data(counter);
  </code></pre>
  
  <p>Since VHDL syntax check tells me that I should use an integer with Data as index, I want to ask if it's possible to use an std_logic_vector as index.</p>
  
  <p>In case not, if I use a counter like this:</p>
  
  <pre><code>signal counter : integer range 0 to 7 := 7;
  </code></pre>
  
  <p>Synthesizer will create a 8 bit counter(because 7 is maximum value) or it will create a 32bit counter? I ask this question becouse if I assign a value of 8 to counter vhdl syntax check doesn't tell me that is an error.</p>