title: vhdl Relational Operations
body: <p>Please I need help, I am trying to clip my value between +2048 and -2048 but this are in std_logic_vector i.e. ("111111111111100000000000000000000000" and "000000000000100000000000000000000000"), I am from a software background and I think that is why am having this issue, I have attached a snippet of my code</p>
  
  <pre><code>  --Saturate the output to -2048 to +2048
  
  saturate1:process (x1,x2)
  --variable sum, tmp :std_logic_vector(WWidth downto 0);
  begin
      y11 &lt;= x1+x2;
  
  if y11 &gt;= "000000000000100000000000000000000000" then
     y &lt;= "000000000000100000000000000000000000";
  elsif y11 &gt;= "111111111111100000000000000000000000" then
     y &lt;= "111111111111100000000000000000000000";
  else
     y &lt;= y2fullwidth;
  end if;
  end process saturate1;  
  </code></pre>
  
  <p>y11,x1,x2 and y are all type std_logic_vector.
  Thank you.</p>