title: Verilog error : Unable to bind parameter in module
body: <p>I'm new to Verilog, I'd really appreciate it if someone could help me figure this error out:</p>
  
  <p>I'm trying to write a test bench <i>PU_tb</i>, which is instantiating this module:</p>
  
  <pre><code>PU_conv #(
  .image_width         ( image_width        ),
  .image_height        ( image_height       ),
  .kernel_width        ( kernel_width       ),
  .kernel_height       ( kernel_height      )
  ) convolution (
  .ACLK               ( ACLK                ), //input    
  .image              ( image               ), //input
  .kernel             ( kernel              ), //input
  .result             ( result              )  //output    
  );
  </code></pre>
  
  <p>The module PU_conv looks like this:</p>
  
  <pre><code>module PU_conv 
  #( //Parameters
  parameter integer image_width   = 10,
  parameter integer image_height  = 4,
  parameter integer kernel_width  = 2,
  parameter integer kernel_height = 2
  )( //PORTS
  input   wire                                   ACLK,
  input   wire [0:image_width][image_height:0]   image,
  input   wire [0:kernel_width][kernel_height:0] kernel,
  output  reg [0:image_width][image_height:0]    result
  );
  </code></pre>
  
  <p>I'm getting this error:</p>
  
  <blockquote>
    <p>error: Unable to bind parameter 'image_height' in 'PU_tb' <br>
    error: Unable to bind parameter 'image_width' in 'PU_tb'  <br>
    error: Unable to bind parameter 'kernel_height' in 'PU_tb' <br>
    error: Unable to bind parameter 'kernel_width' in 'PU_tb' <br></p>
  </blockquote>
  
  <p>The kernel and image widths and heights are declared as follows:</p>
  
  <pre><code>reg[5:0] param_kw;
  reg[5:0] param_kh;
  reg[5:0] param_iw;
  reg[5:0] param_ih; ....
  
  integer kernel_width, kernel_height, image_width, image_height;
  always @(param_kw)
      kernel_width = param_kw;
  always @(param_kh)
      kernel_height = param_kh;
  always @(param_iw)
      image_width = param_iw;
  always @(param_ih)
      image_height = param_ih;
  </code></pre>
  
  <p>What am I doing wrong?</p>