title: Implement equation in VHDL
body: <p>I am trying to implement the equation in VHDL which has multiplication by some constant and addition. The equation is as below,</p>
  
  <pre><code>  y&lt;=-((x*x*x)*0.1666)+(2.5*(x*x))- (21.666*x) + 36.6653;   ----error
  </code></pre>
  
  <p>I got the error</p>
  
  <pre><code>     HDLCompiler:1731 - found '0' definitions of operator "*",  
       can not determine exact overloaded matching definition for "*".
  </code></pre>
  
  <p>entity is </p>
  
  <pre><code>    entity eq1 is
          Port ( x : in  signed(15 downto 0);
                 y : out signed (15 downto 0) );
      end eq1;
  </code></pre>
  
  <p>I tried using the function RESIZE and x in integer but it gives same error. Should i have to use another data type? x is having pure integer values like 2,4,6..etc.</p>