title: Zilog Z80 OP-Code implementation
body: <p>I'm currently developing an emulator for the good old GameBoy and I'm facing some problems understandig how some basic operation codes have to be implemented. </p>
  
  <p>Right now I'm implementing the AND operations; the first few (0xA0 -> 0xA3; 0xA6 &amp; 0xA7) are pretty straight forward but the AND operations for the registers H, L are a bit different.</p>
  
  <p>You can download the documention of the z80 under this link:
  <a href="http://www.zilog.com/docs/z80/um0080.pdf" rel="noreferrer">um0080.pdf</a> (page 172)</p>
  
  <p>Here are some examples to show what I mean (with pseudo-code) and basically what I do:</p>
  
  <p><em>AND A,H (note the bit-shifting)</em></p>
  
  <pre><code>(read HL register; &gt;&gt; 8) save in cache C
  R-&gt;C = R-&gt;HL &gt;&gt; 8;
  
  perform AND operation with cache
  AND_H(R-&gt;C);
  R-&gt;A &amp;= R-&gt;C;
  </code></pre>
  
  <p><em>AND A,L (note the bit-masking)</em></p>
  
  <pre><code>(read HL register; &amp;0xFF) save in cache C
  R-&gt;C = R-&gt;HL &amp;0xFF;
  </code></pre>
  
  <p>I know all the bit-operations and I know what they do, but it seems that I can't figure out why its need to be done like that. I have some theories (correct me if I'm wrong :-)):</p>
  
  <p>What I already understood is, that the registers H and L are basically the register HL, which is an 16-Bit register. Since the CPU/Bus can only handle 8-Bit operations, it needs to be splitted up; 
  or the more logic suggestion: since its only one register, the values of H and L are masked in the register and they simply need to be separated from each other (higher/lower nibble?).</p>
  
  <p>I would be deeply grateful if someone can make this more clear to me because I just want to have some more background knowledge (how all this stuff works internally) so its very important to me that I know what I'm doing.</p>