title: How can I ignore command line variable assignment in a recursive build?
body: <p>I'm trying to glue two build systems together. Both are recursive (rules in the makefile use make to call other makefiles to build components of the project). </p>
  
  <p>I'll call them 'A' and 'B' where 'A' builds the application and 'B' builds libraries used by 'A'.</p>
  
  <p>The top level makefile in A calls 'make  TARGET=whatever' which means that all the recursively-invoked bits of the build inherit the value of TARGET as a read-only variable, including the build system from B, which is called as part of the recursive build.</p>
  
  <p>I don't want this to happen in the build system for 'B' (which come from a different project) as the makefiles there use TARGET for their own purposes and the build fails since TARGET has the wrong value and is read-only.</p>
  
  <p>I can only see two solutions to this, neither of which is palettable;</p>
  
  <p>1) Rename TARGET to something else in the makefile in A that sets it and in the makefiles in A that use it, to avoid the clash with the lower levels of the build system.</p>
  
  <p>2) Use the 'override' directive everywhere in the makefiles in B where the TARGET variable is set, to override its read-only status.</p>
  
  <p>Anyone got any better ideas? - ideally, I want <em>nothing</em> to be inherited by the B's build system from A's, except those options I explicitly pass to the B build system from A.</p>
  
  <p>Incidentally, I'm using GNU Make v3.80.</p>